bfin_5xx.c 25 KB

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  1. /*
  2. * File: drivers/serial/bfin_5xx.c
  3. * Based on: Based on drivers/serial/sa1100.c
  4. * Author: Aubrey Li <aubrey.li@analog.com>
  5. *
  6. * Created:
  7. * Description: Driver for blackfin 5xx serial ports
  8. *
  9. * Modified:
  10. * Copyright 2006 Analog Devices Inc.
  11. *
  12. * Bugs: Enter bugs at http://blackfin.uclinux.org/
  13. *
  14. * This program is free software; you can redistribute it and/or modify
  15. * it under the terms of the GNU General Public License as published by
  16. * the Free Software Foundation; either version 2 of the License, or
  17. * (at your option) any later version.
  18. *
  19. * This program is distributed in the hope that it will be useful,
  20. * but WITHOUT ANY WARRANTY; without even the implied warranty of
  21. * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
  22. * GNU General Public License for more details.
  23. *
  24. * You should have received a copy of the GNU General Public License
  25. * along with this program; if not, see the file COPYING, or write
  26. * to the Free Software Foundation, Inc.,
  27. * 51 Franklin St, Fifth Floor, Boston, MA 02110-1301 USA
  28. */
  29. #if defined(CONFIG_SERIAL_BFIN_CONSOLE) && defined(CONFIG_MAGIC_SYSRQ)
  30. #define SUPPORT_SYSRQ
  31. #endif
  32. #include <linux/module.h>
  33. #include <linux/ioport.h>
  34. #include <linux/init.h>
  35. #include <linux/console.h>
  36. #include <linux/sysrq.h>
  37. #include <linux/platform_device.h>
  38. #include <linux/tty.h>
  39. #include <linux/tty_flip.h>
  40. #include <linux/serial_core.h>
  41. #include <asm/gpio.h>
  42. #include <asm/mach/bfin_serial_5xx.h>
  43. #ifdef CONFIG_SERIAL_BFIN_DMA
  44. #include <linux/dma-mapping.h>
  45. #include <asm/io.h>
  46. #include <asm/irq.h>
  47. #include <asm/cacheflush.h>
  48. #endif
  49. /* UART name and device definitions */
  50. #define BFIN_SERIAL_NAME "ttyBF"
  51. #define BFIN_SERIAL_MAJOR 204
  52. #define BFIN_SERIAL_MINOR 64
  53. /*
  54. * Setup for console. Argument comes from the menuconfig
  55. */
  56. #define DMA_RX_XCOUNT 512
  57. #define DMA_RX_YCOUNT (PAGE_SIZE / DMA_RX_XCOUNT)
  58. #define DMA_RX_FLUSH_JIFFIES 5
  59. #ifdef CONFIG_SERIAL_BFIN_DMA
  60. static void bfin_serial_dma_tx_chars(struct bfin_serial_port *uart);
  61. #else
  62. static void bfin_serial_do_work(struct work_struct *work);
  63. static void bfin_serial_tx_chars(struct bfin_serial_port *uart);
  64. static void local_put_char(struct bfin_serial_port *uart, char ch);
  65. #endif
  66. static void bfin_serial_mctrl_check(struct bfin_serial_port *uart);
  67. /*
  68. * interrupts are disabled on entry
  69. */
  70. static void bfin_serial_stop_tx(struct uart_port *port)
  71. {
  72. struct bfin_serial_port *uart = (struct bfin_serial_port *)port;
  73. #ifdef CONFIG_SERIAL_BFIN_DMA
  74. disable_dma(uart->tx_dma_channel);
  75. #else
  76. unsigned short ier;
  77. ier = UART_GET_IER(uart);
  78. ier &= ~ETBEI;
  79. UART_PUT_IER(uart, ier);
  80. #endif
  81. }
  82. /*
  83. * port is locked and interrupts are disabled
  84. */
  85. static void bfin_serial_start_tx(struct uart_port *port)
  86. {
  87. struct bfin_serial_port *uart = (struct bfin_serial_port *)port;
  88. #ifdef CONFIG_SERIAL_BFIN_DMA
  89. bfin_serial_dma_tx_chars(uart);
  90. #else
  91. unsigned short ier;
  92. ier = UART_GET_IER(uart);
  93. ier |= ETBEI;
  94. UART_PUT_IER(uart, ier);
  95. bfin_serial_tx_chars(uart);
  96. #endif
  97. }
  98. /*
  99. * Interrupts are enabled
  100. */
  101. static void bfin_serial_stop_rx(struct uart_port *port)
  102. {
  103. struct bfin_serial_port *uart = (struct bfin_serial_port *)port;
  104. unsigned short ier;
  105. ier = UART_GET_IER(uart);
  106. ier &= ~ERBFI;
  107. UART_PUT_IER(uart, ier);
  108. }
  109. /*
  110. * Set the modem control timer to fire immediately.
  111. */
  112. static void bfin_serial_enable_ms(struct uart_port *port)
  113. {
  114. }
  115. #ifdef CONFIG_SERIAL_BFIN_PIO
  116. static void local_put_char(struct bfin_serial_port *uart, char ch)
  117. {
  118. unsigned short status;
  119. int flags = 0;
  120. spin_lock_irqsave(&uart->port.lock, flags);
  121. do {
  122. status = UART_GET_LSR(uart);
  123. } while (!(status & THRE));
  124. UART_PUT_CHAR(uart, ch);
  125. SSYNC();
  126. spin_unlock_irqrestore(&uart->port.lock, flags);
  127. }
  128. static void bfin_serial_rx_chars(struct bfin_serial_port *uart)
  129. {
  130. struct tty_struct *tty = uart->port.info->tty;
  131. unsigned int status, ch, flg;
  132. #ifdef BF533_FAMILY
  133. static int in_break = 0;
  134. #endif
  135. status = UART_GET_LSR(uart);
  136. ch = UART_GET_CHAR(uart);
  137. uart->port.icount.rx++;
  138. #ifdef BF533_FAMILY
  139. /* The BF533 family of processors have a nice misbehavior where
  140. * they continuously generate characters for a "single" break.
  141. * We have to basically ignore this flood until the "next" valid
  142. * character comes across. All other Blackfin families operate
  143. * properly though.
  144. */
  145. if (in_break) {
  146. if (ch != 0) {
  147. in_break = 0;
  148. ch = UART_GET_CHAR(uart);
  149. if (bfin_revid() < 5)
  150. return;
  151. } else
  152. return;
  153. }
  154. #endif
  155. if (status & BI) {
  156. #ifdef BF533_FAMILY
  157. in_break = 1;
  158. #endif
  159. uart->port.icount.brk++;
  160. if (uart_handle_break(&uart->port))
  161. goto ignore_char;
  162. }
  163. if (status & PE)
  164. uart->port.icount.parity++;
  165. if (status & OE)
  166. uart->port.icount.overrun++;
  167. if (status & FE)
  168. uart->port.icount.frame++;
  169. status &= uart->port.read_status_mask;
  170. if (status & BI)
  171. flg = TTY_BREAK;
  172. else if (status & PE)
  173. flg = TTY_PARITY;
  174. else if (status & FE)
  175. flg = TTY_FRAME;
  176. else
  177. flg = TTY_NORMAL;
  178. if (uart_handle_sysrq_char(&uart->port, ch))
  179. goto ignore_char;
  180. uart_insert_char(&uart->port, status, OE, ch, flg);
  181. ignore_char:
  182. tty_flip_buffer_push(tty);
  183. }
  184. static void bfin_serial_tx_chars(struct bfin_serial_port *uart)
  185. {
  186. struct circ_buf *xmit = &uart->port.info->xmit;
  187. if (uart->port.x_char) {
  188. UART_PUT_CHAR(uart, uart->port.x_char);
  189. uart->port.icount.tx++;
  190. uart->port.x_char = 0;
  191. return;
  192. }
  193. /*
  194. * Check the modem control lines before
  195. * transmitting anything.
  196. */
  197. bfin_serial_mctrl_check(uart);
  198. if (uart_circ_empty(xmit) || uart_tx_stopped(&uart->port)) {
  199. bfin_serial_stop_tx(&uart->port);
  200. return;
  201. }
  202. local_put_char(uart, xmit->buf[xmit->tail]);
  203. xmit->tail = (xmit->tail + 1) & (UART_XMIT_SIZE - 1);
  204. uart->port.icount.tx++;
  205. if (uart_circ_chars_pending(xmit) < WAKEUP_CHARS)
  206. uart_write_wakeup(&uart->port);
  207. if (uart_circ_empty(xmit))
  208. bfin_serial_stop_tx(&uart->port);
  209. }
  210. static irqreturn_t bfin_serial_rx_int(int irq, void *dev_id)
  211. {
  212. struct bfin_serial_port *uart = dev_id;
  213. spin_lock(&uart->port.lock);
  214. while ((UART_GET_IIR(uart) & IIR_STATUS) == IIR_RX_READY)
  215. bfin_serial_rx_chars(uart);
  216. spin_unlock(&uart->port.lock);
  217. return IRQ_HANDLED;
  218. }
  219. static irqreturn_t bfin_serial_tx_int(int irq, void *dev_id)
  220. {
  221. struct bfin_serial_port *uart = dev_id;
  222. spin_lock(&uart->port.lock);
  223. while ((UART_GET_IIR(uart) & IIR_STATUS) == IIR_TX_READY)
  224. bfin_serial_tx_chars(uart);
  225. spin_unlock(&uart->port.lock);
  226. return IRQ_HANDLED;
  227. }
  228. static void bfin_serial_do_work(struct work_struct *work)
  229. {
  230. struct bfin_serial_port *uart = container_of(work, struct bfin_serial_port, cts_workqueue);
  231. bfin_serial_mctrl_check(uart);
  232. }
  233. #endif
  234. #ifdef CONFIG_SERIAL_BFIN_DMA
  235. static void bfin_serial_dma_tx_chars(struct bfin_serial_port *uart)
  236. {
  237. struct circ_buf *xmit = &uart->port.info->xmit;
  238. unsigned short ier;
  239. int flags = 0;
  240. if (!uart->tx_done)
  241. return;
  242. uart->tx_done = 0;
  243. if (uart->port.x_char) {
  244. UART_PUT_CHAR(uart, uart->port.x_char);
  245. uart->port.icount.tx++;
  246. uart->port.x_char = 0;
  247. uart->tx_done = 1;
  248. return;
  249. }
  250. /*
  251. * Check the modem control lines before
  252. * transmitting anything.
  253. */
  254. bfin_serial_mctrl_check(uart);
  255. if (uart_circ_empty(xmit) || uart_tx_stopped(&uart->port)) {
  256. bfin_serial_stop_tx(&uart->port);
  257. uart->tx_done = 1;
  258. return;
  259. }
  260. spin_lock_irqsave(&uart->port.lock, flags);
  261. uart->tx_count = CIRC_CNT(xmit->head, xmit->tail, UART_XMIT_SIZE);
  262. if (uart->tx_count > (UART_XMIT_SIZE - xmit->tail))
  263. uart->tx_count = UART_XMIT_SIZE - xmit->tail;
  264. blackfin_dcache_flush_range((unsigned long)(xmit->buf+xmit->tail),
  265. (unsigned long)(xmit->buf+xmit->tail+uart->tx_count));
  266. set_dma_config(uart->tx_dma_channel,
  267. set_bfin_dma_config(DIR_READ, DMA_FLOW_STOP,
  268. INTR_ON_BUF,
  269. DIMENSION_LINEAR,
  270. DATA_SIZE_8));
  271. set_dma_start_addr(uart->tx_dma_channel, (unsigned long)(xmit->buf+xmit->tail));
  272. set_dma_x_count(uart->tx_dma_channel, uart->tx_count);
  273. set_dma_x_modify(uart->tx_dma_channel, 1);
  274. enable_dma(uart->tx_dma_channel);
  275. ier = UART_GET_IER(uart);
  276. ier |= ETBEI;
  277. UART_PUT_IER(uart, ier);
  278. spin_unlock_irqrestore(&uart->port.lock, flags);
  279. }
  280. static void bfin_serial_dma_rx_chars(struct bfin_serial_port *uart)
  281. {
  282. struct tty_struct *tty = uart->port.info->tty;
  283. int i, flg, status;
  284. status = UART_GET_LSR(uart);
  285. uart->port.icount.rx += CIRC_CNT(uart->rx_dma_buf.head, uart->rx_dma_buf.tail, UART_XMIT_SIZE);;
  286. if (status & BI) {
  287. uart->port.icount.brk++;
  288. if (uart_handle_break(&uart->port))
  289. goto dma_ignore_char;
  290. }
  291. if (status & PE)
  292. uart->port.icount.parity++;
  293. if (status & OE)
  294. uart->port.icount.overrun++;
  295. if (status & FE)
  296. uart->port.icount.frame++;
  297. status &= uart->port.read_status_mask;
  298. if (status & BI)
  299. flg = TTY_BREAK;
  300. else if (status & PE)
  301. flg = TTY_PARITY;
  302. else if (status & FE)
  303. flg = TTY_FRAME;
  304. else
  305. flg = TTY_NORMAL;
  306. for (i = uart->rx_dma_buf.head; i < uart->rx_dma_buf.tail; i++) {
  307. if (uart_handle_sysrq_char(&uart->port, uart->rx_dma_buf.buf[i]))
  308. goto dma_ignore_char;
  309. uart_insert_char(&uart->port, status, OE, uart->rx_dma_buf.buf[i], flg);
  310. }
  311. dma_ignore_char:
  312. tty_flip_buffer_push(tty);
  313. }
  314. void bfin_serial_rx_dma_timeout(struct bfin_serial_port *uart)
  315. {
  316. int x_pos, pos;
  317. int flags = 0;
  318. bfin_serial_dma_tx_chars(uart);
  319. spin_lock_irqsave(&uart->port.lock, flags);
  320. x_pos = DMA_RX_XCOUNT - get_dma_curr_xcount(uart->rx_dma_channel);
  321. if (x_pos == DMA_RX_XCOUNT)
  322. x_pos = 0;
  323. pos = uart->rx_dma_nrows * DMA_RX_XCOUNT + x_pos;
  324. if (pos>uart->rx_dma_buf.tail) {
  325. uart->rx_dma_buf.tail = pos;
  326. bfin_serial_dma_rx_chars(uart);
  327. uart->rx_dma_buf.head = uart->rx_dma_buf.tail;
  328. }
  329. spin_unlock_irqrestore(&uart->port.lock, flags);
  330. uart->rx_dma_timer.expires = jiffies + DMA_RX_FLUSH_JIFFIES;
  331. add_timer(&(uart->rx_dma_timer));
  332. }
  333. static irqreturn_t bfin_serial_dma_tx_int(int irq, void *dev_id)
  334. {
  335. struct bfin_serial_port *uart = dev_id;
  336. struct circ_buf *xmit = &uart->port.info->xmit;
  337. unsigned short ier;
  338. spin_lock(&uart->port.lock);
  339. if (!(get_dma_curr_irqstat(uart->tx_dma_channel)&DMA_RUN)) {
  340. clear_dma_irqstat(uart->tx_dma_channel);
  341. disable_dma(uart->tx_dma_channel);
  342. ier = UART_GET_IER(uart);
  343. ier &= ~ETBEI;
  344. UART_PUT_IER(uart, ier);
  345. xmit->tail = (xmit->tail+uart->tx_count) &(UART_XMIT_SIZE -1);
  346. uart->port.icount.tx+=uart->tx_count;
  347. if (uart_circ_chars_pending(xmit) < WAKEUP_CHARS)
  348. uart_write_wakeup(&uart->port);
  349. if (uart_circ_empty(xmit))
  350. bfin_serial_stop_tx(&uart->port);
  351. uart->tx_done = 1;
  352. }
  353. spin_unlock(&uart->port.lock);
  354. return IRQ_HANDLED;
  355. }
  356. static irqreturn_t bfin_serial_dma_rx_int(int irq, void *dev_id)
  357. {
  358. struct bfin_serial_port *uart = dev_id;
  359. unsigned short irqstat;
  360. uart->rx_dma_nrows++;
  361. if (uart->rx_dma_nrows == DMA_RX_YCOUNT) {
  362. uart->rx_dma_nrows = 0;
  363. uart->rx_dma_buf.tail = DMA_RX_XCOUNT*DMA_RX_YCOUNT;
  364. bfin_serial_dma_rx_chars(uart);
  365. uart->rx_dma_buf.head = uart->rx_dma_buf.tail = 0;
  366. }
  367. spin_lock(&uart->port.lock);
  368. irqstat = get_dma_curr_irqstat(uart->rx_dma_channel);
  369. clear_dma_irqstat(uart->rx_dma_channel);
  370. spin_unlock(&uart->port.lock);
  371. return IRQ_HANDLED;
  372. }
  373. #endif
  374. /*
  375. * Return TIOCSER_TEMT when transmitter is not busy.
  376. */
  377. static unsigned int bfin_serial_tx_empty(struct uart_port *port)
  378. {
  379. struct bfin_serial_port *uart = (struct bfin_serial_port *)port;
  380. unsigned short lsr;
  381. lsr = UART_GET_LSR(uart);
  382. if (lsr & TEMT)
  383. return TIOCSER_TEMT;
  384. else
  385. return 0;
  386. }
  387. static unsigned int bfin_serial_get_mctrl(struct uart_port *port)
  388. {
  389. #ifdef CONFIG_SERIAL_BFIN_CTSRTS
  390. struct bfin_serial_port *uart = (struct bfin_serial_port *)port;
  391. if (uart->cts_pin < 0)
  392. return TIOCM_CTS | TIOCM_DSR | TIOCM_CAR;
  393. if (gpio_get_value(uart->cts_pin))
  394. return TIOCM_DSR | TIOCM_CAR;
  395. else
  396. #endif
  397. return TIOCM_CTS | TIOCM_DSR | TIOCM_CAR;
  398. }
  399. static void bfin_serial_set_mctrl(struct uart_port *port, unsigned int mctrl)
  400. {
  401. #ifdef CONFIG_SERIAL_BFIN_CTSRTS
  402. struct bfin_serial_port *uart = (struct bfin_serial_port *)port;
  403. if (uart->rts_pin < 0)
  404. return;
  405. if (mctrl & TIOCM_RTS)
  406. gpio_set_value(uart->rts_pin, 0);
  407. else
  408. gpio_set_value(uart->rts_pin, 1);
  409. #endif
  410. }
  411. /*
  412. * Handle any change of modem status signal since we were last called.
  413. */
  414. static void bfin_serial_mctrl_check(struct bfin_serial_port *uart)
  415. {
  416. #ifdef CONFIG_SERIAL_BFIN_CTSRTS
  417. unsigned int status;
  418. # ifdef CONFIG_SERIAL_BFIN_DMA
  419. struct uart_info *info = uart->port.info;
  420. struct tty_struct *tty = info->tty;
  421. status = bfin_serial_get_mctrl(&uart->port);
  422. if (!(status & TIOCM_CTS)) {
  423. tty->hw_stopped = 1;
  424. } else {
  425. tty->hw_stopped = 0;
  426. }
  427. # else
  428. status = bfin_serial_get_mctrl(&uart->port);
  429. uart_handle_cts_change(&uart->port, status & TIOCM_CTS);
  430. if (!(status & TIOCM_CTS))
  431. schedule_work(&uart->cts_workqueue);
  432. # endif
  433. #endif
  434. }
  435. /*
  436. * Interrupts are always disabled.
  437. */
  438. static void bfin_serial_break_ctl(struct uart_port *port, int break_state)
  439. {
  440. }
  441. static int bfin_serial_startup(struct uart_port *port)
  442. {
  443. struct bfin_serial_port *uart = (struct bfin_serial_port *)port;
  444. #ifdef CONFIG_SERIAL_BFIN_DMA
  445. dma_addr_t dma_handle;
  446. if (request_dma(uart->rx_dma_channel, "BFIN_UART_RX") < 0) {
  447. printk(KERN_NOTICE "Unable to attach Blackfin UART RX DMA channel\n");
  448. return -EBUSY;
  449. }
  450. if (request_dma(uart->tx_dma_channel, "BFIN_UART_TX") < 0) {
  451. printk(KERN_NOTICE "Unable to attach Blackfin UART TX DMA channel\n");
  452. free_dma(uart->rx_dma_channel);
  453. return -EBUSY;
  454. }
  455. set_dma_callback(uart->rx_dma_channel, bfin_serial_dma_rx_int, uart);
  456. set_dma_callback(uart->tx_dma_channel, bfin_serial_dma_tx_int, uart);
  457. uart->rx_dma_buf.buf = (unsigned char *)dma_alloc_coherent(NULL, PAGE_SIZE, &dma_handle, GFP_DMA);
  458. uart->rx_dma_buf.head = 0;
  459. uart->rx_dma_buf.tail = 0;
  460. uart->rx_dma_nrows = 0;
  461. set_dma_config(uart->rx_dma_channel,
  462. set_bfin_dma_config(DIR_WRITE, DMA_FLOW_AUTO,
  463. INTR_ON_ROW, DIMENSION_2D,
  464. DATA_SIZE_8));
  465. set_dma_x_count(uart->rx_dma_channel, DMA_RX_XCOUNT);
  466. set_dma_x_modify(uart->rx_dma_channel, 1);
  467. set_dma_y_count(uart->rx_dma_channel, DMA_RX_YCOUNT);
  468. set_dma_y_modify(uart->rx_dma_channel, 1);
  469. set_dma_start_addr(uart->rx_dma_channel, (unsigned long)uart->rx_dma_buf.buf);
  470. enable_dma(uart->rx_dma_channel);
  471. uart->rx_dma_timer.data = (unsigned long)(uart);
  472. uart->rx_dma_timer.function = (void *)bfin_serial_rx_dma_timeout;
  473. uart->rx_dma_timer.expires = jiffies + DMA_RX_FLUSH_JIFFIES;
  474. add_timer(&(uart->rx_dma_timer));
  475. #else
  476. if (request_irq
  477. (uart->port.irq, bfin_serial_rx_int, IRQF_DISABLED,
  478. "BFIN_UART_RX", uart)) {
  479. printk(KERN_NOTICE "Unable to attach BlackFin UART RX interrupt\n");
  480. return -EBUSY;
  481. }
  482. if (request_irq
  483. (uart->port.irq+1, bfin_serial_tx_int, IRQF_DISABLED,
  484. "BFIN_UART_TX", uart)) {
  485. printk(KERN_NOTICE "Unable to attach BlackFin UART TX interrupt\n");
  486. free_irq(uart->port.irq, uart);
  487. return -EBUSY;
  488. }
  489. #endif
  490. UART_PUT_IER(uart, UART_GET_IER(uart) | ERBFI);
  491. return 0;
  492. }
  493. static void bfin_serial_shutdown(struct uart_port *port)
  494. {
  495. struct bfin_serial_port *uart = (struct bfin_serial_port *)port;
  496. #ifdef CONFIG_SERIAL_BFIN_DMA
  497. disable_dma(uart->tx_dma_channel);
  498. free_dma(uart->tx_dma_channel);
  499. disable_dma(uart->rx_dma_channel);
  500. free_dma(uart->rx_dma_channel);
  501. del_timer(&(uart->rx_dma_timer));
  502. #else
  503. free_irq(uart->port.irq, uart);
  504. free_irq(uart->port.irq+1, uart);
  505. #endif
  506. }
  507. static void
  508. bfin_serial_set_termios(struct uart_port *port, struct ktermios *termios,
  509. struct ktermios *old)
  510. {
  511. struct bfin_serial_port *uart = (struct bfin_serial_port *)port;
  512. unsigned long flags;
  513. unsigned int baud, quot;
  514. unsigned short val, ier, lsr, lcr = 0;
  515. switch (termios->c_cflag & CSIZE) {
  516. case CS8:
  517. lcr = WLS(8);
  518. break;
  519. case CS7:
  520. lcr = WLS(7);
  521. break;
  522. case CS6:
  523. lcr = WLS(6);
  524. break;
  525. case CS5:
  526. lcr = WLS(5);
  527. break;
  528. default:
  529. printk(KERN_ERR "%s: word lengh not supported\n",
  530. __FUNCTION__);
  531. }
  532. if (termios->c_cflag & CSTOPB)
  533. lcr |= STB;
  534. if (termios->c_cflag & PARENB) {
  535. lcr |= PEN;
  536. if (!(termios->c_cflag & PARODD))
  537. lcr |= EPS;
  538. if (termios->c_cflag & CMSPAR)
  539. lcr |= STP;
  540. }
  541. port->read_status_mask = OE;
  542. if (termios->c_iflag & INPCK)
  543. port->read_status_mask |= (FE | PE);
  544. if (termios->c_iflag & (BRKINT | PARMRK))
  545. port->read_status_mask |= BI;
  546. /*
  547. * Characters to ignore
  548. */
  549. port->ignore_status_mask = 0;
  550. if (termios->c_iflag & IGNPAR)
  551. port->ignore_status_mask |= FE | PE;
  552. if (termios->c_iflag & IGNBRK) {
  553. port->ignore_status_mask |= BI;
  554. /*
  555. * If we're ignoring parity and break indicators,
  556. * ignore overruns too (for real raw support).
  557. */
  558. if (termios->c_iflag & IGNPAR)
  559. port->ignore_status_mask |= OE;
  560. }
  561. baud = uart_get_baud_rate(port, termios, old, 0, port->uartclk/16);
  562. quot = uart_get_divisor(port, baud);
  563. spin_lock_irqsave(&uart->port.lock, flags);
  564. do {
  565. lsr = UART_GET_LSR(uart);
  566. } while (!(lsr & TEMT));
  567. /* Disable UART */
  568. ier = UART_GET_IER(uart);
  569. UART_PUT_IER(uart, 0);
  570. /* Set DLAB in LCR to Access DLL and DLH */
  571. val = UART_GET_LCR(uart);
  572. val |= DLAB;
  573. UART_PUT_LCR(uart, val);
  574. SSYNC();
  575. UART_PUT_DLL(uart, quot & 0xFF);
  576. SSYNC();
  577. UART_PUT_DLH(uart, (quot >> 8) & 0xFF);
  578. SSYNC();
  579. /* Clear DLAB in LCR to Access THR RBR IER */
  580. val = UART_GET_LCR(uart);
  581. val &= ~DLAB;
  582. UART_PUT_LCR(uart, val);
  583. SSYNC();
  584. UART_PUT_LCR(uart, lcr);
  585. /* Enable UART */
  586. UART_PUT_IER(uart, ier);
  587. val = UART_GET_GCTL(uart);
  588. val |= UCEN;
  589. UART_PUT_GCTL(uart, val);
  590. spin_unlock_irqrestore(&uart->port.lock, flags);
  591. }
  592. static const char *bfin_serial_type(struct uart_port *port)
  593. {
  594. struct bfin_serial_port *uart = (struct bfin_serial_port *)port;
  595. return uart->port.type == PORT_BFIN ? "BFIN-UART" : NULL;
  596. }
  597. /*
  598. * Release the memory region(s) being used by 'port'.
  599. */
  600. static void bfin_serial_release_port(struct uart_port *port)
  601. {
  602. }
  603. /*
  604. * Request the memory region(s) being used by 'port'.
  605. */
  606. static int bfin_serial_request_port(struct uart_port *port)
  607. {
  608. return 0;
  609. }
  610. /*
  611. * Configure/autoconfigure the port.
  612. */
  613. static void bfin_serial_config_port(struct uart_port *port, int flags)
  614. {
  615. struct bfin_serial_port *uart = (struct bfin_serial_port *)port;
  616. if (flags & UART_CONFIG_TYPE &&
  617. bfin_serial_request_port(&uart->port) == 0)
  618. uart->port.type = PORT_BFIN;
  619. }
  620. /*
  621. * Verify the new serial_struct (for TIOCSSERIAL).
  622. * The only change we allow are to the flags and type, and
  623. * even then only between PORT_BFIN and PORT_UNKNOWN
  624. */
  625. static int
  626. bfin_serial_verify_port(struct uart_port *port, struct serial_struct *ser)
  627. {
  628. return 0;
  629. }
  630. static struct uart_ops bfin_serial_pops = {
  631. .tx_empty = bfin_serial_tx_empty,
  632. .set_mctrl = bfin_serial_set_mctrl,
  633. .get_mctrl = bfin_serial_get_mctrl,
  634. .stop_tx = bfin_serial_stop_tx,
  635. .start_tx = bfin_serial_start_tx,
  636. .stop_rx = bfin_serial_stop_rx,
  637. .enable_ms = bfin_serial_enable_ms,
  638. .break_ctl = bfin_serial_break_ctl,
  639. .startup = bfin_serial_startup,
  640. .shutdown = bfin_serial_shutdown,
  641. .set_termios = bfin_serial_set_termios,
  642. .type = bfin_serial_type,
  643. .release_port = bfin_serial_release_port,
  644. .request_port = bfin_serial_request_port,
  645. .config_port = bfin_serial_config_port,
  646. .verify_port = bfin_serial_verify_port,
  647. };
  648. static void __init bfin_serial_init_ports(void)
  649. {
  650. static int first = 1;
  651. int i;
  652. if (!first)
  653. return;
  654. first = 0;
  655. for (i = 0; i < nr_ports; i++) {
  656. bfin_serial_ports[i].port.uartclk = get_sclk();
  657. bfin_serial_ports[i].port.ops = &bfin_serial_pops;
  658. bfin_serial_ports[i].port.line = i;
  659. bfin_serial_ports[i].port.iotype = UPIO_MEM;
  660. bfin_serial_ports[i].port.membase =
  661. (void __iomem *)bfin_serial_resource[i].uart_base_addr;
  662. bfin_serial_ports[i].port.mapbase =
  663. bfin_serial_resource[i].uart_base_addr;
  664. bfin_serial_ports[i].port.irq =
  665. bfin_serial_resource[i].uart_irq;
  666. bfin_serial_ports[i].port.flags = UPF_BOOT_AUTOCONF;
  667. #ifdef CONFIG_SERIAL_BFIN_DMA
  668. bfin_serial_ports[i].tx_done = 1;
  669. bfin_serial_ports[i].tx_count = 0;
  670. bfin_serial_ports[i].tx_dma_channel =
  671. bfin_serial_resource[i].uart_tx_dma_channel;
  672. bfin_serial_ports[i].rx_dma_channel =
  673. bfin_serial_resource[i].uart_rx_dma_channel;
  674. init_timer(&(bfin_serial_ports[i].rx_dma_timer));
  675. #else
  676. INIT_WORK(&bfin_serial_ports[i].cts_workqueue, bfin_serial_do_work);
  677. #endif
  678. #ifdef CONFIG_SERIAL_BFIN_CTSRTS
  679. bfin_serial_ports[i].cts_pin =
  680. bfin_serial_resource[i].uart_cts_pin;
  681. bfin_serial_ports[i].rts_pin =
  682. bfin_serial_resource[i].uart_rts_pin;
  683. #endif
  684. bfin_serial_hw_init(&bfin_serial_ports[i]);
  685. }
  686. }
  687. #ifdef CONFIG_SERIAL_BFIN_CONSOLE
  688. static void bfin_serial_console_putchar(struct uart_port *port, int ch)
  689. {
  690. struct bfin_serial_port *uart = (struct bfin_serial_port *)port;
  691. while (!(UART_GET_LSR(uart)))
  692. barrier();
  693. UART_PUT_CHAR(uart, ch);
  694. SSYNC();
  695. }
  696. /*
  697. * Interrupts are disabled on entering
  698. */
  699. static void
  700. bfin_serial_console_write(struct console *co, const char *s, unsigned int count)
  701. {
  702. struct bfin_serial_port *uart = &bfin_serial_ports[co->index];
  703. int flags = 0;
  704. spin_lock_irqsave(&uart->port.lock, flags);
  705. uart_console_write(&uart->port, s, count, bfin_serial_console_putchar);
  706. spin_unlock_irqrestore(&uart->port.lock, flags);
  707. }
  708. /*
  709. * If the port was already initialised (eg, by a boot loader),
  710. * try to determine the current setup.
  711. */
  712. static void __init
  713. bfin_serial_console_get_options(struct bfin_serial_port *uart, int *baud,
  714. int *parity, int *bits)
  715. {
  716. unsigned short status;
  717. status = UART_GET_IER(uart) & (ERBFI | ETBEI);
  718. if (status == (ERBFI | ETBEI)) {
  719. /* ok, the port was enabled */
  720. unsigned short lcr, val;
  721. unsigned short dlh, dll;
  722. lcr = UART_GET_LCR(uart);
  723. *parity = 'n';
  724. if (lcr & PEN) {
  725. if (lcr & EPS)
  726. *parity = 'e';
  727. else
  728. *parity = 'o';
  729. }
  730. switch (lcr & 0x03) {
  731. case 0: *bits = 5; break;
  732. case 1: *bits = 6; break;
  733. case 2: *bits = 7; break;
  734. case 3: *bits = 8; break;
  735. }
  736. /* Set DLAB in LCR to Access DLL and DLH */
  737. val = UART_GET_LCR(uart);
  738. val |= DLAB;
  739. UART_PUT_LCR(uart, val);
  740. dll = UART_GET_DLL(uart);
  741. dlh = UART_GET_DLH(uart);
  742. /* Clear DLAB in LCR to Access THR RBR IER */
  743. val = UART_GET_LCR(uart);
  744. val &= ~DLAB;
  745. UART_PUT_LCR(uart, val);
  746. *baud = get_sclk() / (16*(dll | dlh << 8));
  747. }
  748. pr_debug("%s:baud = %d, parity = %c, bits= %d\n", __FUNCTION__, *baud, *parity, *bits);
  749. }
  750. static int __init
  751. bfin_serial_console_setup(struct console *co, char *options)
  752. {
  753. struct bfin_serial_port *uart;
  754. int baud = 57600;
  755. int bits = 8;
  756. int parity = 'n';
  757. #ifdef CONFIG_SERIAL_BFIN_CTSRTS
  758. int flow = 'r';
  759. #else
  760. int flow = 'n';
  761. #endif
  762. /*
  763. * Check whether an invalid uart number has been specified, and
  764. * if so, search for the first available port that does have
  765. * console support.
  766. */
  767. if (co->index == -1 || co->index >= nr_ports)
  768. co->index = 0;
  769. uart = &bfin_serial_ports[co->index];
  770. if (options)
  771. uart_parse_options(options, &baud, &parity, &bits, &flow);
  772. else
  773. bfin_serial_console_get_options(uart, &baud, &parity, &bits);
  774. return uart_set_options(&uart->port, co, baud, parity, bits, flow);
  775. }
  776. static struct uart_driver bfin_serial_reg;
  777. static struct console bfin_serial_console = {
  778. .name = BFIN_SERIAL_NAME,
  779. .write = bfin_serial_console_write,
  780. .device = uart_console_device,
  781. .setup = bfin_serial_console_setup,
  782. .flags = CON_PRINTBUFFER,
  783. .index = -1,
  784. .data = &bfin_serial_reg,
  785. };
  786. static int __init bfin_serial_rs_console_init(void)
  787. {
  788. bfin_serial_init_ports();
  789. register_console(&bfin_serial_console);
  790. return 0;
  791. }
  792. console_initcall(bfin_serial_rs_console_init);
  793. #define BFIN_SERIAL_CONSOLE &bfin_serial_console
  794. #else
  795. #define BFIN_SERIAL_CONSOLE NULL
  796. #endif
  797. static struct uart_driver bfin_serial_reg = {
  798. .owner = THIS_MODULE,
  799. .driver_name = "bfin-uart",
  800. .dev_name = BFIN_SERIAL_NAME,
  801. .major = BFIN_SERIAL_MAJOR,
  802. .minor = BFIN_SERIAL_MINOR,
  803. .nr = NR_PORTS,
  804. .cons = BFIN_SERIAL_CONSOLE,
  805. };
  806. static int bfin_serial_suspend(struct platform_device *dev, pm_message_t state)
  807. {
  808. struct bfin_serial_port *uart = platform_get_drvdata(dev);
  809. if (uart)
  810. uart_suspend_port(&bfin_serial_reg, &uart->port);
  811. return 0;
  812. }
  813. static int bfin_serial_resume(struct platform_device *dev)
  814. {
  815. struct bfin_serial_port *uart = platform_get_drvdata(dev);
  816. if (uart)
  817. uart_resume_port(&bfin_serial_reg, &uart->port);
  818. return 0;
  819. }
  820. static int bfin_serial_probe(struct platform_device *dev)
  821. {
  822. struct resource *res = dev->resource;
  823. int i;
  824. for (i = 0; i < dev->num_resources; i++, res++)
  825. if (res->flags & IORESOURCE_MEM)
  826. break;
  827. if (i < dev->num_resources) {
  828. for (i = 0; i < nr_ports; i++, res++) {
  829. if (bfin_serial_ports[i].port.mapbase != res->start)
  830. continue;
  831. bfin_serial_ports[i].port.dev = &dev->dev;
  832. uart_add_one_port(&bfin_serial_reg, &bfin_serial_ports[i].port);
  833. platform_set_drvdata(dev, &bfin_serial_ports[i]);
  834. }
  835. }
  836. return 0;
  837. }
  838. static int bfin_serial_remove(struct platform_device *pdev)
  839. {
  840. struct bfin_serial_port *uart = platform_get_drvdata(pdev);
  841. #ifdef CONFIG_SERIAL_BFIN_CTSRTS
  842. gpio_free(uart->cts_pin);
  843. gpio_free(uart->rts_pin);
  844. #endif
  845. platform_set_drvdata(pdev, NULL);
  846. if (uart)
  847. uart_remove_one_port(&bfin_serial_reg, &uart->port);
  848. return 0;
  849. }
  850. static struct platform_driver bfin_serial_driver = {
  851. .probe = bfin_serial_probe,
  852. .remove = bfin_serial_remove,
  853. .suspend = bfin_serial_suspend,
  854. .resume = bfin_serial_resume,
  855. .driver = {
  856. .name = "bfin-uart",
  857. },
  858. };
  859. static int __init bfin_serial_init(void)
  860. {
  861. int ret;
  862. pr_info("Serial: Blackfin serial driver\n");
  863. bfin_serial_init_ports();
  864. ret = uart_register_driver(&bfin_serial_reg);
  865. if (ret == 0) {
  866. ret = platform_driver_register(&bfin_serial_driver);
  867. if (ret) {
  868. pr_debug("uart register failed\n");
  869. uart_unregister_driver(&bfin_serial_reg);
  870. }
  871. }
  872. return ret;
  873. }
  874. static void __exit bfin_serial_exit(void)
  875. {
  876. platform_driver_unregister(&bfin_serial_driver);
  877. uart_unregister_driver(&bfin_serial_reg);
  878. }
  879. module_init(bfin_serial_init);
  880. module_exit(bfin_serial_exit);
  881. MODULE_AUTHOR("Aubrey.Li <aubrey.li@analog.com>");
  882. MODULE_DESCRIPTION("Blackfin generic serial port driver");
  883. MODULE_LICENSE("GPL");
  884. MODULE_ALIAS_CHARDEV_MAJOR(BFIN_SERIAL_MAJOR);