e1000_main.c 127 KB

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  1. /*******************************************************************************
  2. Copyright(c) 1999 - 2005 Intel Corporation. All rights reserved.
  3. This program is free software; you can redistribute it and/or modify it
  4. under the terms of the GNU General Public License as published by the Free
  5. Software Foundation; either version 2 of the License, or (at your option)
  6. any later version.
  7. This program is distributed in the hope that it will be useful, but WITHOUT
  8. ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
  9. FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for
  10. more details.
  11. You should have received a copy of the GNU General Public License along with
  12. this program; if not, write to the Free Software Foundation, Inc., 59
  13. Temple Place - Suite 330, Boston, MA 02111-1307, USA.
  14. The full GNU General Public License is included in this distribution in the
  15. file called LICENSE.
  16. Contact Information:
  17. Linux NICS <linux.nics@intel.com>
  18. Intel Corporation, 5200 N.E. Elam Young Parkway, Hillsboro, OR 97124-6497
  19. *******************************************************************************/
  20. #include "e1000.h"
  21. /* Change Log
  22. * 6.3.9 12/16/2005
  23. * o incorporate fix for recycled skbs from IBM LTC
  24. * 6.3.7 11/18/2005
  25. * o Honor eeprom setting for enabling/disabling Wake On Lan
  26. * 6.3.5 11/17/2005
  27. * o Fix memory leak in rx ring handling for PCI Express adapters
  28. * 6.3.4 11/8/05
  29. * o Patch from Jesper Juhl to remove redundant NULL checks for kfree
  30. * 6.3.2 9/20/05
  31. * o Render logic that sets/resets DRV_LOAD as inline functions to
  32. * avoid code replication. If f/w is AMT then set DRV_LOAD only when
  33. * network interface is open.
  34. * o Handle DRV_LOAD set/reset in cases where AMT uses VLANs.
  35. * o Adjust PBA partioning for Jumbo frames using MTU size and not
  36. * rx_buffer_len
  37. * 6.3.1 9/19/05
  38. * o Use adapter->tx_timeout_factor in Tx Hung Detect logic
  39. (e1000_clean_tx_irq)
  40. * o Support for 8086:10B5 device (Quad Port)
  41. * 6.2.14 9/15/05
  42. * o In AMT enabled configurations, set/reset DRV_LOAD bit on interface
  43. * open/close
  44. * 6.2.13 9/14/05
  45. * o Invoke e1000_check_mng_mode only for 8257x controllers since it
  46. * accesses the FWSM that is not supported in other controllers
  47. * 6.2.12 9/9/05
  48. * o Add support for device id E1000_DEV_ID_82546GB_QUAD_COPPER
  49. * o set RCTL:SECRC only for controllers newer than 82543.
  50. * o When the n/w interface comes down reset DRV_LOAD bit to notify f/w.
  51. * This code was moved from e1000_remove to e1000_close
  52. * 6.2.10 9/6/05
  53. * o Fix error in updating RDT in el1000_alloc_rx_buffers[_ps] -- one off.
  54. * o Enable fc by default on 82573 controllers (do not read eeprom)
  55. * o Fix rx_errors statistic not to include missed_packet_count
  56. * o Fix rx_dropped statistic not to include missed_packet_count
  57. (Padraig Brady)
  58. * 6.2.9 8/30/05
  59. * o Remove call to update statistics from the controller ib e1000_get_stats
  60. * 6.2.8 8/30/05
  61. * o Improved algorithm for rx buffer allocation/rdt update
  62. * o Flow control watermarks relative to rx PBA size
  63. * o Simplified 'Tx Hung' detect logic
  64. * 6.2.7 8/17/05
  65. * o Report rx buffer allocation failures and tx timeout counts in stats
  66. * 6.2.6 8/16/05
  67. * o Implement workaround for controller erratum -- linear non-tso packet
  68. * following a TSO gets written back prematurely
  69. * 6.2.5 8/15/05
  70. * o Set netdev->tx_queue_len based on link speed/duplex settings.
  71. * o Fix net_stats.rx_fifo_errors <p@draigBrady.com>
  72. * o Do not power off PHY if SoL/IDER session is active
  73. * 6.2.4 8/10/05
  74. * o Fix loopback test setup/cleanup for 82571/3 controllers
  75. * o Fix parsing of outgoing packets (e1000_transfer_dhcp_info) to treat
  76. * all packets as raw
  77. * o Prevent operations that will cause the PHY to be reset if SoL/IDER
  78. * sessions are active and log a message
  79. * 6.2.2 7/21/05
  80. * o used fixed size descriptors for all MTU sizes, reduces memory load
  81. * 6.1.2 4/13/05
  82. * o Fixed ethtool diagnostics
  83. * o Enabled flow control to take default eeprom settings
  84. * o Added stats_lock around e1000_read_phy_reg commands to avoid concurrent
  85. * calls, one from mii_ioctl and other from within update_stats while
  86. * processing MIIREG ioctl.
  87. */
  88. char e1000_driver_name[] = "e1000";
  89. static char e1000_driver_string[] = "Intel(R) PRO/1000 Network Driver";
  90. #ifndef CONFIG_E1000_NAPI
  91. #define DRIVERNAPI
  92. #else
  93. #define DRIVERNAPI "-NAPI"
  94. #endif
  95. #define DRV_VERSION "7.0.33-k2"DRIVERNAPI
  96. char e1000_driver_version[] = DRV_VERSION;
  97. static char e1000_copyright[] = "Copyright (c) 1999-2005 Intel Corporation.";
  98. /* e1000_pci_tbl - PCI Device ID Table
  99. *
  100. * Last entry must be all 0s
  101. *
  102. * Macro expands to...
  103. * {PCI_DEVICE(PCI_VENDOR_ID_INTEL, device_id)}
  104. */
  105. static struct pci_device_id e1000_pci_tbl[] = {
  106. INTEL_E1000_ETHERNET_DEVICE(0x1000),
  107. INTEL_E1000_ETHERNET_DEVICE(0x1001),
  108. INTEL_E1000_ETHERNET_DEVICE(0x1004),
  109. INTEL_E1000_ETHERNET_DEVICE(0x1008),
  110. INTEL_E1000_ETHERNET_DEVICE(0x1009),
  111. INTEL_E1000_ETHERNET_DEVICE(0x100C),
  112. INTEL_E1000_ETHERNET_DEVICE(0x100D),
  113. INTEL_E1000_ETHERNET_DEVICE(0x100E),
  114. INTEL_E1000_ETHERNET_DEVICE(0x100F),
  115. INTEL_E1000_ETHERNET_DEVICE(0x1010),
  116. INTEL_E1000_ETHERNET_DEVICE(0x1011),
  117. INTEL_E1000_ETHERNET_DEVICE(0x1012),
  118. INTEL_E1000_ETHERNET_DEVICE(0x1013),
  119. INTEL_E1000_ETHERNET_DEVICE(0x1014),
  120. INTEL_E1000_ETHERNET_DEVICE(0x1015),
  121. INTEL_E1000_ETHERNET_DEVICE(0x1016),
  122. INTEL_E1000_ETHERNET_DEVICE(0x1017),
  123. INTEL_E1000_ETHERNET_DEVICE(0x1018),
  124. INTEL_E1000_ETHERNET_DEVICE(0x1019),
  125. INTEL_E1000_ETHERNET_DEVICE(0x101A),
  126. INTEL_E1000_ETHERNET_DEVICE(0x101D),
  127. INTEL_E1000_ETHERNET_DEVICE(0x101E),
  128. INTEL_E1000_ETHERNET_DEVICE(0x1026),
  129. INTEL_E1000_ETHERNET_DEVICE(0x1027),
  130. INTEL_E1000_ETHERNET_DEVICE(0x1028),
  131. INTEL_E1000_ETHERNET_DEVICE(0x105E),
  132. INTEL_E1000_ETHERNET_DEVICE(0x105F),
  133. INTEL_E1000_ETHERNET_DEVICE(0x1060),
  134. INTEL_E1000_ETHERNET_DEVICE(0x1075),
  135. INTEL_E1000_ETHERNET_DEVICE(0x1076),
  136. INTEL_E1000_ETHERNET_DEVICE(0x1077),
  137. INTEL_E1000_ETHERNET_DEVICE(0x1078),
  138. INTEL_E1000_ETHERNET_DEVICE(0x1079),
  139. INTEL_E1000_ETHERNET_DEVICE(0x107A),
  140. INTEL_E1000_ETHERNET_DEVICE(0x107B),
  141. INTEL_E1000_ETHERNET_DEVICE(0x107C),
  142. INTEL_E1000_ETHERNET_DEVICE(0x107D),
  143. INTEL_E1000_ETHERNET_DEVICE(0x107E),
  144. INTEL_E1000_ETHERNET_DEVICE(0x107F),
  145. INTEL_E1000_ETHERNET_DEVICE(0x108A),
  146. INTEL_E1000_ETHERNET_DEVICE(0x108B),
  147. INTEL_E1000_ETHERNET_DEVICE(0x108C),
  148. INTEL_E1000_ETHERNET_DEVICE(0x1099),
  149. INTEL_E1000_ETHERNET_DEVICE(0x109A),
  150. INTEL_E1000_ETHERNET_DEVICE(0x10B5),
  151. /* required last entry */
  152. {0,}
  153. };
  154. MODULE_DEVICE_TABLE(pci, e1000_pci_tbl);
  155. int e1000_up(struct e1000_adapter *adapter);
  156. void e1000_down(struct e1000_adapter *adapter);
  157. void e1000_reset(struct e1000_adapter *adapter);
  158. int e1000_set_spd_dplx(struct e1000_adapter *adapter, uint16_t spddplx);
  159. int e1000_setup_all_tx_resources(struct e1000_adapter *adapter);
  160. int e1000_setup_all_rx_resources(struct e1000_adapter *adapter);
  161. void e1000_free_all_tx_resources(struct e1000_adapter *adapter);
  162. void e1000_free_all_rx_resources(struct e1000_adapter *adapter);
  163. static int e1000_setup_tx_resources(struct e1000_adapter *adapter,
  164. struct e1000_tx_ring *txdr);
  165. static int e1000_setup_rx_resources(struct e1000_adapter *adapter,
  166. struct e1000_rx_ring *rxdr);
  167. static void e1000_free_tx_resources(struct e1000_adapter *adapter,
  168. struct e1000_tx_ring *tx_ring);
  169. static void e1000_free_rx_resources(struct e1000_adapter *adapter,
  170. struct e1000_rx_ring *rx_ring);
  171. void e1000_update_stats(struct e1000_adapter *adapter);
  172. /* Local Function Prototypes */
  173. static int e1000_init_module(void);
  174. static void e1000_exit_module(void);
  175. static int e1000_probe(struct pci_dev *pdev, const struct pci_device_id *ent);
  176. static void __devexit e1000_remove(struct pci_dev *pdev);
  177. static int e1000_alloc_queues(struct e1000_adapter *adapter);
  178. static int e1000_sw_init(struct e1000_adapter *adapter);
  179. static int e1000_open(struct net_device *netdev);
  180. static int e1000_close(struct net_device *netdev);
  181. static void e1000_configure_tx(struct e1000_adapter *adapter);
  182. static void e1000_configure_rx(struct e1000_adapter *adapter);
  183. static void e1000_setup_rctl(struct e1000_adapter *adapter);
  184. static void e1000_clean_all_tx_rings(struct e1000_adapter *adapter);
  185. static void e1000_clean_all_rx_rings(struct e1000_adapter *adapter);
  186. static void e1000_clean_tx_ring(struct e1000_adapter *adapter,
  187. struct e1000_tx_ring *tx_ring);
  188. static void e1000_clean_rx_ring(struct e1000_adapter *adapter,
  189. struct e1000_rx_ring *rx_ring);
  190. static void e1000_set_multi(struct net_device *netdev);
  191. static void e1000_update_phy_info(unsigned long data);
  192. static void e1000_watchdog(unsigned long data);
  193. static void e1000_watchdog_task(struct e1000_adapter *adapter);
  194. static void e1000_82547_tx_fifo_stall(unsigned long data);
  195. static int e1000_xmit_frame(struct sk_buff *skb, struct net_device *netdev);
  196. static struct net_device_stats * e1000_get_stats(struct net_device *netdev);
  197. static int e1000_change_mtu(struct net_device *netdev, int new_mtu);
  198. static int e1000_set_mac(struct net_device *netdev, void *p);
  199. static irqreturn_t e1000_intr(int irq, void *data, struct pt_regs *regs);
  200. static boolean_t e1000_clean_tx_irq(struct e1000_adapter *adapter,
  201. struct e1000_tx_ring *tx_ring);
  202. #ifdef CONFIG_E1000_NAPI
  203. static int e1000_clean(struct net_device *poll_dev, int *budget);
  204. static boolean_t e1000_clean_rx_irq(struct e1000_adapter *adapter,
  205. struct e1000_rx_ring *rx_ring,
  206. int *work_done, int work_to_do);
  207. static boolean_t e1000_clean_rx_irq_ps(struct e1000_adapter *adapter,
  208. struct e1000_rx_ring *rx_ring,
  209. int *work_done, int work_to_do);
  210. #else
  211. static boolean_t e1000_clean_rx_irq(struct e1000_adapter *adapter,
  212. struct e1000_rx_ring *rx_ring);
  213. static boolean_t e1000_clean_rx_irq_ps(struct e1000_adapter *adapter,
  214. struct e1000_rx_ring *rx_ring);
  215. #endif
  216. static void e1000_alloc_rx_buffers(struct e1000_adapter *adapter,
  217. struct e1000_rx_ring *rx_ring,
  218. int cleaned_count);
  219. static void e1000_alloc_rx_buffers_ps(struct e1000_adapter *adapter,
  220. struct e1000_rx_ring *rx_ring,
  221. int cleaned_count);
  222. static int e1000_ioctl(struct net_device *netdev, struct ifreq *ifr, int cmd);
  223. static int e1000_mii_ioctl(struct net_device *netdev, struct ifreq *ifr,
  224. int cmd);
  225. void e1000_set_ethtool_ops(struct net_device *netdev);
  226. static void e1000_enter_82542_rst(struct e1000_adapter *adapter);
  227. static void e1000_leave_82542_rst(struct e1000_adapter *adapter);
  228. static void e1000_tx_timeout(struct net_device *dev);
  229. static void e1000_tx_timeout_task(struct net_device *dev);
  230. static void e1000_smartspeed(struct e1000_adapter *adapter);
  231. static inline int e1000_82547_fifo_workaround(struct e1000_adapter *adapter,
  232. struct sk_buff *skb);
  233. static void e1000_vlan_rx_register(struct net_device *netdev, struct vlan_group *grp);
  234. static void e1000_vlan_rx_add_vid(struct net_device *netdev, uint16_t vid);
  235. static void e1000_vlan_rx_kill_vid(struct net_device *netdev, uint16_t vid);
  236. static void e1000_restore_vlan(struct e1000_adapter *adapter);
  237. #ifdef CONFIG_PM
  238. static int e1000_suspend(struct pci_dev *pdev, pm_message_t state);
  239. static int e1000_resume(struct pci_dev *pdev);
  240. #endif
  241. #ifdef CONFIG_NET_POLL_CONTROLLER
  242. /* for netdump / net console */
  243. static void e1000_netpoll (struct net_device *netdev);
  244. #endif
  245. /* Exported from other modules */
  246. extern void e1000_check_options(struct e1000_adapter *adapter);
  247. static struct pci_driver e1000_driver = {
  248. .name = e1000_driver_name,
  249. .id_table = e1000_pci_tbl,
  250. .probe = e1000_probe,
  251. .remove = __devexit_p(e1000_remove),
  252. /* Power Managment Hooks */
  253. #ifdef CONFIG_PM
  254. .suspend = e1000_suspend,
  255. .resume = e1000_resume
  256. #endif
  257. };
  258. MODULE_AUTHOR("Intel Corporation, <linux.nics@intel.com>");
  259. MODULE_DESCRIPTION("Intel(R) PRO/1000 Network Driver");
  260. MODULE_LICENSE("GPL");
  261. MODULE_VERSION(DRV_VERSION);
  262. static int debug = NETIF_MSG_DRV | NETIF_MSG_PROBE;
  263. module_param(debug, int, 0);
  264. MODULE_PARM_DESC(debug, "Debug level (0=none,...,16=all)");
  265. /**
  266. * e1000_init_module - Driver Registration Routine
  267. *
  268. * e1000_init_module is the first routine called when the driver is
  269. * loaded. All it does is register with the PCI subsystem.
  270. **/
  271. static int __init
  272. e1000_init_module(void)
  273. {
  274. int ret;
  275. printk(KERN_INFO "%s - version %s\n",
  276. e1000_driver_string, e1000_driver_version);
  277. printk(KERN_INFO "%s\n", e1000_copyright);
  278. ret = pci_module_init(&e1000_driver);
  279. return ret;
  280. }
  281. module_init(e1000_init_module);
  282. /**
  283. * e1000_exit_module - Driver Exit Cleanup Routine
  284. *
  285. * e1000_exit_module is called just before the driver is removed
  286. * from memory.
  287. **/
  288. static void __exit
  289. e1000_exit_module(void)
  290. {
  291. pci_unregister_driver(&e1000_driver);
  292. }
  293. module_exit(e1000_exit_module);
  294. /**
  295. * e1000_irq_disable - Mask off interrupt generation on the NIC
  296. * @adapter: board private structure
  297. **/
  298. static inline void
  299. e1000_irq_disable(struct e1000_adapter *adapter)
  300. {
  301. atomic_inc(&adapter->irq_sem);
  302. E1000_WRITE_REG(&adapter->hw, IMC, ~0);
  303. E1000_WRITE_FLUSH(&adapter->hw);
  304. synchronize_irq(adapter->pdev->irq);
  305. }
  306. /**
  307. * e1000_irq_enable - Enable default interrupt generation settings
  308. * @adapter: board private structure
  309. **/
  310. static inline void
  311. e1000_irq_enable(struct e1000_adapter *adapter)
  312. {
  313. if (likely(atomic_dec_and_test(&adapter->irq_sem))) {
  314. E1000_WRITE_REG(&adapter->hw, IMS, IMS_ENABLE_MASK);
  315. E1000_WRITE_FLUSH(&adapter->hw);
  316. }
  317. }
  318. static void
  319. e1000_update_mng_vlan(struct e1000_adapter *adapter)
  320. {
  321. struct net_device *netdev = adapter->netdev;
  322. uint16_t vid = adapter->hw.mng_cookie.vlan_id;
  323. uint16_t old_vid = adapter->mng_vlan_id;
  324. if (adapter->vlgrp) {
  325. if (!adapter->vlgrp->vlan_devices[vid]) {
  326. if (adapter->hw.mng_cookie.status &
  327. E1000_MNG_DHCP_COOKIE_STATUS_VLAN_SUPPORT) {
  328. e1000_vlan_rx_add_vid(netdev, vid);
  329. adapter->mng_vlan_id = vid;
  330. } else
  331. adapter->mng_vlan_id = E1000_MNG_VLAN_NONE;
  332. if ((old_vid != (uint16_t)E1000_MNG_VLAN_NONE) &&
  333. (vid != old_vid) &&
  334. !adapter->vlgrp->vlan_devices[old_vid])
  335. e1000_vlan_rx_kill_vid(netdev, old_vid);
  336. }
  337. }
  338. }
  339. /**
  340. * e1000_release_hw_control - release control of the h/w to f/w
  341. * @adapter: address of board private structure
  342. *
  343. * e1000_release_hw_control resets {CTRL_EXT|FWSM}:DRV_LOAD bit.
  344. * For ASF and Pass Through versions of f/w this means that the
  345. * driver is no longer loaded. For AMT version (only with 82573) i
  346. * of the f/w this means that the netowrk i/f is closed.
  347. *
  348. **/
  349. static inline void
  350. e1000_release_hw_control(struct e1000_adapter *adapter)
  351. {
  352. uint32_t ctrl_ext;
  353. uint32_t swsm;
  354. /* Let firmware taken over control of h/w */
  355. switch (adapter->hw.mac_type) {
  356. case e1000_82571:
  357. case e1000_82572:
  358. ctrl_ext = E1000_READ_REG(&adapter->hw, CTRL_EXT);
  359. E1000_WRITE_REG(&adapter->hw, CTRL_EXT,
  360. ctrl_ext & ~E1000_CTRL_EXT_DRV_LOAD);
  361. break;
  362. case e1000_82573:
  363. swsm = E1000_READ_REG(&adapter->hw, SWSM);
  364. E1000_WRITE_REG(&adapter->hw, SWSM,
  365. swsm & ~E1000_SWSM_DRV_LOAD);
  366. default:
  367. break;
  368. }
  369. }
  370. /**
  371. * e1000_get_hw_control - get control of the h/w from f/w
  372. * @adapter: address of board private structure
  373. *
  374. * e1000_get_hw_control sets {CTRL_EXT|FWSM}:DRV_LOAD bit.
  375. * For ASF and Pass Through versions of f/w this means that
  376. * the driver is loaded. For AMT version (only with 82573)
  377. * of the f/w this means that the netowrk i/f is open.
  378. *
  379. **/
  380. static inline void
  381. e1000_get_hw_control(struct e1000_adapter *adapter)
  382. {
  383. uint32_t ctrl_ext;
  384. uint32_t swsm;
  385. /* Let firmware know the driver has taken over */
  386. switch (adapter->hw.mac_type) {
  387. case e1000_82571:
  388. case e1000_82572:
  389. ctrl_ext = E1000_READ_REG(&adapter->hw, CTRL_EXT);
  390. E1000_WRITE_REG(&adapter->hw, CTRL_EXT,
  391. ctrl_ext | E1000_CTRL_EXT_DRV_LOAD);
  392. break;
  393. case e1000_82573:
  394. swsm = E1000_READ_REG(&adapter->hw, SWSM);
  395. E1000_WRITE_REG(&adapter->hw, SWSM,
  396. swsm | E1000_SWSM_DRV_LOAD);
  397. break;
  398. default:
  399. break;
  400. }
  401. }
  402. int
  403. e1000_up(struct e1000_adapter *adapter)
  404. {
  405. struct net_device *netdev = adapter->netdev;
  406. int i, err;
  407. /* hardware has been reset, we need to reload some things */
  408. /* Reset the PHY if it was previously powered down */
  409. if (adapter->hw.media_type == e1000_media_type_copper) {
  410. uint16_t mii_reg;
  411. e1000_read_phy_reg(&adapter->hw, PHY_CTRL, &mii_reg);
  412. if (mii_reg & MII_CR_POWER_DOWN)
  413. e1000_phy_reset(&adapter->hw);
  414. }
  415. e1000_set_multi(netdev);
  416. e1000_restore_vlan(adapter);
  417. e1000_configure_tx(adapter);
  418. e1000_setup_rctl(adapter);
  419. e1000_configure_rx(adapter);
  420. /* call E1000_DESC_UNUSED which always leaves
  421. * at least 1 descriptor unused to make sure
  422. * next_to_use != next_to_clean */
  423. for (i = 0; i < adapter->num_rx_queues; i++) {
  424. struct e1000_rx_ring *ring = &adapter->rx_ring[i];
  425. adapter->alloc_rx_buf(adapter, ring,
  426. E1000_DESC_UNUSED(ring));
  427. }
  428. #ifdef CONFIG_PCI_MSI
  429. if (adapter->hw.mac_type > e1000_82547_rev_2) {
  430. adapter->have_msi = TRUE;
  431. if ((err = pci_enable_msi(adapter->pdev))) {
  432. DPRINTK(PROBE, ERR,
  433. "Unable to allocate MSI interrupt Error: %d\n", err);
  434. adapter->have_msi = FALSE;
  435. }
  436. }
  437. #endif
  438. if ((err = request_irq(adapter->pdev->irq, &e1000_intr,
  439. SA_SHIRQ | SA_SAMPLE_RANDOM,
  440. netdev->name, netdev))) {
  441. DPRINTK(PROBE, ERR,
  442. "Unable to allocate interrupt Error: %d\n", err);
  443. return err;
  444. }
  445. adapter->tx_queue_len = netdev->tx_queue_len;
  446. mod_timer(&adapter->watchdog_timer, jiffies);
  447. #ifdef CONFIG_E1000_NAPI
  448. netif_poll_enable(netdev);
  449. #endif
  450. e1000_irq_enable(adapter);
  451. return 0;
  452. }
  453. void
  454. e1000_down(struct e1000_adapter *adapter)
  455. {
  456. struct net_device *netdev = adapter->netdev;
  457. boolean_t mng_mode_enabled = (adapter->hw.mac_type >= e1000_82571) &&
  458. e1000_check_mng_mode(&adapter->hw);
  459. e1000_irq_disable(adapter);
  460. free_irq(adapter->pdev->irq, netdev);
  461. #ifdef CONFIG_PCI_MSI
  462. if (adapter->hw.mac_type > e1000_82547_rev_2 &&
  463. adapter->have_msi == TRUE)
  464. pci_disable_msi(adapter->pdev);
  465. #endif
  466. del_timer_sync(&adapter->tx_fifo_stall_timer);
  467. del_timer_sync(&adapter->watchdog_timer);
  468. del_timer_sync(&adapter->phy_info_timer);
  469. #ifdef CONFIG_E1000_NAPI
  470. netif_poll_disable(netdev);
  471. #endif
  472. netdev->tx_queue_len = adapter->tx_queue_len;
  473. adapter->link_speed = 0;
  474. adapter->link_duplex = 0;
  475. netif_carrier_off(netdev);
  476. netif_stop_queue(netdev);
  477. e1000_reset(adapter);
  478. e1000_clean_all_tx_rings(adapter);
  479. e1000_clean_all_rx_rings(adapter);
  480. /* Power down the PHY so no link is implied when interface is down *
  481. * The PHY cannot be powered down if any of the following is TRUE *
  482. * (a) WoL is enabled
  483. * (b) AMT is active
  484. * (c) SoL/IDER session is active */
  485. if (!adapter->wol && adapter->hw.mac_type >= e1000_82540 &&
  486. adapter->hw.media_type == e1000_media_type_copper &&
  487. !(E1000_READ_REG(&adapter->hw, MANC) & E1000_MANC_SMBUS_EN) &&
  488. !mng_mode_enabled &&
  489. !e1000_check_phy_reset_block(&adapter->hw)) {
  490. uint16_t mii_reg;
  491. e1000_read_phy_reg(&adapter->hw, PHY_CTRL, &mii_reg);
  492. mii_reg |= MII_CR_POWER_DOWN;
  493. e1000_write_phy_reg(&adapter->hw, PHY_CTRL, mii_reg);
  494. mdelay(1);
  495. }
  496. }
  497. void
  498. e1000_reset(struct e1000_adapter *adapter)
  499. {
  500. uint32_t pba, manc;
  501. uint16_t fc_high_water_mark = E1000_FC_HIGH_DIFF;
  502. /* Repartition Pba for greater than 9k mtu
  503. * To take effect CTRL.RST is required.
  504. */
  505. switch (adapter->hw.mac_type) {
  506. case e1000_82547:
  507. case e1000_82547_rev_2:
  508. pba = E1000_PBA_30K;
  509. break;
  510. case e1000_82571:
  511. case e1000_82572:
  512. pba = E1000_PBA_38K;
  513. break;
  514. case e1000_82573:
  515. pba = E1000_PBA_12K;
  516. break;
  517. default:
  518. pba = E1000_PBA_48K;
  519. break;
  520. }
  521. if ((adapter->hw.mac_type != e1000_82573) &&
  522. (adapter->netdev->mtu > E1000_RXBUFFER_8192))
  523. pba -= 8; /* allocate more FIFO for Tx */
  524. if (adapter->hw.mac_type == e1000_82547) {
  525. adapter->tx_fifo_head = 0;
  526. adapter->tx_head_addr = pba << E1000_TX_HEAD_ADDR_SHIFT;
  527. adapter->tx_fifo_size =
  528. (E1000_PBA_40K - pba) << E1000_PBA_BYTES_SHIFT;
  529. atomic_set(&adapter->tx_fifo_stall, 0);
  530. }
  531. E1000_WRITE_REG(&adapter->hw, PBA, pba);
  532. /* flow control settings */
  533. /* Set the FC high water mark to 90% of the FIFO size.
  534. * Required to clear last 3 LSB */
  535. fc_high_water_mark = ((pba * 9216)/10) & 0xFFF8;
  536. adapter->hw.fc_high_water = fc_high_water_mark;
  537. adapter->hw.fc_low_water = fc_high_water_mark - 8;
  538. adapter->hw.fc_pause_time = E1000_FC_PAUSE_TIME;
  539. adapter->hw.fc_send_xon = 1;
  540. adapter->hw.fc = adapter->hw.original_fc;
  541. /* Allow time for pending master requests to run */
  542. e1000_reset_hw(&adapter->hw);
  543. if (adapter->hw.mac_type >= e1000_82544)
  544. E1000_WRITE_REG(&adapter->hw, WUC, 0);
  545. if (e1000_init_hw(&adapter->hw))
  546. DPRINTK(PROBE, ERR, "Hardware Error\n");
  547. e1000_update_mng_vlan(adapter);
  548. /* Enable h/w to recognize an 802.1Q VLAN Ethernet packet */
  549. E1000_WRITE_REG(&adapter->hw, VET, ETHERNET_IEEE_VLAN_TYPE);
  550. e1000_reset_adaptive(&adapter->hw);
  551. e1000_phy_get_info(&adapter->hw, &adapter->phy_info);
  552. if (adapter->en_mng_pt) {
  553. manc = E1000_READ_REG(&adapter->hw, MANC);
  554. manc |= (E1000_MANC_ARP_EN | E1000_MANC_EN_MNG2HOST);
  555. E1000_WRITE_REG(&adapter->hw, MANC, manc);
  556. }
  557. }
  558. /**
  559. * e1000_probe - Device Initialization Routine
  560. * @pdev: PCI device information struct
  561. * @ent: entry in e1000_pci_tbl
  562. *
  563. * Returns 0 on success, negative on failure
  564. *
  565. * e1000_probe initializes an adapter identified by a pci_dev structure.
  566. * The OS initialization, configuring of the adapter private structure,
  567. * and a hardware reset occur.
  568. **/
  569. static int __devinit
  570. e1000_probe(struct pci_dev *pdev,
  571. const struct pci_device_id *ent)
  572. {
  573. struct net_device *netdev;
  574. struct e1000_adapter *adapter;
  575. unsigned long mmio_start, mmio_len;
  576. static int cards_found = 0;
  577. int i, err, pci_using_dac;
  578. uint16_t eeprom_data;
  579. uint16_t eeprom_apme_mask = E1000_EEPROM_APME;
  580. if ((err = pci_enable_device(pdev)))
  581. return err;
  582. if (!(err = pci_set_dma_mask(pdev, DMA_64BIT_MASK))) {
  583. pci_using_dac = 1;
  584. } else {
  585. if ((err = pci_set_dma_mask(pdev, DMA_32BIT_MASK))) {
  586. E1000_ERR("No usable DMA configuration, aborting\n");
  587. return err;
  588. }
  589. pci_using_dac = 0;
  590. }
  591. if ((err = pci_request_regions(pdev, e1000_driver_name)))
  592. return err;
  593. pci_set_master(pdev);
  594. netdev = alloc_etherdev(sizeof(struct e1000_adapter));
  595. if (!netdev) {
  596. err = -ENOMEM;
  597. goto err_alloc_etherdev;
  598. }
  599. SET_MODULE_OWNER(netdev);
  600. SET_NETDEV_DEV(netdev, &pdev->dev);
  601. pci_set_drvdata(pdev, netdev);
  602. adapter = netdev_priv(netdev);
  603. adapter->netdev = netdev;
  604. adapter->pdev = pdev;
  605. adapter->hw.back = adapter;
  606. adapter->msg_enable = (1 << debug) - 1;
  607. mmio_start = pci_resource_start(pdev, BAR_0);
  608. mmio_len = pci_resource_len(pdev, BAR_0);
  609. adapter->hw.hw_addr = ioremap(mmio_start, mmio_len);
  610. if (!adapter->hw.hw_addr) {
  611. err = -EIO;
  612. goto err_ioremap;
  613. }
  614. for (i = BAR_1; i <= BAR_5; i++) {
  615. if (pci_resource_len(pdev, i) == 0)
  616. continue;
  617. if (pci_resource_flags(pdev, i) & IORESOURCE_IO) {
  618. adapter->hw.io_base = pci_resource_start(pdev, i);
  619. break;
  620. }
  621. }
  622. netdev->open = &e1000_open;
  623. netdev->stop = &e1000_close;
  624. netdev->hard_start_xmit = &e1000_xmit_frame;
  625. netdev->get_stats = &e1000_get_stats;
  626. netdev->set_multicast_list = &e1000_set_multi;
  627. netdev->set_mac_address = &e1000_set_mac;
  628. netdev->change_mtu = &e1000_change_mtu;
  629. netdev->do_ioctl = &e1000_ioctl;
  630. e1000_set_ethtool_ops(netdev);
  631. netdev->tx_timeout = &e1000_tx_timeout;
  632. netdev->watchdog_timeo = 5 * HZ;
  633. #ifdef CONFIG_E1000_NAPI
  634. netdev->poll = &e1000_clean;
  635. netdev->weight = 64;
  636. #endif
  637. netdev->vlan_rx_register = e1000_vlan_rx_register;
  638. netdev->vlan_rx_add_vid = e1000_vlan_rx_add_vid;
  639. netdev->vlan_rx_kill_vid = e1000_vlan_rx_kill_vid;
  640. #ifdef CONFIG_NET_POLL_CONTROLLER
  641. netdev->poll_controller = e1000_netpoll;
  642. #endif
  643. strcpy(netdev->name, pci_name(pdev));
  644. netdev->mem_start = mmio_start;
  645. netdev->mem_end = mmio_start + mmio_len;
  646. netdev->base_addr = adapter->hw.io_base;
  647. adapter->bd_number = cards_found;
  648. /* setup the private structure */
  649. if ((err = e1000_sw_init(adapter)))
  650. goto err_sw_init;
  651. if ((err = e1000_check_phy_reset_block(&adapter->hw)))
  652. DPRINTK(PROBE, INFO, "PHY reset is blocked due to SOL/IDER session.\n");
  653. if (adapter->hw.mac_type >= e1000_82543) {
  654. netdev->features = NETIF_F_SG |
  655. NETIF_F_HW_CSUM |
  656. NETIF_F_HW_VLAN_TX |
  657. NETIF_F_HW_VLAN_RX |
  658. NETIF_F_HW_VLAN_FILTER;
  659. }
  660. #ifdef NETIF_F_TSO
  661. if ((adapter->hw.mac_type >= e1000_82544) &&
  662. (adapter->hw.mac_type != e1000_82547))
  663. netdev->features |= NETIF_F_TSO;
  664. #ifdef NETIF_F_TSO_IPV6
  665. if (adapter->hw.mac_type > e1000_82547_rev_2)
  666. netdev->features |= NETIF_F_TSO_IPV6;
  667. #endif
  668. #endif
  669. if (pci_using_dac)
  670. netdev->features |= NETIF_F_HIGHDMA;
  671. /* hard_start_xmit is safe against parallel locking */
  672. netdev->features |= NETIF_F_LLTX;
  673. adapter->en_mng_pt = e1000_enable_mng_pass_thru(&adapter->hw);
  674. /* before reading the EEPROM, reset the controller to
  675. * put the device in a known good starting state */
  676. e1000_reset_hw(&adapter->hw);
  677. /* make sure the EEPROM is good */
  678. if (e1000_validate_eeprom_checksum(&adapter->hw) < 0) {
  679. DPRINTK(PROBE, ERR, "The EEPROM Checksum Is Not Valid\n");
  680. err = -EIO;
  681. goto err_eeprom;
  682. }
  683. /* copy the MAC address out of the EEPROM */
  684. if (e1000_read_mac_addr(&adapter->hw))
  685. DPRINTK(PROBE, ERR, "EEPROM Read Error\n");
  686. memcpy(netdev->dev_addr, adapter->hw.mac_addr, netdev->addr_len);
  687. memcpy(netdev->perm_addr, adapter->hw.mac_addr, netdev->addr_len);
  688. if (!is_valid_ether_addr(netdev->perm_addr)) {
  689. DPRINTK(PROBE, ERR, "Invalid MAC Address\n");
  690. err = -EIO;
  691. goto err_eeprom;
  692. }
  693. e1000_read_part_num(&adapter->hw, &(adapter->part_num));
  694. e1000_get_bus_info(&adapter->hw);
  695. init_timer(&adapter->tx_fifo_stall_timer);
  696. adapter->tx_fifo_stall_timer.function = &e1000_82547_tx_fifo_stall;
  697. adapter->tx_fifo_stall_timer.data = (unsigned long) adapter;
  698. init_timer(&adapter->watchdog_timer);
  699. adapter->watchdog_timer.function = &e1000_watchdog;
  700. adapter->watchdog_timer.data = (unsigned long) adapter;
  701. INIT_WORK(&adapter->watchdog_task,
  702. (void (*)(void *))e1000_watchdog_task, adapter);
  703. init_timer(&adapter->phy_info_timer);
  704. adapter->phy_info_timer.function = &e1000_update_phy_info;
  705. adapter->phy_info_timer.data = (unsigned long) adapter;
  706. INIT_WORK(&adapter->tx_timeout_task,
  707. (void (*)(void *))e1000_tx_timeout_task, netdev);
  708. /* we're going to reset, so assume we have no link for now */
  709. netif_carrier_off(netdev);
  710. netif_stop_queue(netdev);
  711. e1000_check_options(adapter);
  712. /* Initial Wake on LAN setting
  713. * If APM wake is enabled in the EEPROM,
  714. * enable the ACPI Magic Packet filter
  715. */
  716. switch (adapter->hw.mac_type) {
  717. case e1000_82542_rev2_0:
  718. case e1000_82542_rev2_1:
  719. case e1000_82543:
  720. break;
  721. case e1000_82544:
  722. e1000_read_eeprom(&adapter->hw,
  723. EEPROM_INIT_CONTROL2_REG, 1, &eeprom_data);
  724. eeprom_apme_mask = E1000_EEPROM_82544_APM;
  725. break;
  726. case e1000_82546:
  727. case e1000_82546_rev_3:
  728. case e1000_82571:
  729. if (E1000_READ_REG(&adapter->hw, STATUS) & E1000_STATUS_FUNC_1){
  730. e1000_read_eeprom(&adapter->hw,
  731. EEPROM_INIT_CONTROL3_PORT_B, 1, &eeprom_data);
  732. break;
  733. }
  734. /* Fall Through */
  735. default:
  736. e1000_read_eeprom(&adapter->hw,
  737. EEPROM_INIT_CONTROL3_PORT_A, 1, &eeprom_data);
  738. break;
  739. }
  740. if (eeprom_data & eeprom_apme_mask)
  741. adapter->wol |= E1000_WUFC_MAG;
  742. /* print bus type/speed/width info */
  743. {
  744. struct e1000_hw *hw = &adapter->hw;
  745. DPRINTK(PROBE, INFO, "(PCI%s:%s:%s) ",
  746. ((hw->bus_type == e1000_bus_type_pcix) ? "-X" :
  747. (hw->bus_type == e1000_bus_type_pci_express ? " Express":"")),
  748. ((hw->bus_speed == e1000_bus_speed_2500) ? "2.5Gb/s" :
  749. (hw->bus_speed == e1000_bus_speed_133) ? "133MHz" :
  750. (hw->bus_speed == e1000_bus_speed_120) ? "120MHz" :
  751. (hw->bus_speed == e1000_bus_speed_100) ? "100MHz" :
  752. (hw->bus_speed == e1000_bus_speed_66) ? "66MHz" : "33MHz"),
  753. ((hw->bus_width == e1000_bus_width_64) ? "64-bit" :
  754. (hw->bus_width == e1000_bus_width_pciex_4) ? "Width x4" :
  755. (hw->bus_width == e1000_bus_width_pciex_1) ? "Width x1" :
  756. "32-bit"));
  757. }
  758. for (i = 0; i < 6; i++)
  759. printk("%2.2x%c", netdev->dev_addr[i], i == 5 ? '\n' : ':');
  760. /* reset the hardware with the new settings */
  761. e1000_reset(adapter);
  762. /* If the controller is 82573 and f/w is AMT, do not set
  763. * DRV_LOAD until the interface is up. For all other cases,
  764. * let the f/w know that the h/w is now under the control
  765. * of the driver. */
  766. if (adapter->hw.mac_type != e1000_82573 ||
  767. !e1000_check_mng_mode(&adapter->hw))
  768. e1000_get_hw_control(adapter);
  769. strcpy(netdev->name, "eth%d");
  770. if ((err = register_netdev(netdev)))
  771. goto err_register;
  772. DPRINTK(PROBE, INFO, "Intel(R) PRO/1000 Network Connection\n");
  773. cards_found++;
  774. return 0;
  775. err_register:
  776. err_sw_init:
  777. err_eeprom:
  778. iounmap(adapter->hw.hw_addr);
  779. err_ioremap:
  780. free_netdev(netdev);
  781. err_alloc_etherdev:
  782. pci_release_regions(pdev);
  783. return err;
  784. }
  785. /**
  786. * e1000_remove - Device Removal Routine
  787. * @pdev: PCI device information struct
  788. *
  789. * e1000_remove is called by the PCI subsystem to alert the driver
  790. * that it should release a PCI device. The could be caused by a
  791. * Hot-Plug event, or because the driver is going to be removed from
  792. * memory.
  793. **/
  794. static void __devexit
  795. e1000_remove(struct pci_dev *pdev)
  796. {
  797. struct net_device *netdev = pci_get_drvdata(pdev);
  798. struct e1000_adapter *adapter = netdev_priv(netdev);
  799. uint32_t manc;
  800. #ifdef CONFIG_E1000_NAPI
  801. int i;
  802. #endif
  803. flush_scheduled_work();
  804. if (adapter->hw.mac_type >= e1000_82540 &&
  805. adapter->hw.media_type == e1000_media_type_copper) {
  806. manc = E1000_READ_REG(&adapter->hw, MANC);
  807. if (manc & E1000_MANC_SMBUS_EN) {
  808. manc |= E1000_MANC_ARP_EN;
  809. E1000_WRITE_REG(&adapter->hw, MANC, manc);
  810. }
  811. }
  812. /* Release control of h/w to f/w. If f/w is AMT enabled, this
  813. * would have already happened in close and is redundant. */
  814. e1000_release_hw_control(adapter);
  815. unregister_netdev(netdev);
  816. #ifdef CONFIG_E1000_NAPI
  817. for (i = 0; i < adapter->num_rx_queues; i++)
  818. __dev_put(&adapter->polling_netdev[i]);
  819. #endif
  820. if (!e1000_check_phy_reset_block(&adapter->hw))
  821. e1000_phy_hw_reset(&adapter->hw);
  822. kfree(adapter->tx_ring);
  823. kfree(adapter->rx_ring);
  824. #ifdef CONFIG_E1000_NAPI
  825. kfree(adapter->polling_netdev);
  826. #endif
  827. iounmap(adapter->hw.hw_addr);
  828. pci_release_regions(pdev);
  829. free_netdev(netdev);
  830. pci_disable_device(pdev);
  831. }
  832. /**
  833. * e1000_sw_init - Initialize general software structures (struct e1000_adapter)
  834. * @adapter: board private structure to initialize
  835. *
  836. * e1000_sw_init initializes the Adapter private data structure.
  837. * Fields are initialized based on PCI device information and
  838. * OS network device settings (MTU size).
  839. **/
  840. static int __devinit
  841. e1000_sw_init(struct e1000_adapter *adapter)
  842. {
  843. struct e1000_hw *hw = &adapter->hw;
  844. struct net_device *netdev = adapter->netdev;
  845. struct pci_dev *pdev = adapter->pdev;
  846. #ifdef CONFIG_E1000_NAPI
  847. int i;
  848. #endif
  849. /* PCI config space info */
  850. hw->vendor_id = pdev->vendor;
  851. hw->device_id = pdev->device;
  852. hw->subsystem_vendor_id = pdev->subsystem_vendor;
  853. hw->subsystem_id = pdev->subsystem_device;
  854. pci_read_config_byte(pdev, PCI_REVISION_ID, &hw->revision_id);
  855. pci_read_config_word(pdev, PCI_COMMAND, &hw->pci_cmd_word);
  856. adapter->rx_buffer_len = E1000_RXBUFFER_2048;
  857. adapter->rx_ps_bsize0 = E1000_RXBUFFER_256;
  858. hw->max_frame_size = netdev->mtu +
  859. ENET_HEADER_SIZE + ETHERNET_FCS_SIZE;
  860. hw->min_frame_size = MINIMUM_ETHERNET_FRAME_SIZE;
  861. /* identify the MAC */
  862. if (e1000_set_mac_type(hw)) {
  863. DPRINTK(PROBE, ERR, "Unknown MAC Type\n");
  864. return -EIO;
  865. }
  866. /* initialize eeprom parameters */
  867. if (e1000_init_eeprom_params(hw)) {
  868. E1000_ERR("EEPROM initialization failed\n");
  869. return -EIO;
  870. }
  871. switch (hw->mac_type) {
  872. default:
  873. break;
  874. case e1000_82541:
  875. case e1000_82547:
  876. case e1000_82541_rev_2:
  877. case e1000_82547_rev_2:
  878. hw->phy_init_script = 1;
  879. break;
  880. }
  881. e1000_set_media_type(hw);
  882. hw->wait_autoneg_complete = FALSE;
  883. hw->tbi_compatibility_en = TRUE;
  884. hw->adaptive_ifs = TRUE;
  885. /* Copper options */
  886. if (hw->media_type == e1000_media_type_copper) {
  887. hw->mdix = AUTO_ALL_MODES;
  888. hw->disable_polarity_correction = FALSE;
  889. hw->master_slave = E1000_MASTER_SLAVE;
  890. }
  891. adapter->num_tx_queues = 1;
  892. adapter->num_rx_queues = 1;
  893. if (e1000_alloc_queues(adapter)) {
  894. DPRINTK(PROBE, ERR, "Unable to allocate memory for queues\n");
  895. return -ENOMEM;
  896. }
  897. #ifdef CONFIG_E1000_NAPI
  898. for (i = 0; i < adapter->num_rx_queues; i++) {
  899. adapter->polling_netdev[i].priv = adapter;
  900. adapter->polling_netdev[i].poll = &e1000_clean;
  901. adapter->polling_netdev[i].weight = 64;
  902. dev_hold(&adapter->polling_netdev[i]);
  903. set_bit(__LINK_STATE_START, &adapter->polling_netdev[i].state);
  904. }
  905. spin_lock_init(&adapter->tx_queue_lock);
  906. #endif
  907. atomic_set(&adapter->irq_sem, 1);
  908. spin_lock_init(&adapter->stats_lock);
  909. return 0;
  910. }
  911. /**
  912. * e1000_alloc_queues - Allocate memory for all rings
  913. * @adapter: board private structure to initialize
  914. *
  915. * We allocate one ring per queue at run-time since we don't know the
  916. * number of queues at compile-time. The polling_netdev array is
  917. * intended for Multiqueue, but should work fine with a single queue.
  918. **/
  919. static int __devinit
  920. e1000_alloc_queues(struct e1000_adapter *adapter)
  921. {
  922. int size;
  923. size = sizeof(struct e1000_tx_ring) * adapter->num_tx_queues;
  924. adapter->tx_ring = kmalloc(size, GFP_KERNEL);
  925. if (!adapter->tx_ring)
  926. return -ENOMEM;
  927. memset(adapter->tx_ring, 0, size);
  928. size = sizeof(struct e1000_rx_ring) * adapter->num_rx_queues;
  929. adapter->rx_ring = kmalloc(size, GFP_KERNEL);
  930. if (!adapter->rx_ring) {
  931. kfree(adapter->tx_ring);
  932. return -ENOMEM;
  933. }
  934. memset(adapter->rx_ring, 0, size);
  935. #ifdef CONFIG_E1000_NAPI
  936. size = sizeof(struct net_device) * adapter->num_rx_queues;
  937. adapter->polling_netdev = kmalloc(size, GFP_KERNEL);
  938. if (!adapter->polling_netdev) {
  939. kfree(adapter->tx_ring);
  940. kfree(adapter->rx_ring);
  941. return -ENOMEM;
  942. }
  943. memset(adapter->polling_netdev, 0, size);
  944. #endif
  945. return E1000_SUCCESS;
  946. }
  947. /**
  948. * e1000_open - Called when a network interface is made active
  949. * @netdev: network interface device structure
  950. *
  951. * Returns 0 on success, negative value on failure
  952. *
  953. * The open entry point is called when a network interface is made
  954. * active by the system (IFF_UP). At this point all resources needed
  955. * for transmit and receive operations are allocated, the interrupt
  956. * handler is registered with the OS, the watchdog timer is started,
  957. * and the stack is notified that the interface is ready.
  958. **/
  959. static int
  960. e1000_open(struct net_device *netdev)
  961. {
  962. struct e1000_adapter *adapter = netdev_priv(netdev);
  963. int err;
  964. /* allocate transmit descriptors */
  965. if ((err = e1000_setup_all_tx_resources(adapter)))
  966. goto err_setup_tx;
  967. /* allocate receive descriptors */
  968. if ((err = e1000_setup_all_rx_resources(adapter)))
  969. goto err_setup_rx;
  970. if ((err = e1000_up(adapter)))
  971. goto err_up;
  972. adapter->mng_vlan_id = E1000_MNG_VLAN_NONE;
  973. if ((adapter->hw.mng_cookie.status &
  974. E1000_MNG_DHCP_COOKIE_STATUS_VLAN_SUPPORT)) {
  975. e1000_update_mng_vlan(adapter);
  976. }
  977. /* If AMT is enabled, let the firmware know that the network
  978. * interface is now open */
  979. if (adapter->hw.mac_type == e1000_82573 &&
  980. e1000_check_mng_mode(&adapter->hw))
  981. e1000_get_hw_control(adapter);
  982. return E1000_SUCCESS;
  983. err_up:
  984. e1000_free_all_rx_resources(adapter);
  985. err_setup_rx:
  986. e1000_free_all_tx_resources(adapter);
  987. err_setup_tx:
  988. e1000_reset(adapter);
  989. return err;
  990. }
  991. /**
  992. * e1000_close - Disables a network interface
  993. * @netdev: network interface device structure
  994. *
  995. * Returns 0, this is not allowed to fail
  996. *
  997. * The close entry point is called when an interface is de-activated
  998. * by the OS. The hardware is still under the drivers control, but
  999. * needs to be disabled. A global MAC reset is issued to stop the
  1000. * hardware, and all transmit and receive resources are freed.
  1001. **/
  1002. static int
  1003. e1000_close(struct net_device *netdev)
  1004. {
  1005. struct e1000_adapter *adapter = netdev_priv(netdev);
  1006. e1000_down(adapter);
  1007. e1000_free_all_tx_resources(adapter);
  1008. e1000_free_all_rx_resources(adapter);
  1009. if ((adapter->hw.mng_cookie.status &
  1010. E1000_MNG_DHCP_COOKIE_STATUS_VLAN_SUPPORT)) {
  1011. e1000_vlan_rx_kill_vid(netdev, adapter->mng_vlan_id);
  1012. }
  1013. /* If AMT is enabled, let the firmware know that the network
  1014. * interface is now closed */
  1015. if (adapter->hw.mac_type == e1000_82573 &&
  1016. e1000_check_mng_mode(&adapter->hw))
  1017. e1000_release_hw_control(adapter);
  1018. return 0;
  1019. }
  1020. /**
  1021. * e1000_check_64k_bound - check that memory doesn't cross 64kB boundary
  1022. * @adapter: address of board private structure
  1023. * @start: address of beginning of memory
  1024. * @len: length of memory
  1025. **/
  1026. static inline boolean_t
  1027. e1000_check_64k_bound(struct e1000_adapter *adapter,
  1028. void *start, unsigned long len)
  1029. {
  1030. unsigned long begin = (unsigned long) start;
  1031. unsigned long end = begin + len;
  1032. /* First rev 82545 and 82546 need to not allow any memory
  1033. * write location to cross 64k boundary due to errata 23 */
  1034. if (adapter->hw.mac_type == e1000_82545 ||
  1035. adapter->hw.mac_type == e1000_82546) {
  1036. return ((begin ^ (end - 1)) >> 16) != 0 ? FALSE : TRUE;
  1037. }
  1038. return TRUE;
  1039. }
  1040. /**
  1041. * e1000_setup_tx_resources - allocate Tx resources (Descriptors)
  1042. * @adapter: board private structure
  1043. * @txdr: tx descriptor ring (for a specific queue) to setup
  1044. *
  1045. * Return 0 on success, negative on failure
  1046. **/
  1047. static int
  1048. e1000_setup_tx_resources(struct e1000_adapter *adapter,
  1049. struct e1000_tx_ring *txdr)
  1050. {
  1051. struct pci_dev *pdev = adapter->pdev;
  1052. int size;
  1053. size = sizeof(struct e1000_buffer) * txdr->count;
  1054. txdr->buffer_info = vmalloc_node(size, pcibus_to_node(pdev->bus));
  1055. if (!txdr->buffer_info) {
  1056. DPRINTK(PROBE, ERR,
  1057. "Unable to allocate memory for the transmit descriptor ring\n");
  1058. return -ENOMEM;
  1059. }
  1060. memset(txdr->buffer_info, 0, size);
  1061. /* round up to nearest 4K */
  1062. txdr->size = txdr->count * sizeof(struct e1000_tx_desc);
  1063. E1000_ROUNDUP(txdr->size, 4096);
  1064. txdr->desc = pci_alloc_consistent(pdev, txdr->size, &txdr->dma);
  1065. if (!txdr->desc) {
  1066. setup_tx_desc_die:
  1067. vfree(txdr->buffer_info);
  1068. DPRINTK(PROBE, ERR,
  1069. "Unable to allocate memory for the transmit descriptor ring\n");
  1070. return -ENOMEM;
  1071. }
  1072. /* Fix for errata 23, can't cross 64kB boundary */
  1073. if (!e1000_check_64k_bound(adapter, txdr->desc, txdr->size)) {
  1074. void *olddesc = txdr->desc;
  1075. dma_addr_t olddma = txdr->dma;
  1076. DPRINTK(TX_ERR, ERR, "txdr align check failed: %u bytes "
  1077. "at %p\n", txdr->size, txdr->desc);
  1078. /* Try again, without freeing the previous */
  1079. txdr->desc = pci_alloc_consistent(pdev, txdr->size, &txdr->dma);
  1080. /* Failed allocation, critical failure */
  1081. if (!txdr->desc) {
  1082. pci_free_consistent(pdev, txdr->size, olddesc, olddma);
  1083. goto setup_tx_desc_die;
  1084. }
  1085. if (!e1000_check_64k_bound(adapter, txdr->desc, txdr->size)) {
  1086. /* give up */
  1087. pci_free_consistent(pdev, txdr->size, txdr->desc,
  1088. txdr->dma);
  1089. pci_free_consistent(pdev, txdr->size, olddesc, olddma);
  1090. DPRINTK(PROBE, ERR,
  1091. "Unable to allocate aligned memory "
  1092. "for the transmit descriptor ring\n");
  1093. vfree(txdr->buffer_info);
  1094. return -ENOMEM;
  1095. } else {
  1096. /* Free old allocation, new allocation was successful */
  1097. pci_free_consistent(pdev, txdr->size, olddesc, olddma);
  1098. }
  1099. }
  1100. memset(txdr->desc, 0, txdr->size);
  1101. txdr->next_to_use = 0;
  1102. txdr->next_to_clean = 0;
  1103. spin_lock_init(&txdr->tx_lock);
  1104. return 0;
  1105. }
  1106. /**
  1107. * e1000_setup_all_tx_resources - wrapper to allocate Tx resources
  1108. * (Descriptors) for all queues
  1109. * @adapter: board private structure
  1110. *
  1111. * If this function returns with an error, then it's possible one or
  1112. * more of the rings is populated (while the rest are not). It is the
  1113. * callers duty to clean those orphaned rings.
  1114. *
  1115. * Return 0 on success, negative on failure
  1116. **/
  1117. int
  1118. e1000_setup_all_tx_resources(struct e1000_adapter *adapter)
  1119. {
  1120. int i, err = 0;
  1121. for (i = 0; i < adapter->num_tx_queues; i++) {
  1122. err = e1000_setup_tx_resources(adapter, &adapter->tx_ring[i]);
  1123. if (err) {
  1124. DPRINTK(PROBE, ERR,
  1125. "Allocation for Tx Queue %u failed\n", i);
  1126. break;
  1127. }
  1128. }
  1129. return err;
  1130. }
  1131. /**
  1132. * e1000_configure_tx - Configure 8254x Transmit Unit after Reset
  1133. * @adapter: board private structure
  1134. *
  1135. * Configure the Tx unit of the MAC after a reset.
  1136. **/
  1137. static void
  1138. e1000_configure_tx(struct e1000_adapter *adapter)
  1139. {
  1140. uint64_t tdba;
  1141. struct e1000_hw *hw = &adapter->hw;
  1142. uint32_t tdlen, tctl, tipg, tarc;
  1143. uint32_t ipgr1, ipgr2;
  1144. /* Setup the HW Tx Head and Tail descriptor pointers */
  1145. switch (adapter->num_tx_queues) {
  1146. case 1:
  1147. default:
  1148. tdba = adapter->tx_ring[0].dma;
  1149. tdlen = adapter->tx_ring[0].count *
  1150. sizeof(struct e1000_tx_desc);
  1151. E1000_WRITE_REG(hw, TDBAL, (tdba & 0x00000000ffffffffULL));
  1152. E1000_WRITE_REG(hw, TDBAH, (tdba >> 32));
  1153. E1000_WRITE_REG(hw, TDLEN, tdlen);
  1154. E1000_WRITE_REG(hw, TDH, 0);
  1155. E1000_WRITE_REG(hw, TDT, 0);
  1156. adapter->tx_ring[0].tdh = E1000_TDH;
  1157. adapter->tx_ring[0].tdt = E1000_TDT;
  1158. break;
  1159. }
  1160. /* Set the default values for the Tx Inter Packet Gap timer */
  1161. if (hw->media_type == e1000_media_type_fiber ||
  1162. hw->media_type == e1000_media_type_internal_serdes)
  1163. tipg = DEFAULT_82543_TIPG_IPGT_FIBER;
  1164. else
  1165. tipg = DEFAULT_82543_TIPG_IPGT_COPPER;
  1166. switch (hw->mac_type) {
  1167. case e1000_82542_rev2_0:
  1168. case e1000_82542_rev2_1:
  1169. tipg = DEFAULT_82542_TIPG_IPGT;
  1170. ipgr1 = DEFAULT_82542_TIPG_IPGR1;
  1171. ipgr2 = DEFAULT_82542_TIPG_IPGR2;
  1172. break;
  1173. default:
  1174. ipgr1 = DEFAULT_82543_TIPG_IPGR1;
  1175. ipgr2 = DEFAULT_82543_TIPG_IPGR2;
  1176. break;
  1177. }
  1178. tipg |= ipgr1 << E1000_TIPG_IPGR1_SHIFT;
  1179. tipg |= ipgr2 << E1000_TIPG_IPGR2_SHIFT;
  1180. E1000_WRITE_REG(hw, TIPG, tipg);
  1181. /* Set the Tx Interrupt Delay register */
  1182. E1000_WRITE_REG(hw, TIDV, adapter->tx_int_delay);
  1183. if (hw->mac_type >= e1000_82540)
  1184. E1000_WRITE_REG(hw, TADV, adapter->tx_abs_int_delay);
  1185. /* Program the Transmit Control Register */
  1186. tctl = E1000_READ_REG(hw, TCTL);
  1187. tctl &= ~E1000_TCTL_CT;
  1188. tctl |= E1000_TCTL_EN | E1000_TCTL_PSP | E1000_TCTL_RTLC |
  1189. (E1000_COLLISION_THRESHOLD << E1000_CT_SHIFT);
  1190. E1000_WRITE_REG(hw, TCTL, tctl);
  1191. if (hw->mac_type == e1000_82571 || hw->mac_type == e1000_82572) {
  1192. tarc = E1000_READ_REG(hw, TARC0);
  1193. tarc |= ((1 << 25) | (1 << 21));
  1194. E1000_WRITE_REG(hw, TARC0, tarc);
  1195. tarc = E1000_READ_REG(hw, TARC1);
  1196. tarc |= (1 << 25);
  1197. if (tctl & E1000_TCTL_MULR)
  1198. tarc &= ~(1 << 28);
  1199. else
  1200. tarc |= (1 << 28);
  1201. E1000_WRITE_REG(hw, TARC1, tarc);
  1202. }
  1203. e1000_config_collision_dist(hw);
  1204. /* Setup Transmit Descriptor Settings for eop descriptor */
  1205. adapter->txd_cmd = E1000_TXD_CMD_IDE | E1000_TXD_CMD_EOP |
  1206. E1000_TXD_CMD_IFCS;
  1207. if (hw->mac_type < e1000_82543)
  1208. adapter->txd_cmd |= E1000_TXD_CMD_RPS;
  1209. else
  1210. adapter->txd_cmd |= E1000_TXD_CMD_RS;
  1211. /* Cache if we're 82544 running in PCI-X because we'll
  1212. * need this to apply a workaround later in the send path. */
  1213. if (hw->mac_type == e1000_82544 &&
  1214. hw->bus_type == e1000_bus_type_pcix)
  1215. adapter->pcix_82544 = 1;
  1216. }
  1217. /**
  1218. * e1000_setup_rx_resources - allocate Rx resources (Descriptors)
  1219. * @adapter: board private structure
  1220. * @rxdr: rx descriptor ring (for a specific queue) to setup
  1221. *
  1222. * Returns 0 on success, negative on failure
  1223. **/
  1224. static int
  1225. e1000_setup_rx_resources(struct e1000_adapter *adapter,
  1226. struct e1000_rx_ring *rxdr)
  1227. {
  1228. struct pci_dev *pdev = adapter->pdev;
  1229. int size, desc_len;
  1230. size = sizeof(struct e1000_buffer) * rxdr->count;
  1231. rxdr->buffer_info = vmalloc_node(size, pcibus_to_node(pdev->bus));
  1232. if (!rxdr->buffer_info) {
  1233. DPRINTK(PROBE, ERR,
  1234. "Unable to allocate memory for the receive descriptor ring\n");
  1235. return -ENOMEM;
  1236. }
  1237. memset(rxdr->buffer_info, 0, size);
  1238. size = sizeof(struct e1000_ps_page) * rxdr->count;
  1239. rxdr->ps_page = kmalloc(size, GFP_KERNEL);
  1240. if (!rxdr->ps_page) {
  1241. vfree(rxdr->buffer_info);
  1242. DPRINTK(PROBE, ERR,
  1243. "Unable to allocate memory for the receive descriptor ring\n");
  1244. return -ENOMEM;
  1245. }
  1246. memset(rxdr->ps_page, 0, size);
  1247. size = sizeof(struct e1000_ps_page_dma) * rxdr->count;
  1248. rxdr->ps_page_dma = kmalloc(size, GFP_KERNEL);
  1249. if (!rxdr->ps_page_dma) {
  1250. vfree(rxdr->buffer_info);
  1251. kfree(rxdr->ps_page);
  1252. DPRINTK(PROBE, ERR,
  1253. "Unable to allocate memory for the receive descriptor ring\n");
  1254. return -ENOMEM;
  1255. }
  1256. memset(rxdr->ps_page_dma, 0, size);
  1257. if (adapter->hw.mac_type <= e1000_82547_rev_2)
  1258. desc_len = sizeof(struct e1000_rx_desc);
  1259. else
  1260. desc_len = sizeof(union e1000_rx_desc_packet_split);
  1261. /* Round up to nearest 4K */
  1262. rxdr->size = rxdr->count * desc_len;
  1263. E1000_ROUNDUP(rxdr->size, 4096);
  1264. rxdr->desc = pci_alloc_consistent(pdev, rxdr->size, &rxdr->dma);
  1265. if (!rxdr->desc) {
  1266. DPRINTK(PROBE, ERR,
  1267. "Unable to allocate memory for the receive descriptor ring\n");
  1268. setup_rx_desc_die:
  1269. vfree(rxdr->buffer_info);
  1270. kfree(rxdr->ps_page);
  1271. kfree(rxdr->ps_page_dma);
  1272. return -ENOMEM;
  1273. }
  1274. /* Fix for errata 23, can't cross 64kB boundary */
  1275. if (!e1000_check_64k_bound(adapter, rxdr->desc, rxdr->size)) {
  1276. void *olddesc = rxdr->desc;
  1277. dma_addr_t olddma = rxdr->dma;
  1278. DPRINTK(RX_ERR, ERR, "rxdr align check failed: %u bytes "
  1279. "at %p\n", rxdr->size, rxdr->desc);
  1280. /* Try again, without freeing the previous */
  1281. rxdr->desc = pci_alloc_consistent(pdev, rxdr->size, &rxdr->dma);
  1282. /* Failed allocation, critical failure */
  1283. if (!rxdr->desc) {
  1284. pci_free_consistent(pdev, rxdr->size, olddesc, olddma);
  1285. DPRINTK(PROBE, ERR,
  1286. "Unable to allocate memory "
  1287. "for the receive descriptor ring\n");
  1288. goto setup_rx_desc_die;
  1289. }
  1290. if (!e1000_check_64k_bound(adapter, rxdr->desc, rxdr->size)) {
  1291. /* give up */
  1292. pci_free_consistent(pdev, rxdr->size, rxdr->desc,
  1293. rxdr->dma);
  1294. pci_free_consistent(pdev, rxdr->size, olddesc, olddma);
  1295. DPRINTK(PROBE, ERR,
  1296. "Unable to allocate aligned memory "
  1297. "for the receive descriptor ring\n");
  1298. goto setup_rx_desc_die;
  1299. } else {
  1300. /* Free old allocation, new allocation was successful */
  1301. pci_free_consistent(pdev, rxdr->size, olddesc, olddma);
  1302. }
  1303. }
  1304. memset(rxdr->desc, 0, rxdr->size);
  1305. rxdr->next_to_clean = 0;
  1306. rxdr->next_to_use = 0;
  1307. return 0;
  1308. }
  1309. /**
  1310. * e1000_setup_all_rx_resources - wrapper to allocate Rx resources
  1311. * (Descriptors) for all queues
  1312. * @adapter: board private structure
  1313. *
  1314. * If this function returns with an error, then it's possible one or
  1315. * more of the rings is populated (while the rest are not). It is the
  1316. * callers duty to clean those orphaned rings.
  1317. *
  1318. * Return 0 on success, negative on failure
  1319. **/
  1320. int
  1321. e1000_setup_all_rx_resources(struct e1000_adapter *adapter)
  1322. {
  1323. int i, err = 0;
  1324. for (i = 0; i < adapter->num_rx_queues; i++) {
  1325. err = e1000_setup_rx_resources(adapter, &adapter->rx_ring[i]);
  1326. if (err) {
  1327. DPRINTK(PROBE, ERR,
  1328. "Allocation for Rx Queue %u failed\n", i);
  1329. break;
  1330. }
  1331. }
  1332. return err;
  1333. }
  1334. /**
  1335. * e1000_setup_rctl - configure the receive control registers
  1336. * @adapter: Board private structure
  1337. **/
  1338. #define PAGE_USE_COUNT(S) (((S) >> PAGE_SHIFT) + \
  1339. (((S) & (PAGE_SIZE - 1)) ? 1 : 0))
  1340. static void
  1341. e1000_setup_rctl(struct e1000_adapter *adapter)
  1342. {
  1343. uint32_t rctl, rfctl;
  1344. uint32_t psrctl = 0;
  1345. #ifndef CONFIG_E1000_DISABLE_PACKET_SPLIT
  1346. uint32_t pages = 0;
  1347. #endif
  1348. rctl = E1000_READ_REG(&adapter->hw, RCTL);
  1349. rctl &= ~(3 << E1000_RCTL_MO_SHIFT);
  1350. rctl |= E1000_RCTL_EN | E1000_RCTL_BAM |
  1351. E1000_RCTL_LBM_NO | E1000_RCTL_RDMTS_HALF |
  1352. (adapter->hw.mc_filter_type << E1000_RCTL_MO_SHIFT);
  1353. if (adapter->hw.mac_type > e1000_82543)
  1354. rctl |= E1000_RCTL_SECRC;
  1355. if (adapter->hw.tbi_compatibility_on == 1)
  1356. rctl |= E1000_RCTL_SBP;
  1357. else
  1358. rctl &= ~E1000_RCTL_SBP;
  1359. if (adapter->netdev->mtu <= ETH_DATA_LEN)
  1360. rctl &= ~E1000_RCTL_LPE;
  1361. else
  1362. rctl |= E1000_RCTL_LPE;
  1363. /* Setup buffer sizes */
  1364. if (adapter->hw.mac_type >= e1000_82571) {
  1365. /* We can now specify buffers in 1K increments.
  1366. * BSIZE and BSEX are ignored in this case. */
  1367. rctl |= adapter->rx_buffer_len << 0x11;
  1368. } else {
  1369. rctl &= ~E1000_RCTL_SZ_4096;
  1370. rctl |= E1000_RCTL_BSEX;
  1371. switch (adapter->rx_buffer_len) {
  1372. case E1000_RXBUFFER_2048:
  1373. default:
  1374. rctl |= E1000_RCTL_SZ_2048;
  1375. rctl &= ~E1000_RCTL_BSEX;
  1376. break;
  1377. case E1000_RXBUFFER_4096:
  1378. rctl |= E1000_RCTL_SZ_4096;
  1379. break;
  1380. case E1000_RXBUFFER_8192:
  1381. rctl |= E1000_RCTL_SZ_8192;
  1382. break;
  1383. case E1000_RXBUFFER_16384:
  1384. rctl |= E1000_RCTL_SZ_16384;
  1385. break;
  1386. }
  1387. }
  1388. #ifndef CONFIG_E1000_DISABLE_PACKET_SPLIT
  1389. /* 82571 and greater support packet-split where the protocol
  1390. * header is placed in skb->data and the packet data is
  1391. * placed in pages hanging off of skb_shinfo(skb)->nr_frags.
  1392. * In the case of a non-split, skb->data is linearly filled,
  1393. * followed by the page buffers. Therefore, skb->data is
  1394. * sized to hold the largest protocol header.
  1395. */
  1396. pages = PAGE_USE_COUNT(adapter->netdev->mtu);
  1397. if ((adapter->hw.mac_type > e1000_82547_rev_2) && (pages <= 3) &&
  1398. PAGE_SIZE <= 16384)
  1399. adapter->rx_ps_pages = pages;
  1400. else
  1401. adapter->rx_ps_pages = 0;
  1402. #endif
  1403. if (adapter->rx_ps_pages) {
  1404. /* Configure extra packet-split registers */
  1405. rfctl = E1000_READ_REG(&adapter->hw, RFCTL);
  1406. rfctl |= E1000_RFCTL_EXTEN;
  1407. /* disable IPv6 packet split support */
  1408. rfctl |= E1000_RFCTL_IPV6_DIS;
  1409. E1000_WRITE_REG(&adapter->hw, RFCTL, rfctl);
  1410. rctl |= E1000_RCTL_DTYP_PS | E1000_RCTL_SECRC;
  1411. psrctl |= adapter->rx_ps_bsize0 >>
  1412. E1000_PSRCTL_BSIZE0_SHIFT;
  1413. switch (adapter->rx_ps_pages) {
  1414. case 3:
  1415. psrctl |= PAGE_SIZE <<
  1416. E1000_PSRCTL_BSIZE3_SHIFT;
  1417. case 2:
  1418. psrctl |= PAGE_SIZE <<
  1419. E1000_PSRCTL_BSIZE2_SHIFT;
  1420. case 1:
  1421. psrctl |= PAGE_SIZE >>
  1422. E1000_PSRCTL_BSIZE1_SHIFT;
  1423. break;
  1424. }
  1425. E1000_WRITE_REG(&adapter->hw, PSRCTL, psrctl);
  1426. }
  1427. E1000_WRITE_REG(&adapter->hw, RCTL, rctl);
  1428. }
  1429. /**
  1430. * e1000_configure_rx - Configure 8254x Receive Unit after Reset
  1431. * @adapter: board private structure
  1432. *
  1433. * Configure the Rx unit of the MAC after a reset.
  1434. **/
  1435. static void
  1436. e1000_configure_rx(struct e1000_adapter *adapter)
  1437. {
  1438. uint64_t rdba;
  1439. struct e1000_hw *hw = &adapter->hw;
  1440. uint32_t rdlen, rctl, rxcsum, ctrl_ext;
  1441. if (adapter->rx_ps_pages) {
  1442. rdlen = adapter->rx_ring[0].count *
  1443. sizeof(union e1000_rx_desc_packet_split);
  1444. adapter->clean_rx = e1000_clean_rx_irq_ps;
  1445. adapter->alloc_rx_buf = e1000_alloc_rx_buffers_ps;
  1446. } else {
  1447. rdlen = adapter->rx_ring[0].count *
  1448. sizeof(struct e1000_rx_desc);
  1449. adapter->clean_rx = e1000_clean_rx_irq;
  1450. adapter->alloc_rx_buf = e1000_alloc_rx_buffers;
  1451. }
  1452. /* disable receives while setting up the descriptors */
  1453. rctl = E1000_READ_REG(hw, RCTL);
  1454. E1000_WRITE_REG(hw, RCTL, rctl & ~E1000_RCTL_EN);
  1455. /* set the Receive Delay Timer Register */
  1456. E1000_WRITE_REG(hw, RDTR, adapter->rx_int_delay);
  1457. if (hw->mac_type >= e1000_82540) {
  1458. E1000_WRITE_REG(hw, RADV, adapter->rx_abs_int_delay);
  1459. if (adapter->itr > 1)
  1460. E1000_WRITE_REG(hw, ITR,
  1461. 1000000000 / (adapter->itr * 256));
  1462. }
  1463. if (hw->mac_type >= e1000_82571) {
  1464. ctrl_ext = E1000_READ_REG(hw, CTRL_EXT);
  1465. /* Reset delay timers after every interrupt */
  1466. ctrl_ext |= E1000_CTRL_EXT_CANC;
  1467. #ifdef CONFIG_E1000_NAPI
  1468. /* Auto-Mask interrupts upon ICR read. */
  1469. ctrl_ext |= E1000_CTRL_EXT_IAME;
  1470. #endif
  1471. E1000_WRITE_REG(hw, CTRL_EXT, ctrl_ext);
  1472. E1000_WRITE_REG(hw, IAM, ~0);
  1473. E1000_WRITE_FLUSH(hw);
  1474. }
  1475. /* Setup the HW Rx Head and Tail Descriptor Pointers and
  1476. * the Base and Length of the Rx Descriptor Ring */
  1477. switch (adapter->num_rx_queues) {
  1478. case 1:
  1479. default:
  1480. rdba = adapter->rx_ring[0].dma;
  1481. E1000_WRITE_REG(hw, RDBAL, (rdba & 0x00000000ffffffffULL));
  1482. E1000_WRITE_REG(hw, RDBAH, (rdba >> 32));
  1483. E1000_WRITE_REG(hw, RDLEN, rdlen);
  1484. E1000_WRITE_REG(hw, RDH, 0);
  1485. E1000_WRITE_REG(hw, RDT, 0);
  1486. adapter->rx_ring[0].rdh = E1000_RDH;
  1487. adapter->rx_ring[0].rdt = E1000_RDT;
  1488. break;
  1489. }
  1490. /* Enable 82543 Receive Checksum Offload for TCP and UDP */
  1491. if (hw->mac_type >= e1000_82543) {
  1492. rxcsum = E1000_READ_REG(hw, RXCSUM);
  1493. if (adapter->rx_csum == TRUE) {
  1494. rxcsum |= E1000_RXCSUM_TUOFL;
  1495. /* Enable 82571 IPv4 payload checksum for UDP fragments
  1496. * Must be used in conjunction with packet-split. */
  1497. if ((hw->mac_type >= e1000_82571) &&
  1498. (adapter->rx_ps_pages)) {
  1499. rxcsum |= E1000_RXCSUM_IPPCSE;
  1500. }
  1501. } else {
  1502. rxcsum &= ~E1000_RXCSUM_TUOFL;
  1503. /* don't need to clear IPPCSE as it defaults to 0 */
  1504. }
  1505. E1000_WRITE_REG(hw, RXCSUM, rxcsum);
  1506. }
  1507. if (hw->mac_type == e1000_82573)
  1508. E1000_WRITE_REG(hw, ERT, 0x0100);
  1509. /* Enable Receives */
  1510. E1000_WRITE_REG(hw, RCTL, rctl);
  1511. }
  1512. /**
  1513. * e1000_free_tx_resources - Free Tx Resources per Queue
  1514. * @adapter: board private structure
  1515. * @tx_ring: Tx descriptor ring for a specific queue
  1516. *
  1517. * Free all transmit software resources
  1518. **/
  1519. static void
  1520. e1000_free_tx_resources(struct e1000_adapter *adapter,
  1521. struct e1000_tx_ring *tx_ring)
  1522. {
  1523. struct pci_dev *pdev = adapter->pdev;
  1524. e1000_clean_tx_ring(adapter, tx_ring);
  1525. vfree(tx_ring->buffer_info);
  1526. tx_ring->buffer_info = NULL;
  1527. pci_free_consistent(pdev, tx_ring->size, tx_ring->desc, tx_ring->dma);
  1528. tx_ring->desc = NULL;
  1529. }
  1530. /**
  1531. * e1000_free_all_tx_resources - Free Tx Resources for All Queues
  1532. * @adapter: board private structure
  1533. *
  1534. * Free all transmit software resources
  1535. **/
  1536. void
  1537. e1000_free_all_tx_resources(struct e1000_adapter *adapter)
  1538. {
  1539. int i;
  1540. for (i = 0; i < adapter->num_tx_queues; i++)
  1541. e1000_free_tx_resources(adapter, &adapter->tx_ring[i]);
  1542. }
  1543. static inline void
  1544. e1000_unmap_and_free_tx_resource(struct e1000_adapter *adapter,
  1545. struct e1000_buffer *buffer_info)
  1546. {
  1547. if (buffer_info->dma) {
  1548. pci_unmap_page(adapter->pdev,
  1549. buffer_info->dma,
  1550. buffer_info->length,
  1551. PCI_DMA_TODEVICE);
  1552. }
  1553. if (buffer_info->skb)
  1554. dev_kfree_skb_any(buffer_info->skb);
  1555. memset(buffer_info, 0, sizeof(struct e1000_buffer));
  1556. }
  1557. /**
  1558. * e1000_clean_tx_ring - Free Tx Buffers
  1559. * @adapter: board private structure
  1560. * @tx_ring: ring to be cleaned
  1561. **/
  1562. static void
  1563. e1000_clean_tx_ring(struct e1000_adapter *adapter,
  1564. struct e1000_tx_ring *tx_ring)
  1565. {
  1566. struct e1000_buffer *buffer_info;
  1567. unsigned long size;
  1568. unsigned int i;
  1569. /* Free all the Tx ring sk_buffs */
  1570. for (i = 0; i < tx_ring->count; i++) {
  1571. buffer_info = &tx_ring->buffer_info[i];
  1572. e1000_unmap_and_free_tx_resource(adapter, buffer_info);
  1573. }
  1574. size = sizeof(struct e1000_buffer) * tx_ring->count;
  1575. memset(tx_ring->buffer_info, 0, size);
  1576. /* Zero out the descriptor ring */
  1577. memset(tx_ring->desc, 0, tx_ring->size);
  1578. tx_ring->next_to_use = 0;
  1579. tx_ring->next_to_clean = 0;
  1580. tx_ring->last_tx_tso = 0;
  1581. writel(0, adapter->hw.hw_addr + tx_ring->tdh);
  1582. writel(0, adapter->hw.hw_addr + tx_ring->tdt);
  1583. }
  1584. /**
  1585. * e1000_clean_all_tx_rings - Free Tx Buffers for all queues
  1586. * @adapter: board private structure
  1587. **/
  1588. static void
  1589. e1000_clean_all_tx_rings(struct e1000_adapter *adapter)
  1590. {
  1591. int i;
  1592. for (i = 0; i < adapter->num_tx_queues; i++)
  1593. e1000_clean_tx_ring(adapter, &adapter->tx_ring[i]);
  1594. }
  1595. /**
  1596. * e1000_free_rx_resources - Free Rx Resources
  1597. * @adapter: board private structure
  1598. * @rx_ring: ring to clean the resources from
  1599. *
  1600. * Free all receive software resources
  1601. **/
  1602. static void
  1603. e1000_free_rx_resources(struct e1000_adapter *adapter,
  1604. struct e1000_rx_ring *rx_ring)
  1605. {
  1606. struct pci_dev *pdev = adapter->pdev;
  1607. e1000_clean_rx_ring(adapter, rx_ring);
  1608. vfree(rx_ring->buffer_info);
  1609. rx_ring->buffer_info = NULL;
  1610. kfree(rx_ring->ps_page);
  1611. rx_ring->ps_page = NULL;
  1612. kfree(rx_ring->ps_page_dma);
  1613. rx_ring->ps_page_dma = NULL;
  1614. pci_free_consistent(pdev, rx_ring->size, rx_ring->desc, rx_ring->dma);
  1615. rx_ring->desc = NULL;
  1616. }
  1617. /**
  1618. * e1000_free_all_rx_resources - Free Rx Resources for All Queues
  1619. * @adapter: board private structure
  1620. *
  1621. * Free all receive software resources
  1622. **/
  1623. void
  1624. e1000_free_all_rx_resources(struct e1000_adapter *adapter)
  1625. {
  1626. int i;
  1627. for (i = 0; i < adapter->num_rx_queues; i++)
  1628. e1000_free_rx_resources(adapter, &adapter->rx_ring[i]);
  1629. }
  1630. /**
  1631. * e1000_clean_rx_ring - Free Rx Buffers per Queue
  1632. * @adapter: board private structure
  1633. * @rx_ring: ring to free buffers from
  1634. **/
  1635. static void
  1636. e1000_clean_rx_ring(struct e1000_adapter *adapter,
  1637. struct e1000_rx_ring *rx_ring)
  1638. {
  1639. struct e1000_buffer *buffer_info;
  1640. struct e1000_ps_page *ps_page;
  1641. struct e1000_ps_page_dma *ps_page_dma;
  1642. struct pci_dev *pdev = adapter->pdev;
  1643. unsigned long size;
  1644. unsigned int i, j;
  1645. /* Free all the Rx ring sk_buffs */
  1646. for (i = 0; i < rx_ring->count; i++) {
  1647. buffer_info = &rx_ring->buffer_info[i];
  1648. if (buffer_info->skb) {
  1649. pci_unmap_single(pdev,
  1650. buffer_info->dma,
  1651. buffer_info->length,
  1652. PCI_DMA_FROMDEVICE);
  1653. dev_kfree_skb(buffer_info->skb);
  1654. buffer_info->skb = NULL;
  1655. }
  1656. ps_page = &rx_ring->ps_page[i];
  1657. ps_page_dma = &rx_ring->ps_page_dma[i];
  1658. for (j = 0; j < adapter->rx_ps_pages; j++) {
  1659. if (!ps_page->ps_page[j]) break;
  1660. pci_unmap_page(pdev,
  1661. ps_page_dma->ps_page_dma[j],
  1662. PAGE_SIZE, PCI_DMA_FROMDEVICE);
  1663. ps_page_dma->ps_page_dma[j] = 0;
  1664. put_page(ps_page->ps_page[j]);
  1665. ps_page->ps_page[j] = NULL;
  1666. }
  1667. }
  1668. size = sizeof(struct e1000_buffer) * rx_ring->count;
  1669. memset(rx_ring->buffer_info, 0, size);
  1670. size = sizeof(struct e1000_ps_page) * rx_ring->count;
  1671. memset(rx_ring->ps_page, 0, size);
  1672. size = sizeof(struct e1000_ps_page_dma) * rx_ring->count;
  1673. memset(rx_ring->ps_page_dma, 0, size);
  1674. /* Zero out the descriptor ring */
  1675. memset(rx_ring->desc, 0, rx_ring->size);
  1676. rx_ring->next_to_clean = 0;
  1677. rx_ring->next_to_use = 0;
  1678. writel(0, adapter->hw.hw_addr + rx_ring->rdh);
  1679. writel(0, adapter->hw.hw_addr + rx_ring->rdt);
  1680. }
  1681. /**
  1682. * e1000_clean_all_rx_rings - Free Rx Buffers for all queues
  1683. * @adapter: board private structure
  1684. **/
  1685. static void
  1686. e1000_clean_all_rx_rings(struct e1000_adapter *adapter)
  1687. {
  1688. int i;
  1689. for (i = 0; i < adapter->num_rx_queues; i++)
  1690. e1000_clean_rx_ring(adapter, &adapter->rx_ring[i]);
  1691. }
  1692. /* The 82542 2.0 (revision 2) needs to have the receive unit in reset
  1693. * and memory write and invalidate disabled for certain operations
  1694. */
  1695. static void
  1696. e1000_enter_82542_rst(struct e1000_adapter *adapter)
  1697. {
  1698. struct net_device *netdev = adapter->netdev;
  1699. uint32_t rctl;
  1700. e1000_pci_clear_mwi(&adapter->hw);
  1701. rctl = E1000_READ_REG(&adapter->hw, RCTL);
  1702. rctl |= E1000_RCTL_RST;
  1703. E1000_WRITE_REG(&adapter->hw, RCTL, rctl);
  1704. E1000_WRITE_FLUSH(&adapter->hw);
  1705. mdelay(5);
  1706. if (netif_running(netdev))
  1707. e1000_clean_all_rx_rings(adapter);
  1708. }
  1709. static void
  1710. e1000_leave_82542_rst(struct e1000_adapter *adapter)
  1711. {
  1712. struct net_device *netdev = adapter->netdev;
  1713. uint32_t rctl;
  1714. rctl = E1000_READ_REG(&adapter->hw, RCTL);
  1715. rctl &= ~E1000_RCTL_RST;
  1716. E1000_WRITE_REG(&adapter->hw, RCTL, rctl);
  1717. E1000_WRITE_FLUSH(&adapter->hw);
  1718. mdelay(5);
  1719. if (adapter->hw.pci_cmd_word & PCI_COMMAND_INVALIDATE)
  1720. e1000_pci_set_mwi(&adapter->hw);
  1721. if (netif_running(netdev)) {
  1722. /* No need to loop, because 82542 supports only 1 queue */
  1723. struct e1000_rx_ring *ring = &adapter->rx_ring[0];
  1724. e1000_configure_rx(adapter);
  1725. adapter->alloc_rx_buf(adapter, ring, E1000_DESC_UNUSED(ring));
  1726. }
  1727. }
  1728. /**
  1729. * e1000_set_mac - Change the Ethernet Address of the NIC
  1730. * @netdev: network interface device structure
  1731. * @p: pointer to an address structure
  1732. *
  1733. * Returns 0 on success, negative on failure
  1734. **/
  1735. static int
  1736. e1000_set_mac(struct net_device *netdev, void *p)
  1737. {
  1738. struct e1000_adapter *adapter = netdev_priv(netdev);
  1739. struct sockaddr *addr = p;
  1740. if (!is_valid_ether_addr(addr->sa_data))
  1741. return -EADDRNOTAVAIL;
  1742. /* 82542 2.0 needs to be in reset to write receive address registers */
  1743. if (adapter->hw.mac_type == e1000_82542_rev2_0)
  1744. e1000_enter_82542_rst(adapter);
  1745. memcpy(netdev->dev_addr, addr->sa_data, netdev->addr_len);
  1746. memcpy(adapter->hw.mac_addr, addr->sa_data, netdev->addr_len);
  1747. e1000_rar_set(&adapter->hw, adapter->hw.mac_addr, 0);
  1748. /* With 82571 controllers, LAA may be overwritten (with the default)
  1749. * due to controller reset from the other port. */
  1750. if (adapter->hw.mac_type == e1000_82571) {
  1751. /* activate the work around */
  1752. adapter->hw.laa_is_present = 1;
  1753. /* Hold a copy of the LAA in RAR[14] This is done so that
  1754. * between the time RAR[0] gets clobbered and the time it
  1755. * gets fixed (in e1000_watchdog), the actual LAA is in one
  1756. * of the RARs and no incoming packets directed to this port
  1757. * are dropped. Eventaully the LAA will be in RAR[0] and
  1758. * RAR[14] */
  1759. e1000_rar_set(&adapter->hw, adapter->hw.mac_addr,
  1760. E1000_RAR_ENTRIES - 1);
  1761. }
  1762. if (adapter->hw.mac_type == e1000_82542_rev2_0)
  1763. e1000_leave_82542_rst(adapter);
  1764. return 0;
  1765. }
  1766. /**
  1767. * e1000_set_multi - Multicast and Promiscuous mode set
  1768. * @netdev: network interface device structure
  1769. *
  1770. * The set_multi entry point is called whenever the multicast address
  1771. * list or the network interface flags are updated. This routine is
  1772. * responsible for configuring the hardware for proper multicast,
  1773. * promiscuous mode, and all-multi behavior.
  1774. **/
  1775. static void
  1776. e1000_set_multi(struct net_device *netdev)
  1777. {
  1778. struct e1000_adapter *adapter = netdev_priv(netdev);
  1779. struct e1000_hw *hw = &adapter->hw;
  1780. struct dev_mc_list *mc_ptr;
  1781. uint32_t rctl;
  1782. uint32_t hash_value;
  1783. int i, rar_entries = E1000_RAR_ENTRIES;
  1784. /* reserve RAR[14] for LAA over-write work-around */
  1785. if (adapter->hw.mac_type == e1000_82571)
  1786. rar_entries--;
  1787. /* Check for Promiscuous and All Multicast modes */
  1788. rctl = E1000_READ_REG(hw, RCTL);
  1789. if (netdev->flags & IFF_PROMISC) {
  1790. rctl |= (E1000_RCTL_UPE | E1000_RCTL_MPE);
  1791. } else if (netdev->flags & IFF_ALLMULTI) {
  1792. rctl |= E1000_RCTL_MPE;
  1793. rctl &= ~E1000_RCTL_UPE;
  1794. } else {
  1795. rctl &= ~(E1000_RCTL_UPE | E1000_RCTL_MPE);
  1796. }
  1797. E1000_WRITE_REG(hw, RCTL, rctl);
  1798. /* 82542 2.0 needs to be in reset to write receive address registers */
  1799. if (hw->mac_type == e1000_82542_rev2_0)
  1800. e1000_enter_82542_rst(adapter);
  1801. /* load the first 14 multicast address into the exact filters 1-14
  1802. * RAR 0 is used for the station MAC adddress
  1803. * if there are not 14 addresses, go ahead and clear the filters
  1804. * -- with 82571 controllers only 0-13 entries are filled here
  1805. */
  1806. mc_ptr = netdev->mc_list;
  1807. for (i = 1; i < rar_entries; i++) {
  1808. if (mc_ptr) {
  1809. e1000_rar_set(hw, mc_ptr->dmi_addr, i);
  1810. mc_ptr = mc_ptr->next;
  1811. } else {
  1812. E1000_WRITE_REG_ARRAY(hw, RA, i << 1, 0);
  1813. E1000_WRITE_REG_ARRAY(hw, RA, (i << 1) + 1, 0);
  1814. }
  1815. }
  1816. /* clear the old settings from the multicast hash table */
  1817. for (i = 0; i < E1000_NUM_MTA_REGISTERS; i++)
  1818. E1000_WRITE_REG_ARRAY(hw, MTA, i, 0);
  1819. /* load any remaining addresses into the hash table */
  1820. for (; mc_ptr; mc_ptr = mc_ptr->next) {
  1821. hash_value = e1000_hash_mc_addr(hw, mc_ptr->dmi_addr);
  1822. e1000_mta_set(hw, hash_value);
  1823. }
  1824. if (hw->mac_type == e1000_82542_rev2_0)
  1825. e1000_leave_82542_rst(adapter);
  1826. }
  1827. /* Need to wait a few seconds after link up to get diagnostic information from
  1828. * the phy */
  1829. static void
  1830. e1000_update_phy_info(unsigned long data)
  1831. {
  1832. struct e1000_adapter *adapter = (struct e1000_adapter *) data;
  1833. e1000_phy_get_info(&adapter->hw, &adapter->phy_info);
  1834. }
  1835. /**
  1836. * e1000_82547_tx_fifo_stall - Timer Call-back
  1837. * @data: pointer to adapter cast into an unsigned long
  1838. **/
  1839. static void
  1840. e1000_82547_tx_fifo_stall(unsigned long data)
  1841. {
  1842. struct e1000_adapter *adapter = (struct e1000_adapter *) data;
  1843. struct net_device *netdev = adapter->netdev;
  1844. uint32_t tctl;
  1845. if (atomic_read(&adapter->tx_fifo_stall)) {
  1846. if ((E1000_READ_REG(&adapter->hw, TDT) ==
  1847. E1000_READ_REG(&adapter->hw, TDH)) &&
  1848. (E1000_READ_REG(&adapter->hw, TDFT) ==
  1849. E1000_READ_REG(&adapter->hw, TDFH)) &&
  1850. (E1000_READ_REG(&adapter->hw, TDFTS) ==
  1851. E1000_READ_REG(&adapter->hw, TDFHS))) {
  1852. tctl = E1000_READ_REG(&adapter->hw, TCTL);
  1853. E1000_WRITE_REG(&adapter->hw, TCTL,
  1854. tctl & ~E1000_TCTL_EN);
  1855. E1000_WRITE_REG(&adapter->hw, TDFT,
  1856. adapter->tx_head_addr);
  1857. E1000_WRITE_REG(&adapter->hw, TDFH,
  1858. adapter->tx_head_addr);
  1859. E1000_WRITE_REG(&adapter->hw, TDFTS,
  1860. adapter->tx_head_addr);
  1861. E1000_WRITE_REG(&adapter->hw, TDFHS,
  1862. adapter->tx_head_addr);
  1863. E1000_WRITE_REG(&adapter->hw, TCTL, tctl);
  1864. E1000_WRITE_FLUSH(&adapter->hw);
  1865. adapter->tx_fifo_head = 0;
  1866. atomic_set(&adapter->tx_fifo_stall, 0);
  1867. netif_wake_queue(netdev);
  1868. } else {
  1869. mod_timer(&adapter->tx_fifo_stall_timer, jiffies + 1);
  1870. }
  1871. }
  1872. }
  1873. /**
  1874. * e1000_watchdog - Timer Call-back
  1875. * @data: pointer to adapter cast into an unsigned long
  1876. **/
  1877. static void
  1878. e1000_watchdog(unsigned long data)
  1879. {
  1880. struct e1000_adapter *adapter = (struct e1000_adapter *) data;
  1881. /* Do the rest outside of interrupt context */
  1882. schedule_work(&adapter->watchdog_task);
  1883. }
  1884. static void
  1885. e1000_watchdog_task(struct e1000_adapter *adapter)
  1886. {
  1887. struct net_device *netdev = adapter->netdev;
  1888. struct e1000_tx_ring *txdr = adapter->tx_ring;
  1889. uint32_t link;
  1890. e1000_check_for_link(&adapter->hw);
  1891. if (adapter->hw.mac_type == e1000_82573) {
  1892. e1000_enable_tx_pkt_filtering(&adapter->hw);
  1893. if (adapter->mng_vlan_id != adapter->hw.mng_cookie.vlan_id)
  1894. e1000_update_mng_vlan(adapter);
  1895. }
  1896. if ((adapter->hw.media_type == e1000_media_type_internal_serdes) &&
  1897. !(E1000_READ_REG(&adapter->hw, TXCW) & E1000_TXCW_ANE))
  1898. link = !adapter->hw.serdes_link_down;
  1899. else
  1900. link = E1000_READ_REG(&adapter->hw, STATUS) & E1000_STATUS_LU;
  1901. if (link) {
  1902. if (!netif_carrier_ok(netdev)) {
  1903. e1000_get_speed_and_duplex(&adapter->hw,
  1904. &adapter->link_speed,
  1905. &adapter->link_duplex);
  1906. DPRINTK(LINK, INFO, "NIC Link is Up %d Mbps %s\n",
  1907. adapter->link_speed,
  1908. adapter->link_duplex == FULL_DUPLEX ?
  1909. "Full Duplex" : "Half Duplex");
  1910. /* tweak tx_queue_len according to speed/duplex */
  1911. netdev->tx_queue_len = adapter->tx_queue_len;
  1912. adapter->tx_timeout_factor = 1;
  1913. if (adapter->link_duplex == HALF_DUPLEX) {
  1914. switch (adapter->link_speed) {
  1915. case SPEED_10:
  1916. netdev->tx_queue_len = 10;
  1917. adapter->tx_timeout_factor = 8;
  1918. break;
  1919. case SPEED_100:
  1920. netdev->tx_queue_len = 100;
  1921. break;
  1922. }
  1923. }
  1924. netif_carrier_on(netdev);
  1925. netif_wake_queue(netdev);
  1926. mod_timer(&adapter->phy_info_timer, jiffies + 2 * HZ);
  1927. adapter->smartspeed = 0;
  1928. }
  1929. } else {
  1930. if (netif_carrier_ok(netdev)) {
  1931. adapter->link_speed = 0;
  1932. adapter->link_duplex = 0;
  1933. DPRINTK(LINK, INFO, "NIC Link is Down\n");
  1934. netif_carrier_off(netdev);
  1935. netif_stop_queue(netdev);
  1936. mod_timer(&adapter->phy_info_timer, jiffies + 2 * HZ);
  1937. }
  1938. e1000_smartspeed(adapter);
  1939. }
  1940. e1000_update_stats(adapter);
  1941. adapter->hw.tx_packet_delta = adapter->stats.tpt - adapter->tpt_old;
  1942. adapter->tpt_old = adapter->stats.tpt;
  1943. adapter->hw.collision_delta = adapter->stats.colc - adapter->colc_old;
  1944. adapter->colc_old = adapter->stats.colc;
  1945. adapter->gorcl = adapter->stats.gorcl - adapter->gorcl_old;
  1946. adapter->gorcl_old = adapter->stats.gorcl;
  1947. adapter->gotcl = adapter->stats.gotcl - adapter->gotcl_old;
  1948. adapter->gotcl_old = adapter->stats.gotcl;
  1949. e1000_update_adaptive(&adapter->hw);
  1950. if (!netif_carrier_ok(netdev)) {
  1951. if (E1000_DESC_UNUSED(txdr) + 1 < txdr->count) {
  1952. /* We've lost link, so the controller stops DMA,
  1953. * but we've got queued Tx work that's never going
  1954. * to get done, so reset controller to flush Tx.
  1955. * (Do the reset outside of interrupt context). */
  1956. schedule_work(&adapter->tx_timeout_task);
  1957. }
  1958. }
  1959. /* Dynamic mode for Interrupt Throttle Rate (ITR) */
  1960. if (adapter->hw.mac_type >= e1000_82540 && adapter->itr == 1) {
  1961. /* Symmetric Tx/Rx gets a reduced ITR=2000; Total
  1962. * asymmetrical Tx or Rx gets ITR=8000; everyone
  1963. * else is between 2000-8000. */
  1964. uint32_t goc = (adapter->gotcl + adapter->gorcl) / 10000;
  1965. uint32_t dif = (adapter->gotcl > adapter->gorcl ?
  1966. adapter->gotcl - adapter->gorcl :
  1967. adapter->gorcl - adapter->gotcl) / 10000;
  1968. uint32_t itr = goc > 0 ? (dif * 6000 / goc + 2000) : 8000;
  1969. E1000_WRITE_REG(&adapter->hw, ITR, 1000000000 / (itr * 256));
  1970. }
  1971. /* Cause software interrupt to ensure rx ring is cleaned */
  1972. E1000_WRITE_REG(&adapter->hw, ICS, E1000_ICS_RXDMT0);
  1973. /* Force detection of hung controller every watchdog period */
  1974. adapter->detect_tx_hung = TRUE;
  1975. /* With 82571 controllers, LAA may be overwritten due to controller
  1976. * reset from the other port. Set the appropriate LAA in RAR[0] */
  1977. if (adapter->hw.mac_type == e1000_82571 && adapter->hw.laa_is_present)
  1978. e1000_rar_set(&adapter->hw, adapter->hw.mac_addr, 0);
  1979. /* Reset the timer */
  1980. mod_timer(&adapter->watchdog_timer, jiffies + 2 * HZ);
  1981. }
  1982. #define E1000_TX_FLAGS_CSUM 0x00000001
  1983. #define E1000_TX_FLAGS_VLAN 0x00000002
  1984. #define E1000_TX_FLAGS_TSO 0x00000004
  1985. #define E1000_TX_FLAGS_IPV4 0x00000008
  1986. #define E1000_TX_FLAGS_VLAN_MASK 0xffff0000
  1987. #define E1000_TX_FLAGS_VLAN_SHIFT 16
  1988. static inline int
  1989. e1000_tso(struct e1000_adapter *adapter, struct e1000_tx_ring *tx_ring,
  1990. struct sk_buff *skb)
  1991. {
  1992. #ifdef NETIF_F_TSO
  1993. struct e1000_context_desc *context_desc;
  1994. struct e1000_buffer *buffer_info;
  1995. unsigned int i;
  1996. uint32_t cmd_length = 0;
  1997. uint16_t ipcse = 0, tucse, mss;
  1998. uint8_t ipcss, ipcso, tucss, tucso, hdr_len;
  1999. int err;
  2000. if (skb_shinfo(skb)->tso_size) {
  2001. if (skb_header_cloned(skb)) {
  2002. err = pskb_expand_head(skb, 0, 0, GFP_ATOMIC);
  2003. if (err)
  2004. return err;
  2005. }
  2006. hdr_len = ((skb->h.raw - skb->data) + (skb->h.th->doff << 2));
  2007. mss = skb_shinfo(skb)->tso_size;
  2008. if (skb->protocol == ntohs(ETH_P_IP)) {
  2009. skb->nh.iph->tot_len = 0;
  2010. skb->nh.iph->check = 0;
  2011. skb->h.th->check =
  2012. ~csum_tcpudp_magic(skb->nh.iph->saddr,
  2013. skb->nh.iph->daddr,
  2014. 0,
  2015. IPPROTO_TCP,
  2016. 0);
  2017. cmd_length = E1000_TXD_CMD_IP;
  2018. ipcse = skb->h.raw - skb->data - 1;
  2019. #ifdef NETIF_F_TSO_IPV6
  2020. } else if (skb->protocol == ntohs(ETH_P_IPV6)) {
  2021. skb->nh.ipv6h->payload_len = 0;
  2022. skb->h.th->check =
  2023. ~csum_ipv6_magic(&skb->nh.ipv6h->saddr,
  2024. &skb->nh.ipv6h->daddr,
  2025. 0,
  2026. IPPROTO_TCP,
  2027. 0);
  2028. ipcse = 0;
  2029. #endif
  2030. }
  2031. ipcss = skb->nh.raw - skb->data;
  2032. ipcso = (void *)&(skb->nh.iph->check) - (void *)skb->data;
  2033. tucss = skb->h.raw - skb->data;
  2034. tucso = (void *)&(skb->h.th->check) - (void *)skb->data;
  2035. tucse = 0;
  2036. cmd_length |= (E1000_TXD_CMD_DEXT | E1000_TXD_CMD_TSE |
  2037. E1000_TXD_CMD_TCP | (skb->len - (hdr_len)));
  2038. i = tx_ring->next_to_use;
  2039. context_desc = E1000_CONTEXT_DESC(*tx_ring, i);
  2040. buffer_info = &tx_ring->buffer_info[i];
  2041. context_desc->lower_setup.ip_fields.ipcss = ipcss;
  2042. context_desc->lower_setup.ip_fields.ipcso = ipcso;
  2043. context_desc->lower_setup.ip_fields.ipcse = cpu_to_le16(ipcse);
  2044. context_desc->upper_setup.tcp_fields.tucss = tucss;
  2045. context_desc->upper_setup.tcp_fields.tucso = tucso;
  2046. context_desc->upper_setup.tcp_fields.tucse = cpu_to_le16(tucse);
  2047. context_desc->tcp_seg_setup.fields.mss = cpu_to_le16(mss);
  2048. context_desc->tcp_seg_setup.fields.hdr_len = hdr_len;
  2049. context_desc->cmd_and_length = cpu_to_le32(cmd_length);
  2050. buffer_info->time_stamp = jiffies;
  2051. if (++i == tx_ring->count) i = 0;
  2052. tx_ring->next_to_use = i;
  2053. return TRUE;
  2054. }
  2055. #endif
  2056. return FALSE;
  2057. }
  2058. static inline boolean_t
  2059. e1000_tx_csum(struct e1000_adapter *adapter, struct e1000_tx_ring *tx_ring,
  2060. struct sk_buff *skb)
  2061. {
  2062. struct e1000_context_desc *context_desc;
  2063. struct e1000_buffer *buffer_info;
  2064. unsigned int i;
  2065. uint8_t css;
  2066. if (likely(skb->ip_summed == CHECKSUM_HW)) {
  2067. css = skb->h.raw - skb->data;
  2068. i = tx_ring->next_to_use;
  2069. buffer_info = &tx_ring->buffer_info[i];
  2070. context_desc = E1000_CONTEXT_DESC(*tx_ring, i);
  2071. context_desc->upper_setup.tcp_fields.tucss = css;
  2072. context_desc->upper_setup.tcp_fields.tucso = css + skb->csum;
  2073. context_desc->upper_setup.tcp_fields.tucse = 0;
  2074. context_desc->tcp_seg_setup.data = 0;
  2075. context_desc->cmd_and_length = cpu_to_le32(E1000_TXD_CMD_DEXT);
  2076. buffer_info->time_stamp = jiffies;
  2077. if (unlikely(++i == tx_ring->count)) i = 0;
  2078. tx_ring->next_to_use = i;
  2079. return TRUE;
  2080. }
  2081. return FALSE;
  2082. }
  2083. #define E1000_MAX_TXD_PWR 12
  2084. #define E1000_MAX_DATA_PER_TXD (1<<E1000_MAX_TXD_PWR)
  2085. static inline int
  2086. e1000_tx_map(struct e1000_adapter *adapter, struct e1000_tx_ring *tx_ring,
  2087. struct sk_buff *skb, unsigned int first, unsigned int max_per_txd,
  2088. unsigned int nr_frags, unsigned int mss)
  2089. {
  2090. struct e1000_buffer *buffer_info;
  2091. unsigned int len = skb->len;
  2092. unsigned int offset = 0, size, count = 0, i;
  2093. unsigned int f;
  2094. len -= skb->data_len;
  2095. i = tx_ring->next_to_use;
  2096. while (len) {
  2097. buffer_info = &tx_ring->buffer_info[i];
  2098. size = min(len, max_per_txd);
  2099. #ifdef NETIF_F_TSO
  2100. /* Workaround for Controller erratum --
  2101. * descriptor for non-tso packet in a linear SKB that follows a
  2102. * tso gets written back prematurely before the data is fully
  2103. * DMAd to the controller */
  2104. if (!skb->data_len && tx_ring->last_tx_tso &&
  2105. !skb_shinfo(skb)->tso_size) {
  2106. tx_ring->last_tx_tso = 0;
  2107. size -= 4;
  2108. }
  2109. /* Workaround for premature desc write-backs
  2110. * in TSO mode. Append 4-byte sentinel desc */
  2111. if (unlikely(mss && !nr_frags && size == len && size > 8))
  2112. size -= 4;
  2113. #endif
  2114. /* work-around for errata 10 and it applies
  2115. * to all controllers in PCI-X mode
  2116. * The fix is to make sure that the first descriptor of a
  2117. * packet is smaller than 2048 - 16 - 16 (or 2016) bytes
  2118. */
  2119. if (unlikely((adapter->hw.bus_type == e1000_bus_type_pcix) &&
  2120. (size > 2015) && count == 0))
  2121. size = 2015;
  2122. /* Workaround for potential 82544 hang in PCI-X. Avoid
  2123. * terminating buffers within evenly-aligned dwords. */
  2124. if (unlikely(adapter->pcix_82544 &&
  2125. !((unsigned long)(skb->data + offset + size - 1) & 4) &&
  2126. size > 4))
  2127. size -= 4;
  2128. buffer_info->length = size;
  2129. buffer_info->dma =
  2130. pci_map_single(adapter->pdev,
  2131. skb->data + offset,
  2132. size,
  2133. PCI_DMA_TODEVICE);
  2134. buffer_info->time_stamp = jiffies;
  2135. len -= size;
  2136. offset += size;
  2137. count++;
  2138. if (unlikely(++i == tx_ring->count)) i = 0;
  2139. }
  2140. for (f = 0; f < nr_frags; f++) {
  2141. struct skb_frag_struct *frag;
  2142. frag = &skb_shinfo(skb)->frags[f];
  2143. len = frag->size;
  2144. offset = frag->page_offset;
  2145. while (len) {
  2146. buffer_info = &tx_ring->buffer_info[i];
  2147. size = min(len, max_per_txd);
  2148. #ifdef NETIF_F_TSO
  2149. /* Workaround for premature desc write-backs
  2150. * in TSO mode. Append 4-byte sentinel desc */
  2151. if (unlikely(mss && f == (nr_frags-1) && size == len && size > 8))
  2152. size -= 4;
  2153. #endif
  2154. /* Workaround for potential 82544 hang in PCI-X.
  2155. * Avoid terminating buffers within evenly-aligned
  2156. * dwords. */
  2157. if (unlikely(adapter->pcix_82544 &&
  2158. !((unsigned long)(frag->page+offset+size-1) & 4) &&
  2159. size > 4))
  2160. size -= 4;
  2161. buffer_info->length = size;
  2162. buffer_info->dma =
  2163. pci_map_page(adapter->pdev,
  2164. frag->page,
  2165. offset,
  2166. size,
  2167. PCI_DMA_TODEVICE);
  2168. buffer_info->time_stamp = jiffies;
  2169. len -= size;
  2170. offset += size;
  2171. count++;
  2172. if (unlikely(++i == tx_ring->count)) i = 0;
  2173. }
  2174. }
  2175. i = (i == 0) ? tx_ring->count - 1 : i - 1;
  2176. tx_ring->buffer_info[i].skb = skb;
  2177. tx_ring->buffer_info[first].next_to_watch = i;
  2178. return count;
  2179. }
  2180. static inline void
  2181. e1000_tx_queue(struct e1000_adapter *adapter, struct e1000_tx_ring *tx_ring,
  2182. int tx_flags, int count)
  2183. {
  2184. struct e1000_tx_desc *tx_desc = NULL;
  2185. struct e1000_buffer *buffer_info;
  2186. uint32_t txd_upper = 0, txd_lower = E1000_TXD_CMD_IFCS;
  2187. unsigned int i;
  2188. if (likely(tx_flags & E1000_TX_FLAGS_TSO)) {
  2189. txd_lower |= E1000_TXD_CMD_DEXT | E1000_TXD_DTYP_D |
  2190. E1000_TXD_CMD_TSE;
  2191. txd_upper |= E1000_TXD_POPTS_TXSM << 8;
  2192. if (likely(tx_flags & E1000_TX_FLAGS_IPV4))
  2193. txd_upper |= E1000_TXD_POPTS_IXSM << 8;
  2194. }
  2195. if (likely(tx_flags & E1000_TX_FLAGS_CSUM)) {
  2196. txd_lower |= E1000_TXD_CMD_DEXT | E1000_TXD_DTYP_D;
  2197. txd_upper |= E1000_TXD_POPTS_TXSM << 8;
  2198. }
  2199. if (unlikely(tx_flags & E1000_TX_FLAGS_VLAN)) {
  2200. txd_lower |= E1000_TXD_CMD_VLE;
  2201. txd_upper |= (tx_flags & E1000_TX_FLAGS_VLAN_MASK);
  2202. }
  2203. i = tx_ring->next_to_use;
  2204. while (count--) {
  2205. buffer_info = &tx_ring->buffer_info[i];
  2206. tx_desc = E1000_TX_DESC(*tx_ring, i);
  2207. tx_desc->buffer_addr = cpu_to_le64(buffer_info->dma);
  2208. tx_desc->lower.data =
  2209. cpu_to_le32(txd_lower | buffer_info->length);
  2210. tx_desc->upper.data = cpu_to_le32(txd_upper);
  2211. if (unlikely(++i == tx_ring->count)) i = 0;
  2212. }
  2213. tx_desc->lower.data |= cpu_to_le32(adapter->txd_cmd);
  2214. /* Force memory writes to complete before letting h/w
  2215. * know there are new descriptors to fetch. (Only
  2216. * applicable for weak-ordered memory model archs,
  2217. * such as IA-64). */
  2218. wmb();
  2219. tx_ring->next_to_use = i;
  2220. writel(i, adapter->hw.hw_addr + tx_ring->tdt);
  2221. }
  2222. /**
  2223. * 82547 workaround to avoid controller hang in half-duplex environment.
  2224. * The workaround is to avoid queuing a large packet that would span
  2225. * the internal Tx FIFO ring boundary by notifying the stack to resend
  2226. * the packet at a later time. This gives the Tx FIFO an opportunity to
  2227. * flush all packets. When that occurs, we reset the Tx FIFO pointers
  2228. * to the beginning of the Tx FIFO.
  2229. **/
  2230. #define E1000_FIFO_HDR 0x10
  2231. #define E1000_82547_PAD_LEN 0x3E0
  2232. static inline int
  2233. e1000_82547_fifo_workaround(struct e1000_adapter *adapter, struct sk_buff *skb)
  2234. {
  2235. uint32_t fifo_space = adapter->tx_fifo_size - adapter->tx_fifo_head;
  2236. uint32_t skb_fifo_len = skb->len + E1000_FIFO_HDR;
  2237. E1000_ROUNDUP(skb_fifo_len, E1000_FIFO_HDR);
  2238. if (adapter->link_duplex != HALF_DUPLEX)
  2239. goto no_fifo_stall_required;
  2240. if (atomic_read(&adapter->tx_fifo_stall))
  2241. return 1;
  2242. if (skb_fifo_len >= (E1000_82547_PAD_LEN + fifo_space)) {
  2243. atomic_set(&adapter->tx_fifo_stall, 1);
  2244. return 1;
  2245. }
  2246. no_fifo_stall_required:
  2247. adapter->tx_fifo_head += skb_fifo_len;
  2248. if (adapter->tx_fifo_head >= adapter->tx_fifo_size)
  2249. adapter->tx_fifo_head -= adapter->tx_fifo_size;
  2250. return 0;
  2251. }
  2252. #define MINIMUM_DHCP_PACKET_SIZE 282
  2253. static inline int
  2254. e1000_transfer_dhcp_info(struct e1000_adapter *adapter, struct sk_buff *skb)
  2255. {
  2256. struct e1000_hw *hw = &adapter->hw;
  2257. uint16_t length, offset;
  2258. if (vlan_tx_tag_present(skb)) {
  2259. if (!((vlan_tx_tag_get(skb) == adapter->hw.mng_cookie.vlan_id) &&
  2260. ( adapter->hw.mng_cookie.status &
  2261. E1000_MNG_DHCP_COOKIE_STATUS_VLAN_SUPPORT)) )
  2262. return 0;
  2263. }
  2264. if ((skb->len > MINIMUM_DHCP_PACKET_SIZE) && (!skb->protocol)) {
  2265. struct ethhdr *eth = (struct ethhdr *) skb->data;
  2266. if ((htons(ETH_P_IP) == eth->h_proto)) {
  2267. const struct iphdr *ip =
  2268. (struct iphdr *)((uint8_t *)skb->data+14);
  2269. if (IPPROTO_UDP == ip->protocol) {
  2270. struct udphdr *udp =
  2271. (struct udphdr *)((uint8_t *)ip +
  2272. (ip->ihl << 2));
  2273. if (ntohs(udp->dest) == 67) {
  2274. offset = (uint8_t *)udp + 8 - skb->data;
  2275. length = skb->len - offset;
  2276. return e1000_mng_write_dhcp_info(hw,
  2277. (uint8_t *)udp + 8,
  2278. length);
  2279. }
  2280. }
  2281. }
  2282. }
  2283. return 0;
  2284. }
  2285. #define TXD_USE_COUNT(S, X) (((S) >> (X)) + 1 )
  2286. static int
  2287. e1000_xmit_frame(struct sk_buff *skb, struct net_device *netdev)
  2288. {
  2289. struct e1000_adapter *adapter = netdev_priv(netdev);
  2290. struct e1000_tx_ring *tx_ring;
  2291. unsigned int first, max_per_txd = E1000_MAX_DATA_PER_TXD;
  2292. unsigned int max_txd_pwr = E1000_MAX_TXD_PWR;
  2293. unsigned int tx_flags = 0;
  2294. unsigned int len = skb->len;
  2295. unsigned long flags;
  2296. unsigned int nr_frags = 0;
  2297. unsigned int mss = 0;
  2298. int count = 0;
  2299. int tso;
  2300. unsigned int f;
  2301. len -= skb->data_len;
  2302. tx_ring = adapter->tx_ring;
  2303. if (unlikely(skb->len <= 0)) {
  2304. dev_kfree_skb_any(skb);
  2305. return NETDEV_TX_OK;
  2306. }
  2307. #ifdef NETIF_F_TSO
  2308. mss = skb_shinfo(skb)->tso_size;
  2309. /* The controller does a simple calculation to
  2310. * make sure there is enough room in the FIFO before
  2311. * initiating the DMA for each buffer. The calc is:
  2312. * 4 = ceil(buffer len/mss). To make sure we don't
  2313. * overrun the FIFO, adjust the max buffer len if mss
  2314. * drops. */
  2315. if (mss) {
  2316. uint8_t hdr_len;
  2317. max_per_txd = min(mss << 2, max_per_txd);
  2318. max_txd_pwr = fls(max_per_txd) - 1;
  2319. /* TSO Workaround for 82571/2 Controllers -- if skb->data
  2320. * points to just header, pull a few bytes of payload from
  2321. * frags into skb->data */
  2322. hdr_len = ((skb->h.raw - skb->data) + (skb->h.th->doff << 2));
  2323. if (skb->data_len && (hdr_len == (skb->len - skb->data_len)) &&
  2324. (adapter->hw.mac_type == e1000_82571 ||
  2325. adapter->hw.mac_type == e1000_82572)) {
  2326. unsigned int pull_size;
  2327. pull_size = min((unsigned int)4, skb->data_len);
  2328. if (!__pskb_pull_tail(skb, pull_size)) {
  2329. printk(KERN_ERR "__pskb_pull_tail failed.\n");
  2330. dev_kfree_skb_any(skb);
  2331. return -EFAULT;
  2332. }
  2333. len = skb->len - skb->data_len;
  2334. }
  2335. }
  2336. /* reserve a descriptor for the offload context */
  2337. if ((mss) || (skb->ip_summed == CHECKSUM_HW))
  2338. count++;
  2339. count++;
  2340. #else
  2341. if (skb->ip_summed == CHECKSUM_HW)
  2342. count++;
  2343. #endif
  2344. #ifdef NETIF_F_TSO
  2345. /* Controller Erratum workaround */
  2346. if (!skb->data_len && tx_ring->last_tx_tso &&
  2347. !skb_shinfo(skb)->tso_size)
  2348. count++;
  2349. #endif
  2350. count += TXD_USE_COUNT(len, max_txd_pwr);
  2351. if (adapter->pcix_82544)
  2352. count++;
  2353. /* work-around for errata 10 and it applies to all controllers
  2354. * in PCI-X mode, so add one more descriptor to the count
  2355. */
  2356. if (unlikely((adapter->hw.bus_type == e1000_bus_type_pcix) &&
  2357. (len > 2015)))
  2358. count++;
  2359. nr_frags = skb_shinfo(skb)->nr_frags;
  2360. for (f = 0; f < nr_frags; f++)
  2361. count += TXD_USE_COUNT(skb_shinfo(skb)->frags[f].size,
  2362. max_txd_pwr);
  2363. if (adapter->pcix_82544)
  2364. count += nr_frags;
  2365. if (adapter->hw.tx_pkt_filtering && (adapter->hw.mac_type == e1000_82573) )
  2366. e1000_transfer_dhcp_info(adapter, skb);
  2367. local_irq_save(flags);
  2368. if (!spin_trylock(&tx_ring->tx_lock)) {
  2369. /* Collision - tell upper layer to requeue */
  2370. local_irq_restore(flags);
  2371. return NETDEV_TX_LOCKED;
  2372. }
  2373. /* need: count + 2 desc gap to keep tail from touching
  2374. * head, otherwise try next time */
  2375. if (unlikely(E1000_DESC_UNUSED(tx_ring) < count + 2)) {
  2376. netif_stop_queue(netdev);
  2377. spin_unlock_irqrestore(&tx_ring->tx_lock, flags);
  2378. return NETDEV_TX_BUSY;
  2379. }
  2380. if (unlikely(adapter->hw.mac_type == e1000_82547)) {
  2381. if (unlikely(e1000_82547_fifo_workaround(adapter, skb))) {
  2382. netif_stop_queue(netdev);
  2383. mod_timer(&adapter->tx_fifo_stall_timer, jiffies);
  2384. spin_unlock_irqrestore(&tx_ring->tx_lock, flags);
  2385. return NETDEV_TX_BUSY;
  2386. }
  2387. }
  2388. if (unlikely(adapter->vlgrp && vlan_tx_tag_present(skb))) {
  2389. tx_flags |= E1000_TX_FLAGS_VLAN;
  2390. tx_flags |= (vlan_tx_tag_get(skb) << E1000_TX_FLAGS_VLAN_SHIFT);
  2391. }
  2392. first = tx_ring->next_to_use;
  2393. tso = e1000_tso(adapter, tx_ring, skb);
  2394. if (tso < 0) {
  2395. dev_kfree_skb_any(skb);
  2396. spin_unlock_irqrestore(&tx_ring->tx_lock, flags);
  2397. return NETDEV_TX_OK;
  2398. }
  2399. if (likely(tso)) {
  2400. tx_ring->last_tx_tso = 1;
  2401. tx_flags |= E1000_TX_FLAGS_TSO;
  2402. } else if (likely(e1000_tx_csum(adapter, tx_ring, skb)))
  2403. tx_flags |= E1000_TX_FLAGS_CSUM;
  2404. /* Old method was to assume IPv4 packet by default if TSO was enabled.
  2405. * 82571 hardware supports TSO capabilities for IPv6 as well...
  2406. * no longer assume, we must. */
  2407. if (likely(skb->protocol == ntohs(ETH_P_IP)))
  2408. tx_flags |= E1000_TX_FLAGS_IPV4;
  2409. e1000_tx_queue(adapter, tx_ring, tx_flags,
  2410. e1000_tx_map(adapter, tx_ring, skb, first,
  2411. max_per_txd, nr_frags, mss));
  2412. netdev->trans_start = jiffies;
  2413. /* Make sure there is space in the ring for the next send. */
  2414. if (unlikely(E1000_DESC_UNUSED(tx_ring) < MAX_SKB_FRAGS + 2))
  2415. netif_stop_queue(netdev);
  2416. spin_unlock_irqrestore(&tx_ring->tx_lock, flags);
  2417. return NETDEV_TX_OK;
  2418. }
  2419. /**
  2420. * e1000_tx_timeout - Respond to a Tx Hang
  2421. * @netdev: network interface device structure
  2422. **/
  2423. static void
  2424. e1000_tx_timeout(struct net_device *netdev)
  2425. {
  2426. struct e1000_adapter *adapter = netdev_priv(netdev);
  2427. /* Do the reset outside of interrupt context */
  2428. schedule_work(&adapter->tx_timeout_task);
  2429. }
  2430. static void
  2431. e1000_tx_timeout_task(struct net_device *netdev)
  2432. {
  2433. struct e1000_adapter *adapter = netdev_priv(netdev);
  2434. adapter->tx_timeout_count++;
  2435. e1000_down(adapter);
  2436. e1000_up(adapter);
  2437. }
  2438. /**
  2439. * e1000_get_stats - Get System Network Statistics
  2440. * @netdev: network interface device structure
  2441. *
  2442. * Returns the address of the device statistics structure.
  2443. * The statistics are actually updated from the timer callback.
  2444. **/
  2445. static struct net_device_stats *
  2446. e1000_get_stats(struct net_device *netdev)
  2447. {
  2448. struct e1000_adapter *adapter = netdev_priv(netdev);
  2449. /* only return the current stats */
  2450. return &adapter->net_stats;
  2451. }
  2452. /**
  2453. * e1000_change_mtu - Change the Maximum Transfer Unit
  2454. * @netdev: network interface device structure
  2455. * @new_mtu: new value for maximum frame size
  2456. *
  2457. * Returns 0 on success, negative on failure
  2458. **/
  2459. static int
  2460. e1000_change_mtu(struct net_device *netdev, int new_mtu)
  2461. {
  2462. struct e1000_adapter *adapter = netdev_priv(netdev);
  2463. int max_frame = new_mtu + ENET_HEADER_SIZE + ETHERNET_FCS_SIZE;
  2464. if ((max_frame < MINIMUM_ETHERNET_FRAME_SIZE) ||
  2465. (max_frame > MAX_JUMBO_FRAME_SIZE)) {
  2466. DPRINTK(PROBE, ERR, "Invalid MTU setting\n");
  2467. return -EINVAL;
  2468. }
  2469. /* Adapter-specific max frame size limits. */
  2470. switch (adapter->hw.mac_type) {
  2471. case e1000_82542_rev2_0:
  2472. case e1000_82542_rev2_1:
  2473. case e1000_82573:
  2474. if (max_frame > MAXIMUM_ETHERNET_FRAME_SIZE) {
  2475. DPRINTK(PROBE, ERR, "Jumbo Frames not supported.\n");
  2476. return -EINVAL;
  2477. }
  2478. break;
  2479. case e1000_82571:
  2480. case e1000_82572:
  2481. #define MAX_STD_JUMBO_FRAME_SIZE 9234
  2482. if (max_frame > MAX_STD_JUMBO_FRAME_SIZE) {
  2483. DPRINTK(PROBE, ERR, "MTU > 9216 not supported.\n");
  2484. return -EINVAL;
  2485. }
  2486. break;
  2487. default:
  2488. /* Capable of supporting up to MAX_JUMBO_FRAME_SIZE limit. */
  2489. break;
  2490. }
  2491. if (adapter->hw.mac_type > e1000_82547_rev_2) {
  2492. adapter->rx_buffer_len = max_frame;
  2493. E1000_ROUNDUP(adapter->rx_buffer_len, 1024);
  2494. } else {
  2495. if(unlikely((adapter->hw.mac_type < e1000_82543) &&
  2496. (max_frame > MAXIMUM_ETHERNET_FRAME_SIZE))) {
  2497. DPRINTK(PROBE, ERR, "Jumbo Frames not supported "
  2498. "on 82542\n");
  2499. return -EINVAL;
  2500. } else {
  2501. if(max_frame <= E1000_RXBUFFER_2048)
  2502. adapter->rx_buffer_len = E1000_RXBUFFER_2048;
  2503. else if(max_frame <= E1000_RXBUFFER_4096)
  2504. adapter->rx_buffer_len = E1000_RXBUFFER_4096;
  2505. else if(max_frame <= E1000_RXBUFFER_8192)
  2506. adapter->rx_buffer_len = E1000_RXBUFFER_8192;
  2507. else if(max_frame <= E1000_RXBUFFER_16384)
  2508. adapter->rx_buffer_len = E1000_RXBUFFER_16384;
  2509. }
  2510. }
  2511. netdev->mtu = new_mtu;
  2512. if (netif_running(netdev)) {
  2513. e1000_down(adapter);
  2514. e1000_up(adapter);
  2515. }
  2516. adapter->hw.max_frame_size = max_frame;
  2517. return 0;
  2518. }
  2519. /**
  2520. * e1000_update_stats - Update the board statistics counters
  2521. * @adapter: board private structure
  2522. **/
  2523. void
  2524. e1000_update_stats(struct e1000_adapter *adapter)
  2525. {
  2526. struct e1000_hw *hw = &adapter->hw;
  2527. unsigned long flags;
  2528. uint16_t phy_tmp;
  2529. #define PHY_IDLE_ERROR_COUNT_MASK 0x00FF
  2530. spin_lock_irqsave(&adapter->stats_lock, flags);
  2531. /* these counters are modified from e1000_adjust_tbi_stats,
  2532. * called from the interrupt context, so they must only
  2533. * be written while holding adapter->stats_lock
  2534. */
  2535. adapter->stats.crcerrs += E1000_READ_REG(hw, CRCERRS);
  2536. adapter->stats.gprc += E1000_READ_REG(hw, GPRC);
  2537. adapter->stats.gorcl += E1000_READ_REG(hw, GORCL);
  2538. adapter->stats.gorch += E1000_READ_REG(hw, GORCH);
  2539. adapter->stats.bprc += E1000_READ_REG(hw, BPRC);
  2540. adapter->stats.mprc += E1000_READ_REG(hw, MPRC);
  2541. adapter->stats.roc += E1000_READ_REG(hw, ROC);
  2542. adapter->stats.prc64 += E1000_READ_REG(hw, PRC64);
  2543. adapter->stats.prc127 += E1000_READ_REG(hw, PRC127);
  2544. adapter->stats.prc255 += E1000_READ_REG(hw, PRC255);
  2545. adapter->stats.prc511 += E1000_READ_REG(hw, PRC511);
  2546. adapter->stats.prc1023 += E1000_READ_REG(hw, PRC1023);
  2547. adapter->stats.prc1522 += E1000_READ_REG(hw, PRC1522);
  2548. adapter->stats.symerrs += E1000_READ_REG(hw, SYMERRS);
  2549. adapter->stats.mpc += E1000_READ_REG(hw, MPC);
  2550. adapter->stats.scc += E1000_READ_REG(hw, SCC);
  2551. adapter->stats.ecol += E1000_READ_REG(hw, ECOL);
  2552. adapter->stats.mcc += E1000_READ_REG(hw, MCC);
  2553. adapter->stats.latecol += E1000_READ_REG(hw, LATECOL);
  2554. adapter->stats.dc += E1000_READ_REG(hw, DC);
  2555. adapter->stats.sec += E1000_READ_REG(hw, SEC);
  2556. adapter->stats.rlec += E1000_READ_REG(hw, RLEC);
  2557. adapter->stats.xonrxc += E1000_READ_REG(hw, XONRXC);
  2558. adapter->stats.xontxc += E1000_READ_REG(hw, XONTXC);
  2559. adapter->stats.xoffrxc += E1000_READ_REG(hw, XOFFRXC);
  2560. adapter->stats.xofftxc += E1000_READ_REG(hw, XOFFTXC);
  2561. adapter->stats.fcruc += E1000_READ_REG(hw, FCRUC);
  2562. adapter->stats.gptc += E1000_READ_REG(hw, GPTC);
  2563. adapter->stats.gotcl += E1000_READ_REG(hw, GOTCL);
  2564. adapter->stats.gotch += E1000_READ_REG(hw, GOTCH);
  2565. adapter->stats.rnbc += E1000_READ_REG(hw, RNBC);
  2566. adapter->stats.ruc += E1000_READ_REG(hw, RUC);
  2567. adapter->stats.rfc += E1000_READ_REG(hw, RFC);
  2568. adapter->stats.rjc += E1000_READ_REG(hw, RJC);
  2569. adapter->stats.torl += E1000_READ_REG(hw, TORL);
  2570. adapter->stats.torh += E1000_READ_REG(hw, TORH);
  2571. adapter->stats.totl += E1000_READ_REG(hw, TOTL);
  2572. adapter->stats.toth += E1000_READ_REG(hw, TOTH);
  2573. adapter->stats.tpr += E1000_READ_REG(hw, TPR);
  2574. adapter->stats.ptc64 += E1000_READ_REG(hw, PTC64);
  2575. adapter->stats.ptc127 += E1000_READ_REG(hw, PTC127);
  2576. adapter->stats.ptc255 += E1000_READ_REG(hw, PTC255);
  2577. adapter->stats.ptc511 += E1000_READ_REG(hw, PTC511);
  2578. adapter->stats.ptc1023 += E1000_READ_REG(hw, PTC1023);
  2579. adapter->stats.ptc1522 += E1000_READ_REG(hw, PTC1522);
  2580. adapter->stats.mptc += E1000_READ_REG(hw, MPTC);
  2581. adapter->stats.bptc += E1000_READ_REG(hw, BPTC);
  2582. /* used for adaptive IFS */
  2583. hw->tx_packet_delta = E1000_READ_REG(hw, TPT);
  2584. adapter->stats.tpt += hw->tx_packet_delta;
  2585. hw->collision_delta = E1000_READ_REG(hw, COLC);
  2586. adapter->stats.colc += hw->collision_delta;
  2587. if (hw->mac_type >= e1000_82543) {
  2588. adapter->stats.algnerrc += E1000_READ_REG(hw, ALGNERRC);
  2589. adapter->stats.rxerrc += E1000_READ_REG(hw, RXERRC);
  2590. adapter->stats.tncrs += E1000_READ_REG(hw, TNCRS);
  2591. adapter->stats.cexterr += E1000_READ_REG(hw, CEXTERR);
  2592. adapter->stats.tsctc += E1000_READ_REG(hw, TSCTC);
  2593. adapter->stats.tsctfc += E1000_READ_REG(hw, TSCTFC);
  2594. }
  2595. if (hw->mac_type > e1000_82547_rev_2) {
  2596. adapter->stats.iac += E1000_READ_REG(hw, IAC);
  2597. adapter->stats.icrxoc += E1000_READ_REG(hw, ICRXOC);
  2598. adapter->stats.icrxptc += E1000_READ_REG(hw, ICRXPTC);
  2599. adapter->stats.icrxatc += E1000_READ_REG(hw, ICRXATC);
  2600. adapter->stats.ictxptc += E1000_READ_REG(hw, ICTXPTC);
  2601. adapter->stats.ictxatc += E1000_READ_REG(hw, ICTXATC);
  2602. adapter->stats.ictxqec += E1000_READ_REG(hw, ICTXQEC);
  2603. adapter->stats.ictxqmtc += E1000_READ_REG(hw, ICTXQMTC);
  2604. adapter->stats.icrxdmtc += E1000_READ_REG(hw, ICRXDMTC);
  2605. }
  2606. /* Fill out the OS statistics structure */
  2607. adapter->net_stats.rx_packets = adapter->stats.gprc;
  2608. adapter->net_stats.tx_packets = adapter->stats.gptc;
  2609. adapter->net_stats.rx_bytes = adapter->stats.gorcl;
  2610. adapter->net_stats.tx_bytes = adapter->stats.gotcl;
  2611. adapter->net_stats.multicast = adapter->stats.mprc;
  2612. adapter->net_stats.collisions = adapter->stats.colc;
  2613. /* Rx Errors */
  2614. adapter->net_stats.rx_errors = adapter->stats.rxerrc +
  2615. adapter->stats.crcerrs + adapter->stats.algnerrc +
  2616. adapter->stats.rlec + adapter->stats.cexterr;
  2617. adapter->net_stats.rx_dropped = 0;
  2618. adapter->net_stats.rx_length_errors = adapter->stats.rlec;
  2619. adapter->net_stats.rx_crc_errors = adapter->stats.crcerrs;
  2620. adapter->net_stats.rx_frame_errors = adapter->stats.algnerrc;
  2621. adapter->net_stats.rx_missed_errors = adapter->stats.mpc;
  2622. /* Tx Errors */
  2623. adapter->net_stats.tx_errors = adapter->stats.ecol +
  2624. adapter->stats.latecol;
  2625. adapter->net_stats.tx_aborted_errors = adapter->stats.ecol;
  2626. adapter->net_stats.tx_window_errors = adapter->stats.latecol;
  2627. adapter->net_stats.tx_carrier_errors = adapter->stats.tncrs;
  2628. /* Tx Dropped needs to be maintained elsewhere */
  2629. /* Phy Stats */
  2630. if (hw->media_type == e1000_media_type_copper) {
  2631. if ((adapter->link_speed == SPEED_1000) &&
  2632. (!e1000_read_phy_reg(hw, PHY_1000T_STATUS, &phy_tmp))) {
  2633. phy_tmp &= PHY_IDLE_ERROR_COUNT_MASK;
  2634. adapter->phy_stats.idle_errors += phy_tmp;
  2635. }
  2636. if ((hw->mac_type <= e1000_82546) &&
  2637. (hw->phy_type == e1000_phy_m88) &&
  2638. !e1000_read_phy_reg(hw, M88E1000_RX_ERR_CNTR, &phy_tmp))
  2639. adapter->phy_stats.receive_errors += phy_tmp;
  2640. }
  2641. spin_unlock_irqrestore(&adapter->stats_lock, flags);
  2642. }
  2643. /**
  2644. * e1000_intr - Interrupt Handler
  2645. * @irq: interrupt number
  2646. * @data: pointer to a network interface device structure
  2647. * @pt_regs: CPU registers structure
  2648. **/
  2649. static irqreturn_t
  2650. e1000_intr(int irq, void *data, struct pt_regs *regs)
  2651. {
  2652. struct net_device *netdev = data;
  2653. struct e1000_adapter *adapter = netdev_priv(netdev);
  2654. struct e1000_hw *hw = &adapter->hw;
  2655. uint32_t icr = E1000_READ_REG(hw, ICR);
  2656. #ifndef CONFIG_E1000_NAPI
  2657. int i;
  2658. #else
  2659. /* Interrupt Auto-Mask...upon reading ICR,
  2660. * interrupts are masked. No need for the
  2661. * IMC write, but it does mean we should
  2662. * account for it ASAP. */
  2663. if (likely(hw->mac_type >= e1000_82571))
  2664. atomic_inc(&adapter->irq_sem);
  2665. #endif
  2666. if (unlikely(!icr)) {
  2667. #ifdef CONFIG_E1000_NAPI
  2668. if (hw->mac_type >= e1000_82571)
  2669. e1000_irq_enable(adapter);
  2670. #endif
  2671. return IRQ_NONE; /* Not our interrupt */
  2672. }
  2673. if (unlikely(icr & (E1000_ICR_RXSEQ | E1000_ICR_LSC))) {
  2674. hw->get_link_status = 1;
  2675. mod_timer(&adapter->watchdog_timer, jiffies);
  2676. }
  2677. #ifdef CONFIG_E1000_NAPI
  2678. if (unlikely(hw->mac_type < e1000_82571)) {
  2679. atomic_inc(&adapter->irq_sem);
  2680. E1000_WRITE_REG(hw, IMC, ~0);
  2681. E1000_WRITE_FLUSH(hw);
  2682. }
  2683. if (likely(netif_rx_schedule_prep(&adapter->polling_netdev[0])))
  2684. __netif_rx_schedule(&adapter->polling_netdev[0]);
  2685. else
  2686. e1000_irq_enable(adapter);
  2687. #else
  2688. /* Writing IMC and IMS is needed for 82547.
  2689. * Due to Hub Link bus being occupied, an interrupt
  2690. * de-assertion message is not able to be sent.
  2691. * When an interrupt assertion message is generated later,
  2692. * two messages are re-ordered and sent out.
  2693. * That causes APIC to think 82547 is in de-assertion
  2694. * state, while 82547 is in assertion state, resulting
  2695. * in dead lock. Writing IMC forces 82547 into
  2696. * de-assertion state.
  2697. */
  2698. if (hw->mac_type == e1000_82547 || hw->mac_type == e1000_82547_rev_2) {
  2699. atomic_inc(&adapter->irq_sem);
  2700. E1000_WRITE_REG(hw, IMC, ~0);
  2701. }
  2702. for (i = 0; i < E1000_MAX_INTR; i++)
  2703. if (unlikely(!adapter->clean_rx(adapter, adapter->rx_ring) &
  2704. !e1000_clean_tx_irq(adapter, adapter->tx_ring)))
  2705. break;
  2706. if (hw->mac_type == e1000_82547 || hw->mac_type == e1000_82547_rev_2)
  2707. e1000_irq_enable(adapter);
  2708. #endif
  2709. return IRQ_HANDLED;
  2710. }
  2711. #ifdef CONFIG_E1000_NAPI
  2712. /**
  2713. * e1000_clean - NAPI Rx polling callback
  2714. * @adapter: board private structure
  2715. **/
  2716. static int
  2717. e1000_clean(struct net_device *poll_dev, int *budget)
  2718. {
  2719. struct e1000_adapter *adapter;
  2720. int work_to_do = min(*budget, poll_dev->quota);
  2721. int tx_cleaned = 0, i = 0, work_done = 0;
  2722. /* Must NOT use netdev_priv macro here. */
  2723. adapter = poll_dev->priv;
  2724. /* Keep link state information with original netdev */
  2725. if (!netif_carrier_ok(adapter->netdev))
  2726. goto quit_polling;
  2727. while (poll_dev != &adapter->polling_netdev[i]) {
  2728. i++;
  2729. if (unlikely(i == adapter->num_rx_queues))
  2730. BUG();
  2731. }
  2732. if (likely(adapter->num_tx_queues == 1)) {
  2733. /* e1000_clean is called per-cpu. This lock protects
  2734. * tx_ring[0] from being cleaned by multiple cpus
  2735. * simultaneously. A failure obtaining the lock means
  2736. * tx_ring[0] is currently being cleaned anyway. */
  2737. if (spin_trylock(&adapter->tx_queue_lock)) {
  2738. tx_cleaned = e1000_clean_tx_irq(adapter,
  2739. &adapter->tx_ring[0]);
  2740. spin_unlock(&adapter->tx_queue_lock);
  2741. }
  2742. } else
  2743. tx_cleaned = e1000_clean_tx_irq(adapter, &adapter->tx_ring[i]);
  2744. adapter->clean_rx(adapter, &adapter->rx_ring[i],
  2745. &work_done, work_to_do);
  2746. *budget -= work_done;
  2747. poll_dev->quota -= work_done;
  2748. /* If no Tx and not enough Rx work done, exit the polling mode */
  2749. if ((!tx_cleaned && (work_done == 0)) ||
  2750. !netif_running(adapter->netdev)) {
  2751. quit_polling:
  2752. netif_rx_complete(poll_dev);
  2753. e1000_irq_enable(adapter);
  2754. return 0;
  2755. }
  2756. return 1;
  2757. }
  2758. #endif
  2759. /**
  2760. * e1000_clean_tx_irq - Reclaim resources after transmit completes
  2761. * @adapter: board private structure
  2762. **/
  2763. static boolean_t
  2764. e1000_clean_tx_irq(struct e1000_adapter *adapter,
  2765. struct e1000_tx_ring *tx_ring)
  2766. {
  2767. struct net_device *netdev = adapter->netdev;
  2768. struct e1000_tx_desc *tx_desc, *eop_desc;
  2769. struct e1000_buffer *buffer_info;
  2770. unsigned int i, eop;
  2771. boolean_t cleaned = FALSE;
  2772. i = tx_ring->next_to_clean;
  2773. eop = tx_ring->buffer_info[i].next_to_watch;
  2774. eop_desc = E1000_TX_DESC(*tx_ring, eop);
  2775. while (eop_desc->upper.data & cpu_to_le32(E1000_TXD_STAT_DD)) {
  2776. for (cleaned = FALSE; !cleaned; ) {
  2777. tx_desc = E1000_TX_DESC(*tx_ring, i);
  2778. buffer_info = &tx_ring->buffer_info[i];
  2779. cleaned = (i == eop);
  2780. e1000_unmap_and_free_tx_resource(adapter, buffer_info);
  2781. memset(tx_desc, 0, sizeof(struct e1000_tx_desc));
  2782. if (unlikely(++i == tx_ring->count)) i = 0;
  2783. }
  2784. eop = tx_ring->buffer_info[i].next_to_watch;
  2785. eop_desc = E1000_TX_DESC(*tx_ring, eop);
  2786. }
  2787. tx_ring->next_to_clean = i;
  2788. spin_lock(&tx_ring->tx_lock);
  2789. if (unlikely(cleaned && netif_queue_stopped(netdev) &&
  2790. netif_carrier_ok(netdev)))
  2791. netif_wake_queue(netdev);
  2792. spin_unlock(&tx_ring->tx_lock);
  2793. if (adapter->detect_tx_hung) {
  2794. /* Detect a transmit hang in hardware, this serializes the
  2795. * check with the clearing of time_stamp and movement of i */
  2796. adapter->detect_tx_hung = FALSE;
  2797. if (tx_ring->buffer_info[eop].dma &&
  2798. time_after(jiffies, tx_ring->buffer_info[eop].time_stamp +
  2799. adapter->tx_timeout_factor * HZ)
  2800. && !(E1000_READ_REG(&adapter->hw, STATUS) &
  2801. E1000_STATUS_TXOFF)) {
  2802. /* detected Tx unit hang */
  2803. DPRINTK(DRV, ERR, "Detected Tx Unit Hang\n"
  2804. " Tx Queue <%lu>\n"
  2805. " TDH <%x>\n"
  2806. " TDT <%x>\n"
  2807. " next_to_use <%x>\n"
  2808. " next_to_clean <%x>\n"
  2809. "buffer_info[next_to_clean]\n"
  2810. " time_stamp <%lx>\n"
  2811. " next_to_watch <%x>\n"
  2812. " jiffies <%lx>\n"
  2813. " next_to_watch.status <%x>\n",
  2814. (unsigned long)((tx_ring - adapter->tx_ring) /
  2815. sizeof(struct e1000_tx_ring)),
  2816. readl(adapter->hw.hw_addr + tx_ring->tdh),
  2817. readl(adapter->hw.hw_addr + tx_ring->tdt),
  2818. tx_ring->next_to_use,
  2819. tx_ring->next_to_clean,
  2820. tx_ring->buffer_info[eop].time_stamp,
  2821. eop,
  2822. jiffies,
  2823. eop_desc->upper.fields.status);
  2824. netif_stop_queue(netdev);
  2825. }
  2826. }
  2827. return cleaned;
  2828. }
  2829. /**
  2830. * e1000_rx_checksum - Receive Checksum Offload for 82543
  2831. * @adapter: board private structure
  2832. * @status_err: receive descriptor status and error fields
  2833. * @csum: receive descriptor csum field
  2834. * @sk_buff: socket buffer with received data
  2835. **/
  2836. static inline void
  2837. e1000_rx_checksum(struct e1000_adapter *adapter,
  2838. uint32_t status_err, uint32_t csum,
  2839. struct sk_buff *skb)
  2840. {
  2841. uint16_t status = (uint16_t)status_err;
  2842. uint8_t errors = (uint8_t)(status_err >> 24);
  2843. skb->ip_summed = CHECKSUM_NONE;
  2844. /* 82543 or newer only */
  2845. if (unlikely(adapter->hw.mac_type < e1000_82543)) return;
  2846. /* Ignore Checksum bit is set */
  2847. if (unlikely(status & E1000_RXD_STAT_IXSM)) return;
  2848. /* TCP/UDP checksum error bit is set */
  2849. if (unlikely(errors & E1000_RXD_ERR_TCPE)) {
  2850. /* let the stack verify checksum errors */
  2851. adapter->hw_csum_err++;
  2852. return;
  2853. }
  2854. /* TCP/UDP Checksum has not been calculated */
  2855. if (adapter->hw.mac_type <= e1000_82547_rev_2) {
  2856. if (!(status & E1000_RXD_STAT_TCPCS))
  2857. return;
  2858. } else {
  2859. if (!(status & (E1000_RXD_STAT_TCPCS | E1000_RXD_STAT_UDPCS)))
  2860. return;
  2861. }
  2862. /* It must be a TCP or UDP packet with a valid checksum */
  2863. if (likely(status & E1000_RXD_STAT_TCPCS)) {
  2864. /* TCP checksum is good */
  2865. skb->ip_summed = CHECKSUM_UNNECESSARY;
  2866. } else if (adapter->hw.mac_type > e1000_82547_rev_2) {
  2867. /* IP fragment with UDP payload */
  2868. /* Hardware complements the payload checksum, so we undo it
  2869. * and then put the value in host order for further stack use.
  2870. */
  2871. csum = ntohl(csum ^ 0xFFFF);
  2872. skb->csum = csum;
  2873. skb->ip_summed = CHECKSUM_HW;
  2874. }
  2875. adapter->hw_csum_good++;
  2876. }
  2877. /**
  2878. * e1000_clean_rx_irq - Send received data up the network stack; legacy
  2879. * @adapter: board private structure
  2880. **/
  2881. static boolean_t
  2882. #ifdef CONFIG_E1000_NAPI
  2883. e1000_clean_rx_irq(struct e1000_adapter *adapter,
  2884. struct e1000_rx_ring *rx_ring,
  2885. int *work_done, int work_to_do)
  2886. #else
  2887. e1000_clean_rx_irq(struct e1000_adapter *adapter,
  2888. struct e1000_rx_ring *rx_ring)
  2889. #endif
  2890. {
  2891. struct net_device *netdev = adapter->netdev;
  2892. struct pci_dev *pdev = adapter->pdev;
  2893. struct e1000_rx_desc *rx_desc, *next_rxd;
  2894. struct e1000_buffer *buffer_info, *next_buffer;
  2895. unsigned long flags;
  2896. uint32_t length;
  2897. uint8_t last_byte;
  2898. unsigned int i;
  2899. int cleaned_count = 0;
  2900. boolean_t cleaned = FALSE;
  2901. i = rx_ring->next_to_clean;
  2902. rx_desc = E1000_RX_DESC(*rx_ring, i);
  2903. buffer_info = &rx_ring->buffer_info[i];
  2904. while (rx_desc->status & E1000_RXD_STAT_DD) {
  2905. struct sk_buff *skb, *next_skb;
  2906. u8 status;
  2907. #ifdef CONFIG_E1000_NAPI
  2908. if (*work_done >= work_to_do)
  2909. break;
  2910. (*work_done)++;
  2911. #endif
  2912. status = rx_desc->status;
  2913. skb = buffer_info->skb;
  2914. buffer_info->skb = NULL;
  2915. if (++i == rx_ring->count) i = 0;
  2916. next_rxd = E1000_RX_DESC(*rx_ring, i);
  2917. next_buffer = &rx_ring->buffer_info[i];
  2918. next_skb = next_buffer->skb;
  2919. cleaned = TRUE;
  2920. cleaned_count++;
  2921. pci_unmap_single(pdev,
  2922. buffer_info->dma,
  2923. buffer_info->length,
  2924. PCI_DMA_FROMDEVICE);
  2925. length = le16_to_cpu(rx_desc->length);
  2926. if (unlikely(!(status & E1000_RXD_STAT_EOP))) {
  2927. /* All receives must fit into a single buffer */
  2928. E1000_DBG("%s: Receive packet consumed multiple"
  2929. " buffers\n", netdev->name);
  2930. dev_kfree_skb_irq(skb);
  2931. goto next_desc;
  2932. }
  2933. if (unlikely(rx_desc->errors & E1000_RXD_ERR_FRAME_ERR_MASK)) {
  2934. last_byte = *(skb->data + length - 1);
  2935. if (TBI_ACCEPT(&adapter->hw, status,
  2936. rx_desc->errors, length, last_byte)) {
  2937. spin_lock_irqsave(&adapter->stats_lock, flags);
  2938. e1000_tbi_adjust_stats(&adapter->hw,
  2939. &adapter->stats,
  2940. length, skb->data);
  2941. spin_unlock_irqrestore(&adapter->stats_lock,
  2942. flags);
  2943. length--;
  2944. } else {
  2945. dev_kfree_skb_irq(skb);
  2946. goto next_desc;
  2947. }
  2948. }
  2949. /* code added for copybreak, this should improve
  2950. * performance for small packets with large amounts
  2951. * of reassembly being done in the stack */
  2952. #define E1000_CB_LENGTH 256
  2953. if (length < E1000_CB_LENGTH) {
  2954. struct sk_buff *new_skb =
  2955. dev_alloc_skb(length + NET_IP_ALIGN);
  2956. if (new_skb) {
  2957. skb_reserve(new_skb, NET_IP_ALIGN);
  2958. new_skb->dev = netdev;
  2959. memcpy(new_skb->data - NET_IP_ALIGN,
  2960. skb->data - NET_IP_ALIGN,
  2961. length + NET_IP_ALIGN);
  2962. /* save the skb in buffer_info as good */
  2963. buffer_info->skb = skb;
  2964. skb = new_skb;
  2965. skb_put(skb, length);
  2966. }
  2967. } else
  2968. skb_put(skb, length);
  2969. /* end copybreak code */
  2970. /* Receive Checksum Offload */
  2971. e1000_rx_checksum(adapter,
  2972. (uint32_t)(status) |
  2973. ((uint32_t)(rx_desc->errors) << 24),
  2974. rx_desc->csum, skb);
  2975. skb->protocol = eth_type_trans(skb, netdev);
  2976. #ifdef CONFIG_E1000_NAPI
  2977. if (unlikely(adapter->vlgrp &&
  2978. (status & E1000_RXD_STAT_VP))) {
  2979. vlan_hwaccel_receive_skb(skb, adapter->vlgrp,
  2980. le16_to_cpu(rx_desc->special) &
  2981. E1000_RXD_SPC_VLAN_MASK);
  2982. } else {
  2983. netif_receive_skb(skb);
  2984. }
  2985. #else /* CONFIG_E1000_NAPI */
  2986. if (unlikely(adapter->vlgrp &&
  2987. (status & E1000_RXD_STAT_VP))) {
  2988. vlan_hwaccel_rx(skb, adapter->vlgrp,
  2989. le16_to_cpu(rx_desc->special) &
  2990. E1000_RXD_SPC_VLAN_MASK);
  2991. } else {
  2992. netif_rx(skb);
  2993. }
  2994. #endif /* CONFIG_E1000_NAPI */
  2995. netdev->last_rx = jiffies;
  2996. next_desc:
  2997. rx_desc->status = 0;
  2998. /* return some buffers to hardware, one at a time is too slow */
  2999. if (unlikely(cleaned_count >= E1000_RX_BUFFER_WRITE)) {
  3000. adapter->alloc_rx_buf(adapter, rx_ring, cleaned_count);
  3001. cleaned_count = 0;
  3002. }
  3003. rx_desc = next_rxd;
  3004. buffer_info = next_buffer;
  3005. }
  3006. rx_ring->next_to_clean = i;
  3007. cleaned_count = E1000_DESC_UNUSED(rx_ring);
  3008. if (cleaned_count)
  3009. adapter->alloc_rx_buf(adapter, rx_ring, cleaned_count);
  3010. return cleaned;
  3011. }
  3012. /**
  3013. * e1000_clean_rx_irq_ps - Send received data up the network stack; packet split
  3014. * @adapter: board private structure
  3015. **/
  3016. static boolean_t
  3017. #ifdef CONFIG_E1000_NAPI
  3018. e1000_clean_rx_irq_ps(struct e1000_adapter *adapter,
  3019. struct e1000_rx_ring *rx_ring,
  3020. int *work_done, int work_to_do)
  3021. #else
  3022. e1000_clean_rx_irq_ps(struct e1000_adapter *adapter,
  3023. struct e1000_rx_ring *rx_ring)
  3024. #endif
  3025. {
  3026. union e1000_rx_desc_packet_split *rx_desc, *next_rxd;
  3027. struct net_device *netdev = adapter->netdev;
  3028. struct pci_dev *pdev = adapter->pdev;
  3029. struct e1000_buffer *buffer_info, *next_buffer;
  3030. struct e1000_ps_page *ps_page;
  3031. struct e1000_ps_page_dma *ps_page_dma;
  3032. struct sk_buff *skb, *next_skb;
  3033. unsigned int i, j;
  3034. uint32_t length, staterr;
  3035. int cleaned_count = 0;
  3036. boolean_t cleaned = FALSE;
  3037. i = rx_ring->next_to_clean;
  3038. rx_desc = E1000_RX_DESC_PS(*rx_ring, i);
  3039. staterr = le32_to_cpu(rx_desc->wb.middle.status_error);
  3040. buffer_info = &rx_ring->buffer_info[i];
  3041. while (staterr & E1000_RXD_STAT_DD) {
  3042. ps_page = &rx_ring->ps_page[i];
  3043. ps_page_dma = &rx_ring->ps_page_dma[i];
  3044. #ifdef CONFIG_E1000_NAPI
  3045. if (unlikely(*work_done >= work_to_do))
  3046. break;
  3047. (*work_done)++;
  3048. #endif
  3049. skb = buffer_info->skb;
  3050. if (++i == rx_ring->count) i = 0;
  3051. next_rxd = E1000_RX_DESC_PS(*rx_ring, i);
  3052. next_buffer = &rx_ring->buffer_info[i];
  3053. next_skb = next_buffer->skb;
  3054. cleaned = TRUE;
  3055. cleaned_count++;
  3056. pci_unmap_single(pdev, buffer_info->dma,
  3057. buffer_info->length,
  3058. PCI_DMA_FROMDEVICE);
  3059. if (unlikely(!(staterr & E1000_RXD_STAT_EOP))) {
  3060. E1000_DBG("%s: Packet Split buffers didn't pick up"
  3061. " the full packet\n", netdev->name);
  3062. dev_kfree_skb_irq(skb);
  3063. goto next_desc;
  3064. }
  3065. if (unlikely(staterr & E1000_RXDEXT_ERR_FRAME_ERR_MASK)) {
  3066. dev_kfree_skb_irq(skb);
  3067. goto next_desc;
  3068. }
  3069. length = le16_to_cpu(rx_desc->wb.middle.length0);
  3070. if (unlikely(!length)) {
  3071. E1000_DBG("%s: Last part of the packet spanning"
  3072. " multiple descriptors\n", netdev->name);
  3073. dev_kfree_skb_irq(skb);
  3074. goto next_desc;
  3075. }
  3076. /* Good Receive */
  3077. skb_put(skb, length);
  3078. for (j = 0; j < adapter->rx_ps_pages; j++) {
  3079. if (!(length = le16_to_cpu(rx_desc->wb.upper.length[j])))
  3080. break;
  3081. pci_unmap_page(pdev, ps_page_dma->ps_page_dma[j],
  3082. PAGE_SIZE, PCI_DMA_FROMDEVICE);
  3083. ps_page_dma->ps_page_dma[j] = 0;
  3084. skb_shinfo(skb)->frags[j].page =
  3085. ps_page->ps_page[j];
  3086. ps_page->ps_page[j] = NULL;
  3087. skb_shinfo(skb)->frags[j].page_offset = 0;
  3088. skb_shinfo(skb)->frags[j].size = length;
  3089. skb_shinfo(skb)->nr_frags++;
  3090. skb->len += length;
  3091. skb->data_len += length;
  3092. }
  3093. e1000_rx_checksum(adapter, staterr,
  3094. rx_desc->wb.lower.hi_dword.csum_ip.csum, skb);
  3095. skb->protocol = eth_type_trans(skb, netdev);
  3096. if (likely(rx_desc->wb.upper.header_status &
  3097. E1000_RXDPS_HDRSTAT_HDRSP))
  3098. adapter->rx_hdr_split++;
  3099. #ifdef CONFIG_E1000_NAPI
  3100. if (unlikely(adapter->vlgrp && (staterr & E1000_RXD_STAT_VP))) {
  3101. vlan_hwaccel_receive_skb(skb, adapter->vlgrp,
  3102. le16_to_cpu(rx_desc->wb.middle.vlan) &
  3103. E1000_RXD_SPC_VLAN_MASK);
  3104. } else {
  3105. netif_receive_skb(skb);
  3106. }
  3107. #else /* CONFIG_E1000_NAPI */
  3108. if (unlikely(adapter->vlgrp && (staterr & E1000_RXD_STAT_VP))) {
  3109. vlan_hwaccel_rx(skb, adapter->vlgrp,
  3110. le16_to_cpu(rx_desc->wb.middle.vlan) &
  3111. E1000_RXD_SPC_VLAN_MASK);
  3112. } else {
  3113. netif_rx(skb);
  3114. }
  3115. #endif /* CONFIG_E1000_NAPI */
  3116. netdev->last_rx = jiffies;
  3117. next_desc:
  3118. rx_desc->wb.middle.status_error &= ~0xFF;
  3119. buffer_info->skb = NULL;
  3120. /* return some buffers to hardware, one at a time is too slow */
  3121. if (unlikely(cleaned_count >= E1000_RX_BUFFER_WRITE)) {
  3122. adapter->alloc_rx_buf(adapter, rx_ring, cleaned_count);
  3123. cleaned_count = 0;
  3124. }
  3125. rx_desc = next_rxd;
  3126. buffer_info = next_buffer;
  3127. staterr = le32_to_cpu(rx_desc->wb.middle.status_error);
  3128. }
  3129. rx_ring->next_to_clean = i;
  3130. cleaned_count = E1000_DESC_UNUSED(rx_ring);
  3131. if (cleaned_count)
  3132. adapter->alloc_rx_buf(adapter, rx_ring, cleaned_count);
  3133. return cleaned;
  3134. }
  3135. /**
  3136. * e1000_alloc_rx_buffers - Replace used receive buffers; legacy & extended
  3137. * @adapter: address of board private structure
  3138. **/
  3139. static void
  3140. e1000_alloc_rx_buffers(struct e1000_adapter *adapter,
  3141. struct e1000_rx_ring *rx_ring,
  3142. int cleaned_count)
  3143. {
  3144. struct net_device *netdev = adapter->netdev;
  3145. struct pci_dev *pdev = adapter->pdev;
  3146. struct e1000_rx_desc *rx_desc;
  3147. struct e1000_buffer *buffer_info;
  3148. struct sk_buff *skb;
  3149. unsigned int i;
  3150. unsigned int bufsz = adapter->rx_buffer_len + NET_IP_ALIGN;
  3151. i = rx_ring->next_to_use;
  3152. buffer_info = &rx_ring->buffer_info[i];
  3153. while (cleaned_count--) {
  3154. if (!(skb = buffer_info->skb))
  3155. skb = dev_alloc_skb(bufsz);
  3156. else {
  3157. skb_trim(skb, 0);
  3158. goto map_skb;
  3159. }
  3160. if (unlikely(!skb)) {
  3161. /* Better luck next round */
  3162. adapter->alloc_rx_buff_failed++;
  3163. break;
  3164. }
  3165. /* Fix for errata 23, can't cross 64kB boundary */
  3166. if (!e1000_check_64k_bound(adapter, skb->data, bufsz)) {
  3167. struct sk_buff *oldskb = skb;
  3168. DPRINTK(RX_ERR, ERR, "skb align check failed: %u bytes "
  3169. "at %p\n", bufsz, skb->data);
  3170. /* Try again, without freeing the previous */
  3171. skb = dev_alloc_skb(bufsz);
  3172. /* Failed allocation, critical failure */
  3173. if (!skb) {
  3174. dev_kfree_skb(oldskb);
  3175. break;
  3176. }
  3177. if (!e1000_check_64k_bound(adapter, skb->data, bufsz)) {
  3178. /* give up */
  3179. dev_kfree_skb(skb);
  3180. dev_kfree_skb(oldskb);
  3181. break; /* while !buffer_info->skb */
  3182. } else {
  3183. /* Use new allocation */
  3184. dev_kfree_skb(oldskb);
  3185. }
  3186. }
  3187. /* Make buffer alignment 2 beyond a 16 byte boundary
  3188. * this will result in a 16 byte aligned IP header after
  3189. * the 14 byte MAC header is removed
  3190. */
  3191. skb_reserve(skb, NET_IP_ALIGN);
  3192. skb->dev = netdev;
  3193. buffer_info->skb = skb;
  3194. buffer_info->length = adapter->rx_buffer_len;
  3195. map_skb:
  3196. buffer_info->dma = pci_map_single(pdev,
  3197. skb->data,
  3198. adapter->rx_buffer_len,
  3199. PCI_DMA_FROMDEVICE);
  3200. /* Fix for errata 23, can't cross 64kB boundary */
  3201. if (!e1000_check_64k_bound(adapter,
  3202. (void *)(unsigned long)buffer_info->dma,
  3203. adapter->rx_buffer_len)) {
  3204. DPRINTK(RX_ERR, ERR,
  3205. "dma align check failed: %u bytes at %p\n",
  3206. adapter->rx_buffer_len,
  3207. (void *)(unsigned long)buffer_info->dma);
  3208. dev_kfree_skb(skb);
  3209. buffer_info->skb = NULL;
  3210. pci_unmap_single(pdev, buffer_info->dma,
  3211. adapter->rx_buffer_len,
  3212. PCI_DMA_FROMDEVICE);
  3213. break; /* while !buffer_info->skb */
  3214. }
  3215. rx_desc = E1000_RX_DESC(*rx_ring, i);
  3216. rx_desc->buffer_addr = cpu_to_le64(buffer_info->dma);
  3217. if (unlikely(++i == rx_ring->count))
  3218. i = 0;
  3219. buffer_info = &rx_ring->buffer_info[i];
  3220. }
  3221. if (likely(rx_ring->next_to_use != i)) {
  3222. rx_ring->next_to_use = i;
  3223. if (unlikely(i-- == 0))
  3224. i = (rx_ring->count - 1);
  3225. /* Force memory writes to complete before letting h/w
  3226. * know there are new descriptors to fetch. (Only
  3227. * applicable for weak-ordered memory model archs,
  3228. * such as IA-64). */
  3229. wmb();
  3230. writel(i, adapter->hw.hw_addr + rx_ring->rdt);
  3231. }
  3232. }
  3233. /**
  3234. * e1000_alloc_rx_buffers_ps - Replace used receive buffers; packet split
  3235. * @adapter: address of board private structure
  3236. **/
  3237. static void
  3238. e1000_alloc_rx_buffers_ps(struct e1000_adapter *adapter,
  3239. struct e1000_rx_ring *rx_ring,
  3240. int cleaned_count)
  3241. {
  3242. struct net_device *netdev = adapter->netdev;
  3243. struct pci_dev *pdev = adapter->pdev;
  3244. union e1000_rx_desc_packet_split *rx_desc;
  3245. struct e1000_buffer *buffer_info;
  3246. struct e1000_ps_page *ps_page;
  3247. struct e1000_ps_page_dma *ps_page_dma;
  3248. struct sk_buff *skb;
  3249. unsigned int i, j;
  3250. i = rx_ring->next_to_use;
  3251. buffer_info = &rx_ring->buffer_info[i];
  3252. ps_page = &rx_ring->ps_page[i];
  3253. ps_page_dma = &rx_ring->ps_page_dma[i];
  3254. while (cleaned_count--) {
  3255. rx_desc = E1000_RX_DESC_PS(*rx_ring, i);
  3256. for (j = 0; j < PS_PAGE_BUFFERS; j++) {
  3257. if (j < adapter->rx_ps_pages) {
  3258. if (likely(!ps_page->ps_page[j])) {
  3259. ps_page->ps_page[j] =
  3260. alloc_page(GFP_ATOMIC);
  3261. if (unlikely(!ps_page->ps_page[j])) {
  3262. adapter->alloc_rx_buff_failed++;
  3263. goto no_buffers;
  3264. }
  3265. ps_page_dma->ps_page_dma[j] =
  3266. pci_map_page(pdev,
  3267. ps_page->ps_page[j],
  3268. 0, PAGE_SIZE,
  3269. PCI_DMA_FROMDEVICE);
  3270. }
  3271. /* Refresh the desc even if buffer_addrs didn't
  3272. * change because each write-back erases
  3273. * this info.
  3274. */
  3275. rx_desc->read.buffer_addr[j+1] =
  3276. cpu_to_le64(ps_page_dma->ps_page_dma[j]);
  3277. } else
  3278. rx_desc->read.buffer_addr[j+1] = ~0;
  3279. }
  3280. skb = dev_alloc_skb(adapter->rx_ps_bsize0 + NET_IP_ALIGN);
  3281. if (unlikely(!skb)) {
  3282. adapter->alloc_rx_buff_failed++;
  3283. break;
  3284. }
  3285. /* Make buffer alignment 2 beyond a 16 byte boundary
  3286. * this will result in a 16 byte aligned IP header after
  3287. * the 14 byte MAC header is removed
  3288. */
  3289. skb_reserve(skb, NET_IP_ALIGN);
  3290. skb->dev = netdev;
  3291. buffer_info->skb = skb;
  3292. buffer_info->length = adapter->rx_ps_bsize0;
  3293. buffer_info->dma = pci_map_single(pdev, skb->data,
  3294. adapter->rx_ps_bsize0,
  3295. PCI_DMA_FROMDEVICE);
  3296. rx_desc->read.buffer_addr[0] = cpu_to_le64(buffer_info->dma);
  3297. if (unlikely(++i == rx_ring->count)) i = 0;
  3298. buffer_info = &rx_ring->buffer_info[i];
  3299. ps_page = &rx_ring->ps_page[i];
  3300. ps_page_dma = &rx_ring->ps_page_dma[i];
  3301. }
  3302. no_buffers:
  3303. if (likely(rx_ring->next_to_use != i)) {
  3304. rx_ring->next_to_use = i;
  3305. if (unlikely(i-- == 0)) i = (rx_ring->count - 1);
  3306. /* Force memory writes to complete before letting h/w
  3307. * know there are new descriptors to fetch. (Only
  3308. * applicable for weak-ordered memory model archs,
  3309. * such as IA-64). */
  3310. wmb();
  3311. /* Hardware increments by 16 bytes, but packet split
  3312. * descriptors are 32 bytes...so we increment tail
  3313. * twice as much.
  3314. */
  3315. writel(i<<1, adapter->hw.hw_addr + rx_ring->rdt);
  3316. }
  3317. }
  3318. /**
  3319. * e1000_smartspeed - Workaround for SmartSpeed on 82541 and 82547 controllers.
  3320. * @adapter:
  3321. **/
  3322. static void
  3323. e1000_smartspeed(struct e1000_adapter *adapter)
  3324. {
  3325. uint16_t phy_status;
  3326. uint16_t phy_ctrl;
  3327. if ((adapter->hw.phy_type != e1000_phy_igp) || !adapter->hw.autoneg ||
  3328. !(adapter->hw.autoneg_advertised & ADVERTISE_1000_FULL))
  3329. return;
  3330. if (adapter->smartspeed == 0) {
  3331. /* If Master/Slave config fault is asserted twice,
  3332. * we assume back-to-back */
  3333. e1000_read_phy_reg(&adapter->hw, PHY_1000T_STATUS, &phy_status);
  3334. if (!(phy_status & SR_1000T_MS_CONFIG_FAULT)) return;
  3335. e1000_read_phy_reg(&adapter->hw, PHY_1000T_STATUS, &phy_status);
  3336. if (!(phy_status & SR_1000T_MS_CONFIG_FAULT)) return;
  3337. e1000_read_phy_reg(&adapter->hw, PHY_1000T_CTRL, &phy_ctrl);
  3338. if (phy_ctrl & CR_1000T_MS_ENABLE) {
  3339. phy_ctrl &= ~CR_1000T_MS_ENABLE;
  3340. e1000_write_phy_reg(&adapter->hw, PHY_1000T_CTRL,
  3341. phy_ctrl);
  3342. adapter->smartspeed++;
  3343. if (!e1000_phy_setup_autoneg(&adapter->hw) &&
  3344. !e1000_read_phy_reg(&adapter->hw, PHY_CTRL,
  3345. &phy_ctrl)) {
  3346. phy_ctrl |= (MII_CR_AUTO_NEG_EN |
  3347. MII_CR_RESTART_AUTO_NEG);
  3348. e1000_write_phy_reg(&adapter->hw, PHY_CTRL,
  3349. phy_ctrl);
  3350. }
  3351. }
  3352. return;
  3353. } else if (adapter->smartspeed == E1000_SMARTSPEED_DOWNSHIFT) {
  3354. /* If still no link, perhaps using 2/3 pair cable */
  3355. e1000_read_phy_reg(&adapter->hw, PHY_1000T_CTRL, &phy_ctrl);
  3356. phy_ctrl |= CR_1000T_MS_ENABLE;
  3357. e1000_write_phy_reg(&adapter->hw, PHY_1000T_CTRL, phy_ctrl);
  3358. if (!e1000_phy_setup_autoneg(&adapter->hw) &&
  3359. !e1000_read_phy_reg(&adapter->hw, PHY_CTRL, &phy_ctrl)) {
  3360. phy_ctrl |= (MII_CR_AUTO_NEG_EN |
  3361. MII_CR_RESTART_AUTO_NEG);
  3362. e1000_write_phy_reg(&adapter->hw, PHY_CTRL, phy_ctrl);
  3363. }
  3364. }
  3365. /* Restart process after E1000_SMARTSPEED_MAX iterations */
  3366. if (adapter->smartspeed++ == E1000_SMARTSPEED_MAX)
  3367. adapter->smartspeed = 0;
  3368. }
  3369. /**
  3370. * e1000_ioctl -
  3371. * @netdev:
  3372. * @ifreq:
  3373. * @cmd:
  3374. **/
  3375. static int
  3376. e1000_ioctl(struct net_device *netdev, struct ifreq *ifr, int cmd)
  3377. {
  3378. switch (cmd) {
  3379. case SIOCGMIIPHY:
  3380. case SIOCGMIIREG:
  3381. case SIOCSMIIREG:
  3382. return e1000_mii_ioctl(netdev, ifr, cmd);
  3383. default:
  3384. return -EOPNOTSUPP;
  3385. }
  3386. }
  3387. /**
  3388. * e1000_mii_ioctl -
  3389. * @netdev:
  3390. * @ifreq:
  3391. * @cmd:
  3392. **/
  3393. static int
  3394. e1000_mii_ioctl(struct net_device *netdev, struct ifreq *ifr, int cmd)
  3395. {
  3396. struct e1000_adapter *adapter = netdev_priv(netdev);
  3397. struct mii_ioctl_data *data = if_mii(ifr);
  3398. int retval;
  3399. uint16_t mii_reg;
  3400. uint16_t spddplx;
  3401. unsigned long flags;
  3402. if (adapter->hw.media_type != e1000_media_type_copper)
  3403. return -EOPNOTSUPP;
  3404. switch (cmd) {
  3405. case SIOCGMIIPHY:
  3406. data->phy_id = adapter->hw.phy_addr;
  3407. break;
  3408. case SIOCGMIIREG:
  3409. if (!capable(CAP_NET_ADMIN))
  3410. return -EPERM;
  3411. spin_lock_irqsave(&adapter->stats_lock, flags);
  3412. if (e1000_read_phy_reg(&adapter->hw, data->reg_num & 0x1F,
  3413. &data->val_out)) {
  3414. spin_unlock_irqrestore(&adapter->stats_lock, flags);
  3415. return -EIO;
  3416. }
  3417. spin_unlock_irqrestore(&adapter->stats_lock, flags);
  3418. break;
  3419. case SIOCSMIIREG:
  3420. if (!capable(CAP_NET_ADMIN))
  3421. return -EPERM;
  3422. if (data->reg_num & ~(0x1F))
  3423. return -EFAULT;
  3424. mii_reg = data->val_in;
  3425. spin_lock_irqsave(&adapter->stats_lock, flags);
  3426. if (e1000_write_phy_reg(&adapter->hw, data->reg_num,
  3427. mii_reg)) {
  3428. spin_unlock_irqrestore(&adapter->stats_lock, flags);
  3429. return -EIO;
  3430. }
  3431. if (adapter->hw.phy_type == e1000_phy_m88) {
  3432. switch (data->reg_num) {
  3433. case PHY_CTRL:
  3434. if (mii_reg & MII_CR_POWER_DOWN)
  3435. break;
  3436. if (mii_reg & MII_CR_AUTO_NEG_EN) {
  3437. adapter->hw.autoneg = 1;
  3438. adapter->hw.autoneg_advertised = 0x2F;
  3439. } else {
  3440. if (mii_reg & 0x40)
  3441. spddplx = SPEED_1000;
  3442. else if (mii_reg & 0x2000)
  3443. spddplx = SPEED_100;
  3444. else
  3445. spddplx = SPEED_10;
  3446. spddplx += (mii_reg & 0x100)
  3447. ? FULL_DUPLEX :
  3448. HALF_DUPLEX;
  3449. retval = e1000_set_spd_dplx(adapter,
  3450. spddplx);
  3451. if (retval) {
  3452. spin_unlock_irqrestore(
  3453. &adapter->stats_lock,
  3454. flags);
  3455. return retval;
  3456. }
  3457. }
  3458. if (netif_running(adapter->netdev)) {
  3459. e1000_down(adapter);
  3460. e1000_up(adapter);
  3461. } else
  3462. e1000_reset(adapter);
  3463. break;
  3464. case M88E1000_PHY_SPEC_CTRL:
  3465. case M88E1000_EXT_PHY_SPEC_CTRL:
  3466. if (e1000_phy_reset(&adapter->hw)) {
  3467. spin_unlock_irqrestore(
  3468. &adapter->stats_lock, flags);
  3469. return -EIO;
  3470. }
  3471. break;
  3472. }
  3473. } else {
  3474. switch (data->reg_num) {
  3475. case PHY_CTRL:
  3476. if (mii_reg & MII_CR_POWER_DOWN)
  3477. break;
  3478. if (netif_running(adapter->netdev)) {
  3479. e1000_down(adapter);
  3480. e1000_up(adapter);
  3481. } else
  3482. e1000_reset(adapter);
  3483. break;
  3484. }
  3485. }
  3486. spin_unlock_irqrestore(&adapter->stats_lock, flags);
  3487. break;
  3488. default:
  3489. return -EOPNOTSUPP;
  3490. }
  3491. return E1000_SUCCESS;
  3492. }
  3493. void
  3494. e1000_pci_set_mwi(struct e1000_hw *hw)
  3495. {
  3496. struct e1000_adapter *adapter = hw->back;
  3497. int ret_val = pci_set_mwi(adapter->pdev);
  3498. if (ret_val)
  3499. DPRINTK(PROBE, ERR, "Error in setting MWI\n");
  3500. }
  3501. void
  3502. e1000_pci_clear_mwi(struct e1000_hw *hw)
  3503. {
  3504. struct e1000_adapter *adapter = hw->back;
  3505. pci_clear_mwi(adapter->pdev);
  3506. }
  3507. void
  3508. e1000_read_pci_cfg(struct e1000_hw *hw, uint32_t reg, uint16_t *value)
  3509. {
  3510. struct e1000_adapter *adapter = hw->back;
  3511. pci_read_config_word(adapter->pdev, reg, value);
  3512. }
  3513. void
  3514. e1000_write_pci_cfg(struct e1000_hw *hw, uint32_t reg, uint16_t *value)
  3515. {
  3516. struct e1000_adapter *adapter = hw->back;
  3517. pci_write_config_word(adapter->pdev, reg, *value);
  3518. }
  3519. uint32_t
  3520. e1000_io_read(struct e1000_hw *hw, unsigned long port)
  3521. {
  3522. return inl(port);
  3523. }
  3524. void
  3525. e1000_io_write(struct e1000_hw *hw, unsigned long port, uint32_t value)
  3526. {
  3527. outl(value, port);
  3528. }
  3529. static void
  3530. e1000_vlan_rx_register(struct net_device *netdev, struct vlan_group *grp)
  3531. {
  3532. struct e1000_adapter *adapter = netdev_priv(netdev);
  3533. uint32_t ctrl, rctl;
  3534. e1000_irq_disable(adapter);
  3535. adapter->vlgrp = grp;
  3536. if (grp) {
  3537. /* enable VLAN tag insert/strip */
  3538. ctrl = E1000_READ_REG(&adapter->hw, CTRL);
  3539. ctrl |= E1000_CTRL_VME;
  3540. E1000_WRITE_REG(&adapter->hw, CTRL, ctrl);
  3541. /* enable VLAN receive filtering */
  3542. rctl = E1000_READ_REG(&adapter->hw, RCTL);
  3543. rctl |= E1000_RCTL_VFE;
  3544. rctl &= ~E1000_RCTL_CFIEN;
  3545. E1000_WRITE_REG(&adapter->hw, RCTL, rctl);
  3546. e1000_update_mng_vlan(adapter);
  3547. } else {
  3548. /* disable VLAN tag insert/strip */
  3549. ctrl = E1000_READ_REG(&adapter->hw, CTRL);
  3550. ctrl &= ~E1000_CTRL_VME;
  3551. E1000_WRITE_REG(&adapter->hw, CTRL, ctrl);
  3552. /* disable VLAN filtering */
  3553. rctl = E1000_READ_REG(&adapter->hw, RCTL);
  3554. rctl &= ~E1000_RCTL_VFE;
  3555. E1000_WRITE_REG(&adapter->hw, RCTL, rctl);
  3556. if (adapter->mng_vlan_id != (uint16_t)E1000_MNG_VLAN_NONE) {
  3557. e1000_vlan_rx_kill_vid(netdev, adapter->mng_vlan_id);
  3558. adapter->mng_vlan_id = E1000_MNG_VLAN_NONE;
  3559. }
  3560. }
  3561. e1000_irq_enable(adapter);
  3562. }
  3563. static void
  3564. e1000_vlan_rx_add_vid(struct net_device *netdev, uint16_t vid)
  3565. {
  3566. struct e1000_adapter *adapter = netdev_priv(netdev);
  3567. uint32_t vfta, index;
  3568. if ((adapter->hw.mng_cookie.status &
  3569. E1000_MNG_DHCP_COOKIE_STATUS_VLAN_SUPPORT) &&
  3570. (vid == adapter->mng_vlan_id))
  3571. return;
  3572. /* add VID to filter table */
  3573. index = (vid >> 5) & 0x7F;
  3574. vfta = E1000_READ_REG_ARRAY(&adapter->hw, VFTA, index);
  3575. vfta |= (1 << (vid & 0x1F));
  3576. e1000_write_vfta(&adapter->hw, index, vfta);
  3577. }
  3578. static void
  3579. e1000_vlan_rx_kill_vid(struct net_device *netdev, uint16_t vid)
  3580. {
  3581. struct e1000_adapter *adapter = netdev_priv(netdev);
  3582. uint32_t vfta, index;
  3583. e1000_irq_disable(adapter);
  3584. if (adapter->vlgrp)
  3585. adapter->vlgrp->vlan_devices[vid] = NULL;
  3586. e1000_irq_enable(adapter);
  3587. if ((adapter->hw.mng_cookie.status &
  3588. E1000_MNG_DHCP_COOKIE_STATUS_VLAN_SUPPORT) &&
  3589. (vid == adapter->mng_vlan_id)) {
  3590. /* release control to f/w */
  3591. e1000_release_hw_control(adapter);
  3592. return;
  3593. }
  3594. /* remove VID from filter table */
  3595. index = (vid >> 5) & 0x7F;
  3596. vfta = E1000_READ_REG_ARRAY(&adapter->hw, VFTA, index);
  3597. vfta &= ~(1 << (vid & 0x1F));
  3598. e1000_write_vfta(&adapter->hw, index, vfta);
  3599. }
  3600. static void
  3601. e1000_restore_vlan(struct e1000_adapter *adapter)
  3602. {
  3603. e1000_vlan_rx_register(adapter->netdev, adapter->vlgrp);
  3604. if (adapter->vlgrp) {
  3605. uint16_t vid;
  3606. for (vid = 0; vid < VLAN_GROUP_ARRAY_LEN; vid++) {
  3607. if (!adapter->vlgrp->vlan_devices[vid])
  3608. continue;
  3609. e1000_vlan_rx_add_vid(adapter->netdev, vid);
  3610. }
  3611. }
  3612. }
  3613. int
  3614. e1000_set_spd_dplx(struct e1000_adapter *adapter, uint16_t spddplx)
  3615. {
  3616. adapter->hw.autoneg = 0;
  3617. /* Fiber NICs only allow 1000 gbps Full duplex */
  3618. if ((adapter->hw.media_type == e1000_media_type_fiber) &&
  3619. spddplx != (SPEED_1000 + DUPLEX_FULL)) {
  3620. DPRINTK(PROBE, ERR, "Unsupported Speed/Duplex configuration\n");
  3621. return -EINVAL;
  3622. }
  3623. switch (spddplx) {
  3624. case SPEED_10 + DUPLEX_HALF:
  3625. adapter->hw.forced_speed_duplex = e1000_10_half;
  3626. break;
  3627. case SPEED_10 + DUPLEX_FULL:
  3628. adapter->hw.forced_speed_duplex = e1000_10_full;
  3629. break;
  3630. case SPEED_100 + DUPLEX_HALF:
  3631. adapter->hw.forced_speed_duplex = e1000_100_half;
  3632. break;
  3633. case SPEED_100 + DUPLEX_FULL:
  3634. adapter->hw.forced_speed_duplex = e1000_100_full;
  3635. break;
  3636. case SPEED_1000 + DUPLEX_FULL:
  3637. adapter->hw.autoneg = 1;
  3638. adapter->hw.autoneg_advertised = ADVERTISE_1000_FULL;
  3639. break;
  3640. case SPEED_1000 + DUPLEX_HALF: /* not supported */
  3641. default:
  3642. DPRINTK(PROBE, ERR, "Unsupported Speed/Duplex configuration\n");
  3643. return -EINVAL;
  3644. }
  3645. return 0;
  3646. }
  3647. #ifdef CONFIG_PM
  3648. /* these functions save and restore 16 or 64 dwords (64-256 bytes) of config
  3649. * space versus the 64 bytes that pci_[save|restore]_state handle
  3650. */
  3651. #define PCIE_CONFIG_SPACE_LEN 256
  3652. #define PCI_CONFIG_SPACE_LEN 64
  3653. static int
  3654. e1000_pci_save_state(struct e1000_adapter *adapter)
  3655. {
  3656. struct pci_dev *dev = adapter->pdev;
  3657. int size;
  3658. int i;
  3659. if (adapter->hw.mac_type >= e1000_82571)
  3660. size = PCIE_CONFIG_SPACE_LEN;
  3661. else
  3662. size = PCI_CONFIG_SPACE_LEN;
  3663. WARN_ON(adapter->config_space != NULL);
  3664. adapter->config_space = kmalloc(size, GFP_KERNEL);
  3665. if (!adapter->config_space) {
  3666. DPRINTK(PROBE, ERR, "unable to allocate %d bytes\n", size);
  3667. return -ENOMEM;
  3668. }
  3669. for (i = 0; i < (size / 4); i++)
  3670. pci_read_config_dword(dev, i * 4, &adapter->config_space[i]);
  3671. return 0;
  3672. }
  3673. static void
  3674. e1000_pci_restore_state(struct e1000_adapter *adapter)
  3675. {
  3676. struct pci_dev *dev = adapter->pdev;
  3677. int size;
  3678. int i;
  3679. if (adapter->config_space == NULL)
  3680. return;
  3681. if (adapter->hw.mac_type >= e1000_82571)
  3682. size = PCIE_CONFIG_SPACE_LEN;
  3683. else
  3684. size = PCI_CONFIG_SPACE_LEN;
  3685. for (i = 0; i < (size / 4); i++)
  3686. pci_write_config_dword(dev, i * 4, adapter->config_space[i]);
  3687. kfree(adapter->config_space);
  3688. adapter->config_space = NULL;
  3689. return;
  3690. }
  3691. #endif /* CONFIG_PM */
  3692. static int
  3693. e1000_suspend(struct pci_dev *pdev, pm_message_t state)
  3694. {
  3695. struct net_device *netdev = pci_get_drvdata(pdev);
  3696. struct e1000_adapter *adapter = netdev_priv(netdev);
  3697. uint32_t ctrl, ctrl_ext, rctl, manc, status;
  3698. uint32_t wufc = adapter->wol;
  3699. int retval = 0;
  3700. netif_device_detach(netdev);
  3701. if (netif_running(netdev))
  3702. e1000_down(adapter);
  3703. #ifdef CONFIG_PM
  3704. /* implement our own version of pci_save_state(pdev) because pci
  3705. * express adapters have larger 256 byte config spaces */
  3706. retval = e1000_pci_save_state(adapter);
  3707. if (retval)
  3708. return retval;
  3709. #endif
  3710. status = E1000_READ_REG(&adapter->hw, STATUS);
  3711. if (status & E1000_STATUS_LU)
  3712. wufc &= ~E1000_WUFC_LNKC;
  3713. if (wufc) {
  3714. e1000_setup_rctl(adapter);
  3715. e1000_set_multi(netdev);
  3716. /* turn on all-multi mode if wake on multicast is enabled */
  3717. if (adapter->wol & E1000_WUFC_MC) {
  3718. rctl = E1000_READ_REG(&adapter->hw, RCTL);
  3719. rctl |= E1000_RCTL_MPE;
  3720. E1000_WRITE_REG(&adapter->hw, RCTL, rctl);
  3721. }
  3722. if (adapter->hw.mac_type >= e1000_82540) {
  3723. ctrl = E1000_READ_REG(&adapter->hw, CTRL);
  3724. /* advertise wake from D3Cold */
  3725. #define E1000_CTRL_ADVD3WUC 0x00100000
  3726. /* phy power management enable */
  3727. #define E1000_CTRL_EN_PHY_PWR_MGMT 0x00200000
  3728. ctrl |= E1000_CTRL_ADVD3WUC |
  3729. E1000_CTRL_EN_PHY_PWR_MGMT;
  3730. E1000_WRITE_REG(&adapter->hw, CTRL, ctrl);
  3731. }
  3732. if (adapter->hw.media_type == e1000_media_type_fiber ||
  3733. adapter->hw.media_type == e1000_media_type_internal_serdes) {
  3734. /* keep the laser running in D3 */
  3735. ctrl_ext = E1000_READ_REG(&adapter->hw, CTRL_EXT);
  3736. ctrl_ext |= E1000_CTRL_EXT_SDP7_DATA;
  3737. E1000_WRITE_REG(&adapter->hw, CTRL_EXT, ctrl_ext);
  3738. }
  3739. /* Allow time for pending master requests to run */
  3740. e1000_disable_pciex_master(&adapter->hw);
  3741. E1000_WRITE_REG(&adapter->hw, WUC, E1000_WUC_PME_EN);
  3742. E1000_WRITE_REG(&adapter->hw, WUFC, wufc);
  3743. retval = pci_enable_wake(pdev, PCI_D3hot, 1);
  3744. if (retval)
  3745. DPRINTK(PROBE, ERR, "Error enabling D3 wake\n");
  3746. retval = pci_enable_wake(pdev, PCI_D3cold, 1);
  3747. if (retval)
  3748. DPRINTK(PROBE, ERR, "Error enabling D3 cold wake\n");
  3749. } else {
  3750. E1000_WRITE_REG(&adapter->hw, WUC, 0);
  3751. E1000_WRITE_REG(&adapter->hw, WUFC, 0);
  3752. retval = pci_enable_wake(pdev, PCI_D3hot, 0);
  3753. if (retval)
  3754. DPRINTK(PROBE, ERR, "Error enabling D3 wake\n");
  3755. retval = pci_enable_wake(pdev, PCI_D3cold, 0); /* 4 == D3 cold */
  3756. if (retval)
  3757. DPRINTK(PROBE, ERR, "Error enabling D3 cold wake\n");
  3758. }
  3759. if (adapter->hw.mac_type >= e1000_82540 &&
  3760. adapter->hw.media_type == e1000_media_type_copper) {
  3761. manc = E1000_READ_REG(&adapter->hw, MANC);
  3762. if (manc & E1000_MANC_SMBUS_EN) {
  3763. manc |= E1000_MANC_ARP_EN;
  3764. E1000_WRITE_REG(&adapter->hw, MANC, manc);
  3765. retval = pci_enable_wake(pdev, PCI_D3hot, 1);
  3766. if (retval)
  3767. DPRINTK(PROBE, ERR, "Error enabling D3 wake\n");
  3768. retval = pci_enable_wake(pdev, PCI_D3cold, 1);
  3769. if (retval)
  3770. DPRINTK(PROBE, ERR, "Error enabling D3 cold wake\n");
  3771. }
  3772. }
  3773. /* Release control of h/w to f/w. If f/w is AMT enabled, this
  3774. * would have already happened in close and is redundant. */
  3775. e1000_release_hw_control(adapter);
  3776. pci_disable_device(pdev);
  3777. retval = pci_set_power_state(pdev, pci_choose_state(pdev, state));
  3778. if (retval)
  3779. DPRINTK(PROBE, ERR, "Error in setting power state\n");
  3780. return 0;
  3781. }
  3782. #ifdef CONFIG_PM
  3783. static int
  3784. e1000_resume(struct pci_dev *pdev)
  3785. {
  3786. struct net_device *netdev = pci_get_drvdata(pdev);
  3787. struct e1000_adapter *adapter = netdev_priv(netdev);
  3788. int retval;
  3789. uint32_t manc, ret_val;
  3790. retval = pci_set_power_state(pdev, PCI_D0);
  3791. if (retval)
  3792. DPRINTK(PROBE, ERR, "Error in setting power state\n");
  3793. e1000_pci_restore_state(adapter);
  3794. ret_val = pci_enable_device(pdev);
  3795. pci_set_master(pdev);
  3796. retval = pci_enable_wake(pdev, PCI_D3hot, 0);
  3797. if (retval)
  3798. DPRINTK(PROBE, ERR, "Error enabling D3 wake\n");
  3799. retval = pci_enable_wake(pdev, PCI_D3cold, 0);
  3800. if (retval)
  3801. DPRINTK(PROBE, ERR, "Error enabling D3 cold wake\n");
  3802. e1000_reset(adapter);
  3803. E1000_WRITE_REG(&adapter->hw, WUS, ~0);
  3804. if (netif_running(netdev))
  3805. e1000_up(adapter);
  3806. netif_device_attach(netdev);
  3807. if (adapter->hw.mac_type >= e1000_82540 &&
  3808. adapter->hw.media_type == e1000_media_type_copper) {
  3809. manc = E1000_READ_REG(&adapter->hw, MANC);
  3810. manc &= ~(E1000_MANC_ARP_EN);
  3811. E1000_WRITE_REG(&adapter->hw, MANC, manc);
  3812. }
  3813. /* If the controller is 82573 and f/w is AMT, do not set
  3814. * DRV_LOAD until the interface is up. For all other cases,
  3815. * let the f/w know that the h/w is now under the control
  3816. * of the driver. */
  3817. if (adapter->hw.mac_type != e1000_82573 ||
  3818. !e1000_check_mng_mode(&adapter->hw))
  3819. e1000_get_hw_control(adapter);
  3820. return 0;
  3821. }
  3822. #endif
  3823. #ifdef CONFIG_NET_POLL_CONTROLLER
  3824. /*
  3825. * Polling 'interrupt' - used by things like netconsole to send skbs
  3826. * without having to re-enable interrupts. It's not called while
  3827. * the interrupt routine is executing.
  3828. */
  3829. static void
  3830. e1000_netpoll(struct net_device *netdev)
  3831. {
  3832. struct e1000_adapter *adapter = netdev_priv(netdev);
  3833. disable_irq(adapter->pdev->irq);
  3834. e1000_intr(adapter->pdev->irq, netdev, NULL);
  3835. e1000_clean_tx_irq(adapter, adapter->tx_ring);
  3836. #ifndef CONFIG_E1000_NAPI
  3837. adapter->clean_rx(adapter, adapter->rx_ring);
  3838. #endif
  3839. enable_irq(adapter->pdev->irq);
  3840. }
  3841. #endif
  3842. /* e1000_main.c */