chip.c 17 KB

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  1. /*
  2. * linux/kernel/irq/chip.c
  3. *
  4. * Copyright (C) 1992, 1998-2006 Linus Torvalds, Ingo Molnar
  5. * Copyright (C) 2005-2006, Thomas Gleixner, Russell King
  6. *
  7. * This file contains the core interrupt handling code, for irq-chip
  8. * based architectures.
  9. *
  10. * Detailed information is available in Documentation/DocBook/genericirq
  11. */
  12. #include <linux/irq.h>
  13. #include <linux/msi.h>
  14. #include <linux/module.h>
  15. #include <linux/interrupt.h>
  16. #include <linux/kernel_stat.h>
  17. #include "internals.h"
  18. /**
  19. * irq_set_chip - set the irq chip for an irq
  20. * @irq: irq number
  21. * @chip: pointer to irq chip description structure
  22. */
  23. int irq_set_chip(unsigned int irq, struct irq_chip *chip)
  24. {
  25. struct irq_desc *desc = irq_to_desc(irq);
  26. unsigned long flags;
  27. if (!desc) {
  28. WARN(1, KERN_ERR "Trying to install chip for IRQ%d\n", irq);
  29. return -EINVAL;
  30. }
  31. if (!chip)
  32. chip = &no_irq_chip;
  33. raw_spin_lock_irqsave(&desc->lock, flags);
  34. irq_chip_set_defaults(chip);
  35. desc->irq_data.chip = chip;
  36. raw_spin_unlock_irqrestore(&desc->lock, flags);
  37. return 0;
  38. }
  39. EXPORT_SYMBOL(irq_set_chip);
  40. /**
  41. * irq_set_type - set the irq trigger type for an irq
  42. * @irq: irq number
  43. * @type: IRQ_TYPE_{LEVEL,EDGE}_* value - see include/linux/irq.h
  44. */
  45. int irq_set_irq_type(unsigned int irq, unsigned int type)
  46. {
  47. struct irq_desc *desc = irq_to_desc(irq);
  48. unsigned long flags;
  49. int ret = -ENXIO;
  50. if (!desc) {
  51. printk(KERN_ERR "Trying to set irq type for IRQ%d\n", irq);
  52. return -ENODEV;
  53. }
  54. type &= IRQ_TYPE_SENSE_MASK;
  55. if (type == IRQ_TYPE_NONE)
  56. return 0;
  57. chip_bus_lock(desc);
  58. raw_spin_lock_irqsave(&desc->lock, flags);
  59. ret = __irq_set_trigger(desc, irq, type);
  60. raw_spin_unlock_irqrestore(&desc->lock, flags);
  61. chip_bus_sync_unlock(desc);
  62. return ret;
  63. }
  64. EXPORT_SYMBOL(irq_set_irq_type);
  65. /**
  66. * irq_set_handler_data - set irq handler data for an irq
  67. * @irq: Interrupt number
  68. * @data: Pointer to interrupt specific data
  69. *
  70. * Set the hardware irq controller data for an irq
  71. */
  72. int irq_set_handler_data(unsigned int irq, void *data)
  73. {
  74. struct irq_desc *desc = irq_to_desc(irq);
  75. unsigned long flags;
  76. if (!desc) {
  77. printk(KERN_ERR
  78. "Trying to install controller data for IRQ%d\n", irq);
  79. return -EINVAL;
  80. }
  81. raw_spin_lock_irqsave(&desc->lock, flags);
  82. desc->irq_data.handler_data = data;
  83. raw_spin_unlock_irqrestore(&desc->lock, flags);
  84. return 0;
  85. }
  86. EXPORT_SYMBOL(irq_set_handler_data);
  87. /**
  88. * irq_set_msi_desc - set MSI descriptor data for an irq
  89. * @irq: Interrupt number
  90. * @entry: Pointer to MSI descriptor data
  91. *
  92. * Set the MSI descriptor entry for an irq
  93. */
  94. int irq_set_msi_desc(unsigned int irq, struct msi_desc *entry)
  95. {
  96. struct irq_desc *desc = irq_to_desc(irq);
  97. unsigned long flags;
  98. if (!desc) {
  99. printk(KERN_ERR
  100. "Trying to install msi data for IRQ%d\n", irq);
  101. return -EINVAL;
  102. }
  103. raw_spin_lock_irqsave(&desc->lock, flags);
  104. desc->irq_data.msi_desc = entry;
  105. if (entry)
  106. entry->irq = irq;
  107. raw_spin_unlock_irqrestore(&desc->lock, flags);
  108. return 0;
  109. }
  110. /**
  111. * irq_set_chip_data - set irq chip data for an irq
  112. * @irq: Interrupt number
  113. * @data: Pointer to chip specific data
  114. *
  115. * Set the hardware irq chip data for an irq
  116. */
  117. int irq_set_chip_data(unsigned int irq, void *data)
  118. {
  119. struct irq_desc *desc = irq_to_desc(irq);
  120. unsigned long flags;
  121. if (!desc) {
  122. printk(KERN_ERR
  123. "Trying to install chip data for IRQ%d\n", irq);
  124. return -EINVAL;
  125. }
  126. if (!desc->irq_data.chip) {
  127. printk(KERN_ERR "BUG: bad set_irq_chip_data(IRQ#%d)\n", irq);
  128. return -EINVAL;
  129. }
  130. raw_spin_lock_irqsave(&desc->lock, flags);
  131. desc->irq_data.chip_data = data;
  132. raw_spin_unlock_irqrestore(&desc->lock, flags);
  133. return 0;
  134. }
  135. EXPORT_SYMBOL(irq_set_chip_data);
  136. struct irq_data *irq_get_irq_data(unsigned int irq)
  137. {
  138. struct irq_desc *desc = irq_to_desc(irq);
  139. return desc ? &desc->irq_data : NULL;
  140. }
  141. EXPORT_SYMBOL_GPL(irq_get_irq_data);
  142. static void irq_state_clr_disabled(struct irq_desc *desc)
  143. {
  144. desc->istate &= ~IRQS_DISABLED;
  145. irq_compat_clr_disabled(desc);
  146. }
  147. static void irq_state_set_disabled(struct irq_desc *desc)
  148. {
  149. desc->istate |= IRQS_DISABLED;
  150. irq_compat_set_disabled(desc);
  151. }
  152. int irq_startup(struct irq_desc *desc)
  153. {
  154. irq_state_clr_disabled(desc);
  155. desc->depth = 0;
  156. if (desc->irq_data.chip->irq_startup) {
  157. int ret = desc->irq_data.chip->irq_startup(&desc->irq_data);
  158. desc->status &= ~IRQ_MASKED;
  159. return ret;
  160. }
  161. irq_enable(desc);
  162. return 0;
  163. }
  164. void irq_shutdown(struct irq_desc *desc)
  165. {
  166. irq_state_set_disabled(desc);
  167. desc->depth = 1;
  168. if (desc->irq_data.chip->irq_shutdown)
  169. desc->irq_data.chip->irq_shutdown(&desc->irq_data);
  170. if (desc->irq_data.chip->irq_disable)
  171. desc->irq_data.chip->irq_disable(&desc->irq_data);
  172. else
  173. desc->irq_data.chip->irq_mask(&desc->irq_data);
  174. desc->status |= IRQ_MASKED;
  175. }
  176. void irq_enable(struct irq_desc *desc)
  177. {
  178. irq_state_clr_disabled(desc);
  179. if (desc->irq_data.chip->irq_enable)
  180. desc->irq_data.chip->irq_enable(&desc->irq_data);
  181. else
  182. desc->irq_data.chip->irq_unmask(&desc->irq_data);
  183. desc->status &= ~IRQ_MASKED;
  184. }
  185. void irq_disable(struct irq_desc *desc)
  186. {
  187. irq_state_set_disabled(desc);
  188. if (desc->irq_data.chip->irq_disable) {
  189. desc->irq_data.chip->irq_disable(&desc->irq_data);
  190. desc->status |= IRQ_MASKED;
  191. }
  192. }
  193. #ifndef CONFIG_GENERIC_HARDIRQS_NO_DEPRECATED
  194. /* Temporary migration helpers */
  195. static void compat_irq_mask(struct irq_data *data)
  196. {
  197. data->chip->mask(data->irq);
  198. }
  199. static void compat_irq_unmask(struct irq_data *data)
  200. {
  201. data->chip->unmask(data->irq);
  202. }
  203. static void compat_irq_ack(struct irq_data *data)
  204. {
  205. data->chip->ack(data->irq);
  206. }
  207. static void compat_irq_mask_ack(struct irq_data *data)
  208. {
  209. data->chip->mask_ack(data->irq);
  210. }
  211. static void compat_irq_eoi(struct irq_data *data)
  212. {
  213. data->chip->eoi(data->irq);
  214. }
  215. static void compat_irq_enable(struct irq_data *data)
  216. {
  217. data->chip->enable(data->irq);
  218. }
  219. static void compat_irq_disable(struct irq_data *data)
  220. {
  221. data->chip->disable(data->irq);
  222. }
  223. static void compat_irq_shutdown(struct irq_data *data)
  224. {
  225. data->chip->shutdown(data->irq);
  226. }
  227. static unsigned int compat_irq_startup(struct irq_data *data)
  228. {
  229. return data->chip->startup(data->irq);
  230. }
  231. static int compat_irq_set_affinity(struct irq_data *data,
  232. const struct cpumask *dest, bool force)
  233. {
  234. return data->chip->set_affinity(data->irq, dest);
  235. }
  236. static int compat_irq_set_type(struct irq_data *data, unsigned int type)
  237. {
  238. return data->chip->set_type(data->irq, type);
  239. }
  240. static int compat_irq_set_wake(struct irq_data *data, unsigned int on)
  241. {
  242. return data->chip->set_wake(data->irq, on);
  243. }
  244. static int compat_irq_retrigger(struct irq_data *data)
  245. {
  246. return data->chip->retrigger(data->irq);
  247. }
  248. static void compat_bus_lock(struct irq_data *data)
  249. {
  250. data->chip->bus_lock(data->irq);
  251. }
  252. static void compat_bus_sync_unlock(struct irq_data *data)
  253. {
  254. data->chip->bus_sync_unlock(data->irq);
  255. }
  256. #endif
  257. /*
  258. * Fixup enable/disable function pointers
  259. */
  260. void irq_chip_set_defaults(struct irq_chip *chip)
  261. {
  262. #ifndef CONFIG_GENERIC_HARDIRQS_NO_DEPRECATED
  263. if (chip->enable)
  264. chip->irq_enable = compat_irq_enable;
  265. if (chip->disable)
  266. chip->irq_disable = compat_irq_disable;
  267. if (chip->shutdown)
  268. chip->irq_shutdown = compat_irq_shutdown;
  269. if (chip->startup)
  270. chip->irq_startup = compat_irq_startup;
  271. if (!chip->end)
  272. chip->end = dummy_irq_chip.end;
  273. if (chip->bus_lock)
  274. chip->irq_bus_lock = compat_bus_lock;
  275. if (chip->bus_sync_unlock)
  276. chip->irq_bus_sync_unlock = compat_bus_sync_unlock;
  277. if (chip->mask)
  278. chip->irq_mask = compat_irq_mask;
  279. if (chip->unmask)
  280. chip->irq_unmask = compat_irq_unmask;
  281. if (chip->ack)
  282. chip->irq_ack = compat_irq_ack;
  283. if (chip->mask_ack)
  284. chip->irq_mask_ack = compat_irq_mask_ack;
  285. if (chip->eoi)
  286. chip->irq_eoi = compat_irq_eoi;
  287. if (chip->set_affinity)
  288. chip->irq_set_affinity = compat_irq_set_affinity;
  289. if (chip->set_type)
  290. chip->irq_set_type = compat_irq_set_type;
  291. if (chip->set_wake)
  292. chip->irq_set_wake = compat_irq_set_wake;
  293. if (chip->retrigger)
  294. chip->irq_retrigger = compat_irq_retrigger;
  295. #endif
  296. }
  297. static inline void mask_ack_irq(struct irq_desc *desc)
  298. {
  299. if (desc->irq_data.chip->irq_mask_ack)
  300. desc->irq_data.chip->irq_mask_ack(&desc->irq_data);
  301. else {
  302. desc->irq_data.chip->irq_mask(&desc->irq_data);
  303. if (desc->irq_data.chip->irq_ack)
  304. desc->irq_data.chip->irq_ack(&desc->irq_data);
  305. }
  306. desc->status |= IRQ_MASKED;
  307. }
  308. static inline void mask_irq(struct irq_desc *desc)
  309. {
  310. if (desc->irq_data.chip->irq_mask) {
  311. desc->irq_data.chip->irq_mask(&desc->irq_data);
  312. desc->status |= IRQ_MASKED;
  313. }
  314. }
  315. static inline void unmask_irq(struct irq_desc *desc)
  316. {
  317. if (desc->irq_data.chip->irq_unmask) {
  318. desc->irq_data.chip->irq_unmask(&desc->irq_data);
  319. desc->status &= ~IRQ_MASKED;
  320. }
  321. }
  322. /*
  323. * handle_nested_irq - Handle a nested irq from a irq thread
  324. * @irq: the interrupt number
  325. *
  326. * Handle interrupts which are nested into a threaded interrupt
  327. * handler. The handler function is called inside the calling
  328. * threads context.
  329. */
  330. void handle_nested_irq(unsigned int irq)
  331. {
  332. struct irq_desc *desc = irq_to_desc(irq);
  333. struct irqaction *action;
  334. irqreturn_t action_ret;
  335. might_sleep();
  336. raw_spin_lock_irq(&desc->lock);
  337. kstat_incr_irqs_this_cpu(irq, desc);
  338. action = desc->action;
  339. if (unlikely(!action || (desc->istate & IRQS_DISABLED)))
  340. goto out_unlock;
  341. irq_compat_set_progress(desc);
  342. desc->istate |= IRQS_INPROGRESS;
  343. raw_spin_unlock_irq(&desc->lock);
  344. action_ret = action->thread_fn(action->irq, action->dev_id);
  345. if (!noirqdebug)
  346. note_interrupt(irq, desc, action_ret);
  347. raw_spin_lock_irq(&desc->lock);
  348. desc->istate &= ~IRQS_INPROGRESS;
  349. irq_compat_clr_progress(desc);
  350. out_unlock:
  351. raw_spin_unlock_irq(&desc->lock);
  352. }
  353. EXPORT_SYMBOL_GPL(handle_nested_irq);
  354. static bool irq_check_poll(struct irq_desc *desc)
  355. {
  356. if (!(desc->istate & IRQS_POLL_INPROGRESS))
  357. return false;
  358. return irq_wait_for_poll(desc);
  359. }
  360. /**
  361. * handle_simple_irq - Simple and software-decoded IRQs.
  362. * @irq: the interrupt number
  363. * @desc: the interrupt description structure for this irq
  364. *
  365. * Simple interrupts are either sent from a demultiplexing interrupt
  366. * handler or come from hardware, where no interrupt hardware control
  367. * is necessary.
  368. *
  369. * Note: The caller is expected to handle the ack, clear, mask and
  370. * unmask issues if necessary.
  371. */
  372. void
  373. handle_simple_irq(unsigned int irq, struct irq_desc *desc)
  374. {
  375. raw_spin_lock(&desc->lock);
  376. if (unlikely(desc->istate & IRQS_INPROGRESS))
  377. if (!irq_check_poll(desc))
  378. goto out_unlock;
  379. desc->istate &= ~(IRQS_REPLAY | IRQS_WAITING);
  380. kstat_incr_irqs_this_cpu(irq, desc);
  381. if (unlikely(!desc->action || (desc->istate & IRQS_DISABLED)))
  382. goto out_unlock;
  383. handle_irq_event(desc);
  384. out_unlock:
  385. raw_spin_unlock(&desc->lock);
  386. }
  387. /**
  388. * handle_level_irq - Level type irq handler
  389. * @irq: the interrupt number
  390. * @desc: the interrupt description structure for this irq
  391. *
  392. * Level type interrupts are active as long as the hardware line has
  393. * the active level. This may require to mask the interrupt and unmask
  394. * it after the associated handler has acknowledged the device, so the
  395. * interrupt line is back to inactive.
  396. */
  397. void
  398. handle_level_irq(unsigned int irq, struct irq_desc *desc)
  399. {
  400. raw_spin_lock(&desc->lock);
  401. mask_ack_irq(desc);
  402. if (unlikely(desc->istate & IRQS_INPROGRESS))
  403. if (!irq_check_poll(desc))
  404. goto out_unlock;
  405. desc->istate &= ~(IRQS_REPLAY | IRQS_WAITING);
  406. kstat_incr_irqs_this_cpu(irq, desc);
  407. /*
  408. * If its disabled or no action available
  409. * keep it masked and get out of here
  410. */
  411. if (unlikely(!desc->action || (desc->istate & IRQS_DISABLED)))
  412. goto out_unlock;
  413. handle_irq_event(desc);
  414. if (!(desc->istate & (IRQS_DISABLED | IRQS_ONESHOT)))
  415. unmask_irq(desc);
  416. out_unlock:
  417. raw_spin_unlock(&desc->lock);
  418. }
  419. EXPORT_SYMBOL_GPL(handle_level_irq);
  420. /**
  421. * handle_fasteoi_irq - irq handler for transparent controllers
  422. * @irq: the interrupt number
  423. * @desc: the interrupt description structure for this irq
  424. *
  425. * Only a single callback will be issued to the chip: an ->eoi()
  426. * call when the interrupt has been serviced. This enables support
  427. * for modern forms of interrupt handlers, which handle the flow
  428. * details in hardware, transparently.
  429. */
  430. void
  431. handle_fasteoi_irq(unsigned int irq, struct irq_desc *desc)
  432. {
  433. raw_spin_lock(&desc->lock);
  434. if (unlikely(desc->istate & IRQS_INPROGRESS))
  435. if (!irq_check_poll(desc))
  436. goto out;
  437. desc->istate &= ~(IRQS_REPLAY | IRQS_WAITING);
  438. kstat_incr_irqs_this_cpu(irq, desc);
  439. /*
  440. * If its disabled or no action available
  441. * then mask it and get out of here:
  442. */
  443. if (unlikely(!desc->action || (desc->istate & IRQS_DISABLED))) {
  444. desc->status |= IRQ_PENDING;
  445. mask_irq(desc);
  446. goto out;
  447. }
  448. handle_irq_event(desc);
  449. out:
  450. desc->irq_data.chip->irq_eoi(&desc->irq_data);
  451. raw_spin_unlock(&desc->lock);
  452. }
  453. /**
  454. * handle_edge_irq - edge type IRQ handler
  455. * @irq: the interrupt number
  456. * @desc: the interrupt description structure for this irq
  457. *
  458. * Interrupt occures on the falling and/or rising edge of a hardware
  459. * signal. The occurence is latched into the irq controller hardware
  460. * and must be acked in order to be reenabled. After the ack another
  461. * interrupt can happen on the same source even before the first one
  462. * is handled by the associated event handler. If this happens it
  463. * might be necessary to disable (mask) the interrupt depending on the
  464. * controller hardware. This requires to reenable the interrupt inside
  465. * of the loop which handles the interrupts which have arrived while
  466. * the handler was running. If all pending interrupts are handled, the
  467. * loop is left.
  468. */
  469. void
  470. handle_edge_irq(unsigned int irq, struct irq_desc *desc)
  471. {
  472. raw_spin_lock(&desc->lock);
  473. desc->istate &= ~(IRQS_REPLAY | IRQS_WAITING);
  474. /*
  475. * If we're currently running this IRQ, or its disabled,
  476. * we shouldn't process the IRQ. Mark it pending, handle
  477. * the necessary masking and go out
  478. */
  479. if (unlikely((desc->istate & (IRQS_DISABLED | IRQS_INPROGRESS) ||
  480. !desc->action))) {
  481. if (!irq_check_poll(desc)) {
  482. desc->status |= IRQ_PENDING;
  483. mask_ack_irq(desc);
  484. goto out_unlock;
  485. }
  486. }
  487. kstat_incr_irqs_this_cpu(irq, desc);
  488. /* Start handling the irq */
  489. desc->irq_data.chip->irq_ack(&desc->irq_data);
  490. do {
  491. if (unlikely(!desc->action)) {
  492. mask_irq(desc);
  493. goto out_unlock;
  494. }
  495. /*
  496. * When another irq arrived while we were handling
  497. * one, we could have masked the irq.
  498. * Renable it, if it was not disabled in meantime.
  499. */
  500. if (unlikely(desc->status & IRQ_PENDING)) {
  501. if (!(desc->istate & IRQS_DISABLED) &&
  502. (desc->status & IRQ_MASKED))
  503. unmask_irq(desc);
  504. }
  505. handle_irq_event(desc);
  506. } while ((desc->status & IRQ_PENDING) &&
  507. !(desc->istate & IRQS_DISABLED));
  508. out_unlock:
  509. raw_spin_unlock(&desc->lock);
  510. }
  511. /**
  512. * handle_percpu_irq - Per CPU local irq handler
  513. * @irq: the interrupt number
  514. * @desc: the interrupt description structure for this irq
  515. *
  516. * Per CPU interrupts on SMP machines without locking requirements
  517. */
  518. void
  519. handle_percpu_irq(unsigned int irq, struct irq_desc *desc)
  520. {
  521. struct irq_chip *chip = irq_desc_get_chip(desc);
  522. kstat_incr_irqs_this_cpu(irq, desc);
  523. if (chip->irq_ack)
  524. chip->irq_ack(&desc->irq_data);
  525. handle_irq_event_percpu(desc, desc->action);
  526. if (chip->irq_eoi)
  527. chip->irq_eoi(&desc->irq_data);
  528. }
  529. void
  530. __set_irq_handler(unsigned int irq, irq_flow_handler_t handle, int is_chained,
  531. const char *name)
  532. {
  533. struct irq_desc *desc = irq_to_desc(irq);
  534. unsigned long flags;
  535. if (!desc) {
  536. printk(KERN_ERR
  537. "Trying to install type control for IRQ%d\n", irq);
  538. return;
  539. }
  540. if (!handle)
  541. handle = handle_bad_irq;
  542. else if (desc->irq_data.chip == &no_irq_chip) {
  543. printk(KERN_WARNING "Trying to install %sinterrupt handler "
  544. "for IRQ%d\n", is_chained ? "chained " : "", irq);
  545. /*
  546. * Some ARM implementations install a handler for really dumb
  547. * interrupt hardware without setting an irq_chip. This worked
  548. * with the ARM no_irq_chip but the check in setup_irq would
  549. * prevent us to setup the interrupt at all. Switch it to
  550. * dummy_irq_chip for easy transition.
  551. */
  552. desc->irq_data.chip = &dummy_irq_chip;
  553. }
  554. chip_bus_lock(desc);
  555. raw_spin_lock_irqsave(&desc->lock, flags);
  556. /* Uninstall? */
  557. if (handle == handle_bad_irq) {
  558. if (desc->irq_data.chip != &no_irq_chip)
  559. mask_ack_irq(desc);
  560. irq_compat_set_disabled(desc);
  561. desc->istate |= IRQS_DISABLED;
  562. desc->depth = 1;
  563. }
  564. desc->handle_irq = handle;
  565. desc->name = name;
  566. if (handle != handle_bad_irq && is_chained) {
  567. desc->status |= IRQ_NOREQUEST | IRQ_NOPROBE;
  568. irq_startup(desc);
  569. }
  570. raw_spin_unlock_irqrestore(&desc->lock, flags);
  571. chip_bus_sync_unlock(desc);
  572. }
  573. EXPORT_SYMBOL_GPL(__set_irq_handler);
  574. void
  575. set_irq_chip_and_handler(unsigned int irq, struct irq_chip *chip,
  576. irq_flow_handler_t handle)
  577. {
  578. irq_set_chip(irq, chip);
  579. __set_irq_handler(irq, handle, 0, NULL);
  580. }
  581. void
  582. set_irq_chip_and_handler_name(unsigned int irq, struct irq_chip *chip,
  583. irq_flow_handler_t handle, const char *name)
  584. {
  585. irq_set_chip(irq, chip);
  586. __set_irq_handler(irq, handle, 0, name);
  587. }
  588. void irq_modify_status(unsigned int irq, unsigned long clr, unsigned long set)
  589. {
  590. struct irq_desc *desc = irq_to_desc(irq);
  591. unsigned long flags;
  592. if (!desc)
  593. return;
  594. /* Sanitize flags */
  595. set &= IRQF_MODIFY_MASK;
  596. clr &= IRQF_MODIFY_MASK;
  597. raw_spin_lock_irqsave(&desc->lock, flags);
  598. desc->status &= ~clr;
  599. desc->status |= set;
  600. raw_spin_unlock_irqrestore(&desc->lock, flags);
  601. }