solos-pci.c 30 KB

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  1. /*
  2. * Driver for the Solos PCI ADSL2+ card, designed to support Linux by
  3. * Traverse Technologies -- http://www.traverse.com.au/
  4. * Xrio Limited -- http://www.xrio.com/
  5. *
  6. *
  7. * Copyright © 2008 Traverse Technologies
  8. * Copyright © 2008 Intel Corporation
  9. *
  10. * Authors: Nathan Williams <nathan@traverse.com.au>
  11. * David Woodhouse <dwmw2@infradead.org>
  12. * Treker Chen <treker@xrio.com>
  13. *
  14. * This program is free software; you can redistribute it and/or
  15. * modify it under the terms of the GNU General Public License
  16. * version 2, as published by the Free Software Foundation.
  17. *
  18. * This program is distributed in the hope that it will be useful,
  19. * but WITHOUT ANY WARRANTY; without even the implied warranty of
  20. * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
  21. * GNU General Public License for more details.
  22. */
  23. #define DEBUG
  24. #define VERBOSE_DEBUG
  25. #include <linux/interrupt.h>
  26. #include <linux/module.h>
  27. #include <linux/kernel.h>
  28. #include <linux/errno.h>
  29. #include <linux/ioport.h>
  30. #include <linux/types.h>
  31. #include <linux/pci.h>
  32. #include <linux/atm.h>
  33. #include <linux/atmdev.h>
  34. #include <linux/skbuff.h>
  35. #include <linux/sysfs.h>
  36. #include <linux/device.h>
  37. #include <linux/kobject.h>
  38. #include <linux/firmware.h>
  39. #include <linux/ctype.h>
  40. #include <linux/swab.h>
  41. #define VERSION "0.07"
  42. #define PTAG "solos-pci"
  43. #define CONFIG_RAM_SIZE 128
  44. #define FLAGS_ADDR 0x7C
  45. #define IRQ_EN_ADDR 0x78
  46. #define FPGA_VER 0x74
  47. #define IRQ_CLEAR 0x70
  48. #define WRITE_FLASH 0x6C
  49. #define PORTS 0x68
  50. #define FLASH_BLOCK 0x64
  51. #define FLASH_BUSY 0x60
  52. #define FPGA_MODE 0x5C
  53. #define FLASH_MODE 0x58
  54. #define DATA_RAM_SIZE 32768
  55. #define BUF_SIZE 4096
  56. #define FPGA_PAGE 528 /* FPGA flash page size*/
  57. #define SOLOS_PAGE 512 /* Solos flash page size*/
  58. #define FPGA_BLOCK (FPGA_PAGE * 8) /* FPGA flash block size*/
  59. #define SOLOS_BLOCK (SOLOS_PAGE * 8) /* Solos flash block size*/
  60. #define RX_BUF(card, nr) ((card->buffers) + (nr)*BUF_SIZE*2)
  61. #define TX_BUF(card, nr) ((card->buffers) + (nr)*BUF_SIZE*2 + BUF_SIZE)
  62. static int debug = 0;
  63. static int atmdebug = 0;
  64. static int firmware_upgrade = 0;
  65. static int fpga_upgrade = 0;
  66. struct pkt_hdr {
  67. __le16 size;
  68. __le16 vpi;
  69. __le16 vci;
  70. __le16 type;
  71. };
  72. #define PKT_DATA 0
  73. #define PKT_COMMAND 1
  74. #define PKT_POPEN 3
  75. #define PKT_PCLOSE 4
  76. #define PKT_STATUS 5
  77. struct solos_card {
  78. void __iomem *config_regs;
  79. void __iomem *buffers;
  80. int nr_ports;
  81. struct pci_dev *dev;
  82. struct atm_dev *atmdev[4];
  83. struct tasklet_struct tlet;
  84. spinlock_t tx_lock;
  85. spinlock_t tx_queue_lock;
  86. spinlock_t cli_queue_lock;
  87. spinlock_t param_queue_lock;
  88. struct list_head param_queue;
  89. struct sk_buff_head tx_queue[4];
  90. struct sk_buff_head cli_queue[4];
  91. wait_queue_head_t param_wq;
  92. wait_queue_head_t fw_wq;
  93. };
  94. struct solos_param {
  95. struct list_head list;
  96. pid_t pid;
  97. int port;
  98. struct sk_buff *response;
  99. wait_queue_head_t wq;
  100. };
  101. #define SOLOS_CHAN(atmdev) ((int)(unsigned long)(atmdev)->phy_data)
  102. MODULE_AUTHOR("Traverse Technologies <support@traverse.com.au>");
  103. MODULE_DESCRIPTION("Solos PCI driver");
  104. MODULE_VERSION(VERSION);
  105. MODULE_LICENSE("GPL");
  106. MODULE_PARM_DESC(debug, "Enable Loopback");
  107. MODULE_PARM_DESC(atmdebug, "Print ATM data");
  108. MODULE_PARM_DESC(firmware_upgrade, "Initiate Solos firmware upgrade");
  109. MODULE_PARM_DESC(fpga_upgrade, "Initiate FPGA upgrade");
  110. module_param(debug, int, 0444);
  111. module_param(atmdebug, int, 0644);
  112. module_param(firmware_upgrade, int, 0444);
  113. module_param(fpga_upgrade, int, 0444);
  114. static void fpga_queue(struct solos_card *card, int port, struct sk_buff *skb,
  115. struct atm_vcc *vcc);
  116. static int fpga_tx(struct solos_card *);
  117. static irqreturn_t solos_irq(int irq, void *dev_id);
  118. static struct atm_vcc* find_vcc(struct atm_dev *dev, short vpi, int vci);
  119. static int list_vccs(int vci);
  120. static void release_vccs(struct atm_dev *dev);
  121. static int atm_init(struct solos_card *);
  122. static void atm_remove(struct solos_card *);
  123. static int send_command(struct solos_card *card, int dev, const char *buf, size_t size);
  124. static void solos_bh(unsigned long);
  125. static int print_buffer(struct sk_buff *buf);
  126. static inline void solos_pop(struct atm_vcc *vcc, struct sk_buff *skb)
  127. {
  128. if (vcc->pop)
  129. vcc->pop(vcc, skb);
  130. else
  131. dev_kfree_skb_any(skb);
  132. }
  133. static ssize_t solos_param_show(struct device *dev, struct device_attribute *attr,
  134. char *buf)
  135. {
  136. struct atm_dev *atmdev = container_of(dev, struct atm_dev, class_dev);
  137. struct solos_card *card = atmdev->dev_data;
  138. struct solos_param prm;
  139. struct sk_buff *skb;
  140. struct pkt_hdr *header;
  141. int buflen;
  142. buflen = strlen(attr->attr.name) + 10;
  143. skb = alloc_skb(sizeof(*header) + buflen, GFP_KERNEL);
  144. if (!skb) {
  145. dev_warn(&card->dev->dev, "Failed to allocate sk_buff in solos_param_show()\n");
  146. return -ENOMEM;
  147. }
  148. header = (void *)skb_put(skb, sizeof(*header));
  149. buflen = snprintf((void *)&header[1], buflen - 1,
  150. "L%05d\n%s\n", current->pid, attr->attr.name);
  151. skb_put(skb, buflen);
  152. header->size = cpu_to_le16(buflen);
  153. header->vpi = cpu_to_le16(0);
  154. header->vci = cpu_to_le16(0);
  155. header->type = cpu_to_le16(PKT_COMMAND);
  156. prm.pid = current->pid;
  157. prm.response = NULL;
  158. prm.port = SOLOS_CHAN(atmdev);
  159. spin_lock_irq(&card->param_queue_lock);
  160. list_add(&prm.list, &card->param_queue);
  161. spin_unlock_irq(&card->param_queue_lock);
  162. fpga_queue(card, prm.port, skb, NULL);
  163. wait_event_timeout(card->param_wq, prm.response, 5 * HZ);
  164. spin_lock_irq(&card->param_queue_lock);
  165. list_del(&prm.list);
  166. spin_unlock_irq(&card->param_queue_lock);
  167. if (!prm.response)
  168. return -EIO;
  169. buflen = prm.response->len;
  170. memcpy(buf, prm.response->data, buflen);
  171. kfree_skb(prm.response);
  172. return buflen;
  173. }
  174. static ssize_t solos_param_store(struct device *dev, struct device_attribute *attr,
  175. const char *buf, size_t count)
  176. {
  177. struct atm_dev *atmdev = container_of(dev, struct atm_dev, class_dev);
  178. struct solos_card *card = atmdev->dev_data;
  179. struct solos_param prm;
  180. struct sk_buff *skb;
  181. struct pkt_hdr *header;
  182. int buflen;
  183. ssize_t ret;
  184. buflen = strlen(attr->attr.name) + 11 + count;
  185. skb = alloc_skb(sizeof(*header) + buflen, GFP_KERNEL);
  186. if (!skb) {
  187. dev_warn(&card->dev->dev, "Failed to allocate sk_buff in solos_param_store()\n");
  188. return -ENOMEM;
  189. }
  190. header = (void *)skb_put(skb, sizeof(*header));
  191. buflen = snprintf((void *)&header[1], buflen - 1,
  192. "L%05d\n%s\n%s\n", current->pid, attr->attr.name, buf);
  193. skb_put(skb, buflen);
  194. header->size = cpu_to_le16(buflen);
  195. header->vpi = cpu_to_le16(0);
  196. header->vci = cpu_to_le16(0);
  197. header->type = cpu_to_le16(PKT_COMMAND);
  198. prm.pid = current->pid;
  199. prm.response = NULL;
  200. prm.port = SOLOS_CHAN(atmdev);
  201. spin_lock_irq(&card->param_queue_lock);
  202. list_add(&prm.list, &card->param_queue);
  203. spin_unlock_irq(&card->param_queue_lock);
  204. fpga_queue(card, prm.port, skb, NULL);
  205. wait_event_timeout(card->param_wq, prm.response, 5 * HZ);
  206. spin_lock_irq(&card->param_queue_lock);
  207. list_del(&prm.list);
  208. spin_unlock_irq(&card->param_queue_lock);
  209. skb = prm.response;
  210. if (!skb)
  211. return -EIO;
  212. buflen = skb->len;
  213. /* Sometimes it has a newline, sometimes it doesn't. */
  214. if (skb->data[buflen - 1] == '\n')
  215. buflen--;
  216. if (buflen == 2 && !strncmp(skb->data, "OK", 2))
  217. ret = count;
  218. else if (buflen == 5 && !strncmp(skb->data, "ERROR", 5))
  219. ret = -EIO;
  220. else {
  221. /* We know we have enough space allocated for this; we allocated
  222. it ourselves */
  223. skb->data[buflen] = 0;
  224. dev_warn(&card->dev->dev, "Unexpected parameter response: '%s'\n",
  225. skb->data);
  226. ret = -EIO;
  227. }
  228. kfree_skb(skb);
  229. return ret;
  230. }
  231. static char *next_string(struct sk_buff *skb)
  232. {
  233. int i = 0;
  234. char *this = skb->data;
  235. while (i < skb->len) {
  236. if (this[i] == '\n') {
  237. this[i] = 0;
  238. skb_pull(skb, i);
  239. return this;
  240. }
  241. }
  242. return NULL;
  243. }
  244. /*
  245. * Status packet has fields separated by \n, starting with a version number
  246. * for the information therein. Fields are....
  247. *
  248. * packet version
  249. * TxBitRate (version >= 1)
  250. * RxBitRate (version >= 1)
  251. * State (version >= 1)
  252. */
  253. static int process_status(struct solos_card *card, int port, struct sk_buff *skb)
  254. {
  255. char *str, *end, *state_str;
  256. int ver, rate_up, rate_down, state, snr, attn;
  257. if (!card->atmdev[port])
  258. return -ENODEV;
  259. str = next_string(skb);
  260. if (!str)
  261. return -EIO;
  262. ver = simple_strtol(str, NULL, 10);
  263. if (ver < 1) {
  264. dev_warn(&card->dev->dev, "Unexpected status interrupt version %d\n",
  265. ver);
  266. return -EIO;
  267. }
  268. str = next_string(skb);
  269. rate_up = simple_strtol(str, &end, 10);
  270. if (*end)
  271. return -EIO;
  272. str = next_string(skb);
  273. rate_down = simple_strtol(str, &end, 10);
  274. if (*end)
  275. return -EIO;
  276. state_str = next_string(skb);
  277. if (!strcmp(state_str, "Showtime"))
  278. state = ATM_PHY_SIG_FOUND;
  279. else {
  280. state = ATM_PHY_SIG_LOST;
  281. release_vccs(card->atmdev[port]);
  282. }
  283. str = next_string(skb);
  284. snr = simple_strtol(str, &end, 10);
  285. if (*end)
  286. return -EIO;
  287. str = next_string(skb);
  288. attn = simple_strtol(str, &end, 10);
  289. if (*end)
  290. return -EIO;
  291. if (state == ATM_PHY_SIG_LOST && !rate_up && !rate_down)
  292. dev_info(&card->dev->dev, "Port %d ATM state: %s\n",
  293. port, state_str);
  294. else
  295. dev_info(&card->dev->dev, "Port %d ATM state: %s (%d/%d kb/s, SNR %ddB, Attn %ddB)\n",
  296. port, state_str, rate_up/1000, rate_down/1000,
  297. snr, attn);
  298. card->atmdev[port]->link_rate = rate_down;
  299. card->atmdev[port]->signal = state;
  300. return 0;
  301. }
  302. static int process_command(struct solos_card *card, int port, struct sk_buff *skb)
  303. {
  304. struct solos_param *prm;
  305. unsigned long flags;
  306. int cmdpid;
  307. int found = 0;
  308. if (skb->len < 7)
  309. return 0;
  310. if (skb->data[0] != 'L' || !isdigit(skb->data[1]) ||
  311. !isdigit(skb->data[2]) || !isdigit(skb->data[3]) ||
  312. !isdigit(skb->data[4]) || !isdigit(skb->data[5]) ||
  313. skb->data[6] != '\n')
  314. return 0;
  315. cmdpid = simple_strtol(&skb->data[1], NULL, 10);
  316. spin_lock_irqsave(&card->param_queue_lock, flags);
  317. list_for_each_entry(prm, &card->param_queue, list) {
  318. if (prm->port == port && prm->pid == cmdpid) {
  319. prm->response = skb;
  320. skb_pull(skb, 7);
  321. wake_up(&card->param_wq);
  322. found = 1;
  323. break;
  324. }
  325. }
  326. spin_unlock_irqrestore(&card->param_queue_lock, flags);
  327. return found;
  328. }
  329. static ssize_t console_show(struct device *dev, struct device_attribute *attr,
  330. char *buf)
  331. {
  332. struct atm_dev *atmdev = container_of(dev, struct atm_dev, class_dev);
  333. struct solos_card *card = atmdev->dev_data;
  334. struct sk_buff *skb;
  335. spin_lock(&card->cli_queue_lock);
  336. skb = skb_dequeue(&card->cli_queue[SOLOS_CHAN(atmdev)]);
  337. spin_unlock(&card->cli_queue_lock);
  338. if(skb == NULL)
  339. return sprintf(buf, "No data.\n");
  340. memcpy(buf, skb->data, skb->len);
  341. dev_dbg(&card->dev->dev, "len: %d\n", skb->len);
  342. kfree_skb(skb);
  343. return skb->len;
  344. }
  345. static int send_command(struct solos_card *card, int dev, const char *buf, size_t size)
  346. {
  347. struct sk_buff *skb;
  348. struct pkt_hdr *header;
  349. // dev_dbg(&card->dev->dev, "size: %d\n", size);
  350. if (size > (BUF_SIZE - sizeof(*header))) {
  351. dev_dbg(&card->dev->dev, "Command is too big. Dropping request\n");
  352. return 0;
  353. }
  354. skb = alloc_skb(size + sizeof(*header), GFP_ATOMIC);
  355. if (!skb) {
  356. dev_warn(&card->dev->dev, "Failed to allocate sk_buff in send_command()\n");
  357. return 0;
  358. }
  359. header = (void *)skb_put(skb, sizeof(*header));
  360. header->size = cpu_to_le16(size);
  361. header->vpi = cpu_to_le16(0);
  362. header->vci = cpu_to_le16(0);
  363. header->type = cpu_to_le16(PKT_COMMAND);
  364. memcpy(skb_put(skb, size), buf, size);
  365. fpga_queue(card, dev, skb, NULL);
  366. return 0;
  367. }
  368. static ssize_t console_store(struct device *dev, struct device_attribute *attr,
  369. const char *buf, size_t count)
  370. {
  371. struct atm_dev *atmdev = container_of(dev, struct atm_dev, class_dev);
  372. struct solos_card *card = atmdev->dev_data;
  373. int err;
  374. err = send_command(card, SOLOS_CHAN(atmdev), buf, count);
  375. return err?:count;
  376. }
  377. static DEVICE_ATTR(console, 0644, console_show, console_store);
  378. #define SOLOS_ATTR_RO(x) static DEVICE_ATTR(x, 0444, solos_param_show, NULL);
  379. #define SOLOS_ATTR_RW(x) static DEVICE_ATTR(x, 0644, solos_param_show, solos_param_store);
  380. #include "solos-attrlist.c"
  381. #undef SOLOS_ATTR_RO
  382. #undef SOLOS_ATTR_RW
  383. #define SOLOS_ATTR_RO(x) &dev_attr_##x.attr,
  384. #define SOLOS_ATTR_RW(x) &dev_attr_##x.attr,
  385. static struct attribute *solos_attrs[] = {
  386. #include "solos-attrlist.c"
  387. NULL
  388. };
  389. static struct attribute_group solos_attr_group = {
  390. .attrs = solos_attrs,
  391. .name = "parameters",
  392. };
  393. static int flash_upgrade(struct solos_card *card, int chip)
  394. {
  395. const struct firmware *fw;
  396. const char *fw_name;
  397. uint32_t data32 = 0;
  398. int blocksize = 0;
  399. int numblocks = 0;
  400. int offset;
  401. if (chip == 0) {
  402. fw_name = "solos-FPGA.bin";
  403. blocksize = FPGA_BLOCK;
  404. } else {
  405. fw_name = "solos-Firmware.bin";
  406. blocksize = SOLOS_BLOCK;
  407. }
  408. if (request_firmware(&fw, fw_name, &card->dev->dev))
  409. return -ENOENT;
  410. dev_info(&card->dev->dev, "Flash upgrade starting\n");
  411. numblocks = fw->size / blocksize;
  412. dev_info(&card->dev->dev, "Firmware size: %zd\n", fw->size);
  413. dev_info(&card->dev->dev, "Number of blocks: %d\n", numblocks);
  414. dev_info(&card->dev->dev, "Changing FPGA to Update mode\n");
  415. iowrite32(1, card->config_regs + FPGA_MODE);
  416. data32 = ioread32(card->config_regs + FPGA_MODE);
  417. /* Set mode to Chip Erase */
  418. dev_info(&card->dev->dev, "Set FPGA Flash mode to %s Chip Erase\n",
  419. chip?"Solos":"FPGA");
  420. iowrite32((chip * 2), card->config_regs + FLASH_MODE);
  421. iowrite32(1, card->config_regs + WRITE_FLASH);
  422. wait_event(card->fw_wq, !ioread32(card->config_regs + FLASH_BUSY));
  423. for (offset = 0; offset < fw->size; offset += blocksize) {
  424. int i;
  425. /* Clear write flag */
  426. iowrite32(0, card->config_regs + WRITE_FLASH);
  427. /* Set mode to Block Write */
  428. /* dev_info(&card->dev->dev, "Set FPGA Flash mode to Block Write\n"); */
  429. iowrite32(((chip * 2) + 1), card->config_regs + FLASH_MODE);
  430. /* Copy block to buffer, swapping each 16 bits */
  431. for(i = 0; i < blocksize; i += 4) {
  432. uint32_t word = swahb32p((uint32_t *)(fw->data + offset + i));
  433. iowrite32(word, RX_BUF(card, 3) + i);
  434. }
  435. /* Specify block number and then trigger flash write */
  436. iowrite32(offset / blocksize, card->config_regs + FLASH_BLOCK);
  437. iowrite32(1, card->config_regs + WRITE_FLASH);
  438. wait_event(card->fw_wq, !ioread32(card->config_regs + FLASH_BUSY));
  439. }
  440. release_firmware(fw);
  441. iowrite32(0, card->config_regs + WRITE_FLASH);
  442. iowrite32(0, card->config_regs + FPGA_MODE);
  443. iowrite32(0, card->config_regs + FLASH_MODE);
  444. dev_info(&card->dev->dev, "Returning FPGA to Data mode\n");
  445. return 0;
  446. }
  447. static irqreturn_t solos_irq(int irq, void *dev_id)
  448. {
  449. struct solos_card *card = dev_id;
  450. int handled = 1;
  451. //ACK IRQ
  452. iowrite32(0, card->config_regs + IRQ_CLEAR);
  453. //Disable IRQs from FPGA
  454. iowrite32(0, card->config_regs + IRQ_EN_ADDR);
  455. if (card->atmdev[0])
  456. tasklet_schedule(&card->tlet);
  457. else
  458. wake_up(&card->fw_wq);
  459. //Enable IRQs from FPGA
  460. iowrite32(1, card->config_regs + IRQ_EN_ADDR);
  461. return IRQ_RETVAL(handled);
  462. }
  463. void solos_bh(unsigned long card_arg)
  464. {
  465. struct solos_card *card = (void *)card_arg;
  466. int port;
  467. uint32_t card_flags;
  468. uint32_t tx_mask;
  469. uint32_t rx_done = 0;
  470. card_flags = ioread32(card->config_regs + FLAGS_ADDR);
  471. /* The TX bits are set if the channel is busy; clear if not. We want to
  472. invoke fpga_tx() unless _all_ the bits for active channels are set */
  473. tx_mask = (1 << card->nr_ports) - 1;
  474. if ((card_flags & tx_mask) != tx_mask)
  475. fpga_tx(card);
  476. for (port = 0; port < card->nr_ports; port++) {
  477. if (card_flags & (0x10 << port)) {
  478. struct pkt_hdr header;
  479. struct sk_buff *skb;
  480. struct atm_vcc *vcc;
  481. int size;
  482. rx_done |= 0x10 << port;
  483. memcpy_fromio(&header, RX_BUF(card, port), sizeof(header));
  484. size = le16_to_cpu(header.size);
  485. skb = alloc_skb(size + 1, GFP_ATOMIC);
  486. if (!skb) {
  487. if (net_ratelimit())
  488. dev_warn(&card->dev->dev, "Failed to allocate sk_buff for RX\n");
  489. continue;
  490. }
  491. memcpy_fromio(skb_put(skb, size),
  492. RX_BUF(card, port) + sizeof(header),
  493. size);
  494. if (atmdebug) {
  495. dev_info(&card->dev->dev, "Received: device %d\n", port);
  496. dev_info(&card->dev->dev, "size: %d VPI: %d VCI: %d\n",
  497. size, le16_to_cpu(header.vpi),
  498. le16_to_cpu(header.vci));
  499. print_buffer(skb);
  500. }
  501. switch (le16_to_cpu(header.type)) {
  502. case PKT_DATA:
  503. vcc = find_vcc(card->atmdev[port], le16_to_cpu(header.vpi),
  504. le16_to_cpu(header.vci));
  505. if (!vcc) {
  506. if (net_ratelimit())
  507. dev_warn(&card->dev->dev, "Received packet for unknown VCI.VPI %d.%d on port %d\n",
  508. le16_to_cpu(header.vci), le16_to_cpu(header.vpi),
  509. port);
  510. continue;
  511. }
  512. atm_charge(vcc, skb->truesize);
  513. vcc->push(vcc, skb);
  514. atomic_inc(&vcc->stats->rx);
  515. break;
  516. case PKT_STATUS:
  517. process_status(card, port, skb);
  518. dev_kfree_skb(skb);
  519. break;
  520. case PKT_COMMAND:
  521. default: /* FIXME: Not really, surely? */
  522. if (process_command(card, port, skb))
  523. break;
  524. spin_lock(&card->cli_queue_lock);
  525. if (skb_queue_len(&card->cli_queue[port]) > 10) {
  526. if (net_ratelimit())
  527. dev_warn(&card->dev->dev, "Dropping console response on port %d\n",
  528. port);
  529. } else
  530. skb_queue_tail(&card->cli_queue[port], skb);
  531. spin_unlock(&card->cli_queue_lock);
  532. break;
  533. }
  534. }
  535. }
  536. if (rx_done)
  537. iowrite32(rx_done, card->config_regs + FLAGS_ADDR);
  538. return;
  539. }
  540. static struct atm_vcc *find_vcc(struct atm_dev *dev, short vpi, int vci)
  541. {
  542. struct hlist_head *head;
  543. struct atm_vcc *vcc = NULL;
  544. struct hlist_node *node;
  545. struct sock *s;
  546. read_lock(&vcc_sklist_lock);
  547. head = &vcc_hash[vci & (VCC_HTABLE_SIZE -1)];
  548. sk_for_each(s, node, head) {
  549. vcc = atm_sk(s);
  550. if (vcc->dev == dev && vcc->vci == vci &&
  551. vcc->vpi == vpi && vcc->qos.rxtp.traffic_class != ATM_NONE)
  552. goto out;
  553. }
  554. vcc = NULL;
  555. out:
  556. read_unlock(&vcc_sklist_lock);
  557. return vcc;
  558. }
  559. static int list_vccs(int vci)
  560. {
  561. struct hlist_head *head;
  562. struct atm_vcc *vcc;
  563. struct hlist_node *node;
  564. struct sock *s;
  565. int num_found = 0;
  566. int i;
  567. read_lock(&vcc_sklist_lock);
  568. if (vci != 0){
  569. head = &vcc_hash[vci & (VCC_HTABLE_SIZE -1)];
  570. sk_for_each(s, node, head) {
  571. num_found ++;
  572. vcc = atm_sk(s);
  573. printk(KERN_DEBUG "Device: %d Vpi: %d Vci: %d\n",
  574. vcc->dev->number,
  575. vcc->vpi,
  576. vcc->vci);
  577. }
  578. } else {
  579. for(i = 0; i < VCC_HTABLE_SIZE; i++){
  580. head = &vcc_hash[i];
  581. sk_for_each(s, node, head) {
  582. num_found ++;
  583. vcc = atm_sk(s);
  584. printk(KERN_DEBUG "Device: %d Vpi: %d Vci: %d\n",
  585. vcc->dev->number,
  586. vcc->vpi,
  587. vcc->vci);
  588. }
  589. }
  590. }
  591. read_unlock(&vcc_sklist_lock);
  592. return num_found;
  593. }
  594. static void release_vccs(struct atm_dev *dev)
  595. {
  596. int i;
  597. write_lock_irq(&vcc_sklist_lock);
  598. for (i = 0; i < VCC_HTABLE_SIZE; i++) {
  599. struct hlist_head *head = &vcc_hash[i];
  600. struct hlist_node *node, *tmp;
  601. struct sock *s;
  602. struct atm_vcc *vcc;
  603. sk_for_each_safe(s, node, tmp, head) {
  604. vcc = atm_sk(s);
  605. if (vcc->dev == dev) {
  606. vcc_release_async(vcc, -EPIPE);
  607. sk_del_node_init(s);
  608. }
  609. }
  610. }
  611. write_unlock_irq(&vcc_sklist_lock);
  612. }
  613. static int popen(struct atm_vcc *vcc)
  614. {
  615. struct solos_card *card = vcc->dev->dev_data;
  616. struct sk_buff *skb;
  617. struct pkt_hdr *header;
  618. if (vcc->qos.aal != ATM_AAL5) {
  619. dev_warn(&card->dev->dev, "Unsupported ATM type %d\n",
  620. vcc->qos.aal);
  621. return -EINVAL;
  622. }
  623. skb = alloc_skb(sizeof(*header), GFP_ATOMIC);
  624. if (!skb && net_ratelimit()) {
  625. dev_warn(&card->dev->dev, "Failed to allocate sk_buff in popen()\n");
  626. return -ENOMEM;
  627. }
  628. header = (void *)skb_put(skb, sizeof(*header));
  629. header->size = cpu_to_le16(0);
  630. header->vpi = cpu_to_le16(vcc->vpi);
  631. header->vci = cpu_to_le16(vcc->vci);
  632. header->type = cpu_to_le16(PKT_POPEN);
  633. fpga_queue(card, SOLOS_CHAN(vcc->dev), skb, NULL);
  634. // dev_dbg(&card->dev->dev, "Open for vpi %d and vci %d on interface %d\n", vcc->vpi, vcc->vci, SOLOS_CHAN(vcc->dev));
  635. set_bit(ATM_VF_ADDR, &vcc->flags); // accept the vpi / vci
  636. set_bit(ATM_VF_READY, &vcc->flags);
  637. list_vccs(0);
  638. return 0;
  639. }
  640. static void pclose(struct atm_vcc *vcc)
  641. {
  642. struct solos_card *card = vcc->dev->dev_data;
  643. struct sk_buff *skb;
  644. struct pkt_hdr *header;
  645. skb = alloc_skb(sizeof(*header), GFP_ATOMIC);
  646. if (!skb) {
  647. dev_warn(&card->dev->dev, "Failed to allocate sk_buff in pclose()\n");
  648. return;
  649. }
  650. header = (void *)skb_put(skb, sizeof(*header));
  651. header->size = cpu_to_le16(0);
  652. header->vpi = cpu_to_le16(vcc->vpi);
  653. header->vci = cpu_to_le16(vcc->vci);
  654. header->type = cpu_to_le16(PKT_PCLOSE);
  655. fpga_queue(card, SOLOS_CHAN(vcc->dev), skb, NULL);
  656. // dev_dbg(&card->dev->dev, "Close for vpi %d and vci %d on interface %d\n", vcc->vpi, vcc->vci, SOLOS_CHAN(vcc->dev));
  657. clear_bit(ATM_VF_ADDR, &vcc->flags);
  658. clear_bit(ATM_VF_READY, &vcc->flags);
  659. return;
  660. }
  661. static int print_buffer(struct sk_buff *buf)
  662. {
  663. int len,i;
  664. char msg[500];
  665. char item[10];
  666. len = buf->len;
  667. for (i = 0; i < len; i++){
  668. if(i % 8 == 0)
  669. sprintf(msg, "%02X: ", i);
  670. sprintf(item,"%02X ",*(buf->data + i));
  671. strcat(msg, item);
  672. if(i % 8 == 7) {
  673. sprintf(item, "\n");
  674. strcat(msg, item);
  675. printk(KERN_DEBUG "%s", msg);
  676. }
  677. }
  678. if (i % 8 != 0) {
  679. sprintf(item, "\n");
  680. strcat(msg, item);
  681. printk(KERN_DEBUG "%s", msg);
  682. }
  683. printk(KERN_DEBUG "\n");
  684. return 0;
  685. }
  686. static void fpga_queue(struct solos_card *card, int port, struct sk_buff *skb,
  687. struct atm_vcc *vcc)
  688. {
  689. int old_len;
  690. *(void **)skb->cb = vcc;
  691. spin_lock(&card->tx_queue_lock);
  692. old_len = skb_queue_len(&card->tx_queue[port]);
  693. skb_queue_tail(&card->tx_queue[port], skb);
  694. spin_unlock(&card->tx_queue_lock);
  695. /* If TX might need to be started, do so */
  696. if (!old_len)
  697. fpga_tx(card);
  698. }
  699. static int fpga_tx(struct solos_card *card)
  700. {
  701. uint32_t tx_pending;
  702. uint32_t tx_started = 0;
  703. struct sk_buff *skb;
  704. struct atm_vcc *vcc;
  705. unsigned char port;
  706. unsigned long flags;
  707. spin_lock_irqsave(&card->tx_lock, flags);
  708. tx_pending = ioread32(card->config_regs + FLAGS_ADDR);
  709. dev_vdbg(&card->dev->dev, "TX Flags are %X\n", tx_pending);
  710. for (port = 0; port < card->nr_ports; port++) {
  711. if (card->atmdev[port] && !(tx_pending & (1 << port))) {
  712. spin_lock(&card->tx_queue_lock);
  713. skb = skb_dequeue(&card->tx_queue[port]);
  714. spin_unlock(&card->tx_queue_lock);
  715. if (!skb)
  716. continue;
  717. if (atmdebug) {
  718. dev_info(&card->dev->dev, "Transmitted: port %d\n",
  719. port);
  720. print_buffer(skb);
  721. }
  722. memcpy_toio(TX_BUF(card, port), skb->data, skb->len);
  723. vcc = *(void **)skb->cb;
  724. if (vcc) {
  725. atomic_inc(&vcc->stats->tx);
  726. solos_pop(vcc, skb);
  727. } else
  728. dev_kfree_skb_irq(skb);
  729. tx_started |= 1 << port; //Set TX full flag
  730. }
  731. }
  732. if (tx_started)
  733. iowrite32(tx_started, card->config_regs + FLAGS_ADDR);
  734. spin_unlock_irqrestore(&card->tx_lock, flags);
  735. return 0;
  736. }
  737. static int psend(struct atm_vcc *vcc, struct sk_buff *skb)
  738. {
  739. struct solos_card *card = vcc->dev->dev_data;
  740. struct sk_buff *skb2 = NULL;
  741. struct pkt_hdr *header;
  742. int pktlen;
  743. //dev_dbg(&card->dev->dev, "psend called.\n");
  744. //dev_dbg(&card->dev->dev, "dev,vpi,vci = %d,%d,%d\n",SOLOS_CHAN(vcc->dev),vcc->vpi,vcc->vci);
  745. if (debug) {
  746. skb2 = atm_alloc_charge(vcc, skb->len, GFP_ATOMIC);
  747. if (skb2) {
  748. memcpy(skb2->data, skb->data, skb->len);
  749. skb_put(skb2, skb->len);
  750. vcc->push(vcc, skb2);
  751. atomic_inc(&vcc->stats->rx);
  752. }
  753. atomic_inc(&vcc->stats->tx);
  754. solos_pop(vcc, skb);
  755. return 0;
  756. }
  757. pktlen = skb->len;
  758. if (pktlen > (BUF_SIZE - sizeof(*header))) {
  759. dev_warn(&card->dev->dev, "Length of PDU is too large. Dropping PDU.\n");
  760. solos_pop(vcc, skb);
  761. return 0;
  762. }
  763. if (!skb_clone_writable(skb, sizeof(*header))) {
  764. int expand_by = 0;
  765. int ret;
  766. if (skb_headroom(skb) < sizeof(*header))
  767. expand_by = sizeof(*header) - skb_headroom(skb);
  768. ret = pskb_expand_head(skb, expand_by, 0, GFP_ATOMIC);
  769. if (ret) {
  770. dev_warn(&card->dev->dev, "pskb_expand_head failed.\n");
  771. solos_pop(vcc, skb);
  772. return ret;
  773. }
  774. }
  775. header = (void *)skb_push(skb, sizeof(*header));
  776. /* This does _not_ include the size of the header */
  777. header->size = cpu_to_le16(pktlen);
  778. header->vpi = cpu_to_le16(vcc->vpi);
  779. header->vci = cpu_to_le16(vcc->vci);
  780. header->type = cpu_to_le16(PKT_DATA);
  781. fpga_queue(card, SOLOS_CHAN(vcc->dev), skb, vcc);
  782. return 0;
  783. }
  784. static struct atmdev_ops fpga_ops = {
  785. .open = popen,
  786. .close = pclose,
  787. .ioctl = NULL,
  788. .getsockopt = NULL,
  789. .setsockopt = NULL,
  790. .send = psend,
  791. .send_oam = NULL,
  792. .phy_put = NULL,
  793. .phy_get = NULL,
  794. .change_qos = NULL,
  795. .proc_read = NULL,
  796. .owner = THIS_MODULE
  797. };
  798. static int fpga_probe(struct pci_dev *dev, const struct pci_device_id *id)
  799. {
  800. int err, i;
  801. uint16_t fpga_ver;
  802. uint8_t major_ver, minor_ver;
  803. uint32_t data32;
  804. struct solos_card *card;
  805. if (debug)
  806. return 0;
  807. card = kzalloc(sizeof(*card), GFP_KERNEL);
  808. if (!card)
  809. return -ENOMEM;
  810. card->dev = dev;
  811. init_waitqueue_head(&card->fw_wq);
  812. init_waitqueue_head(&card->param_wq);
  813. err = pci_enable_device(dev);
  814. if (err) {
  815. dev_warn(&dev->dev, "Failed to enable PCI device\n");
  816. goto out;
  817. }
  818. err = pci_request_regions(dev, "solos");
  819. if (err) {
  820. dev_warn(&dev->dev, "Failed to request regions\n");
  821. goto out;
  822. }
  823. card->config_regs = pci_iomap(dev, 0, CONFIG_RAM_SIZE);
  824. if (!card->config_regs) {
  825. dev_warn(&dev->dev, "Failed to ioremap config registers\n");
  826. goto out_release_regions;
  827. }
  828. card->buffers = pci_iomap(dev, 1, DATA_RAM_SIZE);
  829. if (!card->buffers) {
  830. dev_warn(&dev->dev, "Failed to ioremap data buffers\n");
  831. goto out_unmap_config;
  832. }
  833. // for(i=0;i<64 ;i+=4){
  834. // data32=ioread32(card->buffers + i);
  835. // dev_dbg(&card->dev->dev, "%08lX\n",(unsigned long)data32);
  836. // }
  837. //Fill Config Mem with zeros
  838. for(i = 0; i < 128; i += 4)
  839. iowrite32(0, card->config_regs + i);
  840. //Set RX empty flags
  841. iowrite32(0xF0, card->config_regs + FLAGS_ADDR);
  842. data32 = ioread32(card->config_regs + FPGA_VER);
  843. fpga_ver = (data32 & 0x0000FFFF);
  844. major_ver = ((data32 & 0xFF000000) >> 24);
  845. minor_ver = ((data32 & 0x00FF0000) >> 16);
  846. dev_info(&dev->dev, "Solos FPGA Version %d.%02d svn-%d\n",
  847. major_ver, minor_ver, fpga_ver);
  848. card->nr_ports = 2; /* FIXME: Detect daughterboard */
  849. pci_set_drvdata(dev, card);
  850. tasklet_init(&card->tlet, solos_bh, (unsigned long)card);
  851. spin_lock_init(&card->tx_lock);
  852. spin_lock_init(&card->tx_queue_lock);
  853. spin_lock_init(&card->cli_queue_lock);
  854. spin_lock_init(&card->param_queue_lock);
  855. INIT_LIST_HEAD(&card->param_queue);
  856. /*
  857. // Set Loopback mode
  858. data32 = 0x00010000;
  859. iowrite32(data32,card->config_regs + FLAGS_ADDR);
  860. */
  861. /*
  862. // Fill Buffers with zeros
  863. for (i = 0; i < BUF_SIZE * 8; i += 4)
  864. iowrite32(0, card->buffers + i);
  865. */
  866. /*
  867. for(i = 0; i < (BUF_SIZE * 1); i += 4)
  868. iowrite32(0x12345678, card->buffers + i + (0*BUF_SIZE));
  869. for(i = 0; i < (BUF_SIZE * 1); i += 4)
  870. iowrite32(0xabcdef98, card->buffers + i + (1*BUF_SIZE));
  871. // Read Config Memory
  872. printk(KERN_DEBUG "Reading Config MEM\n");
  873. i = 0;
  874. for(i = 0; i < 16; i++) {
  875. data32=ioread32(card->buffers + i*(BUF_SIZE/2));
  876. printk(KERN_ALERT "Addr: %lX Data: %08lX\n",
  877. (unsigned long)(addr_start + i*(BUF_SIZE/2)),
  878. (unsigned long)data32);
  879. }
  880. */
  881. //dev_dbg(&card->dev->dev, "Requesting IRQ: %d\n",dev->irq);
  882. err = request_irq(dev->irq, solos_irq, IRQF_DISABLED|IRQF_SHARED,
  883. "solos-pci", card);
  884. if (err) {
  885. dev_dbg(&card->dev->dev, "Failed to request interrupt IRQ: %d\n", dev->irq);
  886. goto out_unmap_both;
  887. }
  888. // Enable IRQs
  889. iowrite32(1, card->config_regs + IRQ_EN_ADDR);
  890. if (fpga_upgrade)
  891. flash_upgrade(card, 0);
  892. if (firmware_upgrade)
  893. flash_upgrade(card, 1);
  894. err = atm_init(card);
  895. if (err)
  896. goto out_free_irq;
  897. return 0;
  898. out_free_irq:
  899. iowrite32(0, card->config_regs + IRQ_EN_ADDR);
  900. free_irq(dev->irq, card);
  901. tasklet_kill(&card->tlet);
  902. out_unmap_both:
  903. pci_set_drvdata(dev, NULL);
  904. pci_iounmap(dev, card->config_regs);
  905. out_unmap_config:
  906. pci_iounmap(dev, card->buffers);
  907. out_release_regions:
  908. pci_release_regions(dev);
  909. out:
  910. return err;
  911. }
  912. static int atm_init(struct solos_card *card)
  913. {
  914. int i;
  915. for (i = 0; i < card->nr_ports; i++) {
  916. struct sk_buff *skb;
  917. struct pkt_hdr *header;
  918. skb_queue_head_init(&card->tx_queue[i]);
  919. skb_queue_head_init(&card->cli_queue[i]);
  920. card->atmdev[i] = atm_dev_register("solos-pci", &fpga_ops, -1, NULL);
  921. if (!card->atmdev[i]) {
  922. dev_err(&card->dev->dev, "Could not register ATM device %d\n", i);
  923. atm_remove(card);
  924. return -ENODEV;
  925. }
  926. if (device_create_file(&card->atmdev[i]->class_dev, &dev_attr_console))
  927. dev_err(&card->dev->dev, "Could not register console for ATM device %d\n", i);
  928. if (sysfs_create_group(&card->atmdev[i]->class_dev.kobj, &solos_attr_group))
  929. dev_err(&card->dev->dev, "Could not register parameter group for ATM device %d\n", i);
  930. dev_info(&card->dev->dev, "Registered ATM device %d\n", card->atmdev[i]->number);
  931. card->atmdev[i]->ci_range.vpi_bits = 8;
  932. card->atmdev[i]->ci_range.vci_bits = 16;
  933. card->atmdev[i]->dev_data = card;
  934. card->atmdev[i]->phy_data = (void *)(unsigned long)i;
  935. card->atmdev[i]->signal = ATM_PHY_SIG_UNKNOWN;
  936. skb = alloc_skb(sizeof(*header), GFP_ATOMIC);
  937. if (!skb) {
  938. dev_warn(&card->dev->dev, "Failed to allocate sk_buff in atm_init()\n");
  939. continue;
  940. }
  941. header = (void *)skb_put(skb, sizeof(*header));
  942. header->size = cpu_to_le16(0);
  943. header->vpi = cpu_to_le16(0);
  944. header->vci = cpu_to_le16(0);
  945. header->type = cpu_to_le16(PKT_STATUS);
  946. fpga_queue(card, i, skb, NULL);
  947. }
  948. return 0;
  949. }
  950. static void atm_remove(struct solos_card *card)
  951. {
  952. int i;
  953. for (i = 0; i < card->nr_ports; i++) {
  954. if (card->atmdev[i]) {
  955. dev_info(&card->dev->dev, "Unregistering ATM device %d\n", card->atmdev[i]->number);
  956. sysfs_remove_group(&card->atmdev[i]->class_dev.kobj, &solos_attr_group);
  957. atm_dev_deregister(card->atmdev[i]);
  958. }
  959. }
  960. }
  961. static void fpga_remove(struct pci_dev *dev)
  962. {
  963. struct solos_card *card = pci_get_drvdata(dev);
  964. if (debug)
  965. return;
  966. atm_remove(card);
  967. dev_vdbg(&dev->dev, "Freeing IRQ\n");
  968. // Disable IRQs from FPGA
  969. iowrite32(0, card->config_regs + IRQ_EN_ADDR);
  970. free_irq(dev->irq, card);
  971. tasklet_kill(&card->tlet);
  972. // iowrite32(0x01,pciregs);
  973. dev_vdbg(&dev->dev, "Unmapping PCI resource\n");
  974. pci_iounmap(dev, card->buffers);
  975. pci_iounmap(dev, card->config_regs);
  976. dev_vdbg(&dev->dev, "Releasing PCI Region\n");
  977. pci_release_regions(dev);
  978. pci_disable_device(dev);
  979. pci_set_drvdata(dev, NULL);
  980. kfree(card);
  981. // dev_dbg(&card->dev->dev, "fpga_remove\n");
  982. return;
  983. }
  984. static struct pci_device_id fpga_pci_tbl[] __devinitdata = {
  985. { 0x10ee, 0x0300, PCI_ANY_ID, PCI_ANY_ID, 0, 0, 0 },
  986. { 0, }
  987. };
  988. MODULE_DEVICE_TABLE(pci,fpga_pci_tbl);
  989. static struct pci_driver fpga_driver = {
  990. .name = "solos",
  991. .id_table = fpga_pci_tbl,
  992. .probe = fpga_probe,
  993. .remove = fpga_remove,
  994. };
  995. static int __init solos_pci_init(void)
  996. {
  997. printk(KERN_INFO "Solos PCI Driver Version %s\n", VERSION);
  998. return pci_register_driver(&fpga_driver);
  999. }
  1000. static void __exit solos_pci_exit(void)
  1001. {
  1002. pci_unregister_driver(&fpga_driver);
  1003. printk(KERN_INFO "Solos PCI Driver %s Unloaded\n", VERSION);
  1004. }
  1005. module_init(solos_pci_init);
  1006. module_exit(solos_pci_exit);