3945-mac.c 106 KB

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  1. /******************************************************************************
  2. *
  3. * Copyright(c) 2003 - 2011 Intel Corporation. All rights reserved.
  4. *
  5. * Portions of this file are derived from the ipw3945 project, as well
  6. * as portions of the ieee80211 subsystem header files.
  7. *
  8. * This program is free software; you can redistribute it and/or modify it
  9. * under the terms of version 2 of the GNU General Public License as
  10. * published by the Free Software Foundation.
  11. *
  12. * This program is distributed in the hope that it will be useful, but WITHOUT
  13. * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
  14. * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for
  15. * more details.
  16. *
  17. * You should have received a copy of the GNU General Public License along with
  18. * this program; if not, write to the Free Software Foundation, Inc.,
  19. * 51 Franklin Street, Fifth Floor, Boston, MA 02110, USA
  20. *
  21. * The full GNU General Public License is included in this distribution in the
  22. * file called LICENSE.
  23. *
  24. * Contact Information:
  25. * Intel Linux Wireless <ilw@linux.intel.com>
  26. * Intel Corporation, 5200 N.E. Elam Young Parkway, Hillsboro, OR 97124-6497
  27. *
  28. *****************************************************************************/
  29. #define pr_fmt(fmt) KBUILD_MODNAME ": " fmt
  30. #include <linux/kernel.h>
  31. #include <linux/module.h>
  32. #include <linux/init.h>
  33. #include <linux/pci.h>
  34. #include <linux/pci-aspm.h>
  35. #include <linux/slab.h>
  36. #include <linux/dma-mapping.h>
  37. #include <linux/delay.h>
  38. #include <linux/sched.h>
  39. #include <linux/skbuff.h>
  40. #include <linux/netdevice.h>
  41. #include <linux/firmware.h>
  42. #include <linux/etherdevice.h>
  43. #include <linux/if_arp.h>
  44. #include <net/ieee80211_radiotap.h>
  45. #include <net/mac80211.h>
  46. #include <asm/div64.h>
  47. #define DRV_NAME "iwl3945"
  48. #include "commands.h"
  49. #include "common.h"
  50. #include "3945.h"
  51. #include "iwl-spectrum.h"
  52. /*
  53. * module name, copyright, version, etc.
  54. */
  55. #define DRV_DESCRIPTION \
  56. "Intel(R) PRO/Wireless 3945ABG/BG Network Connection driver for Linux"
  57. #ifdef CONFIG_IWLEGACY_DEBUG
  58. #define VD "d"
  59. #else
  60. #define VD
  61. #endif
  62. /*
  63. * add "s" to indicate spectrum measurement included.
  64. * we add it here to be consistent with previous releases in which
  65. * this was configurable.
  66. */
  67. #define DRV_VERSION IWLWIFI_VERSION VD "s"
  68. #define DRV_COPYRIGHT "Copyright(c) 2003-2011 Intel Corporation"
  69. #define DRV_AUTHOR "<ilw@linux.intel.com>"
  70. MODULE_DESCRIPTION(DRV_DESCRIPTION);
  71. MODULE_VERSION(DRV_VERSION);
  72. MODULE_AUTHOR(DRV_COPYRIGHT " " DRV_AUTHOR);
  73. MODULE_LICENSE("GPL");
  74. /* module parameters */
  75. struct il_mod_params il3945_mod_params = {
  76. .sw_crypto = 1,
  77. .restart_fw = 1,
  78. .disable_hw_scan = 1,
  79. /* the rest are 0 by default */
  80. };
  81. /**
  82. * il3945_get_antenna_flags - Get antenna flags for RXON command
  83. * @il: eeprom and antenna fields are used to determine antenna flags
  84. *
  85. * il->eeprom39 is used to determine if antenna AUX/MAIN are reversed
  86. * il3945_mod_params.antenna specifies the antenna diversity mode:
  87. *
  88. * IL_ANTENNA_DIVERSITY - NIC selects best antenna by itself
  89. * IL_ANTENNA_MAIN - Force MAIN antenna
  90. * IL_ANTENNA_AUX - Force AUX antenna
  91. */
  92. __le32
  93. il3945_get_antenna_flags(const struct il_priv *il)
  94. {
  95. struct il3945_eeprom *eeprom = (struct il3945_eeprom *)il->eeprom;
  96. switch (il3945_mod_params.antenna) {
  97. case IL_ANTENNA_DIVERSITY:
  98. return 0;
  99. case IL_ANTENNA_MAIN:
  100. if (eeprom->antenna_switch_type)
  101. return RXON_FLG_DIS_DIV_MSK | RXON_FLG_ANT_B_MSK;
  102. return RXON_FLG_DIS_DIV_MSK | RXON_FLG_ANT_A_MSK;
  103. case IL_ANTENNA_AUX:
  104. if (eeprom->antenna_switch_type)
  105. return RXON_FLG_DIS_DIV_MSK | RXON_FLG_ANT_A_MSK;
  106. return RXON_FLG_DIS_DIV_MSK | RXON_FLG_ANT_B_MSK;
  107. }
  108. /* bad antenna selector value */
  109. IL_ERR("Bad antenna selector value (0x%x)\n",
  110. il3945_mod_params.antenna);
  111. return 0; /* "diversity" is default if error */
  112. }
  113. static int
  114. il3945_set_ccmp_dynamic_key_info(struct il_priv *il,
  115. struct ieee80211_key_conf *keyconf, u8 sta_id)
  116. {
  117. unsigned long flags;
  118. __le16 key_flags = 0;
  119. int ret;
  120. key_flags |= (STA_KEY_FLG_CCMP | STA_KEY_FLG_MAP_KEY_MSK);
  121. key_flags |= cpu_to_le16(keyconf->keyidx << STA_KEY_FLG_KEYID_POS);
  122. if (sta_id == il->ctx.bcast_sta_id)
  123. key_flags |= STA_KEY_MULTICAST_MSK;
  124. keyconf->flags |= IEEE80211_KEY_FLAG_GENERATE_IV;
  125. keyconf->hw_key_idx = keyconf->keyidx;
  126. key_flags &= ~STA_KEY_FLG_INVALID;
  127. spin_lock_irqsave(&il->sta_lock, flags);
  128. il->stations[sta_id].keyinfo.cipher = keyconf->cipher;
  129. il->stations[sta_id].keyinfo.keylen = keyconf->keylen;
  130. memcpy(il->stations[sta_id].keyinfo.key, keyconf->key, keyconf->keylen);
  131. memcpy(il->stations[sta_id].sta.key.key, keyconf->key, keyconf->keylen);
  132. if ((il->stations[sta_id].sta.key.
  133. key_flags & STA_KEY_FLG_ENCRYPT_MSK) == STA_KEY_FLG_NO_ENC)
  134. il->stations[sta_id].sta.key.key_offset =
  135. il_get_free_ucode_key_idx(il);
  136. /* else, we are overriding an existing key => no need to allocated room
  137. * in uCode. */
  138. WARN(il->stations[sta_id].sta.key.key_offset == WEP_INVALID_OFFSET,
  139. "no space for a new key");
  140. il->stations[sta_id].sta.key.key_flags = key_flags;
  141. il->stations[sta_id].sta.sta.modify_mask = STA_MODIFY_KEY_MASK;
  142. il->stations[sta_id].sta.mode = STA_CONTROL_MODIFY_MSK;
  143. D_INFO("hwcrypto: modify ucode station key info\n");
  144. ret = il_send_add_sta(il, &il->stations[sta_id].sta, CMD_ASYNC);
  145. spin_unlock_irqrestore(&il->sta_lock, flags);
  146. return ret;
  147. }
  148. static int
  149. il3945_set_tkip_dynamic_key_info(struct il_priv *il,
  150. struct ieee80211_key_conf *keyconf, u8 sta_id)
  151. {
  152. return -EOPNOTSUPP;
  153. }
  154. static int
  155. il3945_set_wep_dynamic_key_info(struct il_priv *il,
  156. struct ieee80211_key_conf *keyconf, u8 sta_id)
  157. {
  158. return -EOPNOTSUPP;
  159. }
  160. static int
  161. il3945_clear_sta_key_info(struct il_priv *il, u8 sta_id)
  162. {
  163. unsigned long flags;
  164. struct il_addsta_cmd sta_cmd;
  165. spin_lock_irqsave(&il->sta_lock, flags);
  166. memset(&il->stations[sta_id].keyinfo, 0, sizeof(struct il_hw_key));
  167. memset(&il->stations[sta_id].sta.key, 0, sizeof(struct il4965_keyinfo));
  168. il->stations[sta_id].sta.key.key_flags = STA_KEY_FLG_NO_ENC;
  169. il->stations[sta_id].sta.sta.modify_mask = STA_MODIFY_KEY_MASK;
  170. il->stations[sta_id].sta.mode = STA_CONTROL_MODIFY_MSK;
  171. memcpy(&sta_cmd, &il->stations[sta_id].sta,
  172. sizeof(struct il_addsta_cmd));
  173. spin_unlock_irqrestore(&il->sta_lock, flags);
  174. D_INFO("hwcrypto: clear ucode station key info\n");
  175. return il_send_add_sta(il, &sta_cmd, CMD_SYNC);
  176. }
  177. static int
  178. il3945_set_dynamic_key(struct il_priv *il, struct ieee80211_key_conf *keyconf,
  179. u8 sta_id)
  180. {
  181. int ret = 0;
  182. keyconf->hw_key_idx = HW_KEY_DYNAMIC;
  183. switch (keyconf->cipher) {
  184. case WLAN_CIPHER_SUITE_CCMP:
  185. ret = il3945_set_ccmp_dynamic_key_info(il, keyconf, sta_id);
  186. break;
  187. case WLAN_CIPHER_SUITE_TKIP:
  188. ret = il3945_set_tkip_dynamic_key_info(il, keyconf, sta_id);
  189. break;
  190. case WLAN_CIPHER_SUITE_WEP40:
  191. case WLAN_CIPHER_SUITE_WEP104:
  192. ret = il3945_set_wep_dynamic_key_info(il, keyconf, sta_id);
  193. break;
  194. default:
  195. IL_ERR("Unknown alg: %s alg=%x\n", __func__, keyconf->cipher);
  196. ret = -EINVAL;
  197. }
  198. D_WEP("Set dynamic key: alg=%x len=%d idx=%d sta=%d ret=%d\n",
  199. keyconf->cipher, keyconf->keylen, keyconf->keyidx, sta_id, ret);
  200. return ret;
  201. }
  202. static int
  203. il3945_remove_static_key(struct il_priv *il)
  204. {
  205. int ret = -EOPNOTSUPP;
  206. return ret;
  207. }
  208. static int
  209. il3945_set_static_key(struct il_priv *il, struct ieee80211_key_conf *key)
  210. {
  211. if (key->cipher == WLAN_CIPHER_SUITE_WEP40 ||
  212. key->cipher == WLAN_CIPHER_SUITE_WEP104)
  213. return -EOPNOTSUPP;
  214. IL_ERR("Static key invalid: cipher %x\n", key->cipher);
  215. return -EINVAL;
  216. }
  217. static void
  218. il3945_clear_free_frames(struct il_priv *il)
  219. {
  220. struct list_head *element;
  221. D_INFO("%d frames on pre-allocated heap on clear.\n", il->frames_count);
  222. while (!list_empty(&il->free_frames)) {
  223. element = il->free_frames.next;
  224. list_del(element);
  225. kfree(list_entry(element, struct il3945_frame, list));
  226. il->frames_count--;
  227. }
  228. if (il->frames_count) {
  229. IL_WARN("%d frames still in use. Did we lose one?\n",
  230. il->frames_count);
  231. il->frames_count = 0;
  232. }
  233. }
  234. static struct il3945_frame *
  235. il3945_get_free_frame(struct il_priv *il)
  236. {
  237. struct il3945_frame *frame;
  238. struct list_head *element;
  239. if (list_empty(&il->free_frames)) {
  240. frame = kzalloc(sizeof(*frame), GFP_KERNEL);
  241. if (!frame) {
  242. IL_ERR("Could not allocate frame!\n");
  243. return NULL;
  244. }
  245. il->frames_count++;
  246. return frame;
  247. }
  248. element = il->free_frames.next;
  249. list_del(element);
  250. return list_entry(element, struct il3945_frame, list);
  251. }
  252. static void
  253. il3945_free_frame(struct il_priv *il, struct il3945_frame *frame)
  254. {
  255. memset(frame, 0, sizeof(*frame));
  256. list_add(&frame->list, &il->free_frames);
  257. }
  258. unsigned int
  259. il3945_fill_beacon_frame(struct il_priv *il, struct ieee80211_hdr *hdr,
  260. int left)
  261. {
  262. if (!il_is_associated(il) || !il->beacon_skb)
  263. return 0;
  264. if (il->beacon_skb->len > left)
  265. return 0;
  266. memcpy(hdr, il->beacon_skb->data, il->beacon_skb->len);
  267. return il->beacon_skb->len;
  268. }
  269. static int
  270. il3945_send_beacon_cmd(struct il_priv *il)
  271. {
  272. struct il3945_frame *frame;
  273. unsigned int frame_size;
  274. int rc;
  275. u8 rate;
  276. frame = il3945_get_free_frame(il);
  277. if (!frame) {
  278. IL_ERR("Could not obtain free frame buffer for beacon "
  279. "command.\n");
  280. return -ENOMEM;
  281. }
  282. rate = il_get_lowest_plcp(il, &il->ctx);
  283. frame_size = il3945_hw_get_beacon_cmd(il, frame, rate);
  284. rc = il_send_cmd_pdu(il, C_TX_BEACON, frame_size, &frame->u.cmd[0]);
  285. il3945_free_frame(il, frame);
  286. return rc;
  287. }
  288. static void
  289. il3945_unset_hw_params(struct il_priv *il)
  290. {
  291. if (il->_3945.shared_virt)
  292. dma_free_coherent(&il->pci_dev->dev,
  293. sizeof(struct il3945_shared),
  294. il->_3945.shared_virt, il->_3945.shared_phys);
  295. }
  296. static void
  297. il3945_build_tx_cmd_hwcrypto(struct il_priv *il, struct ieee80211_tx_info *info,
  298. struct il_device_cmd *cmd,
  299. struct sk_buff *skb_frag, int sta_id)
  300. {
  301. struct il3945_tx_cmd *tx_cmd = (struct il3945_tx_cmd *)cmd->cmd.payload;
  302. struct il_hw_key *keyinfo = &il->stations[sta_id].keyinfo;
  303. tx_cmd->sec_ctl = 0;
  304. switch (keyinfo->cipher) {
  305. case WLAN_CIPHER_SUITE_CCMP:
  306. tx_cmd->sec_ctl = TX_CMD_SEC_CCM;
  307. memcpy(tx_cmd->key, keyinfo->key, keyinfo->keylen);
  308. D_TX("tx_cmd with AES hwcrypto\n");
  309. break;
  310. case WLAN_CIPHER_SUITE_TKIP:
  311. break;
  312. case WLAN_CIPHER_SUITE_WEP104:
  313. tx_cmd->sec_ctl |= TX_CMD_SEC_KEY128;
  314. /* fall through */
  315. case WLAN_CIPHER_SUITE_WEP40:
  316. tx_cmd->sec_ctl |=
  317. TX_CMD_SEC_WEP | (info->control.hw_key->
  318. hw_key_idx & TX_CMD_SEC_MSK) <<
  319. TX_CMD_SEC_SHIFT;
  320. memcpy(&tx_cmd->key[3], keyinfo->key, keyinfo->keylen);
  321. D_TX("Configuring packet for WEP encryption " "with key %d\n",
  322. info->control.hw_key->hw_key_idx);
  323. break;
  324. default:
  325. IL_ERR("Unknown encode cipher %x\n", keyinfo->cipher);
  326. break;
  327. }
  328. }
  329. /*
  330. * handle build C_TX command notification.
  331. */
  332. static void
  333. il3945_build_tx_cmd_basic(struct il_priv *il, struct il_device_cmd *cmd,
  334. struct ieee80211_tx_info *info,
  335. struct ieee80211_hdr *hdr, u8 std_id)
  336. {
  337. struct il3945_tx_cmd *tx_cmd = (struct il3945_tx_cmd *)cmd->cmd.payload;
  338. __le32 tx_flags = tx_cmd->tx_flags;
  339. __le16 fc = hdr->frame_control;
  340. tx_cmd->stop_time.life_time = TX_CMD_LIFE_TIME_INFINITE;
  341. if (!(info->flags & IEEE80211_TX_CTL_NO_ACK)) {
  342. tx_flags |= TX_CMD_FLG_ACK_MSK;
  343. if (ieee80211_is_mgmt(fc))
  344. tx_flags |= TX_CMD_FLG_SEQ_CTL_MSK;
  345. if (ieee80211_is_probe_resp(fc) &&
  346. !(le16_to_cpu(hdr->seq_ctrl) & 0xf))
  347. tx_flags |= TX_CMD_FLG_TSF_MSK;
  348. } else {
  349. tx_flags &= (~TX_CMD_FLG_ACK_MSK);
  350. tx_flags |= TX_CMD_FLG_SEQ_CTL_MSK;
  351. }
  352. tx_cmd->sta_id = std_id;
  353. if (ieee80211_has_morefrags(fc))
  354. tx_flags |= TX_CMD_FLG_MORE_FRAG_MSK;
  355. if (ieee80211_is_data_qos(fc)) {
  356. u8 *qc = ieee80211_get_qos_ctl(hdr);
  357. tx_cmd->tid_tspec = qc[0] & 0xf;
  358. tx_flags &= ~TX_CMD_FLG_SEQ_CTL_MSK;
  359. } else {
  360. tx_flags |= TX_CMD_FLG_SEQ_CTL_MSK;
  361. }
  362. il_tx_cmd_protection(il, info, fc, &tx_flags);
  363. tx_flags &= ~(TX_CMD_FLG_ANT_SEL_MSK);
  364. if (ieee80211_is_mgmt(fc)) {
  365. if (ieee80211_is_assoc_req(fc) || ieee80211_is_reassoc_req(fc))
  366. tx_cmd->timeout.pm_frame_timeout = cpu_to_le16(3);
  367. else
  368. tx_cmd->timeout.pm_frame_timeout = cpu_to_le16(2);
  369. } else {
  370. tx_cmd->timeout.pm_frame_timeout = 0;
  371. }
  372. tx_cmd->driver_txop = 0;
  373. tx_cmd->tx_flags = tx_flags;
  374. tx_cmd->next_frame_len = 0;
  375. }
  376. /*
  377. * start C_TX command process
  378. */
  379. static int
  380. il3945_tx_skb(struct il_priv *il, struct sk_buff *skb)
  381. {
  382. struct ieee80211_hdr *hdr = (struct ieee80211_hdr *)skb->data;
  383. struct ieee80211_tx_info *info = IEEE80211_SKB_CB(skb);
  384. struct il3945_tx_cmd *tx_cmd;
  385. struct il_tx_queue *txq = NULL;
  386. struct il_queue *q = NULL;
  387. struct il_device_cmd *out_cmd;
  388. struct il_cmd_meta *out_meta;
  389. dma_addr_t phys_addr;
  390. dma_addr_t txcmd_phys;
  391. int txq_id = skb_get_queue_mapping(skb);
  392. u16 len, idx, hdr_len;
  393. u8 id;
  394. u8 unicast;
  395. u8 sta_id;
  396. u8 tid = 0;
  397. __le16 fc;
  398. u8 wait_write_ptr = 0;
  399. unsigned long flags;
  400. spin_lock_irqsave(&il->lock, flags);
  401. if (il_is_rfkill(il)) {
  402. D_DROP("Dropping - RF KILL\n");
  403. goto drop_unlock;
  404. }
  405. if ((ieee80211_get_tx_rate(il->hw, info)->hw_value & 0xFF) ==
  406. IL_INVALID_RATE) {
  407. IL_ERR("ERROR: No TX rate available.\n");
  408. goto drop_unlock;
  409. }
  410. unicast = !is_multicast_ether_addr(hdr->addr1);
  411. id = 0;
  412. fc = hdr->frame_control;
  413. #ifdef CONFIG_IWLEGACY_DEBUG
  414. if (ieee80211_is_auth(fc))
  415. D_TX("Sending AUTH frame\n");
  416. else if (ieee80211_is_assoc_req(fc))
  417. D_TX("Sending ASSOC frame\n");
  418. else if (ieee80211_is_reassoc_req(fc))
  419. D_TX("Sending REASSOC frame\n");
  420. #endif
  421. spin_unlock_irqrestore(&il->lock, flags);
  422. hdr_len = ieee80211_hdrlen(fc);
  423. /* Find idx into station table for destination station */
  424. sta_id = il_sta_id_or_broadcast(il, &il->ctx, info->control.sta);
  425. if (sta_id == IL_INVALID_STATION) {
  426. D_DROP("Dropping - INVALID STATION: %pM\n", hdr->addr1);
  427. goto drop;
  428. }
  429. D_RATE("station Id %d\n", sta_id);
  430. if (ieee80211_is_data_qos(fc)) {
  431. u8 *qc = ieee80211_get_qos_ctl(hdr);
  432. tid = qc[0] & IEEE80211_QOS_CTL_TID_MASK;
  433. if (unlikely(tid >= MAX_TID_COUNT))
  434. goto drop;
  435. }
  436. /* Descriptor for chosen Tx queue */
  437. txq = &il->txq[txq_id];
  438. q = &txq->q;
  439. if ((il_queue_space(q) < q->high_mark))
  440. goto drop;
  441. spin_lock_irqsave(&il->lock, flags);
  442. idx = il_get_cmd_idx(q, q->write_ptr, 0);
  443. /* Set up driver data for this TFD */
  444. memset(&(txq->txb[q->write_ptr]), 0, sizeof(struct il_tx_info));
  445. txq->txb[q->write_ptr].skb = skb;
  446. txq->txb[q->write_ptr].ctx = &il->ctx;
  447. /* Init first empty entry in queue's array of Tx/cmd buffers */
  448. out_cmd = txq->cmd[idx];
  449. out_meta = &txq->meta[idx];
  450. tx_cmd = (struct il3945_tx_cmd *)out_cmd->cmd.payload;
  451. memset(&out_cmd->hdr, 0, sizeof(out_cmd->hdr));
  452. memset(tx_cmd, 0, sizeof(*tx_cmd));
  453. /*
  454. * Set up the Tx-command (not MAC!) header.
  455. * Store the chosen Tx queue and TFD idx within the sequence field;
  456. * after Tx, uCode's Tx response will return this value so driver can
  457. * locate the frame within the tx queue and do post-tx processing.
  458. */
  459. out_cmd->hdr.cmd = C_TX;
  460. out_cmd->hdr.sequence =
  461. cpu_to_le16((u16)
  462. (QUEUE_TO_SEQ(txq_id) | IDX_TO_SEQ(q->write_ptr)));
  463. /* Copy MAC header from skb into command buffer */
  464. memcpy(tx_cmd->hdr, hdr, hdr_len);
  465. if (info->control.hw_key)
  466. il3945_build_tx_cmd_hwcrypto(il, info, out_cmd, skb, sta_id);
  467. /* TODO need this for burst mode later on */
  468. il3945_build_tx_cmd_basic(il, out_cmd, info, hdr, sta_id);
  469. /* set is_hcca to 0; it probably will never be implemented */
  470. il3945_hw_build_tx_cmd_rate(il, out_cmd, info, hdr, sta_id, 0);
  471. /* Total # bytes to be transmitted */
  472. len = (u16) skb->len;
  473. tx_cmd->len = cpu_to_le16(len);
  474. il_dbg_log_tx_data_frame(il, len, hdr);
  475. il_update_stats(il, true, fc, len);
  476. tx_cmd->tx_flags &= ~TX_CMD_FLG_ANT_A_MSK;
  477. tx_cmd->tx_flags &= ~TX_CMD_FLG_ANT_B_MSK;
  478. if (!ieee80211_has_morefrags(hdr->frame_control)) {
  479. txq->need_update = 1;
  480. } else {
  481. wait_write_ptr = 1;
  482. txq->need_update = 0;
  483. }
  484. D_TX("sequence nr = 0X%x\n", le16_to_cpu(out_cmd->hdr.sequence));
  485. D_TX("tx_flags = 0X%x\n", le32_to_cpu(tx_cmd->tx_flags));
  486. il_print_hex_dump(il, IL_DL_TX, tx_cmd, sizeof(*tx_cmd));
  487. il_print_hex_dump(il, IL_DL_TX, (u8 *) tx_cmd->hdr,
  488. ieee80211_hdrlen(fc));
  489. /*
  490. * Use the first empty entry in this queue's command buffer array
  491. * to contain the Tx command and MAC header concatenated together
  492. * (payload data will be in another buffer).
  493. * Size of this varies, due to varying MAC header length.
  494. * If end is not dword aligned, we'll have 2 extra bytes at the end
  495. * of the MAC header (device reads on dword boundaries).
  496. * We'll tell device about this padding later.
  497. */
  498. len =
  499. sizeof(struct il3945_tx_cmd) + sizeof(struct il_cmd_header) +
  500. hdr_len;
  501. len = (len + 3) & ~3;
  502. /* Physical address of this Tx command's header (not MAC header!),
  503. * within command buffer array. */
  504. txcmd_phys =
  505. pci_map_single(il->pci_dev, &out_cmd->hdr, len, PCI_DMA_TODEVICE);
  506. /* we do not map meta data ... so we can safely access address to
  507. * provide to unmap command*/
  508. dma_unmap_addr_set(out_meta, mapping, txcmd_phys);
  509. dma_unmap_len_set(out_meta, len, len);
  510. /* Add buffer containing Tx command and MAC(!) header to TFD's
  511. * first entry */
  512. il->cfg->ops->lib->txq_attach_buf_to_tfd(il, txq, txcmd_phys, len, 1,
  513. 0);
  514. /* Set up TFD's 2nd entry to point directly to remainder of skb,
  515. * if any (802.11 null frames have no payload). */
  516. len = skb->len - hdr_len;
  517. if (len) {
  518. phys_addr =
  519. pci_map_single(il->pci_dev, skb->data + hdr_len, len,
  520. PCI_DMA_TODEVICE);
  521. il->cfg->ops->lib->txq_attach_buf_to_tfd(il, txq, phys_addr,
  522. len, 0, U32_PAD(len));
  523. }
  524. /* Tell device the write idx *just past* this latest filled TFD */
  525. q->write_ptr = il_queue_inc_wrap(q->write_ptr, q->n_bd);
  526. il_txq_update_write_ptr(il, txq);
  527. spin_unlock_irqrestore(&il->lock, flags);
  528. if (il_queue_space(q) < q->high_mark && il->mac80211_registered) {
  529. if (wait_write_ptr) {
  530. spin_lock_irqsave(&il->lock, flags);
  531. txq->need_update = 1;
  532. il_txq_update_write_ptr(il, txq);
  533. spin_unlock_irqrestore(&il->lock, flags);
  534. }
  535. il_stop_queue(il, txq);
  536. }
  537. return 0;
  538. drop_unlock:
  539. spin_unlock_irqrestore(&il->lock, flags);
  540. drop:
  541. return -1;
  542. }
  543. static int
  544. il3945_get_measurement(struct il_priv *il,
  545. struct ieee80211_measurement_params *params, u8 type)
  546. {
  547. struct il_spectrum_cmd spectrum;
  548. struct il_rx_pkt *pkt;
  549. struct il_host_cmd cmd = {
  550. .id = C_SPECTRUM_MEASUREMENT,
  551. .data = (void *)&spectrum,
  552. .flags = CMD_WANT_SKB,
  553. };
  554. u32 add_time = le64_to_cpu(params->start_time);
  555. int rc;
  556. int spectrum_resp_status;
  557. int duration = le16_to_cpu(params->duration);
  558. struct il_rxon_context *ctx = &il->ctx;
  559. if (il_is_associated(il))
  560. add_time =
  561. il_usecs_to_beacons(il,
  562. le64_to_cpu(params->start_time) -
  563. il->_3945.last_tsf,
  564. le16_to_cpu(ctx->timing.
  565. beacon_interval));
  566. memset(&spectrum, 0, sizeof(spectrum));
  567. spectrum.channel_count = cpu_to_le16(1);
  568. spectrum.flags =
  569. RXON_FLG_TSF2HOST_MSK | RXON_FLG_ANT_A_MSK | RXON_FLG_DIS_DIV_MSK;
  570. spectrum.filter_flags = MEASUREMENT_FILTER_FLAG;
  571. cmd.len = sizeof(spectrum);
  572. spectrum.len = cpu_to_le16(cmd.len - sizeof(spectrum.len));
  573. if (il_is_associated(il))
  574. spectrum.start_time =
  575. il_add_beacon_time(il, il->_3945.last_beacon_time, add_time,
  576. le16_to_cpu(ctx->timing.
  577. beacon_interval));
  578. else
  579. spectrum.start_time = 0;
  580. spectrum.channels[0].duration = cpu_to_le32(duration * TIME_UNIT);
  581. spectrum.channels[0].channel = params->channel;
  582. spectrum.channels[0].type = type;
  583. if (ctx->active.flags & RXON_FLG_BAND_24G_MSK)
  584. spectrum.flags |=
  585. RXON_FLG_BAND_24G_MSK | RXON_FLG_AUTO_DETECT_MSK |
  586. RXON_FLG_TGG_PROTECT_MSK;
  587. rc = il_send_cmd_sync(il, &cmd);
  588. if (rc)
  589. return rc;
  590. pkt = (struct il_rx_pkt *)cmd.reply_page;
  591. if (pkt->hdr.flags & IL_CMD_FAILED_MSK) {
  592. IL_ERR("Bad return from N_RX_ON_ASSOC command\n");
  593. rc = -EIO;
  594. }
  595. spectrum_resp_status = le16_to_cpu(pkt->u.spectrum.status);
  596. switch (spectrum_resp_status) {
  597. case 0: /* Command will be handled */
  598. if (pkt->u.spectrum.id != 0xff) {
  599. D_INFO("Replaced existing measurement: %d\n",
  600. pkt->u.spectrum.id);
  601. il->measurement_status &= ~MEASUREMENT_READY;
  602. }
  603. il->measurement_status |= MEASUREMENT_ACTIVE;
  604. rc = 0;
  605. break;
  606. case 1: /* Command will not be handled */
  607. rc = -EAGAIN;
  608. break;
  609. }
  610. il_free_pages(il, cmd.reply_page);
  611. return rc;
  612. }
  613. static void
  614. il3945_hdl_alive(struct il_priv *il, struct il_rx_buf *rxb)
  615. {
  616. struct il_rx_pkt *pkt = rxb_addr(rxb);
  617. struct il_alive_resp *palive;
  618. struct delayed_work *pwork;
  619. palive = &pkt->u.alive_frame;
  620. D_INFO("Alive ucode status 0x%08X revision " "0x%01X 0x%01X\n",
  621. palive->is_valid, palive->ver_type, palive->ver_subtype);
  622. if (palive->ver_subtype == INITIALIZE_SUBTYPE) {
  623. D_INFO("Initialization Alive received.\n");
  624. memcpy(&il->card_alive_init, &pkt->u.alive_frame,
  625. sizeof(struct il_alive_resp));
  626. pwork = &il->init_alive_start;
  627. } else {
  628. D_INFO("Runtime Alive received.\n");
  629. memcpy(&il->card_alive, &pkt->u.alive_frame,
  630. sizeof(struct il_alive_resp));
  631. pwork = &il->alive_start;
  632. il3945_disable_events(il);
  633. }
  634. /* We delay the ALIVE response by 5ms to
  635. * give the HW RF Kill time to activate... */
  636. if (palive->is_valid == UCODE_VALID_OK)
  637. queue_delayed_work(il->workqueue, pwork, msecs_to_jiffies(5));
  638. else
  639. IL_WARN("uCode did not respond OK.\n");
  640. }
  641. static void
  642. il3945_hdl_add_sta(struct il_priv *il, struct il_rx_buf *rxb)
  643. {
  644. #ifdef CONFIG_IWLEGACY_DEBUG
  645. struct il_rx_pkt *pkt = rxb_addr(rxb);
  646. #endif
  647. D_RX("Received C_ADD_STA: 0x%02X\n", pkt->u.status);
  648. }
  649. static void
  650. il3945_hdl_beacon(struct il_priv *il, struct il_rx_buf *rxb)
  651. {
  652. struct il_rx_pkt *pkt = rxb_addr(rxb);
  653. struct il3945_beacon_notif *beacon = &(pkt->u.beacon_status);
  654. #ifdef CONFIG_IWLEGACY_DEBUG
  655. u8 rate = beacon->beacon_notify_hdr.rate;
  656. D_RX("beacon status %x retries %d iss %d " "tsf %d %d rate %d\n",
  657. le32_to_cpu(beacon->beacon_notify_hdr.status) & TX_STATUS_MSK,
  658. beacon->beacon_notify_hdr.failure_frame,
  659. le32_to_cpu(beacon->ibss_mgr_status),
  660. le32_to_cpu(beacon->high_tsf), le32_to_cpu(beacon->low_tsf), rate);
  661. #endif
  662. il->ibss_manager = le32_to_cpu(beacon->ibss_mgr_status);
  663. }
  664. /* Handle notification from uCode that card's power state is changing
  665. * due to software, hardware, or critical temperature RFKILL */
  666. static void
  667. il3945_hdl_card_state(struct il_priv *il, struct il_rx_buf *rxb)
  668. {
  669. struct il_rx_pkt *pkt = rxb_addr(rxb);
  670. u32 flags = le32_to_cpu(pkt->u.card_state_notif.flags);
  671. unsigned long status = il->status;
  672. IL_WARN("Card state received: HW:%s SW:%s\n",
  673. (flags & HW_CARD_DISABLED) ? "Kill" : "On",
  674. (flags & SW_CARD_DISABLED) ? "Kill" : "On");
  675. _il_wr(il, CSR_UCODE_DRV_GP1_SET, CSR_UCODE_DRV_GP1_BIT_CMD_BLOCKED);
  676. if (flags & HW_CARD_DISABLED)
  677. set_bit(S_RF_KILL_HW, &il->status);
  678. else
  679. clear_bit(S_RF_KILL_HW, &il->status);
  680. il_scan_cancel(il);
  681. if ((test_bit(S_RF_KILL_HW, &status) !=
  682. test_bit(S_RF_KILL_HW, &il->status)))
  683. wiphy_rfkill_set_hw_state(il->hw->wiphy,
  684. test_bit(S_RF_KILL_HW, &il->status));
  685. else
  686. wake_up(&il->wait_command_queue);
  687. }
  688. /**
  689. * il3945_setup_handlers - Initialize Rx handler callbacks
  690. *
  691. * Setup the RX handlers for each of the reply types sent from the uCode
  692. * to the host.
  693. *
  694. * This function chains into the hardware specific files for them to setup
  695. * any hardware specific handlers as well.
  696. */
  697. static void
  698. il3945_setup_handlers(struct il_priv *il)
  699. {
  700. il->handlers[N_ALIVE] = il3945_hdl_alive;
  701. il->handlers[C_ADD_STA] = il3945_hdl_add_sta;
  702. il->handlers[N_ERROR] = il_hdl_error;
  703. il->handlers[N_CHANNEL_SWITCH] = il_hdl_csa;
  704. il->handlers[N_SPECTRUM_MEASUREMENT] = il_hdl_spectrum_measurement;
  705. il->handlers[N_PM_SLEEP] = il_hdl_pm_sleep;
  706. il->handlers[N_PM_DEBUG_STATS] = il_hdl_pm_debug_stats;
  707. il->handlers[N_BEACON] = il3945_hdl_beacon;
  708. /*
  709. * The same handler is used for both the REPLY to a discrete
  710. * stats request from the host as well as for the periodic
  711. * stats notifications (after received beacons) from the uCode.
  712. */
  713. il->handlers[C_STATS] = il3945_hdl_c_stats;
  714. il->handlers[N_STATS] = il3945_hdl_stats;
  715. il_setup_rx_scan_handlers(il);
  716. il->handlers[N_CARD_STATE] = il3945_hdl_card_state;
  717. /* Set up hardware specific Rx handlers */
  718. il3945_hw_handler_setup(il);
  719. }
  720. /************************** RX-FUNCTIONS ****************************/
  721. /*
  722. * Rx theory of operation
  723. *
  724. * The host allocates 32 DMA target addresses and passes the host address
  725. * to the firmware at register IL_RFDS_TBL_LOWER + N * RFD_SIZE where N is
  726. * 0 to 31
  727. *
  728. * Rx Queue Indexes
  729. * The host/firmware share two idx registers for managing the Rx buffers.
  730. *
  731. * The READ idx maps to the first position that the firmware may be writing
  732. * to -- the driver can read up to (but not including) this position and get
  733. * good data.
  734. * The READ idx is managed by the firmware once the card is enabled.
  735. *
  736. * The WRITE idx maps to the last position the driver has read from -- the
  737. * position preceding WRITE is the last slot the firmware can place a packet.
  738. *
  739. * The queue is empty (no good data) if WRITE = READ - 1, and is full if
  740. * WRITE = READ.
  741. *
  742. * During initialization, the host sets up the READ queue position to the first
  743. * IDX position, and WRITE to the last (READ - 1 wrapped)
  744. *
  745. * When the firmware places a packet in a buffer, it will advance the READ idx
  746. * and fire the RX interrupt. The driver can then query the READ idx and
  747. * process as many packets as possible, moving the WRITE idx forward as it
  748. * resets the Rx queue buffers with new memory.
  749. *
  750. * The management in the driver is as follows:
  751. * + A list of pre-allocated SKBs is stored in iwl->rxq->rx_free. When
  752. * iwl->rxq->free_count drops to or below RX_LOW_WATERMARK, work is scheduled
  753. * to replenish the iwl->rxq->rx_free.
  754. * + In il3945_rx_replenish (scheduled) if 'processed' != 'read' then the
  755. * iwl->rxq is replenished and the READ IDX is updated (updating the
  756. * 'processed' and 'read' driver idxes as well)
  757. * + A received packet is processed and handed to the kernel network stack,
  758. * detached from the iwl->rxq. The driver 'processed' idx is updated.
  759. * + The Host/Firmware iwl->rxq is replenished at tasklet time from the rx_free
  760. * list. If there are no allocated buffers in iwl->rxq->rx_free, the READ
  761. * IDX is not incremented and iwl->status(RX_STALLED) is set. If there
  762. * were enough free buffers and RX_STALLED is set it is cleared.
  763. *
  764. *
  765. * Driver sequence:
  766. *
  767. * il3945_rx_replenish() Replenishes rx_free list from rx_used, and calls
  768. * il3945_rx_queue_restock
  769. * il3945_rx_queue_restock() Moves available buffers from rx_free into Rx
  770. * queue, updates firmware pointers, and updates
  771. * the WRITE idx. If insufficient rx_free buffers
  772. * are available, schedules il3945_rx_replenish
  773. *
  774. * -- enable interrupts --
  775. * ISR - il3945_rx() Detach il_rx_bufs from pool up to the
  776. * READ IDX, detaching the SKB from the pool.
  777. * Moves the packet buffer from queue to rx_used.
  778. * Calls il3945_rx_queue_restock to refill any empty
  779. * slots.
  780. * ...
  781. *
  782. */
  783. /**
  784. * il3945_dma_addr2rbd_ptr - convert a DMA address to a uCode read buffer ptr
  785. */
  786. static inline __le32
  787. il3945_dma_addr2rbd_ptr(struct il_priv *il, dma_addr_t dma_addr)
  788. {
  789. return cpu_to_le32((u32) dma_addr);
  790. }
  791. /**
  792. * il3945_rx_queue_restock - refill RX queue from pre-allocated pool
  793. *
  794. * If there are slots in the RX queue that need to be restocked,
  795. * and we have free pre-allocated buffers, fill the ranks as much
  796. * as we can, pulling from rx_free.
  797. *
  798. * This moves the 'write' idx forward to catch up with 'processed', and
  799. * also updates the memory address in the firmware to reference the new
  800. * target buffer.
  801. */
  802. static void
  803. il3945_rx_queue_restock(struct il_priv *il)
  804. {
  805. struct il_rx_queue *rxq = &il->rxq;
  806. struct list_head *element;
  807. struct il_rx_buf *rxb;
  808. unsigned long flags;
  809. int write;
  810. spin_lock_irqsave(&rxq->lock, flags);
  811. write = rxq->write & ~0x7;
  812. while (il_rx_queue_space(rxq) > 0 && rxq->free_count) {
  813. /* Get next free Rx buffer, remove from free list */
  814. element = rxq->rx_free.next;
  815. rxb = list_entry(element, struct il_rx_buf, list);
  816. list_del(element);
  817. /* Point to Rx buffer via next RBD in circular buffer */
  818. rxq->bd[rxq->write] =
  819. il3945_dma_addr2rbd_ptr(il, rxb->page_dma);
  820. rxq->queue[rxq->write] = rxb;
  821. rxq->write = (rxq->write + 1) & RX_QUEUE_MASK;
  822. rxq->free_count--;
  823. }
  824. spin_unlock_irqrestore(&rxq->lock, flags);
  825. /* If the pre-allocated buffer pool is dropping low, schedule to
  826. * refill it */
  827. if (rxq->free_count <= RX_LOW_WATERMARK)
  828. queue_work(il->workqueue, &il->rx_replenish);
  829. /* If we've added more space for the firmware to place data, tell it.
  830. * Increment device's write pointer in multiples of 8. */
  831. if (rxq->write_actual != (rxq->write & ~0x7) ||
  832. abs(rxq->write - rxq->read) > 7) {
  833. spin_lock_irqsave(&rxq->lock, flags);
  834. rxq->need_update = 1;
  835. spin_unlock_irqrestore(&rxq->lock, flags);
  836. il_rx_queue_update_write_ptr(il, rxq);
  837. }
  838. }
  839. /**
  840. * il3945_rx_replenish - Move all used packet from rx_used to rx_free
  841. *
  842. * When moving to rx_free an SKB is allocated for the slot.
  843. *
  844. * Also restock the Rx queue via il3945_rx_queue_restock.
  845. * This is called as a scheduled work item (except for during initialization)
  846. */
  847. static void
  848. il3945_rx_allocate(struct il_priv *il, gfp_t priority)
  849. {
  850. struct il_rx_queue *rxq = &il->rxq;
  851. struct list_head *element;
  852. struct il_rx_buf *rxb;
  853. struct page *page;
  854. unsigned long flags;
  855. gfp_t gfp_mask = priority;
  856. while (1) {
  857. spin_lock_irqsave(&rxq->lock, flags);
  858. if (list_empty(&rxq->rx_used)) {
  859. spin_unlock_irqrestore(&rxq->lock, flags);
  860. return;
  861. }
  862. spin_unlock_irqrestore(&rxq->lock, flags);
  863. if (rxq->free_count > RX_LOW_WATERMARK)
  864. gfp_mask |= __GFP_NOWARN;
  865. if (il->hw_params.rx_page_order > 0)
  866. gfp_mask |= __GFP_COMP;
  867. /* Alloc a new receive buffer */
  868. page = alloc_pages(gfp_mask, il->hw_params.rx_page_order);
  869. if (!page) {
  870. if (net_ratelimit())
  871. D_INFO("Failed to allocate SKB buffer.\n");
  872. if (rxq->free_count <= RX_LOW_WATERMARK &&
  873. net_ratelimit())
  874. IL_ERR("Failed to allocate SKB buffer with %0x."
  875. "Only %u free buffers remaining.\n",
  876. priority, rxq->free_count);
  877. /* We don't reschedule replenish work here -- we will
  878. * call the restock method and if it still needs
  879. * more buffers it will schedule replenish */
  880. break;
  881. }
  882. spin_lock_irqsave(&rxq->lock, flags);
  883. if (list_empty(&rxq->rx_used)) {
  884. spin_unlock_irqrestore(&rxq->lock, flags);
  885. __free_pages(page, il->hw_params.rx_page_order);
  886. return;
  887. }
  888. element = rxq->rx_used.next;
  889. rxb = list_entry(element, struct il_rx_buf, list);
  890. list_del(element);
  891. spin_unlock_irqrestore(&rxq->lock, flags);
  892. rxb->page = page;
  893. /* Get physical address of RB/SKB */
  894. rxb->page_dma =
  895. pci_map_page(il->pci_dev, page, 0,
  896. PAGE_SIZE << il->hw_params.rx_page_order,
  897. PCI_DMA_FROMDEVICE);
  898. spin_lock_irqsave(&rxq->lock, flags);
  899. list_add_tail(&rxb->list, &rxq->rx_free);
  900. rxq->free_count++;
  901. il->alloc_rxb_page++;
  902. spin_unlock_irqrestore(&rxq->lock, flags);
  903. }
  904. }
  905. void
  906. il3945_rx_queue_reset(struct il_priv *il, struct il_rx_queue *rxq)
  907. {
  908. unsigned long flags;
  909. int i;
  910. spin_lock_irqsave(&rxq->lock, flags);
  911. INIT_LIST_HEAD(&rxq->rx_free);
  912. INIT_LIST_HEAD(&rxq->rx_used);
  913. /* Fill the rx_used queue with _all_ of the Rx buffers */
  914. for (i = 0; i < RX_FREE_BUFFERS + RX_QUEUE_SIZE; i++) {
  915. /* In the reset function, these buffers may have been allocated
  916. * to an SKB, so we need to unmap and free potential storage */
  917. if (rxq->pool[i].page != NULL) {
  918. pci_unmap_page(il->pci_dev, rxq->pool[i].page_dma,
  919. PAGE_SIZE << il->hw_params.rx_page_order,
  920. PCI_DMA_FROMDEVICE);
  921. __il_free_pages(il, rxq->pool[i].page);
  922. rxq->pool[i].page = NULL;
  923. }
  924. list_add_tail(&rxq->pool[i].list, &rxq->rx_used);
  925. }
  926. /* Set us so that we have processed and used all buffers, but have
  927. * not restocked the Rx queue with fresh buffers */
  928. rxq->read = rxq->write = 0;
  929. rxq->write_actual = 0;
  930. rxq->free_count = 0;
  931. spin_unlock_irqrestore(&rxq->lock, flags);
  932. }
  933. void
  934. il3945_rx_replenish(void *data)
  935. {
  936. struct il_priv *il = data;
  937. unsigned long flags;
  938. il3945_rx_allocate(il, GFP_KERNEL);
  939. spin_lock_irqsave(&il->lock, flags);
  940. il3945_rx_queue_restock(il);
  941. spin_unlock_irqrestore(&il->lock, flags);
  942. }
  943. static void
  944. il3945_rx_replenish_now(struct il_priv *il)
  945. {
  946. il3945_rx_allocate(il, GFP_ATOMIC);
  947. il3945_rx_queue_restock(il);
  948. }
  949. /* Assumes that the skb field of the buffers in 'pool' is kept accurate.
  950. * If an SKB has been detached, the POOL needs to have its SKB set to NULL
  951. * This free routine walks the list of POOL entries and if SKB is set to
  952. * non NULL it is unmapped and freed
  953. */
  954. static void
  955. il3945_rx_queue_free(struct il_priv *il, struct il_rx_queue *rxq)
  956. {
  957. int i;
  958. for (i = 0; i < RX_QUEUE_SIZE + RX_FREE_BUFFERS; i++) {
  959. if (rxq->pool[i].page != NULL) {
  960. pci_unmap_page(il->pci_dev, rxq->pool[i].page_dma,
  961. PAGE_SIZE << il->hw_params.rx_page_order,
  962. PCI_DMA_FROMDEVICE);
  963. __il_free_pages(il, rxq->pool[i].page);
  964. rxq->pool[i].page = NULL;
  965. }
  966. }
  967. dma_free_coherent(&il->pci_dev->dev, 4 * RX_QUEUE_SIZE, rxq->bd,
  968. rxq->bd_dma);
  969. dma_free_coherent(&il->pci_dev->dev, sizeof(struct il_rb_status),
  970. rxq->rb_stts, rxq->rb_stts_dma);
  971. rxq->bd = NULL;
  972. rxq->rb_stts = NULL;
  973. }
  974. /* Convert linear signal-to-noise ratio into dB */
  975. static u8 ratio2dB[100] = {
  976. /* 0 1 2 3 4 5 6 7 8 9 */
  977. 0, 0, 6, 10, 12, 14, 16, 17, 18, 19, /* 00 - 09 */
  978. 20, 21, 22, 22, 23, 23, 24, 25, 26, 26, /* 10 - 19 */
  979. 26, 26, 26, 27, 27, 28, 28, 28, 29, 29, /* 20 - 29 */
  980. 29, 30, 30, 30, 31, 31, 31, 31, 32, 32, /* 30 - 39 */
  981. 32, 32, 32, 33, 33, 33, 33, 33, 34, 34, /* 40 - 49 */
  982. 34, 34, 34, 34, 35, 35, 35, 35, 35, 35, /* 50 - 59 */
  983. 36, 36, 36, 36, 36, 36, 36, 37, 37, 37, /* 60 - 69 */
  984. 37, 37, 37, 37, 37, 38, 38, 38, 38, 38, /* 70 - 79 */
  985. 38, 38, 38, 38, 38, 39, 39, 39, 39, 39, /* 80 - 89 */
  986. 39, 39, 39, 39, 39, 40, 40, 40, 40, 40 /* 90 - 99 */
  987. };
  988. /* Calculates a relative dB value from a ratio of linear
  989. * (i.e. not dB) signal levels.
  990. * Conversion assumes that levels are voltages (20*log), not powers (10*log). */
  991. int
  992. il3945_calc_db_from_ratio(int sig_ratio)
  993. {
  994. /* 1000:1 or higher just report as 60 dB */
  995. if (sig_ratio >= 1000)
  996. return 60;
  997. /* 100:1 or higher, divide by 10 and use table,
  998. * add 20 dB to make up for divide by 10 */
  999. if (sig_ratio >= 100)
  1000. return 20 + (int)ratio2dB[sig_ratio / 10];
  1001. /* We shouldn't see this */
  1002. if (sig_ratio < 1)
  1003. return 0;
  1004. /* Use table for ratios 1:1 - 99:1 */
  1005. return (int)ratio2dB[sig_ratio];
  1006. }
  1007. /**
  1008. * il3945_rx_handle - Main entry function for receiving responses from uCode
  1009. *
  1010. * Uses the il->handlers callback function array to invoke
  1011. * the appropriate handlers, including command responses,
  1012. * frame-received notifications, and other notifications.
  1013. */
  1014. static void
  1015. il3945_rx_handle(struct il_priv *il)
  1016. {
  1017. struct il_rx_buf *rxb;
  1018. struct il_rx_pkt *pkt;
  1019. struct il_rx_queue *rxq = &il->rxq;
  1020. u32 r, i;
  1021. int reclaim;
  1022. unsigned long flags;
  1023. u8 fill_rx = 0;
  1024. u32 count = 8;
  1025. int total_empty = 0;
  1026. /* uCode's read idx (stored in shared DRAM) indicates the last Rx
  1027. * buffer that the driver may process (last buffer filled by ucode). */
  1028. r = le16_to_cpu(rxq->rb_stts->closed_rb_num) & 0x0FFF;
  1029. i = rxq->read;
  1030. /* calculate total frames need to be restock after handling RX */
  1031. total_empty = r - rxq->write_actual;
  1032. if (total_empty < 0)
  1033. total_empty += RX_QUEUE_SIZE;
  1034. if (total_empty > (RX_QUEUE_SIZE / 2))
  1035. fill_rx = 1;
  1036. /* Rx interrupt, but nothing sent from uCode */
  1037. if (i == r)
  1038. D_RX("r = %d, i = %d\n", r, i);
  1039. while (i != r) {
  1040. int len;
  1041. rxb = rxq->queue[i];
  1042. /* If an RXB doesn't have a Rx queue slot associated with it,
  1043. * then a bug has been introduced in the queue refilling
  1044. * routines -- catch it here */
  1045. BUG_ON(rxb == NULL);
  1046. rxq->queue[i] = NULL;
  1047. pci_unmap_page(il->pci_dev, rxb->page_dma,
  1048. PAGE_SIZE << il->hw_params.rx_page_order,
  1049. PCI_DMA_FROMDEVICE);
  1050. pkt = rxb_addr(rxb);
  1051. len = le32_to_cpu(pkt->len_n_flags) & IL_RX_FRAME_SIZE_MSK;
  1052. len += sizeof(u32); /* account for status word */
  1053. /* Reclaim a command buffer only if this packet is a response
  1054. * to a (driver-originated) command.
  1055. * If the packet (e.g. Rx frame) originated from uCode,
  1056. * there is no command buffer to reclaim.
  1057. * Ucode should set SEQ_RX_FRAME bit if ucode-originated,
  1058. * but apparently a few don't get set; catch them here. */
  1059. reclaim = !(pkt->hdr.sequence & SEQ_RX_FRAME) &&
  1060. pkt->hdr.cmd != N_STATS && pkt->hdr.cmd != C_TX;
  1061. /* Based on type of command response or notification,
  1062. * handle those that need handling via function in
  1063. * handlers table. See il3945_setup_handlers() */
  1064. if (il->handlers[pkt->hdr.cmd]) {
  1065. D_RX("r = %d, i = %d, %s, 0x%02x\n", r, i,
  1066. il_get_cmd_string(pkt->hdr.cmd), pkt->hdr.cmd);
  1067. il->isr_stats.handlers[pkt->hdr.cmd]++;
  1068. il->handlers[pkt->hdr.cmd] (il, rxb);
  1069. } else {
  1070. /* No handling needed */
  1071. D_RX("r %d i %d No handler needed for %s, 0x%02x\n", r,
  1072. i, il_get_cmd_string(pkt->hdr.cmd), pkt->hdr.cmd);
  1073. }
  1074. /*
  1075. * XXX: After here, we should always check rxb->page
  1076. * against NULL before touching it or its virtual
  1077. * memory (pkt). Because some handler might have
  1078. * already taken or freed the pages.
  1079. */
  1080. if (reclaim) {
  1081. /* Invoke any callbacks, transfer the buffer to caller,
  1082. * and fire off the (possibly) blocking il_send_cmd()
  1083. * as we reclaim the driver command queue */
  1084. if (rxb->page)
  1085. il_tx_cmd_complete(il, rxb);
  1086. else
  1087. IL_WARN("Claim null rxb?\n");
  1088. }
  1089. /* Reuse the page if possible. For notification packets and
  1090. * SKBs that fail to Rx correctly, add them back into the
  1091. * rx_free list for reuse later. */
  1092. spin_lock_irqsave(&rxq->lock, flags);
  1093. if (rxb->page != NULL) {
  1094. rxb->page_dma =
  1095. pci_map_page(il->pci_dev, rxb->page, 0,
  1096. PAGE_SIZE << il->hw_params.
  1097. rx_page_order, PCI_DMA_FROMDEVICE);
  1098. list_add_tail(&rxb->list, &rxq->rx_free);
  1099. rxq->free_count++;
  1100. } else
  1101. list_add_tail(&rxb->list, &rxq->rx_used);
  1102. spin_unlock_irqrestore(&rxq->lock, flags);
  1103. i = (i + 1) & RX_QUEUE_MASK;
  1104. /* If there are a lot of unused frames,
  1105. * restock the Rx queue so ucode won't assert. */
  1106. if (fill_rx) {
  1107. count++;
  1108. if (count >= 8) {
  1109. rxq->read = i;
  1110. il3945_rx_replenish_now(il);
  1111. count = 0;
  1112. }
  1113. }
  1114. }
  1115. /* Backtrack one entry */
  1116. rxq->read = i;
  1117. if (fill_rx)
  1118. il3945_rx_replenish_now(il);
  1119. else
  1120. il3945_rx_queue_restock(il);
  1121. }
  1122. /* call this function to flush any scheduled tasklet */
  1123. static inline void
  1124. il3945_synchronize_irq(struct il_priv *il)
  1125. {
  1126. /* wait to make sure we flush pending tasklet */
  1127. synchronize_irq(il->pci_dev->irq);
  1128. tasklet_kill(&il->irq_tasklet);
  1129. }
  1130. static const char *
  1131. il3945_desc_lookup(int i)
  1132. {
  1133. switch (i) {
  1134. case 1:
  1135. return "FAIL";
  1136. case 2:
  1137. return "BAD_PARAM";
  1138. case 3:
  1139. return "BAD_CHECKSUM";
  1140. case 4:
  1141. return "NMI_INTERRUPT";
  1142. case 5:
  1143. return "SYSASSERT";
  1144. case 6:
  1145. return "FATAL_ERROR";
  1146. }
  1147. return "UNKNOWN";
  1148. }
  1149. #define ERROR_START_OFFSET (1 * sizeof(u32))
  1150. #define ERROR_ELEM_SIZE (7 * sizeof(u32))
  1151. void
  1152. il3945_dump_nic_error_log(struct il_priv *il)
  1153. {
  1154. u32 i;
  1155. u32 desc, time, count, base, data1;
  1156. u32 blink1, blink2, ilink1, ilink2;
  1157. base = le32_to_cpu(il->card_alive.error_event_table_ptr);
  1158. if (!il3945_hw_valid_rtc_data_addr(base)) {
  1159. IL_ERR("Not valid error log pointer 0x%08X\n", base);
  1160. return;
  1161. }
  1162. count = il_read_targ_mem(il, base);
  1163. if (ERROR_START_OFFSET <= count * ERROR_ELEM_SIZE) {
  1164. IL_ERR("Start IWL Error Log Dump:\n");
  1165. IL_ERR("Status: 0x%08lX, count: %d\n", il->status, count);
  1166. }
  1167. IL_ERR("Desc Time asrtPC blink2 "
  1168. "ilink1 nmiPC Line\n");
  1169. for (i = ERROR_START_OFFSET;
  1170. i < (count * ERROR_ELEM_SIZE) + ERROR_START_OFFSET;
  1171. i += ERROR_ELEM_SIZE) {
  1172. desc = il_read_targ_mem(il, base + i);
  1173. time = il_read_targ_mem(il, base + i + 1 * sizeof(u32));
  1174. blink1 = il_read_targ_mem(il, base + i + 2 * sizeof(u32));
  1175. blink2 = il_read_targ_mem(il, base + i + 3 * sizeof(u32));
  1176. ilink1 = il_read_targ_mem(il, base + i + 4 * sizeof(u32));
  1177. ilink2 = il_read_targ_mem(il, base + i + 5 * sizeof(u32));
  1178. data1 = il_read_targ_mem(il, base + i + 6 * sizeof(u32));
  1179. IL_ERR("%-13s (0x%X) %010u 0x%05X 0x%05X 0x%05X 0x%05X %u\n\n",
  1180. il3945_desc_lookup(desc), desc, time, blink1, blink2,
  1181. ilink1, ilink2, data1);
  1182. }
  1183. }
  1184. static void
  1185. il3945_irq_tasklet(struct il_priv *il)
  1186. {
  1187. u32 inta, handled = 0;
  1188. u32 inta_fh;
  1189. unsigned long flags;
  1190. #ifdef CONFIG_IWLEGACY_DEBUG
  1191. u32 inta_mask;
  1192. #endif
  1193. spin_lock_irqsave(&il->lock, flags);
  1194. /* Ack/clear/reset pending uCode interrupts.
  1195. * Note: Some bits in CSR_INT are "OR" of bits in CSR_FH_INT_STATUS,
  1196. * and will clear only when CSR_FH_INT_STATUS gets cleared. */
  1197. inta = _il_rd(il, CSR_INT);
  1198. _il_wr(il, CSR_INT, inta);
  1199. /* Ack/clear/reset pending flow-handler (DMA) interrupts.
  1200. * Any new interrupts that happen after this, either while we're
  1201. * in this tasklet, or later, will show up in next ISR/tasklet. */
  1202. inta_fh = _il_rd(il, CSR_FH_INT_STATUS);
  1203. _il_wr(il, CSR_FH_INT_STATUS, inta_fh);
  1204. #ifdef CONFIG_IWLEGACY_DEBUG
  1205. if (il_get_debug_level(il) & IL_DL_ISR) {
  1206. /* just for debug */
  1207. inta_mask = _il_rd(il, CSR_INT_MASK);
  1208. D_ISR("inta 0x%08x, enabled 0x%08x, fh 0x%08x\n", inta,
  1209. inta_mask, inta_fh);
  1210. }
  1211. #endif
  1212. spin_unlock_irqrestore(&il->lock, flags);
  1213. /* Since CSR_INT and CSR_FH_INT_STATUS reads and clears are not
  1214. * atomic, make sure that inta covers all the interrupts that
  1215. * we've discovered, even if FH interrupt came in just after
  1216. * reading CSR_INT. */
  1217. if (inta_fh & CSR39_FH_INT_RX_MASK)
  1218. inta |= CSR_INT_BIT_FH_RX;
  1219. if (inta_fh & CSR39_FH_INT_TX_MASK)
  1220. inta |= CSR_INT_BIT_FH_TX;
  1221. /* Now service all interrupt bits discovered above. */
  1222. if (inta & CSR_INT_BIT_HW_ERR) {
  1223. IL_ERR("Hardware error detected. Restarting.\n");
  1224. /* Tell the device to stop sending interrupts */
  1225. il_disable_interrupts(il);
  1226. il->isr_stats.hw++;
  1227. il_irq_handle_error(il);
  1228. handled |= CSR_INT_BIT_HW_ERR;
  1229. return;
  1230. }
  1231. #ifdef CONFIG_IWLEGACY_DEBUG
  1232. if (il_get_debug_level(il) & (IL_DL_ISR)) {
  1233. /* NIC fires this, but we don't use it, redundant with WAKEUP */
  1234. if (inta & CSR_INT_BIT_SCD) {
  1235. D_ISR("Scheduler finished to transmit "
  1236. "the frame/frames.\n");
  1237. il->isr_stats.sch++;
  1238. }
  1239. /* Alive notification via Rx interrupt will do the real work */
  1240. if (inta & CSR_INT_BIT_ALIVE) {
  1241. D_ISR("Alive interrupt\n");
  1242. il->isr_stats.alive++;
  1243. }
  1244. }
  1245. #endif
  1246. /* Safely ignore these bits for debug checks below */
  1247. inta &= ~(CSR_INT_BIT_SCD | CSR_INT_BIT_ALIVE);
  1248. /* Error detected by uCode */
  1249. if (inta & CSR_INT_BIT_SW_ERR) {
  1250. IL_ERR("Microcode SW error detected. " "Restarting 0x%X.\n",
  1251. inta);
  1252. il->isr_stats.sw++;
  1253. il_irq_handle_error(il);
  1254. handled |= CSR_INT_BIT_SW_ERR;
  1255. }
  1256. /* uCode wakes up after power-down sleep */
  1257. if (inta & CSR_INT_BIT_WAKEUP) {
  1258. D_ISR("Wakeup interrupt\n");
  1259. il_rx_queue_update_write_ptr(il, &il->rxq);
  1260. il_txq_update_write_ptr(il, &il->txq[0]);
  1261. il_txq_update_write_ptr(il, &il->txq[1]);
  1262. il_txq_update_write_ptr(il, &il->txq[2]);
  1263. il_txq_update_write_ptr(il, &il->txq[3]);
  1264. il_txq_update_write_ptr(il, &il->txq[4]);
  1265. il_txq_update_write_ptr(il, &il->txq[5]);
  1266. il->isr_stats.wakeup++;
  1267. handled |= CSR_INT_BIT_WAKEUP;
  1268. }
  1269. /* All uCode command responses, including Tx command responses,
  1270. * Rx "responses" (frame-received notification), and other
  1271. * notifications from uCode come through here*/
  1272. if (inta & (CSR_INT_BIT_FH_RX | CSR_INT_BIT_SW_RX)) {
  1273. il3945_rx_handle(il);
  1274. il->isr_stats.rx++;
  1275. handled |= (CSR_INT_BIT_FH_RX | CSR_INT_BIT_SW_RX);
  1276. }
  1277. if (inta & CSR_INT_BIT_FH_TX) {
  1278. D_ISR("Tx interrupt\n");
  1279. il->isr_stats.tx++;
  1280. _il_wr(il, CSR_FH_INT_STATUS, (1 << 6));
  1281. il_wr(il, FH39_TCSR_CREDIT(FH39_SRVC_CHNL), 0x0);
  1282. handled |= CSR_INT_BIT_FH_TX;
  1283. }
  1284. if (inta & ~handled) {
  1285. IL_ERR("Unhandled INTA bits 0x%08x\n", inta & ~handled);
  1286. il->isr_stats.unhandled++;
  1287. }
  1288. if (inta & ~il->inta_mask) {
  1289. IL_WARN("Disabled INTA bits 0x%08x were pending\n",
  1290. inta & ~il->inta_mask);
  1291. IL_WARN(" with inta_fh = 0x%08x\n", inta_fh);
  1292. }
  1293. /* Re-enable all interrupts */
  1294. /* only Re-enable if disabled by irq */
  1295. if (test_bit(S_INT_ENABLED, &il->status))
  1296. il_enable_interrupts(il);
  1297. #ifdef CONFIG_IWLEGACY_DEBUG
  1298. if (il_get_debug_level(il) & (IL_DL_ISR)) {
  1299. inta = _il_rd(il, CSR_INT);
  1300. inta_mask = _il_rd(il, CSR_INT_MASK);
  1301. inta_fh = _il_rd(il, CSR_FH_INT_STATUS);
  1302. D_ISR("End inta 0x%08x, enabled 0x%08x, fh 0x%08x, "
  1303. "flags 0x%08lx\n", inta, inta_mask, inta_fh, flags);
  1304. }
  1305. #endif
  1306. }
  1307. static int
  1308. il3945_get_channels_for_scan(struct il_priv *il, enum ieee80211_band band,
  1309. u8 is_active, u8 n_probes,
  1310. struct il3945_scan_channel *scan_ch,
  1311. struct ieee80211_vif *vif)
  1312. {
  1313. struct ieee80211_channel *chan;
  1314. const struct ieee80211_supported_band *sband;
  1315. const struct il_channel_info *ch_info;
  1316. u16 passive_dwell = 0;
  1317. u16 active_dwell = 0;
  1318. int added, i;
  1319. sband = il_get_hw_mode(il, band);
  1320. if (!sband)
  1321. return 0;
  1322. active_dwell = il_get_active_dwell_time(il, band, n_probes);
  1323. passive_dwell = il_get_passive_dwell_time(il, band, vif);
  1324. if (passive_dwell <= active_dwell)
  1325. passive_dwell = active_dwell + 1;
  1326. for (i = 0, added = 0; i < il->scan_request->n_channels; i++) {
  1327. chan = il->scan_request->channels[i];
  1328. if (chan->band != band)
  1329. continue;
  1330. scan_ch->channel = chan->hw_value;
  1331. ch_info = il_get_channel_info(il, band, scan_ch->channel);
  1332. if (!il_is_channel_valid(ch_info)) {
  1333. D_SCAN("Channel %d is INVALID for this band.\n",
  1334. scan_ch->channel);
  1335. continue;
  1336. }
  1337. scan_ch->active_dwell = cpu_to_le16(active_dwell);
  1338. scan_ch->passive_dwell = cpu_to_le16(passive_dwell);
  1339. /* If passive , set up for auto-switch
  1340. * and use long active_dwell time.
  1341. */
  1342. if (!is_active || il_is_channel_passive(ch_info) ||
  1343. (chan->flags & IEEE80211_CHAN_PASSIVE_SCAN)) {
  1344. scan_ch->type = 0; /* passive */
  1345. if (IL_UCODE_API(il->ucode_ver) == 1)
  1346. scan_ch->active_dwell =
  1347. cpu_to_le16(passive_dwell - 1);
  1348. } else {
  1349. scan_ch->type = 1; /* active */
  1350. }
  1351. /* Set direct probe bits. These may be used both for active
  1352. * scan channels (probes gets sent right away),
  1353. * or for passive channels (probes get se sent only after
  1354. * hearing clear Rx packet).*/
  1355. if (IL_UCODE_API(il->ucode_ver) >= 2) {
  1356. if (n_probes)
  1357. scan_ch->type |= IL39_SCAN_PROBE_MASK(n_probes);
  1358. } else {
  1359. /* uCode v1 does not allow setting direct probe bits on
  1360. * passive channel. */
  1361. if ((scan_ch->type & 1) && n_probes)
  1362. scan_ch->type |= IL39_SCAN_PROBE_MASK(n_probes);
  1363. }
  1364. /* Set txpower levels to defaults */
  1365. scan_ch->tpc.dsp_atten = 110;
  1366. /* scan_pwr_info->tpc.dsp_atten; */
  1367. /*scan_pwr_info->tpc.tx_gain; */
  1368. if (band == IEEE80211_BAND_5GHZ)
  1369. scan_ch->tpc.tx_gain = ((1 << 5) | (3 << 3)) | 3;
  1370. else {
  1371. scan_ch->tpc.tx_gain = ((1 << 5) | (5 << 3));
  1372. /* NOTE: if we were doing 6Mb OFDM for scans we'd use
  1373. * power level:
  1374. * scan_ch->tpc.tx_gain = ((1 << 5) | (2 << 3)) | 3;
  1375. */
  1376. }
  1377. D_SCAN("Scanning %d [%s %d]\n", scan_ch->channel,
  1378. (scan_ch->type & 1) ? "ACTIVE" : "PASSIVE",
  1379. (scan_ch->type & 1) ? active_dwell : passive_dwell);
  1380. scan_ch++;
  1381. added++;
  1382. }
  1383. D_SCAN("total channels to scan %d\n", added);
  1384. return added;
  1385. }
  1386. static void
  1387. il3945_init_hw_rates(struct il_priv *il, struct ieee80211_rate *rates)
  1388. {
  1389. int i;
  1390. for (i = 0; i < RATE_COUNT_LEGACY; i++) {
  1391. rates[i].bitrate = il3945_rates[i].ieee * 5;
  1392. rates[i].hw_value = i; /* Rate scaling will work on idxes */
  1393. rates[i].hw_value_short = i;
  1394. rates[i].flags = 0;
  1395. if (i > IL39_LAST_OFDM_RATE || i < IL_FIRST_OFDM_RATE) {
  1396. /*
  1397. * If CCK != 1M then set short preamble rate flag.
  1398. */
  1399. rates[i].flags |=
  1400. (il3945_rates[i].plcp ==
  1401. 10) ? 0 : IEEE80211_RATE_SHORT_PREAMBLE;
  1402. }
  1403. }
  1404. }
  1405. /******************************************************************************
  1406. *
  1407. * uCode download functions
  1408. *
  1409. ******************************************************************************/
  1410. static void
  1411. il3945_dealloc_ucode_pci(struct il_priv *il)
  1412. {
  1413. il_free_fw_desc(il->pci_dev, &il->ucode_code);
  1414. il_free_fw_desc(il->pci_dev, &il->ucode_data);
  1415. il_free_fw_desc(il->pci_dev, &il->ucode_data_backup);
  1416. il_free_fw_desc(il->pci_dev, &il->ucode_init);
  1417. il_free_fw_desc(il->pci_dev, &il->ucode_init_data);
  1418. il_free_fw_desc(il->pci_dev, &il->ucode_boot);
  1419. }
  1420. /**
  1421. * il3945_verify_inst_full - verify runtime uCode image in card vs. host,
  1422. * looking at all data.
  1423. */
  1424. static int
  1425. il3945_verify_inst_full(struct il_priv *il, __le32 * image, u32 len)
  1426. {
  1427. u32 val;
  1428. u32 save_len = len;
  1429. int rc = 0;
  1430. u32 errcnt;
  1431. D_INFO("ucode inst image size is %u\n", len);
  1432. il_wr(il, HBUS_TARG_MEM_RADDR, IL39_RTC_INST_LOWER_BOUND);
  1433. errcnt = 0;
  1434. for (; len > 0; len -= sizeof(u32), image++) {
  1435. /* read data comes through single port, auto-incr addr */
  1436. /* NOTE: Use the debugless read so we don't flood kernel log
  1437. * if IL_DL_IO is set */
  1438. val = _il_rd(il, HBUS_TARG_MEM_RDAT);
  1439. if (val != le32_to_cpu(*image)) {
  1440. IL_ERR("uCode INST section is invalid at "
  1441. "offset 0x%x, is 0x%x, s/b 0x%x\n",
  1442. save_len - len, val, le32_to_cpu(*image));
  1443. rc = -EIO;
  1444. errcnt++;
  1445. if (errcnt >= 20)
  1446. break;
  1447. }
  1448. }
  1449. if (!errcnt)
  1450. D_INFO("ucode image in INSTRUCTION memory is good\n");
  1451. return rc;
  1452. }
  1453. /**
  1454. * il3945_verify_inst_sparse - verify runtime uCode image in card vs. host,
  1455. * using sample data 100 bytes apart. If these sample points are good,
  1456. * it's a pretty good bet that everything between them is good, too.
  1457. */
  1458. static int
  1459. il3945_verify_inst_sparse(struct il_priv *il, __le32 * image, u32 len)
  1460. {
  1461. u32 val;
  1462. int rc = 0;
  1463. u32 errcnt = 0;
  1464. u32 i;
  1465. D_INFO("ucode inst image size is %u\n", len);
  1466. for (i = 0; i < len; i += 100, image += 100 / sizeof(u32)) {
  1467. /* read data comes through single port, auto-incr addr */
  1468. /* NOTE: Use the debugless read so we don't flood kernel log
  1469. * if IL_DL_IO is set */
  1470. il_wr(il, HBUS_TARG_MEM_RADDR, i + IL39_RTC_INST_LOWER_BOUND);
  1471. val = _il_rd(il, HBUS_TARG_MEM_RDAT);
  1472. if (val != le32_to_cpu(*image)) {
  1473. #if 0 /* Enable this if you want to see details */
  1474. IL_ERR("uCode INST section is invalid at "
  1475. "offset 0x%x, is 0x%x, s/b 0x%x\n", i, val,
  1476. *image);
  1477. #endif
  1478. rc = -EIO;
  1479. errcnt++;
  1480. if (errcnt >= 3)
  1481. break;
  1482. }
  1483. }
  1484. return rc;
  1485. }
  1486. /**
  1487. * il3945_verify_ucode - determine which instruction image is in SRAM,
  1488. * and verify its contents
  1489. */
  1490. static int
  1491. il3945_verify_ucode(struct il_priv *il)
  1492. {
  1493. __le32 *image;
  1494. u32 len;
  1495. int rc = 0;
  1496. /* Try bootstrap */
  1497. image = (__le32 *) il->ucode_boot.v_addr;
  1498. len = il->ucode_boot.len;
  1499. rc = il3945_verify_inst_sparse(il, image, len);
  1500. if (rc == 0) {
  1501. D_INFO("Bootstrap uCode is good in inst SRAM\n");
  1502. return 0;
  1503. }
  1504. /* Try initialize */
  1505. image = (__le32 *) il->ucode_init.v_addr;
  1506. len = il->ucode_init.len;
  1507. rc = il3945_verify_inst_sparse(il, image, len);
  1508. if (rc == 0) {
  1509. D_INFO("Initialize uCode is good in inst SRAM\n");
  1510. return 0;
  1511. }
  1512. /* Try runtime/protocol */
  1513. image = (__le32 *) il->ucode_code.v_addr;
  1514. len = il->ucode_code.len;
  1515. rc = il3945_verify_inst_sparse(il, image, len);
  1516. if (rc == 0) {
  1517. D_INFO("Runtime uCode is good in inst SRAM\n");
  1518. return 0;
  1519. }
  1520. IL_ERR("NO VALID UCODE IMAGE IN INSTRUCTION SRAM!!\n");
  1521. /* Since nothing seems to match, show first several data entries in
  1522. * instruction SRAM, so maybe visual inspection will give a clue.
  1523. * Selection of bootstrap image (vs. other images) is arbitrary. */
  1524. image = (__le32 *) il->ucode_boot.v_addr;
  1525. len = il->ucode_boot.len;
  1526. rc = il3945_verify_inst_full(il, image, len);
  1527. return rc;
  1528. }
  1529. static void
  1530. il3945_nic_start(struct il_priv *il)
  1531. {
  1532. /* Remove all resets to allow NIC to operate */
  1533. _il_wr(il, CSR_RESET, 0);
  1534. }
  1535. #define IL3945_UCODE_GET(item) \
  1536. static u32 il3945_ucode_get_##item(const struct il_ucode_header *ucode)\
  1537. { \
  1538. return le32_to_cpu(ucode->v1.item); \
  1539. }
  1540. static u32
  1541. il3945_ucode_get_header_size(u32 api_ver)
  1542. {
  1543. return 24;
  1544. }
  1545. static u8 *
  1546. il3945_ucode_get_data(const struct il_ucode_header *ucode)
  1547. {
  1548. return (u8 *) ucode->v1.data;
  1549. }
  1550. IL3945_UCODE_GET(inst_size);
  1551. IL3945_UCODE_GET(data_size);
  1552. IL3945_UCODE_GET(init_size);
  1553. IL3945_UCODE_GET(init_data_size);
  1554. IL3945_UCODE_GET(boot_size);
  1555. /**
  1556. * il3945_read_ucode - Read uCode images from disk file.
  1557. *
  1558. * Copy into buffers for card to fetch via bus-mastering
  1559. */
  1560. static int
  1561. il3945_read_ucode(struct il_priv *il)
  1562. {
  1563. const struct il_ucode_header *ucode;
  1564. int ret = -EINVAL, idx;
  1565. const struct firmware *ucode_raw;
  1566. /* firmware file name contains uCode/driver compatibility version */
  1567. const char *name_pre = il->cfg->fw_name_pre;
  1568. const unsigned int api_max = il->cfg->ucode_api_max;
  1569. const unsigned int api_min = il->cfg->ucode_api_min;
  1570. char buf[25];
  1571. u8 *src;
  1572. size_t len;
  1573. u32 api_ver, inst_size, data_size, init_size, init_data_size, boot_size;
  1574. /* Ask kernel firmware_class module to get the boot firmware off disk.
  1575. * request_firmware() is synchronous, file is in memory on return. */
  1576. for (idx = api_max; idx >= api_min; idx--) {
  1577. sprintf(buf, "%s%u%s", name_pre, idx, ".ucode");
  1578. ret = request_firmware(&ucode_raw, buf, &il->pci_dev->dev);
  1579. if (ret < 0) {
  1580. IL_ERR("%s firmware file req failed: %d\n", buf, ret);
  1581. if (ret == -ENOENT)
  1582. continue;
  1583. else
  1584. goto error;
  1585. } else {
  1586. if (idx < api_max)
  1587. IL_ERR("Loaded firmware %s, "
  1588. "which is deprecated. "
  1589. " Please use API v%u instead.\n", buf,
  1590. api_max);
  1591. D_INFO("Got firmware '%s' file "
  1592. "(%zd bytes) from disk\n", buf, ucode_raw->size);
  1593. break;
  1594. }
  1595. }
  1596. if (ret < 0)
  1597. goto error;
  1598. /* Make sure that we got at least our header! */
  1599. if (ucode_raw->size < il3945_ucode_get_header_size(1)) {
  1600. IL_ERR("File size way too small!\n");
  1601. ret = -EINVAL;
  1602. goto err_release;
  1603. }
  1604. /* Data from ucode file: header followed by uCode images */
  1605. ucode = (struct il_ucode_header *)ucode_raw->data;
  1606. il->ucode_ver = le32_to_cpu(ucode->ver);
  1607. api_ver = IL_UCODE_API(il->ucode_ver);
  1608. inst_size = il3945_ucode_get_inst_size(ucode);
  1609. data_size = il3945_ucode_get_data_size(ucode);
  1610. init_size = il3945_ucode_get_init_size(ucode);
  1611. init_data_size = il3945_ucode_get_init_data_size(ucode);
  1612. boot_size = il3945_ucode_get_boot_size(ucode);
  1613. src = il3945_ucode_get_data(ucode);
  1614. /* api_ver should match the api version forming part of the
  1615. * firmware filename ... but we don't check for that and only rely
  1616. * on the API version read from firmware header from here on forward */
  1617. if (api_ver < api_min || api_ver > api_max) {
  1618. IL_ERR("Driver unable to support your firmware API. "
  1619. "Driver supports v%u, firmware is v%u.\n", api_max,
  1620. api_ver);
  1621. il->ucode_ver = 0;
  1622. ret = -EINVAL;
  1623. goto err_release;
  1624. }
  1625. if (api_ver != api_max)
  1626. IL_ERR("Firmware has old API version. Expected %u, "
  1627. "got %u. New firmware can be obtained "
  1628. "from http://www.intellinuxwireless.org.\n", api_max,
  1629. api_ver);
  1630. IL_INFO("loaded firmware version %u.%u.%u.%u\n",
  1631. IL_UCODE_MAJOR(il->ucode_ver), IL_UCODE_MINOR(il->ucode_ver),
  1632. IL_UCODE_API(il->ucode_ver), IL_UCODE_SERIAL(il->ucode_ver));
  1633. snprintf(il->hw->wiphy->fw_version, sizeof(il->hw->wiphy->fw_version),
  1634. "%u.%u.%u.%u", IL_UCODE_MAJOR(il->ucode_ver),
  1635. IL_UCODE_MINOR(il->ucode_ver), IL_UCODE_API(il->ucode_ver),
  1636. IL_UCODE_SERIAL(il->ucode_ver));
  1637. D_INFO("f/w package hdr ucode version raw = 0x%x\n", il->ucode_ver);
  1638. D_INFO("f/w package hdr runtime inst size = %u\n", inst_size);
  1639. D_INFO("f/w package hdr runtime data size = %u\n", data_size);
  1640. D_INFO("f/w package hdr init inst size = %u\n", init_size);
  1641. D_INFO("f/w package hdr init data size = %u\n", init_data_size);
  1642. D_INFO("f/w package hdr boot inst size = %u\n", boot_size);
  1643. /* Verify size of file vs. image size info in file's header */
  1644. if (ucode_raw->size !=
  1645. il3945_ucode_get_header_size(api_ver) + inst_size + data_size +
  1646. init_size + init_data_size + boot_size) {
  1647. D_INFO("uCode file size %zd does not match expected size\n",
  1648. ucode_raw->size);
  1649. ret = -EINVAL;
  1650. goto err_release;
  1651. }
  1652. /* Verify that uCode images will fit in card's SRAM */
  1653. if (inst_size > IL39_MAX_INST_SIZE) {
  1654. D_INFO("uCode instr len %d too large to fit in\n", inst_size);
  1655. ret = -EINVAL;
  1656. goto err_release;
  1657. }
  1658. if (data_size > IL39_MAX_DATA_SIZE) {
  1659. D_INFO("uCode data len %d too large to fit in\n", data_size);
  1660. ret = -EINVAL;
  1661. goto err_release;
  1662. }
  1663. if (init_size > IL39_MAX_INST_SIZE) {
  1664. D_INFO("uCode init instr len %d too large to fit in\n",
  1665. init_size);
  1666. ret = -EINVAL;
  1667. goto err_release;
  1668. }
  1669. if (init_data_size > IL39_MAX_DATA_SIZE) {
  1670. D_INFO("uCode init data len %d too large to fit in\n",
  1671. init_data_size);
  1672. ret = -EINVAL;
  1673. goto err_release;
  1674. }
  1675. if (boot_size > IL39_MAX_BSM_SIZE) {
  1676. D_INFO("uCode boot instr len %d too large to fit in\n",
  1677. boot_size);
  1678. ret = -EINVAL;
  1679. goto err_release;
  1680. }
  1681. /* Allocate ucode buffers for card's bus-master loading ... */
  1682. /* Runtime instructions and 2 copies of data:
  1683. * 1) unmodified from disk
  1684. * 2) backup cache for save/restore during power-downs */
  1685. il->ucode_code.len = inst_size;
  1686. il_alloc_fw_desc(il->pci_dev, &il->ucode_code);
  1687. il->ucode_data.len = data_size;
  1688. il_alloc_fw_desc(il->pci_dev, &il->ucode_data);
  1689. il->ucode_data_backup.len = data_size;
  1690. il_alloc_fw_desc(il->pci_dev, &il->ucode_data_backup);
  1691. if (!il->ucode_code.v_addr || !il->ucode_data.v_addr ||
  1692. !il->ucode_data_backup.v_addr)
  1693. goto err_pci_alloc;
  1694. /* Initialization instructions and data */
  1695. if (init_size && init_data_size) {
  1696. il->ucode_init.len = init_size;
  1697. il_alloc_fw_desc(il->pci_dev, &il->ucode_init);
  1698. il->ucode_init_data.len = init_data_size;
  1699. il_alloc_fw_desc(il->pci_dev, &il->ucode_init_data);
  1700. if (!il->ucode_init.v_addr || !il->ucode_init_data.v_addr)
  1701. goto err_pci_alloc;
  1702. }
  1703. /* Bootstrap (instructions only, no data) */
  1704. if (boot_size) {
  1705. il->ucode_boot.len = boot_size;
  1706. il_alloc_fw_desc(il->pci_dev, &il->ucode_boot);
  1707. if (!il->ucode_boot.v_addr)
  1708. goto err_pci_alloc;
  1709. }
  1710. /* Copy images into buffers for card's bus-master reads ... */
  1711. /* Runtime instructions (first block of data in file) */
  1712. len = inst_size;
  1713. D_INFO("Copying (but not loading) uCode instr len %zd\n", len);
  1714. memcpy(il->ucode_code.v_addr, src, len);
  1715. src += len;
  1716. D_INFO("uCode instr buf vaddr = 0x%p, paddr = 0x%08x\n",
  1717. il->ucode_code.v_addr, (u32) il->ucode_code.p_addr);
  1718. /* Runtime data (2nd block)
  1719. * NOTE: Copy into backup buffer will be done in il3945_up() */
  1720. len = data_size;
  1721. D_INFO("Copying (but not loading) uCode data len %zd\n", len);
  1722. memcpy(il->ucode_data.v_addr, src, len);
  1723. memcpy(il->ucode_data_backup.v_addr, src, len);
  1724. src += len;
  1725. /* Initialization instructions (3rd block) */
  1726. if (init_size) {
  1727. len = init_size;
  1728. D_INFO("Copying (but not loading) init instr len %zd\n", len);
  1729. memcpy(il->ucode_init.v_addr, src, len);
  1730. src += len;
  1731. }
  1732. /* Initialization data (4th block) */
  1733. if (init_data_size) {
  1734. len = init_data_size;
  1735. D_INFO("Copying (but not loading) init data len %zd\n", len);
  1736. memcpy(il->ucode_init_data.v_addr, src, len);
  1737. src += len;
  1738. }
  1739. /* Bootstrap instructions (5th block) */
  1740. len = boot_size;
  1741. D_INFO("Copying (but not loading) boot instr len %zd\n", len);
  1742. memcpy(il->ucode_boot.v_addr, src, len);
  1743. /* We have our copies now, allow OS release its copies */
  1744. release_firmware(ucode_raw);
  1745. return 0;
  1746. err_pci_alloc:
  1747. IL_ERR("failed to allocate pci memory\n");
  1748. ret = -ENOMEM;
  1749. il3945_dealloc_ucode_pci(il);
  1750. err_release:
  1751. release_firmware(ucode_raw);
  1752. error:
  1753. return ret;
  1754. }
  1755. /**
  1756. * il3945_set_ucode_ptrs - Set uCode address location
  1757. *
  1758. * Tell initialization uCode where to find runtime uCode.
  1759. *
  1760. * BSM registers initially contain pointers to initialization uCode.
  1761. * We need to replace them to load runtime uCode inst and data,
  1762. * and to save runtime data when powering down.
  1763. */
  1764. static int
  1765. il3945_set_ucode_ptrs(struct il_priv *il)
  1766. {
  1767. dma_addr_t pinst;
  1768. dma_addr_t pdata;
  1769. /* bits 31:0 for 3945 */
  1770. pinst = il->ucode_code.p_addr;
  1771. pdata = il->ucode_data_backup.p_addr;
  1772. /* Tell bootstrap uCode where to find image to load */
  1773. il_wr_prph(il, BSM_DRAM_INST_PTR_REG, pinst);
  1774. il_wr_prph(il, BSM_DRAM_DATA_PTR_REG, pdata);
  1775. il_wr_prph(il, BSM_DRAM_DATA_BYTECOUNT_REG, il->ucode_data.len);
  1776. /* Inst byte count must be last to set up, bit 31 signals uCode
  1777. * that all new ptr/size info is in place */
  1778. il_wr_prph(il, BSM_DRAM_INST_BYTECOUNT_REG,
  1779. il->ucode_code.len | BSM_DRAM_INST_LOAD);
  1780. D_INFO("Runtime uCode pointers are set.\n");
  1781. return 0;
  1782. }
  1783. /**
  1784. * il3945_init_alive_start - Called after N_ALIVE notification received
  1785. *
  1786. * Called after N_ALIVE notification received from "initialize" uCode.
  1787. *
  1788. * Tell "initialize" uCode to go ahead and load the runtime uCode.
  1789. */
  1790. static void
  1791. il3945_init_alive_start(struct il_priv *il)
  1792. {
  1793. /* Check alive response for "valid" sign from uCode */
  1794. if (il->card_alive_init.is_valid != UCODE_VALID_OK) {
  1795. /* We had an error bringing up the hardware, so take it
  1796. * all the way back down so we can try again */
  1797. D_INFO("Initialize Alive failed.\n");
  1798. goto restart;
  1799. }
  1800. /* Bootstrap uCode has loaded initialize uCode ... verify inst image.
  1801. * This is a paranoid check, because we would not have gotten the
  1802. * "initialize" alive if code weren't properly loaded. */
  1803. if (il3945_verify_ucode(il)) {
  1804. /* Runtime instruction load was bad;
  1805. * take it all the way back down so we can try again */
  1806. D_INFO("Bad \"initialize\" uCode load.\n");
  1807. goto restart;
  1808. }
  1809. /* Send pointers to protocol/runtime uCode image ... init code will
  1810. * load and launch runtime uCode, which will send us another "Alive"
  1811. * notification. */
  1812. D_INFO("Initialization Alive received.\n");
  1813. if (il3945_set_ucode_ptrs(il)) {
  1814. /* Runtime instruction load won't happen;
  1815. * take it all the way back down so we can try again */
  1816. D_INFO("Couldn't set up uCode pointers.\n");
  1817. goto restart;
  1818. }
  1819. return;
  1820. restart:
  1821. queue_work(il->workqueue, &il->restart);
  1822. }
  1823. /**
  1824. * il3945_alive_start - called after N_ALIVE notification received
  1825. * from protocol/runtime uCode (initialization uCode's
  1826. * Alive gets handled by il3945_init_alive_start()).
  1827. */
  1828. static void
  1829. il3945_alive_start(struct il_priv *il)
  1830. {
  1831. int thermal_spin = 0;
  1832. u32 rfkill;
  1833. struct il_rxon_context *ctx = &il->ctx;
  1834. D_INFO("Runtime Alive received.\n");
  1835. if (il->card_alive.is_valid != UCODE_VALID_OK) {
  1836. /* We had an error bringing up the hardware, so take it
  1837. * all the way back down so we can try again */
  1838. D_INFO("Alive failed.\n");
  1839. goto restart;
  1840. }
  1841. /* Initialize uCode has loaded Runtime uCode ... verify inst image.
  1842. * This is a paranoid check, because we would not have gotten the
  1843. * "runtime" alive if code weren't properly loaded. */
  1844. if (il3945_verify_ucode(il)) {
  1845. /* Runtime instruction load was bad;
  1846. * take it all the way back down so we can try again */
  1847. D_INFO("Bad runtime uCode load.\n");
  1848. goto restart;
  1849. }
  1850. rfkill = il_rd_prph(il, APMG_RFKILL_REG);
  1851. D_INFO("RFKILL status: 0x%x\n", rfkill);
  1852. if (rfkill & 0x1) {
  1853. clear_bit(S_RF_KILL_HW, &il->status);
  1854. /* if RFKILL is not on, then wait for thermal
  1855. * sensor in adapter to kick in */
  1856. while (il3945_hw_get_temperature(il) == 0) {
  1857. thermal_spin++;
  1858. udelay(10);
  1859. }
  1860. if (thermal_spin)
  1861. D_INFO("Thermal calibration took %dus\n",
  1862. thermal_spin * 10);
  1863. } else
  1864. set_bit(S_RF_KILL_HW, &il->status);
  1865. /* After the ALIVE response, we can send commands to 3945 uCode */
  1866. set_bit(S_ALIVE, &il->status);
  1867. /* Enable watchdog to monitor the driver tx queues */
  1868. il_setup_watchdog(il);
  1869. if (il_is_rfkill(il))
  1870. return;
  1871. ieee80211_wake_queues(il->hw);
  1872. il->active_rate = RATES_MASK_3945;
  1873. il_power_update_mode(il, true);
  1874. if (il_is_associated(il)) {
  1875. struct il3945_rxon_cmd *active_rxon =
  1876. (struct il3945_rxon_cmd *)(&ctx->active);
  1877. ctx->staging.filter_flags |= RXON_FILTER_ASSOC_MSK;
  1878. active_rxon->filter_flags &= ~RXON_FILTER_ASSOC_MSK;
  1879. } else {
  1880. /* Initialize our rx_config data */
  1881. il_connection_init_rx_config(il, ctx);
  1882. }
  1883. /* Configure Bluetooth device coexistence support */
  1884. il_send_bt_config(il);
  1885. set_bit(S_READY, &il->status);
  1886. /* Configure the adapter for unassociated operation */
  1887. il3945_commit_rxon(il, ctx);
  1888. il3945_reg_txpower_periodic(il);
  1889. D_INFO("ALIVE processing complete.\n");
  1890. wake_up(&il->wait_command_queue);
  1891. return;
  1892. restart:
  1893. queue_work(il->workqueue, &il->restart);
  1894. }
  1895. static void il3945_cancel_deferred_work(struct il_priv *il);
  1896. static void
  1897. __il3945_down(struct il_priv *il)
  1898. {
  1899. unsigned long flags;
  1900. int exit_pending;
  1901. D_INFO(DRV_NAME " is going down\n");
  1902. il_scan_cancel_timeout(il, 200);
  1903. exit_pending = test_and_set_bit(S_EXIT_PENDING, &il->status);
  1904. /* Stop TX queues watchdog. We need to have S_EXIT_PENDING bit set
  1905. * to prevent rearm timer */
  1906. del_timer_sync(&il->watchdog);
  1907. /* Station information will now be cleared in device */
  1908. il_clear_ucode_stations(il, NULL);
  1909. il_dealloc_bcast_stations(il);
  1910. il_clear_driver_stations(il);
  1911. /* Unblock any waiting calls */
  1912. wake_up_all(&il->wait_command_queue);
  1913. /* Wipe out the EXIT_PENDING status bit if we are not actually
  1914. * exiting the module */
  1915. if (!exit_pending)
  1916. clear_bit(S_EXIT_PENDING, &il->status);
  1917. /* stop and reset the on-board processor */
  1918. _il_wr(il, CSR_RESET, CSR_RESET_REG_FLAG_NEVO_RESET);
  1919. /* tell the device to stop sending interrupts */
  1920. spin_lock_irqsave(&il->lock, flags);
  1921. il_disable_interrupts(il);
  1922. spin_unlock_irqrestore(&il->lock, flags);
  1923. il3945_synchronize_irq(il);
  1924. if (il->mac80211_registered)
  1925. ieee80211_stop_queues(il->hw);
  1926. /* If we have not previously called il3945_init() then
  1927. * clear all bits but the RF Kill bits and return */
  1928. if (!il_is_init(il)) {
  1929. il->status =
  1930. test_bit(S_RF_KILL_HW,
  1931. &il->
  1932. status) << S_RF_KILL_HW |
  1933. test_bit(S_GEO_CONFIGURED,
  1934. &il->
  1935. status) << S_GEO_CONFIGURED |
  1936. test_bit(S_EXIT_PENDING, &il->status) << S_EXIT_PENDING;
  1937. goto exit;
  1938. }
  1939. /* ...otherwise clear out all the status bits but the RF Kill
  1940. * bit and continue taking the NIC down. */
  1941. il->status &=
  1942. test_bit(S_RF_KILL_HW,
  1943. &il->status) << S_RF_KILL_HW | test_bit(S_GEO_CONFIGURED,
  1944. &il->
  1945. status) <<
  1946. S_GEO_CONFIGURED | test_bit(S_FW_ERROR,
  1947. &il->
  1948. status) << S_FW_ERROR |
  1949. test_bit(S_EXIT_PENDING, &il->status) << S_EXIT_PENDING;
  1950. il3945_hw_txq_ctx_stop(il);
  1951. il3945_hw_rxq_stop(il);
  1952. /* Power-down device's busmaster DMA clocks */
  1953. il_wr_prph(il, APMG_CLK_DIS_REG, APMG_CLK_VAL_DMA_CLK_RQT);
  1954. udelay(5);
  1955. /* Stop the device, and put it in low power state */
  1956. il_apm_stop(il);
  1957. exit:
  1958. memset(&il->card_alive, 0, sizeof(struct il_alive_resp));
  1959. if (il->beacon_skb)
  1960. dev_kfree_skb(il->beacon_skb);
  1961. il->beacon_skb = NULL;
  1962. /* clear out any free frames */
  1963. il3945_clear_free_frames(il);
  1964. }
  1965. static void
  1966. il3945_down(struct il_priv *il)
  1967. {
  1968. mutex_lock(&il->mutex);
  1969. __il3945_down(il);
  1970. mutex_unlock(&il->mutex);
  1971. il3945_cancel_deferred_work(il);
  1972. }
  1973. #define MAX_HW_RESTARTS 5
  1974. static int
  1975. il3945_alloc_bcast_station(struct il_priv *il)
  1976. {
  1977. struct il_rxon_context *ctx = &il->ctx;
  1978. unsigned long flags;
  1979. u8 sta_id;
  1980. spin_lock_irqsave(&il->sta_lock, flags);
  1981. sta_id = il_prep_station(il, ctx, il_bcast_addr, false, NULL);
  1982. if (sta_id == IL_INVALID_STATION) {
  1983. IL_ERR("Unable to prepare broadcast station\n");
  1984. spin_unlock_irqrestore(&il->sta_lock, flags);
  1985. return -EINVAL;
  1986. }
  1987. il->stations[sta_id].used |= IL_STA_DRIVER_ACTIVE;
  1988. il->stations[sta_id].used |= IL_STA_BCAST;
  1989. spin_unlock_irqrestore(&il->sta_lock, flags);
  1990. return 0;
  1991. }
  1992. static int
  1993. __il3945_up(struct il_priv *il)
  1994. {
  1995. int rc, i;
  1996. rc = il3945_alloc_bcast_station(il);
  1997. if (rc)
  1998. return rc;
  1999. if (test_bit(S_EXIT_PENDING, &il->status)) {
  2000. IL_WARN("Exit pending; will not bring the NIC up\n");
  2001. return -EIO;
  2002. }
  2003. if (!il->ucode_data_backup.v_addr || !il->ucode_data.v_addr) {
  2004. IL_ERR("ucode not available for device bring up\n");
  2005. return -EIO;
  2006. }
  2007. /* If platform's RF_KILL switch is NOT set to KILL */
  2008. if (_il_rd(il, CSR_GP_CNTRL) & CSR_GP_CNTRL_REG_FLAG_HW_RF_KILL_SW)
  2009. clear_bit(S_RF_KILL_HW, &il->status);
  2010. else {
  2011. set_bit(S_RF_KILL_HW, &il->status);
  2012. IL_WARN("Radio disabled by HW RF Kill switch\n");
  2013. return -ENODEV;
  2014. }
  2015. _il_wr(il, CSR_INT, 0xFFFFFFFF);
  2016. rc = il3945_hw_nic_init(il);
  2017. if (rc) {
  2018. IL_ERR("Unable to int nic\n");
  2019. return rc;
  2020. }
  2021. /* make sure rfkill handshake bits are cleared */
  2022. _il_wr(il, CSR_UCODE_DRV_GP1_CLR, CSR_UCODE_SW_BIT_RFKILL);
  2023. _il_wr(il, CSR_UCODE_DRV_GP1_CLR, CSR_UCODE_DRV_GP1_BIT_CMD_BLOCKED);
  2024. /* clear (again), then enable host interrupts */
  2025. _il_wr(il, CSR_INT, 0xFFFFFFFF);
  2026. il_enable_interrupts(il);
  2027. /* really make sure rfkill handshake bits are cleared */
  2028. _il_wr(il, CSR_UCODE_DRV_GP1_CLR, CSR_UCODE_SW_BIT_RFKILL);
  2029. _il_wr(il, CSR_UCODE_DRV_GP1_CLR, CSR_UCODE_SW_BIT_RFKILL);
  2030. /* Copy original ucode data image from disk into backup cache.
  2031. * This will be used to initialize the on-board processor's
  2032. * data SRAM for a clean start when the runtime program first loads. */
  2033. memcpy(il->ucode_data_backup.v_addr, il->ucode_data.v_addr,
  2034. il->ucode_data.len);
  2035. /* We return success when we resume from suspend and rf_kill is on. */
  2036. if (test_bit(S_RF_KILL_HW, &il->status))
  2037. return 0;
  2038. for (i = 0; i < MAX_HW_RESTARTS; i++) {
  2039. /* load bootstrap state machine,
  2040. * load bootstrap program into processor's memory,
  2041. * prepare to load the "initialize" uCode */
  2042. rc = il->cfg->ops->lib->load_ucode(il);
  2043. if (rc) {
  2044. IL_ERR("Unable to set up bootstrap uCode: %d\n", rc);
  2045. continue;
  2046. }
  2047. /* start card; "initialize" will load runtime ucode */
  2048. il3945_nic_start(il);
  2049. D_INFO(DRV_NAME " is coming up\n");
  2050. return 0;
  2051. }
  2052. set_bit(S_EXIT_PENDING, &il->status);
  2053. __il3945_down(il);
  2054. clear_bit(S_EXIT_PENDING, &il->status);
  2055. /* tried to restart and config the device for as long as our
  2056. * patience could withstand */
  2057. IL_ERR("Unable to initialize device after %d attempts.\n", i);
  2058. return -EIO;
  2059. }
  2060. /*****************************************************************************
  2061. *
  2062. * Workqueue callbacks
  2063. *
  2064. *****************************************************************************/
  2065. static void
  2066. il3945_bg_init_alive_start(struct work_struct *data)
  2067. {
  2068. struct il_priv *il =
  2069. container_of(data, struct il_priv, init_alive_start.work);
  2070. mutex_lock(&il->mutex);
  2071. if (test_bit(S_EXIT_PENDING, &il->status))
  2072. goto out;
  2073. il3945_init_alive_start(il);
  2074. out:
  2075. mutex_unlock(&il->mutex);
  2076. }
  2077. static void
  2078. il3945_bg_alive_start(struct work_struct *data)
  2079. {
  2080. struct il_priv *il =
  2081. container_of(data, struct il_priv, alive_start.work);
  2082. mutex_lock(&il->mutex);
  2083. if (test_bit(S_EXIT_PENDING, &il->status))
  2084. goto out;
  2085. il3945_alive_start(il);
  2086. out:
  2087. mutex_unlock(&il->mutex);
  2088. }
  2089. /*
  2090. * 3945 cannot interrupt driver when hardware rf kill switch toggles;
  2091. * driver must poll CSR_GP_CNTRL_REG register for change. This register
  2092. * *is* readable even when device has been SW_RESET into low power mode
  2093. * (e.g. during RF KILL).
  2094. */
  2095. static void
  2096. il3945_rfkill_poll(struct work_struct *data)
  2097. {
  2098. struct il_priv *il =
  2099. container_of(data, struct il_priv, _3945.rfkill_poll.work);
  2100. bool old_rfkill = test_bit(S_RF_KILL_HW, &il->status);
  2101. bool new_rfkill =
  2102. !(_il_rd(il, CSR_GP_CNTRL) & CSR_GP_CNTRL_REG_FLAG_HW_RF_KILL_SW);
  2103. if (new_rfkill != old_rfkill) {
  2104. if (new_rfkill)
  2105. set_bit(S_RF_KILL_HW, &il->status);
  2106. else
  2107. clear_bit(S_RF_KILL_HW, &il->status);
  2108. wiphy_rfkill_set_hw_state(il->hw->wiphy, new_rfkill);
  2109. D_RF_KILL("RF_KILL bit toggled to %s.\n",
  2110. new_rfkill ? "disable radio" : "enable radio");
  2111. }
  2112. /* Keep this running, even if radio now enabled. This will be
  2113. * cancelled in mac_start() if system decides to start again */
  2114. queue_delayed_work(il->workqueue, &il->_3945.rfkill_poll,
  2115. round_jiffies_relative(2 * HZ));
  2116. }
  2117. int
  2118. il3945_request_scan(struct il_priv *il, struct ieee80211_vif *vif)
  2119. {
  2120. struct il_host_cmd cmd = {
  2121. .id = C_SCAN,
  2122. .len = sizeof(struct il3945_scan_cmd),
  2123. .flags = CMD_SIZE_HUGE,
  2124. };
  2125. struct il3945_scan_cmd *scan;
  2126. u8 n_probes = 0;
  2127. enum ieee80211_band band;
  2128. bool is_active = false;
  2129. int ret;
  2130. u16 len;
  2131. lockdep_assert_held(&il->mutex);
  2132. if (!il->scan_cmd) {
  2133. il->scan_cmd =
  2134. kmalloc(sizeof(struct il3945_scan_cmd) + IL_MAX_SCAN_SIZE,
  2135. GFP_KERNEL);
  2136. if (!il->scan_cmd) {
  2137. D_SCAN("Fail to allocate scan memory\n");
  2138. return -ENOMEM;
  2139. }
  2140. }
  2141. scan = il->scan_cmd;
  2142. memset(scan, 0, sizeof(struct il3945_scan_cmd) + IL_MAX_SCAN_SIZE);
  2143. scan->quiet_plcp_th = IL_PLCP_QUIET_THRESH;
  2144. scan->quiet_time = IL_ACTIVE_QUIET_TIME;
  2145. if (il_is_associated(il)) {
  2146. u16 interval;
  2147. u32 extra;
  2148. u32 suspend_time = 100;
  2149. u32 scan_suspend_time = 100;
  2150. D_INFO("Scanning while associated...\n");
  2151. interval = vif->bss_conf.beacon_int;
  2152. scan->suspend_time = 0;
  2153. scan->max_out_time = cpu_to_le32(200 * 1024);
  2154. if (!interval)
  2155. interval = suspend_time;
  2156. /*
  2157. * suspend time format:
  2158. * 0-19: beacon interval in usec (time before exec.)
  2159. * 20-23: 0
  2160. * 24-31: number of beacons (suspend between channels)
  2161. */
  2162. extra = (suspend_time / interval) << 24;
  2163. scan_suspend_time =
  2164. 0xFF0FFFFF & (extra | ((suspend_time % interval) * 1024));
  2165. scan->suspend_time = cpu_to_le32(scan_suspend_time);
  2166. D_SCAN("suspend_time 0x%X beacon interval %d\n",
  2167. scan_suspend_time, interval);
  2168. }
  2169. if (il->scan_request->n_ssids) {
  2170. int i, p = 0;
  2171. D_SCAN("Kicking off active scan\n");
  2172. for (i = 0; i < il->scan_request->n_ssids; i++) {
  2173. /* always does wildcard anyway */
  2174. if (!il->scan_request->ssids[i].ssid_len)
  2175. continue;
  2176. scan->direct_scan[p].id = WLAN_EID_SSID;
  2177. scan->direct_scan[p].len =
  2178. il->scan_request->ssids[i].ssid_len;
  2179. memcpy(scan->direct_scan[p].ssid,
  2180. il->scan_request->ssids[i].ssid,
  2181. il->scan_request->ssids[i].ssid_len);
  2182. n_probes++;
  2183. p++;
  2184. }
  2185. is_active = true;
  2186. } else
  2187. D_SCAN("Kicking off passive scan.\n");
  2188. /* We don't build a direct scan probe request; the uCode will do
  2189. * that based on the direct_mask added to each channel entry */
  2190. scan->tx_cmd.tx_flags = TX_CMD_FLG_SEQ_CTL_MSK;
  2191. scan->tx_cmd.sta_id = il->ctx.bcast_sta_id;
  2192. scan->tx_cmd.stop_time.life_time = TX_CMD_LIFE_TIME_INFINITE;
  2193. /* flags + rate selection */
  2194. switch (il->scan_band) {
  2195. case IEEE80211_BAND_2GHZ:
  2196. scan->flags = RXON_FLG_BAND_24G_MSK | RXON_FLG_AUTO_DETECT_MSK;
  2197. scan->tx_cmd.rate = RATE_1M_PLCP;
  2198. band = IEEE80211_BAND_2GHZ;
  2199. break;
  2200. case IEEE80211_BAND_5GHZ:
  2201. scan->tx_cmd.rate = RATE_6M_PLCP;
  2202. band = IEEE80211_BAND_5GHZ;
  2203. break;
  2204. default:
  2205. IL_WARN("Invalid scan band\n");
  2206. return -EIO;
  2207. }
  2208. /*
  2209. * If active scaning is requested but a certain channel
  2210. * is marked passive, we can do active scanning if we
  2211. * detect transmissions.
  2212. */
  2213. scan->good_CRC_th =
  2214. is_active ? IL_GOOD_CRC_TH_DEFAULT : IL_GOOD_CRC_TH_DISABLED;
  2215. len =
  2216. il_fill_probe_req(il, (struct ieee80211_mgmt *)scan->data,
  2217. vif->addr, il->scan_request->ie,
  2218. il->scan_request->ie_len,
  2219. IL_MAX_SCAN_SIZE - sizeof(*scan));
  2220. scan->tx_cmd.len = cpu_to_le16(len);
  2221. /* select Rx antennas */
  2222. scan->flags |= il3945_get_antenna_flags(il);
  2223. scan->channel_count =
  2224. il3945_get_channels_for_scan(il, band, is_active, n_probes,
  2225. (void *)&scan->data[len], vif);
  2226. if (scan->channel_count == 0) {
  2227. D_SCAN("channel count %d\n", scan->channel_count);
  2228. return -EIO;
  2229. }
  2230. cmd.len +=
  2231. le16_to_cpu(scan->tx_cmd.len) +
  2232. scan->channel_count * sizeof(struct il3945_scan_channel);
  2233. cmd.data = scan;
  2234. scan->len = cpu_to_le16(cmd.len);
  2235. set_bit(S_SCAN_HW, &il->status);
  2236. ret = il_send_cmd_sync(il, &cmd);
  2237. if (ret)
  2238. clear_bit(S_SCAN_HW, &il->status);
  2239. return ret;
  2240. }
  2241. void
  2242. il3945_post_scan(struct il_priv *il)
  2243. {
  2244. struct il_rxon_context *ctx = &il->ctx;
  2245. /*
  2246. * Since setting the RXON may have been deferred while
  2247. * performing the scan, fire one off if needed
  2248. */
  2249. if (memcmp(&ctx->staging, &ctx->active, sizeof(ctx->staging)))
  2250. il3945_commit_rxon(il, ctx);
  2251. }
  2252. static void
  2253. il3945_bg_restart(struct work_struct *data)
  2254. {
  2255. struct il_priv *il = container_of(data, struct il_priv, restart);
  2256. if (test_bit(S_EXIT_PENDING, &il->status))
  2257. return;
  2258. if (test_and_clear_bit(S_FW_ERROR, &il->status)) {
  2259. mutex_lock(&il->mutex);
  2260. il->ctx.vif = NULL;
  2261. il->is_open = 0;
  2262. mutex_unlock(&il->mutex);
  2263. il3945_down(il);
  2264. ieee80211_restart_hw(il->hw);
  2265. } else {
  2266. il3945_down(il);
  2267. mutex_lock(&il->mutex);
  2268. if (test_bit(S_EXIT_PENDING, &il->status)) {
  2269. mutex_unlock(&il->mutex);
  2270. return;
  2271. }
  2272. __il3945_up(il);
  2273. mutex_unlock(&il->mutex);
  2274. }
  2275. }
  2276. static void
  2277. il3945_bg_rx_replenish(struct work_struct *data)
  2278. {
  2279. struct il_priv *il = container_of(data, struct il_priv, rx_replenish);
  2280. mutex_lock(&il->mutex);
  2281. if (test_bit(S_EXIT_PENDING, &il->status))
  2282. goto out;
  2283. il3945_rx_replenish(il);
  2284. out:
  2285. mutex_unlock(&il->mutex);
  2286. }
  2287. void
  2288. il3945_post_associate(struct il_priv *il)
  2289. {
  2290. int rc = 0;
  2291. struct ieee80211_conf *conf = NULL;
  2292. struct il_rxon_context *ctx = &il->ctx;
  2293. if (!ctx->vif || !il->is_open)
  2294. return;
  2295. D_ASSOC("Associated as %d to: %pM\n", ctx->vif->bss_conf.aid,
  2296. ctx->active.bssid_addr);
  2297. if (test_bit(S_EXIT_PENDING, &il->status))
  2298. return;
  2299. il_scan_cancel_timeout(il, 200);
  2300. conf = &il->hw->conf;
  2301. ctx->staging.filter_flags &= ~RXON_FILTER_ASSOC_MSK;
  2302. il3945_commit_rxon(il, ctx);
  2303. rc = il_send_rxon_timing(il, ctx);
  2304. if (rc)
  2305. IL_WARN("C_RXON_TIMING failed - " "Attempting to continue.\n");
  2306. ctx->staging.filter_flags |= RXON_FILTER_ASSOC_MSK;
  2307. ctx->staging.assoc_id = cpu_to_le16(ctx->vif->bss_conf.aid);
  2308. D_ASSOC("assoc id %d beacon interval %d\n", ctx->vif->bss_conf.aid,
  2309. ctx->vif->bss_conf.beacon_int);
  2310. if (ctx->vif->bss_conf.use_short_preamble)
  2311. ctx->staging.flags |= RXON_FLG_SHORT_PREAMBLE_MSK;
  2312. else
  2313. ctx->staging.flags &= ~RXON_FLG_SHORT_PREAMBLE_MSK;
  2314. if (ctx->staging.flags & RXON_FLG_BAND_24G_MSK) {
  2315. if (ctx->vif->bss_conf.use_short_slot)
  2316. ctx->staging.flags |= RXON_FLG_SHORT_SLOT_MSK;
  2317. else
  2318. ctx->staging.flags &= ~RXON_FLG_SHORT_SLOT_MSK;
  2319. }
  2320. il3945_commit_rxon(il, ctx);
  2321. switch (ctx->vif->type) {
  2322. case NL80211_IFTYPE_STATION:
  2323. il3945_rate_scale_init(il->hw, IL_AP_ID);
  2324. break;
  2325. case NL80211_IFTYPE_ADHOC:
  2326. il3945_send_beacon_cmd(il);
  2327. break;
  2328. default:
  2329. IL_ERR("%s Should not be called in %d mode\n", __func__,
  2330. ctx->vif->type);
  2331. break;
  2332. }
  2333. }
  2334. /*****************************************************************************
  2335. *
  2336. * mac80211 entry point functions
  2337. *
  2338. *****************************************************************************/
  2339. #define UCODE_READY_TIMEOUT (2 * HZ)
  2340. static int
  2341. il3945_mac_start(struct ieee80211_hw *hw)
  2342. {
  2343. struct il_priv *il = hw->priv;
  2344. int ret;
  2345. D_MAC80211("enter\n");
  2346. /* we should be verifying the device is ready to be opened */
  2347. mutex_lock(&il->mutex);
  2348. /* fetch ucode file from disk, alloc and copy to bus-master buffers ...
  2349. * ucode filename and max sizes are card-specific. */
  2350. if (!il->ucode_code.len) {
  2351. ret = il3945_read_ucode(il);
  2352. if (ret) {
  2353. IL_ERR("Could not read microcode: %d\n", ret);
  2354. mutex_unlock(&il->mutex);
  2355. goto out_release_irq;
  2356. }
  2357. }
  2358. ret = __il3945_up(il);
  2359. mutex_unlock(&il->mutex);
  2360. if (ret)
  2361. goto out_release_irq;
  2362. D_INFO("Start UP work.\n");
  2363. /* Wait for START_ALIVE from ucode. Otherwise callbacks from
  2364. * mac80211 will not be run successfully. */
  2365. ret = wait_event_timeout(il->wait_command_queue,
  2366. test_bit(S_READY, &il->status),
  2367. UCODE_READY_TIMEOUT);
  2368. if (!ret) {
  2369. if (!test_bit(S_READY, &il->status)) {
  2370. IL_ERR("Wait for START_ALIVE timeout after %dms.\n",
  2371. jiffies_to_msecs(UCODE_READY_TIMEOUT));
  2372. ret = -ETIMEDOUT;
  2373. goto out_release_irq;
  2374. }
  2375. }
  2376. /* ucode is running and will send rfkill notifications,
  2377. * no need to poll the killswitch state anymore */
  2378. cancel_delayed_work(&il->_3945.rfkill_poll);
  2379. il->is_open = 1;
  2380. D_MAC80211("leave\n");
  2381. return 0;
  2382. out_release_irq:
  2383. il->is_open = 0;
  2384. D_MAC80211("leave - failed\n");
  2385. return ret;
  2386. }
  2387. static void
  2388. il3945_mac_stop(struct ieee80211_hw *hw)
  2389. {
  2390. struct il_priv *il = hw->priv;
  2391. D_MAC80211("enter\n");
  2392. if (!il->is_open) {
  2393. D_MAC80211("leave - skip\n");
  2394. return;
  2395. }
  2396. il->is_open = 0;
  2397. il3945_down(il);
  2398. flush_workqueue(il->workqueue);
  2399. /* start polling the killswitch state again */
  2400. queue_delayed_work(il->workqueue, &il->_3945.rfkill_poll,
  2401. round_jiffies_relative(2 * HZ));
  2402. D_MAC80211("leave\n");
  2403. }
  2404. static void
  2405. il3945_mac_tx(struct ieee80211_hw *hw, struct sk_buff *skb)
  2406. {
  2407. struct il_priv *il = hw->priv;
  2408. D_MAC80211("enter\n");
  2409. D_TX("dev->xmit(%d bytes) at rate 0x%02x\n", skb->len,
  2410. ieee80211_get_tx_rate(hw, IEEE80211_SKB_CB(skb))->bitrate);
  2411. if (il3945_tx_skb(il, skb))
  2412. dev_kfree_skb_any(skb);
  2413. D_MAC80211("leave\n");
  2414. }
  2415. void
  2416. il3945_config_ap(struct il_priv *il)
  2417. {
  2418. struct il_rxon_context *ctx = &il->ctx;
  2419. struct ieee80211_vif *vif = ctx->vif;
  2420. int rc = 0;
  2421. if (test_bit(S_EXIT_PENDING, &il->status))
  2422. return;
  2423. /* The following should be done only at AP bring up */
  2424. if (!(il_is_associated(il))) {
  2425. /* RXON - unassoc (to set timing command) */
  2426. ctx->staging.filter_flags &= ~RXON_FILTER_ASSOC_MSK;
  2427. il3945_commit_rxon(il, ctx);
  2428. /* RXON Timing */
  2429. rc = il_send_rxon_timing(il, ctx);
  2430. if (rc)
  2431. IL_WARN("C_RXON_TIMING failed - "
  2432. "Attempting to continue.\n");
  2433. ctx->staging.assoc_id = 0;
  2434. if (vif->bss_conf.use_short_preamble)
  2435. ctx->staging.flags |= RXON_FLG_SHORT_PREAMBLE_MSK;
  2436. else
  2437. ctx->staging.flags &= ~RXON_FLG_SHORT_PREAMBLE_MSK;
  2438. if (ctx->staging.flags & RXON_FLG_BAND_24G_MSK) {
  2439. if (vif->bss_conf.use_short_slot)
  2440. ctx->staging.flags |= RXON_FLG_SHORT_SLOT_MSK;
  2441. else
  2442. ctx->staging.flags &= ~RXON_FLG_SHORT_SLOT_MSK;
  2443. }
  2444. /* restore RXON assoc */
  2445. ctx->staging.filter_flags |= RXON_FILTER_ASSOC_MSK;
  2446. il3945_commit_rxon(il, ctx);
  2447. }
  2448. il3945_send_beacon_cmd(il);
  2449. }
  2450. static int
  2451. il3945_mac_set_key(struct ieee80211_hw *hw, enum set_key_cmd cmd,
  2452. struct ieee80211_vif *vif, struct ieee80211_sta *sta,
  2453. struct ieee80211_key_conf *key)
  2454. {
  2455. struct il_priv *il = hw->priv;
  2456. int ret = 0;
  2457. u8 sta_id = IL_INVALID_STATION;
  2458. u8 static_key;
  2459. D_MAC80211("enter\n");
  2460. if (il3945_mod_params.sw_crypto) {
  2461. D_MAC80211("leave - hwcrypto disabled\n");
  2462. return -EOPNOTSUPP;
  2463. }
  2464. /*
  2465. * To support IBSS RSN, don't program group keys in IBSS, the
  2466. * hardware will then not attempt to decrypt the frames.
  2467. */
  2468. if (vif->type == NL80211_IFTYPE_ADHOC &&
  2469. !(key->flags & IEEE80211_KEY_FLAG_PAIRWISE))
  2470. return -EOPNOTSUPP;
  2471. static_key = !il_is_associated(il);
  2472. if (!static_key) {
  2473. sta_id = il_sta_id_or_broadcast(il, &il->ctx, sta);
  2474. if (sta_id == IL_INVALID_STATION)
  2475. return -EINVAL;
  2476. }
  2477. mutex_lock(&il->mutex);
  2478. il_scan_cancel_timeout(il, 100);
  2479. switch (cmd) {
  2480. case SET_KEY:
  2481. if (static_key)
  2482. ret = il3945_set_static_key(il, key);
  2483. else
  2484. ret = il3945_set_dynamic_key(il, key, sta_id);
  2485. D_MAC80211("enable hwcrypto key\n");
  2486. break;
  2487. case DISABLE_KEY:
  2488. if (static_key)
  2489. ret = il3945_remove_static_key(il);
  2490. else
  2491. ret = il3945_clear_sta_key_info(il, sta_id);
  2492. D_MAC80211("disable hwcrypto key\n");
  2493. break;
  2494. default:
  2495. ret = -EINVAL;
  2496. }
  2497. mutex_unlock(&il->mutex);
  2498. D_MAC80211("leave\n");
  2499. return ret;
  2500. }
  2501. static int
  2502. il3945_mac_sta_add(struct ieee80211_hw *hw, struct ieee80211_vif *vif,
  2503. struct ieee80211_sta *sta)
  2504. {
  2505. struct il_priv *il = hw->priv;
  2506. struct il3945_sta_priv *sta_priv = (void *)sta->drv_priv;
  2507. int ret;
  2508. bool is_ap = vif->type == NL80211_IFTYPE_STATION;
  2509. u8 sta_id;
  2510. D_INFO("received request to add station %pM\n", sta->addr);
  2511. mutex_lock(&il->mutex);
  2512. D_INFO("proceeding to add station %pM\n", sta->addr);
  2513. sta_priv->common.sta_id = IL_INVALID_STATION;
  2514. ret =
  2515. il_add_station_common(il, &il->ctx, sta->addr, is_ap, sta, &sta_id);
  2516. if (ret) {
  2517. IL_ERR("Unable to add station %pM (%d)\n", sta->addr, ret);
  2518. /* Should we return success if return code is EEXIST ? */
  2519. mutex_unlock(&il->mutex);
  2520. return ret;
  2521. }
  2522. sta_priv->common.sta_id = sta_id;
  2523. /* Initialize rate scaling */
  2524. D_INFO("Initializing rate scaling for station %pM\n", sta->addr);
  2525. il3945_rs_rate_init(il, sta, sta_id);
  2526. mutex_unlock(&il->mutex);
  2527. return 0;
  2528. }
  2529. static void
  2530. il3945_configure_filter(struct ieee80211_hw *hw, unsigned int changed_flags,
  2531. unsigned int *total_flags, u64 multicast)
  2532. {
  2533. struct il_priv *il = hw->priv;
  2534. __le32 filter_or = 0, filter_nand = 0;
  2535. struct il_rxon_context *ctx = &il->ctx;
  2536. #define CHK(test, flag) do { \
  2537. if (*total_flags & (test)) \
  2538. filter_or |= (flag); \
  2539. else \
  2540. filter_nand |= (flag); \
  2541. } while (0)
  2542. D_MAC80211("Enter: changed: 0x%x, total: 0x%x\n", changed_flags,
  2543. *total_flags);
  2544. CHK(FIF_OTHER_BSS | FIF_PROMISC_IN_BSS, RXON_FILTER_PROMISC_MSK);
  2545. CHK(FIF_CONTROL, RXON_FILTER_CTL2HOST_MSK);
  2546. CHK(FIF_BCN_PRBRESP_PROMISC, RXON_FILTER_BCON_AWARE_MSK);
  2547. #undef CHK
  2548. mutex_lock(&il->mutex);
  2549. ctx->staging.filter_flags &= ~filter_nand;
  2550. ctx->staging.filter_flags |= filter_or;
  2551. /*
  2552. * Not committing directly because hardware can perform a scan,
  2553. * but even if hw is ready, committing here breaks for some reason,
  2554. * we'll eventually commit the filter flags change anyway.
  2555. */
  2556. mutex_unlock(&il->mutex);
  2557. /*
  2558. * Receiving all multicast frames is always enabled by the
  2559. * default flags setup in il_connection_init_rx_config()
  2560. * since we currently do not support programming multicast
  2561. * filters into the device.
  2562. */
  2563. *total_flags &=
  2564. FIF_OTHER_BSS | FIF_ALLMULTI | FIF_PROMISC_IN_BSS |
  2565. FIF_BCN_PRBRESP_PROMISC | FIF_CONTROL;
  2566. }
  2567. /*****************************************************************************
  2568. *
  2569. * sysfs attributes
  2570. *
  2571. *****************************************************************************/
  2572. #ifdef CONFIG_IWLEGACY_DEBUG
  2573. /*
  2574. * The following adds a new attribute to the sysfs representation
  2575. * of this device driver (i.e. a new file in /sys/bus/pci/drivers/iwl/)
  2576. * used for controlling the debug level.
  2577. *
  2578. * See the level definitions in iwl for details.
  2579. *
  2580. * The debug_level being managed using sysfs below is a per device debug
  2581. * level that is used instead of the global debug level if it (the per
  2582. * device debug level) is set.
  2583. */
  2584. static ssize_t
  2585. il3945_show_debug_level(struct device *d, struct device_attribute *attr,
  2586. char *buf)
  2587. {
  2588. struct il_priv *il = dev_get_drvdata(d);
  2589. return sprintf(buf, "0x%08X\n", il_get_debug_level(il));
  2590. }
  2591. static ssize_t
  2592. il3945_store_debug_level(struct device *d, struct device_attribute *attr,
  2593. const char *buf, size_t count)
  2594. {
  2595. struct il_priv *il = dev_get_drvdata(d);
  2596. unsigned long val;
  2597. int ret;
  2598. ret = strict_strtoul(buf, 0, &val);
  2599. if (ret)
  2600. IL_INFO("%s is not in hex or decimal form.\n", buf);
  2601. else {
  2602. il->debug_level = val;
  2603. if (il_alloc_traffic_mem(il))
  2604. IL_ERR("Not enough memory to generate traffic log\n");
  2605. }
  2606. return strnlen(buf, count);
  2607. }
  2608. static DEVICE_ATTR(debug_level, S_IWUSR | S_IRUGO, il3945_show_debug_level,
  2609. il3945_store_debug_level);
  2610. #endif /* CONFIG_IWLEGACY_DEBUG */
  2611. static ssize_t
  2612. il3945_show_temperature(struct device *d, struct device_attribute *attr,
  2613. char *buf)
  2614. {
  2615. struct il_priv *il = dev_get_drvdata(d);
  2616. if (!il_is_alive(il))
  2617. return -EAGAIN;
  2618. return sprintf(buf, "%d\n", il3945_hw_get_temperature(il));
  2619. }
  2620. static DEVICE_ATTR(temperature, S_IRUGO, il3945_show_temperature, NULL);
  2621. static ssize_t
  2622. il3945_show_tx_power(struct device *d, struct device_attribute *attr, char *buf)
  2623. {
  2624. struct il_priv *il = dev_get_drvdata(d);
  2625. return sprintf(buf, "%d\n", il->tx_power_user_lmt);
  2626. }
  2627. static ssize_t
  2628. il3945_store_tx_power(struct device *d, struct device_attribute *attr,
  2629. const char *buf, size_t count)
  2630. {
  2631. struct il_priv *il = dev_get_drvdata(d);
  2632. char *p = (char *)buf;
  2633. u32 val;
  2634. val = simple_strtoul(p, &p, 10);
  2635. if (p == buf)
  2636. IL_INFO(": %s is not in decimal form.\n", buf);
  2637. else
  2638. il3945_hw_reg_set_txpower(il, val);
  2639. return count;
  2640. }
  2641. static DEVICE_ATTR(tx_power, S_IWUSR | S_IRUGO, il3945_show_tx_power,
  2642. il3945_store_tx_power);
  2643. static ssize_t
  2644. il3945_show_flags(struct device *d, struct device_attribute *attr, char *buf)
  2645. {
  2646. struct il_priv *il = dev_get_drvdata(d);
  2647. struct il_rxon_context *ctx = &il->ctx;
  2648. return sprintf(buf, "0x%04X\n", ctx->active.flags);
  2649. }
  2650. static ssize_t
  2651. il3945_store_flags(struct device *d, struct device_attribute *attr,
  2652. const char *buf, size_t count)
  2653. {
  2654. struct il_priv *il = dev_get_drvdata(d);
  2655. u32 flags = simple_strtoul(buf, NULL, 0);
  2656. struct il_rxon_context *ctx = &il->ctx;
  2657. mutex_lock(&il->mutex);
  2658. if (le32_to_cpu(ctx->staging.flags) != flags) {
  2659. /* Cancel any currently running scans... */
  2660. if (il_scan_cancel_timeout(il, 100))
  2661. IL_WARN("Could not cancel scan.\n");
  2662. else {
  2663. D_INFO("Committing rxon.flags = 0x%04X\n", flags);
  2664. ctx->staging.flags = cpu_to_le32(flags);
  2665. il3945_commit_rxon(il, ctx);
  2666. }
  2667. }
  2668. mutex_unlock(&il->mutex);
  2669. return count;
  2670. }
  2671. static DEVICE_ATTR(flags, S_IWUSR | S_IRUGO, il3945_show_flags,
  2672. il3945_store_flags);
  2673. static ssize_t
  2674. il3945_show_filter_flags(struct device *d, struct device_attribute *attr,
  2675. char *buf)
  2676. {
  2677. struct il_priv *il = dev_get_drvdata(d);
  2678. struct il_rxon_context *ctx = &il->ctx;
  2679. return sprintf(buf, "0x%04X\n", le32_to_cpu(ctx->active.filter_flags));
  2680. }
  2681. static ssize_t
  2682. il3945_store_filter_flags(struct device *d, struct device_attribute *attr,
  2683. const char *buf, size_t count)
  2684. {
  2685. struct il_priv *il = dev_get_drvdata(d);
  2686. struct il_rxon_context *ctx = &il->ctx;
  2687. u32 filter_flags = simple_strtoul(buf, NULL, 0);
  2688. mutex_lock(&il->mutex);
  2689. if (le32_to_cpu(ctx->staging.filter_flags) != filter_flags) {
  2690. /* Cancel any currently running scans... */
  2691. if (il_scan_cancel_timeout(il, 100))
  2692. IL_WARN("Could not cancel scan.\n");
  2693. else {
  2694. D_INFO("Committing rxon.filter_flags = " "0x%04X\n",
  2695. filter_flags);
  2696. ctx->staging.filter_flags = cpu_to_le32(filter_flags);
  2697. il3945_commit_rxon(il, ctx);
  2698. }
  2699. }
  2700. mutex_unlock(&il->mutex);
  2701. return count;
  2702. }
  2703. static DEVICE_ATTR(filter_flags, S_IWUSR | S_IRUGO, il3945_show_filter_flags,
  2704. il3945_store_filter_flags);
  2705. static ssize_t
  2706. il3945_show_measurement(struct device *d, struct device_attribute *attr,
  2707. char *buf)
  2708. {
  2709. struct il_priv *il = dev_get_drvdata(d);
  2710. struct il_spectrum_notification measure_report;
  2711. u32 size = sizeof(measure_report), len = 0, ofs = 0;
  2712. u8 *data = (u8 *) &measure_report;
  2713. unsigned long flags;
  2714. spin_lock_irqsave(&il->lock, flags);
  2715. if (!(il->measurement_status & MEASUREMENT_READY)) {
  2716. spin_unlock_irqrestore(&il->lock, flags);
  2717. return 0;
  2718. }
  2719. memcpy(&measure_report, &il->measure_report, size);
  2720. il->measurement_status = 0;
  2721. spin_unlock_irqrestore(&il->lock, flags);
  2722. while (size && PAGE_SIZE - len) {
  2723. hex_dump_to_buffer(data + ofs, size, 16, 1, buf + len,
  2724. PAGE_SIZE - len, 1);
  2725. len = strlen(buf);
  2726. if (PAGE_SIZE - len)
  2727. buf[len++] = '\n';
  2728. ofs += 16;
  2729. size -= min(size, 16U);
  2730. }
  2731. return len;
  2732. }
  2733. static ssize_t
  2734. il3945_store_measurement(struct device *d, struct device_attribute *attr,
  2735. const char *buf, size_t count)
  2736. {
  2737. struct il_priv *il = dev_get_drvdata(d);
  2738. struct il_rxon_context *ctx = &il->ctx;
  2739. struct ieee80211_measurement_params params = {
  2740. .channel = le16_to_cpu(ctx->active.channel),
  2741. .start_time = cpu_to_le64(il->_3945.last_tsf),
  2742. .duration = cpu_to_le16(1),
  2743. };
  2744. u8 type = IL_MEASURE_BASIC;
  2745. u8 buffer[32];
  2746. u8 channel;
  2747. if (count) {
  2748. char *p = buffer;
  2749. strncpy(buffer, buf, min(sizeof(buffer), count));
  2750. channel = simple_strtoul(p, NULL, 0);
  2751. if (channel)
  2752. params.channel = channel;
  2753. p = buffer;
  2754. while (*p && *p != ' ')
  2755. p++;
  2756. if (*p)
  2757. type = simple_strtoul(p + 1, NULL, 0);
  2758. }
  2759. D_INFO("Invoking measurement of type %d on " "channel %d (for '%s')\n",
  2760. type, params.channel, buf);
  2761. il3945_get_measurement(il, &params, type);
  2762. return count;
  2763. }
  2764. static DEVICE_ATTR(measurement, S_IRUSR | S_IWUSR, il3945_show_measurement,
  2765. il3945_store_measurement);
  2766. static ssize_t
  2767. il3945_store_retry_rate(struct device *d, struct device_attribute *attr,
  2768. const char *buf, size_t count)
  2769. {
  2770. struct il_priv *il = dev_get_drvdata(d);
  2771. il->retry_rate = simple_strtoul(buf, NULL, 0);
  2772. if (il->retry_rate <= 0)
  2773. il->retry_rate = 1;
  2774. return count;
  2775. }
  2776. static ssize_t
  2777. il3945_show_retry_rate(struct device *d, struct device_attribute *attr,
  2778. char *buf)
  2779. {
  2780. struct il_priv *il = dev_get_drvdata(d);
  2781. return sprintf(buf, "%d", il->retry_rate);
  2782. }
  2783. static DEVICE_ATTR(retry_rate, S_IWUSR | S_IRUSR, il3945_show_retry_rate,
  2784. il3945_store_retry_rate);
  2785. static ssize_t
  2786. il3945_show_channels(struct device *d, struct device_attribute *attr, char *buf)
  2787. {
  2788. /* all this shit doesn't belong into sysfs anyway */
  2789. return 0;
  2790. }
  2791. static DEVICE_ATTR(channels, S_IRUSR, il3945_show_channels, NULL);
  2792. static ssize_t
  2793. il3945_show_antenna(struct device *d, struct device_attribute *attr, char *buf)
  2794. {
  2795. struct il_priv *il = dev_get_drvdata(d);
  2796. if (!il_is_alive(il))
  2797. return -EAGAIN;
  2798. return sprintf(buf, "%d\n", il3945_mod_params.antenna);
  2799. }
  2800. static ssize_t
  2801. il3945_store_antenna(struct device *d, struct device_attribute *attr,
  2802. const char *buf, size_t count)
  2803. {
  2804. struct il_priv *il __maybe_unused = dev_get_drvdata(d);
  2805. int ant;
  2806. if (count == 0)
  2807. return 0;
  2808. if (sscanf(buf, "%1i", &ant) != 1) {
  2809. D_INFO("not in hex or decimal form.\n");
  2810. return count;
  2811. }
  2812. if (ant >= 0 && ant <= 2) {
  2813. D_INFO("Setting antenna select to %d.\n", ant);
  2814. il3945_mod_params.antenna = (enum il3945_antenna)ant;
  2815. } else
  2816. D_INFO("Bad antenna select value %d.\n", ant);
  2817. return count;
  2818. }
  2819. static DEVICE_ATTR(antenna, S_IWUSR | S_IRUGO, il3945_show_antenna,
  2820. il3945_store_antenna);
  2821. static ssize_t
  2822. il3945_show_status(struct device *d, struct device_attribute *attr, char *buf)
  2823. {
  2824. struct il_priv *il = dev_get_drvdata(d);
  2825. if (!il_is_alive(il))
  2826. return -EAGAIN;
  2827. return sprintf(buf, "0x%08x\n", (int)il->status);
  2828. }
  2829. static DEVICE_ATTR(status, S_IRUGO, il3945_show_status, NULL);
  2830. static ssize_t
  2831. il3945_dump_error_log(struct device *d, struct device_attribute *attr,
  2832. const char *buf, size_t count)
  2833. {
  2834. struct il_priv *il = dev_get_drvdata(d);
  2835. char *p = (char *)buf;
  2836. if (p[0] == '1')
  2837. il3945_dump_nic_error_log(il);
  2838. return strnlen(buf, count);
  2839. }
  2840. static DEVICE_ATTR(dump_errors, S_IWUSR, NULL, il3945_dump_error_log);
  2841. /*****************************************************************************
  2842. *
  2843. * driver setup and tear down
  2844. *
  2845. *****************************************************************************/
  2846. static void
  2847. il3945_setup_deferred_work(struct il_priv *il)
  2848. {
  2849. il->workqueue = create_singlethread_workqueue(DRV_NAME);
  2850. init_waitqueue_head(&il->wait_command_queue);
  2851. INIT_WORK(&il->restart, il3945_bg_restart);
  2852. INIT_WORK(&il->rx_replenish, il3945_bg_rx_replenish);
  2853. INIT_DELAYED_WORK(&il->init_alive_start, il3945_bg_init_alive_start);
  2854. INIT_DELAYED_WORK(&il->alive_start, il3945_bg_alive_start);
  2855. INIT_DELAYED_WORK(&il->_3945.rfkill_poll, il3945_rfkill_poll);
  2856. il_setup_scan_deferred_work(il);
  2857. il3945_hw_setup_deferred_work(il);
  2858. init_timer(&il->watchdog);
  2859. il->watchdog.data = (unsigned long)il;
  2860. il->watchdog.function = il_bg_watchdog;
  2861. tasklet_init(&il->irq_tasklet,
  2862. (void (*)(unsigned long))il3945_irq_tasklet,
  2863. (unsigned long)il);
  2864. }
  2865. static void
  2866. il3945_cancel_deferred_work(struct il_priv *il)
  2867. {
  2868. il3945_hw_cancel_deferred_work(il);
  2869. cancel_delayed_work_sync(&il->init_alive_start);
  2870. cancel_delayed_work(&il->alive_start);
  2871. il_cancel_scan_deferred_work(il);
  2872. }
  2873. static struct attribute *il3945_sysfs_entries[] = {
  2874. &dev_attr_antenna.attr,
  2875. &dev_attr_channels.attr,
  2876. &dev_attr_dump_errors.attr,
  2877. &dev_attr_flags.attr,
  2878. &dev_attr_filter_flags.attr,
  2879. &dev_attr_measurement.attr,
  2880. &dev_attr_retry_rate.attr,
  2881. &dev_attr_status.attr,
  2882. &dev_attr_temperature.attr,
  2883. &dev_attr_tx_power.attr,
  2884. #ifdef CONFIG_IWLEGACY_DEBUG
  2885. &dev_attr_debug_level.attr,
  2886. #endif
  2887. NULL
  2888. };
  2889. static struct attribute_group il3945_attribute_group = {
  2890. .name = NULL, /* put in device directory */
  2891. .attrs = il3945_sysfs_entries,
  2892. };
  2893. struct ieee80211_ops il3945_hw_ops = {
  2894. .tx = il3945_mac_tx,
  2895. .start = il3945_mac_start,
  2896. .stop = il3945_mac_stop,
  2897. .add_interface = il_mac_add_interface,
  2898. .remove_interface = il_mac_remove_interface,
  2899. .change_interface = il_mac_change_interface,
  2900. .config = il_mac_config,
  2901. .configure_filter = il3945_configure_filter,
  2902. .set_key = il3945_mac_set_key,
  2903. .conf_tx = il_mac_conf_tx,
  2904. .reset_tsf = il_mac_reset_tsf,
  2905. .bss_info_changed = il_mac_bss_info_changed,
  2906. .hw_scan = il_mac_hw_scan,
  2907. .sta_add = il3945_mac_sta_add,
  2908. .sta_remove = il_mac_sta_remove,
  2909. .tx_last_beacon = il_mac_tx_last_beacon,
  2910. };
  2911. static int
  2912. il3945_init_drv(struct il_priv *il)
  2913. {
  2914. int ret;
  2915. struct il3945_eeprom *eeprom = (struct il3945_eeprom *)il->eeprom;
  2916. il->retry_rate = 1;
  2917. il->beacon_skb = NULL;
  2918. spin_lock_init(&il->sta_lock);
  2919. spin_lock_init(&il->hcmd_lock);
  2920. INIT_LIST_HEAD(&il->free_frames);
  2921. mutex_init(&il->mutex);
  2922. il->ieee_channels = NULL;
  2923. il->ieee_rates = NULL;
  2924. il->band = IEEE80211_BAND_2GHZ;
  2925. il->iw_mode = NL80211_IFTYPE_STATION;
  2926. il->missed_beacon_threshold = IL_MISSED_BEACON_THRESHOLD_DEF;
  2927. /* initialize force reset */
  2928. il->force_reset.reset_duration = IL_DELAY_NEXT_FORCE_FW_RELOAD;
  2929. if (eeprom->version < EEPROM_3945_EEPROM_VERSION) {
  2930. IL_WARN("Unsupported EEPROM version: 0x%04X\n",
  2931. eeprom->version);
  2932. ret = -EINVAL;
  2933. goto err;
  2934. }
  2935. ret = il_init_channel_map(il);
  2936. if (ret) {
  2937. IL_ERR("initializing regulatory failed: %d\n", ret);
  2938. goto err;
  2939. }
  2940. /* Set up txpower settings in driver for all channels */
  2941. if (il3945_txpower_set_from_eeprom(il)) {
  2942. ret = -EIO;
  2943. goto err_free_channel_map;
  2944. }
  2945. ret = il_init_geos(il);
  2946. if (ret) {
  2947. IL_ERR("initializing geos failed: %d\n", ret);
  2948. goto err_free_channel_map;
  2949. }
  2950. il3945_init_hw_rates(il, il->ieee_rates);
  2951. return 0;
  2952. err_free_channel_map:
  2953. il_free_channel_map(il);
  2954. err:
  2955. return ret;
  2956. }
  2957. #define IL3945_MAX_PROBE_REQUEST 200
  2958. static int
  2959. il3945_setup_mac(struct il_priv *il)
  2960. {
  2961. int ret;
  2962. struct ieee80211_hw *hw = il->hw;
  2963. hw->rate_control_algorithm = "iwl-3945-rs";
  2964. hw->sta_data_size = sizeof(struct il3945_sta_priv);
  2965. hw->vif_data_size = sizeof(struct il_vif_priv);
  2966. /* Tell mac80211 our characteristics */
  2967. hw->flags = IEEE80211_HW_SIGNAL_DBM | IEEE80211_HW_SPECTRUM_MGMT;
  2968. hw->wiphy->interface_modes = il->ctx.interface_modes;
  2969. hw->wiphy->flags |=
  2970. WIPHY_FLAG_CUSTOM_REGULATORY | WIPHY_FLAG_DISABLE_BEACON_HINTS |
  2971. WIPHY_FLAG_IBSS_RSN;
  2972. hw->wiphy->max_scan_ssids = PROBE_OPTION_MAX_3945;
  2973. /* we create the 802.11 header and a zero-length SSID element */
  2974. hw->wiphy->max_scan_ie_len = IL3945_MAX_PROBE_REQUEST - 24 - 2;
  2975. /* Default value; 4 EDCA QOS priorities */
  2976. hw->queues = 4;
  2977. if (il->bands[IEEE80211_BAND_2GHZ].n_channels)
  2978. il->hw->wiphy->bands[IEEE80211_BAND_2GHZ] =
  2979. &il->bands[IEEE80211_BAND_2GHZ];
  2980. if (il->bands[IEEE80211_BAND_5GHZ].n_channels)
  2981. il->hw->wiphy->bands[IEEE80211_BAND_5GHZ] =
  2982. &il->bands[IEEE80211_BAND_5GHZ];
  2983. il_leds_init(il);
  2984. ret = ieee80211_register_hw(il->hw);
  2985. if (ret) {
  2986. IL_ERR("Failed to register hw (error %d)\n", ret);
  2987. return ret;
  2988. }
  2989. il->mac80211_registered = 1;
  2990. return 0;
  2991. }
  2992. static int
  2993. il3945_pci_probe(struct pci_dev *pdev, const struct pci_device_id *ent)
  2994. {
  2995. int err = 0;
  2996. struct il_priv *il;
  2997. struct ieee80211_hw *hw;
  2998. struct il_cfg *cfg = (struct il_cfg *)(ent->driver_data);
  2999. struct il3945_eeprom *eeprom;
  3000. unsigned long flags;
  3001. /***********************
  3002. * 1. Allocating HW data
  3003. * ********************/
  3004. /* mac80211 allocates memory for this device instance, including
  3005. * space for this driver's ilate structure */
  3006. hw = il_alloc_all(cfg);
  3007. if (hw == NULL) {
  3008. pr_err("Can not allocate network device\n");
  3009. err = -ENOMEM;
  3010. goto out;
  3011. }
  3012. il = hw->priv;
  3013. SET_IEEE80211_DEV(hw, &pdev->dev);
  3014. il->cmd_queue = IL39_CMD_QUEUE_NUM;
  3015. il->ctx.ctxid = 0;
  3016. il->ctx.rxon_cmd = C_RXON;
  3017. il->ctx.rxon_timing_cmd = C_RXON_TIMING;
  3018. il->ctx.rxon_assoc_cmd = C_RXON_ASSOC;
  3019. il->ctx.qos_cmd = C_QOS_PARAM;
  3020. il->ctx.ap_sta_id = IL_AP_ID;
  3021. il->ctx.wep_key_cmd = C_WEPKEY;
  3022. il->ctx.interface_modes =
  3023. BIT(NL80211_IFTYPE_STATION) | BIT(NL80211_IFTYPE_ADHOC);
  3024. il->ctx.ibss_devtype = RXON_DEV_TYPE_IBSS;
  3025. il->ctx.station_devtype = RXON_DEV_TYPE_ESS;
  3026. il->ctx.unused_devtype = RXON_DEV_TYPE_ESS;
  3027. /*
  3028. * Disabling hardware scan means that mac80211 will perform scans
  3029. * "the hard way", rather than using device's scan.
  3030. */
  3031. if (il3945_mod_params.disable_hw_scan) {
  3032. D_INFO("Disabling hw_scan\n");
  3033. il3945_hw_ops.hw_scan = NULL;
  3034. }
  3035. D_INFO("*** LOAD DRIVER ***\n");
  3036. il->cfg = cfg;
  3037. il->pci_dev = pdev;
  3038. il->inta_mask = CSR_INI_SET_MASK;
  3039. if (il_alloc_traffic_mem(il))
  3040. IL_ERR("Not enough memory to generate traffic log\n");
  3041. /***************************
  3042. * 2. Initializing PCI bus
  3043. * *************************/
  3044. pci_disable_link_state(pdev,
  3045. PCIE_LINK_STATE_L0S | PCIE_LINK_STATE_L1 |
  3046. PCIE_LINK_STATE_CLKPM);
  3047. if (pci_enable_device(pdev)) {
  3048. err = -ENODEV;
  3049. goto out_ieee80211_free_hw;
  3050. }
  3051. pci_set_master(pdev);
  3052. err = pci_set_dma_mask(pdev, DMA_BIT_MASK(32));
  3053. if (!err)
  3054. err = pci_set_consistent_dma_mask(pdev, DMA_BIT_MASK(32));
  3055. if (err) {
  3056. IL_WARN("No suitable DMA available.\n");
  3057. goto out_pci_disable_device;
  3058. }
  3059. pci_set_drvdata(pdev, il);
  3060. err = pci_request_regions(pdev, DRV_NAME);
  3061. if (err)
  3062. goto out_pci_disable_device;
  3063. /***********************
  3064. * 3. Read REV Register
  3065. * ********************/
  3066. il->hw_base = pci_iomap(pdev, 0, 0);
  3067. if (!il->hw_base) {
  3068. err = -ENODEV;
  3069. goto out_pci_release_regions;
  3070. }
  3071. D_INFO("pci_resource_len = 0x%08llx\n",
  3072. (unsigned long long)pci_resource_len(pdev, 0));
  3073. D_INFO("pci_resource_base = %p\n", il->hw_base);
  3074. /* We disable the RETRY_TIMEOUT register (0x41) to keep
  3075. * PCI Tx retries from interfering with C3 CPU state */
  3076. pci_write_config_byte(pdev, 0x41, 0x00);
  3077. /* these spin locks will be used in apm_ops.init and EEPROM access
  3078. * we should init now
  3079. */
  3080. spin_lock_init(&il->reg_lock);
  3081. spin_lock_init(&il->lock);
  3082. /*
  3083. * stop and reset the on-board processor just in case it is in a
  3084. * strange state ... like being left stranded by a primary kernel
  3085. * and this is now the kdump kernel trying to start up
  3086. */
  3087. _il_wr(il, CSR_RESET, CSR_RESET_REG_FLAG_NEVO_RESET);
  3088. /***********************
  3089. * 4. Read EEPROM
  3090. * ********************/
  3091. /* Read the EEPROM */
  3092. err = il_eeprom_init(il);
  3093. if (err) {
  3094. IL_ERR("Unable to init EEPROM\n");
  3095. goto out_iounmap;
  3096. }
  3097. /* MAC Address location in EEPROM same for 3945/4965 */
  3098. eeprom = (struct il3945_eeprom *)il->eeprom;
  3099. D_INFO("MAC address: %pM\n", eeprom->mac_address);
  3100. SET_IEEE80211_PERM_ADDR(il->hw, eeprom->mac_address);
  3101. /***********************
  3102. * 5. Setup HW Constants
  3103. * ********************/
  3104. /* Device-specific setup */
  3105. if (il3945_hw_set_hw_params(il)) {
  3106. IL_ERR("failed to set hw settings\n");
  3107. goto out_eeprom_free;
  3108. }
  3109. /***********************
  3110. * 6. Setup il
  3111. * ********************/
  3112. err = il3945_init_drv(il);
  3113. if (err) {
  3114. IL_ERR("initializing driver failed\n");
  3115. goto out_unset_hw_params;
  3116. }
  3117. IL_INFO("Detected Intel Wireless WiFi Link %s\n", il->cfg->name);
  3118. /***********************
  3119. * 7. Setup Services
  3120. * ********************/
  3121. spin_lock_irqsave(&il->lock, flags);
  3122. il_disable_interrupts(il);
  3123. spin_unlock_irqrestore(&il->lock, flags);
  3124. pci_enable_msi(il->pci_dev);
  3125. err = request_irq(il->pci_dev->irq, il_isr, IRQF_SHARED, DRV_NAME, il);
  3126. if (err) {
  3127. IL_ERR("Error allocating IRQ %d\n", il->pci_dev->irq);
  3128. goto out_disable_msi;
  3129. }
  3130. err = sysfs_create_group(&pdev->dev.kobj, &il3945_attribute_group);
  3131. if (err) {
  3132. IL_ERR("failed to create sysfs device attributes\n");
  3133. goto out_release_irq;
  3134. }
  3135. il_set_rxon_channel(il, &il->bands[IEEE80211_BAND_2GHZ].channels[5],
  3136. &il->ctx);
  3137. il3945_setup_deferred_work(il);
  3138. il3945_setup_handlers(il);
  3139. il_power_initialize(il);
  3140. /*********************************
  3141. * 8. Setup and Register mac80211
  3142. * *******************************/
  3143. il_enable_interrupts(il);
  3144. err = il3945_setup_mac(il);
  3145. if (err)
  3146. goto out_remove_sysfs;
  3147. err = il_dbgfs_register(il, DRV_NAME);
  3148. if (err)
  3149. IL_ERR("failed to create debugfs files. Ignoring error: %d\n",
  3150. err);
  3151. /* Start monitoring the killswitch */
  3152. queue_delayed_work(il->workqueue, &il->_3945.rfkill_poll, 2 * HZ);
  3153. return 0;
  3154. out_remove_sysfs:
  3155. destroy_workqueue(il->workqueue);
  3156. il->workqueue = NULL;
  3157. sysfs_remove_group(&pdev->dev.kobj, &il3945_attribute_group);
  3158. out_release_irq:
  3159. free_irq(il->pci_dev->irq, il);
  3160. out_disable_msi:
  3161. pci_disable_msi(il->pci_dev);
  3162. il_free_geos(il);
  3163. il_free_channel_map(il);
  3164. out_unset_hw_params:
  3165. il3945_unset_hw_params(il);
  3166. out_eeprom_free:
  3167. il_eeprom_free(il);
  3168. out_iounmap:
  3169. pci_iounmap(pdev, il->hw_base);
  3170. out_pci_release_regions:
  3171. pci_release_regions(pdev);
  3172. out_pci_disable_device:
  3173. pci_set_drvdata(pdev, NULL);
  3174. pci_disable_device(pdev);
  3175. out_ieee80211_free_hw:
  3176. il_free_traffic_mem(il);
  3177. ieee80211_free_hw(il->hw);
  3178. out:
  3179. return err;
  3180. }
  3181. static void __devexit
  3182. il3945_pci_remove(struct pci_dev *pdev)
  3183. {
  3184. struct il_priv *il = pci_get_drvdata(pdev);
  3185. unsigned long flags;
  3186. if (!il)
  3187. return;
  3188. D_INFO("*** UNLOAD DRIVER ***\n");
  3189. il_dbgfs_unregister(il);
  3190. set_bit(S_EXIT_PENDING, &il->status);
  3191. il_leds_exit(il);
  3192. if (il->mac80211_registered) {
  3193. ieee80211_unregister_hw(il->hw);
  3194. il->mac80211_registered = 0;
  3195. } else {
  3196. il3945_down(il);
  3197. }
  3198. /*
  3199. * Make sure device is reset to low power before unloading driver.
  3200. * This may be redundant with il_down(), but there are paths to
  3201. * run il_down() without calling apm_ops.stop(), and there are
  3202. * paths to avoid running il_down() at all before leaving driver.
  3203. * This (inexpensive) call *makes sure* device is reset.
  3204. */
  3205. il_apm_stop(il);
  3206. /* make sure we flush any pending irq or
  3207. * tasklet for the driver
  3208. */
  3209. spin_lock_irqsave(&il->lock, flags);
  3210. il_disable_interrupts(il);
  3211. spin_unlock_irqrestore(&il->lock, flags);
  3212. il3945_synchronize_irq(il);
  3213. sysfs_remove_group(&pdev->dev.kobj, &il3945_attribute_group);
  3214. cancel_delayed_work_sync(&il->_3945.rfkill_poll);
  3215. il3945_dealloc_ucode_pci(il);
  3216. if (il->rxq.bd)
  3217. il3945_rx_queue_free(il, &il->rxq);
  3218. il3945_hw_txq_ctx_free(il);
  3219. il3945_unset_hw_params(il);
  3220. /*netif_stop_queue(dev); */
  3221. flush_workqueue(il->workqueue);
  3222. /* ieee80211_unregister_hw calls il3945_mac_stop, which flushes
  3223. * il->workqueue... so we can't take down the workqueue
  3224. * until now... */
  3225. destroy_workqueue(il->workqueue);
  3226. il->workqueue = NULL;
  3227. il_free_traffic_mem(il);
  3228. free_irq(pdev->irq, il);
  3229. pci_disable_msi(pdev);
  3230. pci_iounmap(pdev, il->hw_base);
  3231. pci_release_regions(pdev);
  3232. pci_disable_device(pdev);
  3233. pci_set_drvdata(pdev, NULL);
  3234. il_free_channel_map(il);
  3235. il_free_geos(il);
  3236. kfree(il->scan_cmd);
  3237. if (il->beacon_skb)
  3238. dev_kfree_skb(il->beacon_skb);
  3239. ieee80211_free_hw(il->hw);
  3240. }
  3241. /*****************************************************************************
  3242. *
  3243. * driver and module entry point
  3244. *
  3245. *****************************************************************************/
  3246. static struct pci_driver il3945_driver = {
  3247. .name = DRV_NAME,
  3248. .id_table = il3945_hw_card_ids,
  3249. .probe = il3945_pci_probe,
  3250. .remove = __devexit_p(il3945_pci_remove),
  3251. .driver.pm = IL_LEGACY_PM_OPS,
  3252. };
  3253. static int __init
  3254. il3945_init(void)
  3255. {
  3256. int ret;
  3257. pr_info(DRV_DESCRIPTION ", " DRV_VERSION "\n");
  3258. pr_info(DRV_COPYRIGHT "\n");
  3259. ret = il3945_rate_control_register();
  3260. if (ret) {
  3261. pr_err("Unable to register rate control algorithm: %d\n", ret);
  3262. return ret;
  3263. }
  3264. ret = pci_register_driver(&il3945_driver);
  3265. if (ret) {
  3266. pr_err("Unable to initialize PCI module\n");
  3267. goto error_register;
  3268. }
  3269. return ret;
  3270. error_register:
  3271. il3945_rate_control_unregister();
  3272. return ret;
  3273. }
  3274. static void __exit
  3275. il3945_exit(void)
  3276. {
  3277. pci_unregister_driver(&il3945_driver);
  3278. il3945_rate_control_unregister();
  3279. }
  3280. MODULE_FIRMWARE(IL3945_MODULE_FIRMWARE(IL3945_UCODE_API_MAX));
  3281. module_param_named(antenna, il3945_mod_params.antenna, int, S_IRUGO);
  3282. MODULE_PARM_DESC(antenna, "select antenna (1=Main, 2=Aux, default 0 [both])");
  3283. module_param_named(swcrypto, il3945_mod_params.sw_crypto, int, S_IRUGO);
  3284. MODULE_PARM_DESC(swcrypto, "using software crypto (default 1 [software])");
  3285. module_param_named(disable_hw_scan, il3945_mod_params.disable_hw_scan, int,
  3286. S_IRUGO);
  3287. MODULE_PARM_DESC(disable_hw_scan, "disable hardware scanning (default 1)");
  3288. #ifdef CONFIG_IWLEGACY_DEBUG
  3289. module_param_named(debug, il_debug_level, uint, S_IRUGO | S_IWUSR);
  3290. MODULE_PARM_DESC(debug, "debug output mask");
  3291. #endif
  3292. module_param_named(fw_restart, il3945_mod_params.restart_fw, int, S_IRUGO);
  3293. MODULE_PARM_DESC(fw_restart, "restart firmware in case of error");
  3294. module_exit(il3945_exit);
  3295. module_init(il3945_init);