pasemi_mac.c 31 KB

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  1. /*
  2. * Copyright (C) 2006-2007 PA Semi, Inc
  3. *
  4. * Driver for the PA Semi PWRficient onchip 1G/10G Ethernet MACs
  5. *
  6. * This program is free software; you can redistribute it and/or modify
  7. * it under the terms of the GNU General Public License version 2 as
  8. * published by the Free Software Foundation.
  9. *
  10. * This program is distributed in the hope that it will be useful,
  11. * but WITHOUT ANY WARRANTY; without even the implied warranty of
  12. * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
  13. * GNU General Public License for more details.
  14. *
  15. * You should have received a copy of the GNU General Public License
  16. * along with this program; if not, write to the Free Software
  17. * Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA
  18. */
  19. #include <linux/init.h>
  20. #include <linux/module.h>
  21. #include <linux/pci.h>
  22. #include <linux/interrupt.h>
  23. #include <linux/dmaengine.h>
  24. #include <linux/delay.h>
  25. #include <linux/netdevice.h>
  26. #include <linux/etherdevice.h>
  27. #include <asm/dma-mapping.h>
  28. #include <linux/in.h>
  29. #include <linux/skbuff.h>
  30. #include <linux/ip.h>
  31. #include <linux/tcp.h>
  32. #include <net/checksum.h>
  33. #include <asm/irq.h>
  34. #include "pasemi_mac.h"
  35. /* TODO list
  36. *
  37. * - Get rid of pci_{read,write}_config(), map registers with ioremap
  38. * for performance
  39. * - PHY support
  40. * - Multicast support
  41. * - Large MTU support
  42. * - Other performance improvements
  43. */
  44. /* Must be a power of two */
  45. #define RX_RING_SIZE 512
  46. #define TX_RING_SIZE 512
  47. #define DEFAULT_MSG_ENABLE \
  48. (NETIF_MSG_DRV | \
  49. NETIF_MSG_PROBE | \
  50. NETIF_MSG_LINK | \
  51. NETIF_MSG_TIMER | \
  52. NETIF_MSG_IFDOWN | \
  53. NETIF_MSG_IFUP | \
  54. NETIF_MSG_RX_ERR | \
  55. NETIF_MSG_TX_ERR)
  56. #define TX_DESC(mac, num) ((mac)->tx->desc[(num) & (TX_RING_SIZE-1)])
  57. #define TX_DESC_INFO(mac, num) ((mac)->tx->desc_info[(num) & (TX_RING_SIZE-1)])
  58. #define RX_DESC(mac, num) ((mac)->rx->desc[(num) & (RX_RING_SIZE-1)])
  59. #define RX_DESC_INFO(mac, num) ((mac)->rx->desc_info[(num) & (RX_RING_SIZE-1)])
  60. #define RX_BUFF(mac, num) ((mac)->rx->buffers[(num) & (RX_RING_SIZE-1)])
  61. #define BUF_SIZE 1646 /* 1500 MTU + ETH_HLEN + VLAN_HLEN + 2 64B cachelines */
  62. MODULE_LICENSE("GPL");
  63. MODULE_AUTHOR ("Olof Johansson <olof@lixom.net>");
  64. MODULE_DESCRIPTION("PA Semi PWRficient Ethernet driver");
  65. static int debug = -1; /* -1 == use DEFAULT_MSG_ENABLE as value */
  66. module_param(debug, int, 0);
  67. MODULE_PARM_DESC(debug, "PA Semi MAC bitmapped debugging message enable value");
  68. static struct pasdma_status *dma_status;
  69. static unsigned int read_iob_reg(struct pasemi_mac *mac, unsigned int reg)
  70. {
  71. return in_le32(mac->iob_regs+reg);
  72. }
  73. static void write_iob_reg(struct pasemi_mac *mac, unsigned int reg,
  74. unsigned int val)
  75. {
  76. out_le32(mac->iob_regs+reg, val);
  77. }
  78. static unsigned int read_mac_reg(struct pasemi_mac *mac, unsigned int reg)
  79. {
  80. return in_le32(mac->regs+reg);
  81. }
  82. static void write_mac_reg(struct pasemi_mac *mac, unsigned int reg,
  83. unsigned int val)
  84. {
  85. out_le32(mac->regs+reg, val);
  86. }
  87. static unsigned int read_dma_reg(struct pasemi_mac *mac, unsigned int reg)
  88. {
  89. return in_le32(mac->dma_regs+reg);
  90. }
  91. static void write_dma_reg(struct pasemi_mac *mac, unsigned int reg,
  92. unsigned int val)
  93. {
  94. out_le32(mac->dma_regs+reg, val);
  95. }
  96. static int pasemi_get_mac_addr(struct pasemi_mac *mac)
  97. {
  98. struct pci_dev *pdev = mac->pdev;
  99. struct device_node *dn = pci_device_to_OF_node(pdev);
  100. int len;
  101. const u8 *maddr;
  102. u8 addr[6];
  103. if (!dn) {
  104. dev_dbg(&pdev->dev,
  105. "No device node for mac, not configuring\n");
  106. return -ENOENT;
  107. }
  108. maddr = of_get_property(dn, "local-mac-address", &len);
  109. if (maddr && len == 6) {
  110. memcpy(mac->mac_addr, maddr, 6);
  111. return 0;
  112. }
  113. /* Some old versions of firmware mistakenly uses mac-address
  114. * (and as a string) instead of a byte array in local-mac-address.
  115. */
  116. if (maddr == NULL)
  117. maddr = of_get_property(dn, "mac-address", NULL);
  118. if (maddr == NULL) {
  119. dev_warn(&pdev->dev,
  120. "no mac address in device tree, not configuring\n");
  121. return -ENOENT;
  122. }
  123. if (sscanf(maddr, "%hhx:%hhx:%hhx:%hhx:%hhx:%hhx", &addr[0],
  124. &addr[1], &addr[2], &addr[3], &addr[4], &addr[5]) != 6) {
  125. dev_warn(&pdev->dev,
  126. "can't parse mac address, not configuring\n");
  127. return -EINVAL;
  128. }
  129. memcpy(mac->mac_addr, addr, 6);
  130. return 0;
  131. }
  132. static int pasemi_mac_setup_rx_resources(struct net_device *dev)
  133. {
  134. struct pasemi_mac_rxring *ring;
  135. struct pasemi_mac *mac = netdev_priv(dev);
  136. int chan_id = mac->dma_rxch;
  137. ring = kzalloc(sizeof(*ring), GFP_KERNEL);
  138. if (!ring)
  139. goto out_ring;
  140. spin_lock_init(&ring->lock);
  141. ring->desc_info = kzalloc(sizeof(struct pasemi_mac_buffer) *
  142. RX_RING_SIZE, GFP_KERNEL);
  143. if (!ring->desc_info)
  144. goto out_desc_info;
  145. /* Allocate descriptors */
  146. ring->desc = dma_alloc_coherent(&mac->dma_pdev->dev,
  147. RX_RING_SIZE *
  148. sizeof(struct pas_dma_xct_descr),
  149. &ring->dma, GFP_KERNEL);
  150. if (!ring->desc)
  151. goto out_desc;
  152. memset(ring->desc, 0, RX_RING_SIZE * sizeof(struct pas_dma_xct_descr));
  153. ring->buffers = dma_alloc_coherent(&mac->dma_pdev->dev,
  154. RX_RING_SIZE * sizeof(u64),
  155. &ring->buf_dma, GFP_KERNEL);
  156. if (!ring->buffers)
  157. goto out_buffers;
  158. memset(ring->buffers, 0, RX_RING_SIZE * sizeof(u64));
  159. write_dma_reg(mac, PAS_DMA_RXCHAN_BASEL(chan_id), PAS_DMA_RXCHAN_BASEL_BRBL(ring->dma));
  160. write_dma_reg(mac, PAS_DMA_RXCHAN_BASEU(chan_id),
  161. PAS_DMA_RXCHAN_BASEU_BRBH(ring->dma >> 32) |
  162. PAS_DMA_RXCHAN_BASEU_SIZ(RX_RING_SIZE >> 2));
  163. write_dma_reg(mac, PAS_DMA_RXCHAN_CFG(chan_id),
  164. PAS_DMA_RXCHAN_CFG_HBU(2));
  165. write_dma_reg(mac, PAS_DMA_RXINT_BASEL(mac->dma_if),
  166. PAS_DMA_RXINT_BASEL_BRBL(__pa(ring->buffers)));
  167. write_dma_reg(mac, PAS_DMA_RXINT_BASEU(mac->dma_if),
  168. PAS_DMA_RXINT_BASEU_BRBH(__pa(ring->buffers) >> 32) |
  169. PAS_DMA_RXINT_BASEU_SIZ(RX_RING_SIZE >> 3));
  170. write_dma_reg(mac, PAS_DMA_RXINT_CFG(mac->dma_if),
  171. PAS_DMA_RXINT_CFG_DHL(2));
  172. ring->next_to_fill = 0;
  173. ring->next_to_clean = 0;
  174. snprintf(ring->irq_name, sizeof(ring->irq_name),
  175. "%s rx", dev->name);
  176. mac->rx = ring;
  177. return 0;
  178. out_buffers:
  179. dma_free_coherent(&mac->dma_pdev->dev,
  180. RX_RING_SIZE * sizeof(struct pas_dma_xct_descr),
  181. mac->rx->desc, mac->rx->dma);
  182. out_desc:
  183. kfree(ring->desc_info);
  184. out_desc_info:
  185. kfree(ring);
  186. out_ring:
  187. return -ENOMEM;
  188. }
  189. static int pasemi_mac_setup_tx_resources(struct net_device *dev)
  190. {
  191. struct pasemi_mac *mac = netdev_priv(dev);
  192. u32 val;
  193. int chan_id = mac->dma_txch;
  194. struct pasemi_mac_txring *ring;
  195. ring = kzalloc(sizeof(*ring), GFP_KERNEL);
  196. if (!ring)
  197. goto out_ring;
  198. spin_lock_init(&ring->lock);
  199. ring->desc_info = kzalloc(sizeof(struct pasemi_mac_buffer) *
  200. TX_RING_SIZE, GFP_KERNEL);
  201. if (!ring->desc_info)
  202. goto out_desc_info;
  203. /* Allocate descriptors */
  204. ring->desc = dma_alloc_coherent(&mac->dma_pdev->dev,
  205. TX_RING_SIZE *
  206. sizeof(struct pas_dma_xct_descr),
  207. &ring->dma, GFP_KERNEL);
  208. if (!ring->desc)
  209. goto out_desc;
  210. memset(ring->desc, 0, TX_RING_SIZE * sizeof(struct pas_dma_xct_descr));
  211. write_dma_reg(mac, PAS_DMA_TXCHAN_BASEL(chan_id),
  212. PAS_DMA_TXCHAN_BASEL_BRBL(ring->dma));
  213. val = PAS_DMA_TXCHAN_BASEU_BRBH(ring->dma >> 32);
  214. val |= PAS_DMA_TXCHAN_BASEU_SIZ(TX_RING_SIZE >> 2);
  215. write_dma_reg(mac, PAS_DMA_TXCHAN_BASEU(chan_id), val);
  216. write_dma_reg(mac, PAS_DMA_TXCHAN_CFG(chan_id),
  217. PAS_DMA_TXCHAN_CFG_TY_IFACE |
  218. PAS_DMA_TXCHAN_CFG_TATTR(mac->dma_if) |
  219. PAS_DMA_TXCHAN_CFG_UP |
  220. PAS_DMA_TXCHAN_CFG_WT(2));
  221. ring->next_to_use = 0;
  222. ring->next_to_clean = 0;
  223. snprintf(ring->irq_name, sizeof(ring->irq_name),
  224. "%s tx", dev->name);
  225. mac->tx = ring;
  226. return 0;
  227. out_desc:
  228. kfree(ring->desc_info);
  229. out_desc_info:
  230. kfree(ring);
  231. out_ring:
  232. return -ENOMEM;
  233. }
  234. static void pasemi_mac_free_tx_resources(struct net_device *dev)
  235. {
  236. struct pasemi_mac *mac = netdev_priv(dev);
  237. unsigned int i;
  238. struct pasemi_mac_buffer *info;
  239. struct pas_dma_xct_descr *dp;
  240. for (i = 0; i < TX_RING_SIZE; i++) {
  241. info = &TX_DESC_INFO(mac, i);
  242. dp = &TX_DESC(mac, i);
  243. if (info->dma) {
  244. if (info->skb) {
  245. pci_unmap_single(mac->dma_pdev,
  246. info->dma,
  247. info->skb->len,
  248. PCI_DMA_TODEVICE);
  249. dev_kfree_skb_any(info->skb);
  250. }
  251. info->dma = 0;
  252. info->skb = NULL;
  253. dp->mactx = 0;
  254. dp->ptr = 0;
  255. }
  256. }
  257. dma_free_coherent(&mac->dma_pdev->dev,
  258. TX_RING_SIZE * sizeof(struct pas_dma_xct_descr),
  259. mac->tx->desc, mac->tx->dma);
  260. kfree(mac->tx->desc_info);
  261. kfree(mac->tx);
  262. mac->tx = NULL;
  263. }
  264. static void pasemi_mac_free_rx_resources(struct net_device *dev)
  265. {
  266. struct pasemi_mac *mac = netdev_priv(dev);
  267. unsigned int i;
  268. struct pasemi_mac_buffer *info;
  269. struct pas_dma_xct_descr *dp;
  270. for (i = 0; i < RX_RING_SIZE; i++) {
  271. info = &RX_DESC_INFO(mac, i);
  272. dp = &RX_DESC(mac, i);
  273. if (info->skb) {
  274. if (info->dma) {
  275. pci_unmap_single(mac->dma_pdev,
  276. info->dma,
  277. info->skb->len,
  278. PCI_DMA_FROMDEVICE);
  279. dev_kfree_skb_any(info->skb);
  280. }
  281. info->dma = 0;
  282. info->skb = NULL;
  283. dp->macrx = 0;
  284. dp->ptr = 0;
  285. }
  286. }
  287. dma_free_coherent(&mac->dma_pdev->dev,
  288. RX_RING_SIZE * sizeof(struct pas_dma_xct_descr),
  289. mac->rx->desc, mac->rx->dma);
  290. dma_free_coherent(&mac->dma_pdev->dev, RX_RING_SIZE * sizeof(u64),
  291. mac->rx->buffers, mac->rx->buf_dma);
  292. kfree(mac->rx->desc_info);
  293. kfree(mac->rx);
  294. mac->rx = NULL;
  295. }
  296. static void pasemi_mac_replenish_rx_ring(struct net_device *dev)
  297. {
  298. struct pasemi_mac *mac = netdev_priv(dev);
  299. unsigned int i;
  300. int start = mac->rx->next_to_fill;
  301. unsigned int limit, count;
  302. limit = (mac->rx->next_to_clean + RX_RING_SIZE -
  303. mac->rx->next_to_fill) & (RX_RING_SIZE - 1);
  304. /* Check to see if we're doing first-time setup */
  305. if (unlikely(mac->rx->next_to_clean == 0 && mac->rx->next_to_fill == 0))
  306. limit = RX_RING_SIZE;
  307. if (limit <= 0)
  308. return;
  309. i = start;
  310. for (count = limit; count; count--) {
  311. struct pasemi_mac_buffer *info = &RX_DESC_INFO(mac, i);
  312. u64 *buff = &RX_BUFF(mac, i);
  313. struct sk_buff *skb;
  314. dma_addr_t dma;
  315. /* skb might still be in there for recycle on short receives */
  316. if (info->skb)
  317. skb = info->skb;
  318. else
  319. skb = dev_alloc_skb(BUF_SIZE);
  320. if (unlikely(!skb))
  321. break;
  322. dma = pci_map_single(mac->dma_pdev, skb->data, skb->len,
  323. PCI_DMA_FROMDEVICE);
  324. if (unlikely(dma_mapping_error(dma))) {
  325. dev_kfree_skb_irq(info->skb);
  326. break;
  327. }
  328. info->skb = skb;
  329. info->dma = dma;
  330. *buff = XCT_RXB_LEN(BUF_SIZE) | XCT_RXB_ADDR(dma);
  331. i++;
  332. }
  333. wmb();
  334. write_dma_reg(mac, PAS_DMA_RXCHAN_INCR(mac->dma_rxch), limit - count);
  335. write_dma_reg(mac, PAS_DMA_RXINT_INCR(mac->dma_if), limit - count);
  336. mac->rx->next_to_fill += limit - count;
  337. }
  338. static void pasemi_mac_restart_rx_intr(struct pasemi_mac *mac)
  339. {
  340. unsigned int reg, pcnt;
  341. /* Re-enable packet count interrupts: finally
  342. * ack the packet count interrupt we got in rx_intr.
  343. */
  344. pcnt = *mac->rx_status & PAS_STATUS_PCNT_M;
  345. reg = PAS_IOB_DMA_RXCH_RESET_PCNT(pcnt) | PAS_IOB_DMA_RXCH_RESET_PINTC;
  346. write_iob_reg(mac, PAS_IOB_DMA_RXCH_RESET(mac->dma_rxch), reg);
  347. }
  348. static void pasemi_mac_restart_tx_intr(struct pasemi_mac *mac)
  349. {
  350. unsigned int reg, pcnt;
  351. /* Re-enable packet count interrupts */
  352. pcnt = *mac->tx_status & PAS_STATUS_PCNT_M;
  353. reg = PAS_IOB_DMA_TXCH_RESET_PCNT(pcnt) | PAS_IOB_DMA_TXCH_RESET_PINTC;
  354. write_iob_reg(mac, PAS_IOB_DMA_TXCH_RESET(mac->dma_txch), reg);
  355. }
  356. static int pasemi_mac_clean_rx(struct pasemi_mac *mac, int limit)
  357. {
  358. unsigned int n;
  359. int count;
  360. struct pas_dma_xct_descr *dp;
  361. struct pasemi_mac_buffer *info;
  362. struct sk_buff *skb;
  363. unsigned int i, len;
  364. u64 macrx;
  365. dma_addr_t dma;
  366. spin_lock(&mac->rx->lock);
  367. n = mac->rx->next_to_clean;
  368. for (count = limit; count; count--) {
  369. rmb();
  370. dp = &RX_DESC(mac, n);
  371. macrx = dp->macrx;
  372. if (!(macrx & XCT_MACRX_O))
  373. break;
  374. info = NULL;
  375. /* We have to scan for our skb since there's no way
  376. * to back-map them from the descriptor, and if we
  377. * have several receive channels then they might not
  378. * show up in the same order as they were put on the
  379. * interface ring.
  380. */
  381. dma = (dp->ptr & XCT_PTR_ADDR_M);
  382. for (i = n; i < (n + RX_RING_SIZE); i++) {
  383. info = &RX_DESC_INFO(mac, i);
  384. if (info->dma == dma)
  385. break;
  386. }
  387. skb = info->skb;
  388. info->dma = 0;
  389. pci_unmap_single(mac->dma_pdev, dma, skb->len,
  390. PCI_DMA_FROMDEVICE);
  391. len = (macrx & XCT_MACRX_LLEN_M) >> XCT_MACRX_LLEN_S;
  392. if (len < 256) {
  393. struct sk_buff *new_skb =
  394. netdev_alloc_skb(mac->netdev, len + NET_IP_ALIGN);
  395. if (new_skb) {
  396. skb_reserve(new_skb, NET_IP_ALIGN);
  397. memcpy(new_skb->data - NET_IP_ALIGN,
  398. skb->data - NET_IP_ALIGN,
  399. len + NET_IP_ALIGN);
  400. /* save the skb in buffer_info as good */
  401. skb = new_skb;
  402. }
  403. /* else just continue with the old one */
  404. } else
  405. info->skb = NULL;
  406. skb_put(skb, len);
  407. skb->protocol = eth_type_trans(skb, mac->netdev);
  408. if ((macrx & XCT_MACRX_HTY_M) == XCT_MACRX_HTY_IPV4_OK) {
  409. skb->ip_summed = CHECKSUM_COMPLETE;
  410. skb->csum = (macrx & XCT_MACRX_CSUM_M) >>
  411. XCT_MACRX_CSUM_S;
  412. } else
  413. skb->ip_summed = CHECKSUM_NONE;
  414. mac->stats.rx_bytes += len;
  415. mac->stats.rx_packets++;
  416. netif_receive_skb(skb);
  417. dp->ptr = 0;
  418. dp->macrx = 0;
  419. n++;
  420. }
  421. mac->rx->next_to_clean += limit - count;
  422. pasemi_mac_replenish_rx_ring(mac->netdev);
  423. spin_unlock(&mac->rx->lock);
  424. return count;
  425. }
  426. static int pasemi_mac_clean_tx(struct pasemi_mac *mac)
  427. {
  428. int i;
  429. struct pasemi_mac_buffer *info;
  430. struct pas_dma_xct_descr *dp;
  431. int start, count;
  432. int flags;
  433. spin_lock_irqsave(&mac->tx->lock, flags);
  434. start = mac->tx->next_to_clean;
  435. count = 0;
  436. for (i = start; i < mac->tx->next_to_use; i++) {
  437. dp = &TX_DESC(mac, i);
  438. if (!dp || (dp->mactx & XCT_MACTX_O))
  439. break;
  440. count++;
  441. info = &TX_DESC_INFO(mac, i);
  442. pci_unmap_single(mac->dma_pdev, info->dma,
  443. info->skb->len, PCI_DMA_TODEVICE);
  444. dev_kfree_skb_irq(info->skb);
  445. info->skb = NULL;
  446. info->dma = 0;
  447. dp->mactx = 0;
  448. dp->ptr = 0;
  449. }
  450. mac->tx->next_to_clean += count;
  451. spin_unlock_irqrestore(&mac->tx->lock, flags);
  452. netif_wake_queue(mac->netdev);
  453. return count;
  454. }
  455. static irqreturn_t pasemi_mac_rx_intr(int irq, void *data)
  456. {
  457. struct net_device *dev = data;
  458. struct pasemi_mac *mac = netdev_priv(dev);
  459. unsigned int reg;
  460. if (!(*mac->rx_status & PAS_STATUS_CAUSE_M))
  461. return IRQ_NONE;
  462. if (*mac->rx_status & PAS_STATUS_ERROR)
  463. printk("rx_status reported error\n");
  464. /* Don't reset packet count so it won't fire again but clear
  465. * all others.
  466. */
  467. reg = 0;
  468. if (*mac->rx_status & PAS_STATUS_SOFT)
  469. reg |= PAS_IOB_DMA_RXCH_RESET_SINTC;
  470. if (*mac->rx_status & PAS_STATUS_ERROR)
  471. reg |= PAS_IOB_DMA_RXCH_RESET_DINTC;
  472. if (*mac->rx_status & PAS_STATUS_TIMER)
  473. reg |= PAS_IOB_DMA_RXCH_RESET_TINTC;
  474. netif_rx_schedule(dev, &mac->napi);
  475. write_iob_reg(mac, PAS_IOB_DMA_RXCH_RESET(mac->dma_rxch), reg);
  476. return IRQ_HANDLED;
  477. }
  478. static irqreturn_t pasemi_mac_tx_intr(int irq, void *data)
  479. {
  480. struct net_device *dev = data;
  481. struct pasemi_mac *mac = netdev_priv(dev);
  482. unsigned int reg, pcnt;
  483. if (!(*mac->tx_status & PAS_STATUS_CAUSE_M))
  484. return IRQ_NONE;
  485. pasemi_mac_clean_tx(mac);
  486. pcnt = *mac->tx_status & PAS_STATUS_PCNT_M;
  487. reg = PAS_IOB_DMA_TXCH_RESET_PCNT(pcnt) | PAS_IOB_DMA_TXCH_RESET_PINTC;
  488. if (*mac->tx_status & PAS_STATUS_SOFT)
  489. reg |= PAS_IOB_DMA_TXCH_RESET_SINTC;
  490. if (*mac->tx_status & PAS_STATUS_ERROR)
  491. reg |= PAS_IOB_DMA_TXCH_RESET_DINTC;
  492. write_iob_reg(mac, PAS_IOB_DMA_TXCH_RESET(mac->dma_txch), reg);
  493. return IRQ_HANDLED;
  494. }
  495. static void pasemi_adjust_link(struct net_device *dev)
  496. {
  497. struct pasemi_mac *mac = netdev_priv(dev);
  498. int msg;
  499. unsigned int flags;
  500. unsigned int new_flags;
  501. if (!mac->phydev->link) {
  502. /* If no link, MAC speed settings don't matter. Just report
  503. * link down and return.
  504. */
  505. if (mac->link && netif_msg_link(mac))
  506. printk(KERN_INFO "%s: Link is down.\n", dev->name);
  507. netif_carrier_off(dev);
  508. mac->link = 0;
  509. return;
  510. } else
  511. netif_carrier_on(dev);
  512. flags = read_mac_reg(mac, PAS_MAC_CFG_PCFG);
  513. new_flags = flags & ~(PAS_MAC_CFG_PCFG_HD | PAS_MAC_CFG_PCFG_SPD_M |
  514. PAS_MAC_CFG_PCFG_TSR_M);
  515. if (!mac->phydev->duplex)
  516. new_flags |= PAS_MAC_CFG_PCFG_HD;
  517. switch (mac->phydev->speed) {
  518. case 1000:
  519. new_flags |= PAS_MAC_CFG_PCFG_SPD_1G |
  520. PAS_MAC_CFG_PCFG_TSR_1G;
  521. break;
  522. case 100:
  523. new_flags |= PAS_MAC_CFG_PCFG_SPD_100M |
  524. PAS_MAC_CFG_PCFG_TSR_100M;
  525. break;
  526. case 10:
  527. new_flags |= PAS_MAC_CFG_PCFG_SPD_10M |
  528. PAS_MAC_CFG_PCFG_TSR_10M;
  529. break;
  530. default:
  531. printk("Unsupported speed %d\n", mac->phydev->speed);
  532. }
  533. /* Print on link or speed/duplex change */
  534. msg = mac->link != mac->phydev->link || flags != new_flags;
  535. mac->duplex = mac->phydev->duplex;
  536. mac->speed = mac->phydev->speed;
  537. mac->link = mac->phydev->link;
  538. if (new_flags != flags)
  539. write_mac_reg(mac, PAS_MAC_CFG_PCFG, new_flags);
  540. if (msg && netif_msg_link(mac))
  541. printk(KERN_INFO "%s: Link is up at %d Mbps, %s duplex.\n",
  542. dev->name, mac->speed, mac->duplex ? "full" : "half");
  543. }
  544. static int pasemi_mac_phy_init(struct net_device *dev)
  545. {
  546. struct pasemi_mac *mac = netdev_priv(dev);
  547. struct device_node *dn, *phy_dn;
  548. struct phy_device *phydev;
  549. unsigned int phy_id;
  550. const phandle *ph;
  551. const unsigned int *prop;
  552. struct resource r;
  553. int ret;
  554. dn = pci_device_to_OF_node(mac->pdev);
  555. ph = of_get_property(dn, "phy-handle", NULL);
  556. if (!ph)
  557. return -ENODEV;
  558. phy_dn = of_find_node_by_phandle(*ph);
  559. prop = of_get_property(phy_dn, "reg", NULL);
  560. ret = of_address_to_resource(phy_dn->parent, 0, &r);
  561. if (ret)
  562. goto err;
  563. phy_id = *prop;
  564. snprintf(mac->phy_id, BUS_ID_SIZE, PHY_ID_FMT, (int)r.start, phy_id);
  565. of_node_put(phy_dn);
  566. mac->link = 0;
  567. mac->speed = 0;
  568. mac->duplex = -1;
  569. phydev = phy_connect(dev, mac->phy_id, &pasemi_adjust_link, 0, PHY_INTERFACE_MODE_SGMII);
  570. if (IS_ERR(phydev)) {
  571. printk(KERN_ERR "%s: Could not attach to phy\n", dev->name);
  572. return PTR_ERR(phydev);
  573. }
  574. mac->phydev = phydev;
  575. return 0;
  576. err:
  577. of_node_put(phy_dn);
  578. return -ENODEV;
  579. }
  580. static int pasemi_mac_open(struct net_device *dev)
  581. {
  582. struct pasemi_mac *mac = netdev_priv(dev);
  583. int base_irq;
  584. unsigned int flags;
  585. int ret;
  586. /* enable rx section */
  587. write_dma_reg(mac, PAS_DMA_COM_RXCMD, PAS_DMA_COM_RXCMD_EN);
  588. /* enable tx section */
  589. write_dma_reg(mac, PAS_DMA_COM_TXCMD, PAS_DMA_COM_TXCMD_EN);
  590. flags = PAS_MAC_CFG_TXP_FCE | PAS_MAC_CFG_TXP_FPC(3) |
  591. PAS_MAC_CFG_TXP_SL(3) | PAS_MAC_CFG_TXP_COB(0xf) |
  592. PAS_MAC_CFG_TXP_TIFT(8) | PAS_MAC_CFG_TXP_TIFG(12);
  593. write_mac_reg(mac, PAS_MAC_CFG_TXP, flags);
  594. flags = PAS_MAC_CFG_PCFG_S1 | PAS_MAC_CFG_PCFG_PE |
  595. PAS_MAC_CFG_PCFG_PR | PAS_MAC_CFG_PCFG_CE;
  596. flags |= PAS_MAC_CFG_PCFG_TSR_1G | PAS_MAC_CFG_PCFG_SPD_1G;
  597. write_iob_reg(mac, PAS_IOB_DMA_RXCH_CFG(mac->dma_rxch),
  598. PAS_IOB_DMA_RXCH_CFG_CNTTH(0));
  599. write_iob_reg(mac, PAS_IOB_DMA_TXCH_CFG(mac->dma_txch),
  600. PAS_IOB_DMA_TXCH_CFG_CNTTH(32));
  601. /* Clear out any residual packet count state from firmware */
  602. pasemi_mac_restart_rx_intr(mac);
  603. pasemi_mac_restart_tx_intr(mac);
  604. /* 0xffffff is max value, about 16ms */
  605. write_iob_reg(mac, PAS_IOB_DMA_COM_TIMEOUTCFG,
  606. PAS_IOB_DMA_COM_TIMEOUTCFG_TCNT(0xffffff));
  607. write_mac_reg(mac, PAS_MAC_CFG_PCFG, flags);
  608. ret = pasemi_mac_setup_rx_resources(dev);
  609. if (ret)
  610. goto out_rx_resources;
  611. ret = pasemi_mac_setup_tx_resources(dev);
  612. if (ret)
  613. goto out_tx_resources;
  614. write_mac_reg(mac, PAS_MAC_IPC_CHNL,
  615. PAS_MAC_IPC_CHNL_DCHNO(mac->dma_rxch) |
  616. PAS_MAC_IPC_CHNL_BCH(mac->dma_rxch));
  617. /* enable rx if */
  618. write_dma_reg(mac, PAS_DMA_RXINT_RCMDSTA(mac->dma_if),
  619. PAS_DMA_RXINT_RCMDSTA_EN);
  620. /* enable rx channel */
  621. write_dma_reg(mac, PAS_DMA_RXCHAN_CCMDSTA(mac->dma_rxch),
  622. PAS_DMA_RXCHAN_CCMDSTA_EN |
  623. PAS_DMA_RXCHAN_CCMDSTA_DU);
  624. /* enable tx channel */
  625. write_dma_reg(mac, PAS_DMA_TXCHAN_TCMDSTA(mac->dma_txch),
  626. PAS_DMA_TXCHAN_TCMDSTA_EN);
  627. pasemi_mac_replenish_rx_ring(dev);
  628. ret = pasemi_mac_phy_init(dev);
  629. /* Some configs don't have PHYs (XAUI etc), so don't complain about
  630. * failed init due to -ENODEV.
  631. */
  632. if (ret && ret != -ENODEV)
  633. dev_warn(&mac->pdev->dev, "phy init failed: %d\n", ret);
  634. netif_start_queue(dev);
  635. napi_enable(&mac->napi);
  636. /* Interrupts are a bit different for our DMA controller: While
  637. * it's got one a regular PCI device header, the interrupt there
  638. * is really the base of the range it's using. Each tx and rx
  639. * channel has it's own interrupt source.
  640. */
  641. base_irq = virq_to_hw(mac->dma_pdev->irq);
  642. mac->tx_irq = irq_create_mapping(NULL, base_irq + mac->dma_txch);
  643. mac->rx_irq = irq_create_mapping(NULL, base_irq + 20 + mac->dma_txch);
  644. ret = request_irq(mac->tx_irq, &pasemi_mac_tx_intr, IRQF_DISABLED,
  645. mac->tx->irq_name, dev);
  646. if (ret) {
  647. dev_err(&mac->pdev->dev, "request_irq of irq %d failed: %d\n",
  648. base_irq + mac->dma_txch, ret);
  649. goto out_tx_int;
  650. }
  651. ret = request_irq(mac->rx_irq, &pasemi_mac_rx_intr, IRQF_DISABLED,
  652. mac->rx->irq_name, dev);
  653. if (ret) {
  654. dev_err(&mac->pdev->dev, "request_irq of irq %d failed: %d\n",
  655. base_irq + 20 + mac->dma_rxch, ret);
  656. goto out_rx_int;
  657. }
  658. if (mac->phydev)
  659. phy_start(mac->phydev);
  660. return 0;
  661. out_rx_int:
  662. free_irq(mac->tx_irq, dev);
  663. out_tx_int:
  664. napi_disable(&mac->napi);
  665. netif_stop_queue(dev);
  666. pasemi_mac_free_tx_resources(dev);
  667. out_tx_resources:
  668. pasemi_mac_free_rx_resources(dev);
  669. out_rx_resources:
  670. return ret;
  671. }
  672. #define MAX_RETRIES 5000
  673. static int pasemi_mac_close(struct net_device *dev)
  674. {
  675. struct pasemi_mac *mac = netdev_priv(dev);
  676. unsigned int stat;
  677. int retries;
  678. if (mac->phydev) {
  679. phy_stop(mac->phydev);
  680. phy_disconnect(mac->phydev);
  681. }
  682. netif_stop_queue(dev);
  683. napi_disable(&mac->napi);
  684. /* Clean out any pending buffers */
  685. pasemi_mac_clean_tx(mac);
  686. pasemi_mac_clean_rx(mac, RX_RING_SIZE);
  687. /* Disable interface */
  688. write_dma_reg(mac, PAS_DMA_TXCHAN_TCMDSTA(mac->dma_txch), PAS_DMA_TXCHAN_TCMDSTA_ST);
  689. write_dma_reg(mac, PAS_DMA_RXINT_RCMDSTA(mac->dma_if), PAS_DMA_RXINT_RCMDSTA_ST);
  690. write_dma_reg(mac, PAS_DMA_RXCHAN_CCMDSTA(mac->dma_rxch), PAS_DMA_RXCHAN_CCMDSTA_ST);
  691. for (retries = 0; retries < MAX_RETRIES; retries++) {
  692. stat = read_dma_reg(mac, PAS_DMA_TXCHAN_TCMDSTA(mac->dma_txch));
  693. if (!(stat & PAS_DMA_TXCHAN_TCMDSTA_ACT))
  694. break;
  695. cond_resched();
  696. }
  697. if (stat & PAS_DMA_TXCHAN_TCMDSTA_ACT)
  698. dev_err(&mac->dma_pdev->dev, "Failed to stop tx channel\n");
  699. for (retries = 0; retries < MAX_RETRIES; retries++) {
  700. stat = read_dma_reg(mac, PAS_DMA_RXCHAN_CCMDSTA(mac->dma_rxch));
  701. if (!(stat & PAS_DMA_RXCHAN_CCMDSTA_ACT))
  702. break;
  703. cond_resched();
  704. }
  705. if (stat & PAS_DMA_RXCHAN_CCMDSTA_ACT)
  706. dev_err(&mac->dma_pdev->dev, "Failed to stop rx channel\n");
  707. for (retries = 0; retries < MAX_RETRIES; retries++) {
  708. stat = read_dma_reg(mac, PAS_DMA_RXINT_RCMDSTA(mac->dma_if));
  709. if (!(stat & PAS_DMA_RXINT_RCMDSTA_ACT))
  710. break;
  711. cond_resched();
  712. }
  713. if (stat & PAS_DMA_RXINT_RCMDSTA_ACT)
  714. dev_err(&mac->dma_pdev->dev, "Failed to stop rx interface\n");
  715. /* Then, disable the channel. This must be done separately from
  716. * stopping, since you can't disable when active.
  717. */
  718. write_dma_reg(mac, PAS_DMA_TXCHAN_TCMDSTA(mac->dma_txch), 0);
  719. write_dma_reg(mac, PAS_DMA_RXCHAN_CCMDSTA(mac->dma_rxch), 0);
  720. write_dma_reg(mac, PAS_DMA_RXINT_RCMDSTA(mac->dma_if), 0);
  721. free_irq(mac->tx_irq, dev);
  722. free_irq(mac->rx_irq, dev);
  723. /* Free resources */
  724. pasemi_mac_free_rx_resources(dev);
  725. pasemi_mac_free_tx_resources(dev);
  726. return 0;
  727. }
  728. static int pasemi_mac_start_tx(struct sk_buff *skb, struct net_device *dev)
  729. {
  730. struct pasemi_mac *mac = netdev_priv(dev);
  731. struct pasemi_mac_txring *txring;
  732. struct pasemi_mac_buffer *info;
  733. struct pas_dma_xct_descr *dp;
  734. u64 dflags;
  735. dma_addr_t map;
  736. int flags;
  737. dflags = XCT_MACTX_O | XCT_MACTX_ST | XCT_MACTX_SS | XCT_MACTX_CRC_PAD;
  738. if (skb->ip_summed == CHECKSUM_PARTIAL) {
  739. const unsigned char *nh = skb_network_header(skb);
  740. switch (ip_hdr(skb)->protocol) {
  741. case IPPROTO_TCP:
  742. dflags |= XCT_MACTX_CSUM_TCP;
  743. dflags |= XCT_MACTX_IPH(skb_network_header_len(skb) >> 2);
  744. dflags |= XCT_MACTX_IPO(nh - skb->data);
  745. break;
  746. case IPPROTO_UDP:
  747. dflags |= XCT_MACTX_CSUM_UDP;
  748. dflags |= XCT_MACTX_IPH(skb_network_header_len(skb) >> 2);
  749. dflags |= XCT_MACTX_IPO(nh - skb->data);
  750. break;
  751. }
  752. }
  753. map = pci_map_single(mac->dma_pdev, skb->data, skb->len, PCI_DMA_TODEVICE);
  754. if (dma_mapping_error(map))
  755. return NETDEV_TX_BUSY;
  756. txring = mac->tx;
  757. spin_lock_irqsave(&txring->lock, flags);
  758. if (txring->next_to_clean - txring->next_to_use == TX_RING_SIZE) {
  759. spin_unlock_irqrestore(&txring->lock, flags);
  760. pasemi_mac_clean_tx(mac);
  761. pasemi_mac_restart_tx_intr(mac);
  762. spin_lock_irqsave(&txring->lock, flags);
  763. if (txring->next_to_clean - txring->next_to_use ==
  764. TX_RING_SIZE) {
  765. /* Still no room -- stop the queue and wait for tx
  766. * intr when there's room.
  767. */
  768. netif_stop_queue(dev);
  769. goto out_err;
  770. }
  771. }
  772. dp = &TX_DESC(mac, txring->next_to_use);
  773. info = &TX_DESC_INFO(mac, txring->next_to_use);
  774. dp->mactx = dflags | XCT_MACTX_LLEN(skb->len);
  775. dp->ptr = XCT_PTR_LEN(skb->len) | XCT_PTR_ADDR(map);
  776. info->dma = map;
  777. info->skb = skb;
  778. txring->next_to_use++;
  779. mac->stats.tx_packets++;
  780. mac->stats.tx_bytes += skb->len;
  781. spin_unlock_irqrestore(&txring->lock, flags);
  782. write_dma_reg(mac, PAS_DMA_TXCHAN_INCR(mac->dma_txch), 1);
  783. return NETDEV_TX_OK;
  784. out_err:
  785. spin_unlock_irqrestore(&txring->lock, flags);
  786. pci_unmap_single(mac->dma_pdev, map, skb->len, PCI_DMA_TODEVICE);
  787. return NETDEV_TX_BUSY;
  788. }
  789. static struct net_device_stats *pasemi_mac_get_stats(struct net_device *dev)
  790. {
  791. struct pasemi_mac *mac = netdev_priv(dev);
  792. return &mac->stats;
  793. }
  794. static void pasemi_mac_set_rx_mode(struct net_device *dev)
  795. {
  796. struct pasemi_mac *mac = netdev_priv(dev);
  797. unsigned int flags;
  798. flags = read_mac_reg(mac, PAS_MAC_CFG_PCFG);
  799. /* Set promiscuous */
  800. if (dev->flags & IFF_PROMISC)
  801. flags |= PAS_MAC_CFG_PCFG_PR;
  802. else
  803. flags &= ~PAS_MAC_CFG_PCFG_PR;
  804. write_mac_reg(mac, PAS_MAC_CFG_PCFG, flags);
  805. }
  806. static int pasemi_mac_poll(struct napi_struct *napi, int budget)
  807. {
  808. struct pasemi_mac *mac = container_of(napi, struct pasemi_mac, napi);
  809. struct net_device *dev = mac->netdev;
  810. int pkts;
  811. pkts = pasemi_mac_clean_rx(mac, budget);
  812. if (pkts < budget) {
  813. /* all done, no more packets present */
  814. netif_rx_complete(dev, napi);
  815. pasemi_mac_restart_rx_intr(mac);
  816. }
  817. return pkts;
  818. }
  819. static void __iomem * __devinit map_onedev(struct pci_dev *p, int index)
  820. {
  821. struct device_node *dn;
  822. void __iomem *ret;
  823. dn = pci_device_to_OF_node(p);
  824. if (!dn)
  825. goto fallback;
  826. ret = of_iomap(dn, index);
  827. if (!ret)
  828. goto fallback;
  829. return ret;
  830. fallback:
  831. /* This is hardcoded and ugly, but we have some firmware versions
  832. * that don't provide the register space in the device tree. Luckily
  833. * they are at well-known locations so we can just do the math here.
  834. */
  835. return ioremap(0xe0000000 + (p->devfn << 12), 0x2000);
  836. }
  837. static int __devinit pasemi_mac_map_regs(struct pasemi_mac *mac)
  838. {
  839. struct resource res;
  840. struct device_node *dn;
  841. int err;
  842. mac->dma_pdev = pci_get_device(PCI_VENDOR_ID_PASEMI, 0xa007, NULL);
  843. if (!mac->dma_pdev) {
  844. dev_err(&mac->pdev->dev, "Can't find DMA Controller\n");
  845. return -ENODEV;
  846. }
  847. mac->iob_pdev = pci_get_device(PCI_VENDOR_ID_PASEMI, 0xa001, NULL);
  848. if (!mac->iob_pdev) {
  849. dev_err(&mac->pdev->dev, "Can't find I/O Bridge\n");
  850. return -ENODEV;
  851. }
  852. mac->regs = map_onedev(mac->pdev, 0);
  853. mac->dma_regs = map_onedev(mac->dma_pdev, 0);
  854. mac->iob_regs = map_onedev(mac->iob_pdev, 0);
  855. if (!mac->regs || !mac->dma_regs || !mac->iob_regs) {
  856. dev_err(&mac->pdev->dev, "Can't map registers\n");
  857. return -ENODEV;
  858. }
  859. /* The dma status structure is located in the I/O bridge, and
  860. * is cache coherent.
  861. */
  862. if (!dma_status) {
  863. dn = pci_device_to_OF_node(mac->iob_pdev);
  864. if (dn)
  865. err = of_address_to_resource(dn, 1, &res);
  866. if (!dn || err) {
  867. /* Fallback for old firmware */
  868. res.start = 0xfd800000;
  869. res.end = res.start + 0x1000;
  870. }
  871. dma_status = __ioremap(res.start, res.end-res.start, 0);
  872. }
  873. return 0;
  874. }
  875. static int __devinit
  876. pasemi_mac_probe(struct pci_dev *pdev, const struct pci_device_id *ent)
  877. {
  878. static int index = 0;
  879. struct net_device *dev;
  880. struct pasemi_mac *mac;
  881. int err;
  882. err = pci_enable_device(pdev);
  883. if (err)
  884. return err;
  885. dev = alloc_etherdev(sizeof(struct pasemi_mac));
  886. if (dev == NULL) {
  887. dev_err(&pdev->dev,
  888. "pasemi_mac: Could not allocate ethernet device.\n");
  889. err = -ENOMEM;
  890. goto out_disable_device;
  891. }
  892. SET_MODULE_OWNER(dev);
  893. pci_set_drvdata(pdev, dev);
  894. SET_NETDEV_DEV(dev, &pdev->dev);
  895. mac = netdev_priv(dev);
  896. mac->pdev = pdev;
  897. mac->netdev = dev;
  898. netif_napi_add(dev, &mac->napi, pasemi_mac_poll, 64);
  899. dev->features = NETIF_F_HW_CSUM;
  900. /* These should come out of the device tree eventually */
  901. mac->dma_txch = index;
  902. mac->dma_rxch = index;
  903. /* We probe GMAC before XAUI, but the DMA interfaces are
  904. * in XAUI, GMAC order.
  905. */
  906. if (index < 4)
  907. mac->dma_if = index + 2;
  908. else
  909. mac->dma_if = index - 4;
  910. index++;
  911. switch (pdev->device) {
  912. case 0xa005:
  913. mac->type = MAC_TYPE_GMAC;
  914. break;
  915. case 0xa006:
  916. mac->type = MAC_TYPE_XAUI;
  917. break;
  918. default:
  919. err = -ENODEV;
  920. goto out;
  921. }
  922. /* get mac addr from device tree */
  923. if (pasemi_get_mac_addr(mac) || !is_valid_ether_addr(mac->mac_addr)) {
  924. err = -ENODEV;
  925. goto out;
  926. }
  927. memcpy(dev->dev_addr, mac->mac_addr, sizeof(mac->mac_addr));
  928. dev->open = pasemi_mac_open;
  929. dev->stop = pasemi_mac_close;
  930. dev->hard_start_xmit = pasemi_mac_start_tx;
  931. dev->get_stats = pasemi_mac_get_stats;
  932. dev->set_multicast_list = pasemi_mac_set_rx_mode;
  933. err = pasemi_mac_map_regs(mac);
  934. if (err)
  935. goto out;
  936. mac->rx_status = &dma_status->rx_sta[mac->dma_rxch];
  937. mac->tx_status = &dma_status->tx_sta[mac->dma_txch];
  938. mac->msg_enable = netif_msg_init(debug, DEFAULT_MSG_ENABLE);
  939. /* Enable most messages by default */
  940. mac->msg_enable = (NETIF_MSG_IFUP << 1 ) - 1;
  941. err = register_netdev(dev);
  942. if (err) {
  943. dev_err(&mac->pdev->dev, "register_netdev failed with error %d\n",
  944. err);
  945. goto out;
  946. } else
  947. printk(KERN_INFO "%s: PA Semi %s: intf %d, txch %d, rxch %d, "
  948. "hw addr %02x:%02x:%02x:%02x:%02x:%02x\n",
  949. dev->name, mac->type == MAC_TYPE_GMAC ? "GMAC" : "XAUI",
  950. mac->dma_if, mac->dma_txch, mac->dma_rxch,
  951. dev->dev_addr[0], dev->dev_addr[1], dev->dev_addr[2],
  952. dev->dev_addr[3], dev->dev_addr[4], dev->dev_addr[5]);
  953. return err;
  954. out:
  955. if (mac->iob_pdev)
  956. pci_dev_put(mac->iob_pdev);
  957. if (mac->dma_pdev)
  958. pci_dev_put(mac->dma_pdev);
  959. if (mac->dma_regs)
  960. iounmap(mac->dma_regs);
  961. if (mac->iob_regs)
  962. iounmap(mac->iob_regs);
  963. if (mac->regs)
  964. iounmap(mac->regs);
  965. free_netdev(dev);
  966. out_disable_device:
  967. pci_disable_device(pdev);
  968. return err;
  969. }
  970. static void __devexit pasemi_mac_remove(struct pci_dev *pdev)
  971. {
  972. struct net_device *netdev = pci_get_drvdata(pdev);
  973. struct pasemi_mac *mac;
  974. if (!netdev)
  975. return;
  976. mac = netdev_priv(netdev);
  977. unregister_netdev(netdev);
  978. pci_disable_device(pdev);
  979. pci_dev_put(mac->dma_pdev);
  980. pci_dev_put(mac->iob_pdev);
  981. iounmap(mac->regs);
  982. iounmap(mac->dma_regs);
  983. iounmap(mac->iob_regs);
  984. pci_set_drvdata(pdev, NULL);
  985. free_netdev(netdev);
  986. }
  987. static struct pci_device_id pasemi_mac_pci_tbl[] = {
  988. { PCI_DEVICE(PCI_VENDOR_ID_PASEMI, 0xa005) },
  989. { PCI_DEVICE(PCI_VENDOR_ID_PASEMI, 0xa006) },
  990. { },
  991. };
  992. MODULE_DEVICE_TABLE(pci, pasemi_mac_pci_tbl);
  993. static struct pci_driver pasemi_mac_driver = {
  994. .name = "pasemi_mac",
  995. .id_table = pasemi_mac_pci_tbl,
  996. .probe = pasemi_mac_probe,
  997. .remove = __devexit_p(pasemi_mac_remove),
  998. };
  999. static void __exit pasemi_mac_cleanup_module(void)
  1000. {
  1001. pci_unregister_driver(&pasemi_mac_driver);
  1002. __iounmap(dma_status);
  1003. dma_status = NULL;
  1004. }
  1005. int pasemi_mac_init_module(void)
  1006. {
  1007. return pci_register_driver(&pasemi_mac_driver);
  1008. }
  1009. module_init(pasemi_mac_init_module);
  1010. module_exit(pasemi_mac_cleanup_module);