acpi_lpss.c 10 KB

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  1. /*
  2. * ACPI support for Intel Lynxpoint LPSS.
  3. *
  4. * Copyright (C) 2013, Intel Corporation
  5. * Authors: Mika Westerberg <mika.westerberg@linux.intel.com>
  6. * Rafael J. Wysocki <rafael.j.wysocki@intel.com>
  7. *
  8. * This program is free software; you can redistribute it and/or modify
  9. * it under the terms of the GNU General Public License version 2 as
  10. * published by the Free Software Foundation.
  11. */
  12. #include <linux/acpi.h>
  13. #include <linux/clk.h>
  14. #include <linux/clkdev.h>
  15. #include <linux/clk-provider.h>
  16. #include <linux/err.h>
  17. #include <linux/io.h>
  18. #include <linux/platform_device.h>
  19. #include <linux/platform_data/clk-lpss.h>
  20. #include <linux/pm_runtime.h>
  21. #include "internal.h"
  22. ACPI_MODULE_NAME("acpi_lpss");
  23. #define LPSS_CLK_SIZE 0x04
  24. #define LPSS_LTR_SIZE 0x18
  25. /* Offsets relative to LPSS_PRIVATE_OFFSET */
  26. #define LPSS_GENERAL 0x08
  27. #define LPSS_GENERAL_LTR_MODE_SW BIT(2)
  28. #define LPSS_SW_LTR 0x10
  29. #define LPSS_AUTO_LTR 0x14
  30. #define LPSS_TX_INT 0x20
  31. #define LPSS_TX_INT_MASK BIT(1)
  32. struct lpss_shared_clock {
  33. const char *name;
  34. unsigned long rate;
  35. struct clk *clk;
  36. };
  37. struct lpss_private_data;
  38. struct lpss_device_desc {
  39. bool clk_required;
  40. const char *clkdev_name;
  41. bool ltr_required;
  42. unsigned int prv_offset;
  43. size_t prv_size_override;
  44. bool clk_gate;
  45. struct lpss_shared_clock *shared_clock;
  46. void (*setup)(struct lpss_private_data *pdata);
  47. };
  48. static struct lpss_device_desc lpss_dma_desc = {
  49. .clk_required = true,
  50. .clkdev_name = "hclk",
  51. };
  52. struct lpss_private_data {
  53. void __iomem *mmio_base;
  54. resource_size_t mmio_size;
  55. struct clk *clk;
  56. const struct lpss_device_desc *dev_desc;
  57. };
  58. static void lpss_uart_setup(struct lpss_private_data *pdata)
  59. {
  60. unsigned int tx_int_offset = pdata->dev_desc->prv_offset + LPSS_TX_INT;
  61. u32 reg;
  62. reg = readl(pdata->mmio_base + tx_int_offset);
  63. writel(reg | LPSS_TX_INT_MASK, pdata->mmio_base + tx_int_offset);
  64. }
  65. static struct lpss_device_desc lpt_dev_desc = {
  66. .clk_required = true,
  67. .prv_offset = 0x800,
  68. .ltr_required = true,
  69. .clk_gate = true,
  70. };
  71. static struct lpss_device_desc lpt_uart_dev_desc = {
  72. .clk_required = true,
  73. .prv_offset = 0x800,
  74. .ltr_required = true,
  75. .clk_gate = true,
  76. .setup = lpss_uart_setup,
  77. };
  78. static struct lpss_device_desc lpt_sdio_dev_desc = {
  79. .prv_offset = 0x1000,
  80. .prv_size_override = 0x1018,
  81. .ltr_required = true,
  82. };
  83. static struct lpss_shared_clock uart_clock = {
  84. .name = "uart_clk",
  85. .rate = 44236800,
  86. };
  87. static struct lpss_device_desc byt_uart_dev_desc = {
  88. .clk_required = true,
  89. .prv_offset = 0x800,
  90. .clk_gate = true,
  91. .shared_clock = &uart_clock,
  92. .setup = lpss_uart_setup,
  93. };
  94. static struct lpss_shared_clock spi_clock = {
  95. .name = "spi_clk",
  96. .rate = 50000000,
  97. };
  98. static struct lpss_device_desc byt_spi_dev_desc = {
  99. .clk_required = true,
  100. .prv_offset = 0x400,
  101. .clk_gate = true,
  102. .shared_clock = &spi_clock,
  103. };
  104. static struct lpss_device_desc byt_sdio_dev_desc = {
  105. .clk_required = true,
  106. };
  107. static struct lpss_shared_clock i2c_clock = {
  108. .name = "i2c_clk",
  109. .rate = 100000000,
  110. };
  111. static struct lpss_device_desc byt_i2c_dev_desc = {
  112. .clk_required = true,
  113. .prv_offset = 0x800,
  114. .shared_clock = &i2c_clock,
  115. };
  116. static const struct acpi_device_id acpi_lpss_device_ids[] = {
  117. /* Generic LPSS devices */
  118. { "INTL9C60", (unsigned long)&lpss_dma_desc },
  119. /* Lynxpoint LPSS devices */
  120. { "INT33C0", (unsigned long)&lpt_dev_desc },
  121. { "INT33C1", (unsigned long)&lpt_dev_desc },
  122. { "INT33C2", (unsigned long)&lpt_dev_desc },
  123. { "INT33C3", (unsigned long)&lpt_dev_desc },
  124. { "INT33C4", (unsigned long)&lpt_uart_dev_desc },
  125. { "INT33C5", (unsigned long)&lpt_uart_dev_desc },
  126. { "INT33C6", (unsigned long)&lpt_sdio_dev_desc },
  127. { "INT33C7", },
  128. /* BayTrail LPSS devices */
  129. { "80860F0A", (unsigned long)&byt_uart_dev_desc },
  130. { "80860F0E", (unsigned long)&byt_spi_dev_desc },
  131. { "80860F14", (unsigned long)&byt_sdio_dev_desc },
  132. { "80860F41", (unsigned long)&byt_i2c_dev_desc },
  133. { "INT33B2", },
  134. { }
  135. };
  136. static int is_memory(struct acpi_resource *res, void *not_used)
  137. {
  138. struct resource r;
  139. return !acpi_dev_resource_memory(res, &r);
  140. }
  141. /* LPSS main clock device. */
  142. static struct platform_device *lpss_clk_dev;
  143. static inline void lpt_register_clock_device(void)
  144. {
  145. lpss_clk_dev = platform_device_register_simple("clk-lpt", -1, NULL, 0);
  146. }
  147. static int register_device_clock(struct acpi_device *adev,
  148. struct lpss_private_data *pdata)
  149. {
  150. const struct lpss_device_desc *dev_desc = pdata->dev_desc;
  151. struct lpss_shared_clock *shared_clock = dev_desc->shared_clock;
  152. struct clk *clk = ERR_PTR(-ENODEV);
  153. struct lpss_clk_data *clk_data;
  154. const char *parent;
  155. if (!lpss_clk_dev)
  156. lpt_register_clock_device();
  157. clk_data = platform_get_drvdata(lpss_clk_dev);
  158. if (!clk_data)
  159. return -ENODEV;
  160. if (dev_desc->clkdev_name) {
  161. clk_register_clkdev(clk_data->clk, dev_desc->clkdev_name,
  162. dev_name(&adev->dev));
  163. return 0;
  164. }
  165. if (!pdata->mmio_base
  166. || pdata->mmio_size < dev_desc->prv_offset + LPSS_CLK_SIZE)
  167. return -ENODATA;
  168. parent = clk_data->name;
  169. if (shared_clock) {
  170. clk = shared_clock->clk;
  171. if (!clk) {
  172. clk = clk_register_fixed_rate(NULL, shared_clock->name,
  173. "lpss_clk", 0,
  174. shared_clock->rate);
  175. shared_clock->clk = clk;
  176. }
  177. parent = shared_clock->name;
  178. }
  179. if (dev_desc->clk_gate) {
  180. clk = clk_register_gate(NULL, dev_name(&adev->dev), parent, 0,
  181. pdata->mmio_base + dev_desc->prv_offset,
  182. 0, 0, NULL);
  183. pdata->clk = clk;
  184. }
  185. if (IS_ERR(clk))
  186. return PTR_ERR(clk);
  187. clk_register_clkdev(clk, NULL, dev_name(&adev->dev));
  188. return 0;
  189. }
  190. static int acpi_lpss_create_device(struct acpi_device *adev,
  191. const struct acpi_device_id *id)
  192. {
  193. struct lpss_device_desc *dev_desc;
  194. struct lpss_private_data *pdata;
  195. struct resource_list_entry *rentry;
  196. struct list_head resource_list;
  197. int ret;
  198. dev_desc = (struct lpss_device_desc *)id->driver_data;
  199. if (!dev_desc)
  200. return acpi_create_platform_device(adev, id);
  201. pdata = kzalloc(sizeof(*pdata), GFP_KERNEL);
  202. if (!pdata)
  203. return -ENOMEM;
  204. INIT_LIST_HEAD(&resource_list);
  205. ret = acpi_dev_get_resources(adev, &resource_list, is_memory, NULL);
  206. if (ret < 0)
  207. goto err_out;
  208. list_for_each_entry(rentry, &resource_list, node)
  209. if (resource_type(&rentry->res) == IORESOURCE_MEM) {
  210. if (dev_desc->prv_size_override)
  211. pdata->mmio_size = dev_desc->prv_size_override;
  212. else
  213. pdata->mmio_size = resource_size(&rentry->res);
  214. pdata->mmio_base = ioremap(rentry->res.start,
  215. pdata->mmio_size);
  216. break;
  217. }
  218. acpi_dev_free_resource_list(&resource_list);
  219. pdata->dev_desc = dev_desc;
  220. if (dev_desc->clk_required) {
  221. ret = register_device_clock(adev, pdata);
  222. if (ret) {
  223. /* Skip the device, but continue the namespace scan. */
  224. ret = 0;
  225. goto err_out;
  226. }
  227. }
  228. /*
  229. * This works around a known issue in ACPI tables where LPSS devices
  230. * have _PS0 and _PS3 without _PSC (and no power resources), so
  231. * acpi_bus_init_power() will assume that the BIOS has put them into D0.
  232. */
  233. ret = acpi_device_fix_up_power(adev);
  234. if (ret) {
  235. /* Skip the device, but continue the namespace scan. */
  236. ret = 0;
  237. goto err_out;
  238. }
  239. if (dev_desc->setup)
  240. dev_desc->setup(pdata);
  241. adev->driver_data = pdata;
  242. ret = acpi_create_platform_device(adev, id);
  243. if (ret > 0)
  244. return ret;
  245. adev->driver_data = NULL;
  246. err_out:
  247. kfree(pdata);
  248. return ret;
  249. }
  250. static int lpss_reg_read(struct device *dev, unsigned int reg, u32 *val)
  251. {
  252. struct acpi_device *adev;
  253. struct lpss_private_data *pdata;
  254. unsigned long flags;
  255. int ret;
  256. ret = acpi_bus_get_device(ACPI_HANDLE(dev), &adev);
  257. if (WARN_ON(ret))
  258. return ret;
  259. spin_lock_irqsave(&dev->power.lock, flags);
  260. if (pm_runtime_suspended(dev)) {
  261. ret = -EAGAIN;
  262. goto out;
  263. }
  264. pdata = acpi_driver_data(adev);
  265. if (WARN_ON(!pdata || !pdata->mmio_base)) {
  266. ret = -ENODEV;
  267. goto out;
  268. }
  269. *val = readl(pdata->mmio_base + pdata->dev_desc->prv_offset + reg);
  270. out:
  271. spin_unlock_irqrestore(&dev->power.lock, flags);
  272. return ret;
  273. }
  274. static ssize_t lpss_ltr_show(struct device *dev, struct device_attribute *attr,
  275. char *buf)
  276. {
  277. u32 ltr_value = 0;
  278. unsigned int reg;
  279. int ret;
  280. reg = strcmp(attr->attr.name, "auto_ltr") ? LPSS_SW_LTR : LPSS_AUTO_LTR;
  281. ret = lpss_reg_read(dev, reg, &ltr_value);
  282. if (ret)
  283. return ret;
  284. return snprintf(buf, PAGE_SIZE, "%08x\n", ltr_value);
  285. }
  286. static ssize_t lpss_ltr_mode_show(struct device *dev,
  287. struct device_attribute *attr, char *buf)
  288. {
  289. u32 ltr_mode = 0;
  290. char *outstr;
  291. int ret;
  292. ret = lpss_reg_read(dev, LPSS_GENERAL, &ltr_mode);
  293. if (ret)
  294. return ret;
  295. outstr = (ltr_mode & LPSS_GENERAL_LTR_MODE_SW) ? "sw" : "auto";
  296. return sprintf(buf, "%s\n", outstr);
  297. }
  298. static DEVICE_ATTR(auto_ltr, S_IRUSR, lpss_ltr_show, NULL);
  299. static DEVICE_ATTR(sw_ltr, S_IRUSR, lpss_ltr_show, NULL);
  300. static DEVICE_ATTR(ltr_mode, S_IRUSR, lpss_ltr_mode_show, NULL);
  301. static struct attribute *lpss_attrs[] = {
  302. &dev_attr_auto_ltr.attr,
  303. &dev_attr_sw_ltr.attr,
  304. &dev_attr_ltr_mode.attr,
  305. NULL,
  306. };
  307. static struct attribute_group lpss_attr_group = {
  308. .attrs = lpss_attrs,
  309. .name = "lpss_ltr",
  310. };
  311. static int acpi_lpss_platform_notify(struct notifier_block *nb,
  312. unsigned long action, void *data)
  313. {
  314. struct platform_device *pdev = to_platform_device(data);
  315. struct lpss_private_data *pdata;
  316. struct acpi_device *adev;
  317. const struct acpi_device_id *id;
  318. int ret = 0;
  319. id = acpi_match_device(acpi_lpss_device_ids, &pdev->dev);
  320. if (!id || !id->driver_data)
  321. return 0;
  322. if (acpi_bus_get_device(ACPI_HANDLE(&pdev->dev), &adev))
  323. return 0;
  324. pdata = acpi_driver_data(adev);
  325. if (!pdata || !pdata->mmio_base || !pdata->dev_desc->ltr_required)
  326. return 0;
  327. if (pdata->mmio_size < pdata->dev_desc->prv_offset + LPSS_LTR_SIZE) {
  328. dev_err(&pdev->dev, "MMIO size insufficient to access LTR\n");
  329. return 0;
  330. }
  331. if (action == BUS_NOTIFY_ADD_DEVICE)
  332. ret = sysfs_create_group(&pdev->dev.kobj, &lpss_attr_group);
  333. else if (action == BUS_NOTIFY_DEL_DEVICE)
  334. sysfs_remove_group(&pdev->dev.kobj, &lpss_attr_group);
  335. return ret;
  336. }
  337. static struct notifier_block acpi_lpss_nb = {
  338. .notifier_call = acpi_lpss_platform_notify,
  339. };
  340. static struct acpi_scan_handler lpss_handler = {
  341. .ids = acpi_lpss_device_ids,
  342. .attach = acpi_lpss_create_device,
  343. };
  344. void __init acpi_lpss_init(void)
  345. {
  346. if (!lpt_clk_init()) {
  347. bus_register_notifier(&platform_bus_type, &acpi_lpss_nb);
  348. acpi_scan_add_handler(&lpss_handler);
  349. }
  350. }