db8500.dtsi 6.4 KB

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  1. /*
  2. * Copyright 2012 Linaro Ltd
  3. *
  4. * The code contained herein is licensed under the GNU General Public
  5. * License. You may obtain a copy of the GNU General Public License
  6. * Version 2 or later at the following locations:
  7. *
  8. * http://www.opensource.org/licenses/gpl-license.html
  9. * http://www.gnu.org/copyleft/gpl.html
  10. */
  11. /include/ "skeleton.dtsi"
  12. / {
  13. soc-u9500 {
  14. #address-cells = <1>;
  15. #size-cells = <1>;
  16. compatible = "stericsson,db8500";
  17. interrupt-parent = <&intc>;
  18. ranges;
  19. intc: interrupt-controller@a0411000 {
  20. compatible = "arm,cortex-a9-gic";
  21. #interrupt-cells = <3>;
  22. #address-cells = <1>;
  23. interrupt-controller;
  24. reg = <0xa0411000 0x1000>,
  25. <0xa0410100 0x100>;
  26. };
  27. L2: l2-cache {
  28. compatible = "arm,pl310-cache";
  29. reg = <0xa0412000 0x1000>;
  30. interrupts = <0 13 4>;
  31. cache-unified;
  32. cache-level = <2>;
  33. };
  34. pmu {
  35. compatible = "arm,cortex-a9-pmu";
  36. interrupts = <0 7 0x4>;
  37. };
  38. timer@a0410600 {
  39. compatible = "arm,cortex-a9-twd-timer";
  40. reg = <0xa0410600 0x20>;
  41. interrupts = <1 13 0x304>;
  42. };
  43. rtc@80154000 {
  44. compatible = "stericsson,db8500-rtc";
  45. reg = <0x80154000 0x1000>;
  46. interrupts = <0 18 0x4>;
  47. };
  48. gpio0: gpio@8012e000 {
  49. compatible = "stericsson,db8500-gpio",
  50. "st,nomadik-gpio";
  51. reg = <0x8012e000 0x80>;
  52. interrupts = <0 119 0x4>;
  53. supports-sleepmode;
  54. gpio-controller;
  55. #gpio-cells = <2>;
  56. gpio-bank = <0>;
  57. };
  58. gpio1: gpio@8012e080 {
  59. compatible = "stericsson,db8500-gpio",
  60. "st,nomadik-gpio";
  61. reg = <0x8012e080 0x80>;
  62. interrupts = <0 120 0x4>;
  63. supports-sleepmode;
  64. gpio-controller;
  65. #gpio-cells = <2>;
  66. gpio-bank = <1>;
  67. };
  68. gpio2: gpio@8000e000 {
  69. compatible = "stericsson,db8500-gpio",
  70. "st,nomadik-gpio";
  71. reg = <0x8000e000 0x80>;
  72. interrupts = <0 121 0x4>;
  73. supports-sleepmode;
  74. gpio-controller;
  75. #gpio-cells = <2>;
  76. gpio-bank = <2>;
  77. };
  78. gpio3: gpio@8000e080 {
  79. compatible = "stericsson,db8500-gpio",
  80. "st,nomadik-gpio";
  81. reg = <0x8000e080 0x80>;
  82. interrupts = <0 122 0x4>;
  83. supports-sleepmode;
  84. gpio-controller;
  85. #gpio-cells = <2>;
  86. gpio-bank = <3>;
  87. };
  88. gpio4: gpio@8000e100 {
  89. compatible = "stericsson,db8500-gpio",
  90. "st,nomadik-gpio";
  91. reg = <0x8000e100 0x80>;
  92. interrupts = <0 123 0x4>;
  93. supports-sleepmode;
  94. gpio-controller;
  95. #gpio-cells = <2>;
  96. gpio-bank = <4>;
  97. };
  98. gpio5: gpio@8000e180 {
  99. compatible = "stericsson,db8500-gpio",
  100. "st,nomadik-gpio";
  101. reg = <0x8000e180 0x80>;
  102. interrupts = <0 124 0x4>;
  103. supports-sleepmode;
  104. gpio-controller;
  105. #gpio-cells = <2>;
  106. gpio-bank = <5>;
  107. };
  108. gpio6: gpio@8011e000 {
  109. compatible = "stericsson,db8500-gpio",
  110. "st,nomadik-gpio";
  111. reg = <0x8011e000 0x80>;
  112. interrupts = <0 125 0x4>;
  113. supports-sleepmode;
  114. gpio-controller;
  115. #gpio-cells = <2>;
  116. gpio-bank = <6>;
  117. };
  118. gpio7: gpio@8011e080 {
  119. compatible = "stericsson,db8500-gpio",
  120. "st,nomadik-gpio";
  121. reg = <0x8011e080 0x80>;
  122. interrupts = <0 126 0x4>;
  123. supports-sleepmode;
  124. gpio-controller;
  125. #gpio-cells = <2>;
  126. gpio-bank = <7>;
  127. };
  128. gpio8: gpio@a03fe000 {
  129. compatible = "stericsson,db8500-gpio",
  130. "st,nomadik-gpio";
  131. reg = <0xa03fe000 0x80>;
  132. interrupts = <0 127 0x4>;
  133. supports-sleepmode;
  134. gpio-controller;
  135. #gpio-cells = <2>;
  136. gpio-bank = <8>;
  137. };
  138. usb@a03e0000 {
  139. compatible = "stericsson,db8500-musb",
  140. "mentor,musb";
  141. reg = <0xa03e0000 0x10000>;
  142. interrupts = <0 23 0x4>;
  143. };
  144. dma-controller@801C0000 {
  145. compatible = "stericsson,db8500-dma40",
  146. "stericsson,dma40";
  147. reg = <0x801C0000 0x1000 0x40010000 0x800>;
  148. interrupts = <0 25 0x4>;
  149. };
  150. prcmu@80157000 {
  151. compatible = "stericsson,db8500-prcmu";
  152. reg = <0x80157000 0x1000>;
  153. interrupts = <46 47>;
  154. #address-cells = <1>;
  155. #size-cells = <0>;
  156. ab8500@5 {
  157. compatible = "stericsson,ab8500";
  158. reg = <5>; /* mailbox 5 is i2c */
  159. interrupts = <0 40 0x4>;
  160. };
  161. };
  162. i2c@80004000 {
  163. compatible = "stericsson,db8500-i2c", "st,nomadik-i2c";
  164. reg = <0x80004000 0x1000>;
  165. interrupts = <0 21 0x4>;
  166. #address-cells = <1>;
  167. #size-cells = <0>;
  168. };
  169. i2c@80122000 {
  170. compatible = "stericsson,db8500-i2c", "st,nomadik-i2c";
  171. reg = <0x80122000 0x1000>;
  172. interrupts = <0 22 0x4>;
  173. #address-cells = <1>;
  174. #size-cells = <0>;
  175. };
  176. i2c@80128000 {
  177. compatible = "stericsson,db8500-i2c", "st,nomadik-i2c";
  178. reg = <0x80128000 0x1000>;
  179. interrupts = <0 55 0x4>;
  180. #address-cells = <1>;
  181. #size-cells = <0>;
  182. };
  183. i2c@80110000 {
  184. compatible = "stericsson,db8500-i2c", "st,nomadik-i2c";
  185. reg = <0x80110000 0x1000>;
  186. interrupts = <0 12 0x4>;
  187. #address-cells = <1>;
  188. #size-cells = <0>;
  189. };
  190. i2c@8012a000 {
  191. compatible = "stericsson,db8500-i2c", "st,nomadik-i2c";
  192. reg = <0x8012a000 0x1000>;
  193. interrupts = <0 51 0x4>;
  194. #address-cells = <1>;
  195. #size-cells = <0>;
  196. };
  197. ssp@80002000 {
  198. compatible = "arm,pl022", "arm,primecell";
  199. reg = <80002000 0x1000>;
  200. interrupts = <0 14 0x4>;
  201. #address-cells = <1>;
  202. #size-cells = <0>;
  203. status = "disabled";
  204. // Add one of these for each child device
  205. cs-gpios = <&gpio0 31 &gpio4 14 &gpio4 16 &gpio6 22 &gpio7 0>;
  206. };
  207. uart@80120000 {
  208. compatible = "arm,pl011", "arm,primecell";
  209. reg = <0x80120000 0x1000>;
  210. interrupts = <0 11 0x4>;
  211. status = "disabled";
  212. };
  213. uart@80121000 {
  214. compatible = "arm,pl011", "arm,primecell";
  215. reg = <0x80121000 0x1000>;
  216. interrupts = <0 19 0x4>;
  217. status = "disabled";
  218. };
  219. uart@80007000 {
  220. compatible = "arm,pl011", "arm,primecell";
  221. reg = <0x80007000 0x1000>;
  222. interrupts = <0 26 0x4>;
  223. status = "disabled";
  224. };
  225. sdi@80126000 {
  226. compatible = "arm,pl18x", "arm,primecell";
  227. reg = <0x80126000 0x1000>;
  228. interrupts = <0 60 0x4>;
  229. status = "disabled";
  230. };
  231. sdi@80118000 {
  232. compatible = "arm,pl18x", "arm,primecell";
  233. reg = <0x80118000 0x1000>;
  234. interrupts = <0 50 0x4>;
  235. status = "disabled";
  236. };
  237. sdi@80005000 {
  238. compatible = "arm,pl18x", "arm,primecell";
  239. reg = <0x80005000 0x1000>;
  240. interrupts = <0 41 0x4>;
  241. status = "disabled";
  242. };
  243. sdi@80119000 {
  244. compatible = "arm,pl18x", "arm,primecell";
  245. reg = <0x80119000 0x1000>;
  246. interrupts = <0 59 0x4>;
  247. status = "disabled";
  248. };
  249. sdi@80114000 {
  250. compatible = "arm,pl18x", "arm,primecell";
  251. reg = <0x80114000 0x1000>;
  252. interrupts = <0 99 0x4>;
  253. status = "disabled";
  254. };
  255. sdi@80008000 {
  256. compatible = "arm,pl18x", "arm,primecell";
  257. reg = <0x80114000 0x1000>;
  258. interrupts = <0 100 0x4>;
  259. status = "disabled";
  260. };
  261. };
  262. };