iwl3945-base.c 204 KB

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  1. /******************************************************************************
  2. *
  3. * Copyright(c) 2003 - 2009 Intel Corporation. All rights reserved.
  4. *
  5. * Portions of this file are derived from the ipw3945 project, as well
  6. * as portions of the ieee80211 subsystem header files.
  7. *
  8. * This program is free software; you can redistribute it and/or modify it
  9. * under the terms of version 2 of the GNU General Public License as
  10. * published by the Free Software Foundation.
  11. *
  12. * This program is distributed in the hope that it will be useful, but WITHOUT
  13. * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
  14. * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for
  15. * more details.
  16. *
  17. * You should have received a copy of the GNU General Public License along with
  18. * this program; if not, write to the Free Software Foundation, Inc.,
  19. * 51 Franklin Street, Fifth Floor, Boston, MA 02110, USA
  20. *
  21. * The full GNU General Public License is included in this distribution in the
  22. * file called LICENSE.
  23. *
  24. * Contact Information:
  25. * Intel Linux Wireless <ilw@linux.intel.com>
  26. * Intel Corporation, 5200 N.E. Elam Young Parkway, Hillsboro, OR 97124-6497
  27. *
  28. *****************************************************************************/
  29. #include <linux/kernel.h>
  30. #include <linux/module.h>
  31. #include <linux/init.h>
  32. #include <linux/pci.h>
  33. #include <linux/dma-mapping.h>
  34. #include <linux/delay.h>
  35. #include <linux/skbuff.h>
  36. #include <linux/netdevice.h>
  37. #include <linux/wireless.h>
  38. #include <linux/firmware.h>
  39. #include <linux/etherdevice.h>
  40. #include <linux/if_arp.h>
  41. #include <net/ieee80211_radiotap.h>
  42. #include <net/lib80211.h>
  43. #include <net/mac80211.h>
  44. #include <asm/div64.h>
  45. #define DRV_NAME "iwl3945"
  46. #include "iwl-fh.h"
  47. #include "iwl-3945-fh.h"
  48. #include "iwl-commands.h"
  49. #include "iwl-3945.h"
  50. #include "iwl-helpers.h"
  51. #include "iwl-core.h"
  52. #include "iwl-dev.h"
  53. /*
  54. * module name, copyright, version, etc.
  55. */
  56. #define DRV_DESCRIPTION \
  57. "Intel(R) PRO/Wireless 3945ABG/BG Network Connection driver for Linux"
  58. #ifdef CONFIG_IWL3945_DEBUG
  59. #define VD "d"
  60. #else
  61. #define VD
  62. #endif
  63. #ifdef CONFIG_IWL3945_SPECTRUM_MEASUREMENT
  64. #define VS "s"
  65. #else
  66. #define VS
  67. #endif
  68. #define IWL39_VERSION "1.2.26k" VD VS
  69. #define DRV_COPYRIGHT "Copyright(c) 2003-2009 Intel Corporation"
  70. #define DRV_AUTHOR "<ilw@linux.intel.com>"
  71. #define DRV_VERSION IWL39_VERSION
  72. MODULE_DESCRIPTION(DRV_DESCRIPTION);
  73. MODULE_VERSION(DRV_VERSION);
  74. MODULE_AUTHOR(DRV_COPYRIGHT " " DRV_AUTHOR);
  75. MODULE_LICENSE("GPL");
  76. /* module parameters */
  77. struct iwl_mod_params iwl3945_mod_params = {
  78. .num_of_queues = IWL39_MAX_NUM_QUEUES,
  79. .sw_crypto = 1,
  80. /* the rest are 0 by default */
  81. };
  82. /*************** DMA-QUEUE-GENERAL-FUNCTIONS *****
  83. * DMA services
  84. *
  85. * Theory of operation
  86. *
  87. * A Tx or Rx queue resides in host DRAM, and is comprised of a circular buffer
  88. * of buffer descriptors, each of which points to one or more data buffers for
  89. * the device to read from or fill. Driver and device exchange status of each
  90. * queue via "read" and "write" pointers. Driver keeps minimum of 2 empty
  91. * entries in each circular buffer, to protect against confusing empty and full
  92. * queue states.
  93. *
  94. * The device reads or writes the data in the queues via the device's several
  95. * DMA/FIFO channels. Each queue is mapped to a single DMA channel.
  96. *
  97. * For Tx queue, there are low mark and high mark limits. If, after queuing
  98. * the packet for Tx, free space become < low mark, Tx queue stopped. When
  99. * reclaiming packets (on 'tx done IRQ), if free space become > high mark,
  100. * Tx queue resumed.
  101. *
  102. * The 3945 operates with six queues: One receive queue, one transmit queue
  103. * (#4) for sending commands to the device firmware, and four transmit queues
  104. * (#0-3) for data tx via EDCA. An additional 2 HCCA queues are unused.
  105. ***************************************************/
  106. /**
  107. * iwl3945_queue_init - Initialize queue's high/low-water and read/write indexes
  108. */
  109. static int iwl3945_queue_init(struct iwl_priv *priv, struct iwl_queue *q,
  110. int count, int slots_num, u32 id)
  111. {
  112. q->n_bd = count;
  113. q->n_window = slots_num;
  114. q->id = id;
  115. /* count must be power-of-two size, otherwise iwl_queue_inc_wrap
  116. * and iwl_queue_dec_wrap are broken. */
  117. BUG_ON(!is_power_of_2(count));
  118. /* slots_num must be power-of-two size, otherwise
  119. * get_cmd_index is broken. */
  120. BUG_ON(!is_power_of_2(slots_num));
  121. q->low_mark = q->n_window / 4;
  122. if (q->low_mark < 4)
  123. q->low_mark = 4;
  124. q->high_mark = q->n_window / 8;
  125. if (q->high_mark < 2)
  126. q->high_mark = 2;
  127. q->write_ptr = q->read_ptr = 0;
  128. return 0;
  129. }
  130. /**
  131. * iwl3945_tx_queue_alloc - Alloc driver data and TFD CB for one Tx/cmd queue
  132. */
  133. static int iwl3945_tx_queue_alloc(struct iwl_priv *priv,
  134. struct iwl_tx_queue *txq, u32 id)
  135. {
  136. struct pci_dev *dev = priv->pci_dev;
  137. /* Driver private data, only for Tx (not command) queues,
  138. * not shared with device. */
  139. if (id != IWL_CMD_QUEUE_NUM) {
  140. txq->txb = kmalloc(sizeof(txq->txb[0]) *
  141. TFD_QUEUE_SIZE_MAX, GFP_KERNEL);
  142. if (!txq->txb) {
  143. IWL_ERR(priv, "kmalloc for auxiliary BD "
  144. "structures failed\n");
  145. goto error;
  146. }
  147. } else
  148. txq->txb = NULL;
  149. /* Circular buffer of transmit frame descriptors (TFDs),
  150. * shared with device */
  151. txq->tfds39 = pci_alloc_consistent(dev,
  152. sizeof(txq->tfds39[0]) * TFD_QUEUE_SIZE_MAX,
  153. &txq->q.dma_addr);
  154. if (!txq->tfds39) {
  155. IWL_ERR(priv, "pci_alloc_consistent(%zd) failed\n",
  156. sizeof(txq->tfds39[0]) * TFD_QUEUE_SIZE_MAX);
  157. goto error;
  158. }
  159. txq->q.id = id;
  160. return 0;
  161. error:
  162. kfree(txq->txb);
  163. txq->txb = NULL;
  164. return -ENOMEM;
  165. }
  166. /**
  167. * iwl3945_tx_queue_init - Allocate and initialize one tx/cmd queue
  168. */
  169. int iwl3945_tx_queue_init(struct iwl_priv *priv,
  170. struct iwl_tx_queue *txq, int slots_num, u32 txq_id)
  171. {
  172. int len, i;
  173. int rc = 0;
  174. /*
  175. * Alloc buffer array for commands (Tx or other types of commands).
  176. * For the command queue (#4), allocate command space + one big
  177. * command for scan, since scan command is very huge; the system will
  178. * not have two scans at the same time, so only one is needed.
  179. * For data Tx queues (all other queues), no super-size command
  180. * space is needed.
  181. */
  182. len = sizeof(struct iwl_cmd);
  183. for (i = 0; i <= slots_num; i++) {
  184. if (i == slots_num) {
  185. if (txq_id == IWL_CMD_QUEUE_NUM)
  186. len += IWL_MAX_SCAN_SIZE;
  187. else
  188. continue;
  189. }
  190. txq->cmd[i] = kmalloc(len, GFP_KERNEL);
  191. if (!txq->cmd[i])
  192. goto err;
  193. }
  194. /* Alloc driver data array and TFD circular buffer */
  195. rc = iwl3945_tx_queue_alloc(priv, txq, txq_id);
  196. if (rc)
  197. goto err;
  198. txq->need_update = 0;
  199. /* TFD_QUEUE_SIZE_MAX must be power-of-two size, otherwise
  200. * iwl_queue_inc_wrap and iwl_queue_dec_wrap are broken. */
  201. BUILD_BUG_ON(TFD_QUEUE_SIZE_MAX & (TFD_QUEUE_SIZE_MAX - 1));
  202. /* Initialize queue high/low-water, head/tail indexes */
  203. iwl3945_queue_init(priv, &txq->q, TFD_QUEUE_SIZE_MAX, slots_num, txq_id);
  204. /* Tell device where to find queue, enable DMA channel. */
  205. iwl3945_hw_tx_queue_init(priv, txq);
  206. return 0;
  207. err:
  208. for (i = 0; i < slots_num; i++) {
  209. kfree(txq->cmd[i]);
  210. txq->cmd[i] = NULL;
  211. }
  212. if (txq_id == IWL_CMD_QUEUE_NUM) {
  213. kfree(txq->cmd[slots_num]);
  214. txq->cmd[slots_num] = NULL;
  215. }
  216. return -ENOMEM;
  217. }
  218. /**
  219. * iwl3945_tx_queue_free - Deallocate DMA queue.
  220. * @txq: Transmit queue to deallocate.
  221. *
  222. * Empty queue by removing and destroying all BD's.
  223. * Free all buffers.
  224. * 0-fill, but do not free "txq" descriptor structure.
  225. */
  226. void iwl3945_tx_queue_free(struct iwl_priv *priv, struct iwl_tx_queue *txq)
  227. {
  228. struct iwl_queue *q = &txq->q;
  229. struct pci_dev *dev = priv->pci_dev;
  230. int len, i;
  231. if (q->n_bd == 0)
  232. return;
  233. /* first, empty all BD's */
  234. for (; q->write_ptr != q->read_ptr;
  235. q->read_ptr = iwl_queue_inc_wrap(q->read_ptr, q->n_bd))
  236. priv->cfg->ops->lib->txq_free_tfd(priv, txq);
  237. len = sizeof(struct iwl_cmd) * q->n_window;
  238. if (q->id == IWL_CMD_QUEUE_NUM)
  239. len += IWL_MAX_SCAN_SIZE;
  240. /* De-alloc array of command/tx buffers */
  241. for (i = 0; i < TFD_TX_CMD_SLOTS; i++)
  242. kfree(txq->cmd[i]);
  243. /* De-alloc circular buffer of TFDs */
  244. if (txq->q.n_bd)
  245. pci_free_consistent(dev, sizeof(struct iwl3945_tfd) *
  246. txq->q.n_bd, txq->tfds39, txq->q.dma_addr);
  247. /* De-alloc array of per-TFD driver data */
  248. kfree(txq->txb);
  249. txq->txb = NULL;
  250. /* 0-fill queue descriptor structure */
  251. memset(txq, 0, sizeof(*txq));
  252. }
  253. /*************** STATION TABLE MANAGEMENT ****
  254. * mac80211 should be examined to determine if sta_info is duplicating
  255. * the functionality provided here
  256. */
  257. /**************************************************************/
  258. #if 0 /* temporary disable till we add real remove station */
  259. /**
  260. * iwl3945_remove_station - Remove driver's knowledge of station.
  261. *
  262. * NOTE: This does not remove station from device's station table.
  263. */
  264. static u8 iwl3945_remove_station(struct iwl_priv *priv, const u8 *addr, int is_ap)
  265. {
  266. int index = IWL_INVALID_STATION;
  267. int i;
  268. unsigned long flags;
  269. spin_lock_irqsave(&priv->sta_lock, flags);
  270. if (is_ap)
  271. index = IWL_AP_ID;
  272. else if (is_broadcast_ether_addr(addr))
  273. index = priv->hw_params.bcast_sta_id;
  274. else
  275. for (i = IWL_STA_ID; i < priv->hw_params.max_stations; i++)
  276. if (priv->stations_39[i].used &&
  277. !compare_ether_addr(priv->stations_39[i].sta.sta.addr,
  278. addr)) {
  279. index = i;
  280. break;
  281. }
  282. if (unlikely(index == IWL_INVALID_STATION))
  283. goto out;
  284. if (priv->stations_39[index].used) {
  285. priv->stations_39[index].used = 0;
  286. priv->num_stations--;
  287. }
  288. BUG_ON(priv->num_stations < 0);
  289. out:
  290. spin_unlock_irqrestore(&priv->sta_lock, flags);
  291. return 0;
  292. }
  293. #endif
  294. /**
  295. * iwl3945_clear_stations_table - Clear the driver's station table
  296. *
  297. * NOTE: This does not clear or otherwise alter the device's station table.
  298. */
  299. static void iwl3945_clear_stations_table(struct iwl_priv *priv)
  300. {
  301. unsigned long flags;
  302. spin_lock_irqsave(&priv->sta_lock, flags);
  303. priv->num_stations = 0;
  304. memset(priv->stations_39, 0, sizeof(priv->stations_39));
  305. spin_unlock_irqrestore(&priv->sta_lock, flags);
  306. }
  307. /**
  308. * iwl3945_add_station - Add station to station tables in driver and device
  309. */
  310. u8 iwl3945_add_station(struct iwl_priv *priv, const u8 *addr, int is_ap, u8 flags)
  311. {
  312. int i;
  313. int index = IWL_INVALID_STATION;
  314. struct iwl3945_station_entry *station;
  315. unsigned long flags_spin;
  316. u8 rate;
  317. spin_lock_irqsave(&priv->sta_lock, flags_spin);
  318. if (is_ap)
  319. index = IWL_AP_ID;
  320. else if (is_broadcast_ether_addr(addr))
  321. index = priv->hw_params.bcast_sta_id;
  322. else
  323. for (i = IWL_STA_ID; i < priv->hw_params.max_stations; i++) {
  324. if (!compare_ether_addr(priv->stations_39[i].sta.sta.addr,
  325. addr)) {
  326. index = i;
  327. break;
  328. }
  329. if (!priv->stations_39[i].used &&
  330. index == IWL_INVALID_STATION)
  331. index = i;
  332. }
  333. /* These two conditions has the same outcome but keep them separate
  334. since they have different meaning */
  335. if (unlikely(index == IWL_INVALID_STATION)) {
  336. spin_unlock_irqrestore(&priv->sta_lock, flags_spin);
  337. return index;
  338. }
  339. if (priv->stations_39[index].used &&
  340. !compare_ether_addr(priv->stations_39[index].sta.sta.addr, addr)) {
  341. spin_unlock_irqrestore(&priv->sta_lock, flags_spin);
  342. return index;
  343. }
  344. IWL_DEBUG_ASSOC("Add STA ID %d: %pM\n", index, addr);
  345. station = &priv->stations_39[index];
  346. station->used = 1;
  347. priv->num_stations++;
  348. /* Set up the REPLY_ADD_STA command to send to device */
  349. memset(&station->sta, 0, sizeof(struct iwl3945_addsta_cmd));
  350. memcpy(station->sta.sta.addr, addr, ETH_ALEN);
  351. station->sta.mode = 0;
  352. station->sta.sta.sta_id = index;
  353. station->sta.station_flags = 0;
  354. if (priv->band == IEEE80211_BAND_5GHZ)
  355. rate = IWL_RATE_6M_PLCP;
  356. else
  357. rate = IWL_RATE_1M_PLCP;
  358. /* Turn on both antennas for the station... */
  359. station->sta.rate_n_flags =
  360. iwl3945_hw_set_rate_n_flags(rate, RATE_MCS_ANT_AB_MSK);
  361. spin_unlock_irqrestore(&priv->sta_lock, flags_spin);
  362. /* Add station to device's station table */
  363. iwl3945_send_add_station(priv, &station->sta, flags);
  364. return index;
  365. }
  366. int iwl3945_send_statistics_request(struct iwl_priv *priv)
  367. {
  368. u32 val = 0;
  369. struct iwl_host_cmd cmd = {
  370. .id = REPLY_STATISTICS_CMD,
  371. .len = sizeof(val),
  372. .data = &val,
  373. };
  374. return iwl_send_cmd_sync(priv, &cmd);
  375. }
  376. /**
  377. * iwl3945_set_rxon_channel - Set the phymode and channel values in staging RXON
  378. * @band: 2.4 or 5 GHz band
  379. * @channel: Any channel valid for the requested band
  380. * In addition to setting the staging RXON, priv->band is also set.
  381. *
  382. * NOTE: Does not commit to the hardware; it sets appropriate bit fields
  383. * in the staging RXON flag structure based on the band
  384. */
  385. static int iwl3945_set_rxon_channel(struct iwl_priv *priv,
  386. enum ieee80211_band band,
  387. u16 channel)
  388. {
  389. if (!iwl3945_get_channel_info(priv, band, channel)) {
  390. IWL_DEBUG_INFO("Could not set channel to %d [%d]\n",
  391. channel, band);
  392. return -EINVAL;
  393. }
  394. if ((le16_to_cpu(priv->staging39_rxon.channel) == channel) &&
  395. (priv->band == band))
  396. return 0;
  397. priv->staging39_rxon.channel = cpu_to_le16(channel);
  398. if (band == IEEE80211_BAND_5GHZ)
  399. priv->staging39_rxon.flags &= ~RXON_FLG_BAND_24G_MSK;
  400. else
  401. priv->staging39_rxon.flags |= RXON_FLG_BAND_24G_MSK;
  402. priv->band = band;
  403. IWL_DEBUG_INFO("Staging channel set to %d [%d]\n", channel, band);
  404. return 0;
  405. }
  406. /**
  407. * iwl3945_check_rxon_cmd - validate RXON structure is valid
  408. *
  409. * NOTE: This is really only useful during development and can eventually
  410. * be #ifdef'd out once the driver is stable and folks aren't actively
  411. * making changes
  412. */
  413. static int iwl3945_check_rxon_cmd(struct iwl_priv *priv)
  414. {
  415. int error = 0;
  416. int counter = 1;
  417. struct iwl3945_rxon_cmd *rxon = &priv->staging39_rxon;
  418. if (rxon->flags & RXON_FLG_BAND_24G_MSK) {
  419. error |= le32_to_cpu(rxon->flags &
  420. (RXON_FLG_TGJ_NARROW_BAND_MSK |
  421. RXON_FLG_RADAR_DETECT_MSK));
  422. if (error)
  423. IWL_WARN(priv, "check 24G fields %d | %d\n",
  424. counter++, error);
  425. } else {
  426. error |= (rxon->flags & RXON_FLG_SHORT_SLOT_MSK) ?
  427. 0 : le32_to_cpu(RXON_FLG_SHORT_SLOT_MSK);
  428. if (error)
  429. IWL_WARN(priv, "check 52 fields %d | %d\n",
  430. counter++, error);
  431. error |= le32_to_cpu(rxon->flags & RXON_FLG_CCK_MSK);
  432. if (error)
  433. IWL_WARN(priv, "check 52 CCK %d | %d\n",
  434. counter++, error);
  435. }
  436. error |= (rxon->node_addr[0] | rxon->bssid_addr[0]) & 0x1;
  437. if (error)
  438. IWL_WARN(priv, "check mac addr %d | %d\n", counter++, error);
  439. /* make sure basic rates 6Mbps and 1Mbps are supported */
  440. error |= (((rxon->ofdm_basic_rates & IWL_RATE_6M_MASK) == 0) &&
  441. ((rxon->cck_basic_rates & IWL_RATE_1M_MASK) == 0));
  442. if (error)
  443. IWL_WARN(priv, "check basic rate %d | %d\n", counter++, error);
  444. error |= (le16_to_cpu(rxon->assoc_id) > 2007);
  445. if (error)
  446. IWL_WARN(priv, "check assoc id %d | %d\n", counter++, error);
  447. error |= ((rxon->flags & (RXON_FLG_CCK_MSK | RXON_FLG_SHORT_SLOT_MSK))
  448. == (RXON_FLG_CCK_MSK | RXON_FLG_SHORT_SLOT_MSK));
  449. if (error)
  450. IWL_WARN(priv, "check CCK and short slot %d | %d\n",
  451. counter++, error);
  452. error |= ((rxon->flags & (RXON_FLG_CCK_MSK | RXON_FLG_AUTO_DETECT_MSK))
  453. == (RXON_FLG_CCK_MSK | RXON_FLG_AUTO_DETECT_MSK));
  454. if (error)
  455. IWL_WARN(priv, "check CCK & auto detect %d | %d\n",
  456. counter++, error);
  457. error |= ((rxon->flags & (RXON_FLG_AUTO_DETECT_MSK |
  458. RXON_FLG_TGG_PROTECT_MSK)) == RXON_FLG_TGG_PROTECT_MSK);
  459. if (error)
  460. IWL_WARN(priv, "check TGG and auto detect %d | %d\n",
  461. counter++, error);
  462. if ((rxon->flags & RXON_FLG_DIS_DIV_MSK))
  463. error |= ((rxon->flags & (RXON_FLG_ANT_B_MSK |
  464. RXON_FLG_ANT_A_MSK)) == 0);
  465. if (error)
  466. IWL_WARN(priv, "check antenna %d %d\n", counter++, error);
  467. if (error)
  468. IWL_WARN(priv, "Tuning to channel %d\n",
  469. le16_to_cpu(rxon->channel));
  470. if (error) {
  471. IWL_ERR(priv, "Not a valid rxon_assoc_cmd field values\n");
  472. return -1;
  473. }
  474. return 0;
  475. }
  476. /**
  477. * iwl3945_full_rxon_required - check if full RXON (vs RXON_ASSOC) cmd is needed
  478. * @priv: staging_rxon is compared to active_rxon
  479. *
  480. * If the RXON structure is changing enough to require a new tune,
  481. * or is clearing the RXON_FILTER_ASSOC_MSK, then return 1 to indicate that
  482. * a new tune (full RXON command, rather than RXON_ASSOC cmd) is required.
  483. */
  484. static int iwl3945_full_rxon_required(struct iwl_priv *priv)
  485. {
  486. /* These items are only settable from the full RXON command */
  487. if (!(iwl3945_is_associated(priv)) ||
  488. compare_ether_addr(priv->staging39_rxon.bssid_addr,
  489. priv->active39_rxon.bssid_addr) ||
  490. compare_ether_addr(priv->staging39_rxon.node_addr,
  491. priv->active39_rxon.node_addr) ||
  492. compare_ether_addr(priv->staging39_rxon.wlap_bssid_addr,
  493. priv->active39_rxon.wlap_bssid_addr) ||
  494. (priv->staging39_rxon.dev_type != priv->active39_rxon.dev_type) ||
  495. (priv->staging39_rxon.channel != priv->active39_rxon.channel) ||
  496. (priv->staging39_rxon.air_propagation !=
  497. priv->active39_rxon.air_propagation) ||
  498. (priv->staging39_rxon.assoc_id != priv->active39_rxon.assoc_id))
  499. return 1;
  500. /* flags, filter_flags, ofdm_basic_rates, and cck_basic_rates can
  501. * be updated with the RXON_ASSOC command -- however only some
  502. * flag transitions are allowed using RXON_ASSOC */
  503. /* Check if we are not switching bands */
  504. if ((priv->staging39_rxon.flags & RXON_FLG_BAND_24G_MSK) !=
  505. (priv->active39_rxon.flags & RXON_FLG_BAND_24G_MSK))
  506. return 1;
  507. /* Check if we are switching association toggle */
  508. if ((priv->staging39_rxon.filter_flags & RXON_FILTER_ASSOC_MSK) !=
  509. (priv->active39_rxon.filter_flags & RXON_FILTER_ASSOC_MSK))
  510. return 1;
  511. return 0;
  512. }
  513. static int iwl3945_send_rxon_assoc(struct iwl_priv *priv)
  514. {
  515. int rc = 0;
  516. struct iwl_rx_packet *res = NULL;
  517. struct iwl3945_rxon_assoc_cmd rxon_assoc;
  518. struct iwl_host_cmd cmd = {
  519. .id = REPLY_RXON_ASSOC,
  520. .len = sizeof(rxon_assoc),
  521. .meta.flags = CMD_WANT_SKB,
  522. .data = &rxon_assoc,
  523. };
  524. const struct iwl3945_rxon_cmd *rxon1 = &priv->staging39_rxon;
  525. const struct iwl3945_rxon_cmd *rxon2 = &priv->active39_rxon;
  526. if ((rxon1->flags == rxon2->flags) &&
  527. (rxon1->filter_flags == rxon2->filter_flags) &&
  528. (rxon1->cck_basic_rates == rxon2->cck_basic_rates) &&
  529. (rxon1->ofdm_basic_rates == rxon2->ofdm_basic_rates)) {
  530. IWL_DEBUG_INFO("Using current RXON_ASSOC. Not resending.\n");
  531. return 0;
  532. }
  533. rxon_assoc.flags = priv->staging39_rxon.flags;
  534. rxon_assoc.filter_flags = priv->staging39_rxon.filter_flags;
  535. rxon_assoc.ofdm_basic_rates = priv->staging39_rxon.ofdm_basic_rates;
  536. rxon_assoc.cck_basic_rates = priv->staging39_rxon.cck_basic_rates;
  537. rxon_assoc.reserved = 0;
  538. rc = iwl_send_cmd_sync(priv, &cmd);
  539. if (rc)
  540. return rc;
  541. res = (struct iwl_rx_packet *)cmd.meta.u.skb->data;
  542. if (res->hdr.flags & IWL_CMD_FAILED_MSK) {
  543. IWL_ERR(priv, "Bad return from REPLY_RXON_ASSOC command\n");
  544. rc = -EIO;
  545. }
  546. priv->alloc_rxb_skb--;
  547. dev_kfree_skb_any(cmd.meta.u.skb);
  548. return rc;
  549. }
  550. /**
  551. * iwl3945_commit_rxon - commit staging_rxon to hardware
  552. *
  553. * The RXON command in staging_rxon is committed to the hardware and
  554. * the active_rxon structure is updated with the new data. This
  555. * function correctly transitions out of the RXON_ASSOC_MSK state if
  556. * a HW tune is required based on the RXON structure changes.
  557. */
  558. static int iwl3945_commit_rxon(struct iwl_priv *priv)
  559. {
  560. /* cast away the const for active_rxon in this function */
  561. struct iwl3945_rxon_cmd *active_rxon = (void *)&priv->active39_rxon;
  562. int rc = 0;
  563. if (!iwl_is_alive(priv))
  564. return -1;
  565. /* always get timestamp with Rx frame */
  566. priv->staging39_rxon.flags |= RXON_FLG_TSF2HOST_MSK;
  567. /* select antenna */
  568. priv->staging39_rxon.flags &=
  569. ~(RXON_FLG_DIS_DIV_MSK | RXON_FLG_ANT_SEL_MSK);
  570. priv->staging39_rxon.flags |= iwl3945_get_antenna_flags(priv);
  571. rc = iwl3945_check_rxon_cmd(priv);
  572. if (rc) {
  573. IWL_ERR(priv, "Invalid RXON configuration. Not committing.\n");
  574. return -EINVAL;
  575. }
  576. /* If we don't need to send a full RXON, we can use
  577. * iwl3945_rxon_assoc_cmd which is used to reconfigure filter
  578. * and other flags for the current radio configuration. */
  579. if (!iwl3945_full_rxon_required(priv)) {
  580. rc = iwl3945_send_rxon_assoc(priv);
  581. if (rc) {
  582. IWL_ERR(priv, "Error setting RXON_ASSOC "
  583. "configuration (%d).\n", rc);
  584. return rc;
  585. }
  586. memcpy(active_rxon, &priv->staging39_rxon, sizeof(*active_rxon));
  587. return 0;
  588. }
  589. /* If we are currently associated and the new config requires
  590. * an RXON_ASSOC and the new config wants the associated mask enabled,
  591. * we must clear the associated from the active configuration
  592. * before we apply the new config */
  593. if (iwl3945_is_associated(priv) &&
  594. (priv->staging39_rxon.filter_flags & RXON_FILTER_ASSOC_MSK)) {
  595. IWL_DEBUG_INFO("Toggling associated bit on current RXON\n");
  596. active_rxon->filter_flags &= ~RXON_FILTER_ASSOC_MSK;
  597. rc = iwl_send_cmd_pdu(priv, REPLY_RXON,
  598. sizeof(struct iwl3945_rxon_cmd),
  599. &priv->active39_rxon);
  600. /* If the mask clearing failed then we set
  601. * active_rxon back to what it was previously */
  602. if (rc) {
  603. active_rxon->filter_flags |= RXON_FILTER_ASSOC_MSK;
  604. IWL_ERR(priv, "Error clearing ASSOC_MSK on current "
  605. "configuration (%d).\n", rc);
  606. return rc;
  607. }
  608. }
  609. IWL_DEBUG_INFO("Sending RXON\n"
  610. "* with%s RXON_FILTER_ASSOC_MSK\n"
  611. "* channel = %d\n"
  612. "* bssid = %pM\n",
  613. ((priv->staging39_rxon.filter_flags &
  614. RXON_FILTER_ASSOC_MSK) ? "" : "out"),
  615. le16_to_cpu(priv->staging39_rxon.channel),
  616. priv->staging_rxon.bssid_addr);
  617. /* Apply the new configuration */
  618. rc = iwl_send_cmd_pdu(priv, REPLY_RXON,
  619. sizeof(struct iwl3945_rxon_cmd), &priv->staging39_rxon);
  620. if (rc) {
  621. IWL_ERR(priv, "Error setting new configuration (%d).\n", rc);
  622. return rc;
  623. }
  624. memcpy(active_rxon, &priv->staging39_rxon, sizeof(*active_rxon));
  625. iwl3945_clear_stations_table(priv);
  626. /* If we issue a new RXON command which required a tune then we must
  627. * send a new TXPOWER command or we won't be able to Tx any frames */
  628. rc = iwl3945_hw_reg_send_txpower(priv);
  629. if (rc) {
  630. IWL_ERR(priv, "Error setting Tx power (%d).\n", rc);
  631. return rc;
  632. }
  633. /* Add the broadcast address so we can send broadcast frames */
  634. if (iwl3945_add_station(priv, iwl_bcast_addr, 0, 0) ==
  635. IWL_INVALID_STATION) {
  636. IWL_ERR(priv, "Error adding BROADCAST address for transmit.\n");
  637. return -EIO;
  638. }
  639. /* If we have set the ASSOC_MSK and we are in BSS mode then
  640. * add the IWL_AP_ID to the station rate table */
  641. if (iwl3945_is_associated(priv) &&
  642. (priv->iw_mode == NL80211_IFTYPE_STATION))
  643. if (iwl3945_add_station(priv, priv->active39_rxon.bssid_addr, 1, 0)
  644. == IWL_INVALID_STATION) {
  645. IWL_ERR(priv, "Error adding AP address for transmit\n");
  646. return -EIO;
  647. }
  648. /* Init the hardware's rate fallback order based on the band */
  649. rc = iwl3945_init_hw_rate_table(priv);
  650. if (rc) {
  651. IWL_ERR(priv, "Error setting HW rate table: %02X\n", rc);
  652. return -EIO;
  653. }
  654. return 0;
  655. }
  656. static int iwl3945_send_bt_config(struct iwl_priv *priv)
  657. {
  658. struct iwl_bt_cmd bt_cmd = {
  659. .flags = 3,
  660. .lead_time = 0xAA,
  661. .max_kill = 1,
  662. .kill_ack_mask = 0,
  663. .kill_cts_mask = 0,
  664. };
  665. return iwl_send_cmd_pdu(priv, REPLY_BT_CONFIG,
  666. sizeof(bt_cmd), &bt_cmd);
  667. }
  668. static int iwl3945_send_scan_abort(struct iwl_priv *priv)
  669. {
  670. int rc = 0;
  671. struct iwl_rx_packet *res;
  672. struct iwl_host_cmd cmd = {
  673. .id = REPLY_SCAN_ABORT_CMD,
  674. .meta.flags = CMD_WANT_SKB,
  675. };
  676. /* If there isn't a scan actively going on in the hardware
  677. * then we are in between scan bands and not actually
  678. * actively scanning, so don't send the abort command */
  679. if (!test_bit(STATUS_SCAN_HW, &priv->status)) {
  680. clear_bit(STATUS_SCAN_ABORTING, &priv->status);
  681. return 0;
  682. }
  683. rc = iwl_send_cmd_sync(priv, &cmd);
  684. if (rc) {
  685. clear_bit(STATUS_SCAN_ABORTING, &priv->status);
  686. return rc;
  687. }
  688. res = (struct iwl_rx_packet *)cmd.meta.u.skb->data;
  689. if (res->u.status != CAN_ABORT_STATUS) {
  690. /* The scan abort will return 1 for success or
  691. * 2 for "failure". A failure condition can be
  692. * due to simply not being in an active scan which
  693. * can occur if we send the scan abort before we
  694. * the microcode has notified us that a scan is
  695. * completed. */
  696. IWL_DEBUG_INFO("SCAN_ABORT returned %d.\n", res->u.status);
  697. clear_bit(STATUS_SCAN_ABORTING, &priv->status);
  698. clear_bit(STATUS_SCAN_HW, &priv->status);
  699. }
  700. dev_kfree_skb_any(cmd.meta.u.skb);
  701. return rc;
  702. }
  703. static int iwl3945_add_sta_sync_callback(struct iwl_priv *priv,
  704. struct iwl_cmd *cmd, struct sk_buff *skb)
  705. {
  706. struct iwl_rx_packet *res = NULL;
  707. if (!skb) {
  708. IWL_ERR(priv, "Error: Response NULL in REPLY_ADD_STA.\n");
  709. return 1;
  710. }
  711. res = (struct iwl_rx_packet *)skb->data;
  712. if (res->hdr.flags & IWL_CMD_FAILED_MSK) {
  713. IWL_ERR(priv, "Bad return from REPLY_ADD_STA (0x%08X)\n",
  714. res->hdr.flags);
  715. return 1;
  716. }
  717. switch (res->u.add_sta.status) {
  718. case ADD_STA_SUCCESS_MSK:
  719. break;
  720. default:
  721. break;
  722. }
  723. /* We didn't cache the SKB; let the caller free it */
  724. return 1;
  725. }
  726. int iwl3945_send_add_station(struct iwl_priv *priv,
  727. struct iwl3945_addsta_cmd *sta, u8 flags)
  728. {
  729. struct iwl_rx_packet *res = NULL;
  730. int rc = 0;
  731. struct iwl_host_cmd cmd = {
  732. .id = REPLY_ADD_STA,
  733. .len = sizeof(struct iwl3945_addsta_cmd),
  734. .meta.flags = flags,
  735. .data = sta,
  736. };
  737. if (flags & CMD_ASYNC)
  738. cmd.meta.u.callback = iwl3945_add_sta_sync_callback;
  739. else
  740. cmd.meta.flags |= CMD_WANT_SKB;
  741. rc = iwl_send_cmd(priv, &cmd);
  742. if (rc || (flags & CMD_ASYNC))
  743. return rc;
  744. res = (struct iwl_rx_packet *)cmd.meta.u.skb->data;
  745. if (res->hdr.flags & IWL_CMD_FAILED_MSK) {
  746. IWL_ERR(priv, "Bad return from REPLY_ADD_STA (0x%08X)\n",
  747. res->hdr.flags);
  748. rc = -EIO;
  749. }
  750. if (rc == 0) {
  751. switch (res->u.add_sta.status) {
  752. case ADD_STA_SUCCESS_MSK:
  753. IWL_DEBUG_INFO("REPLY_ADD_STA PASSED\n");
  754. break;
  755. default:
  756. rc = -EIO;
  757. IWL_WARN(priv, "REPLY_ADD_STA failed\n");
  758. break;
  759. }
  760. }
  761. priv->alloc_rxb_skb--;
  762. dev_kfree_skb_any(cmd.meta.u.skb);
  763. return rc;
  764. }
  765. static int iwl3945_update_sta_key_info(struct iwl_priv *priv,
  766. struct ieee80211_key_conf *keyconf,
  767. u8 sta_id)
  768. {
  769. unsigned long flags;
  770. __le16 key_flags = 0;
  771. switch (keyconf->alg) {
  772. case ALG_CCMP:
  773. key_flags |= STA_KEY_FLG_CCMP;
  774. key_flags |= cpu_to_le16(
  775. keyconf->keyidx << STA_KEY_FLG_KEYID_POS);
  776. key_flags &= ~STA_KEY_FLG_INVALID;
  777. break;
  778. case ALG_TKIP:
  779. case ALG_WEP:
  780. default:
  781. return -EINVAL;
  782. }
  783. spin_lock_irqsave(&priv->sta_lock, flags);
  784. priv->stations_39[sta_id].keyinfo.alg = keyconf->alg;
  785. priv->stations_39[sta_id].keyinfo.keylen = keyconf->keylen;
  786. memcpy(priv->stations_39[sta_id].keyinfo.key, keyconf->key,
  787. keyconf->keylen);
  788. memcpy(priv->stations_39[sta_id].sta.key.key, keyconf->key,
  789. keyconf->keylen);
  790. priv->stations_39[sta_id].sta.key.key_flags = key_flags;
  791. priv->stations_39[sta_id].sta.sta.modify_mask = STA_MODIFY_KEY_MASK;
  792. priv->stations_39[sta_id].sta.mode = STA_CONTROL_MODIFY_MSK;
  793. spin_unlock_irqrestore(&priv->sta_lock, flags);
  794. IWL_DEBUG_INFO("hwcrypto: modify ucode station key info\n");
  795. iwl3945_send_add_station(priv, &priv->stations_39[sta_id].sta, 0);
  796. return 0;
  797. }
  798. static int iwl3945_clear_sta_key_info(struct iwl_priv *priv, u8 sta_id)
  799. {
  800. unsigned long flags;
  801. spin_lock_irqsave(&priv->sta_lock, flags);
  802. memset(&priv->stations_39[sta_id].keyinfo, 0, sizeof(struct iwl3945_hw_key));
  803. memset(&priv->stations_39[sta_id].sta.key, 0,
  804. sizeof(struct iwl4965_keyinfo));
  805. priv->stations_39[sta_id].sta.key.key_flags = STA_KEY_FLG_NO_ENC;
  806. priv->stations_39[sta_id].sta.sta.modify_mask = STA_MODIFY_KEY_MASK;
  807. priv->stations_39[sta_id].sta.mode = STA_CONTROL_MODIFY_MSK;
  808. spin_unlock_irqrestore(&priv->sta_lock, flags);
  809. IWL_DEBUG_INFO("hwcrypto: clear ucode station key info\n");
  810. iwl3945_send_add_station(priv, &priv->stations_39[sta_id].sta, 0);
  811. return 0;
  812. }
  813. static void iwl3945_clear_free_frames(struct iwl_priv *priv)
  814. {
  815. struct list_head *element;
  816. IWL_DEBUG_INFO("%d frames on pre-allocated heap on clear.\n",
  817. priv->frames_count);
  818. while (!list_empty(&priv->free_frames)) {
  819. element = priv->free_frames.next;
  820. list_del(element);
  821. kfree(list_entry(element, struct iwl3945_frame, list));
  822. priv->frames_count--;
  823. }
  824. if (priv->frames_count) {
  825. IWL_WARN(priv, "%d frames still in use. Did we lose one?\n",
  826. priv->frames_count);
  827. priv->frames_count = 0;
  828. }
  829. }
  830. static struct iwl3945_frame *iwl3945_get_free_frame(struct iwl_priv *priv)
  831. {
  832. struct iwl3945_frame *frame;
  833. struct list_head *element;
  834. if (list_empty(&priv->free_frames)) {
  835. frame = kzalloc(sizeof(*frame), GFP_KERNEL);
  836. if (!frame) {
  837. IWL_ERR(priv, "Could not allocate frame!\n");
  838. return NULL;
  839. }
  840. priv->frames_count++;
  841. return frame;
  842. }
  843. element = priv->free_frames.next;
  844. list_del(element);
  845. return list_entry(element, struct iwl3945_frame, list);
  846. }
  847. static void iwl3945_free_frame(struct iwl_priv *priv, struct iwl3945_frame *frame)
  848. {
  849. memset(frame, 0, sizeof(*frame));
  850. list_add(&frame->list, &priv->free_frames);
  851. }
  852. unsigned int iwl3945_fill_beacon_frame(struct iwl_priv *priv,
  853. struct ieee80211_hdr *hdr,
  854. int left)
  855. {
  856. if (!iwl3945_is_associated(priv) || !priv->ibss_beacon ||
  857. ((priv->iw_mode != NL80211_IFTYPE_ADHOC) &&
  858. (priv->iw_mode != NL80211_IFTYPE_AP)))
  859. return 0;
  860. if (priv->ibss_beacon->len > left)
  861. return 0;
  862. memcpy(hdr, priv->ibss_beacon->data, priv->ibss_beacon->len);
  863. return priv->ibss_beacon->len;
  864. }
  865. static u8 iwl3945_rate_get_lowest_plcp(struct iwl_priv *priv)
  866. {
  867. u8 i;
  868. int rate_mask;
  869. /* Set rate mask*/
  870. if (priv->staging39_rxon.flags & RXON_FLG_BAND_24G_MSK)
  871. rate_mask = priv->active_rate_basic & IWL_CCK_RATES_MASK;
  872. else
  873. rate_mask = priv->active_rate_basic & IWL_OFDM_RATES_MASK;
  874. for (i = IWL_RATE_1M_INDEX; i != IWL_RATE_INVALID;
  875. i = iwl3945_rates[i].next_ieee) {
  876. if (rate_mask & (1 << i))
  877. return iwl3945_rates[i].plcp;
  878. }
  879. /* No valid rate was found. Assign the lowest one */
  880. if (priv->staging39_rxon.flags & RXON_FLG_BAND_24G_MSK)
  881. return IWL_RATE_1M_PLCP;
  882. else
  883. return IWL_RATE_6M_PLCP;
  884. }
  885. static int iwl3945_send_beacon_cmd(struct iwl_priv *priv)
  886. {
  887. struct iwl3945_frame *frame;
  888. unsigned int frame_size;
  889. int rc;
  890. u8 rate;
  891. frame = iwl3945_get_free_frame(priv);
  892. if (!frame) {
  893. IWL_ERR(priv, "Could not obtain free frame buffer for beacon "
  894. "command.\n");
  895. return -ENOMEM;
  896. }
  897. rate = iwl3945_rate_get_lowest_plcp(priv);
  898. frame_size = iwl3945_hw_get_beacon_cmd(priv, frame, rate);
  899. rc = iwl_send_cmd_pdu(priv, REPLY_TX_BEACON, frame_size,
  900. &frame->u.cmd[0]);
  901. iwl3945_free_frame(priv, frame);
  902. return rc;
  903. }
  904. /******************************************************************************
  905. *
  906. * EEPROM related functions
  907. *
  908. ******************************************************************************/
  909. static void get_eeprom_mac(struct iwl_priv *priv, u8 *mac)
  910. {
  911. memcpy(mac, priv->eeprom39.mac_address, 6);
  912. }
  913. /*
  914. * Clear the OWNER_MSK, to establish driver (instead of uCode running on
  915. * embedded controller) as EEPROM reader; each read is a series of pulses
  916. * to/from the EEPROM chip, not a single event, so even reads could conflict
  917. * if they weren't arbitrated by some ownership mechanism. Here, the driver
  918. * simply claims ownership, which should be safe when this function is called
  919. * (i.e. before loading uCode!).
  920. */
  921. static inline int iwl3945_eeprom_acquire_semaphore(struct iwl_priv *priv)
  922. {
  923. _iwl_clear_bit(priv, CSR_EEPROM_GP, CSR_EEPROM_GP_IF_OWNER_MSK);
  924. return 0;
  925. }
  926. /**
  927. * iwl3945_eeprom_init - read EEPROM contents
  928. *
  929. * Load the EEPROM contents from adapter into priv->eeprom39
  930. *
  931. * NOTE: This routine uses the non-debug IO access functions.
  932. */
  933. int iwl3945_eeprom_init(struct iwl_priv *priv)
  934. {
  935. u16 *e = (u16 *)&priv->eeprom39;
  936. u32 gp = iwl_read32(priv, CSR_EEPROM_GP);
  937. int sz = sizeof(priv->eeprom39);
  938. int ret;
  939. u16 addr;
  940. /* The EEPROM structure has several padding buffers within it
  941. * and when adding new EEPROM maps is subject to programmer errors
  942. * which may be very difficult to identify without explicitly
  943. * checking the resulting size of the eeprom map. */
  944. BUILD_BUG_ON(sizeof(priv->eeprom39) != IWL_EEPROM_IMAGE_SIZE);
  945. if ((gp & CSR_EEPROM_GP_VALID_MSK) == CSR_EEPROM_GP_BAD_SIGNATURE) {
  946. IWL_ERR(priv, "EEPROM not found, EEPROM_GP=0x%08x\n", gp);
  947. return -ENOENT;
  948. }
  949. /* Make sure driver (instead of uCode) is allowed to read EEPROM */
  950. ret = iwl3945_eeprom_acquire_semaphore(priv);
  951. if (ret < 0) {
  952. IWL_ERR(priv, "Failed to acquire EEPROM semaphore.\n");
  953. return -ENOENT;
  954. }
  955. /* eeprom is an array of 16bit values */
  956. for (addr = 0; addr < sz; addr += sizeof(u16)) {
  957. u32 r;
  958. _iwl_write32(priv, CSR_EEPROM_REG,
  959. CSR_EEPROM_REG_MSK_ADDR & (addr << 1));
  960. _iwl_clear_bit(priv, CSR_EEPROM_REG, CSR_EEPROM_REG_BIT_CMD);
  961. ret = iwl_poll_direct_bit(priv, CSR_EEPROM_REG,
  962. CSR_EEPROM_REG_READ_VALID_MSK,
  963. IWL_EEPROM_ACCESS_TIMEOUT);
  964. if (ret < 0) {
  965. IWL_ERR(priv, "Time out reading EEPROM[%d]\n", addr);
  966. return ret;
  967. }
  968. r = _iwl_read_direct32(priv, CSR_EEPROM_REG);
  969. e[addr / 2] = le16_to_cpu((__force __le16)(r >> 16));
  970. }
  971. return 0;
  972. }
  973. static void iwl3945_unset_hw_params(struct iwl_priv *priv)
  974. {
  975. if (priv->shared_virt)
  976. pci_free_consistent(priv->pci_dev,
  977. sizeof(struct iwl3945_shared),
  978. priv->shared_virt,
  979. priv->shared_phys);
  980. }
  981. /**
  982. * iwl3945_supported_rate_to_ie - fill in the supported rate in IE field
  983. *
  984. * return : set the bit for each supported rate insert in ie
  985. */
  986. static u16 iwl3945_supported_rate_to_ie(u8 *ie, u16 supported_rate,
  987. u16 basic_rate, int *left)
  988. {
  989. u16 ret_rates = 0, bit;
  990. int i;
  991. u8 *cnt = ie;
  992. u8 *rates = ie + 1;
  993. for (bit = 1, i = 0; i < IWL_RATE_COUNT; i++, bit <<= 1) {
  994. if (bit & supported_rate) {
  995. ret_rates |= bit;
  996. rates[*cnt] = iwl3945_rates[i].ieee |
  997. ((bit & basic_rate) ? 0x80 : 0x00);
  998. (*cnt)++;
  999. (*left)--;
  1000. if ((*left <= 0) ||
  1001. (*cnt >= IWL_SUPPORTED_RATES_IE_LEN))
  1002. break;
  1003. }
  1004. }
  1005. return ret_rates;
  1006. }
  1007. /**
  1008. * iwl3945_fill_probe_req - fill in all required fields and IE for probe request
  1009. */
  1010. static u16 iwl3945_fill_probe_req(struct iwl_priv *priv,
  1011. struct ieee80211_mgmt *frame,
  1012. int left)
  1013. {
  1014. int len = 0;
  1015. u8 *pos = NULL;
  1016. u16 active_rates, ret_rates, cck_rates;
  1017. /* Make sure there is enough space for the probe request,
  1018. * two mandatory IEs and the data */
  1019. left -= 24;
  1020. if (left < 0)
  1021. return 0;
  1022. len += 24;
  1023. frame->frame_control = cpu_to_le16(IEEE80211_STYPE_PROBE_REQ);
  1024. memcpy(frame->da, iwl_bcast_addr, ETH_ALEN);
  1025. memcpy(frame->sa, priv->mac_addr, ETH_ALEN);
  1026. memcpy(frame->bssid, iwl_bcast_addr, ETH_ALEN);
  1027. frame->seq_ctrl = 0;
  1028. /* fill in our indirect SSID IE */
  1029. /* ...next IE... */
  1030. left -= 2;
  1031. if (left < 0)
  1032. return 0;
  1033. len += 2;
  1034. pos = &(frame->u.probe_req.variable[0]);
  1035. *pos++ = WLAN_EID_SSID;
  1036. *pos++ = 0;
  1037. /* fill in supported rate */
  1038. /* ...next IE... */
  1039. left -= 2;
  1040. if (left < 0)
  1041. return 0;
  1042. /* ... fill it in... */
  1043. *pos++ = WLAN_EID_SUPP_RATES;
  1044. *pos = 0;
  1045. priv->active_rate = priv->rates_mask;
  1046. active_rates = priv->active_rate;
  1047. priv->active_rate_basic = priv->rates_mask & IWL_BASIC_RATES_MASK;
  1048. cck_rates = IWL_CCK_RATES_MASK & active_rates;
  1049. ret_rates = iwl3945_supported_rate_to_ie(pos, cck_rates,
  1050. priv->active_rate_basic, &left);
  1051. active_rates &= ~ret_rates;
  1052. ret_rates = iwl3945_supported_rate_to_ie(pos, active_rates,
  1053. priv->active_rate_basic, &left);
  1054. active_rates &= ~ret_rates;
  1055. len += 2 + *pos;
  1056. pos += (*pos) + 1;
  1057. if (active_rates == 0)
  1058. goto fill_end;
  1059. /* fill in supported extended rate */
  1060. /* ...next IE... */
  1061. left -= 2;
  1062. if (left < 0)
  1063. return 0;
  1064. /* ... fill it in... */
  1065. *pos++ = WLAN_EID_EXT_SUPP_RATES;
  1066. *pos = 0;
  1067. iwl3945_supported_rate_to_ie(pos, active_rates,
  1068. priv->active_rate_basic, &left);
  1069. if (*pos > 0)
  1070. len += 2 + *pos;
  1071. fill_end:
  1072. return (u16)len;
  1073. }
  1074. /*
  1075. * QoS support
  1076. */
  1077. static int iwl3945_send_qos_params_command(struct iwl_priv *priv,
  1078. struct iwl_qosparam_cmd *qos)
  1079. {
  1080. return iwl_send_cmd_pdu(priv, REPLY_QOS_PARAM,
  1081. sizeof(struct iwl_qosparam_cmd), qos);
  1082. }
  1083. static void iwl3945_activate_qos(struct iwl_priv *priv, u8 force)
  1084. {
  1085. unsigned long flags;
  1086. if (test_bit(STATUS_EXIT_PENDING, &priv->status))
  1087. return;
  1088. spin_lock_irqsave(&priv->lock, flags);
  1089. priv->qos_data.def_qos_parm.qos_flags = 0;
  1090. if (priv->qos_data.qos_cap.q_AP.queue_request &&
  1091. !priv->qos_data.qos_cap.q_AP.txop_request)
  1092. priv->qos_data.def_qos_parm.qos_flags |=
  1093. QOS_PARAM_FLG_TXOP_TYPE_MSK;
  1094. if (priv->qos_data.qos_active)
  1095. priv->qos_data.def_qos_parm.qos_flags |=
  1096. QOS_PARAM_FLG_UPDATE_EDCA_MSK;
  1097. spin_unlock_irqrestore(&priv->lock, flags);
  1098. if (force || iwl3945_is_associated(priv)) {
  1099. IWL_DEBUG_QOS("send QoS cmd with QoS active %d \n",
  1100. priv->qos_data.qos_active);
  1101. iwl3945_send_qos_params_command(priv,
  1102. &(priv->qos_data.def_qos_parm));
  1103. }
  1104. }
  1105. /*
  1106. * Power management (not Tx power!) functions
  1107. */
  1108. #define MSEC_TO_USEC 1024
  1109. /* default power management (not Tx power) table values */
  1110. /* for TIM 0-10 */
  1111. static struct iwl_power_vec_entry range_0[IWL_POWER_MAX] = {
  1112. {{NOSLP, SLP_TOUT(0), SLP_TOUT(0), SLP_VEC(0, 0, 0, 0, 0)}, 0},
  1113. {{SLP, SLP_TOUT(200), SLP_TOUT(500), SLP_VEC(1, 2, 3, 4, 4)}, 0},
  1114. {{SLP, SLP_TOUT(200), SLP_TOUT(300), SLP_VEC(2, 4, 6, 7, 7)}, 0},
  1115. {{SLP, SLP_TOUT(50), SLP_TOUT(100), SLP_VEC(2, 6, 9, 9, 10)}, 0},
  1116. {{SLP, SLP_TOUT(50), SLP_TOUT(25), SLP_VEC(2, 7, 9, 9, 10)}, 1},
  1117. {{SLP, SLP_TOUT(25), SLP_TOUT(25), SLP_VEC(4, 7, 10, 10, 10)}, 1}
  1118. };
  1119. /* for TIM > 10 */
  1120. static struct iwl_power_vec_entry range_1[IWL_POWER_MAX] = {
  1121. {{NOSLP, SLP_TOUT(0), SLP_TOUT(0), SLP_VEC(0, 0, 0, 0, 0)}, 0},
  1122. {{SLP, SLP_TOUT(200), SLP_TOUT(500), SLP_VEC(1, 2, 3, 4, 0xFF)}, 0},
  1123. {{SLP, SLP_TOUT(200), SLP_TOUT(300), SLP_VEC(2, 4, 6, 7, 0xFF)}, 0},
  1124. {{SLP, SLP_TOUT(50), SLP_TOUT(100), SLP_VEC(2, 6, 9, 9, 0xFF)}, 0},
  1125. {{SLP, SLP_TOUT(50), SLP_TOUT(25), SLP_VEC(2, 7, 9, 9, 0xFF)}, 0},
  1126. {{SLP, SLP_TOUT(25), SLP_TOUT(25), SLP_VEC(4, 7, 10, 10, 0xFF)}, 0}
  1127. };
  1128. int iwl3945_power_init_handle(struct iwl_priv *priv)
  1129. {
  1130. int rc = 0, i;
  1131. struct iwl_power_mgr *pow_data;
  1132. int size = sizeof(struct iwl_power_vec_entry) * IWL_POWER_MAX;
  1133. u16 pci_pm;
  1134. IWL_DEBUG_POWER("Initialize power \n");
  1135. pow_data = &priv->power_data;
  1136. memset(pow_data, 0, sizeof(*pow_data));
  1137. pow_data->dtim_period = 1;
  1138. memcpy(&pow_data->pwr_range_0[0], &range_0[0], size);
  1139. memcpy(&pow_data->pwr_range_1[0], &range_1[0], size);
  1140. rc = pci_read_config_word(priv->pci_dev, PCI_LINK_CTRL, &pci_pm);
  1141. if (rc != 0)
  1142. return 0;
  1143. else {
  1144. struct iwl_powertable_cmd *cmd;
  1145. IWL_DEBUG_POWER("adjust power command flags\n");
  1146. for (i = 0; i < IWL_POWER_MAX; i++) {
  1147. cmd = &pow_data->pwr_range_0[i].cmd;
  1148. if (pci_pm & 0x1)
  1149. cmd->flags &= ~IWL_POWER_PCI_PM_MSK;
  1150. else
  1151. cmd->flags |= IWL_POWER_PCI_PM_MSK;
  1152. }
  1153. }
  1154. return rc;
  1155. }
  1156. static int iwl3945_update_power_cmd(struct iwl_priv *priv,
  1157. struct iwl_powertable_cmd *cmd, u32 mode)
  1158. {
  1159. struct iwl_power_mgr *pow_data;
  1160. struct iwl_power_vec_entry *range;
  1161. u32 max_sleep = 0;
  1162. int i;
  1163. u8 period = 0;
  1164. bool skip;
  1165. if (mode > IWL_POWER_INDEX_5) {
  1166. IWL_DEBUG_POWER("Error invalid power mode \n");
  1167. return -EINVAL;
  1168. }
  1169. pow_data = &priv->power_data;
  1170. if (pow_data->dtim_period < 10)
  1171. range = &pow_data->pwr_range_0[0];
  1172. else
  1173. range = &pow_data->pwr_range_1[1];
  1174. memcpy(cmd, &range[mode].cmd, sizeof(struct iwl3945_powertable_cmd));
  1175. if (period == 0) {
  1176. period = 1;
  1177. skip = false;
  1178. } else {
  1179. skip = !!range[mode].no_dtim;
  1180. }
  1181. if (skip) {
  1182. __le32 slp_itrvl = cmd->sleep_interval[IWL_POWER_VEC_SIZE - 1];
  1183. max_sleep = (le32_to_cpu(slp_itrvl) / period) * period;
  1184. cmd->flags |= IWL_POWER_SLEEP_OVER_DTIM_MSK;
  1185. } else {
  1186. max_sleep = period;
  1187. cmd->flags &= ~IWL_POWER_SLEEP_OVER_DTIM_MSK;
  1188. }
  1189. for (i = 0; i < IWL_POWER_VEC_SIZE; i++)
  1190. if (le32_to_cpu(cmd->sleep_interval[i]) > max_sleep)
  1191. cmd->sleep_interval[i] = cpu_to_le32(max_sleep);
  1192. IWL_DEBUG_POWER("Flags value = 0x%08X\n", cmd->flags);
  1193. IWL_DEBUG_POWER("Tx timeout = %u\n", le32_to_cpu(cmd->tx_data_timeout));
  1194. IWL_DEBUG_POWER("Rx timeout = %u\n", le32_to_cpu(cmd->rx_data_timeout));
  1195. IWL_DEBUG_POWER("Sleep interval vector = { %d , %d , %d , %d , %d }\n",
  1196. le32_to_cpu(cmd->sleep_interval[0]),
  1197. le32_to_cpu(cmd->sleep_interval[1]),
  1198. le32_to_cpu(cmd->sleep_interval[2]),
  1199. le32_to_cpu(cmd->sleep_interval[3]),
  1200. le32_to_cpu(cmd->sleep_interval[4]));
  1201. return 0;
  1202. }
  1203. static int iwl3945_send_power_mode(struct iwl_priv *priv, u32 mode)
  1204. {
  1205. u32 uninitialized_var(final_mode);
  1206. int rc;
  1207. struct iwl_powertable_cmd cmd;
  1208. /* If on battery, set to 3,
  1209. * if plugged into AC power, set to CAM ("continuously aware mode"),
  1210. * else user level */
  1211. switch (mode) {
  1212. case IWL39_POWER_BATTERY:
  1213. final_mode = IWL_POWER_INDEX_3;
  1214. break;
  1215. case IWL39_POWER_AC:
  1216. final_mode = IWL_POWER_MODE_CAM;
  1217. break;
  1218. default:
  1219. final_mode = mode;
  1220. break;
  1221. }
  1222. iwl3945_update_power_cmd(priv, &cmd, final_mode);
  1223. /* FIXME use get_hcmd_size 3945 command is 4 bytes shorter */
  1224. rc = iwl_send_cmd_pdu(priv, POWER_TABLE_CMD,
  1225. sizeof(struct iwl3945_powertable_cmd), &cmd);
  1226. if (final_mode == IWL_POWER_MODE_CAM)
  1227. clear_bit(STATUS_POWER_PMI, &priv->status);
  1228. else
  1229. set_bit(STATUS_POWER_PMI, &priv->status);
  1230. return rc;
  1231. }
  1232. #define MAX_UCODE_BEACON_INTERVAL 1024
  1233. #define INTEL_CONN_LISTEN_INTERVAL __constant_cpu_to_le16(0xA)
  1234. static __le16 iwl3945_adjust_beacon_interval(u16 beacon_val)
  1235. {
  1236. u16 new_val = 0;
  1237. u16 beacon_factor = 0;
  1238. beacon_factor =
  1239. (beacon_val + MAX_UCODE_BEACON_INTERVAL)
  1240. / MAX_UCODE_BEACON_INTERVAL;
  1241. new_val = beacon_val / beacon_factor;
  1242. return cpu_to_le16(new_val);
  1243. }
  1244. static void iwl3945_setup_rxon_timing(struct iwl_priv *priv)
  1245. {
  1246. u64 interval_tm_unit;
  1247. u64 tsf, result;
  1248. unsigned long flags;
  1249. struct ieee80211_conf *conf = NULL;
  1250. u16 beacon_int = 0;
  1251. conf = ieee80211_get_hw_conf(priv->hw);
  1252. spin_lock_irqsave(&priv->lock, flags);
  1253. priv->rxon_timing.timestamp = cpu_to_le64(priv->timestamp);
  1254. priv->rxon_timing.listen_interval = INTEL_CONN_LISTEN_INTERVAL;
  1255. tsf = priv->timestamp;
  1256. beacon_int = priv->beacon_int;
  1257. spin_unlock_irqrestore(&priv->lock, flags);
  1258. if (priv->iw_mode == NL80211_IFTYPE_STATION) {
  1259. if (beacon_int == 0) {
  1260. priv->rxon_timing.beacon_interval = cpu_to_le16(100);
  1261. priv->rxon_timing.beacon_init_val = cpu_to_le32(102400);
  1262. } else {
  1263. priv->rxon_timing.beacon_interval =
  1264. cpu_to_le16(beacon_int);
  1265. priv->rxon_timing.beacon_interval =
  1266. iwl3945_adjust_beacon_interval(
  1267. le16_to_cpu(priv->rxon_timing.beacon_interval));
  1268. }
  1269. priv->rxon_timing.atim_window = 0;
  1270. } else {
  1271. priv->rxon_timing.beacon_interval =
  1272. iwl3945_adjust_beacon_interval(conf->beacon_int);
  1273. /* TODO: we need to get atim_window from upper stack
  1274. * for now we set to 0 */
  1275. priv->rxon_timing.atim_window = 0;
  1276. }
  1277. interval_tm_unit =
  1278. (le16_to_cpu(priv->rxon_timing.beacon_interval) * 1024);
  1279. result = do_div(tsf, interval_tm_unit);
  1280. priv->rxon_timing.beacon_init_val =
  1281. cpu_to_le32((u32) ((u64) interval_tm_unit - result));
  1282. IWL_DEBUG_ASSOC
  1283. ("beacon interval %d beacon timer %d beacon tim %d\n",
  1284. le16_to_cpu(priv->rxon_timing.beacon_interval),
  1285. le32_to_cpu(priv->rxon_timing.beacon_init_val),
  1286. le16_to_cpu(priv->rxon_timing.atim_window));
  1287. }
  1288. static int iwl3945_scan_initiate(struct iwl_priv *priv)
  1289. {
  1290. if (!iwl_is_ready_rf(priv)) {
  1291. IWL_DEBUG_SCAN("Aborting scan due to not ready.\n");
  1292. return -EIO;
  1293. }
  1294. if (test_bit(STATUS_SCANNING, &priv->status)) {
  1295. IWL_DEBUG_SCAN("Scan already in progress.\n");
  1296. return -EAGAIN;
  1297. }
  1298. if (test_bit(STATUS_SCAN_ABORTING, &priv->status)) {
  1299. IWL_DEBUG_SCAN("Scan request while abort pending. "
  1300. "Queuing.\n");
  1301. return -EAGAIN;
  1302. }
  1303. IWL_DEBUG_INFO("Starting scan...\n");
  1304. if (priv->cfg->sku & IWL_SKU_G)
  1305. priv->scan_bands |= BIT(IEEE80211_BAND_2GHZ);
  1306. if (priv->cfg->sku & IWL_SKU_A)
  1307. priv->scan_bands |= BIT(IEEE80211_BAND_5GHZ);
  1308. set_bit(STATUS_SCANNING, &priv->status);
  1309. priv->scan_start = jiffies;
  1310. priv->scan_pass_start = priv->scan_start;
  1311. queue_work(priv->workqueue, &priv->request_scan);
  1312. return 0;
  1313. }
  1314. static int iwl3945_set_rxon_hwcrypto(struct iwl_priv *priv, int hw_decrypt)
  1315. {
  1316. struct iwl3945_rxon_cmd *rxon = &priv->staging39_rxon;
  1317. if (hw_decrypt)
  1318. rxon->filter_flags &= ~RXON_FILTER_DIS_DECRYPT_MSK;
  1319. else
  1320. rxon->filter_flags |= RXON_FILTER_DIS_DECRYPT_MSK;
  1321. return 0;
  1322. }
  1323. static void iwl3945_set_flags_for_phymode(struct iwl_priv *priv,
  1324. enum ieee80211_band band)
  1325. {
  1326. if (band == IEEE80211_BAND_5GHZ) {
  1327. priv->staging39_rxon.flags &=
  1328. ~(RXON_FLG_BAND_24G_MSK | RXON_FLG_AUTO_DETECT_MSK
  1329. | RXON_FLG_CCK_MSK);
  1330. priv->staging39_rxon.flags |= RXON_FLG_SHORT_SLOT_MSK;
  1331. } else {
  1332. /* Copied from iwl3945_bg_post_associate() */
  1333. if (priv->assoc_capability & WLAN_CAPABILITY_SHORT_SLOT_TIME)
  1334. priv->staging39_rxon.flags |= RXON_FLG_SHORT_SLOT_MSK;
  1335. else
  1336. priv->staging39_rxon.flags &= ~RXON_FLG_SHORT_SLOT_MSK;
  1337. if (priv->iw_mode == NL80211_IFTYPE_ADHOC)
  1338. priv->staging39_rxon.flags &= ~RXON_FLG_SHORT_SLOT_MSK;
  1339. priv->staging39_rxon.flags |= RXON_FLG_BAND_24G_MSK;
  1340. priv->staging39_rxon.flags |= RXON_FLG_AUTO_DETECT_MSK;
  1341. priv->staging39_rxon.flags &= ~RXON_FLG_CCK_MSK;
  1342. }
  1343. }
  1344. /*
  1345. * initialize rxon structure with default values from eeprom
  1346. */
  1347. static void iwl3945_connection_init_rx_config(struct iwl_priv *priv,
  1348. int mode)
  1349. {
  1350. const struct iwl_channel_info *ch_info;
  1351. memset(&priv->staging39_rxon, 0, sizeof(priv->staging39_rxon));
  1352. switch (mode) {
  1353. case NL80211_IFTYPE_AP:
  1354. priv->staging39_rxon.dev_type = RXON_DEV_TYPE_AP;
  1355. break;
  1356. case NL80211_IFTYPE_STATION:
  1357. priv->staging39_rxon.dev_type = RXON_DEV_TYPE_ESS;
  1358. priv->staging39_rxon.filter_flags = RXON_FILTER_ACCEPT_GRP_MSK;
  1359. break;
  1360. case NL80211_IFTYPE_ADHOC:
  1361. priv->staging39_rxon.dev_type = RXON_DEV_TYPE_IBSS;
  1362. priv->staging39_rxon.flags = RXON_FLG_SHORT_PREAMBLE_MSK;
  1363. priv->staging39_rxon.filter_flags = RXON_FILTER_BCON_AWARE_MSK |
  1364. RXON_FILTER_ACCEPT_GRP_MSK;
  1365. break;
  1366. case NL80211_IFTYPE_MONITOR:
  1367. priv->staging39_rxon.dev_type = RXON_DEV_TYPE_SNIFFER;
  1368. priv->staging39_rxon.filter_flags = RXON_FILTER_PROMISC_MSK |
  1369. RXON_FILTER_CTL2HOST_MSK | RXON_FILTER_ACCEPT_GRP_MSK;
  1370. break;
  1371. default:
  1372. IWL_ERR(priv, "Unsupported interface type %d\n", mode);
  1373. break;
  1374. }
  1375. #if 0
  1376. /* TODO: Figure out when short_preamble would be set and cache from
  1377. * that */
  1378. if (!hw_to_local(priv->hw)->short_preamble)
  1379. priv->staging39_rxon.flags &= ~RXON_FLG_SHORT_PREAMBLE_MSK;
  1380. else
  1381. priv->staging39_rxon.flags |= RXON_FLG_SHORT_PREAMBLE_MSK;
  1382. #endif
  1383. ch_info = iwl3945_get_channel_info(priv, priv->band,
  1384. le16_to_cpu(priv->active39_rxon.channel));
  1385. if (!ch_info)
  1386. ch_info = &priv->channel_info[0];
  1387. /*
  1388. * in some case A channels are all non IBSS
  1389. * in this case force B/G channel
  1390. */
  1391. if ((mode == NL80211_IFTYPE_ADHOC) && !(is_channel_ibss(ch_info)))
  1392. ch_info = &priv->channel_info[0];
  1393. priv->staging39_rxon.channel = cpu_to_le16(ch_info->channel);
  1394. if (is_channel_a_band(ch_info))
  1395. priv->band = IEEE80211_BAND_5GHZ;
  1396. else
  1397. priv->band = IEEE80211_BAND_2GHZ;
  1398. iwl3945_set_flags_for_phymode(priv, priv->band);
  1399. priv->staging39_rxon.ofdm_basic_rates =
  1400. (IWL_OFDM_RATES_MASK >> IWL_FIRST_OFDM_RATE) & 0xFF;
  1401. priv->staging39_rxon.cck_basic_rates =
  1402. (IWL_CCK_RATES_MASK >> IWL_FIRST_CCK_RATE) & 0xF;
  1403. }
  1404. static int iwl3945_set_mode(struct iwl_priv *priv, int mode)
  1405. {
  1406. if (mode == NL80211_IFTYPE_ADHOC) {
  1407. const struct iwl_channel_info *ch_info;
  1408. ch_info = iwl3945_get_channel_info(priv,
  1409. priv->band,
  1410. le16_to_cpu(priv->staging39_rxon.channel));
  1411. if (!ch_info || !is_channel_ibss(ch_info)) {
  1412. IWL_ERR(priv, "channel %d not IBSS channel\n",
  1413. le16_to_cpu(priv->staging39_rxon.channel));
  1414. return -EINVAL;
  1415. }
  1416. }
  1417. iwl3945_connection_init_rx_config(priv, mode);
  1418. memcpy(priv->staging39_rxon.node_addr, priv->mac_addr, ETH_ALEN);
  1419. iwl3945_clear_stations_table(priv);
  1420. /* don't commit rxon if rf-kill is on*/
  1421. if (!iwl_is_ready_rf(priv))
  1422. return -EAGAIN;
  1423. cancel_delayed_work(&priv->scan_check);
  1424. if (iwl_scan_cancel_timeout(priv, 100)) {
  1425. IWL_WARN(priv, "Aborted scan still in progress after 100ms\n");
  1426. IWL_DEBUG_MAC80211("leaving - scan abort failed.\n");
  1427. return -EAGAIN;
  1428. }
  1429. iwl3945_commit_rxon(priv);
  1430. return 0;
  1431. }
  1432. static void iwl3945_build_tx_cmd_hwcrypto(struct iwl_priv *priv,
  1433. struct ieee80211_tx_info *info,
  1434. struct iwl_cmd *cmd,
  1435. struct sk_buff *skb_frag,
  1436. int last_frag)
  1437. {
  1438. struct iwl3945_tx_cmd *tx = (struct iwl3945_tx_cmd *)cmd->cmd.payload;
  1439. struct iwl3945_hw_key *keyinfo =
  1440. &priv->stations_39[info->control.hw_key->hw_key_idx].keyinfo;
  1441. switch (keyinfo->alg) {
  1442. case ALG_CCMP:
  1443. tx->sec_ctl = TX_CMD_SEC_CCM;
  1444. memcpy(tx->key, keyinfo->key, keyinfo->keylen);
  1445. IWL_DEBUG_TX("tx_cmd with AES hwcrypto\n");
  1446. break;
  1447. case ALG_TKIP:
  1448. #if 0
  1449. tx->sec_ctl = TX_CMD_SEC_TKIP;
  1450. if (last_frag)
  1451. memcpy(tx->tkip_mic.byte, skb_frag->tail - 8,
  1452. 8);
  1453. else
  1454. memset(tx->tkip_mic.byte, 0, 8);
  1455. #endif
  1456. break;
  1457. case ALG_WEP:
  1458. tx->sec_ctl = TX_CMD_SEC_WEP |
  1459. (info->control.hw_key->hw_key_idx & TX_CMD_SEC_MSK) << TX_CMD_SEC_SHIFT;
  1460. if (keyinfo->keylen == 13)
  1461. tx->sec_ctl |= TX_CMD_SEC_KEY128;
  1462. memcpy(&tx->key[3], keyinfo->key, keyinfo->keylen);
  1463. IWL_DEBUG_TX("Configuring packet for WEP encryption "
  1464. "with key %d\n", info->control.hw_key->hw_key_idx);
  1465. break;
  1466. default:
  1467. IWL_ERR(priv, "Unknown encode alg %d\n", keyinfo->alg);
  1468. break;
  1469. }
  1470. }
  1471. /*
  1472. * handle build REPLY_TX command notification.
  1473. */
  1474. static void iwl3945_build_tx_cmd_basic(struct iwl_priv *priv,
  1475. struct iwl_cmd *cmd,
  1476. struct ieee80211_tx_info *info,
  1477. struct ieee80211_hdr *hdr, u8 std_id)
  1478. {
  1479. struct iwl3945_tx_cmd *tx = (struct iwl3945_tx_cmd *)cmd->cmd.payload;
  1480. __le32 tx_flags = tx->tx_flags;
  1481. __le16 fc = hdr->frame_control;
  1482. u8 rc_flags = info->control.rates[0].flags;
  1483. tx->stop_time.life_time = TX_CMD_LIFE_TIME_INFINITE;
  1484. if (!(info->flags & IEEE80211_TX_CTL_NO_ACK)) {
  1485. tx_flags |= TX_CMD_FLG_ACK_MSK;
  1486. if (ieee80211_is_mgmt(fc))
  1487. tx_flags |= TX_CMD_FLG_SEQ_CTL_MSK;
  1488. if (ieee80211_is_probe_resp(fc) &&
  1489. !(le16_to_cpu(hdr->seq_ctrl) & 0xf))
  1490. tx_flags |= TX_CMD_FLG_TSF_MSK;
  1491. } else {
  1492. tx_flags &= (~TX_CMD_FLG_ACK_MSK);
  1493. tx_flags |= TX_CMD_FLG_SEQ_CTL_MSK;
  1494. }
  1495. tx->sta_id = std_id;
  1496. if (ieee80211_has_morefrags(fc))
  1497. tx_flags |= TX_CMD_FLG_MORE_FRAG_MSK;
  1498. if (ieee80211_is_data_qos(fc)) {
  1499. u8 *qc = ieee80211_get_qos_ctl(hdr);
  1500. tx->tid_tspec = qc[0] & 0xf;
  1501. tx_flags &= ~TX_CMD_FLG_SEQ_CTL_MSK;
  1502. } else {
  1503. tx_flags |= TX_CMD_FLG_SEQ_CTL_MSK;
  1504. }
  1505. if (rc_flags & IEEE80211_TX_RC_USE_RTS_CTS) {
  1506. tx_flags |= TX_CMD_FLG_RTS_MSK;
  1507. tx_flags &= ~TX_CMD_FLG_CTS_MSK;
  1508. } else if (rc_flags & IEEE80211_TX_RC_USE_CTS_PROTECT) {
  1509. tx_flags &= ~TX_CMD_FLG_RTS_MSK;
  1510. tx_flags |= TX_CMD_FLG_CTS_MSK;
  1511. }
  1512. if ((tx_flags & TX_CMD_FLG_RTS_MSK) || (tx_flags & TX_CMD_FLG_CTS_MSK))
  1513. tx_flags |= TX_CMD_FLG_FULL_TXOP_PROT_MSK;
  1514. tx_flags &= ~(TX_CMD_FLG_ANT_SEL_MSK);
  1515. if (ieee80211_is_mgmt(fc)) {
  1516. if (ieee80211_is_assoc_req(fc) || ieee80211_is_reassoc_req(fc))
  1517. tx->timeout.pm_frame_timeout = cpu_to_le16(3);
  1518. else
  1519. tx->timeout.pm_frame_timeout = cpu_to_le16(2);
  1520. } else {
  1521. tx->timeout.pm_frame_timeout = 0;
  1522. #ifdef CONFIG_IWL3945_LEDS
  1523. priv->rxtxpackets += le16_to_cpu(cmd->cmd.tx.len);
  1524. #endif
  1525. }
  1526. tx->driver_txop = 0;
  1527. tx->tx_flags = tx_flags;
  1528. tx->next_frame_len = 0;
  1529. }
  1530. /**
  1531. * iwl3945_get_sta_id - Find station's index within station table
  1532. */
  1533. static int iwl3945_get_sta_id(struct iwl_priv *priv, struct ieee80211_hdr *hdr)
  1534. {
  1535. int sta_id;
  1536. u16 fc = le16_to_cpu(hdr->frame_control);
  1537. /* If this frame is broadcast or management, use broadcast station id */
  1538. if (((fc & IEEE80211_FCTL_FTYPE) != IEEE80211_FTYPE_DATA) ||
  1539. is_multicast_ether_addr(hdr->addr1))
  1540. return priv->hw_params.bcast_sta_id;
  1541. switch (priv->iw_mode) {
  1542. /* If we are a client station in a BSS network, use the special
  1543. * AP station entry (that's the only station we communicate with) */
  1544. case NL80211_IFTYPE_STATION:
  1545. return IWL_AP_ID;
  1546. /* If we are an AP, then find the station, or use BCAST */
  1547. case NL80211_IFTYPE_AP:
  1548. sta_id = iwl3945_hw_find_station(priv, hdr->addr1);
  1549. if (sta_id != IWL_INVALID_STATION)
  1550. return sta_id;
  1551. return priv->hw_params.bcast_sta_id;
  1552. /* If this frame is going out to an IBSS network, find the station,
  1553. * or create a new station table entry */
  1554. case NL80211_IFTYPE_ADHOC: {
  1555. /* Create new station table entry */
  1556. sta_id = iwl3945_hw_find_station(priv, hdr->addr1);
  1557. if (sta_id != IWL_INVALID_STATION)
  1558. return sta_id;
  1559. sta_id = iwl3945_add_station(priv, hdr->addr1, 0, CMD_ASYNC);
  1560. if (sta_id != IWL_INVALID_STATION)
  1561. return sta_id;
  1562. IWL_DEBUG_DROP("Station %pM not in station map. "
  1563. "Defaulting to broadcast...\n",
  1564. hdr->addr1);
  1565. iwl_print_hex_dump(priv, IWL_DL_DROP, (u8 *) hdr, sizeof(*hdr));
  1566. return priv->hw_params.bcast_sta_id;
  1567. }
  1568. /* If we are in monitor mode, use BCAST. This is required for
  1569. * packet injection. */
  1570. case NL80211_IFTYPE_MONITOR:
  1571. return priv->hw_params.bcast_sta_id;
  1572. default:
  1573. IWL_WARN(priv, "Unknown mode of operation: %d\n",
  1574. priv->iw_mode);
  1575. return priv->hw_params.bcast_sta_id;
  1576. }
  1577. }
  1578. /*
  1579. * start REPLY_TX command process
  1580. */
  1581. static int iwl3945_tx_skb(struct iwl_priv *priv, struct sk_buff *skb)
  1582. {
  1583. struct ieee80211_hdr *hdr = (struct ieee80211_hdr *)skb->data;
  1584. struct ieee80211_tx_info *info = IEEE80211_SKB_CB(skb);
  1585. struct iwl3945_tx_cmd *tx;
  1586. struct iwl_tx_queue *txq = NULL;
  1587. struct iwl_queue *q = NULL;
  1588. struct iwl_cmd *out_cmd = NULL;
  1589. dma_addr_t phys_addr;
  1590. dma_addr_t txcmd_phys;
  1591. int txq_id = skb_get_queue_mapping(skb);
  1592. u16 len, idx, len_org, hdr_len;
  1593. u8 id;
  1594. u8 unicast;
  1595. u8 sta_id;
  1596. u8 tid = 0;
  1597. u16 seq_number = 0;
  1598. __le16 fc;
  1599. u8 wait_write_ptr = 0;
  1600. u8 *qc = NULL;
  1601. unsigned long flags;
  1602. int rc;
  1603. spin_lock_irqsave(&priv->lock, flags);
  1604. if (iwl_is_rfkill(priv)) {
  1605. IWL_DEBUG_DROP("Dropping - RF KILL\n");
  1606. goto drop_unlock;
  1607. }
  1608. if ((ieee80211_get_tx_rate(priv->hw, info)->hw_value & 0xFF) == IWL_INVALID_RATE) {
  1609. IWL_ERR(priv, "ERROR: No TX rate available.\n");
  1610. goto drop_unlock;
  1611. }
  1612. unicast = !is_multicast_ether_addr(hdr->addr1);
  1613. id = 0;
  1614. fc = hdr->frame_control;
  1615. #ifdef CONFIG_IWL3945_DEBUG
  1616. if (ieee80211_is_auth(fc))
  1617. IWL_DEBUG_TX("Sending AUTH frame\n");
  1618. else if (ieee80211_is_assoc_req(fc))
  1619. IWL_DEBUG_TX("Sending ASSOC frame\n");
  1620. else if (ieee80211_is_reassoc_req(fc))
  1621. IWL_DEBUG_TX("Sending REASSOC frame\n");
  1622. #endif
  1623. /* drop all data frame if we are not associated */
  1624. if (ieee80211_is_data(fc) &&
  1625. (priv->iw_mode != NL80211_IFTYPE_MONITOR) && /* packet injection */
  1626. (!iwl3945_is_associated(priv) ||
  1627. ((priv->iw_mode == NL80211_IFTYPE_STATION) && !priv->assoc_id))) {
  1628. IWL_DEBUG_DROP("Dropping - !iwl3945_is_associated\n");
  1629. goto drop_unlock;
  1630. }
  1631. spin_unlock_irqrestore(&priv->lock, flags);
  1632. hdr_len = ieee80211_hdrlen(fc);
  1633. /* Find (or create) index into station table for destination station */
  1634. sta_id = iwl3945_get_sta_id(priv, hdr);
  1635. if (sta_id == IWL_INVALID_STATION) {
  1636. IWL_DEBUG_DROP("Dropping - INVALID STATION: %pM\n",
  1637. hdr->addr1);
  1638. goto drop;
  1639. }
  1640. IWL_DEBUG_RATE("station Id %d\n", sta_id);
  1641. if (ieee80211_is_data_qos(fc)) {
  1642. qc = ieee80211_get_qos_ctl(hdr);
  1643. tid = qc[0] & IEEE80211_QOS_CTL_TID_MASK;
  1644. seq_number = priv->stations_39[sta_id].tid[tid].seq_number &
  1645. IEEE80211_SCTL_SEQ;
  1646. hdr->seq_ctrl = cpu_to_le16(seq_number) |
  1647. (hdr->seq_ctrl &
  1648. __constant_cpu_to_le16(IEEE80211_SCTL_FRAG));
  1649. seq_number += 0x10;
  1650. }
  1651. /* Descriptor for chosen Tx queue */
  1652. txq = &priv->txq[txq_id];
  1653. q = &txq->q;
  1654. spin_lock_irqsave(&priv->lock, flags);
  1655. idx = get_cmd_index(q, q->write_ptr, 0);
  1656. /* Set up driver data for this TFD */
  1657. memset(&(txq->txb[q->write_ptr]), 0, sizeof(struct iwl_tx_info));
  1658. txq->txb[q->write_ptr].skb[0] = skb;
  1659. /* Init first empty entry in queue's array of Tx/cmd buffers */
  1660. out_cmd = txq->cmd[idx];
  1661. tx = (struct iwl3945_tx_cmd *)out_cmd->cmd.payload;
  1662. memset(&out_cmd->hdr, 0, sizeof(out_cmd->hdr));
  1663. memset(tx, 0, sizeof(*tx));
  1664. /*
  1665. * Set up the Tx-command (not MAC!) header.
  1666. * Store the chosen Tx queue and TFD index within the sequence field;
  1667. * after Tx, uCode's Tx response will return this value so driver can
  1668. * locate the frame within the tx queue and do post-tx processing.
  1669. */
  1670. out_cmd->hdr.cmd = REPLY_TX;
  1671. out_cmd->hdr.sequence = cpu_to_le16((u16)(QUEUE_TO_SEQ(txq_id) |
  1672. INDEX_TO_SEQ(q->write_ptr)));
  1673. /* Copy MAC header from skb into command buffer */
  1674. memcpy(tx->hdr, hdr, hdr_len);
  1675. /*
  1676. * Use the first empty entry in this queue's command buffer array
  1677. * to contain the Tx command and MAC header concatenated together
  1678. * (payload data will be in another buffer).
  1679. * Size of this varies, due to varying MAC header length.
  1680. * If end is not dword aligned, we'll have 2 extra bytes at the end
  1681. * of the MAC header (device reads on dword boundaries).
  1682. * We'll tell device about this padding later.
  1683. */
  1684. len = sizeof(struct iwl3945_tx_cmd) +
  1685. sizeof(struct iwl_cmd_header) + hdr_len;
  1686. len_org = len;
  1687. len = (len + 3) & ~3;
  1688. if (len_org != len)
  1689. len_org = 1;
  1690. else
  1691. len_org = 0;
  1692. /* Physical address of this Tx command's header (not MAC header!),
  1693. * within command buffer array. */
  1694. txcmd_phys = pci_map_single(priv->pci_dev,
  1695. out_cmd, sizeof(struct iwl_cmd),
  1696. PCI_DMA_TODEVICE);
  1697. pci_unmap_addr_set(&out_cmd->meta, mapping, txcmd_phys);
  1698. pci_unmap_len_set(&out_cmd->meta, len, sizeof(struct iwl_cmd));
  1699. /* Add buffer containing Tx command and MAC(!) header to TFD's
  1700. * first entry */
  1701. txcmd_phys += offsetof(struct iwl_cmd, hdr);
  1702. /* Add buffer containing Tx command and MAC(!) header to TFD's
  1703. * first entry */
  1704. priv->cfg->ops->lib->txq_attach_buf_to_tfd(priv, txq,
  1705. txcmd_phys, len, 1, 0);
  1706. if (info->control.hw_key)
  1707. iwl3945_build_tx_cmd_hwcrypto(priv, info, out_cmd, skb, 0);
  1708. /* Set up TFD's 2nd entry to point directly to remainder of skb,
  1709. * if any (802.11 null frames have no payload). */
  1710. len = skb->len - hdr_len;
  1711. if (len) {
  1712. phys_addr = pci_map_single(priv->pci_dev, skb->data + hdr_len,
  1713. len, PCI_DMA_TODEVICE);
  1714. priv->cfg->ops->lib->txq_attach_buf_to_tfd(priv, txq,
  1715. phys_addr, len,
  1716. 0, U32_PAD(len));
  1717. }
  1718. /* Total # bytes to be transmitted */
  1719. len = (u16)skb->len;
  1720. tx->len = cpu_to_le16(len);
  1721. /* TODO need this for burst mode later on */
  1722. iwl3945_build_tx_cmd_basic(priv, out_cmd, info, hdr, sta_id);
  1723. /* set is_hcca to 0; it probably will never be implemented */
  1724. iwl3945_hw_build_tx_cmd_rate(priv, out_cmd, info, hdr, sta_id, 0);
  1725. tx->tx_flags &= ~TX_CMD_FLG_ANT_A_MSK;
  1726. tx->tx_flags &= ~TX_CMD_FLG_ANT_B_MSK;
  1727. if (!ieee80211_has_morefrags(hdr->frame_control)) {
  1728. txq->need_update = 1;
  1729. if (qc)
  1730. priv->stations_39[sta_id].tid[tid].seq_number = seq_number;
  1731. } else {
  1732. wait_write_ptr = 1;
  1733. txq->need_update = 0;
  1734. }
  1735. iwl_print_hex_dump(priv, IWL_DL_TX, tx, sizeof(*tx));
  1736. iwl_print_hex_dump(priv, IWL_DL_TX, (u8 *)tx->hdr,
  1737. ieee80211_hdrlen(fc));
  1738. /* Tell device the write index *just past* this latest filled TFD */
  1739. q->write_ptr = iwl_queue_inc_wrap(q->write_ptr, q->n_bd);
  1740. rc = iwl_txq_update_write_ptr(priv, txq);
  1741. spin_unlock_irqrestore(&priv->lock, flags);
  1742. if (rc)
  1743. return rc;
  1744. if ((iwl_queue_space(q) < q->high_mark)
  1745. && priv->mac80211_registered) {
  1746. if (wait_write_ptr) {
  1747. spin_lock_irqsave(&priv->lock, flags);
  1748. txq->need_update = 1;
  1749. iwl_txq_update_write_ptr(priv, txq);
  1750. spin_unlock_irqrestore(&priv->lock, flags);
  1751. }
  1752. ieee80211_stop_queue(priv->hw, skb_get_queue_mapping(skb));
  1753. }
  1754. return 0;
  1755. drop_unlock:
  1756. spin_unlock_irqrestore(&priv->lock, flags);
  1757. drop:
  1758. return -1;
  1759. }
  1760. static void iwl3945_set_rate(struct iwl_priv *priv)
  1761. {
  1762. const struct ieee80211_supported_band *sband = NULL;
  1763. struct ieee80211_rate *rate;
  1764. int i;
  1765. sband = iwl_get_hw_mode(priv, priv->band);
  1766. if (!sband) {
  1767. IWL_ERR(priv, "Failed to set rate: unable to get hw mode\n");
  1768. return;
  1769. }
  1770. priv->active_rate = 0;
  1771. priv->active_rate_basic = 0;
  1772. IWL_DEBUG_RATE("Setting rates for %s GHz\n",
  1773. sband->band == IEEE80211_BAND_2GHZ ? "2.4" : "5");
  1774. for (i = 0; i < sband->n_bitrates; i++) {
  1775. rate = &sband->bitrates[i];
  1776. if ((rate->hw_value < IWL_RATE_COUNT) &&
  1777. !(rate->flags & IEEE80211_CHAN_DISABLED)) {
  1778. IWL_DEBUG_RATE("Adding rate index %d (plcp %d)\n",
  1779. rate->hw_value, iwl3945_rates[rate->hw_value].plcp);
  1780. priv->active_rate |= (1 << rate->hw_value);
  1781. }
  1782. }
  1783. IWL_DEBUG_RATE("Set active_rate = %0x, active_rate_basic = %0x\n",
  1784. priv->active_rate, priv->active_rate_basic);
  1785. /*
  1786. * If a basic rate is configured, then use it (adding IWL_RATE_1M_MASK)
  1787. * otherwise set it to the default of all CCK rates and 6, 12, 24 for
  1788. * OFDM
  1789. */
  1790. if (priv->active_rate_basic & IWL_CCK_BASIC_RATES_MASK)
  1791. priv->staging39_rxon.cck_basic_rates =
  1792. ((priv->active_rate_basic &
  1793. IWL_CCK_RATES_MASK) >> IWL_FIRST_CCK_RATE) & 0xF;
  1794. else
  1795. priv->staging39_rxon.cck_basic_rates =
  1796. (IWL_CCK_BASIC_RATES_MASK >> IWL_FIRST_CCK_RATE) & 0xF;
  1797. if (priv->active_rate_basic & IWL_OFDM_BASIC_RATES_MASK)
  1798. priv->staging39_rxon.ofdm_basic_rates =
  1799. ((priv->active_rate_basic &
  1800. (IWL_OFDM_BASIC_RATES_MASK | IWL_RATE_6M_MASK)) >>
  1801. IWL_FIRST_OFDM_RATE) & 0xFF;
  1802. else
  1803. priv->staging39_rxon.ofdm_basic_rates =
  1804. (IWL_OFDM_BASIC_RATES_MASK >> IWL_FIRST_OFDM_RATE) & 0xFF;
  1805. }
  1806. static void iwl3945_radio_kill_sw(struct iwl_priv *priv, int disable_radio)
  1807. {
  1808. unsigned long flags;
  1809. if (!!disable_radio == test_bit(STATUS_RF_KILL_SW, &priv->status))
  1810. return;
  1811. IWL_DEBUG_RF_KILL("Manual SW RF KILL set to: RADIO %s\n",
  1812. disable_radio ? "OFF" : "ON");
  1813. if (disable_radio) {
  1814. iwl_scan_cancel(priv);
  1815. /* FIXME: This is a workaround for AP */
  1816. if (priv->iw_mode != NL80211_IFTYPE_AP) {
  1817. spin_lock_irqsave(&priv->lock, flags);
  1818. iwl_write32(priv, CSR_UCODE_DRV_GP1_SET,
  1819. CSR_UCODE_SW_BIT_RFKILL);
  1820. spin_unlock_irqrestore(&priv->lock, flags);
  1821. iwl_send_card_state(priv, CARD_STATE_CMD_DISABLE, 0);
  1822. set_bit(STATUS_RF_KILL_SW, &priv->status);
  1823. }
  1824. return;
  1825. }
  1826. spin_lock_irqsave(&priv->lock, flags);
  1827. iwl_write32(priv, CSR_UCODE_DRV_GP1_CLR, CSR_UCODE_SW_BIT_RFKILL);
  1828. clear_bit(STATUS_RF_KILL_SW, &priv->status);
  1829. spin_unlock_irqrestore(&priv->lock, flags);
  1830. /* wake up ucode */
  1831. msleep(10);
  1832. spin_lock_irqsave(&priv->lock, flags);
  1833. iwl_read32(priv, CSR_UCODE_DRV_GP1);
  1834. if (!iwl_grab_nic_access(priv))
  1835. iwl_release_nic_access(priv);
  1836. spin_unlock_irqrestore(&priv->lock, flags);
  1837. if (test_bit(STATUS_RF_KILL_HW, &priv->status)) {
  1838. IWL_DEBUG_RF_KILL("Can not turn radio back on - "
  1839. "disabled by HW switch\n");
  1840. return;
  1841. }
  1842. if (priv->is_open)
  1843. queue_work(priv->workqueue, &priv->restart);
  1844. return;
  1845. }
  1846. void iwl3945_set_decrypted_flag(struct iwl_priv *priv, struct sk_buff *skb,
  1847. u32 decrypt_res, struct ieee80211_rx_status *stats)
  1848. {
  1849. u16 fc =
  1850. le16_to_cpu(((struct ieee80211_hdr *)skb->data)->frame_control);
  1851. if (priv->active39_rxon.filter_flags & RXON_FILTER_DIS_DECRYPT_MSK)
  1852. return;
  1853. if (!(fc & IEEE80211_FCTL_PROTECTED))
  1854. return;
  1855. IWL_DEBUG_RX("decrypt_res:0x%x\n", decrypt_res);
  1856. switch (decrypt_res & RX_RES_STATUS_SEC_TYPE_MSK) {
  1857. case RX_RES_STATUS_SEC_TYPE_TKIP:
  1858. if ((decrypt_res & RX_RES_STATUS_DECRYPT_TYPE_MSK) ==
  1859. RX_RES_STATUS_BAD_ICV_MIC)
  1860. stats->flag |= RX_FLAG_MMIC_ERROR;
  1861. case RX_RES_STATUS_SEC_TYPE_WEP:
  1862. case RX_RES_STATUS_SEC_TYPE_CCMP:
  1863. if ((decrypt_res & RX_RES_STATUS_DECRYPT_TYPE_MSK) ==
  1864. RX_RES_STATUS_DECRYPT_OK) {
  1865. IWL_DEBUG_RX("hw decrypt successfully!!!\n");
  1866. stats->flag |= RX_FLAG_DECRYPTED;
  1867. }
  1868. break;
  1869. default:
  1870. break;
  1871. }
  1872. }
  1873. #ifdef CONFIG_IWL3945_SPECTRUM_MEASUREMENT
  1874. #include "iwl-spectrum.h"
  1875. #define BEACON_TIME_MASK_LOW 0x00FFFFFF
  1876. #define BEACON_TIME_MASK_HIGH 0xFF000000
  1877. #define TIME_UNIT 1024
  1878. /*
  1879. * extended beacon time format
  1880. * time in usec will be changed into a 32-bit value in 8:24 format
  1881. * the high 1 byte is the beacon counts
  1882. * the lower 3 bytes is the time in usec within one beacon interval
  1883. */
  1884. static u32 iwl3945_usecs_to_beacons(u32 usec, u32 beacon_interval)
  1885. {
  1886. u32 quot;
  1887. u32 rem;
  1888. u32 interval = beacon_interval * 1024;
  1889. if (!interval || !usec)
  1890. return 0;
  1891. quot = (usec / interval) & (BEACON_TIME_MASK_HIGH >> 24);
  1892. rem = (usec % interval) & BEACON_TIME_MASK_LOW;
  1893. return (quot << 24) + rem;
  1894. }
  1895. /* base is usually what we get from ucode with each received frame,
  1896. * the same as HW timer counter counting down
  1897. */
  1898. static __le32 iwl3945_add_beacon_time(u32 base, u32 addon, u32 beacon_interval)
  1899. {
  1900. u32 base_low = base & BEACON_TIME_MASK_LOW;
  1901. u32 addon_low = addon & BEACON_TIME_MASK_LOW;
  1902. u32 interval = beacon_interval * TIME_UNIT;
  1903. u32 res = (base & BEACON_TIME_MASK_HIGH) +
  1904. (addon & BEACON_TIME_MASK_HIGH);
  1905. if (base_low > addon_low)
  1906. res += base_low - addon_low;
  1907. else if (base_low < addon_low) {
  1908. res += interval + base_low - addon_low;
  1909. res += (1 << 24);
  1910. } else
  1911. res += (1 << 24);
  1912. return cpu_to_le32(res);
  1913. }
  1914. static int iwl3945_get_measurement(struct iwl_priv *priv,
  1915. struct ieee80211_measurement_params *params,
  1916. u8 type)
  1917. {
  1918. struct iwl_spectrum_cmd spectrum;
  1919. struct iwl_rx_packet *res;
  1920. struct iwl_host_cmd cmd = {
  1921. .id = REPLY_SPECTRUM_MEASUREMENT_CMD,
  1922. .data = (void *)&spectrum,
  1923. .meta.flags = CMD_WANT_SKB,
  1924. };
  1925. u32 add_time = le64_to_cpu(params->start_time);
  1926. int rc;
  1927. int spectrum_resp_status;
  1928. int duration = le16_to_cpu(params->duration);
  1929. if (iwl3945_is_associated(priv))
  1930. add_time =
  1931. iwl3945_usecs_to_beacons(
  1932. le64_to_cpu(params->start_time) - priv->last_tsf,
  1933. le16_to_cpu(priv->rxon_timing.beacon_interval));
  1934. memset(&spectrum, 0, sizeof(spectrum));
  1935. spectrum.channel_count = cpu_to_le16(1);
  1936. spectrum.flags =
  1937. RXON_FLG_TSF2HOST_MSK | RXON_FLG_ANT_A_MSK | RXON_FLG_DIS_DIV_MSK;
  1938. spectrum.filter_flags = MEASUREMENT_FILTER_FLAG;
  1939. cmd.len = sizeof(spectrum);
  1940. spectrum.len = cpu_to_le16(cmd.len - sizeof(spectrum.len));
  1941. if (iwl3945_is_associated(priv))
  1942. spectrum.start_time =
  1943. iwl3945_add_beacon_time(priv->last_beacon_time,
  1944. add_time,
  1945. le16_to_cpu(priv->rxon_timing.beacon_interval));
  1946. else
  1947. spectrum.start_time = 0;
  1948. spectrum.channels[0].duration = cpu_to_le32(duration * TIME_UNIT);
  1949. spectrum.channels[0].channel = params->channel;
  1950. spectrum.channels[0].type = type;
  1951. if (priv->active39_rxon.flags & RXON_FLG_BAND_24G_MSK)
  1952. spectrum.flags |= RXON_FLG_BAND_24G_MSK |
  1953. RXON_FLG_AUTO_DETECT_MSK | RXON_FLG_TGG_PROTECT_MSK;
  1954. rc = iwl_send_cmd_sync(priv, &cmd);
  1955. if (rc)
  1956. return rc;
  1957. res = (struct iwl_rx_packet *)cmd.meta.u.skb->data;
  1958. if (res->hdr.flags & IWL_CMD_FAILED_MSK) {
  1959. IWL_ERR(priv, "Bad return from REPLY_RX_ON_ASSOC command\n");
  1960. rc = -EIO;
  1961. }
  1962. spectrum_resp_status = le16_to_cpu(res->u.spectrum.status);
  1963. switch (spectrum_resp_status) {
  1964. case 0: /* Command will be handled */
  1965. if (res->u.spectrum.id != 0xff) {
  1966. IWL_DEBUG_INFO("Replaced existing measurement: %d\n",
  1967. res->u.spectrum.id);
  1968. priv->measurement_status &= ~MEASUREMENT_READY;
  1969. }
  1970. priv->measurement_status |= MEASUREMENT_ACTIVE;
  1971. rc = 0;
  1972. break;
  1973. case 1: /* Command will not be handled */
  1974. rc = -EAGAIN;
  1975. break;
  1976. }
  1977. dev_kfree_skb_any(cmd.meta.u.skb);
  1978. return rc;
  1979. }
  1980. #endif
  1981. static void iwl3945_rx_reply_alive(struct iwl_priv *priv,
  1982. struct iwl_rx_mem_buffer *rxb)
  1983. {
  1984. struct iwl_rx_packet *pkt = (void *)rxb->skb->data;
  1985. struct iwl_alive_resp *palive;
  1986. struct delayed_work *pwork;
  1987. palive = &pkt->u.alive_frame;
  1988. IWL_DEBUG_INFO("Alive ucode status 0x%08X revision "
  1989. "0x%01X 0x%01X\n",
  1990. palive->is_valid, palive->ver_type,
  1991. palive->ver_subtype);
  1992. if (palive->ver_subtype == INITIALIZE_SUBTYPE) {
  1993. IWL_DEBUG_INFO("Initialization Alive received.\n");
  1994. memcpy(&priv->card_alive_init, &pkt->u.alive_frame,
  1995. sizeof(struct iwl_alive_resp));
  1996. pwork = &priv->init_alive_start;
  1997. } else {
  1998. IWL_DEBUG_INFO("Runtime Alive received.\n");
  1999. memcpy(&priv->card_alive, &pkt->u.alive_frame,
  2000. sizeof(struct iwl_alive_resp));
  2001. pwork = &priv->alive_start;
  2002. iwl3945_disable_events(priv);
  2003. }
  2004. /* We delay the ALIVE response by 5ms to
  2005. * give the HW RF Kill time to activate... */
  2006. if (palive->is_valid == UCODE_VALID_OK)
  2007. queue_delayed_work(priv->workqueue, pwork,
  2008. msecs_to_jiffies(5));
  2009. else
  2010. IWL_WARN(priv, "uCode did not respond OK.\n");
  2011. }
  2012. static void iwl3945_rx_reply_add_sta(struct iwl_priv *priv,
  2013. struct iwl_rx_mem_buffer *rxb)
  2014. {
  2015. #ifdef CONFIG_IWLWIFI_DEBUG
  2016. struct iwl_rx_packet *pkt = (void *)rxb->skb->data;
  2017. #endif
  2018. IWL_DEBUG_RX("Received REPLY_ADD_STA: 0x%02X\n", pkt->u.status);
  2019. return;
  2020. }
  2021. static void iwl3945_rx_reply_error(struct iwl_priv *priv,
  2022. struct iwl_rx_mem_buffer *rxb)
  2023. {
  2024. struct iwl_rx_packet *pkt = (void *)rxb->skb->data;
  2025. IWL_ERR(priv, "Error Reply type 0x%08X cmd %s (0x%02X) "
  2026. "seq 0x%04X ser 0x%08X\n",
  2027. le32_to_cpu(pkt->u.err_resp.error_type),
  2028. get_cmd_string(pkt->u.err_resp.cmd_id),
  2029. pkt->u.err_resp.cmd_id,
  2030. le16_to_cpu(pkt->u.err_resp.bad_cmd_seq_num),
  2031. le32_to_cpu(pkt->u.err_resp.error_info));
  2032. }
  2033. #define TX_STATUS_ENTRY(x) case TX_STATUS_FAIL_ ## x: return #x
  2034. static void iwl3945_rx_csa(struct iwl_priv *priv, struct iwl_rx_mem_buffer *rxb)
  2035. {
  2036. struct iwl_rx_packet *pkt = (void *)rxb->skb->data;
  2037. struct iwl3945_rxon_cmd *rxon = (void *)&priv->active39_rxon;
  2038. struct iwl_csa_notification *csa = &(pkt->u.csa_notif);
  2039. IWL_DEBUG_11H("CSA notif: channel %d, status %d\n",
  2040. le16_to_cpu(csa->channel), le32_to_cpu(csa->status));
  2041. rxon->channel = csa->channel;
  2042. priv->staging39_rxon.channel = csa->channel;
  2043. }
  2044. static void iwl3945_rx_spectrum_measure_notif(struct iwl_priv *priv,
  2045. struct iwl_rx_mem_buffer *rxb)
  2046. {
  2047. #ifdef CONFIG_IWL3945_SPECTRUM_MEASUREMENT
  2048. struct iwl_rx_packet *pkt = (void *)rxb->skb->data;
  2049. struct iwl_spectrum_notification *report = &(pkt->u.spectrum_notif);
  2050. if (!report->state) {
  2051. IWL_DEBUG(IWL_DL_11H | IWL_DL_INFO,
  2052. "Spectrum Measure Notification: Start\n");
  2053. return;
  2054. }
  2055. memcpy(&priv->measure_report, report, sizeof(*report));
  2056. priv->measurement_status |= MEASUREMENT_READY;
  2057. #endif
  2058. }
  2059. static void iwl3945_rx_pm_sleep_notif(struct iwl_priv *priv,
  2060. struct iwl_rx_mem_buffer *rxb)
  2061. {
  2062. #ifdef CONFIG_IWL3945_DEBUG
  2063. struct iwl_rx_packet *pkt = (void *)rxb->skb->data;
  2064. struct iwl_sleep_notification *sleep = &(pkt->u.sleep_notif);
  2065. IWL_DEBUG_RX("sleep mode: %d, src: %d\n",
  2066. sleep->pm_sleep_mode, sleep->pm_wakeup_src);
  2067. #endif
  2068. }
  2069. static void iwl3945_rx_pm_debug_statistics_notif(struct iwl_priv *priv,
  2070. struct iwl_rx_mem_buffer *rxb)
  2071. {
  2072. struct iwl_rx_packet *pkt = (void *)rxb->skb->data;
  2073. IWL_DEBUG_RADIO("Dumping %d bytes of unhandled "
  2074. "notification for %s:\n",
  2075. le32_to_cpu(pkt->len), get_cmd_string(pkt->hdr.cmd));
  2076. iwl_print_hex_dump(priv, IWL_DL_RADIO, pkt->u.raw,
  2077. le32_to_cpu(pkt->len));
  2078. }
  2079. static void iwl3945_bg_beacon_update(struct work_struct *work)
  2080. {
  2081. struct iwl_priv *priv =
  2082. container_of(work, struct iwl_priv, beacon_update);
  2083. struct sk_buff *beacon;
  2084. /* Pull updated AP beacon from mac80211. will fail if not in AP mode */
  2085. beacon = ieee80211_beacon_get(priv->hw, priv->vif);
  2086. if (!beacon) {
  2087. IWL_ERR(priv, "update beacon failed\n");
  2088. return;
  2089. }
  2090. mutex_lock(&priv->mutex);
  2091. /* new beacon skb is allocated every time; dispose previous.*/
  2092. if (priv->ibss_beacon)
  2093. dev_kfree_skb(priv->ibss_beacon);
  2094. priv->ibss_beacon = beacon;
  2095. mutex_unlock(&priv->mutex);
  2096. iwl3945_send_beacon_cmd(priv);
  2097. }
  2098. static void iwl3945_rx_beacon_notif(struct iwl_priv *priv,
  2099. struct iwl_rx_mem_buffer *rxb)
  2100. {
  2101. #ifdef CONFIG_IWL3945_DEBUG
  2102. struct iwl_rx_packet *pkt = (void *)rxb->skb->data;
  2103. struct iwl3945_beacon_notif *beacon = &(pkt->u.beacon_status);
  2104. u8 rate = beacon->beacon_notify_hdr.rate;
  2105. IWL_DEBUG_RX("beacon status %x retries %d iss %d "
  2106. "tsf %d %d rate %d\n",
  2107. le32_to_cpu(beacon->beacon_notify_hdr.status) & TX_STATUS_MSK,
  2108. beacon->beacon_notify_hdr.failure_frame,
  2109. le32_to_cpu(beacon->ibss_mgr_status),
  2110. le32_to_cpu(beacon->high_tsf),
  2111. le32_to_cpu(beacon->low_tsf), rate);
  2112. #endif
  2113. if ((priv->iw_mode == NL80211_IFTYPE_AP) &&
  2114. (!test_bit(STATUS_EXIT_PENDING, &priv->status)))
  2115. queue_work(priv->workqueue, &priv->beacon_update);
  2116. }
  2117. /* Service response to REPLY_SCAN_CMD (0x80) */
  2118. static void iwl3945_rx_reply_scan(struct iwl_priv *priv,
  2119. struct iwl_rx_mem_buffer *rxb)
  2120. {
  2121. #ifdef CONFIG_IWL3945_DEBUG
  2122. struct iwl_rx_packet *pkt = (void *)rxb->skb->data;
  2123. struct iwl_scanreq_notification *notif =
  2124. (struct iwl_scanreq_notification *)pkt->u.raw;
  2125. IWL_DEBUG_RX("Scan request status = 0x%x\n", notif->status);
  2126. #endif
  2127. }
  2128. /* Service SCAN_START_NOTIFICATION (0x82) */
  2129. static void iwl3945_rx_scan_start_notif(struct iwl_priv *priv,
  2130. struct iwl_rx_mem_buffer *rxb)
  2131. {
  2132. struct iwl_rx_packet *pkt = (void *)rxb->skb->data;
  2133. struct iwl_scanstart_notification *notif =
  2134. (struct iwl_scanstart_notification *)pkt->u.raw;
  2135. priv->scan_start_tsf = le32_to_cpu(notif->tsf_low);
  2136. IWL_DEBUG_SCAN("Scan start: "
  2137. "%d [802.11%s] "
  2138. "(TSF: 0x%08X:%08X) - %d (beacon timer %u)\n",
  2139. notif->channel,
  2140. notif->band ? "bg" : "a",
  2141. notif->tsf_high,
  2142. notif->tsf_low, notif->status, notif->beacon_timer);
  2143. }
  2144. /* Service SCAN_RESULTS_NOTIFICATION (0x83) */
  2145. static void iwl3945_rx_scan_results_notif(struct iwl_priv *priv,
  2146. struct iwl_rx_mem_buffer *rxb)
  2147. {
  2148. #ifdef CONFIG_IWLWIFI_DEBUG
  2149. struct iwl_rx_packet *pkt = (void *)rxb->skb->data;
  2150. struct iwl_scanresults_notification *notif =
  2151. (struct iwl_scanresults_notification *)pkt->u.raw;
  2152. #endif
  2153. IWL_DEBUG_SCAN("Scan ch.res: "
  2154. "%d [802.11%s] "
  2155. "(TSF: 0x%08X:%08X) - %d "
  2156. "elapsed=%lu usec (%dms since last)\n",
  2157. notif->channel,
  2158. notif->band ? "bg" : "a",
  2159. le32_to_cpu(notif->tsf_high),
  2160. le32_to_cpu(notif->tsf_low),
  2161. le32_to_cpu(notif->statistics[0]),
  2162. le32_to_cpu(notif->tsf_low) - priv->scan_start_tsf,
  2163. jiffies_to_msecs(elapsed_jiffies
  2164. (priv->last_scan_jiffies, jiffies)));
  2165. priv->last_scan_jiffies = jiffies;
  2166. priv->next_scan_jiffies = 0;
  2167. }
  2168. /* Service SCAN_COMPLETE_NOTIFICATION (0x84) */
  2169. static void iwl3945_rx_scan_complete_notif(struct iwl_priv *priv,
  2170. struct iwl_rx_mem_buffer *rxb)
  2171. {
  2172. #ifdef CONFIG_IWLWIFI_DEBUG
  2173. struct iwl_rx_packet *pkt = (void *)rxb->skb->data;
  2174. struct iwl_scancomplete_notification *scan_notif = (void *)pkt->u.raw;
  2175. #endif
  2176. IWL_DEBUG_SCAN("Scan complete: %d channels (TSF 0x%08X:%08X) - %d\n",
  2177. scan_notif->scanned_channels,
  2178. scan_notif->tsf_low,
  2179. scan_notif->tsf_high, scan_notif->status);
  2180. /* The HW is no longer scanning */
  2181. clear_bit(STATUS_SCAN_HW, &priv->status);
  2182. /* The scan completion notification came in, so kill that timer... */
  2183. cancel_delayed_work(&priv->scan_check);
  2184. IWL_DEBUG_INFO("Scan pass on %sGHz took %dms\n",
  2185. (priv->scan_bands & BIT(IEEE80211_BAND_2GHZ)) ?
  2186. "2.4" : "5.2",
  2187. jiffies_to_msecs(elapsed_jiffies
  2188. (priv->scan_pass_start, jiffies)));
  2189. /* Remove this scanned band from the list of pending
  2190. * bands to scan, band G precedes A in order of scanning
  2191. * as seen in iwl3945_bg_request_scan */
  2192. if (priv->scan_bands & BIT(IEEE80211_BAND_2GHZ))
  2193. priv->scan_bands &= ~BIT(IEEE80211_BAND_2GHZ);
  2194. else if (priv->scan_bands & BIT(IEEE80211_BAND_5GHZ))
  2195. priv->scan_bands &= ~BIT(IEEE80211_BAND_5GHZ);
  2196. /* If a request to abort was given, or the scan did not succeed
  2197. * then we reset the scan state machine and terminate,
  2198. * re-queuing another scan if one has been requested */
  2199. if (test_bit(STATUS_SCAN_ABORTING, &priv->status)) {
  2200. IWL_DEBUG_INFO("Aborted scan completed.\n");
  2201. clear_bit(STATUS_SCAN_ABORTING, &priv->status);
  2202. } else {
  2203. /* If there are more bands on this scan pass reschedule */
  2204. if (priv->scan_bands > 0)
  2205. goto reschedule;
  2206. }
  2207. priv->last_scan_jiffies = jiffies;
  2208. priv->next_scan_jiffies = 0;
  2209. IWL_DEBUG_INFO("Setting scan to off\n");
  2210. clear_bit(STATUS_SCANNING, &priv->status);
  2211. IWL_DEBUG_INFO("Scan took %dms\n",
  2212. jiffies_to_msecs(elapsed_jiffies(priv->scan_start, jiffies)));
  2213. queue_work(priv->workqueue, &priv->scan_completed);
  2214. return;
  2215. reschedule:
  2216. priv->scan_pass_start = jiffies;
  2217. queue_work(priv->workqueue, &priv->request_scan);
  2218. }
  2219. /* Handle notification from uCode that card's power state is changing
  2220. * due to software, hardware, or critical temperature RFKILL */
  2221. static void iwl3945_rx_card_state_notif(struct iwl_priv *priv,
  2222. struct iwl_rx_mem_buffer *rxb)
  2223. {
  2224. struct iwl_rx_packet *pkt = (void *)rxb->skb->data;
  2225. u32 flags = le32_to_cpu(pkt->u.card_state_notif.flags);
  2226. unsigned long status = priv->status;
  2227. IWL_DEBUG_RF_KILL("Card state received: HW:%s SW:%s\n",
  2228. (flags & HW_CARD_DISABLED) ? "Kill" : "On",
  2229. (flags & SW_CARD_DISABLED) ? "Kill" : "On");
  2230. iwl_write32(priv, CSR_UCODE_DRV_GP1_SET,
  2231. CSR_UCODE_DRV_GP1_BIT_CMD_BLOCKED);
  2232. if (flags & HW_CARD_DISABLED)
  2233. set_bit(STATUS_RF_KILL_HW, &priv->status);
  2234. else
  2235. clear_bit(STATUS_RF_KILL_HW, &priv->status);
  2236. if (flags & SW_CARD_DISABLED)
  2237. set_bit(STATUS_RF_KILL_SW, &priv->status);
  2238. else
  2239. clear_bit(STATUS_RF_KILL_SW, &priv->status);
  2240. iwl_scan_cancel(priv);
  2241. if ((test_bit(STATUS_RF_KILL_HW, &status) !=
  2242. test_bit(STATUS_RF_KILL_HW, &priv->status)) ||
  2243. (test_bit(STATUS_RF_KILL_SW, &status) !=
  2244. test_bit(STATUS_RF_KILL_SW, &priv->status)))
  2245. queue_work(priv->workqueue, &priv->rf_kill);
  2246. else
  2247. wake_up_interruptible(&priv->wait_command_queue);
  2248. }
  2249. /**
  2250. * iwl3945_setup_rx_handlers - Initialize Rx handler callbacks
  2251. *
  2252. * Setup the RX handlers for each of the reply types sent from the uCode
  2253. * to the host.
  2254. *
  2255. * This function chains into the hardware specific files for them to setup
  2256. * any hardware specific handlers as well.
  2257. */
  2258. static void iwl3945_setup_rx_handlers(struct iwl_priv *priv)
  2259. {
  2260. priv->rx_handlers[REPLY_ALIVE] = iwl3945_rx_reply_alive;
  2261. priv->rx_handlers[REPLY_ADD_STA] = iwl3945_rx_reply_add_sta;
  2262. priv->rx_handlers[REPLY_ERROR] = iwl3945_rx_reply_error;
  2263. priv->rx_handlers[CHANNEL_SWITCH_NOTIFICATION] = iwl3945_rx_csa;
  2264. priv->rx_handlers[SPECTRUM_MEASURE_NOTIFICATION] =
  2265. iwl3945_rx_spectrum_measure_notif;
  2266. priv->rx_handlers[PM_SLEEP_NOTIFICATION] = iwl3945_rx_pm_sleep_notif;
  2267. priv->rx_handlers[PM_DEBUG_STATISTIC_NOTIFIC] =
  2268. iwl3945_rx_pm_debug_statistics_notif;
  2269. priv->rx_handlers[BEACON_NOTIFICATION] = iwl3945_rx_beacon_notif;
  2270. /*
  2271. * The same handler is used for both the REPLY to a discrete
  2272. * statistics request from the host as well as for the periodic
  2273. * statistics notifications (after received beacons) from the uCode.
  2274. */
  2275. priv->rx_handlers[REPLY_STATISTICS_CMD] = iwl3945_hw_rx_statistics;
  2276. priv->rx_handlers[STATISTICS_NOTIFICATION] = iwl3945_hw_rx_statistics;
  2277. priv->rx_handlers[REPLY_SCAN_CMD] = iwl3945_rx_reply_scan;
  2278. priv->rx_handlers[SCAN_START_NOTIFICATION] = iwl3945_rx_scan_start_notif;
  2279. priv->rx_handlers[SCAN_RESULTS_NOTIFICATION] =
  2280. iwl3945_rx_scan_results_notif;
  2281. priv->rx_handlers[SCAN_COMPLETE_NOTIFICATION] =
  2282. iwl3945_rx_scan_complete_notif;
  2283. priv->rx_handlers[CARD_STATE_NOTIFICATION] = iwl3945_rx_card_state_notif;
  2284. /* Set up hardware specific Rx handlers */
  2285. iwl3945_hw_rx_handler_setup(priv);
  2286. }
  2287. /**
  2288. * iwl3945_cmd_queue_reclaim - Reclaim CMD queue entries
  2289. * When FW advances 'R' index, all entries between old and new 'R' index
  2290. * need to be reclaimed.
  2291. */
  2292. static void iwl3945_cmd_queue_reclaim(struct iwl_priv *priv,
  2293. int txq_id, int index)
  2294. {
  2295. struct iwl_tx_queue *txq = &priv->txq[txq_id];
  2296. struct iwl_queue *q = &txq->q;
  2297. int nfreed = 0;
  2298. if ((index >= q->n_bd) || (iwl_queue_used(q, index) == 0)) {
  2299. IWL_ERR(priv, "Read index for DMA queue txq id (%d), index %d, "
  2300. "is out of range [0-%d] %d %d.\n", txq_id,
  2301. index, q->n_bd, q->write_ptr, q->read_ptr);
  2302. return;
  2303. }
  2304. for (index = iwl_queue_inc_wrap(index, q->n_bd); q->read_ptr != index;
  2305. q->read_ptr = iwl_queue_inc_wrap(q->read_ptr, q->n_bd)) {
  2306. if (nfreed > 1) {
  2307. IWL_ERR(priv, "HCMD skipped: index (%d) %d %d\n", index,
  2308. q->write_ptr, q->read_ptr);
  2309. queue_work(priv->workqueue, &priv->restart);
  2310. break;
  2311. }
  2312. nfreed++;
  2313. }
  2314. }
  2315. /**
  2316. * iwl3945_tx_cmd_complete - Pull unused buffers off the queue and reclaim them
  2317. * @rxb: Rx buffer to reclaim
  2318. *
  2319. * If an Rx buffer has an async callback associated with it the callback
  2320. * will be executed. The attached skb (if present) will only be freed
  2321. * if the callback returns 1
  2322. */
  2323. static void iwl3945_tx_cmd_complete(struct iwl_priv *priv,
  2324. struct iwl_rx_mem_buffer *rxb)
  2325. {
  2326. struct iwl_rx_packet *pkt = (struct iwl_rx_packet *)rxb->skb->data;
  2327. u16 sequence = le16_to_cpu(pkt->hdr.sequence);
  2328. int txq_id = SEQ_TO_QUEUE(sequence);
  2329. int index = SEQ_TO_INDEX(sequence);
  2330. int huge = !!(pkt->hdr.sequence & SEQ_HUGE_FRAME);
  2331. int cmd_index;
  2332. struct iwl_cmd *cmd;
  2333. if (WARN(txq_id != IWL_CMD_QUEUE_NUM,
  2334. "wrong command queue %d, sequence 0x%X readp=%d writep=%d\n",
  2335. txq_id, sequence,
  2336. priv->txq[IWL_CMD_QUEUE_NUM].q.read_ptr,
  2337. priv->txq[IWL_CMD_QUEUE_NUM].q.write_ptr)) {
  2338. iwl_print_hex_dump(priv, IWL_DL_INFO , rxb, 32);
  2339. return;
  2340. }
  2341. cmd_index = get_cmd_index(&priv->txq[IWL_CMD_QUEUE_NUM].q, index, huge);
  2342. cmd = priv->txq[IWL_CMD_QUEUE_NUM].cmd[cmd_index];
  2343. /* Input error checking is done when commands are added to queue. */
  2344. if (cmd->meta.flags & CMD_WANT_SKB) {
  2345. cmd->meta.source->u.skb = rxb->skb;
  2346. rxb->skb = NULL;
  2347. } else if (cmd->meta.u.callback &&
  2348. !cmd->meta.u.callback(priv, cmd, rxb->skb))
  2349. rxb->skb = NULL;
  2350. iwl3945_cmd_queue_reclaim(priv, txq_id, index);
  2351. if (!(cmd->meta.flags & CMD_ASYNC)) {
  2352. clear_bit(STATUS_HCMD_ACTIVE, &priv->status);
  2353. wake_up_interruptible(&priv->wait_command_queue);
  2354. }
  2355. }
  2356. /************************** RX-FUNCTIONS ****************************/
  2357. /*
  2358. * Rx theory of operation
  2359. *
  2360. * The host allocates 32 DMA target addresses and passes the host address
  2361. * to the firmware at register IWL_RFDS_TABLE_LOWER + N * RFD_SIZE where N is
  2362. * 0 to 31
  2363. *
  2364. * Rx Queue Indexes
  2365. * The host/firmware share two index registers for managing the Rx buffers.
  2366. *
  2367. * The READ index maps to the first position that the firmware may be writing
  2368. * to -- the driver can read up to (but not including) this position and get
  2369. * good data.
  2370. * The READ index is managed by the firmware once the card is enabled.
  2371. *
  2372. * The WRITE index maps to the last position the driver has read from -- the
  2373. * position preceding WRITE is the last slot the firmware can place a packet.
  2374. *
  2375. * The queue is empty (no good data) if WRITE = READ - 1, and is full if
  2376. * WRITE = READ.
  2377. *
  2378. * During initialization, the host sets up the READ queue position to the first
  2379. * INDEX position, and WRITE to the last (READ - 1 wrapped)
  2380. *
  2381. * When the firmware places a packet in a buffer, it will advance the READ index
  2382. * and fire the RX interrupt. The driver can then query the READ index and
  2383. * process as many packets as possible, moving the WRITE index forward as it
  2384. * resets the Rx queue buffers with new memory.
  2385. *
  2386. * The management in the driver is as follows:
  2387. * + A list of pre-allocated SKBs is stored in iwl->rxq->rx_free. When
  2388. * iwl->rxq->free_count drops to or below RX_LOW_WATERMARK, work is scheduled
  2389. * to replenish the iwl->rxq->rx_free.
  2390. * + In iwl3945_rx_replenish (scheduled) if 'processed' != 'read' then the
  2391. * iwl->rxq is replenished and the READ INDEX is updated (updating the
  2392. * 'processed' and 'read' driver indexes as well)
  2393. * + A received packet is processed and handed to the kernel network stack,
  2394. * detached from the iwl->rxq. The driver 'processed' index is updated.
  2395. * + The Host/Firmware iwl->rxq is replenished at tasklet time from the rx_free
  2396. * list. If there are no allocated buffers in iwl->rxq->rx_free, the READ
  2397. * INDEX is not incremented and iwl->status(RX_STALLED) is set. If there
  2398. * were enough free buffers and RX_STALLED is set it is cleared.
  2399. *
  2400. *
  2401. * Driver sequence:
  2402. *
  2403. * iwl3945_rx_replenish() Replenishes rx_free list from rx_used, and calls
  2404. * iwl3945_rx_queue_restock
  2405. * iwl3945_rx_queue_restock() Moves available buffers from rx_free into Rx
  2406. * queue, updates firmware pointers, and updates
  2407. * the WRITE index. If insufficient rx_free buffers
  2408. * are available, schedules iwl3945_rx_replenish
  2409. *
  2410. * -- enable interrupts --
  2411. * ISR - iwl3945_rx() Detach iwl_rx_mem_buffers from pool up to the
  2412. * READ INDEX, detaching the SKB from the pool.
  2413. * Moves the packet buffer from queue to rx_used.
  2414. * Calls iwl3945_rx_queue_restock to refill any empty
  2415. * slots.
  2416. * ...
  2417. *
  2418. */
  2419. /**
  2420. * iwl3945_dma_addr2rbd_ptr - convert a DMA address to a uCode read buffer ptr
  2421. */
  2422. static inline __le32 iwl3945_dma_addr2rbd_ptr(struct iwl_priv *priv,
  2423. dma_addr_t dma_addr)
  2424. {
  2425. return cpu_to_le32((u32)dma_addr);
  2426. }
  2427. /**
  2428. * iwl3945_rx_queue_restock - refill RX queue from pre-allocated pool
  2429. *
  2430. * If there are slots in the RX queue that need to be restocked,
  2431. * and we have free pre-allocated buffers, fill the ranks as much
  2432. * as we can, pulling from rx_free.
  2433. *
  2434. * This moves the 'write' index forward to catch up with 'processed', and
  2435. * also updates the memory address in the firmware to reference the new
  2436. * target buffer.
  2437. */
  2438. static int iwl3945_rx_queue_restock(struct iwl_priv *priv)
  2439. {
  2440. struct iwl_rx_queue *rxq = &priv->rxq;
  2441. struct list_head *element;
  2442. struct iwl_rx_mem_buffer *rxb;
  2443. unsigned long flags;
  2444. int write, rc;
  2445. spin_lock_irqsave(&rxq->lock, flags);
  2446. write = rxq->write & ~0x7;
  2447. while ((iwl_rx_queue_space(rxq) > 0) && (rxq->free_count)) {
  2448. /* Get next free Rx buffer, remove from free list */
  2449. element = rxq->rx_free.next;
  2450. rxb = list_entry(element, struct iwl_rx_mem_buffer, list);
  2451. list_del(element);
  2452. /* Point to Rx buffer via next RBD in circular buffer */
  2453. rxq->bd[rxq->write] = iwl3945_dma_addr2rbd_ptr(priv, rxb->real_dma_addr);
  2454. rxq->queue[rxq->write] = rxb;
  2455. rxq->write = (rxq->write + 1) & RX_QUEUE_MASK;
  2456. rxq->free_count--;
  2457. }
  2458. spin_unlock_irqrestore(&rxq->lock, flags);
  2459. /* If the pre-allocated buffer pool is dropping low, schedule to
  2460. * refill it */
  2461. if (rxq->free_count <= RX_LOW_WATERMARK)
  2462. queue_work(priv->workqueue, &priv->rx_replenish);
  2463. /* If we've added more space for the firmware to place data, tell it.
  2464. * Increment device's write pointer in multiples of 8. */
  2465. if ((write != (rxq->write & ~0x7))
  2466. || (abs(rxq->write - rxq->read) > 7)) {
  2467. spin_lock_irqsave(&rxq->lock, flags);
  2468. rxq->need_update = 1;
  2469. spin_unlock_irqrestore(&rxq->lock, flags);
  2470. rc = iwl_rx_queue_update_write_ptr(priv, rxq);
  2471. if (rc)
  2472. return rc;
  2473. }
  2474. return 0;
  2475. }
  2476. /**
  2477. * iwl3945_rx_replenish - Move all used packet from rx_used to rx_free
  2478. *
  2479. * When moving to rx_free an SKB is allocated for the slot.
  2480. *
  2481. * Also restock the Rx queue via iwl3945_rx_queue_restock.
  2482. * This is called as a scheduled work item (except for during initialization)
  2483. */
  2484. static void iwl3945_rx_allocate(struct iwl_priv *priv)
  2485. {
  2486. struct iwl_rx_queue *rxq = &priv->rxq;
  2487. struct list_head *element;
  2488. struct iwl_rx_mem_buffer *rxb;
  2489. unsigned long flags;
  2490. spin_lock_irqsave(&rxq->lock, flags);
  2491. while (!list_empty(&rxq->rx_used)) {
  2492. element = rxq->rx_used.next;
  2493. rxb = list_entry(element, struct iwl_rx_mem_buffer, list);
  2494. /* Alloc a new receive buffer */
  2495. rxb->skb =
  2496. alloc_skb(priv->hw_params.rx_buf_size,
  2497. __GFP_NOWARN | GFP_ATOMIC);
  2498. if (!rxb->skb) {
  2499. if (net_ratelimit())
  2500. IWL_CRIT(priv, ": Can not allocate SKB buffers\n");
  2501. /* We don't reschedule replenish work here -- we will
  2502. * call the restock method and if it still needs
  2503. * more buffers it will schedule replenish */
  2504. break;
  2505. }
  2506. /* If radiotap head is required, reserve some headroom here.
  2507. * The physical head count is a variable rx_stats->phy_count.
  2508. * We reserve 4 bytes here. Plus these extra bytes, the
  2509. * headroom of the physical head should be enough for the
  2510. * radiotap head that iwl3945 supported. See iwl3945_rt.
  2511. */
  2512. skb_reserve(rxb->skb, 4);
  2513. priv->alloc_rxb_skb++;
  2514. list_del(element);
  2515. /* Get physical address of RB/SKB */
  2516. rxb->real_dma_addr = pci_map_single(priv->pci_dev,
  2517. rxb->skb->data,
  2518. priv->hw_params.rx_buf_size,
  2519. PCI_DMA_FROMDEVICE);
  2520. list_add_tail(&rxb->list, &rxq->rx_free);
  2521. rxq->free_count++;
  2522. }
  2523. spin_unlock_irqrestore(&rxq->lock, flags);
  2524. }
  2525. /*
  2526. * this should be called while priv->lock is locked
  2527. */
  2528. static void __iwl3945_rx_replenish(void *data)
  2529. {
  2530. struct iwl_priv *priv = data;
  2531. iwl3945_rx_allocate(priv);
  2532. iwl3945_rx_queue_restock(priv);
  2533. }
  2534. void iwl3945_rx_replenish(void *data)
  2535. {
  2536. struct iwl_priv *priv = data;
  2537. unsigned long flags;
  2538. iwl3945_rx_allocate(priv);
  2539. spin_lock_irqsave(&priv->lock, flags);
  2540. iwl3945_rx_queue_restock(priv);
  2541. spin_unlock_irqrestore(&priv->lock, flags);
  2542. }
  2543. /* Convert linear signal-to-noise ratio into dB */
  2544. static u8 ratio2dB[100] = {
  2545. /* 0 1 2 3 4 5 6 7 8 9 */
  2546. 0, 0, 6, 10, 12, 14, 16, 17, 18, 19, /* 00 - 09 */
  2547. 20, 21, 22, 22, 23, 23, 24, 25, 26, 26, /* 10 - 19 */
  2548. 26, 26, 26, 27, 27, 28, 28, 28, 29, 29, /* 20 - 29 */
  2549. 29, 30, 30, 30, 31, 31, 31, 31, 32, 32, /* 30 - 39 */
  2550. 32, 32, 32, 33, 33, 33, 33, 33, 34, 34, /* 40 - 49 */
  2551. 34, 34, 34, 34, 35, 35, 35, 35, 35, 35, /* 50 - 59 */
  2552. 36, 36, 36, 36, 36, 36, 36, 37, 37, 37, /* 60 - 69 */
  2553. 37, 37, 37, 37, 37, 38, 38, 38, 38, 38, /* 70 - 79 */
  2554. 38, 38, 38, 38, 38, 39, 39, 39, 39, 39, /* 80 - 89 */
  2555. 39, 39, 39, 39, 39, 40, 40, 40, 40, 40 /* 90 - 99 */
  2556. };
  2557. /* Calculates a relative dB value from a ratio of linear
  2558. * (i.e. not dB) signal levels.
  2559. * Conversion assumes that levels are voltages (20*log), not powers (10*log). */
  2560. int iwl3945_calc_db_from_ratio(int sig_ratio)
  2561. {
  2562. /* 1000:1 or higher just report as 60 dB */
  2563. if (sig_ratio >= 1000)
  2564. return 60;
  2565. /* 100:1 or higher, divide by 10 and use table,
  2566. * add 20 dB to make up for divide by 10 */
  2567. if (sig_ratio >= 100)
  2568. return 20 + (int)ratio2dB[sig_ratio/10];
  2569. /* We shouldn't see this */
  2570. if (sig_ratio < 1)
  2571. return 0;
  2572. /* Use table for ratios 1:1 - 99:1 */
  2573. return (int)ratio2dB[sig_ratio];
  2574. }
  2575. #define PERFECT_RSSI (-20) /* dBm */
  2576. #define WORST_RSSI (-95) /* dBm */
  2577. #define RSSI_RANGE (PERFECT_RSSI - WORST_RSSI)
  2578. /* Calculate an indication of rx signal quality (a percentage, not dBm!).
  2579. * See http://www.ces.clemson.edu/linux/signal_quality.shtml for info
  2580. * about formulas used below. */
  2581. int iwl3945_calc_sig_qual(int rssi_dbm, int noise_dbm)
  2582. {
  2583. int sig_qual;
  2584. int degradation = PERFECT_RSSI - rssi_dbm;
  2585. /* If we get a noise measurement, use signal-to-noise ratio (SNR)
  2586. * as indicator; formula is (signal dbm - noise dbm).
  2587. * SNR at or above 40 is a great signal (100%).
  2588. * Below that, scale to fit SNR of 0 - 40 dB within 0 - 100% indicator.
  2589. * Weakest usable signal is usually 10 - 15 dB SNR. */
  2590. if (noise_dbm) {
  2591. if (rssi_dbm - noise_dbm >= 40)
  2592. return 100;
  2593. else if (rssi_dbm < noise_dbm)
  2594. return 0;
  2595. sig_qual = ((rssi_dbm - noise_dbm) * 5) / 2;
  2596. /* Else use just the signal level.
  2597. * This formula is a least squares fit of data points collected and
  2598. * compared with a reference system that had a percentage (%) display
  2599. * for signal quality. */
  2600. } else
  2601. sig_qual = (100 * (RSSI_RANGE * RSSI_RANGE) - degradation *
  2602. (15 * RSSI_RANGE + 62 * degradation)) /
  2603. (RSSI_RANGE * RSSI_RANGE);
  2604. if (sig_qual > 100)
  2605. sig_qual = 100;
  2606. else if (sig_qual < 1)
  2607. sig_qual = 0;
  2608. return sig_qual;
  2609. }
  2610. /**
  2611. * iwl3945_rx_handle - Main entry function for receiving responses from uCode
  2612. *
  2613. * Uses the priv->rx_handlers callback function array to invoke
  2614. * the appropriate handlers, including command responses,
  2615. * frame-received notifications, and other notifications.
  2616. */
  2617. static void iwl3945_rx_handle(struct iwl_priv *priv)
  2618. {
  2619. struct iwl_rx_mem_buffer *rxb;
  2620. struct iwl_rx_packet *pkt;
  2621. struct iwl_rx_queue *rxq = &priv->rxq;
  2622. u32 r, i;
  2623. int reclaim;
  2624. unsigned long flags;
  2625. u8 fill_rx = 0;
  2626. u32 count = 8;
  2627. /* uCode's read index (stored in shared DRAM) indicates the last Rx
  2628. * buffer that the driver may process (last buffer filled by ucode). */
  2629. r = le16_to_cpu(rxq->rb_stts->closed_rb_num) & 0x0FFF;
  2630. i = rxq->read;
  2631. if (iwl_rx_queue_space(rxq) > (RX_QUEUE_SIZE / 2))
  2632. fill_rx = 1;
  2633. /* Rx interrupt, but nothing sent from uCode */
  2634. if (i == r)
  2635. IWL_DEBUG(IWL_DL_RX | IWL_DL_ISR, "r = %d, i = %d\n", r, i);
  2636. while (i != r) {
  2637. rxb = rxq->queue[i];
  2638. /* If an RXB doesn't have a Rx queue slot associated with it,
  2639. * then a bug has been introduced in the queue refilling
  2640. * routines -- catch it here */
  2641. BUG_ON(rxb == NULL);
  2642. rxq->queue[i] = NULL;
  2643. pci_dma_sync_single_for_cpu(priv->pci_dev, rxb->real_dma_addr,
  2644. priv->hw_params.rx_buf_size,
  2645. PCI_DMA_FROMDEVICE);
  2646. pkt = (struct iwl_rx_packet *)rxb->skb->data;
  2647. /* Reclaim a command buffer only if this packet is a response
  2648. * to a (driver-originated) command.
  2649. * If the packet (e.g. Rx frame) originated from uCode,
  2650. * there is no command buffer to reclaim.
  2651. * Ucode should set SEQ_RX_FRAME bit if ucode-originated,
  2652. * but apparently a few don't get set; catch them here. */
  2653. reclaim = !(pkt->hdr.sequence & SEQ_RX_FRAME) &&
  2654. (pkt->hdr.cmd != STATISTICS_NOTIFICATION) &&
  2655. (pkt->hdr.cmd != REPLY_TX);
  2656. /* Based on type of command response or notification,
  2657. * handle those that need handling via function in
  2658. * rx_handlers table. See iwl3945_setup_rx_handlers() */
  2659. if (priv->rx_handlers[pkt->hdr.cmd]) {
  2660. IWL_DEBUG(IWL_DL_HCMD | IWL_DL_RX | IWL_DL_ISR,
  2661. "r = %d, i = %d, %s, 0x%02x\n", r, i,
  2662. get_cmd_string(pkt->hdr.cmd), pkt->hdr.cmd);
  2663. priv->rx_handlers[pkt->hdr.cmd] (priv, rxb);
  2664. } else {
  2665. /* No handling needed */
  2666. IWL_DEBUG(IWL_DL_HCMD | IWL_DL_RX | IWL_DL_ISR,
  2667. "r %d i %d No handler needed for %s, 0x%02x\n",
  2668. r, i, get_cmd_string(pkt->hdr.cmd),
  2669. pkt->hdr.cmd);
  2670. }
  2671. if (reclaim) {
  2672. /* Invoke any callbacks, transfer the skb to caller, and
  2673. * fire off the (possibly) blocking iwl_send_cmd()
  2674. * as we reclaim the driver command queue */
  2675. if (rxb && rxb->skb)
  2676. iwl3945_tx_cmd_complete(priv, rxb);
  2677. else
  2678. IWL_WARN(priv, "Claim null rxb?\n");
  2679. }
  2680. /* For now we just don't re-use anything. We can tweak this
  2681. * later to try and re-use notification packets and SKBs that
  2682. * fail to Rx correctly */
  2683. if (rxb->skb != NULL) {
  2684. priv->alloc_rxb_skb--;
  2685. dev_kfree_skb_any(rxb->skb);
  2686. rxb->skb = NULL;
  2687. }
  2688. pci_unmap_single(priv->pci_dev, rxb->real_dma_addr,
  2689. priv->hw_params.rx_buf_size,
  2690. PCI_DMA_FROMDEVICE);
  2691. spin_lock_irqsave(&rxq->lock, flags);
  2692. list_add_tail(&rxb->list, &priv->rxq.rx_used);
  2693. spin_unlock_irqrestore(&rxq->lock, flags);
  2694. i = (i + 1) & RX_QUEUE_MASK;
  2695. /* If there are a lot of unused frames,
  2696. * restock the Rx queue so ucode won't assert. */
  2697. if (fill_rx) {
  2698. count++;
  2699. if (count >= 8) {
  2700. priv->rxq.read = i;
  2701. __iwl3945_rx_replenish(priv);
  2702. count = 0;
  2703. }
  2704. }
  2705. }
  2706. /* Backtrack one entry */
  2707. priv->rxq.read = i;
  2708. iwl3945_rx_queue_restock(priv);
  2709. }
  2710. #ifdef CONFIG_IWL3945_DEBUG
  2711. static void iwl3945_print_rx_config_cmd(struct iwl_priv *priv,
  2712. struct iwl3945_rxon_cmd *rxon)
  2713. {
  2714. IWL_DEBUG_RADIO("RX CONFIG:\n");
  2715. iwl_print_hex_dump(priv, IWL_DL_RADIO, (u8 *) rxon, sizeof(*rxon));
  2716. IWL_DEBUG_RADIO("u16 channel: 0x%x\n", le16_to_cpu(rxon->channel));
  2717. IWL_DEBUG_RADIO("u32 flags: 0x%08X\n", le32_to_cpu(rxon->flags));
  2718. IWL_DEBUG_RADIO("u32 filter_flags: 0x%08x\n",
  2719. le32_to_cpu(rxon->filter_flags));
  2720. IWL_DEBUG_RADIO("u8 dev_type: 0x%x\n", rxon->dev_type);
  2721. IWL_DEBUG_RADIO("u8 ofdm_basic_rates: 0x%02x\n",
  2722. rxon->ofdm_basic_rates);
  2723. IWL_DEBUG_RADIO("u8 cck_basic_rates: 0x%02x\n", rxon->cck_basic_rates);
  2724. IWL_DEBUG_RADIO("u8[6] node_addr: %pM\n", rxon->node_addr);
  2725. IWL_DEBUG_RADIO("u8[6] bssid_addr: %pM\n", rxon->bssid_addr);
  2726. IWL_DEBUG_RADIO("u16 assoc_id: 0x%x\n", le16_to_cpu(rxon->assoc_id));
  2727. }
  2728. #endif
  2729. static void iwl3945_enable_interrupts(struct iwl_priv *priv)
  2730. {
  2731. IWL_DEBUG_ISR("Enabling interrupts\n");
  2732. set_bit(STATUS_INT_ENABLED, &priv->status);
  2733. iwl_write32(priv, CSR_INT_MASK, CSR_INI_SET_MASK);
  2734. }
  2735. /* call this function to flush any scheduled tasklet */
  2736. static inline void iwl_synchronize_irq(struct iwl_priv *priv)
  2737. {
  2738. /* wait to make sure we flush pending tasklet*/
  2739. synchronize_irq(priv->pci_dev->irq);
  2740. tasklet_kill(&priv->irq_tasklet);
  2741. }
  2742. static inline void iwl3945_disable_interrupts(struct iwl_priv *priv)
  2743. {
  2744. clear_bit(STATUS_INT_ENABLED, &priv->status);
  2745. /* disable interrupts from uCode/NIC to host */
  2746. iwl_write32(priv, CSR_INT_MASK, 0x00000000);
  2747. /* acknowledge/clear/reset any interrupts still pending
  2748. * from uCode or flow handler (Rx/Tx DMA) */
  2749. iwl_write32(priv, CSR_INT, 0xffffffff);
  2750. iwl_write32(priv, CSR_FH_INT_STATUS, 0xffffffff);
  2751. IWL_DEBUG_ISR("Disabled interrupts\n");
  2752. }
  2753. static const char *desc_lookup(int i)
  2754. {
  2755. switch (i) {
  2756. case 1:
  2757. return "FAIL";
  2758. case 2:
  2759. return "BAD_PARAM";
  2760. case 3:
  2761. return "BAD_CHECKSUM";
  2762. case 4:
  2763. return "NMI_INTERRUPT";
  2764. case 5:
  2765. return "SYSASSERT";
  2766. case 6:
  2767. return "FATAL_ERROR";
  2768. }
  2769. return "UNKNOWN";
  2770. }
  2771. #define ERROR_START_OFFSET (1 * sizeof(u32))
  2772. #define ERROR_ELEM_SIZE (7 * sizeof(u32))
  2773. static void iwl3945_dump_nic_error_log(struct iwl_priv *priv)
  2774. {
  2775. u32 i;
  2776. u32 desc, time, count, base, data1;
  2777. u32 blink1, blink2, ilink1, ilink2;
  2778. int rc;
  2779. base = le32_to_cpu(priv->card_alive.error_event_table_ptr);
  2780. if (!iwl3945_hw_valid_rtc_data_addr(base)) {
  2781. IWL_ERR(priv, "Not valid error log pointer 0x%08X\n", base);
  2782. return;
  2783. }
  2784. rc = iwl_grab_nic_access(priv);
  2785. if (rc) {
  2786. IWL_WARN(priv, "Can not read from adapter at this time.\n");
  2787. return;
  2788. }
  2789. count = iwl_read_targ_mem(priv, base);
  2790. if (ERROR_START_OFFSET <= count * ERROR_ELEM_SIZE) {
  2791. IWL_ERR(priv, "Start IWL Error Log Dump:\n");
  2792. IWL_ERR(priv, "Status: 0x%08lX, count: %d\n",
  2793. priv->status, count);
  2794. }
  2795. IWL_ERR(priv, "Desc Time asrtPC blink2 "
  2796. "ilink1 nmiPC Line\n");
  2797. for (i = ERROR_START_OFFSET;
  2798. i < (count * ERROR_ELEM_SIZE) + ERROR_START_OFFSET;
  2799. i += ERROR_ELEM_SIZE) {
  2800. desc = iwl_read_targ_mem(priv, base + i);
  2801. time =
  2802. iwl_read_targ_mem(priv, base + i + 1 * sizeof(u32));
  2803. blink1 =
  2804. iwl_read_targ_mem(priv, base + i + 2 * sizeof(u32));
  2805. blink2 =
  2806. iwl_read_targ_mem(priv, base + i + 3 * sizeof(u32));
  2807. ilink1 =
  2808. iwl_read_targ_mem(priv, base + i + 4 * sizeof(u32));
  2809. ilink2 =
  2810. iwl_read_targ_mem(priv, base + i + 5 * sizeof(u32));
  2811. data1 =
  2812. iwl_read_targ_mem(priv, base + i + 6 * sizeof(u32));
  2813. IWL_ERR(priv,
  2814. "%-13s (#%d) %010u 0x%05X 0x%05X 0x%05X 0x%05X %u\n\n",
  2815. desc_lookup(desc), desc, time, blink1, blink2,
  2816. ilink1, ilink2, data1);
  2817. }
  2818. iwl_release_nic_access(priv);
  2819. }
  2820. #define EVENT_START_OFFSET (6 * sizeof(u32))
  2821. /**
  2822. * iwl3945_print_event_log - Dump error event log to syslog
  2823. *
  2824. * NOTE: Must be called with iwl_grab_nic_access() already obtained!
  2825. */
  2826. static void iwl3945_print_event_log(struct iwl_priv *priv, u32 start_idx,
  2827. u32 num_events, u32 mode)
  2828. {
  2829. u32 i;
  2830. u32 base; /* SRAM byte address of event log header */
  2831. u32 event_size; /* 2 u32s, or 3 u32s if timestamp recorded */
  2832. u32 ptr; /* SRAM byte address of log data */
  2833. u32 ev, time, data; /* event log data */
  2834. if (num_events == 0)
  2835. return;
  2836. base = le32_to_cpu(priv->card_alive.log_event_table_ptr);
  2837. if (mode == 0)
  2838. event_size = 2 * sizeof(u32);
  2839. else
  2840. event_size = 3 * sizeof(u32);
  2841. ptr = base + EVENT_START_OFFSET + (start_idx * event_size);
  2842. /* "time" is actually "data" for mode 0 (no timestamp).
  2843. * place event id # at far right for easier visual parsing. */
  2844. for (i = 0; i < num_events; i++) {
  2845. ev = iwl_read_targ_mem(priv, ptr);
  2846. ptr += sizeof(u32);
  2847. time = iwl_read_targ_mem(priv, ptr);
  2848. ptr += sizeof(u32);
  2849. if (mode == 0) {
  2850. /* data, ev */
  2851. IWL_ERR(priv, "0x%08x\t%04u\n", time, ev);
  2852. } else {
  2853. data = iwl_read_targ_mem(priv, ptr);
  2854. ptr += sizeof(u32);
  2855. IWL_ERR(priv, "%010u\t0x%08x\t%04u\n", time, data, ev);
  2856. }
  2857. }
  2858. }
  2859. static void iwl3945_dump_nic_event_log(struct iwl_priv *priv)
  2860. {
  2861. int rc;
  2862. u32 base; /* SRAM byte address of event log header */
  2863. u32 capacity; /* event log capacity in # entries */
  2864. u32 mode; /* 0 - no timestamp, 1 - timestamp recorded */
  2865. u32 num_wraps; /* # times uCode wrapped to top of log */
  2866. u32 next_entry; /* index of next entry to be written by uCode */
  2867. u32 size; /* # entries that we'll print */
  2868. base = le32_to_cpu(priv->card_alive.log_event_table_ptr);
  2869. if (!iwl3945_hw_valid_rtc_data_addr(base)) {
  2870. IWL_ERR(priv, "Invalid event log pointer 0x%08X\n", base);
  2871. return;
  2872. }
  2873. rc = iwl_grab_nic_access(priv);
  2874. if (rc) {
  2875. IWL_WARN(priv, "Can not read from adapter at this time.\n");
  2876. return;
  2877. }
  2878. /* event log header */
  2879. capacity = iwl_read_targ_mem(priv, base);
  2880. mode = iwl_read_targ_mem(priv, base + (1 * sizeof(u32)));
  2881. num_wraps = iwl_read_targ_mem(priv, base + (2 * sizeof(u32)));
  2882. next_entry = iwl_read_targ_mem(priv, base + (3 * sizeof(u32)));
  2883. size = num_wraps ? capacity : next_entry;
  2884. /* bail out if nothing in log */
  2885. if (size == 0) {
  2886. IWL_ERR(priv, "Start IWL Event Log Dump: nothing in log\n");
  2887. iwl_release_nic_access(priv);
  2888. return;
  2889. }
  2890. IWL_ERR(priv, "Start IWL Event Log Dump: display count %d, wraps %d\n",
  2891. size, num_wraps);
  2892. /* if uCode has wrapped back to top of log, start at the oldest entry,
  2893. * i.e the next one that uCode would fill. */
  2894. if (num_wraps)
  2895. iwl3945_print_event_log(priv, next_entry,
  2896. capacity - next_entry, mode);
  2897. /* (then/else) start at top of log */
  2898. iwl3945_print_event_log(priv, 0, next_entry, mode);
  2899. iwl_release_nic_access(priv);
  2900. }
  2901. /**
  2902. * iwl3945_irq_handle_error - called for HW or SW error interrupt from card
  2903. */
  2904. static void iwl3945_irq_handle_error(struct iwl_priv *priv)
  2905. {
  2906. /* Set the FW error flag -- cleared on iwl3945_down */
  2907. set_bit(STATUS_FW_ERROR, &priv->status);
  2908. /* Cancel currently queued command. */
  2909. clear_bit(STATUS_HCMD_ACTIVE, &priv->status);
  2910. #ifdef CONFIG_IWL3945_DEBUG
  2911. if (priv->debug_level & IWL_DL_FW_ERRORS) {
  2912. iwl3945_dump_nic_error_log(priv);
  2913. iwl3945_dump_nic_event_log(priv);
  2914. iwl3945_print_rx_config_cmd(priv, &priv->staging39_rxon);
  2915. }
  2916. #endif
  2917. wake_up_interruptible(&priv->wait_command_queue);
  2918. /* Keep the restart process from trying to send host
  2919. * commands by clearing the INIT status bit */
  2920. clear_bit(STATUS_READY, &priv->status);
  2921. if (!test_bit(STATUS_EXIT_PENDING, &priv->status)) {
  2922. IWL_DEBUG(IWL_DL_INFO | IWL_DL_FW_ERRORS,
  2923. "Restarting adapter due to uCode error.\n");
  2924. if (iwl3945_is_associated(priv)) {
  2925. memcpy(&priv->recovery39_rxon, &priv->active39_rxon,
  2926. sizeof(priv->recovery39_rxon));
  2927. priv->error_recovering = 1;
  2928. }
  2929. queue_work(priv->workqueue, &priv->restart);
  2930. }
  2931. }
  2932. static void iwl3945_error_recovery(struct iwl_priv *priv)
  2933. {
  2934. unsigned long flags;
  2935. memcpy(&priv->staging39_rxon, &priv->recovery39_rxon,
  2936. sizeof(priv->staging39_rxon));
  2937. priv->staging39_rxon.filter_flags &= ~RXON_FILTER_ASSOC_MSK;
  2938. iwl3945_commit_rxon(priv);
  2939. iwl3945_add_station(priv, priv->bssid, 1, 0);
  2940. spin_lock_irqsave(&priv->lock, flags);
  2941. priv->assoc_id = le16_to_cpu(priv->staging39_rxon.assoc_id);
  2942. priv->error_recovering = 0;
  2943. spin_unlock_irqrestore(&priv->lock, flags);
  2944. }
  2945. static void iwl3945_irq_tasklet(struct iwl_priv *priv)
  2946. {
  2947. u32 inta, handled = 0;
  2948. u32 inta_fh;
  2949. unsigned long flags;
  2950. #ifdef CONFIG_IWL3945_DEBUG
  2951. u32 inta_mask;
  2952. #endif
  2953. spin_lock_irqsave(&priv->lock, flags);
  2954. /* Ack/clear/reset pending uCode interrupts.
  2955. * Note: Some bits in CSR_INT are "OR" of bits in CSR_FH_INT_STATUS,
  2956. * and will clear only when CSR_FH_INT_STATUS gets cleared. */
  2957. inta = iwl_read32(priv, CSR_INT);
  2958. iwl_write32(priv, CSR_INT, inta);
  2959. /* Ack/clear/reset pending flow-handler (DMA) interrupts.
  2960. * Any new interrupts that happen after this, either while we're
  2961. * in this tasklet, or later, will show up in next ISR/tasklet. */
  2962. inta_fh = iwl_read32(priv, CSR_FH_INT_STATUS);
  2963. iwl_write32(priv, CSR_FH_INT_STATUS, inta_fh);
  2964. #ifdef CONFIG_IWL3945_DEBUG
  2965. if (priv->debug_level & IWL_DL_ISR) {
  2966. /* just for debug */
  2967. inta_mask = iwl_read32(priv, CSR_INT_MASK);
  2968. IWL_DEBUG_ISR("inta 0x%08x, enabled 0x%08x, fh 0x%08x\n",
  2969. inta, inta_mask, inta_fh);
  2970. }
  2971. #endif
  2972. /* Since CSR_INT and CSR_FH_INT_STATUS reads and clears are not
  2973. * atomic, make sure that inta covers all the interrupts that
  2974. * we've discovered, even if FH interrupt came in just after
  2975. * reading CSR_INT. */
  2976. if (inta_fh & CSR39_FH_INT_RX_MASK)
  2977. inta |= CSR_INT_BIT_FH_RX;
  2978. if (inta_fh & CSR39_FH_INT_TX_MASK)
  2979. inta |= CSR_INT_BIT_FH_TX;
  2980. /* Now service all interrupt bits discovered above. */
  2981. if (inta & CSR_INT_BIT_HW_ERR) {
  2982. IWL_ERR(priv, "Microcode HW error detected. Restarting.\n");
  2983. /* Tell the device to stop sending interrupts */
  2984. iwl3945_disable_interrupts(priv);
  2985. iwl3945_irq_handle_error(priv);
  2986. handled |= CSR_INT_BIT_HW_ERR;
  2987. spin_unlock_irqrestore(&priv->lock, flags);
  2988. return;
  2989. }
  2990. #ifdef CONFIG_IWL3945_DEBUG
  2991. if (priv->debug_level & (IWL_DL_ISR)) {
  2992. /* NIC fires this, but we don't use it, redundant with WAKEUP */
  2993. if (inta & CSR_INT_BIT_SCD)
  2994. IWL_DEBUG_ISR("Scheduler finished to transmit "
  2995. "the frame/frames.\n");
  2996. /* Alive notification via Rx interrupt will do the real work */
  2997. if (inta & CSR_INT_BIT_ALIVE)
  2998. IWL_DEBUG_ISR("Alive interrupt\n");
  2999. }
  3000. #endif
  3001. /* Safely ignore these bits for debug checks below */
  3002. inta &= ~(CSR_INT_BIT_SCD | CSR_INT_BIT_ALIVE);
  3003. /* Error detected by uCode */
  3004. if (inta & CSR_INT_BIT_SW_ERR) {
  3005. IWL_ERR(priv, "Microcode SW error detected. "
  3006. "Restarting 0x%X.\n", inta);
  3007. iwl3945_irq_handle_error(priv);
  3008. handled |= CSR_INT_BIT_SW_ERR;
  3009. }
  3010. /* uCode wakes up after power-down sleep */
  3011. if (inta & CSR_INT_BIT_WAKEUP) {
  3012. IWL_DEBUG_ISR("Wakeup interrupt\n");
  3013. iwl_rx_queue_update_write_ptr(priv, &priv->rxq);
  3014. iwl_txq_update_write_ptr(priv, &priv->txq[0]);
  3015. iwl_txq_update_write_ptr(priv, &priv->txq[1]);
  3016. iwl_txq_update_write_ptr(priv, &priv->txq[2]);
  3017. iwl_txq_update_write_ptr(priv, &priv->txq[3]);
  3018. iwl_txq_update_write_ptr(priv, &priv->txq[4]);
  3019. iwl_txq_update_write_ptr(priv, &priv->txq[5]);
  3020. handled |= CSR_INT_BIT_WAKEUP;
  3021. }
  3022. /* All uCode command responses, including Tx command responses,
  3023. * Rx "responses" (frame-received notification), and other
  3024. * notifications from uCode come through here*/
  3025. if (inta & (CSR_INT_BIT_FH_RX | CSR_INT_BIT_SW_RX)) {
  3026. iwl3945_rx_handle(priv);
  3027. handled |= (CSR_INT_BIT_FH_RX | CSR_INT_BIT_SW_RX);
  3028. }
  3029. if (inta & CSR_INT_BIT_FH_TX) {
  3030. IWL_DEBUG_ISR("Tx interrupt\n");
  3031. iwl_write32(priv, CSR_FH_INT_STATUS, (1 << 6));
  3032. if (!iwl_grab_nic_access(priv)) {
  3033. iwl_write_direct32(priv, FH39_TCSR_CREDIT
  3034. (FH39_SRVC_CHNL), 0x0);
  3035. iwl_release_nic_access(priv);
  3036. }
  3037. handled |= CSR_INT_BIT_FH_TX;
  3038. }
  3039. if (inta & ~handled)
  3040. IWL_ERR(priv, "Unhandled INTA bits 0x%08x\n", inta & ~handled);
  3041. if (inta & ~CSR_INI_SET_MASK) {
  3042. IWL_WARN(priv, "Disabled INTA bits 0x%08x were pending\n",
  3043. inta & ~CSR_INI_SET_MASK);
  3044. IWL_WARN(priv, " with FH_INT = 0x%08x\n", inta_fh);
  3045. }
  3046. /* Re-enable all interrupts */
  3047. /* only Re-enable if disabled by irq */
  3048. if (test_bit(STATUS_INT_ENABLED, &priv->status))
  3049. iwl3945_enable_interrupts(priv);
  3050. #ifdef CONFIG_IWL3945_DEBUG
  3051. if (priv->debug_level & (IWL_DL_ISR)) {
  3052. inta = iwl_read32(priv, CSR_INT);
  3053. inta_mask = iwl_read32(priv, CSR_INT_MASK);
  3054. inta_fh = iwl_read32(priv, CSR_FH_INT_STATUS);
  3055. IWL_DEBUG_ISR("End inta 0x%08x, enabled 0x%08x, fh 0x%08x, "
  3056. "flags 0x%08lx\n", inta, inta_mask, inta_fh, flags);
  3057. }
  3058. #endif
  3059. spin_unlock_irqrestore(&priv->lock, flags);
  3060. }
  3061. static irqreturn_t iwl3945_isr(int irq, void *data)
  3062. {
  3063. struct iwl_priv *priv = data;
  3064. u32 inta, inta_mask;
  3065. u32 inta_fh;
  3066. if (!priv)
  3067. return IRQ_NONE;
  3068. spin_lock(&priv->lock);
  3069. /* Disable (but don't clear!) interrupts here to avoid
  3070. * back-to-back ISRs and sporadic interrupts from our NIC.
  3071. * If we have something to service, the tasklet will re-enable ints.
  3072. * If we *don't* have something, we'll re-enable before leaving here. */
  3073. inta_mask = iwl_read32(priv, CSR_INT_MASK); /* just for debug */
  3074. iwl_write32(priv, CSR_INT_MASK, 0x00000000);
  3075. /* Discover which interrupts are active/pending */
  3076. inta = iwl_read32(priv, CSR_INT);
  3077. inta_fh = iwl_read32(priv, CSR_FH_INT_STATUS);
  3078. /* Ignore interrupt if there's nothing in NIC to service.
  3079. * This may be due to IRQ shared with another device,
  3080. * or due to sporadic interrupts thrown from our NIC. */
  3081. if (!inta && !inta_fh) {
  3082. IWL_DEBUG_ISR("Ignore interrupt, inta == 0, inta_fh == 0\n");
  3083. goto none;
  3084. }
  3085. if ((inta == 0xFFFFFFFF) || ((inta & 0xFFFFFFF0) == 0xa5a5a5a0)) {
  3086. /* Hardware disappeared */
  3087. IWL_WARN(priv, "HARDWARE GONE?? INTA == 0x%08x\n", inta);
  3088. goto unplugged;
  3089. }
  3090. IWL_DEBUG_ISR("ISR inta 0x%08x, enabled 0x%08x, fh 0x%08x\n",
  3091. inta, inta_mask, inta_fh);
  3092. inta &= ~CSR_INT_BIT_SCD;
  3093. /* iwl3945_irq_tasklet() will service interrupts and re-enable them */
  3094. if (likely(inta || inta_fh))
  3095. tasklet_schedule(&priv->irq_tasklet);
  3096. unplugged:
  3097. spin_unlock(&priv->lock);
  3098. return IRQ_HANDLED;
  3099. none:
  3100. /* re-enable interrupts here since we don't have anything to service. */
  3101. /* only Re-enable if disabled by irq */
  3102. if (test_bit(STATUS_INT_ENABLED, &priv->status))
  3103. iwl3945_enable_interrupts(priv);
  3104. spin_unlock(&priv->lock);
  3105. return IRQ_NONE;
  3106. }
  3107. /************************** EEPROM BANDS ****************************
  3108. *
  3109. * The iwl3945_eeprom_band definitions below provide the mapping from the
  3110. * EEPROM contents to the specific channel number supported for each
  3111. * band.
  3112. *
  3113. * For example, iwl3945_priv->eeprom39.band_3_channels[4] from the band_3
  3114. * definition below maps to physical channel 42 in the 5.2GHz spectrum.
  3115. * The specific geography and calibration information for that channel
  3116. * is contained in the eeprom map itself.
  3117. *
  3118. * During init, we copy the eeprom information and channel map
  3119. * information into priv->channel_info_24/52 and priv->channel_map_24/52
  3120. *
  3121. * channel_map_24/52 provides the index in the channel_info array for a
  3122. * given channel. We have to have two separate maps as there is channel
  3123. * overlap with the 2.4GHz and 5.2GHz spectrum as seen in band_1 and
  3124. * band_2
  3125. *
  3126. * A value of 0xff stored in the channel_map indicates that the channel
  3127. * is not supported by the hardware at all.
  3128. *
  3129. * A value of 0xfe in the channel_map indicates that the channel is not
  3130. * valid for Tx with the current hardware. This means that
  3131. * while the system can tune and receive on a given channel, it may not
  3132. * be able to associate or transmit any frames on that
  3133. * channel. There is no corresponding channel information for that
  3134. * entry.
  3135. *
  3136. *********************************************************************/
  3137. /* 2.4 GHz */
  3138. static const u8 iwl3945_eeprom_band_1[14] = {
  3139. 1, 2, 3, 4, 5, 6, 7, 8, 9, 10, 11, 12, 13, 14
  3140. };
  3141. /* 5.2 GHz bands */
  3142. static const u8 iwl3945_eeprom_band_2[] = { /* 4915-5080MHz */
  3143. 183, 184, 185, 187, 188, 189, 192, 196, 7, 8, 11, 12, 16
  3144. };
  3145. static const u8 iwl3945_eeprom_band_3[] = { /* 5170-5320MHz */
  3146. 34, 36, 38, 40, 42, 44, 46, 48, 52, 56, 60, 64
  3147. };
  3148. static const u8 iwl3945_eeprom_band_4[] = { /* 5500-5700MHz */
  3149. 100, 104, 108, 112, 116, 120, 124, 128, 132, 136, 140
  3150. };
  3151. static const u8 iwl3945_eeprom_band_5[] = { /* 5725-5825MHz */
  3152. 145, 149, 153, 157, 161, 165
  3153. };
  3154. static void iwl3945_init_band_reference(const struct iwl_priv *priv, int band,
  3155. int *eeprom_ch_count,
  3156. const struct iwl_eeprom_channel
  3157. **eeprom_ch_info,
  3158. const u8 **eeprom_ch_index)
  3159. {
  3160. switch (band) {
  3161. case 1: /* 2.4GHz band */
  3162. *eeprom_ch_count = ARRAY_SIZE(iwl3945_eeprom_band_1);
  3163. *eeprom_ch_info = priv->eeprom39.band_1_channels;
  3164. *eeprom_ch_index = iwl3945_eeprom_band_1;
  3165. break;
  3166. case 2: /* 4.9GHz band */
  3167. *eeprom_ch_count = ARRAY_SIZE(iwl3945_eeprom_band_2);
  3168. *eeprom_ch_info = priv->eeprom39.band_2_channels;
  3169. *eeprom_ch_index = iwl3945_eeprom_band_2;
  3170. break;
  3171. case 3: /* 5.2GHz band */
  3172. *eeprom_ch_count = ARRAY_SIZE(iwl3945_eeprom_band_3);
  3173. *eeprom_ch_info = priv->eeprom39.band_3_channels;
  3174. *eeprom_ch_index = iwl3945_eeprom_band_3;
  3175. break;
  3176. case 4: /* 5.5GHz band */
  3177. *eeprom_ch_count = ARRAY_SIZE(iwl3945_eeprom_band_4);
  3178. *eeprom_ch_info = priv->eeprom39.band_4_channels;
  3179. *eeprom_ch_index = iwl3945_eeprom_band_4;
  3180. break;
  3181. case 5: /* 5.7GHz band */
  3182. *eeprom_ch_count = ARRAY_SIZE(iwl3945_eeprom_band_5);
  3183. *eeprom_ch_info = priv->eeprom39.band_5_channels;
  3184. *eeprom_ch_index = iwl3945_eeprom_band_5;
  3185. break;
  3186. default:
  3187. BUG();
  3188. return;
  3189. }
  3190. }
  3191. /**
  3192. * iwl3945_get_channel_info - Find driver's private channel info
  3193. *
  3194. * Based on band and channel number.
  3195. */
  3196. const struct iwl_channel_info *
  3197. iwl3945_get_channel_info(const struct iwl_priv *priv,
  3198. enum ieee80211_band band, u16 channel)
  3199. {
  3200. int i;
  3201. switch (band) {
  3202. case IEEE80211_BAND_5GHZ:
  3203. for (i = 14; i < priv->channel_count; i++) {
  3204. if (priv->channel_info[i].channel == channel)
  3205. return &priv->channel_info[i];
  3206. }
  3207. break;
  3208. case IEEE80211_BAND_2GHZ:
  3209. if (channel >= 1 && channel <= 14)
  3210. return &priv->channel_info[channel - 1];
  3211. break;
  3212. case IEEE80211_NUM_BANDS:
  3213. WARN_ON(1);
  3214. }
  3215. return NULL;
  3216. }
  3217. #define CHECK_AND_PRINT(x) ((eeprom_ch_info[ch].flags & EEPROM_CHANNEL_##x) \
  3218. ? # x " " : "")
  3219. /**
  3220. * iwl3945_init_channel_map - Set up driver's info for all possible channels
  3221. */
  3222. static int iwl3945_init_channel_map(struct iwl_priv *priv)
  3223. {
  3224. int eeprom_ch_count = 0;
  3225. const u8 *eeprom_ch_index = NULL;
  3226. const struct iwl_eeprom_channel *eeprom_ch_info = NULL;
  3227. int band, ch;
  3228. struct iwl_channel_info *ch_info;
  3229. if (priv->channel_count) {
  3230. IWL_DEBUG_INFO("Channel map already initialized.\n");
  3231. return 0;
  3232. }
  3233. if (priv->eeprom39.version < 0x2f) {
  3234. IWL_WARN(priv, "Unsupported EEPROM version: 0x%04X\n",
  3235. priv->eeprom39.version);
  3236. return -EINVAL;
  3237. }
  3238. IWL_DEBUG_INFO("Initializing regulatory info from EEPROM\n");
  3239. priv->channel_count =
  3240. ARRAY_SIZE(iwl3945_eeprom_band_1) +
  3241. ARRAY_SIZE(iwl3945_eeprom_band_2) +
  3242. ARRAY_SIZE(iwl3945_eeprom_band_3) +
  3243. ARRAY_SIZE(iwl3945_eeprom_band_4) +
  3244. ARRAY_SIZE(iwl3945_eeprom_band_5);
  3245. IWL_DEBUG_INFO("Parsing data for %d channels.\n", priv->channel_count);
  3246. priv->channel_info = kzalloc(sizeof(struct iwl_channel_info) *
  3247. priv->channel_count, GFP_KERNEL);
  3248. if (!priv->channel_info) {
  3249. IWL_ERR(priv, "Could not allocate channel_info\n");
  3250. priv->channel_count = 0;
  3251. return -ENOMEM;
  3252. }
  3253. ch_info = priv->channel_info;
  3254. /* Loop through the 5 EEPROM bands adding them in order to the
  3255. * channel map we maintain (that contains additional information than
  3256. * what just in the EEPROM) */
  3257. for (band = 1; band <= 5; band++) {
  3258. iwl3945_init_band_reference(priv, band, &eeprom_ch_count,
  3259. &eeprom_ch_info, &eeprom_ch_index);
  3260. /* Loop through each band adding each of the channels */
  3261. for (ch = 0; ch < eeprom_ch_count; ch++) {
  3262. ch_info->channel = eeprom_ch_index[ch];
  3263. ch_info->band = (band == 1) ? IEEE80211_BAND_2GHZ :
  3264. IEEE80211_BAND_5GHZ;
  3265. /* permanently store EEPROM's channel regulatory flags
  3266. * and max power in channel info database. */
  3267. ch_info->eeprom = eeprom_ch_info[ch];
  3268. /* Copy the run-time flags so they are there even on
  3269. * invalid channels */
  3270. ch_info->flags = eeprom_ch_info[ch].flags;
  3271. if (!(is_channel_valid(ch_info))) {
  3272. IWL_DEBUG_INFO("Ch. %d Flags %x [%sGHz] - "
  3273. "No traffic\n",
  3274. ch_info->channel,
  3275. ch_info->flags,
  3276. is_channel_a_band(ch_info) ?
  3277. "5.2" : "2.4");
  3278. ch_info++;
  3279. continue;
  3280. }
  3281. /* Initialize regulatory-based run-time data */
  3282. ch_info->max_power_avg = ch_info->curr_txpow =
  3283. eeprom_ch_info[ch].max_power_avg;
  3284. ch_info->scan_power = eeprom_ch_info[ch].max_power_avg;
  3285. ch_info->min_power = 0;
  3286. IWL_DEBUG_INFO("Ch. %d [%sGHz] %s%s%s%s%s%s(0x%02x"
  3287. " %ddBm): Ad-Hoc %ssupported\n",
  3288. ch_info->channel,
  3289. is_channel_a_band(ch_info) ?
  3290. "5.2" : "2.4",
  3291. CHECK_AND_PRINT(VALID),
  3292. CHECK_AND_PRINT(IBSS),
  3293. CHECK_AND_PRINT(ACTIVE),
  3294. CHECK_AND_PRINT(RADAR),
  3295. CHECK_AND_PRINT(WIDE),
  3296. CHECK_AND_PRINT(DFS),
  3297. eeprom_ch_info[ch].flags,
  3298. eeprom_ch_info[ch].max_power_avg,
  3299. ((eeprom_ch_info[ch].
  3300. flags & EEPROM_CHANNEL_IBSS)
  3301. && !(eeprom_ch_info[ch].
  3302. flags & EEPROM_CHANNEL_RADAR))
  3303. ? "" : "not ");
  3304. /* Set the tx_power_user_lmt to the highest power
  3305. * supported by any channel */
  3306. if (eeprom_ch_info[ch].max_power_avg >
  3307. priv->tx_power_user_lmt)
  3308. priv->tx_power_user_lmt =
  3309. eeprom_ch_info[ch].max_power_avg;
  3310. ch_info++;
  3311. }
  3312. }
  3313. /* Set up txpower settings in driver for all channels */
  3314. if (iwl3945_txpower_set_from_eeprom(priv))
  3315. return -EIO;
  3316. return 0;
  3317. }
  3318. /*
  3319. * iwl3945_free_channel_map - undo allocations in iwl3945_init_channel_map
  3320. */
  3321. static void iwl3945_free_channel_map(struct iwl_priv *priv)
  3322. {
  3323. kfree(priv->channel_info);
  3324. priv->channel_count = 0;
  3325. }
  3326. /* For active scan, listen ACTIVE_DWELL_TIME (msec) on each channel after
  3327. * sending probe req. This should be set long enough to hear probe responses
  3328. * from more than one AP. */
  3329. #define IWL_ACTIVE_DWELL_TIME_24 (30) /* all times in msec */
  3330. #define IWL_ACTIVE_DWELL_TIME_52 (20)
  3331. #define IWL_ACTIVE_DWELL_FACTOR_24GHZ (3)
  3332. #define IWL_ACTIVE_DWELL_FACTOR_52GHZ (2)
  3333. /* For faster active scanning, scan will move to the next channel if fewer than
  3334. * PLCP_QUIET_THRESH packets are heard on this channel within
  3335. * ACTIVE_QUIET_TIME after sending probe request. This shortens the dwell
  3336. * time if it's a quiet channel (nothing responded to our probe, and there's
  3337. * no other traffic).
  3338. * Disable "quiet" feature by setting PLCP_QUIET_THRESH to 0. */
  3339. #define IWL_PLCP_QUIET_THRESH __constant_cpu_to_le16(1) /* packets */
  3340. #define IWL_ACTIVE_QUIET_TIME __constant_cpu_to_le16(10) /* msec */
  3341. /* For passive scan, listen PASSIVE_DWELL_TIME (msec) on each channel.
  3342. * Must be set longer than active dwell time.
  3343. * For the most reliable scan, set > AP beacon interval (typically 100msec). */
  3344. #define IWL_PASSIVE_DWELL_TIME_24 (20) /* all times in msec */
  3345. #define IWL_PASSIVE_DWELL_TIME_52 (10)
  3346. #define IWL_PASSIVE_DWELL_BASE (100)
  3347. #define IWL_CHANNEL_TUNE_TIME 5
  3348. #define IWL_SCAN_PROBE_MASK(n) (BIT(n) | (BIT(n) - BIT(1)))
  3349. static inline u16 iwl3945_get_active_dwell_time(struct iwl_priv *priv,
  3350. enum ieee80211_band band,
  3351. u8 n_probes)
  3352. {
  3353. if (band == IEEE80211_BAND_5GHZ)
  3354. return IWL_ACTIVE_DWELL_TIME_52 +
  3355. IWL_ACTIVE_DWELL_FACTOR_52GHZ * (n_probes + 1);
  3356. else
  3357. return IWL_ACTIVE_DWELL_TIME_24 +
  3358. IWL_ACTIVE_DWELL_FACTOR_24GHZ * (n_probes + 1);
  3359. }
  3360. static u16 iwl3945_get_passive_dwell_time(struct iwl_priv *priv,
  3361. enum ieee80211_band band)
  3362. {
  3363. u16 passive = (band == IEEE80211_BAND_2GHZ) ?
  3364. IWL_PASSIVE_DWELL_BASE + IWL_PASSIVE_DWELL_TIME_24 :
  3365. IWL_PASSIVE_DWELL_BASE + IWL_PASSIVE_DWELL_TIME_52;
  3366. if (iwl3945_is_associated(priv)) {
  3367. /* If we're associated, we clamp the maximum passive
  3368. * dwell time to be 98% of the beacon interval (minus
  3369. * 2 * channel tune time) */
  3370. passive = priv->beacon_int;
  3371. if ((passive > IWL_PASSIVE_DWELL_BASE) || !passive)
  3372. passive = IWL_PASSIVE_DWELL_BASE;
  3373. passive = (passive * 98) / 100 - IWL_CHANNEL_TUNE_TIME * 2;
  3374. }
  3375. return passive;
  3376. }
  3377. static int iwl3945_get_channels_for_scan(struct iwl_priv *priv,
  3378. enum ieee80211_band band,
  3379. u8 is_active, u8 n_probes,
  3380. struct iwl3945_scan_channel *scan_ch)
  3381. {
  3382. const struct ieee80211_channel *channels = NULL;
  3383. const struct ieee80211_supported_band *sband;
  3384. const struct iwl_channel_info *ch_info;
  3385. u16 passive_dwell = 0;
  3386. u16 active_dwell = 0;
  3387. int added, i;
  3388. sband = iwl_get_hw_mode(priv, band);
  3389. if (!sband)
  3390. return 0;
  3391. channels = sband->channels;
  3392. active_dwell = iwl3945_get_active_dwell_time(priv, band, n_probes);
  3393. passive_dwell = iwl3945_get_passive_dwell_time(priv, band);
  3394. if (passive_dwell <= active_dwell)
  3395. passive_dwell = active_dwell + 1;
  3396. for (i = 0, added = 0; i < sband->n_channels; i++) {
  3397. if (channels[i].flags & IEEE80211_CHAN_DISABLED)
  3398. continue;
  3399. scan_ch->channel = channels[i].hw_value;
  3400. ch_info = iwl3945_get_channel_info(priv, band, scan_ch->channel);
  3401. if (!is_channel_valid(ch_info)) {
  3402. IWL_DEBUG_SCAN("Channel %d is INVALID for this band.\n",
  3403. scan_ch->channel);
  3404. continue;
  3405. }
  3406. scan_ch->active_dwell = cpu_to_le16(active_dwell);
  3407. scan_ch->passive_dwell = cpu_to_le16(passive_dwell);
  3408. /* If passive , set up for auto-switch
  3409. * and use long active_dwell time.
  3410. */
  3411. if (!is_active || is_channel_passive(ch_info) ||
  3412. (channels[i].flags & IEEE80211_CHAN_PASSIVE_SCAN)) {
  3413. scan_ch->type = 0; /* passive */
  3414. if (IWL_UCODE_API(priv->ucode_ver) == 1)
  3415. scan_ch->active_dwell = cpu_to_le16(passive_dwell - 1);
  3416. } else {
  3417. scan_ch->type = 1; /* active */
  3418. }
  3419. /* Set direct probe bits. These may be used both for active
  3420. * scan channels (probes gets sent right away),
  3421. * or for passive channels (probes get se sent only after
  3422. * hearing clear Rx packet).*/
  3423. if (IWL_UCODE_API(priv->ucode_ver) >= 2) {
  3424. if (n_probes)
  3425. scan_ch->type |= IWL_SCAN_PROBE_MASK(n_probes);
  3426. } else {
  3427. /* uCode v1 does not allow setting direct probe bits on
  3428. * passive channel. */
  3429. if ((scan_ch->type & 1) && n_probes)
  3430. scan_ch->type |= IWL_SCAN_PROBE_MASK(n_probes);
  3431. }
  3432. /* Set txpower levels to defaults */
  3433. scan_ch->tpc.dsp_atten = 110;
  3434. /* scan_pwr_info->tpc.dsp_atten; */
  3435. /*scan_pwr_info->tpc.tx_gain; */
  3436. if (band == IEEE80211_BAND_5GHZ)
  3437. scan_ch->tpc.tx_gain = ((1 << 5) | (3 << 3)) | 3;
  3438. else {
  3439. scan_ch->tpc.tx_gain = ((1 << 5) | (5 << 3));
  3440. /* NOTE: if we were doing 6Mb OFDM for scans we'd use
  3441. * power level:
  3442. * scan_ch->tpc.tx_gain = ((1 << 5) | (2 << 3)) | 3;
  3443. */
  3444. }
  3445. IWL_DEBUG_SCAN("Scanning %d [%s %d]\n",
  3446. scan_ch->channel,
  3447. (scan_ch->type & 1) ? "ACTIVE" : "PASSIVE",
  3448. (scan_ch->type & 1) ?
  3449. active_dwell : passive_dwell);
  3450. scan_ch++;
  3451. added++;
  3452. }
  3453. IWL_DEBUG_SCAN("total channels to scan %d \n", added);
  3454. return added;
  3455. }
  3456. static void iwl3945_init_hw_rates(struct iwl_priv *priv,
  3457. struct ieee80211_rate *rates)
  3458. {
  3459. int i;
  3460. for (i = 0; i < IWL_RATE_COUNT; i++) {
  3461. rates[i].bitrate = iwl3945_rates[i].ieee * 5;
  3462. rates[i].hw_value = i; /* Rate scaling will work on indexes */
  3463. rates[i].hw_value_short = i;
  3464. rates[i].flags = 0;
  3465. if ((i > IWL39_LAST_OFDM_RATE) || (i < IWL_FIRST_OFDM_RATE)) {
  3466. /*
  3467. * If CCK != 1M then set short preamble rate flag.
  3468. */
  3469. rates[i].flags |= (iwl3945_rates[i].plcp == 10) ?
  3470. 0 : IEEE80211_RATE_SHORT_PREAMBLE;
  3471. }
  3472. }
  3473. }
  3474. /**
  3475. * iwl3945_init_geos - Initialize mac80211's geo/channel info based from eeprom
  3476. */
  3477. static int iwl3945_init_geos(struct iwl_priv *priv)
  3478. {
  3479. struct iwl_channel_info *ch;
  3480. struct ieee80211_supported_band *sband;
  3481. struct ieee80211_channel *channels;
  3482. struct ieee80211_channel *geo_ch;
  3483. struct ieee80211_rate *rates;
  3484. int i = 0;
  3485. if (priv->bands[IEEE80211_BAND_2GHZ].n_bitrates ||
  3486. priv->bands[IEEE80211_BAND_5GHZ].n_bitrates) {
  3487. IWL_DEBUG_INFO("Geography modes already initialized.\n");
  3488. set_bit(STATUS_GEO_CONFIGURED, &priv->status);
  3489. return 0;
  3490. }
  3491. channels = kzalloc(sizeof(struct ieee80211_channel) *
  3492. priv->channel_count, GFP_KERNEL);
  3493. if (!channels)
  3494. return -ENOMEM;
  3495. rates = kzalloc((sizeof(struct ieee80211_rate) * (IWL_RATE_COUNT + 1)),
  3496. GFP_KERNEL);
  3497. if (!rates) {
  3498. kfree(channels);
  3499. return -ENOMEM;
  3500. }
  3501. /* 5.2GHz channels start after the 2.4GHz channels */
  3502. sband = &priv->bands[IEEE80211_BAND_5GHZ];
  3503. sband->channels = &channels[ARRAY_SIZE(iwl3945_eeprom_band_1)];
  3504. /* just OFDM */
  3505. sband->bitrates = &rates[IWL_FIRST_OFDM_RATE];
  3506. sband->n_bitrates = IWL_RATE_COUNT - IWL_FIRST_OFDM_RATE;
  3507. sband = &priv->bands[IEEE80211_BAND_2GHZ];
  3508. sband->channels = channels;
  3509. /* OFDM & CCK */
  3510. sband->bitrates = rates;
  3511. sband->n_bitrates = IWL_RATE_COUNT;
  3512. priv->ieee_channels = channels;
  3513. priv->ieee_rates = rates;
  3514. iwl3945_init_hw_rates(priv, rates);
  3515. for (i = 0; i < priv->channel_count; i++) {
  3516. ch = &priv->channel_info[i];
  3517. /* FIXME: might be removed if scan is OK*/
  3518. if (!is_channel_valid(ch))
  3519. continue;
  3520. if (is_channel_a_band(ch))
  3521. sband = &priv->bands[IEEE80211_BAND_5GHZ];
  3522. else
  3523. sband = &priv->bands[IEEE80211_BAND_2GHZ];
  3524. geo_ch = &sband->channels[sband->n_channels++];
  3525. geo_ch->center_freq = ieee80211_channel_to_frequency(ch->channel);
  3526. geo_ch->max_power = ch->max_power_avg;
  3527. geo_ch->max_antenna_gain = 0xff;
  3528. geo_ch->hw_value = ch->channel;
  3529. if (is_channel_valid(ch)) {
  3530. if (!(ch->flags & EEPROM_CHANNEL_IBSS))
  3531. geo_ch->flags |= IEEE80211_CHAN_NO_IBSS;
  3532. if (!(ch->flags & EEPROM_CHANNEL_ACTIVE))
  3533. geo_ch->flags |= IEEE80211_CHAN_PASSIVE_SCAN;
  3534. if (ch->flags & EEPROM_CHANNEL_RADAR)
  3535. geo_ch->flags |= IEEE80211_CHAN_RADAR;
  3536. if (ch->max_power_avg > priv->tx_power_channel_lmt)
  3537. priv->tx_power_channel_lmt =
  3538. ch->max_power_avg;
  3539. } else {
  3540. geo_ch->flags |= IEEE80211_CHAN_DISABLED;
  3541. }
  3542. /* Save flags for reg domain usage */
  3543. geo_ch->orig_flags = geo_ch->flags;
  3544. IWL_DEBUG_INFO("Channel %d Freq=%d[%sGHz] %s flag=0%X\n",
  3545. ch->channel, geo_ch->center_freq,
  3546. is_channel_a_band(ch) ? "5.2" : "2.4",
  3547. geo_ch->flags & IEEE80211_CHAN_DISABLED ?
  3548. "restricted" : "valid",
  3549. geo_ch->flags);
  3550. }
  3551. if ((priv->bands[IEEE80211_BAND_5GHZ].n_channels == 0) &&
  3552. priv->cfg->sku & IWL_SKU_A) {
  3553. IWL_INFO(priv, "Incorrectly detected BG card as ABG. "
  3554. "Please send your PCI ID 0x%04X:0x%04X to maintainer.\n",
  3555. priv->pci_dev->device, priv->pci_dev->subsystem_device);
  3556. priv->cfg->sku &= ~IWL_SKU_A;
  3557. }
  3558. IWL_INFO(priv, "Tunable channels: %d 802.11bg, %d 802.11a channels\n",
  3559. priv->bands[IEEE80211_BAND_2GHZ].n_channels,
  3560. priv->bands[IEEE80211_BAND_5GHZ].n_channels);
  3561. if (priv->bands[IEEE80211_BAND_2GHZ].n_channels)
  3562. priv->hw->wiphy->bands[IEEE80211_BAND_2GHZ] =
  3563. &priv->bands[IEEE80211_BAND_2GHZ];
  3564. if (priv->bands[IEEE80211_BAND_5GHZ].n_channels)
  3565. priv->hw->wiphy->bands[IEEE80211_BAND_5GHZ] =
  3566. &priv->bands[IEEE80211_BAND_5GHZ];
  3567. set_bit(STATUS_GEO_CONFIGURED, &priv->status);
  3568. return 0;
  3569. }
  3570. /*
  3571. * iwl3945_free_geos - undo allocations in iwl3945_init_geos
  3572. */
  3573. static void iwl3945_free_geos(struct iwl_priv *priv)
  3574. {
  3575. kfree(priv->ieee_channels);
  3576. kfree(priv->ieee_rates);
  3577. clear_bit(STATUS_GEO_CONFIGURED, &priv->status);
  3578. }
  3579. /******************************************************************************
  3580. *
  3581. * uCode download functions
  3582. *
  3583. ******************************************************************************/
  3584. static void iwl3945_dealloc_ucode_pci(struct iwl_priv *priv)
  3585. {
  3586. iwl_free_fw_desc(priv->pci_dev, &priv->ucode_code);
  3587. iwl_free_fw_desc(priv->pci_dev, &priv->ucode_data);
  3588. iwl_free_fw_desc(priv->pci_dev, &priv->ucode_data_backup);
  3589. iwl_free_fw_desc(priv->pci_dev, &priv->ucode_init);
  3590. iwl_free_fw_desc(priv->pci_dev, &priv->ucode_init_data);
  3591. iwl_free_fw_desc(priv->pci_dev, &priv->ucode_boot);
  3592. }
  3593. /**
  3594. * iwl3945_verify_inst_full - verify runtime uCode image in card vs. host,
  3595. * looking at all data.
  3596. */
  3597. static int iwl3945_verify_inst_full(struct iwl_priv *priv, __le32 *image, u32 len)
  3598. {
  3599. u32 val;
  3600. u32 save_len = len;
  3601. int rc = 0;
  3602. u32 errcnt;
  3603. IWL_DEBUG_INFO("ucode inst image size is %u\n", len);
  3604. rc = iwl_grab_nic_access(priv);
  3605. if (rc)
  3606. return rc;
  3607. iwl_write_direct32(priv, HBUS_TARG_MEM_RADDR,
  3608. IWL39_RTC_INST_LOWER_BOUND);
  3609. errcnt = 0;
  3610. for (; len > 0; len -= sizeof(u32), image++) {
  3611. /* read data comes through single port, auto-incr addr */
  3612. /* NOTE: Use the debugless read so we don't flood kernel log
  3613. * if IWL_DL_IO is set */
  3614. val = _iwl_read_direct32(priv, HBUS_TARG_MEM_RDAT);
  3615. if (val != le32_to_cpu(*image)) {
  3616. IWL_ERR(priv, "uCode INST section is invalid at "
  3617. "offset 0x%x, is 0x%x, s/b 0x%x\n",
  3618. save_len - len, val, le32_to_cpu(*image));
  3619. rc = -EIO;
  3620. errcnt++;
  3621. if (errcnt >= 20)
  3622. break;
  3623. }
  3624. }
  3625. iwl_release_nic_access(priv);
  3626. if (!errcnt)
  3627. IWL_DEBUG_INFO("ucode image in INSTRUCTION memory is good\n");
  3628. return rc;
  3629. }
  3630. /**
  3631. * iwl3945_verify_inst_sparse - verify runtime uCode image in card vs. host,
  3632. * using sample data 100 bytes apart. If these sample points are good,
  3633. * it's a pretty good bet that everything between them is good, too.
  3634. */
  3635. static int iwl3945_verify_inst_sparse(struct iwl_priv *priv, __le32 *image, u32 len)
  3636. {
  3637. u32 val;
  3638. int rc = 0;
  3639. u32 errcnt = 0;
  3640. u32 i;
  3641. IWL_DEBUG_INFO("ucode inst image size is %u\n", len);
  3642. rc = iwl_grab_nic_access(priv);
  3643. if (rc)
  3644. return rc;
  3645. for (i = 0; i < len; i += 100, image += 100/sizeof(u32)) {
  3646. /* read data comes through single port, auto-incr addr */
  3647. /* NOTE: Use the debugless read so we don't flood kernel log
  3648. * if IWL_DL_IO is set */
  3649. iwl_write_direct32(priv, HBUS_TARG_MEM_RADDR,
  3650. i + IWL39_RTC_INST_LOWER_BOUND);
  3651. val = _iwl_read_direct32(priv, HBUS_TARG_MEM_RDAT);
  3652. if (val != le32_to_cpu(*image)) {
  3653. #if 0 /* Enable this if you want to see details */
  3654. IWL_ERR(priv, "uCode INST section is invalid at "
  3655. "offset 0x%x, is 0x%x, s/b 0x%x\n",
  3656. i, val, *image);
  3657. #endif
  3658. rc = -EIO;
  3659. errcnt++;
  3660. if (errcnt >= 3)
  3661. break;
  3662. }
  3663. }
  3664. iwl_release_nic_access(priv);
  3665. return rc;
  3666. }
  3667. /**
  3668. * iwl3945_verify_ucode - determine which instruction image is in SRAM,
  3669. * and verify its contents
  3670. */
  3671. static int iwl3945_verify_ucode(struct iwl_priv *priv)
  3672. {
  3673. __le32 *image;
  3674. u32 len;
  3675. int rc = 0;
  3676. /* Try bootstrap */
  3677. image = (__le32 *)priv->ucode_boot.v_addr;
  3678. len = priv->ucode_boot.len;
  3679. rc = iwl3945_verify_inst_sparse(priv, image, len);
  3680. if (rc == 0) {
  3681. IWL_DEBUG_INFO("Bootstrap uCode is good in inst SRAM\n");
  3682. return 0;
  3683. }
  3684. /* Try initialize */
  3685. image = (__le32 *)priv->ucode_init.v_addr;
  3686. len = priv->ucode_init.len;
  3687. rc = iwl3945_verify_inst_sparse(priv, image, len);
  3688. if (rc == 0) {
  3689. IWL_DEBUG_INFO("Initialize uCode is good in inst SRAM\n");
  3690. return 0;
  3691. }
  3692. /* Try runtime/protocol */
  3693. image = (__le32 *)priv->ucode_code.v_addr;
  3694. len = priv->ucode_code.len;
  3695. rc = iwl3945_verify_inst_sparse(priv, image, len);
  3696. if (rc == 0) {
  3697. IWL_DEBUG_INFO("Runtime uCode is good in inst SRAM\n");
  3698. return 0;
  3699. }
  3700. IWL_ERR(priv, "NO VALID UCODE IMAGE IN INSTRUCTION SRAM!!\n");
  3701. /* Since nothing seems to match, show first several data entries in
  3702. * instruction SRAM, so maybe visual inspection will give a clue.
  3703. * Selection of bootstrap image (vs. other images) is arbitrary. */
  3704. image = (__le32 *)priv->ucode_boot.v_addr;
  3705. len = priv->ucode_boot.len;
  3706. rc = iwl3945_verify_inst_full(priv, image, len);
  3707. return rc;
  3708. }
  3709. static void iwl3945_nic_start(struct iwl_priv *priv)
  3710. {
  3711. /* Remove all resets to allow NIC to operate */
  3712. iwl_write32(priv, CSR_RESET, 0);
  3713. }
  3714. /**
  3715. * iwl3945_read_ucode - Read uCode images from disk file.
  3716. *
  3717. * Copy into buffers for card to fetch via bus-mastering
  3718. */
  3719. static int iwl3945_read_ucode(struct iwl_priv *priv)
  3720. {
  3721. struct iwl_ucode *ucode;
  3722. int ret = -EINVAL, index;
  3723. const struct firmware *ucode_raw;
  3724. /* firmware file name contains uCode/driver compatibility version */
  3725. const char *name_pre = priv->cfg->fw_name_pre;
  3726. const unsigned int api_max = priv->cfg->ucode_api_max;
  3727. const unsigned int api_min = priv->cfg->ucode_api_min;
  3728. char buf[25];
  3729. u8 *src;
  3730. size_t len;
  3731. u32 api_ver, inst_size, data_size, init_size, init_data_size, boot_size;
  3732. /* Ask kernel firmware_class module to get the boot firmware off disk.
  3733. * request_firmware() is synchronous, file is in memory on return. */
  3734. for (index = api_max; index >= api_min; index--) {
  3735. sprintf(buf, "%s%u%s", name_pre, index, ".ucode");
  3736. ret = request_firmware(&ucode_raw, buf, &priv->pci_dev->dev);
  3737. if (ret < 0) {
  3738. IWL_ERR(priv, "%s firmware file req failed: %d\n",
  3739. buf, ret);
  3740. if (ret == -ENOENT)
  3741. continue;
  3742. else
  3743. goto error;
  3744. } else {
  3745. if (index < api_max)
  3746. IWL_ERR(priv, "Loaded firmware %s, "
  3747. "which is deprecated. "
  3748. " Please use API v%u instead.\n",
  3749. buf, api_max);
  3750. IWL_DEBUG_INFO("Got firmware '%s' file (%zd bytes) from disk\n",
  3751. buf, ucode_raw->size);
  3752. break;
  3753. }
  3754. }
  3755. if (ret < 0)
  3756. goto error;
  3757. /* Make sure that we got at least our header! */
  3758. if (ucode_raw->size < sizeof(*ucode)) {
  3759. IWL_ERR(priv, "File size way too small!\n");
  3760. ret = -EINVAL;
  3761. goto err_release;
  3762. }
  3763. /* Data from ucode file: header followed by uCode images */
  3764. ucode = (void *)ucode_raw->data;
  3765. priv->ucode_ver = le32_to_cpu(ucode->ver);
  3766. api_ver = IWL_UCODE_API(priv->ucode_ver);
  3767. inst_size = le32_to_cpu(ucode->inst_size);
  3768. data_size = le32_to_cpu(ucode->data_size);
  3769. init_size = le32_to_cpu(ucode->init_size);
  3770. init_data_size = le32_to_cpu(ucode->init_data_size);
  3771. boot_size = le32_to_cpu(ucode->boot_size);
  3772. /* api_ver should match the api version forming part of the
  3773. * firmware filename ... but we don't check for that and only rely
  3774. * on the API version read from firware header from here on forward */
  3775. if (api_ver < api_min || api_ver > api_max) {
  3776. IWL_ERR(priv, "Driver unable to support your firmware API. "
  3777. "Driver supports v%u, firmware is v%u.\n",
  3778. api_max, api_ver);
  3779. priv->ucode_ver = 0;
  3780. ret = -EINVAL;
  3781. goto err_release;
  3782. }
  3783. if (api_ver != api_max)
  3784. IWL_ERR(priv, "Firmware has old API version. Expected %u, "
  3785. "got %u. New firmware can be obtained "
  3786. "from http://www.intellinuxwireless.org.\n",
  3787. api_max, api_ver);
  3788. IWL_INFO(priv, "loaded firmware version %u.%u.%u.%u\n",
  3789. IWL_UCODE_MAJOR(priv->ucode_ver),
  3790. IWL_UCODE_MINOR(priv->ucode_ver),
  3791. IWL_UCODE_API(priv->ucode_ver),
  3792. IWL_UCODE_SERIAL(priv->ucode_ver));
  3793. IWL_DEBUG_INFO("f/w package hdr ucode version raw = 0x%x\n",
  3794. priv->ucode_ver);
  3795. IWL_DEBUG_INFO("f/w package hdr runtime inst size = %u\n", inst_size);
  3796. IWL_DEBUG_INFO("f/w package hdr runtime data size = %u\n", data_size);
  3797. IWL_DEBUG_INFO("f/w package hdr init inst size = %u\n", init_size);
  3798. IWL_DEBUG_INFO("f/w package hdr init data size = %u\n", init_data_size);
  3799. IWL_DEBUG_INFO("f/w package hdr boot inst size = %u\n", boot_size);
  3800. /* Verify size of file vs. image size info in file's header */
  3801. if (ucode_raw->size < sizeof(*ucode) +
  3802. inst_size + data_size + init_size +
  3803. init_data_size + boot_size) {
  3804. IWL_DEBUG_INFO("uCode file size %d too small\n",
  3805. (int)ucode_raw->size);
  3806. ret = -EINVAL;
  3807. goto err_release;
  3808. }
  3809. /* Verify that uCode images will fit in card's SRAM */
  3810. if (inst_size > IWL39_MAX_INST_SIZE) {
  3811. IWL_DEBUG_INFO("uCode instr len %d too large to fit in\n",
  3812. inst_size);
  3813. ret = -EINVAL;
  3814. goto err_release;
  3815. }
  3816. if (data_size > IWL39_MAX_DATA_SIZE) {
  3817. IWL_DEBUG_INFO("uCode data len %d too large to fit in\n",
  3818. data_size);
  3819. ret = -EINVAL;
  3820. goto err_release;
  3821. }
  3822. if (init_size > IWL39_MAX_INST_SIZE) {
  3823. IWL_DEBUG_INFO("uCode init instr len %d too large to fit in\n",
  3824. init_size);
  3825. ret = -EINVAL;
  3826. goto err_release;
  3827. }
  3828. if (init_data_size > IWL39_MAX_DATA_SIZE) {
  3829. IWL_DEBUG_INFO("uCode init data len %d too large to fit in\n",
  3830. init_data_size);
  3831. ret = -EINVAL;
  3832. goto err_release;
  3833. }
  3834. if (boot_size > IWL39_MAX_BSM_SIZE) {
  3835. IWL_DEBUG_INFO("uCode boot instr len %d too large to fit in\n",
  3836. boot_size);
  3837. ret = -EINVAL;
  3838. goto err_release;
  3839. }
  3840. /* Allocate ucode buffers for card's bus-master loading ... */
  3841. /* Runtime instructions and 2 copies of data:
  3842. * 1) unmodified from disk
  3843. * 2) backup cache for save/restore during power-downs */
  3844. priv->ucode_code.len = inst_size;
  3845. iwl_alloc_fw_desc(priv->pci_dev, &priv->ucode_code);
  3846. priv->ucode_data.len = data_size;
  3847. iwl_alloc_fw_desc(priv->pci_dev, &priv->ucode_data);
  3848. priv->ucode_data_backup.len = data_size;
  3849. iwl_alloc_fw_desc(priv->pci_dev, &priv->ucode_data_backup);
  3850. if (!priv->ucode_code.v_addr || !priv->ucode_data.v_addr ||
  3851. !priv->ucode_data_backup.v_addr)
  3852. goto err_pci_alloc;
  3853. /* Initialization instructions and data */
  3854. if (init_size && init_data_size) {
  3855. priv->ucode_init.len = init_size;
  3856. iwl_alloc_fw_desc(priv->pci_dev, &priv->ucode_init);
  3857. priv->ucode_init_data.len = init_data_size;
  3858. iwl_alloc_fw_desc(priv->pci_dev, &priv->ucode_init_data);
  3859. if (!priv->ucode_init.v_addr || !priv->ucode_init_data.v_addr)
  3860. goto err_pci_alloc;
  3861. }
  3862. /* Bootstrap (instructions only, no data) */
  3863. if (boot_size) {
  3864. priv->ucode_boot.len = boot_size;
  3865. iwl_alloc_fw_desc(priv->pci_dev, &priv->ucode_boot);
  3866. if (!priv->ucode_boot.v_addr)
  3867. goto err_pci_alloc;
  3868. }
  3869. /* Copy images into buffers for card's bus-master reads ... */
  3870. /* Runtime instructions (first block of data in file) */
  3871. src = &ucode->data[0];
  3872. len = priv->ucode_code.len;
  3873. IWL_DEBUG_INFO("Copying (but not loading) uCode instr len %Zd\n", len);
  3874. memcpy(priv->ucode_code.v_addr, src, len);
  3875. IWL_DEBUG_INFO("uCode instr buf vaddr = 0x%p, paddr = 0x%08x\n",
  3876. priv->ucode_code.v_addr, (u32)priv->ucode_code.p_addr);
  3877. /* Runtime data (2nd block)
  3878. * NOTE: Copy into backup buffer will be done in iwl3945_up() */
  3879. src = &ucode->data[inst_size];
  3880. len = priv->ucode_data.len;
  3881. IWL_DEBUG_INFO("Copying (but not loading) uCode data len %Zd\n", len);
  3882. memcpy(priv->ucode_data.v_addr, src, len);
  3883. memcpy(priv->ucode_data_backup.v_addr, src, len);
  3884. /* Initialization instructions (3rd block) */
  3885. if (init_size) {
  3886. src = &ucode->data[inst_size + data_size];
  3887. len = priv->ucode_init.len;
  3888. IWL_DEBUG_INFO("Copying (but not loading) init instr len %Zd\n",
  3889. len);
  3890. memcpy(priv->ucode_init.v_addr, src, len);
  3891. }
  3892. /* Initialization data (4th block) */
  3893. if (init_data_size) {
  3894. src = &ucode->data[inst_size + data_size + init_size];
  3895. len = priv->ucode_init_data.len;
  3896. IWL_DEBUG_INFO("Copying (but not loading) init data len %d\n",
  3897. (int)len);
  3898. memcpy(priv->ucode_init_data.v_addr, src, len);
  3899. }
  3900. /* Bootstrap instructions (5th block) */
  3901. src = &ucode->data[inst_size + data_size + init_size + init_data_size];
  3902. len = priv->ucode_boot.len;
  3903. IWL_DEBUG_INFO("Copying (but not loading) boot instr len %d\n",
  3904. (int)len);
  3905. memcpy(priv->ucode_boot.v_addr, src, len);
  3906. /* We have our copies now, allow OS release its copies */
  3907. release_firmware(ucode_raw);
  3908. return 0;
  3909. err_pci_alloc:
  3910. IWL_ERR(priv, "failed to allocate pci memory\n");
  3911. ret = -ENOMEM;
  3912. iwl3945_dealloc_ucode_pci(priv);
  3913. err_release:
  3914. release_firmware(ucode_raw);
  3915. error:
  3916. return ret;
  3917. }
  3918. /**
  3919. * iwl3945_set_ucode_ptrs - Set uCode address location
  3920. *
  3921. * Tell initialization uCode where to find runtime uCode.
  3922. *
  3923. * BSM registers initially contain pointers to initialization uCode.
  3924. * We need to replace them to load runtime uCode inst and data,
  3925. * and to save runtime data when powering down.
  3926. */
  3927. static int iwl3945_set_ucode_ptrs(struct iwl_priv *priv)
  3928. {
  3929. dma_addr_t pinst;
  3930. dma_addr_t pdata;
  3931. int rc = 0;
  3932. unsigned long flags;
  3933. /* bits 31:0 for 3945 */
  3934. pinst = priv->ucode_code.p_addr;
  3935. pdata = priv->ucode_data_backup.p_addr;
  3936. spin_lock_irqsave(&priv->lock, flags);
  3937. rc = iwl_grab_nic_access(priv);
  3938. if (rc) {
  3939. spin_unlock_irqrestore(&priv->lock, flags);
  3940. return rc;
  3941. }
  3942. /* Tell bootstrap uCode where to find image to load */
  3943. iwl_write_prph(priv, BSM_DRAM_INST_PTR_REG, pinst);
  3944. iwl_write_prph(priv, BSM_DRAM_DATA_PTR_REG, pdata);
  3945. iwl_write_prph(priv, BSM_DRAM_DATA_BYTECOUNT_REG,
  3946. priv->ucode_data.len);
  3947. /* Inst byte count must be last to set up, bit 31 signals uCode
  3948. * that all new ptr/size info is in place */
  3949. iwl_write_prph(priv, BSM_DRAM_INST_BYTECOUNT_REG,
  3950. priv->ucode_code.len | BSM_DRAM_INST_LOAD);
  3951. iwl_release_nic_access(priv);
  3952. spin_unlock_irqrestore(&priv->lock, flags);
  3953. IWL_DEBUG_INFO("Runtime uCode pointers are set.\n");
  3954. return rc;
  3955. }
  3956. /**
  3957. * iwl3945_init_alive_start - Called after REPLY_ALIVE notification received
  3958. *
  3959. * Called after REPLY_ALIVE notification received from "initialize" uCode.
  3960. *
  3961. * Tell "initialize" uCode to go ahead and load the runtime uCode.
  3962. */
  3963. static void iwl3945_init_alive_start(struct iwl_priv *priv)
  3964. {
  3965. /* Check alive response for "valid" sign from uCode */
  3966. if (priv->card_alive_init.is_valid != UCODE_VALID_OK) {
  3967. /* We had an error bringing up the hardware, so take it
  3968. * all the way back down so we can try again */
  3969. IWL_DEBUG_INFO("Initialize Alive failed.\n");
  3970. goto restart;
  3971. }
  3972. /* Bootstrap uCode has loaded initialize uCode ... verify inst image.
  3973. * This is a paranoid check, because we would not have gotten the
  3974. * "initialize" alive if code weren't properly loaded. */
  3975. if (iwl3945_verify_ucode(priv)) {
  3976. /* Runtime instruction load was bad;
  3977. * take it all the way back down so we can try again */
  3978. IWL_DEBUG_INFO("Bad \"initialize\" uCode load.\n");
  3979. goto restart;
  3980. }
  3981. /* Send pointers to protocol/runtime uCode image ... init code will
  3982. * load and launch runtime uCode, which will send us another "Alive"
  3983. * notification. */
  3984. IWL_DEBUG_INFO("Initialization Alive received.\n");
  3985. if (iwl3945_set_ucode_ptrs(priv)) {
  3986. /* Runtime instruction load won't happen;
  3987. * take it all the way back down so we can try again */
  3988. IWL_DEBUG_INFO("Couldn't set up uCode pointers.\n");
  3989. goto restart;
  3990. }
  3991. return;
  3992. restart:
  3993. queue_work(priv->workqueue, &priv->restart);
  3994. }
  3995. /* temporary */
  3996. static int iwl3945_mac_beacon_update(struct ieee80211_hw *hw,
  3997. struct sk_buff *skb);
  3998. /**
  3999. * iwl3945_alive_start - called after REPLY_ALIVE notification received
  4000. * from protocol/runtime uCode (initialization uCode's
  4001. * Alive gets handled by iwl3945_init_alive_start()).
  4002. */
  4003. static void iwl3945_alive_start(struct iwl_priv *priv)
  4004. {
  4005. int rc = 0;
  4006. int thermal_spin = 0;
  4007. u32 rfkill;
  4008. IWL_DEBUG_INFO("Runtime Alive received.\n");
  4009. if (priv->card_alive.is_valid != UCODE_VALID_OK) {
  4010. /* We had an error bringing up the hardware, so take it
  4011. * all the way back down so we can try again */
  4012. IWL_DEBUG_INFO("Alive failed.\n");
  4013. goto restart;
  4014. }
  4015. /* Initialize uCode has loaded Runtime uCode ... verify inst image.
  4016. * This is a paranoid check, because we would not have gotten the
  4017. * "runtime" alive if code weren't properly loaded. */
  4018. if (iwl3945_verify_ucode(priv)) {
  4019. /* Runtime instruction load was bad;
  4020. * take it all the way back down so we can try again */
  4021. IWL_DEBUG_INFO("Bad runtime uCode load.\n");
  4022. goto restart;
  4023. }
  4024. iwl3945_clear_stations_table(priv);
  4025. rc = iwl_grab_nic_access(priv);
  4026. if (rc) {
  4027. IWL_WARN(priv, "Can not read RFKILL status from adapter\n");
  4028. return;
  4029. }
  4030. rfkill = iwl_read_prph(priv, APMG_RFKILL_REG);
  4031. IWL_DEBUG_INFO("RFKILL status: 0x%x\n", rfkill);
  4032. iwl_release_nic_access(priv);
  4033. if (rfkill & 0x1) {
  4034. clear_bit(STATUS_RF_KILL_HW, &priv->status);
  4035. /* if RFKILL is not on, then wait for thermal
  4036. * sensor in adapter to kick in */
  4037. while (iwl3945_hw_get_temperature(priv) == 0) {
  4038. thermal_spin++;
  4039. udelay(10);
  4040. }
  4041. if (thermal_spin)
  4042. IWL_DEBUG_INFO("Thermal calibration took %dus\n",
  4043. thermal_spin * 10);
  4044. } else
  4045. set_bit(STATUS_RF_KILL_HW, &priv->status);
  4046. /* After the ALIVE response, we can send commands to 3945 uCode */
  4047. set_bit(STATUS_ALIVE, &priv->status);
  4048. /* Clear out the uCode error bit if it is set */
  4049. clear_bit(STATUS_FW_ERROR, &priv->status);
  4050. if (iwl_is_rfkill(priv))
  4051. return;
  4052. ieee80211_wake_queues(priv->hw);
  4053. priv->active_rate = priv->rates_mask;
  4054. priv->active_rate_basic = priv->rates_mask & IWL_BASIC_RATES_MASK;
  4055. iwl3945_send_power_mode(priv, IWL_POWER_LEVEL(priv->power_mode));
  4056. if (iwl3945_is_associated(priv)) {
  4057. struct iwl3945_rxon_cmd *active_rxon =
  4058. (struct iwl3945_rxon_cmd *)(&priv->active39_rxon);
  4059. memcpy(&priv->staging39_rxon, &priv->active39_rxon,
  4060. sizeof(priv->staging39_rxon));
  4061. active_rxon->filter_flags &= ~RXON_FILTER_ASSOC_MSK;
  4062. } else {
  4063. /* Initialize our rx_config data */
  4064. iwl3945_connection_init_rx_config(priv, priv->iw_mode);
  4065. memcpy(priv->staging39_rxon.node_addr, priv->mac_addr, ETH_ALEN);
  4066. }
  4067. /* Configure Bluetooth device coexistence support */
  4068. iwl3945_send_bt_config(priv);
  4069. /* Configure the adapter for unassociated operation */
  4070. iwl3945_commit_rxon(priv);
  4071. iwl3945_reg_txpower_periodic(priv);
  4072. iwl3945_led_register(priv);
  4073. IWL_DEBUG_INFO("ALIVE processing complete.\n");
  4074. set_bit(STATUS_READY, &priv->status);
  4075. wake_up_interruptible(&priv->wait_command_queue);
  4076. if (priv->error_recovering)
  4077. iwl3945_error_recovery(priv);
  4078. /* reassociate for ADHOC mode */
  4079. if (priv->vif && (priv->iw_mode == NL80211_IFTYPE_ADHOC)) {
  4080. struct sk_buff *beacon = ieee80211_beacon_get(priv->hw,
  4081. priv->vif);
  4082. if (beacon)
  4083. iwl3945_mac_beacon_update(priv->hw, beacon);
  4084. }
  4085. return;
  4086. restart:
  4087. queue_work(priv->workqueue, &priv->restart);
  4088. }
  4089. static void iwl3945_cancel_deferred_work(struct iwl_priv *priv);
  4090. static void __iwl3945_down(struct iwl_priv *priv)
  4091. {
  4092. unsigned long flags;
  4093. int exit_pending = test_bit(STATUS_EXIT_PENDING, &priv->status);
  4094. struct ieee80211_conf *conf = NULL;
  4095. IWL_DEBUG_INFO(DRV_NAME " is going down\n");
  4096. conf = ieee80211_get_hw_conf(priv->hw);
  4097. if (!exit_pending)
  4098. set_bit(STATUS_EXIT_PENDING, &priv->status);
  4099. iwl3945_led_unregister(priv);
  4100. iwl3945_clear_stations_table(priv);
  4101. /* Unblock any waiting calls */
  4102. wake_up_interruptible_all(&priv->wait_command_queue);
  4103. /* Wipe out the EXIT_PENDING status bit if we are not actually
  4104. * exiting the module */
  4105. if (!exit_pending)
  4106. clear_bit(STATUS_EXIT_PENDING, &priv->status);
  4107. /* stop and reset the on-board processor */
  4108. iwl_write32(priv, CSR_RESET, CSR_RESET_REG_FLAG_NEVO_RESET);
  4109. /* tell the device to stop sending interrupts */
  4110. spin_lock_irqsave(&priv->lock, flags);
  4111. iwl3945_disable_interrupts(priv);
  4112. spin_unlock_irqrestore(&priv->lock, flags);
  4113. iwl_synchronize_irq(priv);
  4114. if (priv->mac80211_registered)
  4115. ieee80211_stop_queues(priv->hw);
  4116. /* If we have not previously called iwl3945_init() then
  4117. * clear all bits but the RF Kill and SUSPEND bits and return */
  4118. if (!iwl_is_init(priv)) {
  4119. priv->status = test_bit(STATUS_RF_KILL_HW, &priv->status) <<
  4120. STATUS_RF_KILL_HW |
  4121. test_bit(STATUS_RF_KILL_SW, &priv->status) <<
  4122. STATUS_RF_KILL_SW |
  4123. test_bit(STATUS_GEO_CONFIGURED, &priv->status) <<
  4124. STATUS_GEO_CONFIGURED |
  4125. test_bit(STATUS_IN_SUSPEND, &priv->status) <<
  4126. STATUS_IN_SUSPEND |
  4127. test_bit(STATUS_EXIT_PENDING, &priv->status) <<
  4128. STATUS_EXIT_PENDING;
  4129. goto exit;
  4130. }
  4131. /* ...otherwise clear out all the status bits but the RF Kill and
  4132. * SUSPEND bits and continue taking the NIC down. */
  4133. priv->status &= test_bit(STATUS_RF_KILL_HW, &priv->status) <<
  4134. STATUS_RF_KILL_HW |
  4135. test_bit(STATUS_RF_KILL_SW, &priv->status) <<
  4136. STATUS_RF_KILL_SW |
  4137. test_bit(STATUS_GEO_CONFIGURED, &priv->status) <<
  4138. STATUS_GEO_CONFIGURED |
  4139. test_bit(STATUS_IN_SUSPEND, &priv->status) <<
  4140. STATUS_IN_SUSPEND |
  4141. test_bit(STATUS_FW_ERROR, &priv->status) <<
  4142. STATUS_FW_ERROR |
  4143. test_bit(STATUS_EXIT_PENDING, &priv->status) <<
  4144. STATUS_EXIT_PENDING;
  4145. spin_lock_irqsave(&priv->lock, flags);
  4146. iwl_clear_bit(priv, CSR_GP_CNTRL, CSR_GP_CNTRL_REG_FLAG_MAC_ACCESS_REQ);
  4147. spin_unlock_irqrestore(&priv->lock, flags);
  4148. iwl3945_hw_txq_ctx_stop(priv);
  4149. iwl3945_hw_rxq_stop(priv);
  4150. spin_lock_irqsave(&priv->lock, flags);
  4151. if (!iwl_grab_nic_access(priv)) {
  4152. iwl_write_prph(priv, APMG_CLK_DIS_REG,
  4153. APMG_CLK_VAL_DMA_CLK_RQT);
  4154. iwl_release_nic_access(priv);
  4155. }
  4156. spin_unlock_irqrestore(&priv->lock, flags);
  4157. udelay(5);
  4158. priv->cfg->ops->lib->apm_ops.reset(priv);
  4159. exit:
  4160. memset(&priv->card_alive, 0, sizeof(struct iwl_alive_resp));
  4161. if (priv->ibss_beacon)
  4162. dev_kfree_skb(priv->ibss_beacon);
  4163. priv->ibss_beacon = NULL;
  4164. /* clear out any free frames */
  4165. iwl3945_clear_free_frames(priv);
  4166. }
  4167. static void iwl3945_down(struct iwl_priv *priv)
  4168. {
  4169. mutex_lock(&priv->mutex);
  4170. __iwl3945_down(priv);
  4171. mutex_unlock(&priv->mutex);
  4172. iwl3945_cancel_deferred_work(priv);
  4173. }
  4174. #define MAX_HW_RESTARTS 5
  4175. static int __iwl3945_up(struct iwl_priv *priv)
  4176. {
  4177. int rc, i;
  4178. if (test_bit(STATUS_EXIT_PENDING, &priv->status)) {
  4179. IWL_WARN(priv, "Exit pending; will not bring the NIC up\n");
  4180. return -EIO;
  4181. }
  4182. if (test_bit(STATUS_RF_KILL_SW, &priv->status)) {
  4183. IWL_WARN(priv, "Radio disabled by SW RF kill (module "
  4184. "parameter)\n");
  4185. return -ENODEV;
  4186. }
  4187. if (!priv->ucode_data_backup.v_addr || !priv->ucode_data.v_addr) {
  4188. IWL_ERR(priv, "ucode not available for device bring up\n");
  4189. return -EIO;
  4190. }
  4191. /* If platform's RF_KILL switch is NOT set to KILL */
  4192. if (iwl_read32(priv, CSR_GP_CNTRL) &
  4193. CSR_GP_CNTRL_REG_FLAG_HW_RF_KILL_SW)
  4194. clear_bit(STATUS_RF_KILL_HW, &priv->status);
  4195. else {
  4196. set_bit(STATUS_RF_KILL_HW, &priv->status);
  4197. if (!test_bit(STATUS_IN_SUSPEND, &priv->status)) {
  4198. IWL_WARN(priv, "Radio disabled by HW RF Kill switch\n");
  4199. return -ENODEV;
  4200. }
  4201. }
  4202. iwl_write32(priv, CSR_INT, 0xFFFFFFFF);
  4203. rc = iwl3945_hw_nic_init(priv);
  4204. if (rc) {
  4205. IWL_ERR(priv, "Unable to int nic\n");
  4206. return rc;
  4207. }
  4208. /* make sure rfkill handshake bits are cleared */
  4209. iwl_write32(priv, CSR_UCODE_DRV_GP1_CLR, CSR_UCODE_SW_BIT_RFKILL);
  4210. iwl_write32(priv, CSR_UCODE_DRV_GP1_CLR,
  4211. CSR_UCODE_DRV_GP1_BIT_CMD_BLOCKED);
  4212. /* clear (again), then enable host interrupts */
  4213. iwl_write32(priv, CSR_INT, 0xFFFFFFFF);
  4214. iwl3945_enable_interrupts(priv);
  4215. /* really make sure rfkill handshake bits are cleared */
  4216. iwl_write32(priv, CSR_UCODE_DRV_GP1_CLR, CSR_UCODE_SW_BIT_RFKILL);
  4217. iwl_write32(priv, CSR_UCODE_DRV_GP1_CLR, CSR_UCODE_SW_BIT_RFKILL);
  4218. /* Copy original ucode data image from disk into backup cache.
  4219. * This will be used to initialize the on-board processor's
  4220. * data SRAM for a clean start when the runtime program first loads. */
  4221. memcpy(priv->ucode_data_backup.v_addr, priv->ucode_data.v_addr,
  4222. priv->ucode_data.len);
  4223. /* We return success when we resume from suspend and rf_kill is on. */
  4224. if (test_bit(STATUS_RF_KILL_HW, &priv->status))
  4225. return 0;
  4226. for (i = 0; i < MAX_HW_RESTARTS; i++) {
  4227. iwl3945_clear_stations_table(priv);
  4228. /* load bootstrap state machine,
  4229. * load bootstrap program into processor's memory,
  4230. * prepare to load the "initialize" uCode */
  4231. priv->cfg->ops->lib->load_ucode(priv);
  4232. if (rc) {
  4233. IWL_ERR(priv,
  4234. "Unable to set up bootstrap uCode: %d\n", rc);
  4235. continue;
  4236. }
  4237. /* start card; "initialize" will load runtime ucode */
  4238. iwl3945_nic_start(priv);
  4239. IWL_DEBUG_INFO(DRV_NAME " is coming up\n");
  4240. return 0;
  4241. }
  4242. set_bit(STATUS_EXIT_PENDING, &priv->status);
  4243. __iwl3945_down(priv);
  4244. clear_bit(STATUS_EXIT_PENDING, &priv->status);
  4245. /* tried to restart and config the device for as long as our
  4246. * patience could withstand */
  4247. IWL_ERR(priv, "Unable to initialize device after %d attempts.\n", i);
  4248. return -EIO;
  4249. }
  4250. /*****************************************************************************
  4251. *
  4252. * Workqueue callbacks
  4253. *
  4254. *****************************************************************************/
  4255. static void iwl3945_bg_init_alive_start(struct work_struct *data)
  4256. {
  4257. struct iwl_priv *priv =
  4258. container_of(data, struct iwl_priv, init_alive_start.work);
  4259. if (test_bit(STATUS_EXIT_PENDING, &priv->status))
  4260. return;
  4261. mutex_lock(&priv->mutex);
  4262. iwl3945_init_alive_start(priv);
  4263. mutex_unlock(&priv->mutex);
  4264. }
  4265. static void iwl3945_bg_alive_start(struct work_struct *data)
  4266. {
  4267. struct iwl_priv *priv =
  4268. container_of(data, struct iwl_priv, alive_start.work);
  4269. if (test_bit(STATUS_EXIT_PENDING, &priv->status))
  4270. return;
  4271. mutex_lock(&priv->mutex);
  4272. iwl3945_alive_start(priv);
  4273. mutex_unlock(&priv->mutex);
  4274. }
  4275. static void iwl3945_rfkill_poll(struct work_struct *data)
  4276. {
  4277. struct iwl_priv *priv =
  4278. container_of(data, struct iwl_priv, rfkill_poll.work);
  4279. unsigned long status = priv->status;
  4280. if (iwl_read32(priv, CSR_GP_CNTRL) & CSR_GP_CNTRL_REG_FLAG_HW_RF_KILL_SW)
  4281. clear_bit(STATUS_RF_KILL_HW, &priv->status);
  4282. else
  4283. set_bit(STATUS_RF_KILL_HW, &priv->status);
  4284. if (test_bit(STATUS_RF_KILL_HW, &status) != test_bit(STATUS_RF_KILL_HW, &priv->status))
  4285. queue_work(priv->workqueue, &priv->rf_kill);
  4286. queue_delayed_work(priv->workqueue, &priv->rfkill_poll,
  4287. round_jiffies_relative(2 * HZ));
  4288. }
  4289. #define IWL_SCAN_CHECK_WATCHDOG (7 * HZ)
  4290. static void iwl3945_bg_scan_check(struct work_struct *data)
  4291. {
  4292. struct iwl_priv *priv =
  4293. container_of(data, struct iwl_priv, scan_check.work);
  4294. if (test_bit(STATUS_EXIT_PENDING, &priv->status))
  4295. return;
  4296. mutex_lock(&priv->mutex);
  4297. if (test_bit(STATUS_SCANNING, &priv->status) ||
  4298. test_bit(STATUS_SCAN_ABORTING, &priv->status)) {
  4299. IWL_DEBUG(IWL_DL_INFO | IWL_DL_SCAN,
  4300. "Scan completion watchdog resetting adapter (%dms)\n",
  4301. jiffies_to_msecs(IWL_SCAN_CHECK_WATCHDOG));
  4302. if (!test_bit(STATUS_EXIT_PENDING, &priv->status))
  4303. iwl3945_send_scan_abort(priv);
  4304. }
  4305. mutex_unlock(&priv->mutex);
  4306. }
  4307. static void iwl3945_bg_request_scan(struct work_struct *data)
  4308. {
  4309. struct iwl_priv *priv =
  4310. container_of(data, struct iwl_priv, request_scan);
  4311. struct iwl_host_cmd cmd = {
  4312. .id = REPLY_SCAN_CMD,
  4313. .len = sizeof(struct iwl3945_scan_cmd),
  4314. .meta.flags = CMD_SIZE_HUGE,
  4315. };
  4316. int rc = 0;
  4317. struct iwl3945_scan_cmd *scan;
  4318. struct ieee80211_conf *conf = NULL;
  4319. u8 n_probes = 2;
  4320. enum ieee80211_band band;
  4321. DECLARE_SSID_BUF(ssid);
  4322. conf = ieee80211_get_hw_conf(priv->hw);
  4323. mutex_lock(&priv->mutex);
  4324. if (!iwl_is_ready(priv)) {
  4325. IWL_WARN(priv, "request scan called when driver not ready.\n");
  4326. goto done;
  4327. }
  4328. /* Make sure the scan wasn't canceled before this queued work
  4329. * was given the chance to run... */
  4330. if (!test_bit(STATUS_SCANNING, &priv->status))
  4331. goto done;
  4332. /* This should never be called or scheduled if there is currently
  4333. * a scan active in the hardware. */
  4334. if (test_bit(STATUS_SCAN_HW, &priv->status)) {
  4335. IWL_DEBUG_INFO("Multiple concurrent scan requests in parallel. "
  4336. "Ignoring second request.\n");
  4337. rc = -EIO;
  4338. goto done;
  4339. }
  4340. if (test_bit(STATUS_EXIT_PENDING, &priv->status)) {
  4341. IWL_DEBUG_SCAN("Aborting scan due to device shutdown\n");
  4342. goto done;
  4343. }
  4344. if (test_bit(STATUS_SCAN_ABORTING, &priv->status)) {
  4345. IWL_DEBUG_HC("Scan request while abort pending. Queuing.\n");
  4346. goto done;
  4347. }
  4348. if (iwl_is_rfkill(priv)) {
  4349. IWL_DEBUG_HC("Aborting scan due to RF Kill activation\n");
  4350. goto done;
  4351. }
  4352. if (!test_bit(STATUS_READY, &priv->status)) {
  4353. IWL_DEBUG_HC("Scan request while uninitialized. Queuing.\n");
  4354. goto done;
  4355. }
  4356. if (!priv->scan_bands) {
  4357. IWL_DEBUG_HC("Aborting scan due to no requested bands\n");
  4358. goto done;
  4359. }
  4360. if (!priv->scan) {
  4361. priv->scan = kmalloc(sizeof(struct iwl3945_scan_cmd) +
  4362. IWL_MAX_SCAN_SIZE, GFP_KERNEL);
  4363. if (!priv->scan) {
  4364. rc = -ENOMEM;
  4365. goto done;
  4366. }
  4367. }
  4368. scan = priv->scan;
  4369. memset(scan, 0, sizeof(struct iwl3945_scan_cmd) + IWL_MAX_SCAN_SIZE);
  4370. scan->quiet_plcp_th = IWL_PLCP_QUIET_THRESH;
  4371. scan->quiet_time = IWL_ACTIVE_QUIET_TIME;
  4372. if (iwl3945_is_associated(priv)) {
  4373. u16 interval = 0;
  4374. u32 extra;
  4375. u32 suspend_time = 100;
  4376. u32 scan_suspend_time = 100;
  4377. unsigned long flags;
  4378. IWL_DEBUG_INFO("Scanning while associated...\n");
  4379. spin_lock_irqsave(&priv->lock, flags);
  4380. interval = priv->beacon_int;
  4381. spin_unlock_irqrestore(&priv->lock, flags);
  4382. scan->suspend_time = 0;
  4383. scan->max_out_time = cpu_to_le32(200 * 1024);
  4384. if (!interval)
  4385. interval = suspend_time;
  4386. /*
  4387. * suspend time format:
  4388. * 0-19: beacon interval in usec (time before exec.)
  4389. * 20-23: 0
  4390. * 24-31: number of beacons (suspend between channels)
  4391. */
  4392. extra = (suspend_time / interval) << 24;
  4393. scan_suspend_time = 0xFF0FFFFF &
  4394. (extra | ((suspend_time % interval) * 1024));
  4395. scan->suspend_time = cpu_to_le32(scan_suspend_time);
  4396. IWL_DEBUG_SCAN("suspend_time 0x%X beacon interval %d\n",
  4397. scan_suspend_time, interval);
  4398. }
  4399. /* We should add the ability for user to lock to PASSIVE ONLY */
  4400. if (priv->one_direct_scan) {
  4401. IWL_DEBUG_SCAN
  4402. ("Kicking off one direct scan for '%s'\n",
  4403. print_ssid(ssid, priv->direct_ssid,
  4404. priv->direct_ssid_len));
  4405. scan->direct_scan[0].id = WLAN_EID_SSID;
  4406. scan->direct_scan[0].len = priv->direct_ssid_len;
  4407. memcpy(scan->direct_scan[0].ssid,
  4408. priv->direct_ssid, priv->direct_ssid_len);
  4409. n_probes++;
  4410. } else
  4411. IWL_DEBUG_SCAN("Kicking off one indirect scan.\n");
  4412. /* We don't build a direct scan probe request; the uCode will do
  4413. * that based on the direct_mask added to each channel entry */
  4414. scan->tx_cmd.len = cpu_to_le16(
  4415. iwl3945_fill_probe_req(priv, (struct ieee80211_mgmt *)scan->data,
  4416. IWL_MAX_SCAN_SIZE - sizeof(*scan)));
  4417. scan->tx_cmd.tx_flags = TX_CMD_FLG_SEQ_CTL_MSK;
  4418. scan->tx_cmd.sta_id = priv->hw_params.bcast_sta_id;
  4419. scan->tx_cmd.stop_time.life_time = TX_CMD_LIFE_TIME_INFINITE;
  4420. /* flags + rate selection */
  4421. if (priv->scan_bands & BIT(IEEE80211_BAND_2GHZ)) {
  4422. scan->flags = RXON_FLG_BAND_24G_MSK | RXON_FLG_AUTO_DETECT_MSK;
  4423. scan->tx_cmd.rate = IWL_RATE_1M_PLCP;
  4424. scan->good_CRC_th = 0;
  4425. band = IEEE80211_BAND_2GHZ;
  4426. } else if (priv->scan_bands & BIT(IEEE80211_BAND_5GHZ)) {
  4427. scan->tx_cmd.rate = IWL_RATE_6M_PLCP;
  4428. scan->good_CRC_th = IWL_GOOD_CRC_TH;
  4429. band = IEEE80211_BAND_5GHZ;
  4430. } else {
  4431. IWL_WARN(priv, "Invalid scan band count\n");
  4432. goto done;
  4433. }
  4434. /* select Rx antennas */
  4435. scan->flags |= iwl3945_get_antenna_flags(priv);
  4436. if (priv->iw_mode == NL80211_IFTYPE_MONITOR)
  4437. scan->filter_flags = RXON_FILTER_PROMISC_MSK;
  4438. scan->channel_count =
  4439. iwl3945_get_channels_for_scan(priv, band, 1, /* active */
  4440. n_probes,
  4441. (void *)&scan->data[le16_to_cpu(scan->tx_cmd.len)]);
  4442. if (scan->channel_count == 0) {
  4443. IWL_DEBUG_SCAN("channel count %d\n", scan->channel_count);
  4444. goto done;
  4445. }
  4446. cmd.len += le16_to_cpu(scan->tx_cmd.len) +
  4447. scan->channel_count * sizeof(struct iwl3945_scan_channel);
  4448. cmd.data = scan;
  4449. scan->len = cpu_to_le16(cmd.len);
  4450. set_bit(STATUS_SCAN_HW, &priv->status);
  4451. rc = iwl_send_cmd_sync(priv, &cmd);
  4452. if (rc)
  4453. goto done;
  4454. queue_delayed_work(priv->workqueue, &priv->scan_check,
  4455. IWL_SCAN_CHECK_WATCHDOG);
  4456. mutex_unlock(&priv->mutex);
  4457. return;
  4458. done:
  4459. /* can not perform scan make sure we clear scanning
  4460. * bits from status so next scan request can be performed.
  4461. * if we dont clear scanning status bit here all next scan
  4462. * will fail
  4463. */
  4464. clear_bit(STATUS_SCAN_HW, &priv->status);
  4465. clear_bit(STATUS_SCANNING, &priv->status);
  4466. /* inform mac80211 scan aborted */
  4467. queue_work(priv->workqueue, &priv->scan_completed);
  4468. mutex_unlock(&priv->mutex);
  4469. }
  4470. static void iwl3945_bg_up(struct work_struct *data)
  4471. {
  4472. struct iwl_priv *priv = container_of(data, struct iwl_priv, up);
  4473. if (test_bit(STATUS_EXIT_PENDING, &priv->status))
  4474. return;
  4475. mutex_lock(&priv->mutex);
  4476. __iwl3945_up(priv);
  4477. mutex_unlock(&priv->mutex);
  4478. iwl_rfkill_set_hw_state(priv);
  4479. }
  4480. static void iwl3945_bg_restart(struct work_struct *data)
  4481. {
  4482. struct iwl_priv *priv = container_of(data, struct iwl_priv, restart);
  4483. if (test_bit(STATUS_EXIT_PENDING, &priv->status))
  4484. return;
  4485. iwl3945_down(priv);
  4486. queue_work(priv->workqueue, &priv->up);
  4487. }
  4488. static void iwl3945_bg_rx_replenish(struct work_struct *data)
  4489. {
  4490. struct iwl_priv *priv =
  4491. container_of(data, struct iwl_priv, rx_replenish);
  4492. if (test_bit(STATUS_EXIT_PENDING, &priv->status))
  4493. return;
  4494. mutex_lock(&priv->mutex);
  4495. iwl3945_rx_replenish(priv);
  4496. mutex_unlock(&priv->mutex);
  4497. }
  4498. #define IWL_DELAY_NEXT_SCAN (HZ*2)
  4499. static void iwl3945_post_associate(struct iwl_priv *priv)
  4500. {
  4501. int rc = 0;
  4502. struct ieee80211_conf *conf = NULL;
  4503. if (priv->iw_mode == NL80211_IFTYPE_AP) {
  4504. IWL_ERR(priv, "%s Should not be called in AP mode\n", __func__);
  4505. return;
  4506. }
  4507. IWL_DEBUG_ASSOC("Associated as %d to: %pM\n",
  4508. priv->assoc_id, priv->active39_rxon.bssid_addr);
  4509. if (test_bit(STATUS_EXIT_PENDING, &priv->status))
  4510. return;
  4511. if (!priv->vif || !priv->is_open)
  4512. return;
  4513. iwl_scan_cancel_timeout(priv, 200);
  4514. conf = ieee80211_get_hw_conf(priv->hw);
  4515. priv->staging39_rxon.filter_flags &= ~RXON_FILTER_ASSOC_MSK;
  4516. iwl3945_commit_rxon(priv);
  4517. memset(&priv->rxon_timing, 0, sizeof(struct iwl_rxon_time_cmd));
  4518. iwl3945_setup_rxon_timing(priv);
  4519. rc = iwl_send_cmd_pdu(priv, REPLY_RXON_TIMING,
  4520. sizeof(priv->rxon_timing), &priv->rxon_timing);
  4521. if (rc)
  4522. IWL_WARN(priv, "REPLY_RXON_TIMING failed - "
  4523. "Attempting to continue.\n");
  4524. priv->staging39_rxon.filter_flags |= RXON_FILTER_ASSOC_MSK;
  4525. priv->staging39_rxon.assoc_id = cpu_to_le16(priv->assoc_id);
  4526. IWL_DEBUG_ASSOC("assoc id %d beacon interval %d\n",
  4527. priv->assoc_id, priv->beacon_int);
  4528. if (priv->assoc_capability & WLAN_CAPABILITY_SHORT_PREAMBLE)
  4529. priv->staging39_rxon.flags |= RXON_FLG_SHORT_PREAMBLE_MSK;
  4530. else
  4531. priv->staging39_rxon.flags &= ~RXON_FLG_SHORT_PREAMBLE_MSK;
  4532. if (priv->staging39_rxon.flags & RXON_FLG_BAND_24G_MSK) {
  4533. if (priv->assoc_capability & WLAN_CAPABILITY_SHORT_SLOT_TIME)
  4534. priv->staging39_rxon.flags |= RXON_FLG_SHORT_SLOT_MSK;
  4535. else
  4536. priv->staging39_rxon.flags &= ~RXON_FLG_SHORT_SLOT_MSK;
  4537. if (priv->iw_mode == NL80211_IFTYPE_ADHOC)
  4538. priv->staging39_rxon.flags &= ~RXON_FLG_SHORT_SLOT_MSK;
  4539. }
  4540. iwl3945_commit_rxon(priv);
  4541. switch (priv->iw_mode) {
  4542. case NL80211_IFTYPE_STATION:
  4543. iwl3945_rate_scale_init(priv->hw, IWL_AP_ID);
  4544. break;
  4545. case NL80211_IFTYPE_ADHOC:
  4546. priv->assoc_id = 1;
  4547. iwl3945_add_station(priv, priv->bssid, 0, 0);
  4548. iwl3945_sync_sta(priv, IWL_STA_ID,
  4549. (priv->band == IEEE80211_BAND_5GHZ) ?
  4550. IWL_RATE_6M_PLCP : IWL_RATE_1M_PLCP,
  4551. CMD_ASYNC);
  4552. iwl3945_rate_scale_init(priv->hw, IWL_STA_ID);
  4553. iwl3945_send_beacon_cmd(priv);
  4554. break;
  4555. default:
  4556. IWL_ERR(priv, "%s Should not be called in %d mode\n",
  4557. __func__, priv->iw_mode);
  4558. break;
  4559. }
  4560. iwl3945_activate_qos(priv, 0);
  4561. /* we have just associated, don't start scan too early */
  4562. priv->next_scan_jiffies = jiffies + IWL_DELAY_NEXT_SCAN;
  4563. }
  4564. static void iwl3945_bg_abort_scan(struct work_struct *work)
  4565. {
  4566. struct iwl_priv *priv = container_of(work, struct iwl_priv, abort_scan);
  4567. if (!iwl_is_ready(priv))
  4568. return;
  4569. mutex_lock(&priv->mutex);
  4570. set_bit(STATUS_SCAN_ABORTING, &priv->status);
  4571. iwl3945_send_scan_abort(priv);
  4572. mutex_unlock(&priv->mutex);
  4573. }
  4574. static int iwl3945_mac_config(struct ieee80211_hw *hw, u32 changed);
  4575. static void iwl3945_bg_scan_completed(struct work_struct *work)
  4576. {
  4577. struct iwl_priv *priv =
  4578. container_of(work, struct iwl_priv, scan_completed);
  4579. IWL_DEBUG(IWL_DL_INFO | IWL_DL_SCAN, "SCAN complete scan\n");
  4580. if (test_bit(STATUS_EXIT_PENDING, &priv->status))
  4581. return;
  4582. if (test_bit(STATUS_CONF_PENDING, &priv->status))
  4583. iwl3945_mac_config(priv->hw, 0);
  4584. ieee80211_scan_completed(priv->hw);
  4585. /* Since setting the TXPOWER may have been deferred while
  4586. * performing the scan, fire one off */
  4587. mutex_lock(&priv->mutex);
  4588. iwl3945_hw_reg_send_txpower(priv);
  4589. mutex_unlock(&priv->mutex);
  4590. }
  4591. /*****************************************************************************
  4592. *
  4593. * mac80211 entry point functions
  4594. *
  4595. *****************************************************************************/
  4596. #define UCODE_READY_TIMEOUT (2 * HZ)
  4597. static int iwl3945_mac_start(struct ieee80211_hw *hw)
  4598. {
  4599. struct iwl_priv *priv = hw->priv;
  4600. int ret;
  4601. IWL_DEBUG_MAC80211("enter\n");
  4602. /* we should be verifying the device is ready to be opened */
  4603. mutex_lock(&priv->mutex);
  4604. memset(&priv->staging39_rxon, 0, sizeof(struct iwl3945_rxon_cmd));
  4605. /* fetch ucode file from disk, alloc and copy to bus-master buffers ...
  4606. * ucode filename and max sizes are card-specific. */
  4607. if (!priv->ucode_code.len) {
  4608. ret = iwl3945_read_ucode(priv);
  4609. if (ret) {
  4610. IWL_ERR(priv, "Could not read microcode: %d\n", ret);
  4611. mutex_unlock(&priv->mutex);
  4612. goto out_release_irq;
  4613. }
  4614. }
  4615. ret = __iwl3945_up(priv);
  4616. mutex_unlock(&priv->mutex);
  4617. iwl_rfkill_set_hw_state(priv);
  4618. if (ret)
  4619. goto out_release_irq;
  4620. IWL_DEBUG_INFO("Start UP work.\n");
  4621. if (test_bit(STATUS_IN_SUSPEND, &priv->status))
  4622. return 0;
  4623. /* Wait for START_ALIVE from ucode. Otherwise callbacks from
  4624. * mac80211 will not be run successfully. */
  4625. ret = wait_event_interruptible_timeout(priv->wait_command_queue,
  4626. test_bit(STATUS_READY, &priv->status),
  4627. UCODE_READY_TIMEOUT);
  4628. if (!ret) {
  4629. if (!test_bit(STATUS_READY, &priv->status)) {
  4630. IWL_ERR(priv,
  4631. "Wait for START_ALIVE timeout after %dms.\n",
  4632. jiffies_to_msecs(UCODE_READY_TIMEOUT));
  4633. ret = -ETIMEDOUT;
  4634. goto out_release_irq;
  4635. }
  4636. }
  4637. /* ucode is running and will send rfkill notifications,
  4638. * no need to poll the killswitch state anymore */
  4639. cancel_delayed_work(&priv->rfkill_poll);
  4640. priv->is_open = 1;
  4641. IWL_DEBUG_MAC80211("leave\n");
  4642. return 0;
  4643. out_release_irq:
  4644. priv->is_open = 0;
  4645. IWL_DEBUG_MAC80211("leave - failed\n");
  4646. return ret;
  4647. }
  4648. static void iwl3945_mac_stop(struct ieee80211_hw *hw)
  4649. {
  4650. struct iwl_priv *priv = hw->priv;
  4651. IWL_DEBUG_MAC80211("enter\n");
  4652. if (!priv->is_open) {
  4653. IWL_DEBUG_MAC80211("leave - skip\n");
  4654. return;
  4655. }
  4656. priv->is_open = 0;
  4657. if (iwl_is_ready_rf(priv)) {
  4658. /* stop mac, cancel any scan request and clear
  4659. * RXON_FILTER_ASSOC_MSK BIT
  4660. */
  4661. mutex_lock(&priv->mutex);
  4662. iwl_scan_cancel_timeout(priv, 100);
  4663. mutex_unlock(&priv->mutex);
  4664. }
  4665. iwl3945_down(priv);
  4666. flush_workqueue(priv->workqueue);
  4667. /* start polling the killswitch state again */
  4668. queue_delayed_work(priv->workqueue, &priv->rfkill_poll,
  4669. round_jiffies_relative(2 * HZ));
  4670. IWL_DEBUG_MAC80211("leave\n");
  4671. }
  4672. static int iwl3945_mac_tx(struct ieee80211_hw *hw, struct sk_buff *skb)
  4673. {
  4674. struct iwl_priv *priv = hw->priv;
  4675. IWL_DEBUG_MAC80211("enter\n");
  4676. IWL_DEBUG_TX("dev->xmit(%d bytes) at rate 0x%02x\n", skb->len,
  4677. ieee80211_get_tx_rate(hw, IEEE80211_SKB_CB(skb))->bitrate);
  4678. if (iwl3945_tx_skb(priv, skb))
  4679. dev_kfree_skb_any(skb);
  4680. IWL_DEBUG_MAC80211("leave\n");
  4681. return NETDEV_TX_OK;
  4682. }
  4683. static int iwl3945_mac_add_interface(struct ieee80211_hw *hw,
  4684. struct ieee80211_if_init_conf *conf)
  4685. {
  4686. struct iwl_priv *priv = hw->priv;
  4687. unsigned long flags;
  4688. IWL_DEBUG_MAC80211("enter: type %d\n", conf->type);
  4689. if (priv->vif) {
  4690. IWL_DEBUG_MAC80211("leave - vif != NULL\n");
  4691. return -EOPNOTSUPP;
  4692. }
  4693. spin_lock_irqsave(&priv->lock, flags);
  4694. priv->vif = conf->vif;
  4695. priv->iw_mode = conf->type;
  4696. spin_unlock_irqrestore(&priv->lock, flags);
  4697. mutex_lock(&priv->mutex);
  4698. if (conf->mac_addr) {
  4699. IWL_DEBUG_MAC80211("Set: %pM\n", conf->mac_addr);
  4700. memcpy(priv->mac_addr, conf->mac_addr, ETH_ALEN);
  4701. }
  4702. if (iwl_is_ready(priv))
  4703. iwl3945_set_mode(priv, conf->type);
  4704. mutex_unlock(&priv->mutex);
  4705. IWL_DEBUG_MAC80211("leave\n");
  4706. return 0;
  4707. }
  4708. /**
  4709. * iwl3945_mac_config - mac80211 config callback
  4710. *
  4711. * We ignore conf->flags & IEEE80211_CONF_SHORT_SLOT_TIME since it seems to
  4712. * be set inappropriately and the driver currently sets the hardware up to
  4713. * use it whenever needed.
  4714. */
  4715. static int iwl3945_mac_config(struct ieee80211_hw *hw, u32 changed)
  4716. {
  4717. struct iwl_priv *priv = hw->priv;
  4718. const struct iwl_channel_info *ch_info;
  4719. struct ieee80211_conf *conf = &hw->conf;
  4720. unsigned long flags;
  4721. int ret = 0;
  4722. mutex_lock(&priv->mutex);
  4723. IWL_DEBUG_MAC80211("enter to channel %d\n", conf->channel->hw_value);
  4724. if (!iwl_is_ready(priv)) {
  4725. IWL_DEBUG_MAC80211("leave - not ready\n");
  4726. ret = -EIO;
  4727. goto out;
  4728. }
  4729. if (unlikely(!iwl3945_mod_params.disable_hw_scan &&
  4730. test_bit(STATUS_SCANNING, &priv->status))) {
  4731. IWL_DEBUG_MAC80211("leave - scanning\n");
  4732. set_bit(STATUS_CONF_PENDING, &priv->status);
  4733. mutex_unlock(&priv->mutex);
  4734. return 0;
  4735. }
  4736. spin_lock_irqsave(&priv->lock, flags);
  4737. ch_info = iwl3945_get_channel_info(priv, conf->channel->band,
  4738. conf->channel->hw_value);
  4739. if (!is_channel_valid(ch_info)) {
  4740. IWL_DEBUG_SCAN("Channel %d [%d] is INVALID for this band.\n",
  4741. conf->channel->hw_value, conf->channel->band);
  4742. IWL_DEBUG_MAC80211("leave - invalid channel\n");
  4743. spin_unlock_irqrestore(&priv->lock, flags);
  4744. ret = -EINVAL;
  4745. goto out;
  4746. }
  4747. iwl3945_set_rxon_channel(priv, conf->channel->band, conf->channel->hw_value);
  4748. iwl3945_set_flags_for_phymode(priv, conf->channel->band);
  4749. /* The list of supported rates and rate mask can be different
  4750. * for each phymode; since the phymode may have changed, reset
  4751. * the rate mask to what mac80211 lists */
  4752. iwl3945_set_rate(priv);
  4753. spin_unlock_irqrestore(&priv->lock, flags);
  4754. #ifdef IEEE80211_CONF_CHANNEL_SWITCH
  4755. if (conf->flags & IEEE80211_CONF_CHANNEL_SWITCH) {
  4756. iwl3945_hw_channel_switch(priv, conf->channel);
  4757. goto out;
  4758. }
  4759. #endif
  4760. iwl3945_radio_kill_sw(priv, !conf->radio_enabled);
  4761. if (!conf->radio_enabled) {
  4762. IWL_DEBUG_MAC80211("leave - radio disabled\n");
  4763. goto out;
  4764. }
  4765. if (iwl_is_rfkill(priv)) {
  4766. IWL_DEBUG_MAC80211("leave - RF kill\n");
  4767. ret = -EIO;
  4768. goto out;
  4769. }
  4770. iwl3945_set_rate(priv);
  4771. if (memcmp(&priv->active39_rxon,
  4772. &priv->staging39_rxon, sizeof(priv->staging39_rxon)))
  4773. iwl3945_commit_rxon(priv);
  4774. else
  4775. IWL_DEBUG_INFO("No re-sending same RXON configuration.\n");
  4776. IWL_DEBUG_MAC80211("leave\n");
  4777. out:
  4778. clear_bit(STATUS_CONF_PENDING, &priv->status);
  4779. mutex_unlock(&priv->mutex);
  4780. return ret;
  4781. }
  4782. static void iwl3945_config_ap(struct iwl_priv *priv)
  4783. {
  4784. int rc = 0;
  4785. if (test_bit(STATUS_EXIT_PENDING, &priv->status))
  4786. return;
  4787. /* The following should be done only at AP bring up */
  4788. if (!(iwl3945_is_associated(priv))) {
  4789. /* RXON - unassoc (to set timing command) */
  4790. priv->staging39_rxon.filter_flags &= ~RXON_FILTER_ASSOC_MSK;
  4791. iwl3945_commit_rxon(priv);
  4792. /* RXON Timing */
  4793. memset(&priv->rxon_timing, 0, sizeof(struct iwl_rxon_time_cmd));
  4794. iwl3945_setup_rxon_timing(priv);
  4795. rc = iwl_send_cmd_pdu(priv, REPLY_RXON_TIMING,
  4796. sizeof(priv->rxon_timing),
  4797. &priv->rxon_timing);
  4798. if (rc)
  4799. IWL_WARN(priv, "REPLY_RXON_TIMING failed - "
  4800. "Attempting to continue.\n");
  4801. /* FIXME: what should be the assoc_id for AP? */
  4802. priv->staging39_rxon.assoc_id = cpu_to_le16(priv->assoc_id);
  4803. if (priv->assoc_capability & WLAN_CAPABILITY_SHORT_PREAMBLE)
  4804. priv->staging39_rxon.flags |=
  4805. RXON_FLG_SHORT_PREAMBLE_MSK;
  4806. else
  4807. priv->staging39_rxon.flags &=
  4808. ~RXON_FLG_SHORT_PREAMBLE_MSK;
  4809. if (priv->staging39_rxon.flags & RXON_FLG_BAND_24G_MSK) {
  4810. if (priv->assoc_capability &
  4811. WLAN_CAPABILITY_SHORT_SLOT_TIME)
  4812. priv->staging39_rxon.flags |=
  4813. RXON_FLG_SHORT_SLOT_MSK;
  4814. else
  4815. priv->staging39_rxon.flags &=
  4816. ~RXON_FLG_SHORT_SLOT_MSK;
  4817. if (priv->iw_mode == NL80211_IFTYPE_ADHOC)
  4818. priv->staging39_rxon.flags &=
  4819. ~RXON_FLG_SHORT_SLOT_MSK;
  4820. }
  4821. /* restore RXON assoc */
  4822. priv->staging39_rxon.filter_flags |= RXON_FILTER_ASSOC_MSK;
  4823. iwl3945_commit_rxon(priv);
  4824. iwl3945_add_station(priv, iwl_bcast_addr, 0, 0);
  4825. }
  4826. iwl3945_send_beacon_cmd(priv);
  4827. /* FIXME - we need to add code here to detect a totally new
  4828. * configuration, reset the AP, unassoc, rxon timing, assoc,
  4829. * clear sta table, add BCAST sta... */
  4830. }
  4831. static int iwl3945_mac_config_interface(struct ieee80211_hw *hw,
  4832. struct ieee80211_vif *vif,
  4833. struct ieee80211_if_conf *conf)
  4834. {
  4835. struct iwl_priv *priv = hw->priv;
  4836. int rc;
  4837. if (conf == NULL)
  4838. return -EIO;
  4839. if (priv->vif != vif) {
  4840. IWL_DEBUG_MAC80211("leave - priv->vif != vif\n");
  4841. return 0;
  4842. }
  4843. /* handle this temporarily here */
  4844. if (priv->iw_mode == NL80211_IFTYPE_ADHOC &&
  4845. conf->changed & IEEE80211_IFCC_BEACON) {
  4846. struct sk_buff *beacon = ieee80211_beacon_get(hw, vif);
  4847. if (!beacon)
  4848. return -ENOMEM;
  4849. mutex_lock(&priv->mutex);
  4850. rc = iwl3945_mac_beacon_update(hw, beacon);
  4851. mutex_unlock(&priv->mutex);
  4852. if (rc)
  4853. return rc;
  4854. }
  4855. if (!iwl_is_alive(priv))
  4856. return -EAGAIN;
  4857. mutex_lock(&priv->mutex);
  4858. if (conf->bssid)
  4859. IWL_DEBUG_MAC80211("bssid: %pM\n", conf->bssid);
  4860. /*
  4861. * very dubious code was here; the probe filtering flag is never set:
  4862. *
  4863. if (unlikely(test_bit(STATUS_SCANNING, &priv->status)) &&
  4864. !(priv->hw->flags & IEEE80211_HW_NO_PROBE_FILTERING)) {
  4865. */
  4866. if (priv->iw_mode == NL80211_IFTYPE_AP) {
  4867. if (!conf->bssid) {
  4868. conf->bssid = priv->mac_addr;
  4869. memcpy(priv->bssid, priv->mac_addr, ETH_ALEN);
  4870. IWL_DEBUG_MAC80211("bssid was set to: %pM\n",
  4871. conf->bssid);
  4872. }
  4873. if (priv->ibss_beacon)
  4874. dev_kfree_skb(priv->ibss_beacon);
  4875. priv->ibss_beacon = ieee80211_beacon_get(hw, vif);
  4876. }
  4877. if (iwl_is_rfkill(priv))
  4878. goto done;
  4879. if (conf->bssid && !is_zero_ether_addr(conf->bssid) &&
  4880. !is_multicast_ether_addr(conf->bssid)) {
  4881. /* If there is currently a HW scan going on in the background
  4882. * then we need to cancel it else the RXON below will fail. */
  4883. if (iwl_scan_cancel_timeout(priv, 100)) {
  4884. IWL_WARN(priv, "Aborted scan still in progress "
  4885. "after 100ms\n");
  4886. IWL_DEBUG_MAC80211("leaving - scan abort failed.\n");
  4887. mutex_unlock(&priv->mutex);
  4888. return -EAGAIN;
  4889. }
  4890. memcpy(priv->staging39_rxon.bssid_addr, conf->bssid, ETH_ALEN);
  4891. /* TODO: Audit driver for usage of these members and see
  4892. * if mac80211 deprecates them (priv->bssid looks like it
  4893. * shouldn't be there, but I haven't scanned the IBSS code
  4894. * to verify) - jpk */
  4895. memcpy(priv->bssid, conf->bssid, ETH_ALEN);
  4896. if (priv->iw_mode == NL80211_IFTYPE_AP)
  4897. iwl3945_config_ap(priv);
  4898. else {
  4899. rc = iwl3945_commit_rxon(priv);
  4900. if ((priv->iw_mode == NL80211_IFTYPE_STATION) && rc)
  4901. iwl3945_add_station(priv,
  4902. priv->active39_rxon.bssid_addr, 1, 0);
  4903. }
  4904. } else {
  4905. iwl_scan_cancel_timeout(priv, 100);
  4906. priv->staging39_rxon.filter_flags &= ~RXON_FILTER_ASSOC_MSK;
  4907. iwl3945_commit_rxon(priv);
  4908. }
  4909. done:
  4910. IWL_DEBUG_MAC80211("leave\n");
  4911. mutex_unlock(&priv->mutex);
  4912. return 0;
  4913. }
  4914. static void iwl3945_configure_filter(struct ieee80211_hw *hw,
  4915. unsigned int changed_flags,
  4916. unsigned int *total_flags,
  4917. int mc_count, struct dev_addr_list *mc_list)
  4918. {
  4919. struct iwl_priv *priv = hw->priv;
  4920. __le32 *filter_flags = &priv->staging39_rxon.filter_flags;
  4921. IWL_DEBUG_MAC80211("Enter: changed: 0x%x, total: 0x%x\n",
  4922. changed_flags, *total_flags);
  4923. if (changed_flags & (FIF_OTHER_BSS | FIF_PROMISC_IN_BSS)) {
  4924. if (*total_flags & (FIF_OTHER_BSS | FIF_PROMISC_IN_BSS))
  4925. *filter_flags |= RXON_FILTER_PROMISC_MSK;
  4926. else
  4927. *filter_flags &= ~RXON_FILTER_PROMISC_MSK;
  4928. }
  4929. if (changed_flags & FIF_ALLMULTI) {
  4930. if (*total_flags & FIF_ALLMULTI)
  4931. *filter_flags |= RXON_FILTER_ACCEPT_GRP_MSK;
  4932. else
  4933. *filter_flags &= ~RXON_FILTER_ACCEPT_GRP_MSK;
  4934. }
  4935. if (changed_flags & FIF_CONTROL) {
  4936. if (*total_flags & FIF_CONTROL)
  4937. *filter_flags |= RXON_FILTER_CTL2HOST_MSK;
  4938. else
  4939. *filter_flags &= ~RXON_FILTER_CTL2HOST_MSK;
  4940. }
  4941. if (changed_flags & FIF_BCN_PRBRESP_PROMISC) {
  4942. if (*total_flags & FIF_BCN_PRBRESP_PROMISC)
  4943. *filter_flags |= RXON_FILTER_BCON_AWARE_MSK;
  4944. else
  4945. *filter_flags &= ~RXON_FILTER_BCON_AWARE_MSK;
  4946. }
  4947. /* We avoid iwl_commit_rxon here to commit the new filter flags
  4948. * since mac80211 will call ieee80211_hw_config immediately.
  4949. * (mc_list is not supported at this time). Otherwise, we need to
  4950. * queue a background iwl_commit_rxon work.
  4951. */
  4952. *total_flags &= FIF_OTHER_BSS | FIF_ALLMULTI | FIF_PROMISC_IN_BSS |
  4953. FIF_BCN_PRBRESP_PROMISC | FIF_CONTROL;
  4954. }
  4955. static void iwl3945_mac_remove_interface(struct ieee80211_hw *hw,
  4956. struct ieee80211_if_init_conf *conf)
  4957. {
  4958. struct iwl_priv *priv = hw->priv;
  4959. IWL_DEBUG_MAC80211("enter\n");
  4960. mutex_lock(&priv->mutex);
  4961. if (iwl_is_ready_rf(priv)) {
  4962. iwl_scan_cancel_timeout(priv, 100);
  4963. priv->staging39_rxon.filter_flags &= ~RXON_FILTER_ASSOC_MSK;
  4964. iwl3945_commit_rxon(priv);
  4965. }
  4966. if (priv->vif == conf->vif) {
  4967. priv->vif = NULL;
  4968. memset(priv->bssid, 0, ETH_ALEN);
  4969. }
  4970. mutex_unlock(&priv->mutex);
  4971. IWL_DEBUG_MAC80211("leave\n");
  4972. }
  4973. #define IWL_DELAY_NEXT_SCAN_AFTER_ASSOC (HZ*6)
  4974. static void iwl3945_bss_info_changed(struct ieee80211_hw *hw,
  4975. struct ieee80211_vif *vif,
  4976. struct ieee80211_bss_conf *bss_conf,
  4977. u32 changes)
  4978. {
  4979. struct iwl_priv *priv = hw->priv;
  4980. IWL_DEBUG_MAC80211("changes = 0x%X\n", changes);
  4981. if (changes & BSS_CHANGED_ERP_PREAMBLE) {
  4982. IWL_DEBUG_MAC80211("ERP_PREAMBLE %d\n",
  4983. bss_conf->use_short_preamble);
  4984. if (bss_conf->use_short_preamble)
  4985. priv->staging39_rxon.flags |= RXON_FLG_SHORT_PREAMBLE_MSK;
  4986. else
  4987. priv->staging39_rxon.flags &= ~RXON_FLG_SHORT_PREAMBLE_MSK;
  4988. }
  4989. if (changes & BSS_CHANGED_ERP_CTS_PROT) {
  4990. IWL_DEBUG_MAC80211("ERP_CTS %d\n", bss_conf->use_cts_prot);
  4991. if (bss_conf->use_cts_prot && (priv->band != IEEE80211_BAND_5GHZ))
  4992. priv->staging39_rxon.flags |= RXON_FLG_TGG_PROTECT_MSK;
  4993. else
  4994. priv->staging39_rxon.flags &= ~RXON_FLG_TGG_PROTECT_MSK;
  4995. }
  4996. if (changes & BSS_CHANGED_ASSOC) {
  4997. IWL_DEBUG_MAC80211("ASSOC %d\n", bss_conf->assoc);
  4998. /* This should never happen as this function should
  4999. * never be called from interrupt context. */
  5000. if (WARN_ON_ONCE(in_interrupt()))
  5001. return;
  5002. if (bss_conf->assoc) {
  5003. priv->assoc_id = bss_conf->aid;
  5004. priv->beacon_int = bss_conf->beacon_int;
  5005. priv->timestamp = bss_conf->timestamp;
  5006. priv->assoc_capability = bss_conf->assoc_capability;
  5007. priv->power_data.dtim_period = bss_conf->dtim_period;
  5008. priv->next_scan_jiffies = jiffies +
  5009. IWL_DELAY_NEXT_SCAN_AFTER_ASSOC;
  5010. mutex_lock(&priv->mutex);
  5011. iwl3945_post_associate(priv);
  5012. mutex_unlock(&priv->mutex);
  5013. } else {
  5014. priv->assoc_id = 0;
  5015. IWL_DEBUG_MAC80211("DISASSOC %d\n", bss_conf->assoc);
  5016. }
  5017. } else if (changes && iwl3945_is_associated(priv) && priv->assoc_id) {
  5018. IWL_DEBUG_MAC80211("Associated Changes %d\n", changes);
  5019. iwl3945_send_rxon_assoc(priv);
  5020. }
  5021. }
  5022. static int iwl3945_mac_hw_scan(struct ieee80211_hw *hw, u8 *ssid, size_t len)
  5023. {
  5024. int rc = 0;
  5025. unsigned long flags;
  5026. struct iwl_priv *priv = hw->priv;
  5027. DECLARE_SSID_BUF(ssid_buf);
  5028. IWL_DEBUG_MAC80211("enter\n");
  5029. mutex_lock(&priv->mutex);
  5030. spin_lock_irqsave(&priv->lock, flags);
  5031. if (!iwl_is_ready_rf(priv)) {
  5032. rc = -EIO;
  5033. IWL_DEBUG_MAC80211("leave - not ready or exit pending\n");
  5034. goto out_unlock;
  5035. }
  5036. /* we don't schedule scan within next_scan_jiffies period */
  5037. if (priv->next_scan_jiffies &&
  5038. time_after(priv->next_scan_jiffies, jiffies)) {
  5039. rc = -EAGAIN;
  5040. goto out_unlock;
  5041. }
  5042. /* if we just finished scan ask for delay for a broadcast scan */
  5043. if ((len == 0) && priv->last_scan_jiffies &&
  5044. time_after(priv->last_scan_jiffies + IWL_DELAY_NEXT_SCAN,
  5045. jiffies)) {
  5046. rc = -EAGAIN;
  5047. goto out_unlock;
  5048. }
  5049. if (len) {
  5050. IWL_DEBUG_SCAN("direct scan for %s [%d]\n ",
  5051. print_ssid(ssid_buf, ssid, len), (int)len);
  5052. priv->one_direct_scan = 1;
  5053. priv->direct_ssid_len = (u8)
  5054. min((u8) len, (u8) IW_ESSID_MAX_SIZE);
  5055. memcpy(priv->direct_ssid, ssid, priv->direct_ssid_len);
  5056. } else
  5057. priv->one_direct_scan = 0;
  5058. rc = iwl3945_scan_initiate(priv);
  5059. IWL_DEBUG_MAC80211("leave\n");
  5060. out_unlock:
  5061. spin_unlock_irqrestore(&priv->lock, flags);
  5062. mutex_unlock(&priv->mutex);
  5063. return rc;
  5064. }
  5065. static int iwl3945_mac_set_key(struct ieee80211_hw *hw, enum set_key_cmd cmd,
  5066. struct ieee80211_vif *vif,
  5067. struct ieee80211_sta *sta,
  5068. struct ieee80211_key_conf *key)
  5069. {
  5070. struct iwl_priv *priv = hw->priv;
  5071. const u8 *addr;
  5072. int ret;
  5073. u8 sta_id;
  5074. IWL_DEBUG_MAC80211("enter\n");
  5075. if (iwl3945_mod_params.sw_crypto) {
  5076. IWL_DEBUG_MAC80211("leave - hwcrypto disabled\n");
  5077. return -EOPNOTSUPP;
  5078. }
  5079. addr = sta ? sta->addr : iwl_bcast_addr;
  5080. sta_id = iwl3945_hw_find_station(priv, addr);
  5081. if (sta_id == IWL_INVALID_STATION) {
  5082. IWL_DEBUG_MAC80211("leave - %pM not in station map.\n",
  5083. addr);
  5084. return -EINVAL;
  5085. }
  5086. mutex_lock(&priv->mutex);
  5087. iwl_scan_cancel_timeout(priv, 100);
  5088. switch (cmd) {
  5089. case SET_KEY:
  5090. ret = iwl3945_update_sta_key_info(priv, key, sta_id);
  5091. if (!ret) {
  5092. iwl3945_set_rxon_hwcrypto(priv, 1);
  5093. iwl3945_commit_rxon(priv);
  5094. key->hw_key_idx = sta_id;
  5095. IWL_DEBUG_MAC80211("set_key success, using hwcrypto\n");
  5096. key->flags |= IEEE80211_KEY_FLAG_GENERATE_IV;
  5097. }
  5098. break;
  5099. case DISABLE_KEY:
  5100. ret = iwl3945_clear_sta_key_info(priv, sta_id);
  5101. if (!ret) {
  5102. iwl3945_set_rxon_hwcrypto(priv, 0);
  5103. iwl3945_commit_rxon(priv);
  5104. IWL_DEBUG_MAC80211("disable hwcrypto key\n");
  5105. }
  5106. break;
  5107. default:
  5108. ret = -EINVAL;
  5109. }
  5110. IWL_DEBUG_MAC80211("leave\n");
  5111. mutex_unlock(&priv->mutex);
  5112. return ret;
  5113. }
  5114. static int iwl3945_mac_conf_tx(struct ieee80211_hw *hw, u16 queue,
  5115. const struct ieee80211_tx_queue_params *params)
  5116. {
  5117. struct iwl_priv *priv = hw->priv;
  5118. unsigned long flags;
  5119. int q;
  5120. IWL_DEBUG_MAC80211("enter\n");
  5121. if (!iwl_is_ready_rf(priv)) {
  5122. IWL_DEBUG_MAC80211("leave - RF not ready\n");
  5123. return -EIO;
  5124. }
  5125. if (queue >= AC_NUM) {
  5126. IWL_DEBUG_MAC80211("leave - queue >= AC_NUM %d\n", queue);
  5127. return 0;
  5128. }
  5129. q = AC_NUM - 1 - queue;
  5130. spin_lock_irqsave(&priv->lock, flags);
  5131. priv->qos_data.def_qos_parm.ac[q].cw_min = cpu_to_le16(params->cw_min);
  5132. priv->qos_data.def_qos_parm.ac[q].cw_max = cpu_to_le16(params->cw_max);
  5133. priv->qos_data.def_qos_parm.ac[q].aifsn = params->aifs;
  5134. priv->qos_data.def_qos_parm.ac[q].edca_txop =
  5135. cpu_to_le16((params->txop * 32));
  5136. priv->qos_data.def_qos_parm.ac[q].reserved1 = 0;
  5137. priv->qos_data.qos_active = 1;
  5138. spin_unlock_irqrestore(&priv->lock, flags);
  5139. mutex_lock(&priv->mutex);
  5140. if (priv->iw_mode == NL80211_IFTYPE_AP)
  5141. iwl3945_activate_qos(priv, 1);
  5142. else if (priv->assoc_id && iwl3945_is_associated(priv))
  5143. iwl3945_activate_qos(priv, 0);
  5144. mutex_unlock(&priv->mutex);
  5145. IWL_DEBUG_MAC80211("leave\n");
  5146. return 0;
  5147. }
  5148. static int iwl3945_mac_get_tx_stats(struct ieee80211_hw *hw,
  5149. struct ieee80211_tx_queue_stats *stats)
  5150. {
  5151. struct iwl_priv *priv = hw->priv;
  5152. int i, avail;
  5153. struct iwl_tx_queue *txq;
  5154. struct iwl_queue *q;
  5155. unsigned long flags;
  5156. IWL_DEBUG_MAC80211("enter\n");
  5157. if (!iwl_is_ready_rf(priv)) {
  5158. IWL_DEBUG_MAC80211("leave - RF not ready\n");
  5159. return -EIO;
  5160. }
  5161. spin_lock_irqsave(&priv->lock, flags);
  5162. for (i = 0; i < AC_NUM; i++) {
  5163. txq = &priv->txq[i];
  5164. q = &txq->q;
  5165. avail = iwl_queue_space(q);
  5166. stats[i].len = q->n_window - avail;
  5167. stats[i].limit = q->n_window - q->high_mark;
  5168. stats[i].count = q->n_window;
  5169. }
  5170. spin_unlock_irqrestore(&priv->lock, flags);
  5171. IWL_DEBUG_MAC80211("leave\n");
  5172. return 0;
  5173. }
  5174. static void iwl3945_mac_reset_tsf(struct ieee80211_hw *hw)
  5175. {
  5176. struct iwl_priv *priv = hw->priv;
  5177. unsigned long flags;
  5178. mutex_lock(&priv->mutex);
  5179. IWL_DEBUG_MAC80211("enter\n");
  5180. iwl_reset_qos(priv);
  5181. spin_lock_irqsave(&priv->lock, flags);
  5182. priv->assoc_id = 0;
  5183. priv->assoc_capability = 0;
  5184. /* new association get rid of ibss beacon skb */
  5185. if (priv->ibss_beacon)
  5186. dev_kfree_skb(priv->ibss_beacon);
  5187. priv->ibss_beacon = NULL;
  5188. priv->beacon_int = priv->hw->conf.beacon_int;
  5189. priv->timestamp = 0;
  5190. if ((priv->iw_mode == NL80211_IFTYPE_STATION))
  5191. priv->beacon_int = 0;
  5192. spin_unlock_irqrestore(&priv->lock, flags);
  5193. if (!iwl_is_ready_rf(priv)) {
  5194. IWL_DEBUG_MAC80211("leave - not ready\n");
  5195. mutex_unlock(&priv->mutex);
  5196. return;
  5197. }
  5198. /* we are restarting association process
  5199. * clear RXON_FILTER_ASSOC_MSK bit
  5200. */
  5201. if (priv->iw_mode != NL80211_IFTYPE_AP) {
  5202. iwl_scan_cancel_timeout(priv, 100);
  5203. priv->staging39_rxon.filter_flags &= ~RXON_FILTER_ASSOC_MSK;
  5204. iwl3945_commit_rxon(priv);
  5205. }
  5206. /* Per mac80211.h: This is only used in IBSS mode... */
  5207. if (priv->iw_mode != NL80211_IFTYPE_ADHOC) {
  5208. IWL_DEBUG_MAC80211("leave - not in IBSS\n");
  5209. mutex_unlock(&priv->mutex);
  5210. return;
  5211. }
  5212. iwl3945_set_rate(priv);
  5213. mutex_unlock(&priv->mutex);
  5214. IWL_DEBUG_MAC80211("leave\n");
  5215. }
  5216. static int iwl3945_mac_beacon_update(struct ieee80211_hw *hw, struct sk_buff *skb)
  5217. {
  5218. struct iwl_priv *priv = hw->priv;
  5219. unsigned long flags;
  5220. IWL_DEBUG_MAC80211("enter\n");
  5221. if (!iwl_is_ready_rf(priv)) {
  5222. IWL_DEBUG_MAC80211("leave - RF not ready\n");
  5223. return -EIO;
  5224. }
  5225. if (priv->iw_mode != NL80211_IFTYPE_ADHOC) {
  5226. IWL_DEBUG_MAC80211("leave - not IBSS\n");
  5227. return -EIO;
  5228. }
  5229. spin_lock_irqsave(&priv->lock, flags);
  5230. if (priv->ibss_beacon)
  5231. dev_kfree_skb(priv->ibss_beacon);
  5232. priv->ibss_beacon = skb;
  5233. priv->assoc_id = 0;
  5234. IWL_DEBUG_MAC80211("leave\n");
  5235. spin_unlock_irqrestore(&priv->lock, flags);
  5236. iwl_reset_qos(priv);
  5237. iwl3945_post_associate(priv);
  5238. return 0;
  5239. }
  5240. /*****************************************************************************
  5241. *
  5242. * sysfs attributes
  5243. *
  5244. *****************************************************************************/
  5245. #ifdef CONFIG_IWL3945_DEBUG
  5246. /*
  5247. * The following adds a new attribute to the sysfs representation
  5248. * of this device driver (i.e. a new file in /sys/bus/pci/drivers/iwl/)
  5249. * used for controlling the debug level.
  5250. *
  5251. * See the level definitions in iwl for details.
  5252. */
  5253. static ssize_t show_debug_level(struct device *d,
  5254. struct device_attribute *attr, char *buf)
  5255. {
  5256. struct iwl_priv *priv = d->driver_data;
  5257. return sprintf(buf, "0x%08X\n", priv->debug_level);
  5258. }
  5259. static ssize_t store_debug_level(struct device *d,
  5260. struct device_attribute *attr,
  5261. const char *buf, size_t count)
  5262. {
  5263. struct iwl_priv *priv = d->driver_data;
  5264. unsigned long val;
  5265. int ret;
  5266. ret = strict_strtoul(buf, 0, &val);
  5267. if (ret)
  5268. IWL_INFO(priv, "%s is not in hex or decimal form.\n", buf);
  5269. else
  5270. priv->debug_level = val;
  5271. return strnlen(buf, count);
  5272. }
  5273. static DEVICE_ATTR(debug_level, S_IWUSR | S_IRUGO,
  5274. show_debug_level, store_debug_level);
  5275. #endif /* CONFIG_IWL3945_DEBUG */
  5276. static ssize_t show_temperature(struct device *d,
  5277. struct device_attribute *attr, char *buf)
  5278. {
  5279. struct iwl_priv *priv = (struct iwl_priv *)d->driver_data;
  5280. if (!iwl_is_alive(priv))
  5281. return -EAGAIN;
  5282. return sprintf(buf, "%d\n", iwl3945_hw_get_temperature(priv));
  5283. }
  5284. static DEVICE_ATTR(temperature, S_IRUGO, show_temperature, NULL);
  5285. static ssize_t show_tx_power(struct device *d,
  5286. struct device_attribute *attr, char *buf)
  5287. {
  5288. struct iwl_priv *priv = (struct iwl_priv *)d->driver_data;
  5289. return sprintf(buf, "%d\n", priv->tx_power_user_lmt);
  5290. }
  5291. static ssize_t store_tx_power(struct device *d,
  5292. struct device_attribute *attr,
  5293. const char *buf, size_t count)
  5294. {
  5295. struct iwl_priv *priv = (struct iwl_priv *)d->driver_data;
  5296. char *p = (char *)buf;
  5297. u32 val;
  5298. val = simple_strtoul(p, &p, 10);
  5299. if (p == buf)
  5300. IWL_INFO(priv, ": %s is not in decimal form.\n", buf);
  5301. else
  5302. iwl3945_hw_reg_set_txpower(priv, val);
  5303. return count;
  5304. }
  5305. static DEVICE_ATTR(tx_power, S_IWUSR | S_IRUGO, show_tx_power, store_tx_power);
  5306. static ssize_t show_flags(struct device *d,
  5307. struct device_attribute *attr, char *buf)
  5308. {
  5309. struct iwl_priv *priv = (struct iwl_priv *)d->driver_data;
  5310. return sprintf(buf, "0x%04X\n", priv->active39_rxon.flags);
  5311. }
  5312. static ssize_t store_flags(struct device *d,
  5313. struct device_attribute *attr,
  5314. const char *buf, size_t count)
  5315. {
  5316. struct iwl_priv *priv = (struct iwl_priv *)d->driver_data;
  5317. u32 flags = simple_strtoul(buf, NULL, 0);
  5318. mutex_lock(&priv->mutex);
  5319. if (le32_to_cpu(priv->staging39_rxon.flags) != flags) {
  5320. /* Cancel any currently running scans... */
  5321. if (iwl_scan_cancel_timeout(priv, 100))
  5322. IWL_WARN(priv, "Could not cancel scan.\n");
  5323. else {
  5324. IWL_DEBUG_INFO("Committing rxon.flags = 0x%04X\n",
  5325. flags);
  5326. priv->staging39_rxon.flags = cpu_to_le32(flags);
  5327. iwl3945_commit_rxon(priv);
  5328. }
  5329. }
  5330. mutex_unlock(&priv->mutex);
  5331. return count;
  5332. }
  5333. static DEVICE_ATTR(flags, S_IWUSR | S_IRUGO, show_flags, store_flags);
  5334. static ssize_t show_filter_flags(struct device *d,
  5335. struct device_attribute *attr, char *buf)
  5336. {
  5337. struct iwl_priv *priv = (struct iwl_priv *)d->driver_data;
  5338. return sprintf(buf, "0x%04X\n",
  5339. le32_to_cpu(priv->active39_rxon.filter_flags));
  5340. }
  5341. static ssize_t store_filter_flags(struct device *d,
  5342. struct device_attribute *attr,
  5343. const char *buf, size_t count)
  5344. {
  5345. struct iwl_priv *priv = (struct iwl_priv *)d->driver_data;
  5346. u32 filter_flags = simple_strtoul(buf, NULL, 0);
  5347. mutex_lock(&priv->mutex);
  5348. if (le32_to_cpu(priv->staging39_rxon.filter_flags) != filter_flags) {
  5349. /* Cancel any currently running scans... */
  5350. if (iwl_scan_cancel_timeout(priv, 100))
  5351. IWL_WARN(priv, "Could not cancel scan.\n");
  5352. else {
  5353. IWL_DEBUG_INFO("Committing rxon.filter_flags = "
  5354. "0x%04X\n", filter_flags);
  5355. priv->staging39_rxon.filter_flags =
  5356. cpu_to_le32(filter_flags);
  5357. iwl3945_commit_rxon(priv);
  5358. }
  5359. }
  5360. mutex_unlock(&priv->mutex);
  5361. return count;
  5362. }
  5363. static DEVICE_ATTR(filter_flags, S_IWUSR | S_IRUGO, show_filter_flags,
  5364. store_filter_flags);
  5365. #ifdef CONFIG_IWL3945_SPECTRUM_MEASUREMENT
  5366. static ssize_t show_measurement(struct device *d,
  5367. struct device_attribute *attr, char *buf)
  5368. {
  5369. struct iwl_priv *priv = dev_get_drvdata(d);
  5370. struct iwl_spectrum_notification measure_report;
  5371. u32 size = sizeof(measure_report), len = 0, ofs = 0;
  5372. u8 *data = (u8 *)&measure_report;
  5373. unsigned long flags;
  5374. spin_lock_irqsave(&priv->lock, flags);
  5375. if (!(priv->measurement_status & MEASUREMENT_READY)) {
  5376. spin_unlock_irqrestore(&priv->lock, flags);
  5377. return 0;
  5378. }
  5379. memcpy(&measure_report, &priv->measure_report, size);
  5380. priv->measurement_status = 0;
  5381. spin_unlock_irqrestore(&priv->lock, flags);
  5382. while (size && (PAGE_SIZE - len)) {
  5383. hex_dump_to_buffer(data + ofs, size, 16, 1, buf + len,
  5384. PAGE_SIZE - len, 1);
  5385. len = strlen(buf);
  5386. if (PAGE_SIZE - len)
  5387. buf[len++] = '\n';
  5388. ofs += 16;
  5389. size -= min(size, 16U);
  5390. }
  5391. return len;
  5392. }
  5393. static ssize_t store_measurement(struct device *d,
  5394. struct device_attribute *attr,
  5395. const char *buf, size_t count)
  5396. {
  5397. struct iwl_priv *priv = dev_get_drvdata(d);
  5398. struct ieee80211_measurement_params params = {
  5399. .channel = le16_to_cpu(priv->active39_rxon.channel),
  5400. .start_time = cpu_to_le64(priv->last_tsf),
  5401. .duration = cpu_to_le16(1),
  5402. };
  5403. u8 type = IWL_MEASURE_BASIC;
  5404. u8 buffer[32];
  5405. u8 channel;
  5406. if (count) {
  5407. char *p = buffer;
  5408. strncpy(buffer, buf, min(sizeof(buffer), count));
  5409. channel = simple_strtoul(p, NULL, 0);
  5410. if (channel)
  5411. params.channel = channel;
  5412. p = buffer;
  5413. while (*p && *p != ' ')
  5414. p++;
  5415. if (*p)
  5416. type = simple_strtoul(p + 1, NULL, 0);
  5417. }
  5418. IWL_DEBUG_INFO("Invoking measurement of type %d on "
  5419. "channel %d (for '%s')\n", type, params.channel, buf);
  5420. iwl3945_get_measurement(priv, &params, type);
  5421. return count;
  5422. }
  5423. static DEVICE_ATTR(measurement, S_IRUSR | S_IWUSR,
  5424. show_measurement, store_measurement);
  5425. #endif /* CONFIG_IWL3945_SPECTRUM_MEASUREMENT */
  5426. static ssize_t store_retry_rate(struct device *d,
  5427. struct device_attribute *attr,
  5428. const char *buf, size_t count)
  5429. {
  5430. struct iwl_priv *priv = dev_get_drvdata(d);
  5431. priv->retry_rate = simple_strtoul(buf, NULL, 0);
  5432. if (priv->retry_rate <= 0)
  5433. priv->retry_rate = 1;
  5434. return count;
  5435. }
  5436. static ssize_t show_retry_rate(struct device *d,
  5437. struct device_attribute *attr, char *buf)
  5438. {
  5439. struct iwl_priv *priv = dev_get_drvdata(d);
  5440. return sprintf(buf, "%d", priv->retry_rate);
  5441. }
  5442. static DEVICE_ATTR(retry_rate, S_IWUSR | S_IRUSR, show_retry_rate,
  5443. store_retry_rate);
  5444. static ssize_t store_power_level(struct device *d,
  5445. struct device_attribute *attr,
  5446. const char *buf, size_t count)
  5447. {
  5448. struct iwl_priv *priv = dev_get_drvdata(d);
  5449. int rc;
  5450. int mode;
  5451. mode = simple_strtoul(buf, NULL, 0);
  5452. mutex_lock(&priv->mutex);
  5453. if (!iwl_is_ready(priv)) {
  5454. rc = -EAGAIN;
  5455. goto out;
  5456. }
  5457. if ((mode < 1) || (mode > IWL39_POWER_LIMIT) ||
  5458. (mode == IWL39_POWER_AC))
  5459. mode = IWL39_POWER_AC;
  5460. else
  5461. mode |= IWL_POWER_ENABLED;
  5462. if (mode != priv->power_mode) {
  5463. rc = iwl3945_send_power_mode(priv, IWL_POWER_LEVEL(mode));
  5464. if (rc) {
  5465. IWL_DEBUG_MAC80211("failed setting power mode.\n");
  5466. goto out;
  5467. }
  5468. priv->power_mode = mode;
  5469. }
  5470. rc = count;
  5471. out:
  5472. mutex_unlock(&priv->mutex);
  5473. return rc;
  5474. }
  5475. #define MAX_WX_STRING 80
  5476. /* Values are in microsecond */
  5477. static const s32 timeout_duration[] = {
  5478. 350000,
  5479. 250000,
  5480. 75000,
  5481. 37000,
  5482. 25000,
  5483. };
  5484. static const s32 period_duration[] = {
  5485. 400000,
  5486. 700000,
  5487. 1000000,
  5488. 1000000,
  5489. 1000000
  5490. };
  5491. static ssize_t show_power_level(struct device *d,
  5492. struct device_attribute *attr, char *buf)
  5493. {
  5494. struct iwl_priv *priv = dev_get_drvdata(d);
  5495. int level = IWL_POWER_LEVEL(priv->power_mode);
  5496. char *p = buf;
  5497. p += sprintf(p, "%d ", level);
  5498. switch (level) {
  5499. case IWL_POWER_MODE_CAM:
  5500. case IWL39_POWER_AC:
  5501. p += sprintf(p, "(AC)");
  5502. break;
  5503. case IWL39_POWER_BATTERY:
  5504. p += sprintf(p, "(BATTERY)");
  5505. break;
  5506. default:
  5507. p += sprintf(p,
  5508. "(Timeout %dms, Period %dms)",
  5509. timeout_duration[level - 1] / 1000,
  5510. period_duration[level - 1] / 1000);
  5511. }
  5512. if (!(priv->power_mode & IWL_POWER_ENABLED))
  5513. p += sprintf(p, " OFF\n");
  5514. else
  5515. p += sprintf(p, " \n");
  5516. return p - buf + 1;
  5517. }
  5518. static DEVICE_ATTR(power_level, S_IWUSR | S_IRUSR, show_power_level,
  5519. store_power_level);
  5520. static ssize_t show_channels(struct device *d,
  5521. struct device_attribute *attr, char *buf)
  5522. {
  5523. /* all this shit doesn't belong into sysfs anyway */
  5524. return 0;
  5525. }
  5526. static DEVICE_ATTR(channels, S_IRUSR, show_channels, NULL);
  5527. static ssize_t show_statistics(struct device *d,
  5528. struct device_attribute *attr, char *buf)
  5529. {
  5530. struct iwl_priv *priv = dev_get_drvdata(d);
  5531. u32 size = sizeof(struct iwl3945_notif_statistics);
  5532. u32 len = 0, ofs = 0;
  5533. u8 *data = (u8 *)&priv->statistics_39;
  5534. int rc = 0;
  5535. if (!iwl_is_alive(priv))
  5536. return -EAGAIN;
  5537. mutex_lock(&priv->mutex);
  5538. rc = iwl3945_send_statistics_request(priv);
  5539. mutex_unlock(&priv->mutex);
  5540. if (rc) {
  5541. len = sprintf(buf,
  5542. "Error sending statistics request: 0x%08X\n", rc);
  5543. return len;
  5544. }
  5545. while (size && (PAGE_SIZE - len)) {
  5546. hex_dump_to_buffer(data + ofs, size, 16, 1, buf + len,
  5547. PAGE_SIZE - len, 1);
  5548. len = strlen(buf);
  5549. if (PAGE_SIZE - len)
  5550. buf[len++] = '\n';
  5551. ofs += 16;
  5552. size -= min(size, 16U);
  5553. }
  5554. return len;
  5555. }
  5556. static DEVICE_ATTR(statistics, S_IRUGO, show_statistics, NULL);
  5557. static ssize_t show_antenna(struct device *d,
  5558. struct device_attribute *attr, char *buf)
  5559. {
  5560. struct iwl_priv *priv = dev_get_drvdata(d);
  5561. if (!iwl_is_alive(priv))
  5562. return -EAGAIN;
  5563. return sprintf(buf, "%d\n", priv->antenna);
  5564. }
  5565. static ssize_t store_antenna(struct device *d,
  5566. struct device_attribute *attr,
  5567. const char *buf, size_t count)
  5568. {
  5569. int ant;
  5570. struct iwl_priv *priv = dev_get_drvdata(d);
  5571. if (count == 0)
  5572. return 0;
  5573. if (sscanf(buf, "%1i", &ant) != 1) {
  5574. IWL_DEBUG_INFO("not in hex or decimal form.\n");
  5575. return count;
  5576. }
  5577. if ((ant >= 0) && (ant <= 2)) {
  5578. IWL_DEBUG_INFO("Setting antenna select to %d.\n", ant);
  5579. priv->antenna = (enum iwl3945_antenna)ant;
  5580. } else
  5581. IWL_DEBUG_INFO("Bad antenna select value %d.\n", ant);
  5582. return count;
  5583. }
  5584. static DEVICE_ATTR(antenna, S_IWUSR | S_IRUGO, show_antenna, store_antenna);
  5585. static ssize_t show_status(struct device *d,
  5586. struct device_attribute *attr, char *buf)
  5587. {
  5588. struct iwl_priv *priv = (struct iwl_priv *)d->driver_data;
  5589. if (!iwl_is_alive(priv))
  5590. return -EAGAIN;
  5591. return sprintf(buf, "0x%08x\n", (int)priv->status);
  5592. }
  5593. static DEVICE_ATTR(status, S_IRUGO, show_status, NULL);
  5594. static ssize_t dump_error_log(struct device *d,
  5595. struct device_attribute *attr,
  5596. const char *buf, size_t count)
  5597. {
  5598. char *p = (char *)buf;
  5599. if (p[0] == '1')
  5600. iwl3945_dump_nic_error_log((struct iwl_priv *)d->driver_data);
  5601. return strnlen(buf, count);
  5602. }
  5603. static DEVICE_ATTR(dump_errors, S_IWUSR, NULL, dump_error_log);
  5604. static ssize_t dump_event_log(struct device *d,
  5605. struct device_attribute *attr,
  5606. const char *buf, size_t count)
  5607. {
  5608. char *p = (char *)buf;
  5609. if (p[0] == '1')
  5610. iwl3945_dump_nic_event_log((struct iwl_priv *)d->driver_data);
  5611. return strnlen(buf, count);
  5612. }
  5613. static DEVICE_ATTR(dump_events, S_IWUSR, NULL, dump_event_log);
  5614. /*****************************************************************************
  5615. *
  5616. * driver setup and tear down
  5617. *
  5618. *****************************************************************************/
  5619. static void iwl3945_setup_deferred_work(struct iwl_priv *priv)
  5620. {
  5621. priv->workqueue = create_workqueue(DRV_NAME);
  5622. init_waitqueue_head(&priv->wait_command_queue);
  5623. INIT_WORK(&priv->up, iwl3945_bg_up);
  5624. INIT_WORK(&priv->restart, iwl3945_bg_restart);
  5625. INIT_WORK(&priv->rx_replenish, iwl3945_bg_rx_replenish);
  5626. INIT_WORK(&priv->scan_completed, iwl3945_bg_scan_completed);
  5627. INIT_WORK(&priv->request_scan, iwl3945_bg_request_scan);
  5628. INIT_WORK(&priv->abort_scan, iwl3945_bg_abort_scan);
  5629. INIT_WORK(&priv->rf_kill, iwl_bg_rf_kill);
  5630. INIT_WORK(&priv->beacon_update, iwl3945_bg_beacon_update);
  5631. INIT_DELAYED_WORK(&priv->init_alive_start, iwl3945_bg_init_alive_start);
  5632. INIT_DELAYED_WORK(&priv->alive_start, iwl3945_bg_alive_start);
  5633. INIT_DELAYED_WORK(&priv->scan_check, iwl3945_bg_scan_check);
  5634. INIT_DELAYED_WORK(&priv->rfkill_poll, iwl3945_rfkill_poll);
  5635. iwl3945_hw_setup_deferred_work(priv);
  5636. tasklet_init(&priv->irq_tasklet, (void (*)(unsigned long))
  5637. iwl3945_irq_tasklet, (unsigned long)priv);
  5638. }
  5639. static void iwl3945_cancel_deferred_work(struct iwl_priv *priv)
  5640. {
  5641. iwl3945_hw_cancel_deferred_work(priv);
  5642. cancel_delayed_work_sync(&priv->init_alive_start);
  5643. cancel_delayed_work(&priv->scan_check);
  5644. cancel_delayed_work(&priv->alive_start);
  5645. cancel_work_sync(&priv->beacon_update);
  5646. }
  5647. static struct attribute *iwl3945_sysfs_entries[] = {
  5648. &dev_attr_antenna.attr,
  5649. &dev_attr_channels.attr,
  5650. &dev_attr_dump_errors.attr,
  5651. &dev_attr_dump_events.attr,
  5652. &dev_attr_flags.attr,
  5653. &dev_attr_filter_flags.attr,
  5654. #ifdef CONFIG_IWL3945_SPECTRUM_MEASUREMENT
  5655. &dev_attr_measurement.attr,
  5656. #endif
  5657. &dev_attr_power_level.attr,
  5658. &dev_attr_retry_rate.attr,
  5659. &dev_attr_statistics.attr,
  5660. &dev_attr_status.attr,
  5661. &dev_attr_temperature.attr,
  5662. &dev_attr_tx_power.attr,
  5663. #ifdef CONFIG_IWL3945_DEBUG
  5664. &dev_attr_debug_level.attr,
  5665. #endif
  5666. NULL
  5667. };
  5668. static struct attribute_group iwl3945_attribute_group = {
  5669. .name = NULL, /* put in device directory */
  5670. .attrs = iwl3945_sysfs_entries,
  5671. };
  5672. static struct ieee80211_ops iwl3945_hw_ops = {
  5673. .tx = iwl3945_mac_tx,
  5674. .start = iwl3945_mac_start,
  5675. .stop = iwl3945_mac_stop,
  5676. .add_interface = iwl3945_mac_add_interface,
  5677. .remove_interface = iwl3945_mac_remove_interface,
  5678. .config = iwl3945_mac_config,
  5679. .config_interface = iwl3945_mac_config_interface,
  5680. .configure_filter = iwl3945_configure_filter,
  5681. .set_key = iwl3945_mac_set_key,
  5682. .get_tx_stats = iwl3945_mac_get_tx_stats,
  5683. .conf_tx = iwl3945_mac_conf_tx,
  5684. .reset_tsf = iwl3945_mac_reset_tsf,
  5685. .bss_info_changed = iwl3945_bss_info_changed,
  5686. .hw_scan = iwl3945_mac_hw_scan
  5687. };
  5688. static int iwl3945_init_drv(struct iwl_priv *priv)
  5689. {
  5690. int ret;
  5691. priv->retry_rate = 1;
  5692. priv->ibss_beacon = NULL;
  5693. spin_lock_init(&priv->lock);
  5694. spin_lock_init(&priv->power_data.lock);
  5695. spin_lock_init(&priv->sta_lock);
  5696. spin_lock_init(&priv->hcmd_lock);
  5697. INIT_LIST_HEAD(&priv->free_frames);
  5698. mutex_init(&priv->mutex);
  5699. /* Clear the driver's (not device's) station table */
  5700. iwl3945_clear_stations_table(priv);
  5701. priv->data_retry_limit = -1;
  5702. priv->ieee_channels = NULL;
  5703. priv->ieee_rates = NULL;
  5704. priv->band = IEEE80211_BAND_2GHZ;
  5705. priv->iw_mode = NL80211_IFTYPE_STATION;
  5706. iwl_reset_qos(priv);
  5707. priv->qos_data.qos_active = 0;
  5708. priv->qos_data.qos_cap.val = 0;
  5709. priv->rates_mask = IWL_RATES_MASK;
  5710. /* If power management is turned on, default to AC mode */
  5711. priv->power_mode = IWL39_POWER_AC;
  5712. priv->tx_power_user_lmt = IWL_DEFAULT_TX_POWER;
  5713. ret = iwl3945_init_channel_map(priv);
  5714. if (ret) {
  5715. IWL_ERR(priv, "initializing regulatory failed: %d\n", ret);
  5716. goto err;
  5717. }
  5718. ret = iwl3945_init_geos(priv);
  5719. if (ret) {
  5720. IWL_ERR(priv, "initializing geos failed: %d\n", ret);
  5721. goto err_free_channel_map;
  5722. }
  5723. return 0;
  5724. err_free_channel_map:
  5725. iwl3945_free_channel_map(priv);
  5726. err:
  5727. return ret;
  5728. }
  5729. static int iwl3945_pci_probe(struct pci_dev *pdev, const struct pci_device_id *ent)
  5730. {
  5731. int err = 0;
  5732. struct iwl_priv *priv;
  5733. struct ieee80211_hw *hw;
  5734. struct iwl_cfg *cfg = (struct iwl_cfg *)(ent->driver_data);
  5735. unsigned long flags;
  5736. /***********************
  5737. * 1. Allocating HW data
  5738. * ********************/
  5739. /* mac80211 allocates memory for this device instance, including
  5740. * space for this driver's private structure */
  5741. hw = iwl_alloc_all(cfg, &iwl3945_hw_ops);
  5742. if (hw == NULL) {
  5743. printk(KERN_ERR DRV_NAME "Can not allocate network device\n");
  5744. err = -ENOMEM;
  5745. goto out;
  5746. }
  5747. priv = hw->priv;
  5748. SET_IEEE80211_DEV(hw, &pdev->dev);
  5749. if ((iwl3945_mod_params.num_of_queues > IWL39_MAX_NUM_QUEUES) ||
  5750. (iwl3945_mod_params.num_of_queues < IWL_MIN_NUM_QUEUES)) {
  5751. IWL_ERR(priv,
  5752. "invalid queues_num, should be between %d and %d\n",
  5753. IWL_MIN_NUM_QUEUES, IWL39_MAX_NUM_QUEUES);
  5754. err = -EINVAL;
  5755. goto out;
  5756. }
  5757. /*
  5758. * Disabling hardware scan means that mac80211 will perform scans
  5759. * "the hard way", rather than using device's scan.
  5760. */
  5761. if (iwl3945_mod_params.disable_hw_scan) {
  5762. IWL_DEBUG_INFO("Disabling hw_scan\n");
  5763. iwl3945_hw_ops.hw_scan = NULL;
  5764. }
  5765. IWL_DEBUG_INFO("*** LOAD DRIVER ***\n");
  5766. priv->cfg = cfg;
  5767. priv->pci_dev = pdev;
  5768. #ifdef CONFIG_IWL3945_DEBUG
  5769. priv->debug_level = iwl3945_mod_params.debug;
  5770. atomic_set(&priv->restrict_refcnt, 0);
  5771. #endif
  5772. hw->rate_control_algorithm = "iwl-3945-rs";
  5773. hw->sta_data_size = sizeof(struct iwl3945_sta_priv);
  5774. /* Select antenna (may be helpful if only one antenna is connected) */
  5775. priv->antenna = (enum iwl3945_antenna)iwl3945_mod_params.antenna;
  5776. /* Tell mac80211 our characteristics */
  5777. hw->flags = IEEE80211_HW_SIGNAL_DBM |
  5778. IEEE80211_HW_NOISE_DBM;
  5779. hw->wiphy->interface_modes =
  5780. BIT(NL80211_IFTYPE_STATION) |
  5781. BIT(NL80211_IFTYPE_ADHOC);
  5782. hw->wiphy->fw_handles_regulatory = true;
  5783. /* 4 EDCA QOS priorities */
  5784. hw->queues = 4;
  5785. /***************************
  5786. * 2. Initializing PCI bus
  5787. * *************************/
  5788. if (pci_enable_device(pdev)) {
  5789. err = -ENODEV;
  5790. goto out_ieee80211_free_hw;
  5791. }
  5792. pci_set_master(pdev);
  5793. err = pci_set_dma_mask(pdev, DMA_32BIT_MASK);
  5794. if (!err)
  5795. err = pci_set_consistent_dma_mask(pdev, DMA_32BIT_MASK);
  5796. if (err) {
  5797. IWL_WARN(priv, "No suitable DMA available.\n");
  5798. goto out_pci_disable_device;
  5799. }
  5800. pci_set_drvdata(pdev, priv);
  5801. err = pci_request_regions(pdev, DRV_NAME);
  5802. if (err)
  5803. goto out_pci_disable_device;
  5804. /***********************
  5805. * 3. Read REV Register
  5806. * ********************/
  5807. priv->hw_base = pci_iomap(pdev, 0, 0);
  5808. if (!priv->hw_base) {
  5809. err = -ENODEV;
  5810. goto out_pci_release_regions;
  5811. }
  5812. IWL_DEBUG_INFO("pci_resource_len = 0x%08llx\n",
  5813. (unsigned long long) pci_resource_len(pdev, 0));
  5814. IWL_DEBUG_INFO("pci_resource_base = %p\n", priv->hw_base);
  5815. /* We disable the RETRY_TIMEOUT register (0x41) to keep
  5816. * PCI Tx retries from interfering with C3 CPU state */
  5817. pci_write_config_byte(pdev, 0x41, 0x00);
  5818. /* amp init */
  5819. err = priv->cfg->ops->lib->apm_ops.init(priv);
  5820. if (err < 0) {
  5821. IWL_DEBUG_INFO("Failed to init APMG\n");
  5822. goto out_iounmap;
  5823. }
  5824. /***********************
  5825. * 4. Read EEPROM
  5826. * ********************/
  5827. /* Read the EEPROM */
  5828. err = iwl3945_eeprom_init(priv);
  5829. if (err) {
  5830. IWL_ERR(priv, "Unable to init EEPROM\n");
  5831. goto out_remove_sysfs;
  5832. }
  5833. /* MAC Address location in EEPROM same for 3945/4965 */
  5834. get_eeprom_mac(priv, priv->mac_addr);
  5835. IWL_DEBUG_INFO("MAC address: %pM\n", priv->mac_addr);
  5836. SET_IEEE80211_PERM_ADDR(priv->hw, priv->mac_addr);
  5837. /***********************
  5838. * 5. Setup HW Constants
  5839. * ********************/
  5840. /* Device-specific setup */
  5841. if (iwl3945_hw_set_hw_params(priv)) {
  5842. IWL_ERR(priv, "failed to set hw settings\n");
  5843. goto out_iounmap;
  5844. }
  5845. /***********************
  5846. * 6. Setup priv
  5847. * ********************/
  5848. err = iwl3945_init_drv(priv);
  5849. if (err) {
  5850. IWL_ERR(priv, "initializing driver failed\n");
  5851. goto out_free_geos;
  5852. }
  5853. IWL_INFO(priv, "Detected Intel Wireless WiFi Link %s\n",
  5854. priv->cfg->name);
  5855. /***********************************
  5856. * 7. Initialize Module Parameters
  5857. * **********************************/
  5858. /* Initialize module parameter values here */
  5859. /* Disable radio (SW RF KILL) via parameter when loading driver */
  5860. if (iwl3945_mod_params.disable) {
  5861. set_bit(STATUS_RF_KILL_SW, &priv->status);
  5862. IWL_DEBUG_INFO("Radio disabled.\n");
  5863. }
  5864. /***********************
  5865. * 8. Setup Services
  5866. * ********************/
  5867. spin_lock_irqsave(&priv->lock, flags);
  5868. iwl3945_disable_interrupts(priv);
  5869. spin_unlock_irqrestore(&priv->lock, flags);
  5870. pci_enable_msi(priv->pci_dev);
  5871. err = request_irq(priv->pci_dev->irq, iwl3945_isr, IRQF_SHARED,
  5872. DRV_NAME, priv);
  5873. if (err) {
  5874. IWL_ERR(priv, "Error allocating IRQ %d\n", priv->pci_dev->irq);
  5875. goto out_disable_msi;
  5876. }
  5877. err = sysfs_create_group(&pdev->dev.kobj, &iwl3945_attribute_group);
  5878. if (err) {
  5879. IWL_ERR(priv, "failed to create sysfs device attributes\n");
  5880. goto out_release_irq;
  5881. }
  5882. iwl3945_set_rxon_channel(priv, IEEE80211_BAND_2GHZ, 6);
  5883. iwl3945_setup_deferred_work(priv);
  5884. iwl3945_setup_rx_handlers(priv);
  5885. /*********************************
  5886. * 9. Setup and Register mac80211
  5887. * *******************************/
  5888. err = ieee80211_register_hw(priv->hw);
  5889. if (err) {
  5890. IWL_ERR(priv, "Failed to register network device: %d\n", err);
  5891. goto out_remove_sysfs;
  5892. }
  5893. priv->hw->conf.beacon_int = 100;
  5894. priv->mac80211_registered = 1;
  5895. err = iwl_rfkill_init(priv);
  5896. if (err)
  5897. IWL_ERR(priv, "Unable to initialize RFKILL system. "
  5898. "Ignoring error: %d\n", err);
  5899. /* Start monitoring the killswitch */
  5900. queue_delayed_work(priv->workqueue, &priv->rfkill_poll,
  5901. 2 * HZ);
  5902. return 0;
  5903. out_remove_sysfs:
  5904. sysfs_remove_group(&pdev->dev.kobj, &iwl3945_attribute_group);
  5905. out_free_geos:
  5906. iwl3945_free_geos(priv);
  5907. out_release_irq:
  5908. free_irq(priv->pci_dev->irq, priv);
  5909. destroy_workqueue(priv->workqueue);
  5910. priv->workqueue = NULL;
  5911. iwl3945_unset_hw_params(priv);
  5912. out_disable_msi:
  5913. pci_disable_msi(priv->pci_dev);
  5914. out_iounmap:
  5915. pci_iounmap(pdev, priv->hw_base);
  5916. out_pci_release_regions:
  5917. pci_release_regions(pdev);
  5918. out_pci_disable_device:
  5919. pci_disable_device(pdev);
  5920. pci_set_drvdata(pdev, NULL);
  5921. out_ieee80211_free_hw:
  5922. ieee80211_free_hw(priv->hw);
  5923. out:
  5924. return err;
  5925. }
  5926. static void __devexit iwl3945_pci_remove(struct pci_dev *pdev)
  5927. {
  5928. struct iwl_priv *priv = pci_get_drvdata(pdev);
  5929. unsigned long flags;
  5930. if (!priv)
  5931. return;
  5932. IWL_DEBUG_INFO("*** UNLOAD DRIVER ***\n");
  5933. set_bit(STATUS_EXIT_PENDING, &priv->status);
  5934. if (priv->mac80211_registered) {
  5935. ieee80211_unregister_hw(priv->hw);
  5936. priv->mac80211_registered = 0;
  5937. } else {
  5938. iwl3945_down(priv);
  5939. }
  5940. /* make sure we flush any pending irq or
  5941. * tasklet for the driver
  5942. */
  5943. spin_lock_irqsave(&priv->lock, flags);
  5944. iwl3945_disable_interrupts(priv);
  5945. spin_unlock_irqrestore(&priv->lock, flags);
  5946. iwl_synchronize_irq(priv);
  5947. sysfs_remove_group(&pdev->dev.kobj, &iwl3945_attribute_group);
  5948. iwl_rfkill_unregister(priv);
  5949. cancel_delayed_work(&priv->rfkill_poll);
  5950. iwl3945_dealloc_ucode_pci(priv);
  5951. if (priv->rxq.bd)
  5952. iwl_rx_queue_free(priv, &priv->rxq);
  5953. iwl3945_hw_txq_ctx_free(priv);
  5954. iwl3945_unset_hw_params(priv);
  5955. iwl3945_clear_stations_table(priv);
  5956. /*netif_stop_queue(dev); */
  5957. flush_workqueue(priv->workqueue);
  5958. /* ieee80211_unregister_hw calls iwl3945_mac_stop, which flushes
  5959. * priv->workqueue... so we can't take down the workqueue
  5960. * until now... */
  5961. destroy_workqueue(priv->workqueue);
  5962. priv->workqueue = NULL;
  5963. free_irq(pdev->irq, priv);
  5964. pci_disable_msi(pdev);
  5965. pci_iounmap(pdev, priv->hw_base);
  5966. pci_release_regions(pdev);
  5967. pci_disable_device(pdev);
  5968. pci_set_drvdata(pdev, NULL);
  5969. iwl3945_free_channel_map(priv);
  5970. iwl3945_free_geos(priv);
  5971. kfree(priv->scan);
  5972. if (priv->ibss_beacon)
  5973. dev_kfree_skb(priv->ibss_beacon);
  5974. ieee80211_free_hw(priv->hw);
  5975. }
  5976. #ifdef CONFIG_PM
  5977. static int iwl3945_pci_suspend(struct pci_dev *pdev, pm_message_t state)
  5978. {
  5979. struct iwl_priv *priv = pci_get_drvdata(pdev);
  5980. if (priv->is_open) {
  5981. set_bit(STATUS_IN_SUSPEND, &priv->status);
  5982. iwl3945_mac_stop(priv->hw);
  5983. priv->is_open = 1;
  5984. }
  5985. pci_save_state(pdev);
  5986. pci_disable_device(pdev);
  5987. pci_set_power_state(pdev, PCI_D3hot);
  5988. return 0;
  5989. }
  5990. static int iwl3945_pci_resume(struct pci_dev *pdev)
  5991. {
  5992. struct iwl_priv *priv = pci_get_drvdata(pdev);
  5993. pci_set_power_state(pdev, PCI_D0);
  5994. pci_enable_device(pdev);
  5995. pci_restore_state(pdev);
  5996. if (priv->is_open)
  5997. iwl3945_mac_start(priv->hw);
  5998. clear_bit(STATUS_IN_SUSPEND, &priv->status);
  5999. return 0;
  6000. }
  6001. #endif /* CONFIG_PM */
  6002. /*****************************************************************************
  6003. *
  6004. * driver and module entry point
  6005. *
  6006. *****************************************************************************/
  6007. static struct pci_driver iwl3945_driver = {
  6008. .name = DRV_NAME,
  6009. .id_table = iwl3945_hw_card_ids,
  6010. .probe = iwl3945_pci_probe,
  6011. .remove = __devexit_p(iwl3945_pci_remove),
  6012. #ifdef CONFIG_PM
  6013. .suspend = iwl3945_pci_suspend,
  6014. .resume = iwl3945_pci_resume,
  6015. #endif
  6016. };
  6017. static int __init iwl3945_init(void)
  6018. {
  6019. int ret;
  6020. printk(KERN_INFO DRV_NAME ": " DRV_DESCRIPTION ", " DRV_VERSION "\n");
  6021. printk(KERN_INFO DRV_NAME ": " DRV_COPYRIGHT "\n");
  6022. ret = iwl3945_rate_control_register();
  6023. if (ret) {
  6024. printk(KERN_ERR DRV_NAME
  6025. "Unable to register rate control algorithm: %d\n", ret);
  6026. return ret;
  6027. }
  6028. ret = pci_register_driver(&iwl3945_driver);
  6029. if (ret) {
  6030. printk(KERN_ERR DRV_NAME "Unable to initialize PCI module\n");
  6031. goto error_register;
  6032. }
  6033. return ret;
  6034. error_register:
  6035. iwl3945_rate_control_unregister();
  6036. return ret;
  6037. }
  6038. static void __exit iwl3945_exit(void)
  6039. {
  6040. pci_unregister_driver(&iwl3945_driver);
  6041. iwl3945_rate_control_unregister();
  6042. }
  6043. MODULE_FIRMWARE(IWL3945_MODULE_FIRMWARE(IWL3945_UCODE_API_MAX));
  6044. module_param_named(antenna, iwl3945_mod_params.antenna, int, 0444);
  6045. MODULE_PARM_DESC(antenna, "select antenna (1=Main, 2=Aux, default 0 [both])");
  6046. module_param_named(disable, iwl3945_mod_params.disable, int, 0444);
  6047. MODULE_PARM_DESC(disable, "manually disable the radio (default 0 [radio on])");
  6048. module_param_named(swcrypto, iwl3945_mod_params.sw_crypto, int, 0444);
  6049. MODULE_PARM_DESC(swcrypto,
  6050. "using software crypto (default 1 [software])\n");
  6051. module_param_named(debug, iwl3945_mod_params.debug, uint, 0444);
  6052. MODULE_PARM_DESC(debug, "debug output mask");
  6053. module_param_named(disable_hw_scan, iwl3945_mod_params.disable_hw_scan, int, 0444);
  6054. MODULE_PARM_DESC(disable_hw_scan, "disable hardware scanning (default 0)");
  6055. module_param_named(queues_num, iwl3945_mod_params.num_of_queues, int, 0444);
  6056. MODULE_PARM_DESC(queues_num, "number of hw queues.");
  6057. module_exit(iwl3945_exit);
  6058. module_init(iwl3945_init);