iwl3945-base.c 118 KB

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  1. /******************************************************************************
  2. *
  3. * Copyright(c) 2003 - 2009 Intel Corporation. All rights reserved.
  4. *
  5. * Portions of this file are derived from the ipw3945 project, as well
  6. * as portions of the ieee80211 subsystem header files.
  7. *
  8. * This program is free software; you can redistribute it and/or modify it
  9. * under the terms of version 2 of the GNU General Public License as
  10. * published by the Free Software Foundation.
  11. *
  12. * This program is distributed in the hope that it will be useful, but WITHOUT
  13. * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
  14. * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for
  15. * more details.
  16. *
  17. * You should have received a copy of the GNU General Public License along with
  18. * this program; if not, write to the Free Software Foundation, Inc.,
  19. * 51 Franklin Street, Fifth Floor, Boston, MA 02110, USA
  20. *
  21. * The full GNU General Public License is included in this distribution in the
  22. * file called LICENSE.
  23. *
  24. * Contact Information:
  25. * Intel Linux Wireless <ilw@linux.intel.com>
  26. * Intel Corporation, 5200 N.E. Elam Young Parkway, Hillsboro, OR 97124-6497
  27. *
  28. *****************************************************************************/
  29. #include <linux/kernel.h>
  30. #include <linux/module.h>
  31. #include <linux/init.h>
  32. #include <linux/pci.h>
  33. #include <linux/dma-mapping.h>
  34. #include <linux/delay.h>
  35. #include <linux/skbuff.h>
  36. #include <linux/netdevice.h>
  37. #include <linux/wireless.h>
  38. #include <linux/firmware.h>
  39. #include <linux/etherdevice.h>
  40. #include <linux/if_arp.h>
  41. #include <net/ieee80211_radiotap.h>
  42. #include <net/mac80211.h>
  43. #include <asm/div64.h>
  44. #define DRV_NAME "iwl3945"
  45. #include "iwl-fh.h"
  46. #include "iwl-3945-fh.h"
  47. #include "iwl-commands.h"
  48. #include "iwl-sta.h"
  49. #include "iwl-3945.h"
  50. #include "iwl-helpers.h"
  51. #include "iwl-core.h"
  52. #include "iwl-dev.h"
  53. /*
  54. * module name, copyright, version, etc.
  55. */
  56. #define DRV_DESCRIPTION \
  57. "Intel(R) PRO/Wireless 3945ABG/BG Network Connection driver for Linux"
  58. #ifdef CONFIG_IWLWIFI_DEBUG
  59. #define VD "d"
  60. #else
  61. #define VD
  62. #endif
  63. #ifdef CONFIG_IWL3945_SPECTRUM_MEASUREMENT
  64. #define VS "s"
  65. #else
  66. #define VS
  67. #endif
  68. #define IWL39_VERSION "1.2.26k" VD VS
  69. #define DRV_COPYRIGHT "Copyright(c) 2003-2009 Intel Corporation"
  70. #define DRV_AUTHOR "<ilw@linux.intel.com>"
  71. #define DRV_VERSION IWL39_VERSION
  72. MODULE_DESCRIPTION(DRV_DESCRIPTION);
  73. MODULE_VERSION(DRV_VERSION);
  74. MODULE_AUTHOR(DRV_COPYRIGHT " " DRV_AUTHOR);
  75. MODULE_LICENSE("GPL");
  76. /* module parameters */
  77. struct iwl_mod_params iwl3945_mod_params = {
  78. .num_of_queues = IWL39_NUM_QUEUES, /* Not used */
  79. .sw_crypto = 1,
  80. .restart_fw = 1,
  81. /* the rest are 0 by default */
  82. };
  83. /**
  84. * iwl3945_get_antenna_flags - Get antenna flags for RXON command
  85. * @priv: eeprom and antenna fields are used to determine antenna flags
  86. *
  87. * priv->eeprom39 is used to determine if antenna AUX/MAIN are reversed
  88. * iwl3945_mod_params.antenna specifies the antenna diversity mode:
  89. *
  90. * IWL_ANTENNA_DIVERSITY - NIC selects best antenna by itself
  91. * IWL_ANTENNA_MAIN - Force MAIN antenna
  92. * IWL_ANTENNA_AUX - Force AUX antenna
  93. */
  94. __le32 iwl3945_get_antenna_flags(const struct iwl_priv *priv)
  95. {
  96. struct iwl3945_eeprom *eeprom = (struct iwl3945_eeprom *)priv->eeprom;
  97. switch (iwl3945_mod_params.antenna) {
  98. case IWL_ANTENNA_DIVERSITY:
  99. return 0;
  100. case IWL_ANTENNA_MAIN:
  101. if (eeprom->antenna_switch_type)
  102. return RXON_FLG_DIS_DIV_MSK | RXON_FLG_ANT_B_MSK;
  103. return RXON_FLG_DIS_DIV_MSK | RXON_FLG_ANT_A_MSK;
  104. case IWL_ANTENNA_AUX:
  105. if (eeprom->antenna_switch_type)
  106. return RXON_FLG_DIS_DIV_MSK | RXON_FLG_ANT_A_MSK;
  107. return RXON_FLG_DIS_DIV_MSK | RXON_FLG_ANT_B_MSK;
  108. }
  109. /* bad antenna selector value */
  110. IWL_ERR(priv, "Bad antenna selector value (0x%x)\n",
  111. iwl3945_mod_params.antenna);
  112. return 0; /* "diversity" is default if error */
  113. }
  114. static int iwl3945_set_ccmp_dynamic_key_info(struct iwl_priv *priv,
  115. struct ieee80211_key_conf *keyconf,
  116. u8 sta_id)
  117. {
  118. unsigned long flags;
  119. __le16 key_flags = 0;
  120. int ret;
  121. key_flags |= (STA_KEY_FLG_CCMP | STA_KEY_FLG_MAP_KEY_MSK);
  122. key_flags |= cpu_to_le16(keyconf->keyidx << STA_KEY_FLG_KEYID_POS);
  123. if (sta_id == priv->hw_params.bcast_sta_id)
  124. key_flags |= STA_KEY_MULTICAST_MSK;
  125. keyconf->flags |= IEEE80211_KEY_FLAG_GENERATE_IV;
  126. keyconf->hw_key_idx = keyconf->keyidx;
  127. key_flags &= ~STA_KEY_FLG_INVALID;
  128. spin_lock_irqsave(&priv->sta_lock, flags);
  129. priv->stations[sta_id].keyinfo.alg = keyconf->alg;
  130. priv->stations[sta_id].keyinfo.keylen = keyconf->keylen;
  131. memcpy(priv->stations[sta_id].keyinfo.key, keyconf->key,
  132. keyconf->keylen);
  133. memcpy(priv->stations[sta_id].sta.key.key, keyconf->key,
  134. keyconf->keylen);
  135. if ((priv->stations[sta_id].sta.key.key_flags & STA_KEY_FLG_ENCRYPT_MSK)
  136. == STA_KEY_FLG_NO_ENC)
  137. priv->stations[sta_id].sta.key.key_offset =
  138. iwl_get_free_ucode_key_index(priv);
  139. /* else, we are overriding an existing key => no need to allocated room
  140. * in uCode. */
  141. WARN(priv->stations[sta_id].sta.key.key_offset == WEP_INVALID_OFFSET,
  142. "no space for a new key");
  143. priv->stations[sta_id].sta.key.key_flags = key_flags;
  144. priv->stations[sta_id].sta.sta.modify_mask = STA_MODIFY_KEY_MASK;
  145. priv->stations[sta_id].sta.mode = STA_CONTROL_MODIFY_MSK;
  146. IWL_DEBUG_INFO(priv, "hwcrypto: modify ucode station key info\n");
  147. ret = iwl_send_add_sta(priv, &priv->stations[sta_id].sta, CMD_ASYNC);
  148. spin_unlock_irqrestore(&priv->sta_lock, flags);
  149. return ret;
  150. }
  151. static int iwl3945_set_tkip_dynamic_key_info(struct iwl_priv *priv,
  152. struct ieee80211_key_conf *keyconf,
  153. u8 sta_id)
  154. {
  155. return -EOPNOTSUPP;
  156. }
  157. static int iwl3945_set_wep_dynamic_key_info(struct iwl_priv *priv,
  158. struct ieee80211_key_conf *keyconf,
  159. u8 sta_id)
  160. {
  161. return -EOPNOTSUPP;
  162. }
  163. static int iwl3945_clear_sta_key_info(struct iwl_priv *priv, u8 sta_id)
  164. {
  165. unsigned long flags;
  166. spin_lock_irqsave(&priv->sta_lock, flags);
  167. memset(&priv->stations[sta_id].keyinfo, 0, sizeof(struct iwl_hw_key));
  168. memset(&priv->stations[sta_id].sta.key, 0,
  169. sizeof(struct iwl4965_keyinfo));
  170. priv->stations[sta_id].sta.key.key_flags = STA_KEY_FLG_NO_ENC;
  171. priv->stations[sta_id].sta.sta.modify_mask = STA_MODIFY_KEY_MASK;
  172. priv->stations[sta_id].sta.mode = STA_CONTROL_MODIFY_MSK;
  173. spin_unlock_irqrestore(&priv->sta_lock, flags);
  174. IWL_DEBUG_INFO(priv, "hwcrypto: clear ucode station key info\n");
  175. iwl_send_add_sta(priv, &priv->stations[sta_id].sta, 0);
  176. return 0;
  177. }
  178. static int iwl3945_set_dynamic_key(struct iwl_priv *priv,
  179. struct ieee80211_key_conf *keyconf, u8 sta_id)
  180. {
  181. int ret = 0;
  182. keyconf->hw_key_idx = HW_KEY_DYNAMIC;
  183. switch (keyconf->alg) {
  184. case ALG_CCMP:
  185. ret = iwl3945_set_ccmp_dynamic_key_info(priv, keyconf, sta_id);
  186. break;
  187. case ALG_TKIP:
  188. ret = iwl3945_set_tkip_dynamic_key_info(priv, keyconf, sta_id);
  189. break;
  190. case ALG_WEP:
  191. ret = iwl3945_set_wep_dynamic_key_info(priv, keyconf, sta_id);
  192. break;
  193. default:
  194. IWL_ERR(priv, "Unknown alg: %s alg = %d\n", __func__, keyconf->alg);
  195. ret = -EINVAL;
  196. }
  197. IWL_DEBUG_WEP(priv, "Set dynamic key: alg= %d len=%d idx=%d sta=%d ret=%d\n",
  198. keyconf->alg, keyconf->keylen, keyconf->keyidx,
  199. sta_id, ret);
  200. return ret;
  201. }
  202. static int iwl3945_remove_static_key(struct iwl_priv *priv)
  203. {
  204. int ret = -EOPNOTSUPP;
  205. return ret;
  206. }
  207. static int iwl3945_set_static_key(struct iwl_priv *priv,
  208. struct ieee80211_key_conf *key)
  209. {
  210. if (key->alg == ALG_WEP)
  211. return -EOPNOTSUPP;
  212. IWL_ERR(priv, "Static key invalid: alg %d\n", key->alg);
  213. return -EINVAL;
  214. }
  215. static void iwl3945_clear_free_frames(struct iwl_priv *priv)
  216. {
  217. struct list_head *element;
  218. IWL_DEBUG_INFO(priv, "%d frames on pre-allocated heap on clear.\n",
  219. priv->frames_count);
  220. while (!list_empty(&priv->free_frames)) {
  221. element = priv->free_frames.next;
  222. list_del(element);
  223. kfree(list_entry(element, struct iwl3945_frame, list));
  224. priv->frames_count--;
  225. }
  226. if (priv->frames_count) {
  227. IWL_WARN(priv, "%d frames still in use. Did we lose one?\n",
  228. priv->frames_count);
  229. priv->frames_count = 0;
  230. }
  231. }
  232. static struct iwl3945_frame *iwl3945_get_free_frame(struct iwl_priv *priv)
  233. {
  234. struct iwl3945_frame *frame;
  235. struct list_head *element;
  236. if (list_empty(&priv->free_frames)) {
  237. frame = kzalloc(sizeof(*frame), GFP_KERNEL);
  238. if (!frame) {
  239. IWL_ERR(priv, "Could not allocate frame!\n");
  240. return NULL;
  241. }
  242. priv->frames_count++;
  243. return frame;
  244. }
  245. element = priv->free_frames.next;
  246. list_del(element);
  247. return list_entry(element, struct iwl3945_frame, list);
  248. }
  249. static void iwl3945_free_frame(struct iwl_priv *priv, struct iwl3945_frame *frame)
  250. {
  251. memset(frame, 0, sizeof(*frame));
  252. list_add(&frame->list, &priv->free_frames);
  253. }
  254. unsigned int iwl3945_fill_beacon_frame(struct iwl_priv *priv,
  255. struct ieee80211_hdr *hdr,
  256. int left)
  257. {
  258. if (!iwl_is_associated(priv) || !priv->ibss_beacon ||
  259. ((priv->iw_mode != NL80211_IFTYPE_ADHOC) &&
  260. (priv->iw_mode != NL80211_IFTYPE_AP)))
  261. return 0;
  262. if (priv->ibss_beacon->len > left)
  263. return 0;
  264. memcpy(hdr, priv->ibss_beacon->data, priv->ibss_beacon->len);
  265. return priv->ibss_beacon->len;
  266. }
  267. static int iwl3945_send_beacon_cmd(struct iwl_priv *priv)
  268. {
  269. struct iwl3945_frame *frame;
  270. unsigned int frame_size;
  271. int rc;
  272. u8 rate;
  273. frame = iwl3945_get_free_frame(priv);
  274. if (!frame) {
  275. IWL_ERR(priv, "Could not obtain free frame buffer for beacon "
  276. "command.\n");
  277. return -ENOMEM;
  278. }
  279. rate = iwl_rate_get_lowest_plcp(priv);
  280. frame_size = iwl3945_hw_get_beacon_cmd(priv, frame, rate);
  281. rc = iwl_send_cmd_pdu(priv, REPLY_TX_BEACON, frame_size,
  282. &frame->u.cmd[0]);
  283. iwl3945_free_frame(priv, frame);
  284. return rc;
  285. }
  286. static void iwl3945_unset_hw_params(struct iwl_priv *priv)
  287. {
  288. if (priv->shared_virt)
  289. pci_free_consistent(priv->pci_dev,
  290. sizeof(struct iwl3945_shared),
  291. priv->shared_virt,
  292. priv->shared_phys);
  293. }
  294. static void iwl3945_build_tx_cmd_hwcrypto(struct iwl_priv *priv,
  295. struct ieee80211_tx_info *info,
  296. struct iwl_device_cmd *cmd,
  297. struct sk_buff *skb_frag,
  298. int sta_id)
  299. {
  300. struct iwl3945_tx_cmd *tx = (struct iwl3945_tx_cmd *)cmd->cmd.payload;
  301. struct iwl_hw_key *keyinfo = &priv->stations[sta_id].keyinfo;
  302. switch (keyinfo->alg) {
  303. case ALG_CCMP:
  304. tx->sec_ctl = TX_CMD_SEC_CCM;
  305. memcpy(tx->key, keyinfo->key, keyinfo->keylen);
  306. IWL_DEBUG_TX(priv, "tx_cmd with AES hwcrypto\n");
  307. break;
  308. case ALG_TKIP:
  309. break;
  310. case ALG_WEP:
  311. tx->sec_ctl = TX_CMD_SEC_WEP |
  312. (info->control.hw_key->hw_key_idx & TX_CMD_SEC_MSK) << TX_CMD_SEC_SHIFT;
  313. if (keyinfo->keylen == 13)
  314. tx->sec_ctl |= TX_CMD_SEC_KEY128;
  315. memcpy(&tx->key[3], keyinfo->key, keyinfo->keylen);
  316. IWL_DEBUG_TX(priv, "Configuring packet for WEP encryption "
  317. "with key %d\n", info->control.hw_key->hw_key_idx);
  318. break;
  319. default:
  320. IWL_ERR(priv, "Unknown encode alg %d\n", keyinfo->alg);
  321. break;
  322. }
  323. }
  324. /*
  325. * handle build REPLY_TX command notification.
  326. */
  327. static void iwl3945_build_tx_cmd_basic(struct iwl_priv *priv,
  328. struct iwl_device_cmd *cmd,
  329. struct ieee80211_tx_info *info,
  330. struct ieee80211_hdr *hdr, u8 std_id)
  331. {
  332. struct iwl3945_tx_cmd *tx = (struct iwl3945_tx_cmd *)cmd->cmd.payload;
  333. __le32 tx_flags = tx->tx_flags;
  334. __le16 fc = hdr->frame_control;
  335. u8 rc_flags = info->control.rates[0].flags;
  336. tx->stop_time.life_time = TX_CMD_LIFE_TIME_INFINITE;
  337. if (!(info->flags & IEEE80211_TX_CTL_NO_ACK)) {
  338. tx_flags |= TX_CMD_FLG_ACK_MSK;
  339. if (ieee80211_is_mgmt(fc))
  340. tx_flags |= TX_CMD_FLG_SEQ_CTL_MSK;
  341. if (ieee80211_is_probe_resp(fc) &&
  342. !(le16_to_cpu(hdr->seq_ctrl) & 0xf))
  343. tx_flags |= TX_CMD_FLG_TSF_MSK;
  344. } else {
  345. tx_flags &= (~TX_CMD_FLG_ACK_MSK);
  346. tx_flags |= TX_CMD_FLG_SEQ_CTL_MSK;
  347. }
  348. tx->sta_id = std_id;
  349. if (ieee80211_has_morefrags(fc))
  350. tx_flags |= TX_CMD_FLG_MORE_FRAG_MSK;
  351. if (ieee80211_is_data_qos(fc)) {
  352. u8 *qc = ieee80211_get_qos_ctl(hdr);
  353. tx->tid_tspec = qc[0] & 0xf;
  354. tx_flags &= ~TX_CMD_FLG_SEQ_CTL_MSK;
  355. } else {
  356. tx_flags |= TX_CMD_FLG_SEQ_CTL_MSK;
  357. }
  358. if (rc_flags & IEEE80211_TX_RC_USE_RTS_CTS) {
  359. tx_flags |= TX_CMD_FLG_RTS_MSK;
  360. tx_flags &= ~TX_CMD_FLG_CTS_MSK;
  361. } else if (rc_flags & IEEE80211_TX_RC_USE_CTS_PROTECT) {
  362. tx_flags &= ~TX_CMD_FLG_RTS_MSK;
  363. tx_flags |= TX_CMD_FLG_CTS_MSK;
  364. }
  365. if ((tx_flags & TX_CMD_FLG_RTS_MSK) || (tx_flags & TX_CMD_FLG_CTS_MSK))
  366. tx_flags |= TX_CMD_FLG_FULL_TXOP_PROT_MSK;
  367. tx_flags &= ~(TX_CMD_FLG_ANT_SEL_MSK);
  368. if (ieee80211_is_mgmt(fc)) {
  369. if (ieee80211_is_assoc_req(fc) || ieee80211_is_reassoc_req(fc))
  370. tx->timeout.pm_frame_timeout = cpu_to_le16(3);
  371. else
  372. tx->timeout.pm_frame_timeout = cpu_to_le16(2);
  373. } else {
  374. tx->timeout.pm_frame_timeout = 0;
  375. #ifdef CONFIG_IWLWIFI_LEDS
  376. priv->rxtxpackets += le16_to_cpu(cmd->cmd.tx.len);
  377. #endif
  378. }
  379. tx->driver_txop = 0;
  380. tx->tx_flags = tx_flags;
  381. tx->next_frame_len = 0;
  382. }
  383. /*
  384. * start REPLY_TX command process
  385. */
  386. static int iwl3945_tx_skb(struct iwl_priv *priv, struct sk_buff *skb)
  387. {
  388. struct ieee80211_hdr *hdr = (struct ieee80211_hdr *)skb->data;
  389. struct ieee80211_tx_info *info = IEEE80211_SKB_CB(skb);
  390. struct iwl3945_tx_cmd *tx;
  391. struct iwl_tx_queue *txq = NULL;
  392. struct iwl_queue *q = NULL;
  393. struct iwl_device_cmd *out_cmd;
  394. struct iwl_cmd_meta *out_meta;
  395. dma_addr_t phys_addr;
  396. dma_addr_t txcmd_phys;
  397. int txq_id = skb_get_queue_mapping(skb);
  398. u16 len, idx, len_org, hdr_len; /* TODO: len_org is not used */
  399. u8 id;
  400. u8 unicast;
  401. u8 sta_id;
  402. u8 tid = 0;
  403. u16 seq_number = 0;
  404. __le16 fc;
  405. u8 wait_write_ptr = 0;
  406. u8 *qc = NULL;
  407. unsigned long flags;
  408. int rc;
  409. spin_lock_irqsave(&priv->lock, flags);
  410. if (iwl_is_rfkill(priv)) {
  411. IWL_DEBUG_DROP(priv, "Dropping - RF KILL\n");
  412. goto drop_unlock;
  413. }
  414. if ((ieee80211_get_tx_rate(priv->hw, info)->hw_value & 0xFF) == IWL_INVALID_RATE) {
  415. IWL_ERR(priv, "ERROR: No TX rate available.\n");
  416. goto drop_unlock;
  417. }
  418. unicast = !is_multicast_ether_addr(hdr->addr1);
  419. id = 0;
  420. fc = hdr->frame_control;
  421. #ifdef CONFIG_IWLWIFI_DEBUG
  422. if (ieee80211_is_auth(fc))
  423. IWL_DEBUG_TX(priv, "Sending AUTH frame\n");
  424. else if (ieee80211_is_assoc_req(fc))
  425. IWL_DEBUG_TX(priv, "Sending ASSOC frame\n");
  426. else if (ieee80211_is_reassoc_req(fc))
  427. IWL_DEBUG_TX(priv, "Sending REASSOC frame\n");
  428. #endif
  429. /* drop all non-injected data frame if we are not associated */
  430. if (ieee80211_is_data(fc) &&
  431. !(info->flags & IEEE80211_TX_CTL_INJECTED) &&
  432. (!iwl_is_associated(priv) ||
  433. ((priv->iw_mode == NL80211_IFTYPE_STATION) && !priv->assoc_id))) {
  434. IWL_DEBUG_DROP(priv, "Dropping - !iwl_is_associated\n");
  435. goto drop_unlock;
  436. }
  437. spin_unlock_irqrestore(&priv->lock, flags);
  438. hdr_len = ieee80211_hdrlen(fc);
  439. /* Find (or create) index into station table for destination station */
  440. if (info->flags & IEEE80211_TX_CTL_INJECTED)
  441. sta_id = priv->hw_params.bcast_sta_id;
  442. else
  443. sta_id = iwl_get_sta_id(priv, hdr);
  444. if (sta_id == IWL_INVALID_STATION) {
  445. IWL_DEBUG_DROP(priv, "Dropping - INVALID STATION: %pM\n",
  446. hdr->addr1);
  447. goto drop;
  448. }
  449. IWL_DEBUG_RATE(priv, "station Id %d\n", sta_id);
  450. if (ieee80211_is_data_qos(fc)) {
  451. qc = ieee80211_get_qos_ctl(hdr);
  452. tid = qc[0] & IEEE80211_QOS_CTL_TID_MASK;
  453. if (unlikely(tid >= MAX_TID_COUNT))
  454. goto drop;
  455. seq_number = priv->stations[sta_id].tid[tid].seq_number &
  456. IEEE80211_SCTL_SEQ;
  457. hdr->seq_ctrl = cpu_to_le16(seq_number) |
  458. (hdr->seq_ctrl &
  459. cpu_to_le16(IEEE80211_SCTL_FRAG));
  460. seq_number += 0x10;
  461. }
  462. /* Descriptor for chosen Tx queue */
  463. txq = &priv->txq[txq_id];
  464. q = &txq->q;
  465. spin_lock_irqsave(&priv->lock, flags);
  466. idx = get_cmd_index(q, q->write_ptr, 0);
  467. /* Set up driver data for this TFD */
  468. memset(&(txq->txb[q->write_ptr]), 0, sizeof(struct iwl_tx_info));
  469. txq->txb[q->write_ptr].skb[0] = skb;
  470. /* Init first empty entry in queue's array of Tx/cmd buffers */
  471. out_cmd = txq->cmd[idx];
  472. out_meta = &txq->meta[idx];
  473. tx = (struct iwl3945_tx_cmd *)out_cmd->cmd.payload;
  474. memset(&out_cmd->hdr, 0, sizeof(out_cmd->hdr));
  475. memset(tx, 0, sizeof(*tx));
  476. /*
  477. * Set up the Tx-command (not MAC!) header.
  478. * Store the chosen Tx queue and TFD index within the sequence field;
  479. * after Tx, uCode's Tx response will return this value so driver can
  480. * locate the frame within the tx queue and do post-tx processing.
  481. */
  482. out_cmd->hdr.cmd = REPLY_TX;
  483. out_cmd->hdr.sequence = cpu_to_le16((u16)(QUEUE_TO_SEQ(txq_id) |
  484. INDEX_TO_SEQ(q->write_ptr)));
  485. /* Copy MAC header from skb into command buffer */
  486. memcpy(tx->hdr, hdr, hdr_len);
  487. if (info->control.hw_key)
  488. iwl3945_build_tx_cmd_hwcrypto(priv, info, out_cmd, skb, sta_id);
  489. /* TODO need this for burst mode later on */
  490. iwl3945_build_tx_cmd_basic(priv, out_cmd, info, hdr, sta_id);
  491. /* set is_hcca to 0; it probably will never be implemented */
  492. iwl3945_hw_build_tx_cmd_rate(priv, out_cmd, info, hdr, sta_id, 0);
  493. /* Total # bytes to be transmitted */
  494. len = (u16)skb->len;
  495. tx->len = cpu_to_le16(len);
  496. iwl_dbg_log_tx_data_frame(priv, len, hdr);
  497. iwl_update_stats(priv, true, fc, len);
  498. tx->tx_flags &= ~TX_CMD_FLG_ANT_A_MSK;
  499. tx->tx_flags &= ~TX_CMD_FLG_ANT_B_MSK;
  500. if (!ieee80211_has_morefrags(hdr->frame_control)) {
  501. txq->need_update = 1;
  502. if (qc)
  503. priv->stations[sta_id].tid[tid].seq_number = seq_number;
  504. } else {
  505. wait_write_ptr = 1;
  506. txq->need_update = 0;
  507. }
  508. IWL_DEBUG_TX(priv, "sequence nr = 0X%x \n",
  509. le16_to_cpu(out_cmd->hdr.sequence));
  510. IWL_DEBUG_TX(priv, "tx_flags = 0X%x \n", le32_to_cpu(tx->tx_flags));
  511. iwl_print_hex_dump(priv, IWL_DL_TX, tx, sizeof(*tx));
  512. iwl_print_hex_dump(priv, IWL_DL_TX, (u8 *)tx->hdr,
  513. ieee80211_hdrlen(fc));
  514. /*
  515. * Use the first empty entry in this queue's command buffer array
  516. * to contain the Tx command and MAC header concatenated together
  517. * (payload data will be in another buffer).
  518. * Size of this varies, due to varying MAC header length.
  519. * If end is not dword aligned, we'll have 2 extra bytes at the end
  520. * of the MAC header (device reads on dword boundaries).
  521. * We'll tell device about this padding later.
  522. */
  523. len = sizeof(struct iwl3945_tx_cmd) +
  524. sizeof(struct iwl_cmd_header) + hdr_len;
  525. len_org = len;
  526. len = (len + 3) & ~3;
  527. if (len_org != len)
  528. len_org = 1;
  529. else
  530. len_org = 0;
  531. /* Physical address of this Tx command's header (not MAC header!),
  532. * within command buffer array. */
  533. txcmd_phys = pci_map_single(priv->pci_dev, &out_cmd->hdr,
  534. len, PCI_DMA_TODEVICE);
  535. /* we do not map meta data ... so we can safely access address to
  536. * provide to unmap command*/
  537. pci_unmap_addr_set(out_meta, mapping, txcmd_phys);
  538. pci_unmap_len_set(out_meta, len, len);
  539. /* Add buffer containing Tx command and MAC(!) header to TFD's
  540. * first entry */
  541. priv->cfg->ops->lib->txq_attach_buf_to_tfd(priv, txq,
  542. txcmd_phys, len, 1, 0);
  543. /* Set up TFD's 2nd entry to point directly to remainder of skb,
  544. * if any (802.11 null frames have no payload). */
  545. len = skb->len - hdr_len;
  546. if (len) {
  547. phys_addr = pci_map_single(priv->pci_dev, skb->data + hdr_len,
  548. len, PCI_DMA_TODEVICE);
  549. priv->cfg->ops->lib->txq_attach_buf_to_tfd(priv, txq,
  550. phys_addr, len,
  551. 0, U32_PAD(len));
  552. }
  553. /* Tell device the write index *just past* this latest filled TFD */
  554. q->write_ptr = iwl_queue_inc_wrap(q->write_ptr, q->n_bd);
  555. rc = iwl_txq_update_write_ptr(priv, txq);
  556. spin_unlock_irqrestore(&priv->lock, flags);
  557. if (rc)
  558. return rc;
  559. if ((iwl_queue_space(q) < q->high_mark)
  560. && priv->mac80211_registered) {
  561. if (wait_write_ptr) {
  562. spin_lock_irqsave(&priv->lock, flags);
  563. txq->need_update = 1;
  564. iwl_txq_update_write_ptr(priv, txq);
  565. spin_unlock_irqrestore(&priv->lock, flags);
  566. }
  567. iwl_stop_queue(priv, skb_get_queue_mapping(skb));
  568. }
  569. return 0;
  570. drop_unlock:
  571. spin_unlock_irqrestore(&priv->lock, flags);
  572. drop:
  573. return -1;
  574. }
  575. #ifdef CONFIG_IWL3945_SPECTRUM_MEASUREMENT
  576. #include "iwl-spectrum.h"
  577. #define BEACON_TIME_MASK_LOW 0x00FFFFFF
  578. #define BEACON_TIME_MASK_HIGH 0xFF000000
  579. #define TIME_UNIT 1024
  580. /*
  581. * extended beacon time format
  582. * time in usec will be changed into a 32-bit value in 8:24 format
  583. * the high 1 byte is the beacon counts
  584. * the lower 3 bytes is the time in usec within one beacon interval
  585. */
  586. static u32 iwl3945_usecs_to_beacons(u32 usec, u32 beacon_interval)
  587. {
  588. u32 quot;
  589. u32 rem;
  590. u32 interval = beacon_interval * 1024;
  591. if (!interval || !usec)
  592. return 0;
  593. quot = (usec / interval) & (BEACON_TIME_MASK_HIGH >> 24);
  594. rem = (usec % interval) & BEACON_TIME_MASK_LOW;
  595. return (quot << 24) + rem;
  596. }
  597. /* base is usually what we get from ucode with each received frame,
  598. * the same as HW timer counter counting down
  599. */
  600. static __le32 iwl3945_add_beacon_time(u32 base, u32 addon, u32 beacon_interval)
  601. {
  602. u32 base_low = base & BEACON_TIME_MASK_LOW;
  603. u32 addon_low = addon & BEACON_TIME_MASK_LOW;
  604. u32 interval = beacon_interval * TIME_UNIT;
  605. u32 res = (base & BEACON_TIME_MASK_HIGH) +
  606. (addon & BEACON_TIME_MASK_HIGH);
  607. if (base_low > addon_low)
  608. res += base_low - addon_low;
  609. else if (base_low < addon_low) {
  610. res += interval + base_low - addon_low;
  611. res += (1 << 24);
  612. } else
  613. res += (1 << 24);
  614. return cpu_to_le32(res);
  615. }
  616. static int iwl3945_get_measurement(struct iwl_priv *priv,
  617. struct ieee80211_measurement_params *params,
  618. u8 type)
  619. {
  620. struct iwl_spectrum_cmd spectrum;
  621. struct iwl_rx_packet *res;
  622. struct iwl_host_cmd cmd = {
  623. .id = REPLY_SPECTRUM_MEASUREMENT_CMD,
  624. .data = (void *)&spectrum,
  625. .flags = CMD_WANT_SKB,
  626. };
  627. u32 add_time = le64_to_cpu(params->start_time);
  628. int rc;
  629. int spectrum_resp_status;
  630. int duration = le16_to_cpu(params->duration);
  631. if (iwl_is_associated(priv))
  632. add_time =
  633. iwl3945_usecs_to_beacons(
  634. le64_to_cpu(params->start_time) - priv->last_tsf,
  635. le16_to_cpu(priv->rxon_timing.beacon_interval));
  636. memset(&spectrum, 0, sizeof(spectrum));
  637. spectrum.channel_count = cpu_to_le16(1);
  638. spectrum.flags =
  639. RXON_FLG_TSF2HOST_MSK | RXON_FLG_ANT_A_MSK | RXON_FLG_DIS_DIV_MSK;
  640. spectrum.filter_flags = MEASUREMENT_FILTER_FLAG;
  641. cmd.len = sizeof(spectrum);
  642. spectrum.len = cpu_to_le16(cmd.len - sizeof(spectrum.len));
  643. if (iwl_is_associated(priv))
  644. spectrum.start_time =
  645. iwl3945_add_beacon_time(priv->last_beacon_time,
  646. add_time,
  647. le16_to_cpu(priv->rxon_timing.beacon_interval));
  648. else
  649. spectrum.start_time = 0;
  650. spectrum.channels[0].duration = cpu_to_le32(duration * TIME_UNIT);
  651. spectrum.channels[0].channel = params->channel;
  652. spectrum.channels[0].type = type;
  653. if (priv->active_rxon.flags & RXON_FLG_BAND_24G_MSK)
  654. spectrum.flags |= RXON_FLG_BAND_24G_MSK |
  655. RXON_FLG_AUTO_DETECT_MSK | RXON_FLG_TGG_PROTECT_MSK;
  656. rc = iwl_send_cmd_sync(priv, &cmd);
  657. if (rc)
  658. return rc;
  659. res = (struct iwl_rx_packet *)cmd.reply_skb->data;
  660. if (res->hdr.flags & IWL_CMD_FAILED_MSK) {
  661. IWL_ERR(priv, "Bad return from REPLY_RX_ON_ASSOC command\n");
  662. rc = -EIO;
  663. }
  664. spectrum_resp_status = le16_to_cpu(res->u.spectrum.status);
  665. switch (spectrum_resp_status) {
  666. case 0: /* Command will be handled */
  667. if (res->u.spectrum.id != 0xff) {
  668. IWL_DEBUG_INFO(priv, "Replaced existing measurement: %d\n",
  669. res->u.spectrum.id);
  670. priv->measurement_status &= ~MEASUREMENT_READY;
  671. }
  672. priv->measurement_status |= MEASUREMENT_ACTIVE;
  673. rc = 0;
  674. break;
  675. case 1: /* Command will not be handled */
  676. rc = -EAGAIN;
  677. break;
  678. }
  679. dev_kfree_skb_any(cmd.reply_skb);
  680. return rc;
  681. }
  682. #endif
  683. static void iwl3945_rx_reply_alive(struct iwl_priv *priv,
  684. struct iwl_rx_mem_buffer *rxb)
  685. {
  686. struct iwl_rx_packet *pkt = (void *)rxb->skb->data;
  687. struct iwl_alive_resp *palive;
  688. struct delayed_work *pwork;
  689. palive = &pkt->u.alive_frame;
  690. IWL_DEBUG_INFO(priv, "Alive ucode status 0x%08X revision "
  691. "0x%01X 0x%01X\n",
  692. palive->is_valid, palive->ver_type,
  693. palive->ver_subtype);
  694. if (palive->ver_subtype == INITIALIZE_SUBTYPE) {
  695. IWL_DEBUG_INFO(priv, "Initialization Alive received.\n");
  696. memcpy(&priv->card_alive_init, &pkt->u.alive_frame,
  697. sizeof(struct iwl_alive_resp));
  698. pwork = &priv->init_alive_start;
  699. } else {
  700. IWL_DEBUG_INFO(priv, "Runtime Alive received.\n");
  701. memcpy(&priv->card_alive, &pkt->u.alive_frame,
  702. sizeof(struct iwl_alive_resp));
  703. pwork = &priv->alive_start;
  704. iwl3945_disable_events(priv);
  705. }
  706. /* We delay the ALIVE response by 5ms to
  707. * give the HW RF Kill time to activate... */
  708. if (palive->is_valid == UCODE_VALID_OK)
  709. queue_delayed_work(priv->workqueue, pwork,
  710. msecs_to_jiffies(5));
  711. else
  712. IWL_WARN(priv, "uCode did not respond OK.\n");
  713. }
  714. static void iwl3945_rx_reply_add_sta(struct iwl_priv *priv,
  715. struct iwl_rx_mem_buffer *rxb)
  716. {
  717. #ifdef CONFIG_IWLWIFI_DEBUG
  718. struct iwl_rx_packet *pkt = (void *)rxb->skb->data;
  719. #endif
  720. IWL_DEBUG_RX(priv, "Received REPLY_ADD_STA: 0x%02X\n", pkt->u.status);
  721. return;
  722. }
  723. static void iwl3945_bg_beacon_update(struct work_struct *work)
  724. {
  725. struct iwl_priv *priv =
  726. container_of(work, struct iwl_priv, beacon_update);
  727. struct sk_buff *beacon;
  728. /* Pull updated AP beacon from mac80211. will fail if not in AP mode */
  729. beacon = ieee80211_beacon_get(priv->hw, priv->vif);
  730. if (!beacon) {
  731. IWL_ERR(priv, "update beacon failed\n");
  732. return;
  733. }
  734. mutex_lock(&priv->mutex);
  735. /* new beacon skb is allocated every time; dispose previous.*/
  736. if (priv->ibss_beacon)
  737. dev_kfree_skb(priv->ibss_beacon);
  738. priv->ibss_beacon = beacon;
  739. mutex_unlock(&priv->mutex);
  740. iwl3945_send_beacon_cmd(priv);
  741. }
  742. static void iwl3945_rx_beacon_notif(struct iwl_priv *priv,
  743. struct iwl_rx_mem_buffer *rxb)
  744. {
  745. #ifdef CONFIG_IWLWIFI_DEBUG
  746. struct iwl_rx_packet *pkt = (void *)rxb->skb->data;
  747. struct iwl3945_beacon_notif *beacon = &(pkt->u.beacon_status);
  748. u8 rate = beacon->beacon_notify_hdr.rate;
  749. IWL_DEBUG_RX(priv, "beacon status %x retries %d iss %d "
  750. "tsf %d %d rate %d\n",
  751. le32_to_cpu(beacon->beacon_notify_hdr.status) & TX_STATUS_MSK,
  752. beacon->beacon_notify_hdr.failure_frame,
  753. le32_to_cpu(beacon->ibss_mgr_status),
  754. le32_to_cpu(beacon->high_tsf),
  755. le32_to_cpu(beacon->low_tsf), rate);
  756. #endif
  757. if ((priv->iw_mode == NL80211_IFTYPE_AP) &&
  758. (!test_bit(STATUS_EXIT_PENDING, &priv->status)))
  759. queue_work(priv->workqueue, &priv->beacon_update);
  760. }
  761. /* Handle notification from uCode that card's power state is changing
  762. * due to software, hardware, or critical temperature RFKILL */
  763. static void iwl3945_rx_card_state_notif(struct iwl_priv *priv,
  764. struct iwl_rx_mem_buffer *rxb)
  765. {
  766. struct iwl_rx_packet *pkt = (void *)rxb->skb->data;
  767. u32 flags = le32_to_cpu(pkt->u.card_state_notif.flags);
  768. unsigned long status = priv->status;
  769. IWL_WARN(priv, "Card state received: HW:%s SW:%s\n",
  770. (flags & HW_CARD_DISABLED) ? "Kill" : "On",
  771. (flags & SW_CARD_DISABLED) ? "Kill" : "On");
  772. iwl_write32(priv, CSR_UCODE_DRV_GP1_SET,
  773. CSR_UCODE_DRV_GP1_BIT_CMD_BLOCKED);
  774. if (flags & HW_CARD_DISABLED)
  775. set_bit(STATUS_RF_KILL_HW, &priv->status);
  776. else
  777. clear_bit(STATUS_RF_KILL_HW, &priv->status);
  778. iwl_scan_cancel(priv);
  779. if ((test_bit(STATUS_RF_KILL_HW, &status) !=
  780. test_bit(STATUS_RF_KILL_HW, &priv->status)))
  781. wiphy_rfkill_set_hw_state(priv->hw->wiphy,
  782. test_bit(STATUS_RF_KILL_HW, &priv->status));
  783. else
  784. wake_up_interruptible(&priv->wait_command_queue);
  785. }
  786. /**
  787. * iwl3945_setup_rx_handlers - Initialize Rx handler callbacks
  788. *
  789. * Setup the RX handlers for each of the reply types sent from the uCode
  790. * to the host.
  791. *
  792. * This function chains into the hardware specific files for them to setup
  793. * any hardware specific handlers as well.
  794. */
  795. static void iwl3945_setup_rx_handlers(struct iwl_priv *priv)
  796. {
  797. priv->rx_handlers[REPLY_ALIVE] = iwl3945_rx_reply_alive;
  798. priv->rx_handlers[REPLY_ADD_STA] = iwl3945_rx_reply_add_sta;
  799. priv->rx_handlers[REPLY_ERROR] = iwl_rx_reply_error;
  800. priv->rx_handlers[CHANNEL_SWITCH_NOTIFICATION] = iwl_rx_csa;
  801. priv->rx_handlers[PM_SLEEP_NOTIFICATION] = iwl_rx_pm_sleep_notif;
  802. priv->rx_handlers[PM_DEBUG_STATISTIC_NOTIFIC] =
  803. iwl_rx_pm_debug_statistics_notif;
  804. priv->rx_handlers[BEACON_NOTIFICATION] = iwl3945_rx_beacon_notif;
  805. /*
  806. * The same handler is used for both the REPLY to a discrete
  807. * statistics request from the host as well as for the periodic
  808. * statistics notifications (after received beacons) from the uCode.
  809. */
  810. priv->rx_handlers[REPLY_STATISTICS_CMD] = iwl3945_hw_rx_statistics;
  811. priv->rx_handlers[STATISTICS_NOTIFICATION] = iwl3945_hw_rx_statistics;
  812. iwl_setup_spectrum_handlers(priv);
  813. iwl_setup_rx_scan_handlers(priv);
  814. priv->rx_handlers[CARD_STATE_NOTIFICATION] = iwl3945_rx_card_state_notif;
  815. /* Set up hardware specific Rx handlers */
  816. iwl3945_hw_rx_handler_setup(priv);
  817. }
  818. /************************** RX-FUNCTIONS ****************************/
  819. /*
  820. * Rx theory of operation
  821. *
  822. * The host allocates 32 DMA target addresses and passes the host address
  823. * to the firmware at register IWL_RFDS_TABLE_LOWER + N * RFD_SIZE where N is
  824. * 0 to 31
  825. *
  826. * Rx Queue Indexes
  827. * The host/firmware share two index registers for managing the Rx buffers.
  828. *
  829. * The READ index maps to the first position that the firmware may be writing
  830. * to -- the driver can read up to (but not including) this position and get
  831. * good data.
  832. * The READ index is managed by the firmware once the card is enabled.
  833. *
  834. * The WRITE index maps to the last position the driver has read from -- the
  835. * position preceding WRITE is the last slot the firmware can place a packet.
  836. *
  837. * The queue is empty (no good data) if WRITE = READ - 1, and is full if
  838. * WRITE = READ.
  839. *
  840. * During initialization, the host sets up the READ queue position to the first
  841. * INDEX position, and WRITE to the last (READ - 1 wrapped)
  842. *
  843. * When the firmware places a packet in a buffer, it will advance the READ index
  844. * and fire the RX interrupt. The driver can then query the READ index and
  845. * process as many packets as possible, moving the WRITE index forward as it
  846. * resets the Rx queue buffers with new memory.
  847. *
  848. * The management in the driver is as follows:
  849. * + A list of pre-allocated SKBs is stored in iwl->rxq->rx_free. When
  850. * iwl->rxq->free_count drops to or below RX_LOW_WATERMARK, work is scheduled
  851. * to replenish the iwl->rxq->rx_free.
  852. * + In iwl3945_rx_replenish (scheduled) if 'processed' != 'read' then the
  853. * iwl->rxq is replenished and the READ INDEX is updated (updating the
  854. * 'processed' and 'read' driver indexes as well)
  855. * + A received packet is processed and handed to the kernel network stack,
  856. * detached from the iwl->rxq. The driver 'processed' index is updated.
  857. * + The Host/Firmware iwl->rxq is replenished at tasklet time from the rx_free
  858. * list. If there are no allocated buffers in iwl->rxq->rx_free, the READ
  859. * INDEX is not incremented and iwl->status(RX_STALLED) is set. If there
  860. * were enough free buffers and RX_STALLED is set it is cleared.
  861. *
  862. *
  863. * Driver sequence:
  864. *
  865. * iwl3945_rx_replenish() Replenishes rx_free list from rx_used, and calls
  866. * iwl3945_rx_queue_restock
  867. * iwl3945_rx_queue_restock() Moves available buffers from rx_free into Rx
  868. * queue, updates firmware pointers, and updates
  869. * the WRITE index. If insufficient rx_free buffers
  870. * are available, schedules iwl3945_rx_replenish
  871. *
  872. * -- enable interrupts --
  873. * ISR - iwl3945_rx() Detach iwl_rx_mem_buffers from pool up to the
  874. * READ INDEX, detaching the SKB from the pool.
  875. * Moves the packet buffer from queue to rx_used.
  876. * Calls iwl3945_rx_queue_restock to refill any empty
  877. * slots.
  878. * ...
  879. *
  880. */
  881. /**
  882. * iwl3945_dma_addr2rbd_ptr - convert a DMA address to a uCode read buffer ptr
  883. */
  884. static inline __le32 iwl3945_dma_addr2rbd_ptr(struct iwl_priv *priv,
  885. dma_addr_t dma_addr)
  886. {
  887. return cpu_to_le32((u32)dma_addr);
  888. }
  889. /**
  890. * iwl3945_rx_queue_restock - refill RX queue from pre-allocated pool
  891. *
  892. * If there are slots in the RX queue that need to be restocked,
  893. * and we have free pre-allocated buffers, fill the ranks as much
  894. * as we can, pulling from rx_free.
  895. *
  896. * This moves the 'write' index forward to catch up with 'processed', and
  897. * also updates the memory address in the firmware to reference the new
  898. * target buffer.
  899. */
  900. static int iwl3945_rx_queue_restock(struct iwl_priv *priv)
  901. {
  902. struct iwl_rx_queue *rxq = &priv->rxq;
  903. struct list_head *element;
  904. struct iwl_rx_mem_buffer *rxb;
  905. unsigned long flags;
  906. int write, rc;
  907. spin_lock_irqsave(&rxq->lock, flags);
  908. write = rxq->write & ~0x7;
  909. while ((iwl_rx_queue_space(rxq) > 0) && (rxq->free_count)) {
  910. /* Get next free Rx buffer, remove from free list */
  911. element = rxq->rx_free.next;
  912. rxb = list_entry(element, struct iwl_rx_mem_buffer, list);
  913. list_del(element);
  914. /* Point to Rx buffer via next RBD in circular buffer */
  915. rxq->bd[rxq->write] = iwl3945_dma_addr2rbd_ptr(priv, rxb->real_dma_addr);
  916. rxq->queue[rxq->write] = rxb;
  917. rxq->write = (rxq->write + 1) & RX_QUEUE_MASK;
  918. rxq->free_count--;
  919. }
  920. spin_unlock_irqrestore(&rxq->lock, flags);
  921. /* If the pre-allocated buffer pool is dropping low, schedule to
  922. * refill it */
  923. if (rxq->free_count <= RX_LOW_WATERMARK)
  924. queue_work(priv->workqueue, &priv->rx_replenish);
  925. /* If we've added more space for the firmware to place data, tell it.
  926. * Increment device's write pointer in multiples of 8. */
  927. if ((rxq->write_actual != (rxq->write & ~0x7))
  928. || (abs(rxq->write - rxq->read) > 7)) {
  929. spin_lock_irqsave(&rxq->lock, flags);
  930. rxq->need_update = 1;
  931. spin_unlock_irqrestore(&rxq->lock, flags);
  932. rc = iwl_rx_queue_update_write_ptr(priv, rxq);
  933. if (rc)
  934. return rc;
  935. }
  936. return 0;
  937. }
  938. /**
  939. * iwl3945_rx_replenish - Move all used packet from rx_used to rx_free
  940. *
  941. * When moving to rx_free an SKB is allocated for the slot.
  942. *
  943. * Also restock the Rx queue via iwl3945_rx_queue_restock.
  944. * This is called as a scheduled work item (except for during initialization)
  945. */
  946. static void iwl3945_rx_allocate(struct iwl_priv *priv, gfp_t priority)
  947. {
  948. struct iwl_rx_queue *rxq = &priv->rxq;
  949. struct list_head *element;
  950. struct iwl_rx_mem_buffer *rxb;
  951. struct sk_buff *skb;
  952. unsigned long flags;
  953. while (1) {
  954. spin_lock_irqsave(&rxq->lock, flags);
  955. if (list_empty(&rxq->rx_used)) {
  956. spin_unlock_irqrestore(&rxq->lock, flags);
  957. return;
  958. }
  959. spin_unlock_irqrestore(&rxq->lock, flags);
  960. if (rxq->free_count > RX_LOW_WATERMARK)
  961. priority |= __GFP_NOWARN;
  962. /* Alloc a new receive buffer */
  963. skb = alloc_skb(priv->hw_params.rx_buf_size, priority);
  964. if (!skb) {
  965. if (net_ratelimit())
  966. IWL_DEBUG_INFO(priv, "Failed to allocate SKB buffer.\n");
  967. if ((rxq->free_count <= RX_LOW_WATERMARK) &&
  968. net_ratelimit())
  969. IWL_CRIT(priv, "Failed to allocate SKB buffer with %s. Only %u free buffers remaining.\n",
  970. priority == GFP_ATOMIC ? "GFP_ATOMIC" : "GFP_KERNEL",
  971. rxq->free_count);
  972. /* We don't reschedule replenish work here -- we will
  973. * call the restock method and if it still needs
  974. * more buffers it will schedule replenish */
  975. break;
  976. }
  977. spin_lock_irqsave(&rxq->lock, flags);
  978. if (list_empty(&rxq->rx_used)) {
  979. spin_unlock_irqrestore(&rxq->lock, flags);
  980. dev_kfree_skb_any(skb);
  981. return;
  982. }
  983. element = rxq->rx_used.next;
  984. rxb = list_entry(element, struct iwl_rx_mem_buffer, list);
  985. list_del(element);
  986. spin_unlock_irqrestore(&rxq->lock, flags);
  987. rxb->skb = skb;
  988. /* If radiotap head is required, reserve some headroom here.
  989. * The physical head count is a variable rx_stats->phy_count.
  990. * We reserve 4 bytes here. Plus these extra bytes, the
  991. * headroom of the physical head should be enough for the
  992. * radiotap head that iwl3945 supported. See iwl3945_rt.
  993. */
  994. skb_reserve(rxb->skb, 4);
  995. /* Get physical address of RB/SKB */
  996. rxb->real_dma_addr = pci_map_single(priv->pci_dev,
  997. rxb->skb->data,
  998. priv->hw_params.rx_buf_size,
  999. PCI_DMA_FROMDEVICE);
  1000. spin_lock_irqsave(&rxq->lock, flags);
  1001. list_add_tail(&rxb->list, &rxq->rx_free);
  1002. priv->alloc_rxb_skb++;
  1003. rxq->free_count++;
  1004. spin_unlock_irqrestore(&rxq->lock, flags);
  1005. }
  1006. }
  1007. void iwl3945_rx_queue_reset(struct iwl_priv *priv, struct iwl_rx_queue *rxq)
  1008. {
  1009. unsigned long flags;
  1010. int i;
  1011. spin_lock_irqsave(&rxq->lock, flags);
  1012. INIT_LIST_HEAD(&rxq->rx_free);
  1013. INIT_LIST_HEAD(&rxq->rx_used);
  1014. /* Fill the rx_used queue with _all_ of the Rx buffers */
  1015. for (i = 0; i < RX_FREE_BUFFERS + RX_QUEUE_SIZE; i++) {
  1016. /* In the reset function, these buffers may have been allocated
  1017. * to an SKB, so we need to unmap and free potential storage */
  1018. if (rxq->pool[i].skb != NULL) {
  1019. pci_unmap_single(priv->pci_dev,
  1020. rxq->pool[i].real_dma_addr,
  1021. priv->hw_params.rx_buf_size,
  1022. PCI_DMA_FROMDEVICE);
  1023. priv->alloc_rxb_skb--;
  1024. dev_kfree_skb(rxq->pool[i].skb);
  1025. rxq->pool[i].skb = NULL;
  1026. }
  1027. list_add_tail(&rxq->pool[i].list, &rxq->rx_used);
  1028. }
  1029. /* Set us so that we have processed and used all buffers, but have
  1030. * not restocked the Rx queue with fresh buffers */
  1031. rxq->read = rxq->write = 0;
  1032. rxq->free_count = 0;
  1033. rxq->write_actual = 0;
  1034. spin_unlock_irqrestore(&rxq->lock, flags);
  1035. }
  1036. void iwl3945_rx_replenish(void *data)
  1037. {
  1038. struct iwl_priv *priv = data;
  1039. unsigned long flags;
  1040. iwl3945_rx_allocate(priv, GFP_KERNEL);
  1041. spin_lock_irqsave(&priv->lock, flags);
  1042. iwl3945_rx_queue_restock(priv);
  1043. spin_unlock_irqrestore(&priv->lock, flags);
  1044. }
  1045. static void iwl3945_rx_replenish_now(struct iwl_priv *priv)
  1046. {
  1047. iwl3945_rx_allocate(priv, GFP_ATOMIC);
  1048. iwl3945_rx_queue_restock(priv);
  1049. }
  1050. /* Assumes that the skb field of the buffers in 'pool' is kept accurate.
  1051. * If an SKB has been detached, the POOL needs to have its SKB set to NULL
  1052. * This free routine walks the list of POOL entries and if SKB is set to
  1053. * non NULL it is unmapped and freed
  1054. */
  1055. static void iwl3945_rx_queue_free(struct iwl_priv *priv, struct iwl_rx_queue *rxq)
  1056. {
  1057. int i;
  1058. for (i = 0; i < RX_QUEUE_SIZE + RX_FREE_BUFFERS; i++) {
  1059. if (rxq->pool[i].skb != NULL) {
  1060. pci_unmap_single(priv->pci_dev,
  1061. rxq->pool[i].real_dma_addr,
  1062. priv->hw_params.rx_buf_size,
  1063. PCI_DMA_FROMDEVICE);
  1064. dev_kfree_skb(rxq->pool[i].skb);
  1065. }
  1066. }
  1067. pci_free_consistent(priv->pci_dev, 4 * RX_QUEUE_SIZE, rxq->bd,
  1068. rxq->dma_addr);
  1069. pci_free_consistent(priv->pci_dev, sizeof(struct iwl_rb_status),
  1070. rxq->rb_stts, rxq->rb_stts_dma);
  1071. rxq->bd = NULL;
  1072. rxq->rb_stts = NULL;
  1073. }
  1074. /* Convert linear signal-to-noise ratio into dB */
  1075. static u8 ratio2dB[100] = {
  1076. /* 0 1 2 3 4 5 6 7 8 9 */
  1077. 0, 0, 6, 10, 12, 14, 16, 17, 18, 19, /* 00 - 09 */
  1078. 20, 21, 22, 22, 23, 23, 24, 25, 26, 26, /* 10 - 19 */
  1079. 26, 26, 26, 27, 27, 28, 28, 28, 29, 29, /* 20 - 29 */
  1080. 29, 30, 30, 30, 31, 31, 31, 31, 32, 32, /* 30 - 39 */
  1081. 32, 32, 32, 33, 33, 33, 33, 33, 34, 34, /* 40 - 49 */
  1082. 34, 34, 34, 34, 35, 35, 35, 35, 35, 35, /* 50 - 59 */
  1083. 36, 36, 36, 36, 36, 36, 36, 37, 37, 37, /* 60 - 69 */
  1084. 37, 37, 37, 37, 37, 38, 38, 38, 38, 38, /* 70 - 79 */
  1085. 38, 38, 38, 38, 38, 39, 39, 39, 39, 39, /* 80 - 89 */
  1086. 39, 39, 39, 39, 39, 40, 40, 40, 40, 40 /* 90 - 99 */
  1087. };
  1088. /* Calculates a relative dB value from a ratio of linear
  1089. * (i.e. not dB) signal levels.
  1090. * Conversion assumes that levels are voltages (20*log), not powers (10*log). */
  1091. int iwl3945_calc_db_from_ratio(int sig_ratio)
  1092. {
  1093. /* 1000:1 or higher just report as 60 dB */
  1094. if (sig_ratio >= 1000)
  1095. return 60;
  1096. /* 100:1 or higher, divide by 10 and use table,
  1097. * add 20 dB to make up for divide by 10 */
  1098. if (sig_ratio >= 100)
  1099. return 20 + (int)ratio2dB[sig_ratio/10];
  1100. /* We shouldn't see this */
  1101. if (sig_ratio < 1)
  1102. return 0;
  1103. /* Use table for ratios 1:1 - 99:1 */
  1104. return (int)ratio2dB[sig_ratio];
  1105. }
  1106. #define PERFECT_RSSI (-20) /* dBm */
  1107. #define WORST_RSSI (-95) /* dBm */
  1108. #define RSSI_RANGE (PERFECT_RSSI - WORST_RSSI)
  1109. /* Calculate an indication of rx signal quality (a percentage, not dBm!).
  1110. * See http://www.ces.clemson.edu/linux/signal_quality.shtml for info
  1111. * about formulas used below. */
  1112. int iwl3945_calc_sig_qual(int rssi_dbm, int noise_dbm)
  1113. {
  1114. int sig_qual;
  1115. int degradation = PERFECT_RSSI - rssi_dbm;
  1116. /* If we get a noise measurement, use signal-to-noise ratio (SNR)
  1117. * as indicator; formula is (signal dbm - noise dbm).
  1118. * SNR at or above 40 is a great signal (100%).
  1119. * Below that, scale to fit SNR of 0 - 40 dB within 0 - 100% indicator.
  1120. * Weakest usable signal is usually 10 - 15 dB SNR. */
  1121. if (noise_dbm) {
  1122. if (rssi_dbm - noise_dbm >= 40)
  1123. return 100;
  1124. else if (rssi_dbm < noise_dbm)
  1125. return 0;
  1126. sig_qual = ((rssi_dbm - noise_dbm) * 5) / 2;
  1127. /* Else use just the signal level.
  1128. * This formula is a least squares fit of data points collected and
  1129. * compared with a reference system that had a percentage (%) display
  1130. * for signal quality. */
  1131. } else
  1132. sig_qual = (100 * (RSSI_RANGE * RSSI_RANGE) - degradation *
  1133. (15 * RSSI_RANGE + 62 * degradation)) /
  1134. (RSSI_RANGE * RSSI_RANGE);
  1135. if (sig_qual > 100)
  1136. sig_qual = 100;
  1137. else if (sig_qual < 1)
  1138. sig_qual = 0;
  1139. return sig_qual;
  1140. }
  1141. /**
  1142. * iwl3945_rx_handle - Main entry function for receiving responses from uCode
  1143. *
  1144. * Uses the priv->rx_handlers callback function array to invoke
  1145. * the appropriate handlers, including command responses,
  1146. * frame-received notifications, and other notifications.
  1147. */
  1148. static void iwl3945_rx_handle(struct iwl_priv *priv)
  1149. {
  1150. struct iwl_rx_mem_buffer *rxb;
  1151. struct iwl_rx_packet *pkt;
  1152. struct iwl_rx_queue *rxq = &priv->rxq;
  1153. u32 r, i;
  1154. int reclaim;
  1155. unsigned long flags;
  1156. u8 fill_rx = 0;
  1157. u32 count = 8;
  1158. int total_empty = 0;
  1159. /* uCode's read index (stored in shared DRAM) indicates the last Rx
  1160. * buffer that the driver may process (last buffer filled by ucode). */
  1161. r = le16_to_cpu(rxq->rb_stts->closed_rb_num) & 0x0FFF;
  1162. i = rxq->read;
  1163. /* calculate total frames need to be restock after handling RX */
  1164. total_empty = r - priv->rxq.write_actual;
  1165. if (total_empty < 0)
  1166. total_empty += RX_QUEUE_SIZE;
  1167. if (total_empty > (RX_QUEUE_SIZE / 2))
  1168. fill_rx = 1;
  1169. /* Rx interrupt, but nothing sent from uCode */
  1170. if (i == r)
  1171. IWL_DEBUG_RX(priv, "r = %d, i = %d\n", r, i);
  1172. while (i != r) {
  1173. rxb = rxq->queue[i];
  1174. /* If an RXB doesn't have a Rx queue slot associated with it,
  1175. * then a bug has been introduced in the queue refilling
  1176. * routines -- catch it here */
  1177. BUG_ON(rxb == NULL);
  1178. rxq->queue[i] = NULL;
  1179. pci_unmap_single(priv->pci_dev, rxb->real_dma_addr,
  1180. priv->hw_params.rx_buf_size,
  1181. PCI_DMA_FROMDEVICE);
  1182. pkt = (struct iwl_rx_packet *)rxb->skb->data;
  1183. /* Reclaim a command buffer only if this packet is a response
  1184. * to a (driver-originated) command.
  1185. * If the packet (e.g. Rx frame) originated from uCode,
  1186. * there is no command buffer to reclaim.
  1187. * Ucode should set SEQ_RX_FRAME bit if ucode-originated,
  1188. * but apparently a few don't get set; catch them here. */
  1189. reclaim = !(pkt->hdr.sequence & SEQ_RX_FRAME) &&
  1190. (pkt->hdr.cmd != STATISTICS_NOTIFICATION) &&
  1191. (pkt->hdr.cmd != REPLY_TX);
  1192. /* Based on type of command response or notification,
  1193. * handle those that need handling via function in
  1194. * rx_handlers table. See iwl3945_setup_rx_handlers() */
  1195. if (priv->rx_handlers[pkt->hdr.cmd]) {
  1196. IWL_DEBUG_RX(priv, "r = %d, i = %d, %s, 0x%02x\n", r, i,
  1197. get_cmd_string(pkt->hdr.cmd), pkt->hdr.cmd);
  1198. priv->rx_handlers[pkt->hdr.cmd] (priv, rxb);
  1199. priv->isr_stats.rx_handlers[pkt->hdr.cmd]++;
  1200. } else {
  1201. /* No handling needed */
  1202. IWL_DEBUG_RX(priv, "r %d i %d No handler needed for %s, 0x%02x\n",
  1203. r, i, get_cmd_string(pkt->hdr.cmd),
  1204. pkt->hdr.cmd);
  1205. }
  1206. if (reclaim) {
  1207. /* Invoke any callbacks, transfer the skb to caller, and
  1208. * fire off the (possibly) blocking iwl_send_cmd()
  1209. * as we reclaim the driver command queue */
  1210. if (rxb && rxb->skb)
  1211. iwl_tx_cmd_complete(priv, rxb);
  1212. else
  1213. IWL_WARN(priv, "Claim null rxb?\n");
  1214. }
  1215. /* For now we just don't re-use anything. We can tweak this
  1216. * later to try and re-use notification packets and SKBs that
  1217. * fail to Rx correctly */
  1218. if (rxb->skb != NULL) {
  1219. priv->alloc_rxb_skb--;
  1220. dev_kfree_skb_any(rxb->skb);
  1221. rxb->skb = NULL;
  1222. }
  1223. spin_lock_irqsave(&rxq->lock, flags);
  1224. list_add_tail(&rxb->list, &priv->rxq.rx_used);
  1225. spin_unlock_irqrestore(&rxq->lock, flags);
  1226. i = (i + 1) & RX_QUEUE_MASK;
  1227. /* If there are a lot of unused frames,
  1228. * restock the Rx queue so ucode won't assert. */
  1229. if (fill_rx) {
  1230. count++;
  1231. if (count >= 8) {
  1232. priv->rxq.read = i;
  1233. iwl3945_rx_replenish_now(priv);
  1234. count = 0;
  1235. }
  1236. }
  1237. }
  1238. /* Backtrack one entry */
  1239. priv->rxq.read = i;
  1240. if (fill_rx)
  1241. iwl3945_rx_replenish_now(priv);
  1242. else
  1243. iwl3945_rx_queue_restock(priv);
  1244. }
  1245. /* call this function to flush any scheduled tasklet */
  1246. static inline void iwl_synchronize_irq(struct iwl_priv *priv)
  1247. {
  1248. /* wait to make sure we flush pending tasklet*/
  1249. synchronize_irq(priv->pci_dev->irq);
  1250. tasklet_kill(&priv->irq_tasklet);
  1251. }
  1252. #ifdef CONFIG_IWLWIFI_DEBUG
  1253. static const char *desc_lookup(int i)
  1254. {
  1255. switch (i) {
  1256. case 1:
  1257. return "FAIL";
  1258. case 2:
  1259. return "BAD_PARAM";
  1260. case 3:
  1261. return "BAD_CHECKSUM";
  1262. case 4:
  1263. return "NMI_INTERRUPT";
  1264. case 5:
  1265. return "SYSASSERT";
  1266. case 6:
  1267. return "FATAL_ERROR";
  1268. }
  1269. return "UNKNOWN";
  1270. }
  1271. #define ERROR_START_OFFSET (1 * sizeof(u32))
  1272. #define ERROR_ELEM_SIZE (7 * sizeof(u32))
  1273. void iwl3945_dump_nic_error_log(struct iwl_priv *priv)
  1274. {
  1275. u32 i;
  1276. u32 desc, time, count, base, data1;
  1277. u32 blink1, blink2, ilink1, ilink2;
  1278. base = le32_to_cpu(priv->card_alive.error_event_table_ptr);
  1279. if (!iwl3945_hw_valid_rtc_data_addr(base)) {
  1280. IWL_ERR(priv, "Not valid error log pointer 0x%08X\n", base);
  1281. return;
  1282. }
  1283. count = iwl_read_targ_mem(priv, base);
  1284. if (ERROR_START_OFFSET <= count * ERROR_ELEM_SIZE) {
  1285. IWL_ERR(priv, "Start IWL Error Log Dump:\n");
  1286. IWL_ERR(priv, "Status: 0x%08lX, count: %d\n",
  1287. priv->status, count);
  1288. }
  1289. IWL_ERR(priv, "Desc Time asrtPC blink2 "
  1290. "ilink1 nmiPC Line\n");
  1291. for (i = ERROR_START_OFFSET;
  1292. i < (count * ERROR_ELEM_SIZE) + ERROR_START_OFFSET;
  1293. i += ERROR_ELEM_SIZE) {
  1294. desc = iwl_read_targ_mem(priv, base + i);
  1295. time =
  1296. iwl_read_targ_mem(priv, base + i + 1 * sizeof(u32));
  1297. blink1 =
  1298. iwl_read_targ_mem(priv, base + i + 2 * sizeof(u32));
  1299. blink2 =
  1300. iwl_read_targ_mem(priv, base + i + 3 * sizeof(u32));
  1301. ilink1 =
  1302. iwl_read_targ_mem(priv, base + i + 4 * sizeof(u32));
  1303. ilink2 =
  1304. iwl_read_targ_mem(priv, base + i + 5 * sizeof(u32));
  1305. data1 =
  1306. iwl_read_targ_mem(priv, base + i + 6 * sizeof(u32));
  1307. IWL_ERR(priv,
  1308. "%-13s (#%d) %010u 0x%05X 0x%05X 0x%05X 0x%05X %u\n\n",
  1309. desc_lookup(desc), desc, time, blink1, blink2,
  1310. ilink1, ilink2, data1);
  1311. }
  1312. }
  1313. #define EVENT_START_OFFSET (6 * sizeof(u32))
  1314. /**
  1315. * iwl3945_print_event_log - Dump error event log to syslog
  1316. *
  1317. */
  1318. static void iwl3945_print_event_log(struct iwl_priv *priv, u32 start_idx,
  1319. u32 num_events, u32 mode)
  1320. {
  1321. u32 i;
  1322. u32 base; /* SRAM byte address of event log header */
  1323. u32 event_size; /* 2 u32s, or 3 u32s if timestamp recorded */
  1324. u32 ptr; /* SRAM byte address of log data */
  1325. u32 ev, time, data; /* event log data */
  1326. if (num_events == 0)
  1327. return;
  1328. base = le32_to_cpu(priv->card_alive.log_event_table_ptr);
  1329. if (mode == 0)
  1330. event_size = 2 * sizeof(u32);
  1331. else
  1332. event_size = 3 * sizeof(u32);
  1333. ptr = base + EVENT_START_OFFSET + (start_idx * event_size);
  1334. /* "time" is actually "data" for mode 0 (no timestamp).
  1335. * place event id # at far right for easier visual parsing. */
  1336. for (i = 0; i < num_events; i++) {
  1337. ev = iwl_read_targ_mem(priv, ptr);
  1338. ptr += sizeof(u32);
  1339. time = iwl_read_targ_mem(priv, ptr);
  1340. ptr += sizeof(u32);
  1341. if (mode == 0) {
  1342. /* data, ev */
  1343. IWL_ERR(priv, "0x%08x\t%04u\n", time, ev);
  1344. } else {
  1345. data = iwl_read_targ_mem(priv, ptr);
  1346. ptr += sizeof(u32);
  1347. IWL_ERR(priv, "%010u\t0x%08x\t%04u\n", time, data, ev);
  1348. }
  1349. }
  1350. }
  1351. void iwl3945_dump_nic_event_log(struct iwl_priv *priv)
  1352. {
  1353. u32 base; /* SRAM byte address of event log header */
  1354. u32 capacity; /* event log capacity in # entries */
  1355. u32 mode; /* 0 - no timestamp, 1 - timestamp recorded */
  1356. u32 num_wraps; /* # times uCode wrapped to top of log */
  1357. u32 next_entry; /* index of next entry to be written by uCode */
  1358. u32 size; /* # entries that we'll print */
  1359. base = le32_to_cpu(priv->card_alive.log_event_table_ptr);
  1360. if (!iwl3945_hw_valid_rtc_data_addr(base)) {
  1361. IWL_ERR(priv, "Invalid event log pointer 0x%08X\n", base);
  1362. return;
  1363. }
  1364. /* event log header */
  1365. capacity = iwl_read_targ_mem(priv, base);
  1366. mode = iwl_read_targ_mem(priv, base + (1 * sizeof(u32)));
  1367. num_wraps = iwl_read_targ_mem(priv, base + (2 * sizeof(u32)));
  1368. next_entry = iwl_read_targ_mem(priv, base + (3 * sizeof(u32)));
  1369. size = num_wraps ? capacity : next_entry;
  1370. /* bail out if nothing in log */
  1371. if (size == 0) {
  1372. IWL_ERR(priv, "Start IWL Event Log Dump: nothing in log\n");
  1373. return;
  1374. }
  1375. IWL_ERR(priv, "Start IWL Event Log Dump: display count %d, wraps %d\n",
  1376. size, num_wraps);
  1377. /* if uCode has wrapped back to top of log, start at the oldest entry,
  1378. * i.e the next one that uCode would fill. */
  1379. if (num_wraps)
  1380. iwl3945_print_event_log(priv, next_entry,
  1381. capacity - next_entry, mode);
  1382. /* (then/else) start at top of log */
  1383. iwl3945_print_event_log(priv, 0, next_entry, mode);
  1384. }
  1385. #else
  1386. void iwl3945_dump_nic_event_log(struct iwl_priv *priv)
  1387. {
  1388. }
  1389. void iwl3945_dump_nic_error_log(struct iwl_priv *priv)
  1390. {
  1391. }
  1392. #endif
  1393. static void iwl3945_irq_tasklet(struct iwl_priv *priv)
  1394. {
  1395. u32 inta, handled = 0;
  1396. u32 inta_fh;
  1397. unsigned long flags;
  1398. #ifdef CONFIG_IWLWIFI_DEBUG
  1399. u32 inta_mask;
  1400. #endif
  1401. spin_lock_irqsave(&priv->lock, flags);
  1402. /* Ack/clear/reset pending uCode interrupts.
  1403. * Note: Some bits in CSR_INT are "OR" of bits in CSR_FH_INT_STATUS,
  1404. * and will clear only when CSR_FH_INT_STATUS gets cleared. */
  1405. inta = iwl_read32(priv, CSR_INT);
  1406. iwl_write32(priv, CSR_INT, inta);
  1407. /* Ack/clear/reset pending flow-handler (DMA) interrupts.
  1408. * Any new interrupts that happen after this, either while we're
  1409. * in this tasklet, or later, will show up in next ISR/tasklet. */
  1410. inta_fh = iwl_read32(priv, CSR_FH_INT_STATUS);
  1411. iwl_write32(priv, CSR_FH_INT_STATUS, inta_fh);
  1412. #ifdef CONFIG_IWLWIFI_DEBUG
  1413. if (iwl_get_debug_level(priv) & IWL_DL_ISR) {
  1414. /* just for debug */
  1415. inta_mask = iwl_read32(priv, CSR_INT_MASK);
  1416. IWL_DEBUG_ISR(priv, "inta 0x%08x, enabled 0x%08x, fh 0x%08x\n",
  1417. inta, inta_mask, inta_fh);
  1418. }
  1419. #endif
  1420. /* Since CSR_INT and CSR_FH_INT_STATUS reads and clears are not
  1421. * atomic, make sure that inta covers all the interrupts that
  1422. * we've discovered, even if FH interrupt came in just after
  1423. * reading CSR_INT. */
  1424. if (inta_fh & CSR39_FH_INT_RX_MASK)
  1425. inta |= CSR_INT_BIT_FH_RX;
  1426. if (inta_fh & CSR39_FH_INT_TX_MASK)
  1427. inta |= CSR_INT_BIT_FH_TX;
  1428. /* Now service all interrupt bits discovered above. */
  1429. if (inta & CSR_INT_BIT_HW_ERR) {
  1430. IWL_ERR(priv, "Hardware error detected. Restarting.\n");
  1431. /* Tell the device to stop sending interrupts */
  1432. iwl_disable_interrupts(priv);
  1433. priv->isr_stats.hw++;
  1434. iwl_irq_handle_error(priv);
  1435. handled |= CSR_INT_BIT_HW_ERR;
  1436. spin_unlock_irqrestore(&priv->lock, flags);
  1437. return;
  1438. }
  1439. #ifdef CONFIG_IWLWIFI_DEBUG
  1440. if (iwl_get_debug_level(priv) & (IWL_DL_ISR)) {
  1441. /* NIC fires this, but we don't use it, redundant with WAKEUP */
  1442. if (inta & CSR_INT_BIT_SCD) {
  1443. IWL_DEBUG_ISR(priv, "Scheduler finished to transmit "
  1444. "the frame/frames.\n");
  1445. priv->isr_stats.sch++;
  1446. }
  1447. /* Alive notification via Rx interrupt will do the real work */
  1448. if (inta & CSR_INT_BIT_ALIVE) {
  1449. IWL_DEBUG_ISR(priv, "Alive interrupt\n");
  1450. priv->isr_stats.alive++;
  1451. }
  1452. }
  1453. #endif
  1454. /* Safely ignore these bits for debug checks below */
  1455. inta &= ~(CSR_INT_BIT_SCD | CSR_INT_BIT_ALIVE);
  1456. /* Error detected by uCode */
  1457. if (inta & CSR_INT_BIT_SW_ERR) {
  1458. IWL_ERR(priv, "Microcode SW error detected. "
  1459. "Restarting 0x%X.\n", inta);
  1460. priv->isr_stats.sw++;
  1461. priv->isr_stats.sw_err = inta;
  1462. iwl_irq_handle_error(priv);
  1463. handled |= CSR_INT_BIT_SW_ERR;
  1464. }
  1465. /* uCode wakes up after power-down sleep */
  1466. if (inta & CSR_INT_BIT_WAKEUP) {
  1467. IWL_DEBUG_ISR(priv, "Wakeup interrupt\n");
  1468. iwl_rx_queue_update_write_ptr(priv, &priv->rxq);
  1469. iwl_txq_update_write_ptr(priv, &priv->txq[0]);
  1470. iwl_txq_update_write_ptr(priv, &priv->txq[1]);
  1471. iwl_txq_update_write_ptr(priv, &priv->txq[2]);
  1472. iwl_txq_update_write_ptr(priv, &priv->txq[3]);
  1473. iwl_txq_update_write_ptr(priv, &priv->txq[4]);
  1474. iwl_txq_update_write_ptr(priv, &priv->txq[5]);
  1475. priv->isr_stats.wakeup++;
  1476. handled |= CSR_INT_BIT_WAKEUP;
  1477. }
  1478. /* All uCode command responses, including Tx command responses,
  1479. * Rx "responses" (frame-received notification), and other
  1480. * notifications from uCode come through here*/
  1481. if (inta & (CSR_INT_BIT_FH_RX | CSR_INT_BIT_SW_RX)) {
  1482. iwl3945_rx_handle(priv);
  1483. priv->isr_stats.rx++;
  1484. handled |= (CSR_INT_BIT_FH_RX | CSR_INT_BIT_SW_RX);
  1485. }
  1486. if (inta & CSR_INT_BIT_FH_TX) {
  1487. IWL_DEBUG_ISR(priv, "Tx interrupt\n");
  1488. priv->isr_stats.tx++;
  1489. iwl_write32(priv, CSR_FH_INT_STATUS, (1 << 6));
  1490. iwl_write_direct32(priv, FH39_TCSR_CREDIT
  1491. (FH39_SRVC_CHNL), 0x0);
  1492. handled |= CSR_INT_BIT_FH_TX;
  1493. }
  1494. if (inta & ~handled) {
  1495. IWL_ERR(priv, "Unhandled INTA bits 0x%08x\n", inta & ~handled);
  1496. priv->isr_stats.unhandled++;
  1497. }
  1498. if (inta & ~priv->inta_mask) {
  1499. IWL_WARN(priv, "Disabled INTA bits 0x%08x were pending\n",
  1500. inta & ~priv->inta_mask);
  1501. IWL_WARN(priv, " with FH_INT = 0x%08x\n", inta_fh);
  1502. }
  1503. /* Re-enable all interrupts */
  1504. /* only Re-enable if disabled by irq */
  1505. if (test_bit(STATUS_INT_ENABLED, &priv->status))
  1506. iwl_enable_interrupts(priv);
  1507. #ifdef CONFIG_IWLWIFI_DEBUG
  1508. if (iwl_get_debug_level(priv) & (IWL_DL_ISR)) {
  1509. inta = iwl_read32(priv, CSR_INT);
  1510. inta_mask = iwl_read32(priv, CSR_INT_MASK);
  1511. inta_fh = iwl_read32(priv, CSR_FH_INT_STATUS);
  1512. IWL_DEBUG_ISR(priv, "End inta 0x%08x, enabled 0x%08x, fh 0x%08x, "
  1513. "flags 0x%08lx\n", inta, inta_mask, inta_fh, flags);
  1514. }
  1515. #endif
  1516. spin_unlock_irqrestore(&priv->lock, flags);
  1517. }
  1518. static int iwl3945_get_channels_for_scan(struct iwl_priv *priv,
  1519. enum ieee80211_band band,
  1520. u8 is_active, u8 n_probes,
  1521. struct iwl3945_scan_channel *scan_ch)
  1522. {
  1523. struct ieee80211_channel *chan;
  1524. const struct ieee80211_supported_band *sband;
  1525. const struct iwl_channel_info *ch_info;
  1526. u16 passive_dwell = 0;
  1527. u16 active_dwell = 0;
  1528. int added, i;
  1529. sband = iwl_get_hw_mode(priv, band);
  1530. if (!sband)
  1531. return 0;
  1532. active_dwell = iwl_get_active_dwell_time(priv, band, n_probes);
  1533. passive_dwell = iwl_get_passive_dwell_time(priv, band);
  1534. if (passive_dwell <= active_dwell)
  1535. passive_dwell = active_dwell + 1;
  1536. for (i = 0, added = 0; i < priv->scan_request->n_channels; i++) {
  1537. chan = priv->scan_request->channels[i];
  1538. if (chan->band != band)
  1539. continue;
  1540. scan_ch->channel = chan->hw_value;
  1541. ch_info = iwl_get_channel_info(priv, band, scan_ch->channel);
  1542. if (!is_channel_valid(ch_info)) {
  1543. IWL_DEBUG_SCAN(priv, "Channel %d is INVALID for this band.\n",
  1544. scan_ch->channel);
  1545. continue;
  1546. }
  1547. scan_ch->active_dwell = cpu_to_le16(active_dwell);
  1548. scan_ch->passive_dwell = cpu_to_le16(passive_dwell);
  1549. /* If passive , set up for auto-switch
  1550. * and use long active_dwell time.
  1551. */
  1552. if (!is_active || is_channel_passive(ch_info) ||
  1553. (chan->flags & IEEE80211_CHAN_PASSIVE_SCAN)) {
  1554. scan_ch->type = 0; /* passive */
  1555. if (IWL_UCODE_API(priv->ucode_ver) == 1)
  1556. scan_ch->active_dwell = cpu_to_le16(passive_dwell - 1);
  1557. } else {
  1558. scan_ch->type = 1; /* active */
  1559. }
  1560. /* Set direct probe bits. These may be used both for active
  1561. * scan channels (probes gets sent right away),
  1562. * or for passive channels (probes get se sent only after
  1563. * hearing clear Rx packet).*/
  1564. if (IWL_UCODE_API(priv->ucode_ver) >= 2) {
  1565. if (n_probes)
  1566. scan_ch->type |= IWL39_SCAN_PROBE_MASK(n_probes);
  1567. } else {
  1568. /* uCode v1 does not allow setting direct probe bits on
  1569. * passive channel. */
  1570. if ((scan_ch->type & 1) && n_probes)
  1571. scan_ch->type |= IWL39_SCAN_PROBE_MASK(n_probes);
  1572. }
  1573. /* Set txpower levels to defaults */
  1574. scan_ch->tpc.dsp_atten = 110;
  1575. /* scan_pwr_info->tpc.dsp_atten; */
  1576. /*scan_pwr_info->tpc.tx_gain; */
  1577. if (band == IEEE80211_BAND_5GHZ)
  1578. scan_ch->tpc.tx_gain = ((1 << 5) | (3 << 3)) | 3;
  1579. else {
  1580. scan_ch->tpc.tx_gain = ((1 << 5) | (5 << 3));
  1581. /* NOTE: if we were doing 6Mb OFDM for scans we'd use
  1582. * power level:
  1583. * scan_ch->tpc.tx_gain = ((1 << 5) | (2 << 3)) | 3;
  1584. */
  1585. }
  1586. IWL_DEBUG_SCAN(priv, "Scanning %d [%s %d]\n",
  1587. scan_ch->channel,
  1588. (scan_ch->type & 1) ? "ACTIVE" : "PASSIVE",
  1589. (scan_ch->type & 1) ?
  1590. active_dwell : passive_dwell);
  1591. scan_ch++;
  1592. added++;
  1593. }
  1594. IWL_DEBUG_SCAN(priv, "total channels to scan %d \n", added);
  1595. return added;
  1596. }
  1597. static void iwl3945_init_hw_rates(struct iwl_priv *priv,
  1598. struct ieee80211_rate *rates)
  1599. {
  1600. int i;
  1601. for (i = 0; i < IWL_RATE_COUNT; i++) {
  1602. rates[i].bitrate = iwl3945_rates[i].ieee * 5;
  1603. rates[i].hw_value = i; /* Rate scaling will work on indexes */
  1604. rates[i].hw_value_short = i;
  1605. rates[i].flags = 0;
  1606. if ((i > IWL39_LAST_OFDM_RATE) || (i < IWL_FIRST_OFDM_RATE)) {
  1607. /*
  1608. * If CCK != 1M then set short preamble rate flag.
  1609. */
  1610. rates[i].flags |= (iwl3945_rates[i].plcp == 10) ?
  1611. 0 : IEEE80211_RATE_SHORT_PREAMBLE;
  1612. }
  1613. }
  1614. }
  1615. /******************************************************************************
  1616. *
  1617. * uCode download functions
  1618. *
  1619. ******************************************************************************/
  1620. static void iwl3945_dealloc_ucode_pci(struct iwl_priv *priv)
  1621. {
  1622. iwl_free_fw_desc(priv->pci_dev, &priv->ucode_code);
  1623. iwl_free_fw_desc(priv->pci_dev, &priv->ucode_data);
  1624. iwl_free_fw_desc(priv->pci_dev, &priv->ucode_data_backup);
  1625. iwl_free_fw_desc(priv->pci_dev, &priv->ucode_init);
  1626. iwl_free_fw_desc(priv->pci_dev, &priv->ucode_init_data);
  1627. iwl_free_fw_desc(priv->pci_dev, &priv->ucode_boot);
  1628. }
  1629. /**
  1630. * iwl3945_verify_inst_full - verify runtime uCode image in card vs. host,
  1631. * looking at all data.
  1632. */
  1633. static int iwl3945_verify_inst_full(struct iwl_priv *priv, __le32 *image, u32 len)
  1634. {
  1635. u32 val;
  1636. u32 save_len = len;
  1637. int rc = 0;
  1638. u32 errcnt;
  1639. IWL_DEBUG_INFO(priv, "ucode inst image size is %u\n", len);
  1640. iwl_write_direct32(priv, HBUS_TARG_MEM_RADDR,
  1641. IWL39_RTC_INST_LOWER_BOUND);
  1642. errcnt = 0;
  1643. for (; len > 0; len -= sizeof(u32), image++) {
  1644. /* read data comes through single port, auto-incr addr */
  1645. /* NOTE: Use the debugless read so we don't flood kernel log
  1646. * if IWL_DL_IO is set */
  1647. val = _iwl_read_direct32(priv, HBUS_TARG_MEM_RDAT);
  1648. if (val != le32_to_cpu(*image)) {
  1649. IWL_ERR(priv, "uCode INST section is invalid at "
  1650. "offset 0x%x, is 0x%x, s/b 0x%x\n",
  1651. save_len - len, val, le32_to_cpu(*image));
  1652. rc = -EIO;
  1653. errcnt++;
  1654. if (errcnt >= 20)
  1655. break;
  1656. }
  1657. }
  1658. if (!errcnt)
  1659. IWL_DEBUG_INFO(priv,
  1660. "ucode image in INSTRUCTION memory is good\n");
  1661. return rc;
  1662. }
  1663. /**
  1664. * iwl3945_verify_inst_sparse - verify runtime uCode image in card vs. host,
  1665. * using sample data 100 bytes apart. If these sample points are good,
  1666. * it's a pretty good bet that everything between them is good, too.
  1667. */
  1668. static int iwl3945_verify_inst_sparse(struct iwl_priv *priv, __le32 *image, u32 len)
  1669. {
  1670. u32 val;
  1671. int rc = 0;
  1672. u32 errcnt = 0;
  1673. u32 i;
  1674. IWL_DEBUG_INFO(priv, "ucode inst image size is %u\n", len);
  1675. for (i = 0; i < len; i += 100, image += 100/sizeof(u32)) {
  1676. /* read data comes through single port, auto-incr addr */
  1677. /* NOTE: Use the debugless read so we don't flood kernel log
  1678. * if IWL_DL_IO is set */
  1679. iwl_write_direct32(priv, HBUS_TARG_MEM_RADDR,
  1680. i + IWL39_RTC_INST_LOWER_BOUND);
  1681. val = _iwl_read_direct32(priv, HBUS_TARG_MEM_RDAT);
  1682. if (val != le32_to_cpu(*image)) {
  1683. #if 0 /* Enable this if you want to see details */
  1684. IWL_ERR(priv, "uCode INST section is invalid at "
  1685. "offset 0x%x, is 0x%x, s/b 0x%x\n",
  1686. i, val, *image);
  1687. #endif
  1688. rc = -EIO;
  1689. errcnt++;
  1690. if (errcnt >= 3)
  1691. break;
  1692. }
  1693. }
  1694. return rc;
  1695. }
  1696. /**
  1697. * iwl3945_verify_ucode - determine which instruction image is in SRAM,
  1698. * and verify its contents
  1699. */
  1700. static int iwl3945_verify_ucode(struct iwl_priv *priv)
  1701. {
  1702. __le32 *image;
  1703. u32 len;
  1704. int rc = 0;
  1705. /* Try bootstrap */
  1706. image = (__le32 *)priv->ucode_boot.v_addr;
  1707. len = priv->ucode_boot.len;
  1708. rc = iwl3945_verify_inst_sparse(priv, image, len);
  1709. if (rc == 0) {
  1710. IWL_DEBUG_INFO(priv, "Bootstrap uCode is good in inst SRAM\n");
  1711. return 0;
  1712. }
  1713. /* Try initialize */
  1714. image = (__le32 *)priv->ucode_init.v_addr;
  1715. len = priv->ucode_init.len;
  1716. rc = iwl3945_verify_inst_sparse(priv, image, len);
  1717. if (rc == 0) {
  1718. IWL_DEBUG_INFO(priv, "Initialize uCode is good in inst SRAM\n");
  1719. return 0;
  1720. }
  1721. /* Try runtime/protocol */
  1722. image = (__le32 *)priv->ucode_code.v_addr;
  1723. len = priv->ucode_code.len;
  1724. rc = iwl3945_verify_inst_sparse(priv, image, len);
  1725. if (rc == 0) {
  1726. IWL_DEBUG_INFO(priv, "Runtime uCode is good in inst SRAM\n");
  1727. return 0;
  1728. }
  1729. IWL_ERR(priv, "NO VALID UCODE IMAGE IN INSTRUCTION SRAM!!\n");
  1730. /* Since nothing seems to match, show first several data entries in
  1731. * instruction SRAM, so maybe visual inspection will give a clue.
  1732. * Selection of bootstrap image (vs. other images) is arbitrary. */
  1733. image = (__le32 *)priv->ucode_boot.v_addr;
  1734. len = priv->ucode_boot.len;
  1735. rc = iwl3945_verify_inst_full(priv, image, len);
  1736. return rc;
  1737. }
  1738. static void iwl3945_nic_start(struct iwl_priv *priv)
  1739. {
  1740. /* Remove all resets to allow NIC to operate */
  1741. iwl_write32(priv, CSR_RESET, 0);
  1742. }
  1743. /**
  1744. * iwl3945_read_ucode - Read uCode images from disk file.
  1745. *
  1746. * Copy into buffers for card to fetch via bus-mastering
  1747. */
  1748. static int iwl3945_read_ucode(struct iwl_priv *priv)
  1749. {
  1750. const struct iwl_ucode_header *ucode;
  1751. int ret = -EINVAL, index;
  1752. const struct firmware *ucode_raw;
  1753. /* firmware file name contains uCode/driver compatibility version */
  1754. const char *name_pre = priv->cfg->fw_name_pre;
  1755. const unsigned int api_max = priv->cfg->ucode_api_max;
  1756. const unsigned int api_min = priv->cfg->ucode_api_min;
  1757. char buf[25];
  1758. u8 *src;
  1759. size_t len;
  1760. u32 api_ver, inst_size, data_size, init_size, init_data_size, boot_size;
  1761. /* Ask kernel firmware_class module to get the boot firmware off disk.
  1762. * request_firmware() is synchronous, file is in memory on return. */
  1763. for (index = api_max; index >= api_min; index--) {
  1764. sprintf(buf, "%s%u%s", name_pre, index, ".ucode");
  1765. ret = request_firmware(&ucode_raw, buf, &priv->pci_dev->dev);
  1766. if (ret < 0) {
  1767. IWL_ERR(priv, "%s firmware file req failed: %d\n",
  1768. buf, ret);
  1769. if (ret == -ENOENT)
  1770. continue;
  1771. else
  1772. goto error;
  1773. } else {
  1774. if (index < api_max)
  1775. IWL_ERR(priv, "Loaded firmware %s, "
  1776. "which is deprecated. "
  1777. " Please use API v%u instead.\n",
  1778. buf, api_max);
  1779. IWL_DEBUG_INFO(priv, "Got firmware '%s' file "
  1780. "(%zd bytes) from disk\n",
  1781. buf, ucode_raw->size);
  1782. break;
  1783. }
  1784. }
  1785. if (ret < 0)
  1786. goto error;
  1787. /* Make sure that we got at least our header! */
  1788. if (ucode_raw->size < priv->cfg->ops->ucode->get_header_size(1)) {
  1789. IWL_ERR(priv, "File size way too small!\n");
  1790. ret = -EINVAL;
  1791. goto err_release;
  1792. }
  1793. /* Data from ucode file: header followed by uCode images */
  1794. ucode = (struct iwl_ucode_header *)ucode_raw->data;
  1795. priv->ucode_ver = le32_to_cpu(ucode->ver);
  1796. api_ver = IWL_UCODE_API(priv->ucode_ver);
  1797. inst_size = priv->cfg->ops->ucode->get_inst_size(ucode, api_ver);
  1798. data_size = priv->cfg->ops->ucode->get_data_size(ucode, api_ver);
  1799. init_size = priv->cfg->ops->ucode->get_init_size(ucode, api_ver);
  1800. init_data_size =
  1801. priv->cfg->ops->ucode->get_init_data_size(ucode, api_ver);
  1802. boot_size = priv->cfg->ops->ucode->get_boot_size(ucode, api_ver);
  1803. src = priv->cfg->ops->ucode->get_data(ucode, api_ver);
  1804. /* api_ver should match the api version forming part of the
  1805. * firmware filename ... but we don't check for that and only rely
  1806. * on the API version read from firmware header from here on forward */
  1807. if (api_ver < api_min || api_ver > api_max) {
  1808. IWL_ERR(priv, "Driver unable to support your firmware API. "
  1809. "Driver supports v%u, firmware is v%u.\n",
  1810. api_max, api_ver);
  1811. priv->ucode_ver = 0;
  1812. ret = -EINVAL;
  1813. goto err_release;
  1814. }
  1815. if (api_ver != api_max)
  1816. IWL_ERR(priv, "Firmware has old API version. Expected %u, "
  1817. "got %u. New firmware can be obtained "
  1818. "from http://www.intellinuxwireless.org.\n",
  1819. api_max, api_ver);
  1820. IWL_INFO(priv, "loaded firmware version %u.%u.%u.%u\n",
  1821. IWL_UCODE_MAJOR(priv->ucode_ver),
  1822. IWL_UCODE_MINOR(priv->ucode_ver),
  1823. IWL_UCODE_API(priv->ucode_ver),
  1824. IWL_UCODE_SERIAL(priv->ucode_ver));
  1825. IWL_DEBUG_INFO(priv, "f/w package hdr ucode version raw = 0x%x\n",
  1826. priv->ucode_ver);
  1827. IWL_DEBUG_INFO(priv, "f/w package hdr runtime inst size = %u\n",
  1828. inst_size);
  1829. IWL_DEBUG_INFO(priv, "f/w package hdr runtime data size = %u\n",
  1830. data_size);
  1831. IWL_DEBUG_INFO(priv, "f/w package hdr init inst size = %u\n",
  1832. init_size);
  1833. IWL_DEBUG_INFO(priv, "f/w package hdr init data size = %u\n",
  1834. init_data_size);
  1835. IWL_DEBUG_INFO(priv, "f/w package hdr boot inst size = %u\n",
  1836. boot_size);
  1837. /* Verify size of file vs. image size info in file's header */
  1838. if (ucode_raw->size != priv->cfg->ops->ucode->get_header_size(api_ver) +
  1839. inst_size + data_size + init_size +
  1840. init_data_size + boot_size) {
  1841. IWL_DEBUG_INFO(priv,
  1842. "uCode file size %zd does not match expected size\n",
  1843. ucode_raw->size);
  1844. ret = -EINVAL;
  1845. goto err_release;
  1846. }
  1847. /* Verify that uCode images will fit in card's SRAM */
  1848. if (inst_size > IWL39_MAX_INST_SIZE) {
  1849. IWL_DEBUG_INFO(priv, "uCode instr len %d too large to fit in\n",
  1850. inst_size);
  1851. ret = -EINVAL;
  1852. goto err_release;
  1853. }
  1854. if (data_size > IWL39_MAX_DATA_SIZE) {
  1855. IWL_DEBUG_INFO(priv, "uCode data len %d too large to fit in\n",
  1856. data_size);
  1857. ret = -EINVAL;
  1858. goto err_release;
  1859. }
  1860. if (init_size > IWL39_MAX_INST_SIZE) {
  1861. IWL_DEBUG_INFO(priv,
  1862. "uCode init instr len %d too large to fit in\n",
  1863. init_size);
  1864. ret = -EINVAL;
  1865. goto err_release;
  1866. }
  1867. if (init_data_size > IWL39_MAX_DATA_SIZE) {
  1868. IWL_DEBUG_INFO(priv,
  1869. "uCode init data len %d too large to fit in\n",
  1870. init_data_size);
  1871. ret = -EINVAL;
  1872. goto err_release;
  1873. }
  1874. if (boot_size > IWL39_MAX_BSM_SIZE) {
  1875. IWL_DEBUG_INFO(priv,
  1876. "uCode boot instr len %d too large to fit in\n",
  1877. boot_size);
  1878. ret = -EINVAL;
  1879. goto err_release;
  1880. }
  1881. /* Allocate ucode buffers for card's bus-master loading ... */
  1882. /* Runtime instructions and 2 copies of data:
  1883. * 1) unmodified from disk
  1884. * 2) backup cache for save/restore during power-downs */
  1885. priv->ucode_code.len = inst_size;
  1886. iwl_alloc_fw_desc(priv->pci_dev, &priv->ucode_code);
  1887. priv->ucode_data.len = data_size;
  1888. iwl_alloc_fw_desc(priv->pci_dev, &priv->ucode_data);
  1889. priv->ucode_data_backup.len = data_size;
  1890. iwl_alloc_fw_desc(priv->pci_dev, &priv->ucode_data_backup);
  1891. if (!priv->ucode_code.v_addr || !priv->ucode_data.v_addr ||
  1892. !priv->ucode_data_backup.v_addr)
  1893. goto err_pci_alloc;
  1894. /* Initialization instructions and data */
  1895. if (init_size && init_data_size) {
  1896. priv->ucode_init.len = init_size;
  1897. iwl_alloc_fw_desc(priv->pci_dev, &priv->ucode_init);
  1898. priv->ucode_init_data.len = init_data_size;
  1899. iwl_alloc_fw_desc(priv->pci_dev, &priv->ucode_init_data);
  1900. if (!priv->ucode_init.v_addr || !priv->ucode_init_data.v_addr)
  1901. goto err_pci_alloc;
  1902. }
  1903. /* Bootstrap (instructions only, no data) */
  1904. if (boot_size) {
  1905. priv->ucode_boot.len = boot_size;
  1906. iwl_alloc_fw_desc(priv->pci_dev, &priv->ucode_boot);
  1907. if (!priv->ucode_boot.v_addr)
  1908. goto err_pci_alloc;
  1909. }
  1910. /* Copy images into buffers for card's bus-master reads ... */
  1911. /* Runtime instructions (first block of data in file) */
  1912. len = inst_size;
  1913. IWL_DEBUG_INFO(priv,
  1914. "Copying (but not loading) uCode instr len %zd\n", len);
  1915. memcpy(priv->ucode_code.v_addr, src, len);
  1916. src += len;
  1917. IWL_DEBUG_INFO(priv, "uCode instr buf vaddr = 0x%p, paddr = 0x%08x\n",
  1918. priv->ucode_code.v_addr, (u32)priv->ucode_code.p_addr);
  1919. /* Runtime data (2nd block)
  1920. * NOTE: Copy into backup buffer will be done in iwl3945_up() */
  1921. len = data_size;
  1922. IWL_DEBUG_INFO(priv,
  1923. "Copying (but not loading) uCode data len %zd\n", len);
  1924. memcpy(priv->ucode_data.v_addr, src, len);
  1925. memcpy(priv->ucode_data_backup.v_addr, src, len);
  1926. src += len;
  1927. /* Initialization instructions (3rd block) */
  1928. if (init_size) {
  1929. len = init_size;
  1930. IWL_DEBUG_INFO(priv,
  1931. "Copying (but not loading) init instr len %zd\n", len);
  1932. memcpy(priv->ucode_init.v_addr, src, len);
  1933. src += len;
  1934. }
  1935. /* Initialization data (4th block) */
  1936. if (init_data_size) {
  1937. len = init_data_size;
  1938. IWL_DEBUG_INFO(priv,
  1939. "Copying (but not loading) init data len %zd\n", len);
  1940. memcpy(priv->ucode_init_data.v_addr, src, len);
  1941. src += len;
  1942. }
  1943. /* Bootstrap instructions (5th block) */
  1944. len = boot_size;
  1945. IWL_DEBUG_INFO(priv,
  1946. "Copying (but not loading) boot instr len %zd\n", len);
  1947. memcpy(priv->ucode_boot.v_addr, src, len);
  1948. /* We have our copies now, allow OS release its copies */
  1949. release_firmware(ucode_raw);
  1950. return 0;
  1951. err_pci_alloc:
  1952. IWL_ERR(priv, "failed to allocate pci memory\n");
  1953. ret = -ENOMEM;
  1954. iwl3945_dealloc_ucode_pci(priv);
  1955. err_release:
  1956. release_firmware(ucode_raw);
  1957. error:
  1958. return ret;
  1959. }
  1960. /**
  1961. * iwl3945_set_ucode_ptrs - Set uCode address location
  1962. *
  1963. * Tell initialization uCode where to find runtime uCode.
  1964. *
  1965. * BSM registers initially contain pointers to initialization uCode.
  1966. * We need to replace them to load runtime uCode inst and data,
  1967. * and to save runtime data when powering down.
  1968. */
  1969. static int iwl3945_set_ucode_ptrs(struct iwl_priv *priv)
  1970. {
  1971. dma_addr_t pinst;
  1972. dma_addr_t pdata;
  1973. /* bits 31:0 for 3945 */
  1974. pinst = priv->ucode_code.p_addr;
  1975. pdata = priv->ucode_data_backup.p_addr;
  1976. /* Tell bootstrap uCode where to find image to load */
  1977. iwl_write_prph(priv, BSM_DRAM_INST_PTR_REG, pinst);
  1978. iwl_write_prph(priv, BSM_DRAM_DATA_PTR_REG, pdata);
  1979. iwl_write_prph(priv, BSM_DRAM_DATA_BYTECOUNT_REG,
  1980. priv->ucode_data.len);
  1981. /* Inst byte count must be last to set up, bit 31 signals uCode
  1982. * that all new ptr/size info is in place */
  1983. iwl_write_prph(priv, BSM_DRAM_INST_BYTECOUNT_REG,
  1984. priv->ucode_code.len | BSM_DRAM_INST_LOAD);
  1985. IWL_DEBUG_INFO(priv, "Runtime uCode pointers are set.\n");
  1986. return 0;
  1987. }
  1988. /**
  1989. * iwl3945_init_alive_start - Called after REPLY_ALIVE notification received
  1990. *
  1991. * Called after REPLY_ALIVE notification received from "initialize" uCode.
  1992. *
  1993. * Tell "initialize" uCode to go ahead and load the runtime uCode.
  1994. */
  1995. static void iwl3945_init_alive_start(struct iwl_priv *priv)
  1996. {
  1997. /* Check alive response for "valid" sign from uCode */
  1998. if (priv->card_alive_init.is_valid != UCODE_VALID_OK) {
  1999. /* We had an error bringing up the hardware, so take it
  2000. * all the way back down so we can try again */
  2001. IWL_DEBUG_INFO(priv, "Initialize Alive failed.\n");
  2002. goto restart;
  2003. }
  2004. /* Bootstrap uCode has loaded initialize uCode ... verify inst image.
  2005. * This is a paranoid check, because we would not have gotten the
  2006. * "initialize" alive if code weren't properly loaded. */
  2007. if (iwl3945_verify_ucode(priv)) {
  2008. /* Runtime instruction load was bad;
  2009. * take it all the way back down so we can try again */
  2010. IWL_DEBUG_INFO(priv, "Bad \"initialize\" uCode load.\n");
  2011. goto restart;
  2012. }
  2013. /* Send pointers to protocol/runtime uCode image ... init code will
  2014. * load and launch runtime uCode, which will send us another "Alive"
  2015. * notification. */
  2016. IWL_DEBUG_INFO(priv, "Initialization Alive received.\n");
  2017. if (iwl3945_set_ucode_ptrs(priv)) {
  2018. /* Runtime instruction load won't happen;
  2019. * take it all the way back down so we can try again */
  2020. IWL_DEBUG_INFO(priv, "Couldn't set up uCode pointers.\n");
  2021. goto restart;
  2022. }
  2023. return;
  2024. restart:
  2025. queue_work(priv->workqueue, &priv->restart);
  2026. }
  2027. /**
  2028. * iwl3945_alive_start - called after REPLY_ALIVE notification received
  2029. * from protocol/runtime uCode (initialization uCode's
  2030. * Alive gets handled by iwl3945_init_alive_start()).
  2031. */
  2032. static void iwl3945_alive_start(struct iwl_priv *priv)
  2033. {
  2034. int thermal_spin = 0;
  2035. u32 rfkill;
  2036. IWL_DEBUG_INFO(priv, "Runtime Alive received.\n");
  2037. if (priv->card_alive.is_valid != UCODE_VALID_OK) {
  2038. /* We had an error bringing up the hardware, so take it
  2039. * all the way back down so we can try again */
  2040. IWL_DEBUG_INFO(priv, "Alive failed.\n");
  2041. goto restart;
  2042. }
  2043. /* Initialize uCode has loaded Runtime uCode ... verify inst image.
  2044. * This is a paranoid check, because we would not have gotten the
  2045. * "runtime" alive if code weren't properly loaded. */
  2046. if (iwl3945_verify_ucode(priv)) {
  2047. /* Runtime instruction load was bad;
  2048. * take it all the way back down so we can try again */
  2049. IWL_DEBUG_INFO(priv, "Bad runtime uCode load.\n");
  2050. goto restart;
  2051. }
  2052. iwl_clear_stations_table(priv);
  2053. rfkill = iwl_read_prph(priv, APMG_RFKILL_REG);
  2054. IWL_DEBUG_INFO(priv, "RFKILL status: 0x%x\n", rfkill);
  2055. if (rfkill & 0x1) {
  2056. clear_bit(STATUS_RF_KILL_HW, &priv->status);
  2057. /* if RFKILL is not on, then wait for thermal
  2058. * sensor in adapter to kick in */
  2059. while (iwl3945_hw_get_temperature(priv) == 0) {
  2060. thermal_spin++;
  2061. udelay(10);
  2062. }
  2063. if (thermal_spin)
  2064. IWL_DEBUG_INFO(priv, "Thermal calibration took %dus\n",
  2065. thermal_spin * 10);
  2066. } else
  2067. set_bit(STATUS_RF_KILL_HW, &priv->status);
  2068. /* After the ALIVE response, we can send commands to 3945 uCode */
  2069. set_bit(STATUS_ALIVE, &priv->status);
  2070. if (iwl_is_rfkill(priv))
  2071. return;
  2072. ieee80211_wake_queues(priv->hw);
  2073. priv->active_rate = priv->rates_mask;
  2074. priv->active_rate_basic = priv->rates_mask & IWL_BASIC_RATES_MASK;
  2075. iwl_power_update_mode(priv, false);
  2076. if (iwl_is_associated(priv)) {
  2077. struct iwl3945_rxon_cmd *active_rxon =
  2078. (struct iwl3945_rxon_cmd *)(&priv->active_rxon);
  2079. priv->staging_rxon.filter_flags |= RXON_FILTER_ASSOC_MSK;
  2080. active_rxon->filter_flags &= ~RXON_FILTER_ASSOC_MSK;
  2081. } else {
  2082. /* Initialize our rx_config data */
  2083. iwl_connection_init_rx_config(priv, priv->iw_mode);
  2084. }
  2085. /* Configure Bluetooth device coexistence support */
  2086. iwl_send_bt_config(priv);
  2087. /* Configure the adapter for unassociated operation */
  2088. iwlcore_commit_rxon(priv);
  2089. iwl3945_reg_txpower_periodic(priv);
  2090. iwl3945_led_register(priv);
  2091. IWL_DEBUG_INFO(priv, "ALIVE processing complete.\n");
  2092. set_bit(STATUS_READY, &priv->status);
  2093. wake_up_interruptible(&priv->wait_command_queue);
  2094. /* reassociate for ADHOC mode */
  2095. if (priv->vif && (priv->iw_mode == NL80211_IFTYPE_ADHOC)) {
  2096. struct sk_buff *beacon = ieee80211_beacon_get(priv->hw,
  2097. priv->vif);
  2098. if (beacon)
  2099. iwl_mac_beacon_update(priv->hw, beacon);
  2100. }
  2101. if (test_and_clear_bit(STATUS_MODE_PENDING, &priv->status))
  2102. iwl_set_mode(priv, priv->iw_mode);
  2103. return;
  2104. restart:
  2105. queue_work(priv->workqueue, &priv->restart);
  2106. }
  2107. static void iwl3945_cancel_deferred_work(struct iwl_priv *priv);
  2108. static void __iwl3945_down(struct iwl_priv *priv)
  2109. {
  2110. unsigned long flags;
  2111. int exit_pending = test_bit(STATUS_EXIT_PENDING, &priv->status);
  2112. struct ieee80211_conf *conf = NULL;
  2113. IWL_DEBUG_INFO(priv, DRV_NAME " is going down\n");
  2114. conf = ieee80211_get_hw_conf(priv->hw);
  2115. if (!exit_pending)
  2116. set_bit(STATUS_EXIT_PENDING, &priv->status);
  2117. iwl3945_led_unregister(priv);
  2118. iwl_clear_stations_table(priv);
  2119. /* Unblock any waiting calls */
  2120. wake_up_interruptible_all(&priv->wait_command_queue);
  2121. /* Wipe out the EXIT_PENDING status bit if we are not actually
  2122. * exiting the module */
  2123. if (!exit_pending)
  2124. clear_bit(STATUS_EXIT_PENDING, &priv->status);
  2125. /* stop and reset the on-board processor */
  2126. iwl_write32(priv, CSR_RESET, CSR_RESET_REG_FLAG_NEVO_RESET);
  2127. /* tell the device to stop sending interrupts */
  2128. spin_lock_irqsave(&priv->lock, flags);
  2129. iwl_disable_interrupts(priv);
  2130. spin_unlock_irqrestore(&priv->lock, flags);
  2131. iwl_synchronize_irq(priv);
  2132. if (priv->mac80211_registered)
  2133. ieee80211_stop_queues(priv->hw);
  2134. /* If we have not previously called iwl3945_init() then
  2135. * clear all bits but the RF Kill bits and return */
  2136. if (!iwl_is_init(priv)) {
  2137. priv->status = test_bit(STATUS_RF_KILL_HW, &priv->status) <<
  2138. STATUS_RF_KILL_HW |
  2139. test_bit(STATUS_GEO_CONFIGURED, &priv->status) <<
  2140. STATUS_GEO_CONFIGURED |
  2141. test_bit(STATUS_EXIT_PENDING, &priv->status) <<
  2142. STATUS_EXIT_PENDING;
  2143. goto exit;
  2144. }
  2145. /* ...otherwise clear out all the status bits but the RF Kill
  2146. * bit and continue taking the NIC down. */
  2147. priv->status &= test_bit(STATUS_RF_KILL_HW, &priv->status) <<
  2148. STATUS_RF_KILL_HW |
  2149. test_bit(STATUS_GEO_CONFIGURED, &priv->status) <<
  2150. STATUS_GEO_CONFIGURED |
  2151. test_bit(STATUS_FW_ERROR, &priv->status) <<
  2152. STATUS_FW_ERROR |
  2153. test_bit(STATUS_EXIT_PENDING, &priv->status) <<
  2154. STATUS_EXIT_PENDING;
  2155. priv->cfg->ops->lib->apm_ops.reset(priv);
  2156. spin_lock_irqsave(&priv->lock, flags);
  2157. iwl_clear_bit(priv, CSR_GP_CNTRL, CSR_GP_CNTRL_REG_FLAG_MAC_ACCESS_REQ);
  2158. spin_unlock_irqrestore(&priv->lock, flags);
  2159. iwl3945_hw_txq_ctx_stop(priv);
  2160. iwl3945_hw_rxq_stop(priv);
  2161. iwl_write_prph(priv, APMG_CLK_DIS_REG,
  2162. APMG_CLK_VAL_DMA_CLK_RQT);
  2163. udelay(5);
  2164. if (exit_pending)
  2165. priv->cfg->ops->lib->apm_ops.stop(priv);
  2166. else
  2167. priv->cfg->ops->lib->apm_ops.reset(priv);
  2168. exit:
  2169. memset(&priv->card_alive, 0, sizeof(struct iwl_alive_resp));
  2170. if (priv->ibss_beacon)
  2171. dev_kfree_skb(priv->ibss_beacon);
  2172. priv->ibss_beacon = NULL;
  2173. /* clear out any free frames */
  2174. iwl3945_clear_free_frames(priv);
  2175. }
  2176. static void iwl3945_down(struct iwl_priv *priv)
  2177. {
  2178. mutex_lock(&priv->mutex);
  2179. __iwl3945_down(priv);
  2180. mutex_unlock(&priv->mutex);
  2181. iwl3945_cancel_deferred_work(priv);
  2182. }
  2183. #define MAX_HW_RESTARTS 5
  2184. static int __iwl3945_up(struct iwl_priv *priv)
  2185. {
  2186. int rc, i;
  2187. if (test_bit(STATUS_EXIT_PENDING, &priv->status)) {
  2188. IWL_WARN(priv, "Exit pending; will not bring the NIC up\n");
  2189. return -EIO;
  2190. }
  2191. if (!priv->ucode_data_backup.v_addr || !priv->ucode_data.v_addr) {
  2192. IWL_ERR(priv, "ucode not available for device bring up\n");
  2193. return -EIO;
  2194. }
  2195. /* If platform's RF_KILL switch is NOT set to KILL */
  2196. if (iwl_read32(priv, CSR_GP_CNTRL) &
  2197. CSR_GP_CNTRL_REG_FLAG_HW_RF_KILL_SW)
  2198. clear_bit(STATUS_RF_KILL_HW, &priv->status);
  2199. else {
  2200. set_bit(STATUS_RF_KILL_HW, &priv->status);
  2201. IWL_WARN(priv, "Radio disabled by HW RF Kill switch\n");
  2202. return -ENODEV;
  2203. }
  2204. iwl_write32(priv, CSR_INT, 0xFFFFFFFF);
  2205. rc = iwl3945_hw_nic_init(priv);
  2206. if (rc) {
  2207. IWL_ERR(priv, "Unable to int nic\n");
  2208. return rc;
  2209. }
  2210. /* make sure rfkill handshake bits are cleared */
  2211. iwl_write32(priv, CSR_UCODE_DRV_GP1_CLR, CSR_UCODE_SW_BIT_RFKILL);
  2212. iwl_write32(priv, CSR_UCODE_DRV_GP1_CLR,
  2213. CSR_UCODE_DRV_GP1_BIT_CMD_BLOCKED);
  2214. /* clear (again), then enable host interrupts */
  2215. iwl_write32(priv, CSR_INT, 0xFFFFFFFF);
  2216. iwl_enable_interrupts(priv);
  2217. /* really make sure rfkill handshake bits are cleared */
  2218. iwl_write32(priv, CSR_UCODE_DRV_GP1_CLR, CSR_UCODE_SW_BIT_RFKILL);
  2219. iwl_write32(priv, CSR_UCODE_DRV_GP1_CLR, CSR_UCODE_SW_BIT_RFKILL);
  2220. /* Copy original ucode data image from disk into backup cache.
  2221. * This will be used to initialize the on-board processor's
  2222. * data SRAM for a clean start when the runtime program first loads. */
  2223. memcpy(priv->ucode_data_backup.v_addr, priv->ucode_data.v_addr,
  2224. priv->ucode_data.len);
  2225. /* We return success when we resume from suspend and rf_kill is on. */
  2226. if (test_bit(STATUS_RF_KILL_HW, &priv->status))
  2227. return 0;
  2228. for (i = 0; i < MAX_HW_RESTARTS; i++) {
  2229. iwl_clear_stations_table(priv);
  2230. /* load bootstrap state machine,
  2231. * load bootstrap program into processor's memory,
  2232. * prepare to load the "initialize" uCode */
  2233. priv->cfg->ops->lib->load_ucode(priv);
  2234. if (rc) {
  2235. IWL_ERR(priv,
  2236. "Unable to set up bootstrap uCode: %d\n", rc);
  2237. continue;
  2238. }
  2239. /* start card; "initialize" will load runtime ucode */
  2240. iwl3945_nic_start(priv);
  2241. IWL_DEBUG_INFO(priv, DRV_NAME " is coming up\n");
  2242. return 0;
  2243. }
  2244. set_bit(STATUS_EXIT_PENDING, &priv->status);
  2245. __iwl3945_down(priv);
  2246. clear_bit(STATUS_EXIT_PENDING, &priv->status);
  2247. /* tried to restart and config the device for as long as our
  2248. * patience could withstand */
  2249. IWL_ERR(priv, "Unable to initialize device after %d attempts.\n", i);
  2250. return -EIO;
  2251. }
  2252. /*****************************************************************************
  2253. *
  2254. * Workqueue callbacks
  2255. *
  2256. *****************************************************************************/
  2257. static void iwl3945_bg_init_alive_start(struct work_struct *data)
  2258. {
  2259. struct iwl_priv *priv =
  2260. container_of(data, struct iwl_priv, init_alive_start.work);
  2261. if (test_bit(STATUS_EXIT_PENDING, &priv->status))
  2262. return;
  2263. mutex_lock(&priv->mutex);
  2264. iwl3945_init_alive_start(priv);
  2265. mutex_unlock(&priv->mutex);
  2266. }
  2267. static void iwl3945_bg_alive_start(struct work_struct *data)
  2268. {
  2269. struct iwl_priv *priv =
  2270. container_of(data, struct iwl_priv, alive_start.work);
  2271. if (test_bit(STATUS_EXIT_PENDING, &priv->status))
  2272. return;
  2273. mutex_lock(&priv->mutex);
  2274. iwl3945_alive_start(priv);
  2275. mutex_unlock(&priv->mutex);
  2276. }
  2277. static void iwl3945_rfkill_poll(struct work_struct *data)
  2278. {
  2279. struct iwl_priv *priv =
  2280. container_of(data, struct iwl_priv, rfkill_poll.work);
  2281. if (iwl_read32(priv, CSR_GP_CNTRL) & CSR_GP_CNTRL_REG_FLAG_HW_RF_KILL_SW)
  2282. clear_bit(STATUS_RF_KILL_HW, &priv->status);
  2283. else
  2284. set_bit(STATUS_RF_KILL_HW, &priv->status);
  2285. wiphy_rfkill_set_hw_state(priv->hw->wiphy,
  2286. test_bit(STATUS_RF_KILL_HW, &priv->status));
  2287. queue_delayed_work(priv->workqueue, &priv->rfkill_poll,
  2288. round_jiffies_relative(2 * HZ));
  2289. }
  2290. #define IWL_SCAN_CHECK_WATCHDOG (7 * HZ)
  2291. static void iwl3945_bg_request_scan(struct work_struct *data)
  2292. {
  2293. struct iwl_priv *priv =
  2294. container_of(data, struct iwl_priv, request_scan);
  2295. struct iwl_host_cmd cmd = {
  2296. .id = REPLY_SCAN_CMD,
  2297. .len = sizeof(struct iwl3945_scan_cmd),
  2298. .flags = CMD_SIZE_HUGE,
  2299. };
  2300. int rc = 0;
  2301. struct iwl3945_scan_cmd *scan;
  2302. struct ieee80211_conf *conf = NULL;
  2303. u8 n_probes = 0;
  2304. enum ieee80211_band band;
  2305. bool is_active = false;
  2306. conf = ieee80211_get_hw_conf(priv->hw);
  2307. mutex_lock(&priv->mutex);
  2308. cancel_delayed_work(&priv->scan_check);
  2309. if (!iwl_is_ready(priv)) {
  2310. IWL_WARN(priv, "request scan called when driver not ready.\n");
  2311. goto done;
  2312. }
  2313. /* Make sure the scan wasn't canceled before this queued work
  2314. * was given the chance to run... */
  2315. if (!test_bit(STATUS_SCANNING, &priv->status))
  2316. goto done;
  2317. /* This should never be called or scheduled if there is currently
  2318. * a scan active in the hardware. */
  2319. if (test_bit(STATUS_SCAN_HW, &priv->status)) {
  2320. IWL_DEBUG_INFO(priv, "Multiple concurrent scan requests "
  2321. "Ignoring second request.\n");
  2322. rc = -EIO;
  2323. goto done;
  2324. }
  2325. if (test_bit(STATUS_EXIT_PENDING, &priv->status)) {
  2326. IWL_DEBUG_SCAN(priv, "Aborting scan due to device shutdown\n");
  2327. goto done;
  2328. }
  2329. if (test_bit(STATUS_SCAN_ABORTING, &priv->status)) {
  2330. IWL_DEBUG_HC(priv,
  2331. "Scan request while abort pending. Queuing.\n");
  2332. goto done;
  2333. }
  2334. if (iwl_is_rfkill(priv)) {
  2335. IWL_DEBUG_HC(priv, "Aborting scan due to RF Kill activation\n");
  2336. goto done;
  2337. }
  2338. if (!test_bit(STATUS_READY, &priv->status)) {
  2339. IWL_DEBUG_HC(priv,
  2340. "Scan request while uninitialized. Queuing.\n");
  2341. goto done;
  2342. }
  2343. if (!priv->scan_bands) {
  2344. IWL_DEBUG_HC(priv, "Aborting scan due to no requested bands\n");
  2345. goto done;
  2346. }
  2347. if (!priv->scan) {
  2348. priv->scan = kmalloc(sizeof(struct iwl3945_scan_cmd) +
  2349. IWL_MAX_SCAN_SIZE, GFP_KERNEL);
  2350. if (!priv->scan) {
  2351. rc = -ENOMEM;
  2352. goto done;
  2353. }
  2354. }
  2355. scan = priv->scan;
  2356. memset(scan, 0, sizeof(struct iwl3945_scan_cmd) + IWL_MAX_SCAN_SIZE);
  2357. scan->quiet_plcp_th = IWL_PLCP_QUIET_THRESH;
  2358. scan->quiet_time = IWL_ACTIVE_QUIET_TIME;
  2359. if (iwl_is_associated(priv)) {
  2360. u16 interval = 0;
  2361. u32 extra;
  2362. u32 suspend_time = 100;
  2363. u32 scan_suspend_time = 100;
  2364. unsigned long flags;
  2365. IWL_DEBUG_INFO(priv, "Scanning while associated...\n");
  2366. spin_lock_irqsave(&priv->lock, flags);
  2367. interval = priv->beacon_int;
  2368. spin_unlock_irqrestore(&priv->lock, flags);
  2369. scan->suspend_time = 0;
  2370. scan->max_out_time = cpu_to_le32(200 * 1024);
  2371. if (!interval)
  2372. interval = suspend_time;
  2373. /*
  2374. * suspend time format:
  2375. * 0-19: beacon interval in usec (time before exec.)
  2376. * 20-23: 0
  2377. * 24-31: number of beacons (suspend between channels)
  2378. */
  2379. extra = (suspend_time / interval) << 24;
  2380. scan_suspend_time = 0xFF0FFFFF &
  2381. (extra | ((suspend_time % interval) * 1024));
  2382. scan->suspend_time = cpu_to_le32(scan_suspend_time);
  2383. IWL_DEBUG_SCAN(priv, "suspend_time 0x%X beacon interval %d\n",
  2384. scan_suspend_time, interval);
  2385. }
  2386. if (priv->scan_request->n_ssids) {
  2387. int i, p = 0;
  2388. IWL_DEBUG_SCAN(priv, "Kicking off active scan\n");
  2389. for (i = 0; i < priv->scan_request->n_ssids; i++) {
  2390. /* always does wildcard anyway */
  2391. if (!priv->scan_request->ssids[i].ssid_len)
  2392. continue;
  2393. scan->direct_scan[p].id = WLAN_EID_SSID;
  2394. scan->direct_scan[p].len =
  2395. priv->scan_request->ssids[i].ssid_len;
  2396. memcpy(scan->direct_scan[p].ssid,
  2397. priv->scan_request->ssids[i].ssid,
  2398. priv->scan_request->ssids[i].ssid_len);
  2399. n_probes++;
  2400. p++;
  2401. }
  2402. is_active = true;
  2403. } else
  2404. IWL_DEBUG_SCAN(priv, "Kicking off passive scan.\n");
  2405. /* We don't build a direct scan probe request; the uCode will do
  2406. * that based on the direct_mask added to each channel entry */
  2407. scan->tx_cmd.tx_flags = TX_CMD_FLG_SEQ_CTL_MSK;
  2408. scan->tx_cmd.sta_id = priv->hw_params.bcast_sta_id;
  2409. scan->tx_cmd.stop_time.life_time = TX_CMD_LIFE_TIME_INFINITE;
  2410. /* flags + rate selection */
  2411. if (priv->scan_bands & BIT(IEEE80211_BAND_2GHZ)) {
  2412. scan->flags = RXON_FLG_BAND_24G_MSK | RXON_FLG_AUTO_DETECT_MSK;
  2413. scan->tx_cmd.rate = IWL_RATE_1M_PLCP;
  2414. scan->good_CRC_th = 0;
  2415. band = IEEE80211_BAND_2GHZ;
  2416. } else if (priv->scan_bands & BIT(IEEE80211_BAND_5GHZ)) {
  2417. scan->tx_cmd.rate = IWL_RATE_6M_PLCP;
  2418. /*
  2419. * If active scaning is requested but a certain channel
  2420. * is marked passive, we can do active scanning if we
  2421. * detect transmissions.
  2422. */
  2423. scan->good_CRC_th = is_active ? IWL_GOOD_CRC_TH : 0;
  2424. band = IEEE80211_BAND_5GHZ;
  2425. } else {
  2426. IWL_WARN(priv, "Invalid scan band count\n");
  2427. goto done;
  2428. }
  2429. scan->tx_cmd.len = cpu_to_le16(
  2430. iwl_fill_probe_req(priv,
  2431. (struct ieee80211_mgmt *)scan->data,
  2432. priv->scan_request->ie,
  2433. priv->scan_request->ie_len,
  2434. IWL_MAX_SCAN_SIZE - sizeof(*scan)));
  2435. /* select Rx antennas */
  2436. scan->flags |= iwl3945_get_antenna_flags(priv);
  2437. if (iwl_is_monitor_mode(priv))
  2438. scan->filter_flags = RXON_FILTER_PROMISC_MSK;
  2439. scan->channel_count =
  2440. iwl3945_get_channels_for_scan(priv, band, is_active, n_probes,
  2441. (void *)&scan->data[le16_to_cpu(scan->tx_cmd.len)]);
  2442. if (scan->channel_count == 0) {
  2443. IWL_DEBUG_SCAN(priv, "channel count %d\n", scan->channel_count);
  2444. goto done;
  2445. }
  2446. cmd.len += le16_to_cpu(scan->tx_cmd.len) +
  2447. scan->channel_count * sizeof(struct iwl3945_scan_channel);
  2448. cmd.data = scan;
  2449. scan->len = cpu_to_le16(cmd.len);
  2450. set_bit(STATUS_SCAN_HW, &priv->status);
  2451. rc = iwl_send_cmd_sync(priv, &cmd);
  2452. if (rc)
  2453. goto done;
  2454. queue_delayed_work(priv->workqueue, &priv->scan_check,
  2455. IWL_SCAN_CHECK_WATCHDOG);
  2456. mutex_unlock(&priv->mutex);
  2457. return;
  2458. done:
  2459. /* can not perform scan make sure we clear scanning
  2460. * bits from status so next scan request can be performed.
  2461. * if we dont clear scanning status bit here all next scan
  2462. * will fail
  2463. */
  2464. clear_bit(STATUS_SCAN_HW, &priv->status);
  2465. clear_bit(STATUS_SCANNING, &priv->status);
  2466. /* inform mac80211 scan aborted */
  2467. queue_work(priv->workqueue, &priv->scan_completed);
  2468. mutex_unlock(&priv->mutex);
  2469. }
  2470. static void iwl3945_bg_up(struct work_struct *data)
  2471. {
  2472. struct iwl_priv *priv = container_of(data, struct iwl_priv, up);
  2473. if (test_bit(STATUS_EXIT_PENDING, &priv->status))
  2474. return;
  2475. mutex_lock(&priv->mutex);
  2476. __iwl3945_up(priv);
  2477. mutex_unlock(&priv->mutex);
  2478. }
  2479. static void iwl3945_bg_restart(struct work_struct *data)
  2480. {
  2481. struct iwl_priv *priv = container_of(data, struct iwl_priv, restart);
  2482. if (test_bit(STATUS_EXIT_PENDING, &priv->status))
  2483. return;
  2484. if (test_and_clear_bit(STATUS_FW_ERROR, &priv->status)) {
  2485. mutex_lock(&priv->mutex);
  2486. priv->vif = NULL;
  2487. priv->is_open = 0;
  2488. mutex_unlock(&priv->mutex);
  2489. iwl3945_down(priv);
  2490. ieee80211_restart_hw(priv->hw);
  2491. } else {
  2492. iwl3945_down(priv);
  2493. queue_work(priv->workqueue, &priv->up);
  2494. }
  2495. }
  2496. static void iwl3945_bg_rx_replenish(struct work_struct *data)
  2497. {
  2498. struct iwl_priv *priv =
  2499. container_of(data, struct iwl_priv, rx_replenish);
  2500. if (test_bit(STATUS_EXIT_PENDING, &priv->status))
  2501. return;
  2502. mutex_lock(&priv->mutex);
  2503. iwl3945_rx_replenish(priv);
  2504. mutex_unlock(&priv->mutex);
  2505. }
  2506. #define IWL_DELAY_NEXT_SCAN (HZ*2)
  2507. void iwl3945_post_associate(struct iwl_priv *priv)
  2508. {
  2509. int rc = 0;
  2510. struct ieee80211_conf *conf = NULL;
  2511. if (priv->iw_mode == NL80211_IFTYPE_AP) {
  2512. IWL_ERR(priv, "%s Should not be called in AP mode\n", __func__);
  2513. return;
  2514. }
  2515. IWL_DEBUG_ASSOC(priv, "Associated as %d to: %pM\n",
  2516. priv->assoc_id, priv->active_rxon.bssid_addr);
  2517. if (test_bit(STATUS_EXIT_PENDING, &priv->status))
  2518. return;
  2519. if (!priv->vif || !priv->is_open)
  2520. return;
  2521. iwl_scan_cancel_timeout(priv, 200);
  2522. conf = ieee80211_get_hw_conf(priv->hw);
  2523. priv->staging_rxon.filter_flags &= ~RXON_FILTER_ASSOC_MSK;
  2524. iwlcore_commit_rxon(priv);
  2525. memset(&priv->rxon_timing, 0, sizeof(struct iwl_rxon_time_cmd));
  2526. iwl_setup_rxon_timing(priv);
  2527. rc = iwl_send_cmd_pdu(priv, REPLY_RXON_TIMING,
  2528. sizeof(priv->rxon_timing), &priv->rxon_timing);
  2529. if (rc)
  2530. IWL_WARN(priv, "REPLY_RXON_TIMING failed - "
  2531. "Attempting to continue.\n");
  2532. priv->staging_rxon.filter_flags |= RXON_FILTER_ASSOC_MSK;
  2533. priv->staging_rxon.assoc_id = cpu_to_le16(priv->assoc_id);
  2534. IWL_DEBUG_ASSOC(priv, "assoc id %d beacon interval %d\n",
  2535. priv->assoc_id, priv->beacon_int);
  2536. if (priv->assoc_capability & WLAN_CAPABILITY_SHORT_PREAMBLE)
  2537. priv->staging_rxon.flags |= RXON_FLG_SHORT_PREAMBLE_MSK;
  2538. else
  2539. priv->staging_rxon.flags &= ~RXON_FLG_SHORT_PREAMBLE_MSK;
  2540. if (priv->staging_rxon.flags & RXON_FLG_BAND_24G_MSK) {
  2541. if (priv->assoc_capability & WLAN_CAPABILITY_SHORT_SLOT_TIME)
  2542. priv->staging_rxon.flags |= RXON_FLG_SHORT_SLOT_MSK;
  2543. else
  2544. priv->staging_rxon.flags &= ~RXON_FLG_SHORT_SLOT_MSK;
  2545. if (priv->iw_mode == NL80211_IFTYPE_ADHOC)
  2546. priv->staging_rxon.flags &= ~RXON_FLG_SHORT_SLOT_MSK;
  2547. }
  2548. iwlcore_commit_rxon(priv);
  2549. switch (priv->iw_mode) {
  2550. case NL80211_IFTYPE_STATION:
  2551. iwl3945_rate_scale_init(priv->hw, IWL_AP_ID);
  2552. break;
  2553. case NL80211_IFTYPE_ADHOC:
  2554. priv->assoc_id = 1;
  2555. iwl_add_station(priv, priv->bssid, 0, CMD_SYNC, NULL);
  2556. iwl3945_sync_sta(priv, IWL_STA_ID,
  2557. (priv->band == IEEE80211_BAND_5GHZ) ?
  2558. IWL_RATE_6M_PLCP : IWL_RATE_1M_PLCP,
  2559. CMD_ASYNC);
  2560. iwl3945_rate_scale_init(priv->hw, IWL_STA_ID);
  2561. iwl3945_send_beacon_cmd(priv);
  2562. break;
  2563. default:
  2564. IWL_ERR(priv, "%s Should not be called in %d mode\n",
  2565. __func__, priv->iw_mode);
  2566. break;
  2567. }
  2568. iwl_activate_qos(priv, 0);
  2569. /* we have just associated, don't start scan too early */
  2570. priv->next_scan_jiffies = jiffies + IWL_DELAY_NEXT_SCAN;
  2571. }
  2572. /*****************************************************************************
  2573. *
  2574. * mac80211 entry point functions
  2575. *
  2576. *****************************************************************************/
  2577. #define UCODE_READY_TIMEOUT (2 * HZ)
  2578. static int iwl3945_mac_start(struct ieee80211_hw *hw)
  2579. {
  2580. struct iwl_priv *priv = hw->priv;
  2581. int ret;
  2582. IWL_DEBUG_MAC80211(priv, "enter\n");
  2583. /* we should be verifying the device is ready to be opened */
  2584. mutex_lock(&priv->mutex);
  2585. /* fetch ucode file from disk, alloc and copy to bus-master buffers ...
  2586. * ucode filename and max sizes are card-specific. */
  2587. if (!priv->ucode_code.len) {
  2588. ret = iwl3945_read_ucode(priv);
  2589. if (ret) {
  2590. IWL_ERR(priv, "Could not read microcode: %d\n", ret);
  2591. mutex_unlock(&priv->mutex);
  2592. goto out_release_irq;
  2593. }
  2594. }
  2595. ret = __iwl3945_up(priv);
  2596. mutex_unlock(&priv->mutex);
  2597. if (ret)
  2598. goto out_release_irq;
  2599. IWL_DEBUG_INFO(priv, "Start UP work.\n");
  2600. /* Wait for START_ALIVE from ucode. Otherwise callbacks from
  2601. * mac80211 will not be run successfully. */
  2602. ret = wait_event_interruptible_timeout(priv->wait_command_queue,
  2603. test_bit(STATUS_READY, &priv->status),
  2604. UCODE_READY_TIMEOUT);
  2605. if (!ret) {
  2606. if (!test_bit(STATUS_READY, &priv->status)) {
  2607. IWL_ERR(priv,
  2608. "Wait for START_ALIVE timeout after %dms.\n",
  2609. jiffies_to_msecs(UCODE_READY_TIMEOUT));
  2610. ret = -ETIMEDOUT;
  2611. goto out_release_irq;
  2612. }
  2613. }
  2614. /* ucode is running and will send rfkill notifications,
  2615. * no need to poll the killswitch state anymore */
  2616. cancel_delayed_work(&priv->rfkill_poll);
  2617. priv->is_open = 1;
  2618. IWL_DEBUG_MAC80211(priv, "leave\n");
  2619. return 0;
  2620. out_release_irq:
  2621. priv->is_open = 0;
  2622. IWL_DEBUG_MAC80211(priv, "leave - failed\n");
  2623. return ret;
  2624. }
  2625. static void iwl3945_mac_stop(struct ieee80211_hw *hw)
  2626. {
  2627. struct iwl_priv *priv = hw->priv;
  2628. IWL_DEBUG_MAC80211(priv, "enter\n");
  2629. if (!priv->is_open) {
  2630. IWL_DEBUG_MAC80211(priv, "leave - skip\n");
  2631. return;
  2632. }
  2633. priv->is_open = 0;
  2634. if (iwl_is_ready_rf(priv)) {
  2635. /* stop mac, cancel any scan request and clear
  2636. * RXON_FILTER_ASSOC_MSK BIT
  2637. */
  2638. mutex_lock(&priv->mutex);
  2639. iwl_scan_cancel_timeout(priv, 100);
  2640. mutex_unlock(&priv->mutex);
  2641. }
  2642. iwl3945_down(priv);
  2643. flush_workqueue(priv->workqueue);
  2644. /* start polling the killswitch state again */
  2645. queue_delayed_work(priv->workqueue, &priv->rfkill_poll,
  2646. round_jiffies_relative(2 * HZ));
  2647. IWL_DEBUG_MAC80211(priv, "leave\n");
  2648. }
  2649. static int iwl3945_mac_tx(struct ieee80211_hw *hw, struct sk_buff *skb)
  2650. {
  2651. struct iwl_priv *priv = hw->priv;
  2652. IWL_DEBUG_MAC80211(priv, "enter\n");
  2653. IWL_DEBUG_TX(priv, "dev->xmit(%d bytes) at rate 0x%02x\n", skb->len,
  2654. ieee80211_get_tx_rate(hw, IEEE80211_SKB_CB(skb))->bitrate);
  2655. if (iwl3945_tx_skb(priv, skb))
  2656. dev_kfree_skb_any(skb);
  2657. IWL_DEBUG_MAC80211(priv, "leave\n");
  2658. return NETDEV_TX_OK;
  2659. }
  2660. void iwl3945_config_ap(struct iwl_priv *priv)
  2661. {
  2662. int rc = 0;
  2663. if (test_bit(STATUS_EXIT_PENDING, &priv->status))
  2664. return;
  2665. /* The following should be done only at AP bring up */
  2666. if (!(iwl_is_associated(priv))) {
  2667. /* RXON - unassoc (to set timing command) */
  2668. priv->staging_rxon.filter_flags &= ~RXON_FILTER_ASSOC_MSK;
  2669. iwlcore_commit_rxon(priv);
  2670. /* RXON Timing */
  2671. memset(&priv->rxon_timing, 0, sizeof(struct iwl_rxon_time_cmd));
  2672. iwl_setup_rxon_timing(priv);
  2673. rc = iwl_send_cmd_pdu(priv, REPLY_RXON_TIMING,
  2674. sizeof(priv->rxon_timing),
  2675. &priv->rxon_timing);
  2676. if (rc)
  2677. IWL_WARN(priv, "REPLY_RXON_TIMING failed - "
  2678. "Attempting to continue.\n");
  2679. /* FIXME: what should be the assoc_id for AP? */
  2680. priv->staging_rxon.assoc_id = cpu_to_le16(priv->assoc_id);
  2681. if (priv->assoc_capability & WLAN_CAPABILITY_SHORT_PREAMBLE)
  2682. priv->staging_rxon.flags |=
  2683. RXON_FLG_SHORT_PREAMBLE_MSK;
  2684. else
  2685. priv->staging_rxon.flags &=
  2686. ~RXON_FLG_SHORT_PREAMBLE_MSK;
  2687. if (priv->staging_rxon.flags & RXON_FLG_BAND_24G_MSK) {
  2688. if (priv->assoc_capability &
  2689. WLAN_CAPABILITY_SHORT_SLOT_TIME)
  2690. priv->staging_rxon.flags |=
  2691. RXON_FLG_SHORT_SLOT_MSK;
  2692. else
  2693. priv->staging_rxon.flags &=
  2694. ~RXON_FLG_SHORT_SLOT_MSK;
  2695. if (priv->iw_mode == NL80211_IFTYPE_ADHOC)
  2696. priv->staging_rxon.flags &=
  2697. ~RXON_FLG_SHORT_SLOT_MSK;
  2698. }
  2699. /* restore RXON assoc */
  2700. priv->staging_rxon.filter_flags |= RXON_FILTER_ASSOC_MSK;
  2701. iwlcore_commit_rxon(priv);
  2702. iwl_add_station(priv, iwl_bcast_addr, 0, CMD_SYNC, NULL);
  2703. }
  2704. iwl3945_send_beacon_cmd(priv);
  2705. /* FIXME - we need to add code here to detect a totally new
  2706. * configuration, reset the AP, unassoc, rxon timing, assoc,
  2707. * clear sta table, add BCAST sta... */
  2708. }
  2709. static int iwl3945_mac_set_key(struct ieee80211_hw *hw, enum set_key_cmd cmd,
  2710. struct ieee80211_vif *vif,
  2711. struct ieee80211_sta *sta,
  2712. struct ieee80211_key_conf *key)
  2713. {
  2714. struct iwl_priv *priv = hw->priv;
  2715. const u8 *addr;
  2716. int ret = 0;
  2717. u8 sta_id = IWL_INVALID_STATION;
  2718. u8 static_key;
  2719. IWL_DEBUG_MAC80211(priv, "enter\n");
  2720. if (iwl3945_mod_params.sw_crypto) {
  2721. IWL_DEBUG_MAC80211(priv, "leave - hwcrypto disabled\n");
  2722. return -EOPNOTSUPP;
  2723. }
  2724. addr = sta ? sta->addr : iwl_bcast_addr;
  2725. static_key = !iwl_is_associated(priv);
  2726. if (!static_key) {
  2727. sta_id = iwl_find_station(priv, addr);
  2728. if (sta_id == IWL_INVALID_STATION) {
  2729. IWL_DEBUG_MAC80211(priv, "leave - %pM not in station map.\n",
  2730. addr);
  2731. return -EINVAL;
  2732. }
  2733. }
  2734. mutex_lock(&priv->mutex);
  2735. iwl_scan_cancel_timeout(priv, 100);
  2736. mutex_unlock(&priv->mutex);
  2737. switch (cmd) {
  2738. case SET_KEY:
  2739. if (static_key)
  2740. ret = iwl3945_set_static_key(priv, key);
  2741. else
  2742. ret = iwl3945_set_dynamic_key(priv, key, sta_id);
  2743. IWL_DEBUG_MAC80211(priv, "enable hwcrypto key\n");
  2744. break;
  2745. case DISABLE_KEY:
  2746. if (static_key)
  2747. ret = iwl3945_remove_static_key(priv);
  2748. else
  2749. ret = iwl3945_clear_sta_key_info(priv, sta_id);
  2750. IWL_DEBUG_MAC80211(priv, "disable hwcrypto key\n");
  2751. break;
  2752. default:
  2753. ret = -EINVAL;
  2754. }
  2755. IWL_DEBUG_MAC80211(priv, "leave\n");
  2756. return ret;
  2757. }
  2758. /*****************************************************************************
  2759. *
  2760. * sysfs attributes
  2761. *
  2762. *****************************************************************************/
  2763. #ifdef CONFIG_IWLWIFI_DEBUG
  2764. /*
  2765. * The following adds a new attribute to the sysfs representation
  2766. * of this device driver (i.e. a new file in /sys/bus/pci/drivers/iwl/)
  2767. * used for controlling the debug level.
  2768. *
  2769. * See the level definitions in iwl for details.
  2770. *
  2771. * The debug_level being managed using sysfs below is a per device debug
  2772. * level that is used instead of the global debug level if it (the per
  2773. * device debug level) is set.
  2774. */
  2775. static ssize_t show_debug_level(struct device *d,
  2776. struct device_attribute *attr, char *buf)
  2777. {
  2778. struct iwl_priv *priv = dev_get_drvdata(d);
  2779. return sprintf(buf, "0x%08X\n", iwl_get_debug_level(priv));
  2780. }
  2781. static ssize_t store_debug_level(struct device *d,
  2782. struct device_attribute *attr,
  2783. const char *buf, size_t count)
  2784. {
  2785. struct iwl_priv *priv = dev_get_drvdata(d);
  2786. unsigned long val;
  2787. int ret;
  2788. ret = strict_strtoul(buf, 0, &val);
  2789. if (ret)
  2790. IWL_INFO(priv, "%s is not in hex or decimal form.\n", buf);
  2791. else {
  2792. priv->debug_level = val;
  2793. if (iwl_alloc_traffic_mem(priv))
  2794. IWL_ERR(priv,
  2795. "Not enough memory to generate traffic log\n");
  2796. }
  2797. return strnlen(buf, count);
  2798. }
  2799. static DEVICE_ATTR(debug_level, S_IWUSR | S_IRUGO,
  2800. show_debug_level, store_debug_level);
  2801. #endif /* CONFIG_IWLWIFI_DEBUG */
  2802. static ssize_t show_temperature(struct device *d,
  2803. struct device_attribute *attr, char *buf)
  2804. {
  2805. struct iwl_priv *priv = dev_get_drvdata(d);
  2806. if (!iwl_is_alive(priv))
  2807. return -EAGAIN;
  2808. return sprintf(buf, "%d\n", iwl3945_hw_get_temperature(priv));
  2809. }
  2810. static DEVICE_ATTR(temperature, S_IRUGO, show_temperature, NULL);
  2811. static ssize_t show_tx_power(struct device *d,
  2812. struct device_attribute *attr, char *buf)
  2813. {
  2814. struct iwl_priv *priv = dev_get_drvdata(d);
  2815. return sprintf(buf, "%d\n", priv->tx_power_user_lmt);
  2816. }
  2817. static ssize_t store_tx_power(struct device *d,
  2818. struct device_attribute *attr,
  2819. const char *buf, size_t count)
  2820. {
  2821. struct iwl_priv *priv = dev_get_drvdata(d);
  2822. char *p = (char *)buf;
  2823. u32 val;
  2824. val = simple_strtoul(p, &p, 10);
  2825. if (p == buf)
  2826. IWL_INFO(priv, ": %s is not in decimal form.\n", buf);
  2827. else
  2828. iwl3945_hw_reg_set_txpower(priv, val);
  2829. return count;
  2830. }
  2831. static DEVICE_ATTR(tx_power, S_IWUSR | S_IRUGO, show_tx_power, store_tx_power);
  2832. static ssize_t show_flags(struct device *d,
  2833. struct device_attribute *attr, char *buf)
  2834. {
  2835. struct iwl_priv *priv = dev_get_drvdata(d);
  2836. return sprintf(buf, "0x%04X\n", priv->active_rxon.flags);
  2837. }
  2838. static ssize_t store_flags(struct device *d,
  2839. struct device_attribute *attr,
  2840. const char *buf, size_t count)
  2841. {
  2842. struct iwl_priv *priv = dev_get_drvdata(d);
  2843. u32 flags = simple_strtoul(buf, NULL, 0);
  2844. mutex_lock(&priv->mutex);
  2845. if (le32_to_cpu(priv->staging_rxon.flags) != flags) {
  2846. /* Cancel any currently running scans... */
  2847. if (iwl_scan_cancel_timeout(priv, 100))
  2848. IWL_WARN(priv, "Could not cancel scan.\n");
  2849. else {
  2850. IWL_DEBUG_INFO(priv, "Committing rxon.flags = 0x%04X\n",
  2851. flags);
  2852. priv->staging_rxon.flags = cpu_to_le32(flags);
  2853. iwlcore_commit_rxon(priv);
  2854. }
  2855. }
  2856. mutex_unlock(&priv->mutex);
  2857. return count;
  2858. }
  2859. static DEVICE_ATTR(flags, S_IWUSR | S_IRUGO, show_flags, store_flags);
  2860. static ssize_t show_filter_flags(struct device *d,
  2861. struct device_attribute *attr, char *buf)
  2862. {
  2863. struct iwl_priv *priv = dev_get_drvdata(d);
  2864. return sprintf(buf, "0x%04X\n",
  2865. le32_to_cpu(priv->active_rxon.filter_flags));
  2866. }
  2867. static ssize_t store_filter_flags(struct device *d,
  2868. struct device_attribute *attr,
  2869. const char *buf, size_t count)
  2870. {
  2871. struct iwl_priv *priv = dev_get_drvdata(d);
  2872. u32 filter_flags = simple_strtoul(buf, NULL, 0);
  2873. mutex_lock(&priv->mutex);
  2874. if (le32_to_cpu(priv->staging_rxon.filter_flags) != filter_flags) {
  2875. /* Cancel any currently running scans... */
  2876. if (iwl_scan_cancel_timeout(priv, 100))
  2877. IWL_WARN(priv, "Could not cancel scan.\n");
  2878. else {
  2879. IWL_DEBUG_INFO(priv, "Committing rxon.filter_flags = "
  2880. "0x%04X\n", filter_flags);
  2881. priv->staging_rxon.filter_flags =
  2882. cpu_to_le32(filter_flags);
  2883. iwlcore_commit_rxon(priv);
  2884. }
  2885. }
  2886. mutex_unlock(&priv->mutex);
  2887. return count;
  2888. }
  2889. static DEVICE_ATTR(filter_flags, S_IWUSR | S_IRUGO, show_filter_flags,
  2890. store_filter_flags);
  2891. #ifdef CONFIG_IWL3945_SPECTRUM_MEASUREMENT
  2892. static ssize_t show_measurement(struct device *d,
  2893. struct device_attribute *attr, char *buf)
  2894. {
  2895. struct iwl_priv *priv = dev_get_drvdata(d);
  2896. struct iwl_spectrum_notification measure_report;
  2897. u32 size = sizeof(measure_report), len = 0, ofs = 0;
  2898. u8 *data = (u8 *)&measure_report;
  2899. unsigned long flags;
  2900. spin_lock_irqsave(&priv->lock, flags);
  2901. if (!(priv->measurement_status & MEASUREMENT_READY)) {
  2902. spin_unlock_irqrestore(&priv->lock, flags);
  2903. return 0;
  2904. }
  2905. memcpy(&measure_report, &priv->measure_report, size);
  2906. priv->measurement_status = 0;
  2907. spin_unlock_irqrestore(&priv->lock, flags);
  2908. while (size && (PAGE_SIZE - len)) {
  2909. hex_dump_to_buffer(data + ofs, size, 16, 1, buf + len,
  2910. PAGE_SIZE - len, 1);
  2911. len = strlen(buf);
  2912. if (PAGE_SIZE - len)
  2913. buf[len++] = '\n';
  2914. ofs += 16;
  2915. size -= min(size, 16U);
  2916. }
  2917. return len;
  2918. }
  2919. static ssize_t store_measurement(struct device *d,
  2920. struct device_attribute *attr,
  2921. const char *buf, size_t count)
  2922. {
  2923. struct iwl_priv *priv = dev_get_drvdata(d);
  2924. struct ieee80211_measurement_params params = {
  2925. .channel = le16_to_cpu(priv->active_rxon.channel),
  2926. .start_time = cpu_to_le64(priv->last_tsf),
  2927. .duration = cpu_to_le16(1),
  2928. };
  2929. u8 type = IWL_MEASURE_BASIC;
  2930. u8 buffer[32];
  2931. u8 channel;
  2932. if (count) {
  2933. char *p = buffer;
  2934. strncpy(buffer, buf, min(sizeof(buffer), count));
  2935. channel = simple_strtoul(p, NULL, 0);
  2936. if (channel)
  2937. params.channel = channel;
  2938. p = buffer;
  2939. while (*p && *p != ' ')
  2940. p++;
  2941. if (*p)
  2942. type = simple_strtoul(p + 1, NULL, 0);
  2943. }
  2944. IWL_DEBUG_INFO(priv, "Invoking measurement of type %d on "
  2945. "channel %d (for '%s')\n", type, params.channel, buf);
  2946. iwl3945_get_measurement(priv, &params, type);
  2947. return count;
  2948. }
  2949. static DEVICE_ATTR(measurement, S_IRUSR | S_IWUSR,
  2950. show_measurement, store_measurement);
  2951. #endif /* CONFIG_IWL3945_SPECTRUM_MEASUREMENT */
  2952. static ssize_t store_retry_rate(struct device *d,
  2953. struct device_attribute *attr,
  2954. const char *buf, size_t count)
  2955. {
  2956. struct iwl_priv *priv = dev_get_drvdata(d);
  2957. priv->retry_rate = simple_strtoul(buf, NULL, 0);
  2958. if (priv->retry_rate <= 0)
  2959. priv->retry_rate = 1;
  2960. return count;
  2961. }
  2962. static ssize_t show_retry_rate(struct device *d,
  2963. struct device_attribute *attr, char *buf)
  2964. {
  2965. struct iwl_priv *priv = dev_get_drvdata(d);
  2966. return sprintf(buf, "%d", priv->retry_rate);
  2967. }
  2968. static DEVICE_ATTR(retry_rate, S_IWUSR | S_IRUSR, show_retry_rate,
  2969. store_retry_rate);
  2970. static ssize_t show_channels(struct device *d,
  2971. struct device_attribute *attr, char *buf)
  2972. {
  2973. /* all this shit doesn't belong into sysfs anyway */
  2974. return 0;
  2975. }
  2976. static DEVICE_ATTR(channels, S_IRUSR, show_channels, NULL);
  2977. static ssize_t show_statistics(struct device *d,
  2978. struct device_attribute *attr, char *buf)
  2979. {
  2980. struct iwl_priv *priv = dev_get_drvdata(d);
  2981. u32 size = sizeof(struct iwl3945_notif_statistics);
  2982. u32 len = 0, ofs = 0;
  2983. u8 *data = (u8 *)&priv->statistics_39;
  2984. int rc = 0;
  2985. if (!iwl_is_alive(priv))
  2986. return -EAGAIN;
  2987. mutex_lock(&priv->mutex);
  2988. rc = iwl_send_statistics_request(priv, 0);
  2989. mutex_unlock(&priv->mutex);
  2990. if (rc) {
  2991. len = sprintf(buf,
  2992. "Error sending statistics request: 0x%08X\n", rc);
  2993. return len;
  2994. }
  2995. while (size && (PAGE_SIZE - len)) {
  2996. hex_dump_to_buffer(data + ofs, size, 16, 1, buf + len,
  2997. PAGE_SIZE - len, 1);
  2998. len = strlen(buf);
  2999. if (PAGE_SIZE - len)
  3000. buf[len++] = '\n';
  3001. ofs += 16;
  3002. size -= min(size, 16U);
  3003. }
  3004. return len;
  3005. }
  3006. static DEVICE_ATTR(statistics, S_IRUGO, show_statistics, NULL);
  3007. static ssize_t show_antenna(struct device *d,
  3008. struct device_attribute *attr, char *buf)
  3009. {
  3010. struct iwl_priv *priv = dev_get_drvdata(d);
  3011. if (!iwl_is_alive(priv))
  3012. return -EAGAIN;
  3013. return sprintf(buf, "%d\n", iwl3945_mod_params.antenna);
  3014. }
  3015. static ssize_t store_antenna(struct device *d,
  3016. struct device_attribute *attr,
  3017. const char *buf, size_t count)
  3018. {
  3019. struct iwl_priv *priv __maybe_unused = dev_get_drvdata(d);
  3020. int ant;
  3021. if (count == 0)
  3022. return 0;
  3023. if (sscanf(buf, "%1i", &ant) != 1) {
  3024. IWL_DEBUG_INFO(priv, "not in hex or decimal form.\n");
  3025. return count;
  3026. }
  3027. if ((ant >= 0) && (ant <= 2)) {
  3028. IWL_DEBUG_INFO(priv, "Setting antenna select to %d.\n", ant);
  3029. iwl3945_mod_params.antenna = (enum iwl3945_antenna)ant;
  3030. } else
  3031. IWL_DEBUG_INFO(priv, "Bad antenna select value %d.\n", ant);
  3032. return count;
  3033. }
  3034. static DEVICE_ATTR(antenna, S_IWUSR | S_IRUGO, show_antenna, store_antenna);
  3035. static ssize_t show_status(struct device *d,
  3036. struct device_attribute *attr, char *buf)
  3037. {
  3038. struct iwl_priv *priv = dev_get_drvdata(d);
  3039. if (!iwl_is_alive(priv))
  3040. return -EAGAIN;
  3041. return sprintf(buf, "0x%08x\n", (int)priv->status);
  3042. }
  3043. static DEVICE_ATTR(status, S_IRUGO, show_status, NULL);
  3044. static ssize_t dump_error_log(struct device *d,
  3045. struct device_attribute *attr,
  3046. const char *buf, size_t count)
  3047. {
  3048. struct iwl_priv *priv = dev_get_drvdata(d);
  3049. char *p = (char *)buf;
  3050. if (p[0] == '1')
  3051. iwl3945_dump_nic_error_log(priv);
  3052. return strnlen(buf, count);
  3053. }
  3054. static DEVICE_ATTR(dump_errors, S_IWUSR, NULL, dump_error_log);
  3055. /*****************************************************************************
  3056. *
  3057. * driver setup and tear down
  3058. *
  3059. *****************************************************************************/
  3060. static void iwl3945_setup_deferred_work(struct iwl_priv *priv)
  3061. {
  3062. priv->workqueue = create_singlethread_workqueue(DRV_NAME);
  3063. init_waitqueue_head(&priv->wait_command_queue);
  3064. INIT_WORK(&priv->up, iwl3945_bg_up);
  3065. INIT_WORK(&priv->restart, iwl3945_bg_restart);
  3066. INIT_WORK(&priv->rx_replenish, iwl3945_bg_rx_replenish);
  3067. INIT_WORK(&priv->beacon_update, iwl3945_bg_beacon_update);
  3068. INIT_DELAYED_WORK(&priv->init_alive_start, iwl3945_bg_init_alive_start);
  3069. INIT_DELAYED_WORK(&priv->alive_start, iwl3945_bg_alive_start);
  3070. INIT_DELAYED_WORK(&priv->rfkill_poll, iwl3945_rfkill_poll);
  3071. INIT_WORK(&priv->scan_completed, iwl_bg_scan_completed);
  3072. INIT_WORK(&priv->request_scan, iwl3945_bg_request_scan);
  3073. INIT_WORK(&priv->abort_scan, iwl_bg_abort_scan);
  3074. INIT_DELAYED_WORK(&priv->scan_check, iwl_bg_scan_check);
  3075. iwl3945_hw_setup_deferred_work(priv);
  3076. tasklet_init(&priv->irq_tasklet, (void (*)(unsigned long))
  3077. iwl3945_irq_tasklet, (unsigned long)priv);
  3078. }
  3079. static void iwl3945_cancel_deferred_work(struct iwl_priv *priv)
  3080. {
  3081. iwl3945_hw_cancel_deferred_work(priv);
  3082. cancel_delayed_work_sync(&priv->init_alive_start);
  3083. cancel_delayed_work(&priv->scan_check);
  3084. cancel_delayed_work(&priv->alive_start);
  3085. cancel_work_sync(&priv->beacon_update);
  3086. }
  3087. static struct attribute *iwl3945_sysfs_entries[] = {
  3088. &dev_attr_antenna.attr,
  3089. &dev_attr_channels.attr,
  3090. &dev_attr_dump_errors.attr,
  3091. &dev_attr_flags.attr,
  3092. &dev_attr_filter_flags.attr,
  3093. #ifdef CONFIG_IWL3945_SPECTRUM_MEASUREMENT
  3094. &dev_attr_measurement.attr,
  3095. #endif
  3096. &dev_attr_retry_rate.attr,
  3097. &dev_attr_statistics.attr,
  3098. &dev_attr_status.attr,
  3099. &dev_attr_temperature.attr,
  3100. &dev_attr_tx_power.attr,
  3101. #ifdef CONFIG_IWLWIFI_DEBUG
  3102. &dev_attr_debug_level.attr,
  3103. #endif
  3104. NULL
  3105. };
  3106. static struct attribute_group iwl3945_attribute_group = {
  3107. .name = NULL, /* put in device directory */
  3108. .attrs = iwl3945_sysfs_entries,
  3109. };
  3110. static struct ieee80211_ops iwl3945_hw_ops = {
  3111. .tx = iwl3945_mac_tx,
  3112. .start = iwl3945_mac_start,
  3113. .stop = iwl3945_mac_stop,
  3114. .add_interface = iwl_mac_add_interface,
  3115. .remove_interface = iwl_mac_remove_interface,
  3116. .config = iwl_mac_config,
  3117. .configure_filter = iwl_configure_filter,
  3118. .set_key = iwl3945_mac_set_key,
  3119. .get_tx_stats = iwl_mac_get_tx_stats,
  3120. .conf_tx = iwl_mac_conf_tx,
  3121. .reset_tsf = iwl_mac_reset_tsf,
  3122. .bss_info_changed = iwl_bss_info_changed,
  3123. .hw_scan = iwl_mac_hw_scan
  3124. };
  3125. static int iwl3945_init_drv(struct iwl_priv *priv)
  3126. {
  3127. int ret;
  3128. struct iwl3945_eeprom *eeprom = (struct iwl3945_eeprom *)priv->eeprom;
  3129. priv->retry_rate = 1;
  3130. priv->ibss_beacon = NULL;
  3131. spin_lock_init(&priv->lock);
  3132. spin_lock_init(&priv->sta_lock);
  3133. spin_lock_init(&priv->hcmd_lock);
  3134. INIT_LIST_HEAD(&priv->free_frames);
  3135. mutex_init(&priv->mutex);
  3136. /* Clear the driver's (not device's) station table */
  3137. iwl_clear_stations_table(priv);
  3138. priv->data_retry_limit = -1;
  3139. priv->ieee_channels = NULL;
  3140. priv->ieee_rates = NULL;
  3141. priv->band = IEEE80211_BAND_2GHZ;
  3142. priv->iw_mode = NL80211_IFTYPE_STATION;
  3143. iwl_reset_qos(priv);
  3144. priv->qos_data.qos_active = 0;
  3145. priv->qos_data.qos_cap.val = 0;
  3146. priv->rates_mask = IWL_RATES_MASK;
  3147. priv->tx_power_user_lmt = IWL_DEFAULT_TX_POWER;
  3148. if (eeprom->version < EEPROM_3945_EEPROM_VERSION) {
  3149. IWL_WARN(priv, "Unsupported EEPROM version: 0x%04X\n",
  3150. eeprom->version);
  3151. ret = -EINVAL;
  3152. goto err;
  3153. }
  3154. ret = iwl_init_channel_map(priv);
  3155. if (ret) {
  3156. IWL_ERR(priv, "initializing regulatory failed: %d\n", ret);
  3157. goto err;
  3158. }
  3159. /* Set up txpower settings in driver for all channels */
  3160. if (iwl3945_txpower_set_from_eeprom(priv)) {
  3161. ret = -EIO;
  3162. goto err_free_channel_map;
  3163. }
  3164. ret = iwlcore_init_geos(priv);
  3165. if (ret) {
  3166. IWL_ERR(priv, "initializing geos failed: %d\n", ret);
  3167. goto err_free_channel_map;
  3168. }
  3169. iwl3945_init_hw_rates(priv, priv->ieee_rates);
  3170. return 0;
  3171. err_free_channel_map:
  3172. iwl_free_channel_map(priv);
  3173. err:
  3174. return ret;
  3175. }
  3176. static int iwl3945_setup_mac(struct iwl_priv *priv)
  3177. {
  3178. int ret;
  3179. struct ieee80211_hw *hw = priv->hw;
  3180. hw->rate_control_algorithm = "iwl-3945-rs";
  3181. hw->sta_data_size = sizeof(struct iwl3945_sta_priv);
  3182. /* Tell mac80211 our characteristics */
  3183. hw->flags = IEEE80211_HW_SIGNAL_DBM |
  3184. IEEE80211_HW_NOISE_DBM |
  3185. IEEE80211_HW_SPECTRUM_MGMT |
  3186. IEEE80211_HW_SUPPORTS_PS |
  3187. IEEE80211_HW_SUPPORTS_DYNAMIC_PS;
  3188. hw->wiphy->interface_modes =
  3189. BIT(NL80211_IFTYPE_STATION) |
  3190. BIT(NL80211_IFTYPE_ADHOC);
  3191. hw->wiphy->custom_regulatory = true;
  3192. /* Firmware does not support this */
  3193. hw->wiphy->disable_beacon_hints = true;
  3194. hw->wiphy->max_scan_ssids = PROBE_OPTION_MAX_3945;
  3195. /* we create the 802.11 header and a zero-length SSID element */
  3196. hw->wiphy->max_scan_ie_len = IWL_MAX_PROBE_REQUEST - 24 - 2;
  3197. /* Default value; 4 EDCA QOS priorities */
  3198. hw->queues = 4;
  3199. if (priv->bands[IEEE80211_BAND_2GHZ].n_channels)
  3200. priv->hw->wiphy->bands[IEEE80211_BAND_2GHZ] =
  3201. &priv->bands[IEEE80211_BAND_2GHZ];
  3202. if (priv->bands[IEEE80211_BAND_5GHZ].n_channels)
  3203. priv->hw->wiphy->bands[IEEE80211_BAND_5GHZ] =
  3204. &priv->bands[IEEE80211_BAND_5GHZ];
  3205. ret = ieee80211_register_hw(priv->hw);
  3206. if (ret) {
  3207. IWL_ERR(priv, "Failed to register hw (error %d)\n", ret);
  3208. return ret;
  3209. }
  3210. priv->mac80211_registered = 1;
  3211. return 0;
  3212. }
  3213. static int iwl3945_pci_probe(struct pci_dev *pdev, const struct pci_device_id *ent)
  3214. {
  3215. int err = 0;
  3216. struct iwl_priv *priv;
  3217. struct ieee80211_hw *hw;
  3218. struct iwl_cfg *cfg = (struct iwl_cfg *)(ent->driver_data);
  3219. struct iwl3945_eeprom *eeprom;
  3220. unsigned long flags;
  3221. /***********************
  3222. * 1. Allocating HW data
  3223. * ********************/
  3224. /* mac80211 allocates memory for this device instance, including
  3225. * space for this driver's private structure */
  3226. hw = iwl_alloc_all(cfg, &iwl3945_hw_ops);
  3227. if (hw == NULL) {
  3228. printk(KERN_ERR DRV_NAME "Can not allocate network device\n");
  3229. err = -ENOMEM;
  3230. goto out;
  3231. }
  3232. priv = hw->priv;
  3233. SET_IEEE80211_DEV(hw, &pdev->dev);
  3234. /*
  3235. * Disabling hardware scan means that mac80211 will perform scans
  3236. * "the hard way", rather than using device's scan.
  3237. */
  3238. if (iwl3945_mod_params.disable_hw_scan) {
  3239. IWL_DEBUG_INFO(priv, "Disabling hw_scan\n");
  3240. iwl3945_hw_ops.hw_scan = NULL;
  3241. }
  3242. IWL_DEBUG_INFO(priv, "*** LOAD DRIVER ***\n");
  3243. priv->cfg = cfg;
  3244. priv->pci_dev = pdev;
  3245. priv->inta_mask = CSR_INI_SET_MASK;
  3246. #ifdef CONFIG_IWLWIFI_DEBUG
  3247. atomic_set(&priv->restrict_refcnt, 0);
  3248. #endif
  3249. if (iwl_alloc_traffic_mem(priv))
  3250. IWL_ERR(priv, "Not enough memory to generate traffic log\n");
  3251. /***************************
  3252. * 2. Initializing PCI bus
  3253. * *************************/
  3254. if (pci_enable_device(pdev)) {
  3255. err = -ENODEV;
  3256. goto out_ieee80211_free_hw;
  3257. }
  3258. pci_set_master(pdev);
  3259. err = pci_set_dma_mask(pdev, DMA_BIT_MASK(32));
  3260. if (!err)
  3261. err = pci_set_consistent_dma_mask(pdev, DMA_BIT_MASK(32));
  3262. if (err) {
  3263. IWL_WARN(priv, "No suitable DMA available.\n");
  3264. goto out_pci_disable_device;
  3265. }
  3266. pci_set_drvdata(pdev, priv);
  3267. err = pci_request_regions(pdev, DRV_NAME);
  3268. if (err)
  3269. goto out_pci_disable_device;
  3270. /***********************
  3271. * 3. Read REV Register
  3272. * ********************/
  3273. priv->hw_base = pci_iomap(pdev, 0, 0);
  3274. if (!priv->hw_base) {
  3275. err = -ENODEV;
  3276. goto out_pci_release_regions;
  3277. }
  3278. IWL_DEBUG_INFO(priv, "pci_resource_len = 0x%08llx\n",
  3279. (unsigned long long) pci_resource_len(pdev, 0));
  3280. IWL_DEBUG_INFO(priv, "pci_resource_base = %p\n", priv->hw_base);
  3281. /* We disable the RETRY_TIMEOUT register (0x41) to keep
  3282. * PCI Tx retries from interfering with C3 CPU state */
  3283. pci_write_config_byte(pdev, 0x41, 0x00);
  3284. /* this spin lock will be used in apm_ops.init and EEPROM access
  3285. * we should init now
  3286. */
  3287. spin_lock_init(&priv->reg_lock);
  3288. /* amp init */
  3289. err = priv->cfg->ops->lib->apm_ops.init(priv);
  3290. if (err < 0) {
  3291. IWL_DEBUG_INFO(priv, "Failed to init the card\n");
  3292. goto out_iounmap;
  3293. }
  3294. /***********************
  3295. * 4. Read EEPROM
  3296. * ********************/
  3297. /* Read the EEPROM */
  3298. err = iwl_eeprom_init(priv);
  3299. if (err) {
  3300. IWL_ERR(priv, "Unable to init EEPROM\n");
  3301. goto out_iounmap;
  3302. }
  3303. /* MAC Address location in EEPROM same for 3945/4965 */
  3304. eeprom = (struct iwl3945_eeprom *)priv->eeprom;
  3305. memcpy(priv->mac_addr, eeprom->mac_address, ETH_ALEN);
  3306. IWL_DEBUG_INFO(priv, "MAC address: %pM\n", priv->mac_addr);
  3307. SET_IEEE80211_PERM_ADDR(priv->hw, priv->mac_addr);
  3308. /***********************
  3309. * 5. Setup HW Constants
  3310. * ********************/
  3311. /* Device-specific setup */
  3312. if (iwl3945_hw_set_hw_params(priv)) {
  3313. IWL_ERR(priv, "failed to set hw settings\n");
  3314. goto out_eeprom_free;
  3315. }
  3316. /***********************
  3317. * 6. Setup priv
  3318. * ********************/
  3319. err = iwl3945_init_drv(priv);
  3320. if (err) {
  3321. IWL_ERR(priv, "initializing driver failed\n");
  3322. goto out_unset_hw_params;
  3323. }
  3324. IWL_INFO(priv, "Detected Intel Wireless WiFi Link %s\n",
  3325. priv->cfg->name);
  3326. /***********************
  3327. * 7. Setup Services
  3328. * ********************/
  3329. spin_lock_irqsave(&priv->lock, flags);
  3330. iwl_disable_interrupts(priv);
  3331. spin_unlock_irqrestore(&priv->lock, flags);
  3332. pci_enable_msi(priv->pci_dev);
  3333. err = request_irq(priv->pci_dev->irq, priv->cfg->ops->lib->isr,
  3334. IRQF_SHARED, DRV_NAME, priv);
  3335. if (err) {
  3336. IWL_ERR(priv, "Error allocating IRQ %d\n", priv->pci_dev->irq);
  3337. goto out_disable_msi;
  3338. }
  3339. err = sysfs_create_group(&pdev->dev.kobj, &iwl3945_attribute_group);
  3340. if (err) {
  3341. IWL_ERR(priv, "failed to create sysfs device attributes\n");
  3342. goto out_release_irq;
  3343. }
  3344. iwl_set_rxon_channel(priv,
  3345. &priv->bands[IEEE80211_BAND_2GHZ].channels[5]);
  3346. iwl3945_setup_deferred_work(priv);
  3347. iwl3945_setup_rx_handlers(priv);
  3348. /*********************************
  3349. * 8. Setup and Register mac80211
  3350. * *******************************/
  3351. iwl_enable_interrupts(priv);
  3352. err = iwl3945_setup_mac(priv);
  3353. if (err)
  3354. goto out_remove_sysfs;
  3355. err = iwl_dbgfs_register(priv, DRV_NAME);
  3356. if (err)
  3357. IWL_ERR(priv, "failed to create debugfs files. Ignoring error: %d\n", err);
  3358. /* Start monitoring the killswitch */
  3359. queue_delayed_work(priv->workqueue, &priv->rfkill_poll,
  3360. 2 * HZ);
  3361. return 0;
  3362. out_remove_sysfs:
  3363. destroy_workqueue(priv->workqueue);
  3364. priv->workqueue = NULL;
  3365. sysfs_remove_group(&pdev->dev.kobj, &iwl3945_attribute_group);
  3366. out_release_irq:
  3367. free_irq(priv->pci_dev->irq, priv);
  3368. out_disable_msi:
  3369. pci_disable_msi(priv->pci_dev);
  3370. iwlcore_free_geos(priv);
  3371. iwl_free_channel_map(priv);
  3372. out_unset_hw_params:
  3373. iwl3945_unset_hw_params(priv);
  3374. out_eeprom_free:
  3375. iwl_eeprom_free(priv);
  3376. out_iounmap:
  3377. pci_iounmap(pdev, priv->hw_base);
  3378. out_pci_release_regions:
  3379. pci_release_regions(pdev);
  3380. out_pci_disable_device:
  3381. pci_set_drvdata(pdev, NULL);
  3382. pci_disable_device(pdev);
  3383. out_ieee80211_free_hw:
  3384. ieee80211_free_hw(priv->hw);
  3385. iwl_free_traffic_mem(priv);
  3386. out:
  3387. return err;
  3388. }
  3389. static void __devexit iwl3945_pci_remove(struct pci_dev *pdev)
  3390. {
  3391. struct iwl_priv *priv = pci_get_drvdata(pdev);
  3392. unsigned long flags;
  3393. if (!priv)
  3394. return;
  3395. IWL_DEBUG_INFO(priv, "*** UNLOAD DRIVER ***\n");
  3396. iwl_dbgfs_unregister(priv);
  3397. set_bit(STATUS_EXIT_PENDING, &priv->status);
  3398. if (priv->mac80211_registered) {
  3399. ieee80211_unregister_hw(priv->hw);
  3400. priv->mac80211_registered = 0;
  3401. } else {
  3402. iwl3945_down(priv);
  3403. }
  3404. /* make sure we flush any pending irq or
  3405. * tasklet for the driver
  3406. */
  3407. spin_lock_irqsave(&priv->lock, flags);
  3408. iwl_disable_interrupts(priv);
  3409. spin_unlock_irqrestore(&priv->lock, flags);
  3410. iwl_synchronize_irq(priv);
  3411. sysfs_remove_group(&pdev->dev.kobj, &iwl3945_attribute_group);
  3412. cancel_delayed_work_sync(&priv->rfkill_poll);
  3413. iwl3945_dealloc_ucode_pci(priv);
  3414. if (priv->rxq.bd)
  3415. iwl3945_rx_queue_free(priv, &priv->rxq);
  3416. iwl3945_hw_txq_ctx_free(priv);
  3417. iwl3945_unset_hw_params(priv);
  3418. iwl_clear_stations_table(priv);
  3419. /*netif_stop_queue(dev); */
  3420. flush_workqueue(priv->workqueue);
  3421. /* ieee80211_unregister_hw calls iwl3945_mac_stop, which flushes
  3422. * priv->workqueue... so we can't take down the workqueue
  3423. * until now... */
  3424. destroy_workqueue(priv->workqueue);
  3425. priv->workqueue = NULL;
  3426. iwl_free_traffic_mem(priv);
  3427. free_irq(pdev->irq, priv);
  3428. pci_disable_msi(pdev);
  3429. pci_iounmap(pdev, priv->hw_base);
  3430. pci_release_regions(pdev);
  3431. pci_disable_device(pdev);
  3432. pci_set_drvdata(pdev, NULL);
  3433. iwl_free_channel_map(priv);
  3434. iwlcore_free_geos(priv);
  3435. kfree(priv->scan);
  3436. if (priv->ibss_beacon)
  3437. dev_kfree_skb(priv->ibss_beacon);
  3438. ieee80211_free_hw(priv->hw);
  3439. }
  3440. /*****************************************************************************
  3441. *
  3442. * driver and module entry point
  3443. *
  3444. *****************************************************************************/
  3445. static struct pci_driver iwl3945_driver = {
  3446. .name = DRV_NAME,
  3447. .id_table = iwl3945_hw_card_ids,
  3448. .probe = iwl3945_pci_probe,
  3449. .remove = __devexit_p(iwl3945_pci_remove),
  3450. #ifdef CONFIG_PM
  3451. .suspend = iwl_pci_suspend,
  3452. .resume = iwl_pci_resume,
  3453. #endif
  3454. };
  3455. static int __init iwl3945_init(void)
  3456. {
  3457. int ret;
  3458. printk(KERN_INFO DRV_NAME ": " DRV_DESCRIPTION ", " DRV_VERSION "\n");
  3459. printk(KERN_INFO DRV_NAME ": " DRV_COPYRIGHT "\n");
  3460. ret = iwl3945_rate_control_register();
  3461. if (ret) {
  3462. printk(KERN_ERR DRV_NAME
  3463. "Unable to register rate control algorithm: %d\n", ret);
  3464. return ret;
  3465. }
  3466. ret = pci_register_driver(&iwl3945_driver);
  3467. if (ret) {
  3468. printk(KERN_ERR DRV_NAME "Unable to initialize PCI module\n");
  3469. goto error_register;
  3470. }
  3471. return ret;
  3472. error_register:
  3473. iwl3945_rate_control_unregister();
  3474. return ret;
  3475. }
  3476. static void __exit iwl3945_exit(void)
  3477. {
  3478. pci_unregister_driver(&iwl3945_driver);
  3479. iwl3945_rate_control_unregister();
  3480. }
  3481. MODULE_FIRMWARE(IWL3945_MODULE_FIRMWARE(IWL3945_UCODE_API_MAX));
  3482. module_param_named(antenna, iwl3945_mod_params.antenna, int, S_IRUGO);
  3483. MODULE_PARM_DESC(antenna, "select antenna (1=Main, 2=Aux, default 0 [both])");
  3484. module_param_named(swcrypto, iwl3945_mod_params.sw_crypto, int, S_IRUGO);
  3485. MODULE_PARM_DESC(swcrypto,
  3486. "using software crypto (default 1 [software])\n");
  3487. #ifdef CONFIG_IWLWIFI_DEBUG
  3488. module_param_named(debug, iwl_debug_level, uint, S_IRUGO | S_IWUSR);
  3489. MODULE_PARM_DESC(debug, "debug output mask");
  3490. #endif
  3491. module_param_named(disable_hw_scan, iwl3945_mod_params.disable_hw_scan,
  3492. int, S_IRUGO);
  3493. MODULE_PARM_DESC(disable_hw_scan, "disable hardware scanning (default 0)");
  3494. module_param_named(fw_restart3945, iwl3945_mod_params.restart_fw, int, S_IRUGO);
  3495. MODULE_PARM_DESC(fw_restart3945, "restart firmware in case of error");
  3496. module_exit(iwl3945_exit);
  3497. module_init(iwl3945_init);