topology.c 9.8 KB

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  1. /*
  2. * Copyright IBM Corp. 2007, 2011
  3. * Author(s): Heiko Carstens <heiko.carstens@de.ibm.com>
  4. */
  5. #define KMSG_COMPONENT "cpu"
  6. #define pr_fmt(fmt) KMSG_COMPONENT ": " fmt
  7. #include <linux/workqueue.h>
  8. #include <linux/bootmem.h>
  9. #include <linux/cpuset.h>
  10. #include <linux/device.h>
  11. #include <linux/kernel.h>
  12. #include <linux/sched.h>
  13. #include <linux/init.h>
  14. #include <linux/delay.h>
  15. #include <linux/cpu.h>
  16. #include <linux/smp.h>
  17. #include <linux/mm.h>
  18. #include <asm/sysinfo.h>
  19. #define PTF_HORIZONTAL (0UL)
  20. #define PTF_VERTICAL (1UL)
  21. #define PTF_CHECK (2UL)
  22. struct mask_info {
  23. struct mask_info *next;
  24. unsigned char id;
  25. cpumask_t mask;
  26. };
  27. static int topology_enabled = 1;
  28. static void topology_work_fn(struct work_struct *work);
  29. static struct sysinfo_15_1_x *tl_info;
  30. static void set_topology_timer(void);
  31. static DECLARE_WORK(topology_work, topology_work_fn);
  32. /* topology_lock protects the core linked list */
  33. static DEFINE_SPINLOCK(topology_lock);
  34. static struct mask_info core_info;
  35. cpumask_t cpu_core_map[NR_CPUS];
  36. unsigned char cpu_core_id[NR_CPUS];
  37. static struct mask_info book_info;
  38. cpumask_t cpu_book_map[NR_CPUS];
  39. unsigned char cpu_book_id[NR_CPUS];
  40. static cpumask_t cpu_group_map(struct mask_info *info, unsigned int cpu)
  41. {
  42. cpumask_t mask;
  43. cpumask_clear(&mask);
  44. if (!topology_enabled || !MACHINE_HAS_TOPOLOGY) {
  45. cpumask_copy(&mask, cpumask_of(cpu));
  46. return mask;
  47. }
  48. while (info) {
  49. if (cpumask_test_cpu(cpu, &info->mask)) {
  50. mask = info->mask;
  51. break;
  52. }
  53. info = info->next;
  54. }
  55. if (cpumask_empty(&mask))
  56. cpumask_copy(&mask, cpumask_of(cpu));
  57. return mask;
  58. }
  59. static struct mask_info *add_cpus_to_mask(struct topology_cpu *tl_cpu,
  60. struct mask_info *book,
  61. struct mask_info *core,
  62. int one_core_per_cpu)
  63. {
  64. unsigned int cpu;
  65. for_each_set_bit(cpu, &tl_cpu->mask[0], TOPOLOGY_CPU_BITS) {
  66. unsigned int rcpu;
  67. int lcpu;
  68. rcpu = TOPOLOGY_CPU_BITS - 1 - cpu + tl_cpu->origin;
  69. lcpu = smp_find_processor_id(rcpu);
  70. if (lcpu >= 0) {
  71. cpumask_set_cpu(lcpu, &book->mask);
  72. cpu_book_id[lcpu] = book->id;
  73. cpumask_set_cpu(lcpu, &core->mask);
  74. if (one_core_per_cpu) {
  75. cpu_core_id[lcpu] = rcpu;
  76. core = core->next;
  77. } else {
  78. cpu_core_id[lcpu] = core->id;
  79. }
  80. smp_cpu_set_polarization(lcpu, tl_cpu->pp);
  81. }
  82. }
  83. return core;
  84. }
  85. static void clear_masks(void)
  86. {
  87. struct mask_info *info;
  88. info = &core_info;
  89. while (info) {
  90. cpumask_clear(&info->mask);
  91. info = info->next;
  92. }
  93. info = &book_info;
  94. while (info) {
  95. cpumask_clear(&info->mask);
  96. info = info->next;
  97. }
  98. }
  99. static union topology_entry *next_tle(union topology_entry *tle)
  100. {
  101. if (!tle->nl)
  102. return (union topology_entry *)((struct topology_cpu *)tle + 1);
  103. return (union topology_entry *)((struct topology_container *)tle + 1);
  104. }
  105. static void __tl_to_cores_generic(struct sysinfo_15_1_x *info)
  106. {
  107. struct mask_info *core = &core_info;
  108. struct mask_info *book = &book_info;
  109. union topology_entry *tle, *end;
  110. tle = info->tle;
  111. end = (union topology_entry *)((unsigned long)info + info->length);
  112. while (tle < end) {
  113. switch (tle->nl) {
  114. case 2:
  115. book = book->next;
  116. book->id = tle->container.id;
  117. break;
  118. case 1:
  119. core = core->next;
  120. core->id = tle->container.id;
  121. break;
  122. case 0:
  123. add_cpus_to_mask(&tle->cpu, book, core, 0);
  124. break;
  125. default:
  126. clear_masks();
  127. return;
  128. }
  129. tle = next_tle(tle);
  130. }
  131. }
  132. static void __tl_to_cores_z10(struct sysinfo_15_1_x *info)
  133. {
  134. struct mask_info *core = &core_info;
  135. struct mask_info *book = &book_info;
  136. union topology_entry *tle, *end;
  137. tle = info->tle;
  138. end = (union topology_entry *)((unsigned long)info + info->length);
  139. while (tle < end) {
  140. switch (tle->nl) {
  141. case 1:
  142. book = book->next;
  143. book->id = tle->container.id;
  144. break;
  145. case 0:
  146. core = add_cpus_to_mask(&tle->cpu, book, core, 1);
  147. break;
  148. default:
  149. clear_masks();
  150. return;
  151. }
  152. tle = next_tle(tle);
  153. }
  154. }
  155. static void tl_to_cores(struct sysinfo_15_1_x *info)
  156. {
  157. struct cpuid cpu_id;
  158. get_cpu_id(&cpu_id);
  159. spin_lock_irq(&topology_lock);
  160. clear_masks();
  161. switch (cpu_id.machine) {
  162. case 0x2097:
  163. case 0x2098:
  164. __tl_to_cores_z10(info);
  165. break;
  166. default:
  167. __tl_to_cores_generic(info);
  168. }
  169. spin_unlock_irq(&topology_lock);
  170. }
  171. static void topology_update_polarization_simple(void)
  172. {
  173. int cpu;
  174. mutex_lock(&smp_cpu_state_mutex);
  175. for_each_possible_cpu(cpu)
  176. smp_cpu_set_polarization(cpu, POLARIZATION_HRZ);
  177. mutex_unlock(&smp_cpu_state_mutex);
  178. }
  179. static int ptf(unsigned long fc)
  180. {
  181. int rc;
  182. asm volatile(
  183. " .insn rre,0xb9a20000,%1,%1\n"
  184. " ipm %0\n"
  185. " srl %0,28\n"
  186. : "=d" (rc)
  187. : "d" (fc) : "cc");
  188. return rc;
  189. }
  190. int topology_set_cpu_management(int fc)
  191. {
  192. int cpu, rc;
  193. if (!MACHINE_HAS_TOPOLOGY)
  194. return -EOPNOTSUPP;
  195. if (fc)
  196. rc = ptf(PTF_VERTICAL);
  197. else
  198. rc = ptf(PTF_HORIZONTAL);
  199. if (rc)
  200. return -EBUSY;
  201. for_each_possible_cpu(cpu)
  202. smp_cpu_set_polarization(cpu, POLARIZATION_UNKNOWN);
  203. return rc;
  204. }
  205. static void update_cpu_core_map(void)
  206. {
  207. unsigned long flags;
  208. int cpu;
  209. spin_lock_irqsave(&topology_lock, flags);
  210. for_each_possible_cpu(cpu) {
  211. cpu_core_map[cpu] = cpu_group_map(&core_info, cpu);
  212. cpu_book_map[cpu] = cpu_group_map(&book_info, cpu);
  213. }
  214. spin_unlock_irqrestore(&topology_lock, flags);
  215. }
  216. void store_topology(struct sysinfo_15_1_x *info)
  217. {
  218. if (topology_max_mnest >= 3)
  219. stsi(info, 15, 1, 3);
  220. else
  221. stsi(info, 15, 1, 2);
  222. }
  223. int arch_update_cpu_topology(void)
  224. {
  225. struct sysinfo_15_1_x *info = tl_info;
  226. struct device *dev;
  227. int cpu;
  228. if (!MACHINE_HAS_TOPOLOGY) {
  229. update_cpu_core_map();
  230. topology_update_polarization_simple();
  231. return 0;
  232. }
  233. store_topology(info);
  234. tl_to_cores(info);
  235. update_cpu_core_map();
  236. for_each_online_cpu(cpu) {
  237. dev = get_cpu_device(cpu);
  238. kobject_uevent(&dev->kobj, KOBJ_CHANGE);
  239. }
  240. return 1;
  241. }
  242. static void topology_work_fn(struct work_struct *work)
  243. {
  244. rebuild_sched_domains();
  245. }
  246. void topology_schedule_update(void)
  247. {
  248. schedule_work(&topology_work);
  249. }
  250. static void topology_timer_fn(unsigned long ignored)
  251. {
  252. if (ptf(PTF_CHECK))
  253. topology_schedule_update();
  254. set_topology_timer();
  255. }
  256. static struct timer_list topology_timer =
  257. TIMER_DEFERRED_INITIALIZER(topology_timer_fn, 0, 0);
  258. static atomic_t topology_poll = ATOMIC_INIT(0);
  259. static void set_topology_timer(void)
  260. {
  261. if (atomic_add_unless(&topology_poll, -1, 0))
  262. mod_timer(&topology_timer, jiffies + HZ / 10);
  263. else
  264. mod_timer(&topology_timer, jiffies + HZ * 60);
  265. }
  266. void topology_expect_change(void)
  267. {
  268. if (!MACHINE_HAS_TOPOLOGY)
  269. return;
  270. /* This is racy, but it doesn't matter since it is just a heuristic.
  271. * Worst case is that we poll in a higher frequency for a bit longer.
  272. */
  273. if (atomic_read(&topology_poll) > 60)
  274. return;
  275. atomic_add(60, &topology_poll);
  276. set_topology_timer();
  277. }
  278. static int __init early_parse_topology(char *p)
  279. {
  280. if (strncmp(p, "off", 3))
  281. return 0;
  282. topology_enabled = 0;
  283. return 0;
  284. }
  285. early_param("topology", early_parse_topology);
  286. static void __init alloc_masks(struct sysinfo_15_1_x *info,
  287. struct mask_info *mask, int offset)
  288. {
  289. int i, nr_masks;
  290. nr_masks = info->mag[TOPOLOGY_NR_MAG - offset];
  291. for (i = 0; i < info->mnest - offset; i++)
  292. nr_masks *= info->mag[TOPOLOGY_NR_MAG - offset - 1 - i];
  293. nr_masks = max(nr_masks, 1);
  294. for (i = 0; i < nr_masks; i++) {
  295. mask->next = alloc_bootmem(sizeof(struct mask_info));
  296. mask = mask->next;
  297. }
  298. }
  299. void __init s390_init_cpu_topology(void)
  300. {
  301. struct sysinfo_15_1_x *info;
  302. int i;
  303. if (!MACHINE_HAS_TOPOLOGY)
  304. return;
  305. tl_info = alloc_bootmem_pages(PAGE_SIZE);
  306. info = tl_info;
  307. store_topology(info);
  308. pr_info("The CPU configuration topology of the machine is:");
  309. for (i = 0; i < TOPOLOGY_NR_MAG; i++)
  310. printk(KERN_CONT " %d", info->mag[i]);
  311. printk(KERN_CONT " / %d\n", info->mnest);
  312. alloc_masks(info, &core_info, 1);
  313. alloc_masks(info, &book_info, 2);
  314. }
  315. static int cpu_management;
  316. static ssize_t dispatching_show(struct device *dev,
  317. struct device_attribute *attr,
  318. char *buf)
  319. {
  320. ssize_t count;
  321. mutex_lock(&smp_cpu_state_mutex);
  322. count = sprintf(buf, "%d\n", cpu_management);
  323. mutex_unlock(&smp_cpu_state_mutex);
  324. return count;
  325. }
  326. static ssize_t dispatching_store(struct device *dev,
  327. struct device_attribute *attr,
  328. const char *buf,
  329. size_t count)
  330. {
  331. int val, rc;
  332. char delim;
  333. if (sscanf(buf, "%d %c", &val, &delim) != 1)
  334. return -EINVAL;
  335. if (val != 0 && val != 1)
  336. return -EINVAL;
  337. rc = 0;
  338. get_online_cpus();
  339. mutex_lock(&smp_cpu_state_mutex);
  340. if (cpu_management == val)
  341. goto out;
  342. rc = topology_set_cpu_management(val);
  343. if (rc)
  344. goto out;
  345. cpu_management = val;
  346. topology_expect_change();
  347. out:
  348. mutex_unlock(&smp_cpu_state_mutex);
  349. put_online_cpus();
  350. return rc ? rc : count;
  351. }
  352. static DEVICE_ATTR(dispatching, 0644, dispatching_show,
  353. dispatching_store);
  354. static ssize_t cpu_polarization_show(struct device *dev,
  355. struct device_attribute *attr, char *buf)
  356. {
  357. int cpu = dev->id;
  358. ssize_t count;
  359. mutex_lock(&smp_cpu_state_mutex);
  360. switch (smp_cpu_get_polarization(cpu)) {
  361. case POLARIZATION_HRZ:
  362. count = sprintf(buf, "horizontal\n");
  363. break;
  364. case POLARIZATION_VL:
  365. count = sprintf(buf, "vertical:low\n");
  366. break;
  367. case POLARIZATION_VM:
  368. count = sprintf(buf, "vertical:medium\n");
  369. break;
  370. case POLARIZATION_VH:
  371. count = sprintf(buf, "vertical:high\n");
  372. break;
  373. default:
  374. count = sprintf(buf, "unknown\n");
  375. break;
  376. }
  377. mutex_unlock(&smp_cpu_state_mutex);
  378. return count;
  379. }
  380. static DEVICE_ATTR(polarization, 0444, cpu_polarization_show, NULL);
  381. static struct attribute *topology_cpu_attrs[] = {
  382. &dev_attr_polarization.attr,
  383. NULL,
  384. };
  385. static struct attribute_group topology_cpu_attr_group = {
  386. .attrs = topology_cpu_attrs,
  387. };
  388. int topology_cpu_init(struct cpu *cpu)
  389. {
  390. return sysfs_create_group(&cpu->dev.kobj, &topology_cpu_attr_group);
  391. }
  392. static int __init topology_init(void)
  393. {
  394. if (!MACHINE_HAS_TOPOLOGY) {
  395. topology_update_polarization_simple();
  396. goto out;
  397. }
  398. set_topology_timer();
  399. out:
  400. update_cpu_core_map();
  401. return device_create_file(cpu_subsys.dev_root, &dev_attr_dispatching);
  402. }
  403. device_initcall(topology_init);