tegra20-tamonten.dtsi 9.9 KB

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  1. /include/ "tegra20.dtsi"
  2. / {
  3. model = "Avionic Design Tamonten SOM";
  4. compatible = "ad,tamonten", "nvidia,tegra20";
  5. memory {
  6. reg = <0x00000000 0x20000000>;
  7. };
  8. pinmux {
  9. pinctrl-names = "default";
  10. pinctrl-0 = <&state_default>;
  11. state_default: pinmux {
  12. ata {
  13. nvidia,pins = "ata";
  14. nvidia,function = "ide";
  15. };
  16. atb {
  17. nvidia,pins = "atb", "gma", "gme";
  18. nvidia,function = "sdio4";
  19. };
  20. atc {
  21. nvidia,pins = "atc";
  22. nvidia,function = "nand";
  23. };
  24. atd {
  25. nvidia,pins = "atd", "ate", "gmb", "gmd", "gpu",
  26. "spia", "spib", "spic";
  27. nvidia,function = "gmi";
  28. };
  29. cdev1 {
  30. nvidia,pins = "cdev1";
  31. nvidia,function = "plla_out";
  32. };
  33. cdev2 {
  34. nvidia,pins = "cdev2";
  35. nvidia,function = "pllp_out4";
  36. };
  37. crtp {
  38. nvidia,pins = "crtp";
  39. nvidia,function = "crt";
  40. };
  41. csus {
  42. nvidia,pins = "csus";
  43. nvidia,function = "vi_sensor_clk";
  44. };
  45. dap1 {
  46. nvidia,pins = "dap1";
  47. nvidia,function = "dap1";
  48. };
  49. dap2 {
  50. nvidia,pins = "dap2";
  51. nvidia,function = "dap2";
  52. };
  53. dap3 {
  54. nvidia,pins = "dap3";
  55. nvidia,function = "dap3";
  56. };
  57. dap4 {
  58. nvidia,pins = "dap4";
  59. nvidia,function = "dap4";
  60. };
  61. ddc {
  62. nvidia,pins = "ddc";
  63. nvidia,function = "i2c2";
  64. };
  65. dta {
  66. nvidia,pins = "dta", "dtd";
  67. nvidia,function = "sdio2";
  68. };
  69. dtb {
  70. nvidia,pins = "dtb", "dtc", "dte";
  71. nvidia,function = "rsvd1";
  72. };
  73. dtf {
  74. nvidia,pins = "dtf";
  75. nvidia,function = "i2c3";
  76. };
  77. gmc {
  78. nvidia,pins = "gmc";
  79. nvidia,function = "uartd";
  80. };
  81. gpu7 {
  82. nvidia,pins = "gpu7";
  83. nvidia,function = "rtck";
  84. };
  85. gpv {
  86. nvidia,pins = "gpv", "slxa", "slxk";
  87. nvidia,function = "pcie";
  88. };
  89. hdint {
  90. nvidia,pins = "hdint", "pta";
  91. nvidia,function = "hdmi";
  92. };
  93. i2cp {
  94. nvidia,pins = "i2cp";
  95. nvidia,function = "i2cp";
  96. };
  97. irrx {
  98. nvidia,pins = "irrx", "irtx";
  99. nvidia,function = "uarta";
  100. };
  101. kbca {
  102. nvidia,pins = "kbca", "kbcb", "kbcc", "kbcd",
  103. "kbce", "kbcf";
  104. nvidia,function = "kbc";
  105. };
  106. lcsn {
  107. nvidia,pins = "lcsn", "ld0", "ld1", "ld2",
  108. "ld3", "ld4", "ld5", "ld6", "ld7",
  109. "ld8", "ld9", "ld10", "ld11", "ld12",
  110. "ld13", "ld14", "ld15", "ld16", "ld17",
  111. "ldc", "ldi", "lhp0", "lhp1", "lhp2",
  112. "lhs", "lm0", "lm1", "lpp", "lpw0",
  113. "lpw1", "lpw2", "lsc0", "lsc1", "lsck",
  114. "lsda", "lsdi", "lspi", "lvp0", "lvp1",
  115. "lvs";
  116. nvidia,function = "displaya";
  117. };
  118. owc {
  119. nvidia,pins = "owc", "spdi", "spdo", "uac";
  120. nvidia,function = "rsvd2";
  121. };
  122. pmc {
  123. nvidia,pins = "pmc";
  124. nvidia,function = "pwr_on";
  125. };
  126. rm {
  127. nvidia,pins = "rm";
  128. nvidia,function = "i2c1";
  129. };
  130. sdb {
  131. nvidia,pins = "sdb", "sdc", "sdd";
  132. nvidia,function = "pwm";
  133. };
  134. sdio1 {
  135. nvidia,pins = "sdio1";
  136. nvidia,function = "sdio1";
  137. };
  138. slxc {
  139. nvidia,pins = "slxc", "slxd";
  140. nvidia,function = "spdif";
  141. };
  142. spid {
  143. nvidia,pins = "spid", "spie", "spif";
  144. nvidia,function = "spi1";
  145. };
  146. spig {
  147. nvidia,pins = "spig", "spih";
  148. nvidia,function = "spi2_alt";
  149. };
  150. uaa {
  151. nvidia,pins = "uaa", "uab", "uda";
  152. nvidia,function = "ulpi";
  153. };
  154. uad {
  155. nvidia,pins = "uad";
  156. nvidia,function = "irda";
  157. };
  158. uca {
  159. nvidia,pins = "uca", "ucb";
  160. nvidia,function = "uartc";
  161. };
  162. conf_ata {
  163. nvidia,pins = "ata", "atb", "atc", "atd", "ate",
  164. "cdev1", "cdev2", "dap1", "dtb", "gma",
  165. "gmb", "gmc", "gmd", "gme", "gpu7",
  166. "gpv", "i2cp", "pta", "rm", "slxa",
  167. "slxk", "spia", "spib", "uac";
  168. nvidia,pull = <0>;
  169. nvidia,tristate = <0>;
  170. };
  171. conf_ck32 {
  172. nvidia,pins = "ck32", "ddrc", "pmca", "pmcb",
  173. "pmcc", "pmcd", "pmce", "xm2c", "xm2d";
  174. nvidia,pull = <0>;
  175. };
  176. conf_csus {
  177. nvidia,pins = "csus", "spid", "spif";
  178. nvidia,pull = <1>;
  179. nvidia,tristate = <1>;
  180. };
  181. conf_crtp {
  182. nvidia,pins = "crtp", "dap2", "dap3", "dap4",
  183. "dtc", "dte", "dtf", "gpu", "sdio1",
  184. "slxc", "slxd", "spdi", "spdo", "spig",
  185. "uda";
  186. nvidia,pull = <0>;
  187. nvidia,tristate = <1>;
  188. };
  189. conf_ddc {
  190. nvidia,pins = "ddc", "dta", "dtd", "kbca",
  191. "kbcb", "kbcc", "kbcd", "kbce", "kbcf",
  192. "sdc";
  193. nvidia,pull = <2>;
  194. nvidia,tristate = <0>;
  195. };
  196. conf_hdint {
  197. nvidia,pins = "hdint", "lcsn", "ldc", "lm1",
  198. "lpw1", "lsc1", "lsck", "lsda", "lsdi",
  199. "lvp0", "owc", "sdb";
  200. nvidia,tristate = <1>;
  201. };
  202. conf_irrx {
  203. nvidia,pins = "irrx", "irtx", "sdd", "spic",
  204. "spie", "spih", "uaa", "uab", "uad",
  205. "uca", "ucb";
  206. nvidia,pull = <2>;
  207. nvidia,tristate = <1>;
  208. };
  209. conf_lc {
  210. nvidia,pins = "lc", "ls";
  211. nvidia,pull = <2>;
  212. };
  213. conf_ld0 {
  214. nvidia,pins = "ld0", "ld1", "ld2", "ld3", "ld4",
  215. "ld5", "ld6", "ld7", "ld8", "ld9",
  216. "ld10", "ld11", "ld12", "ld13", "ld14",
  217. "ld15", "ld16", "ld17", "ldi", "lhp0",
  218. "lhp1", "lhp2", "lhs", "lm0", "lpp",
  219. "lpw0", "lpw2", "lsc0", "lspi", "lvp1",
  220. "lvs", "pmc";
  221. nvidia,tristate = <0>;
  222. };
  223. conf_ld17_0 {
  224. nvidia,pins = "ld17_0", "ld19_18", "ld21_20",
  225. "ld23_22";
  226. nvidia,pull = <1>;
  227. };
  228. };
  229. };
  230. i2s@70002800 {
  231. status = "okay";
  232. };
  233. serial@70006300 {
  234. clock-frequency = <216000000>;
  235. status = "okay";
  236. };
  237. i2c@7000c000 {
  238. clock-frequency = <400000>;
  239. status = "okay";
  240. };
  241. i2c@7000d000 {
  242. clock-frequency = <400000>;
  243. status = "okay";
  244. pmic: tps6586x@34 {
  245. compatible = "ti,tps6586x";
  246. reg = <0x34>;
  247. interrupts = <0 86 0x4>;
  248. ti,system-power-controller;
  249. #gpio-cells = <2>;
  250. gpio-controller;
  251. sys-supply = <&vdd_5v0_reg>;
  252. vin-sm0-supply = <&sys_reg>;
  253. vin-sm1-supply = <&sys_reg>;
  254. vin-sm2-supply = <&sys_reg>;
  255. vinldo01-supply = <&sm2_reg>;
  256. vinldo23-supply = <&sm2_reg>;
  257. vinldo4-supply = <&sm2_reg>;
  258. vinldo678-supply = <&sm2_reg>;
  259. vinldo9-supply = <&sm2_reg>;
  260. regulators {
  261. #address-cells = <1>;
  262. #size-cells = <0>;
  263. sys_reg: regulator@0 {
  264. reg = <0>;
  265. regulator-compatible = "sys";
  266. regulator-name = "vdd_sys";
  267. regulator-always-on;
  268. };
  269. regulator@1 {
  270. reg = <1>;
  271. regulator-compatible = "sm0";
  272. regulator-name = "vdd_sys_sm0,vdd_core";
  273. regulator-min-microvolt = <1200000>;
  274. regulator-max-microvolt = <1200000>;
  275. regulator-always-on;
  276. };
  277. regulator@2 {
  278. reg = <2>;
  279. regulator-compatible = "sm1";
  280. regulator-name = "vdd_sys_sm1,vdd_cpu";
  281. regulator-min-microvolt = <1000000>;
  282. regulator-max-microvolt = <1000000>;
  283. regulator-always-on;
  284. };
  285. sm2_reg: regulator@3 {
  286. reg = <3>;
  287. regulator-compatible = "sm2";
  288. regulator-name = "vdd_sys_sm2,vin_ldo*";
  289. regulator-min-microvolt = <3700000>;
  290. regulator-max-microvolt = <3700000>;
  291. regulator-always-on;
  292. };
  293. regulator@4 {
  294. reg = <4>;
  295. regulator-compatible = "ldo0";
  296. regulator-name = "vdd_ldo0,vddio_pex_clk";
  297. regulator-min-microvolt = <3300000>;
  298. regulator-max-microvolt = <3300000>;
  299. };
  300. regulator@5 {
  301. reg = <5>;
  302. regulator-compatible = "ldo1";
  303. regulator-name = "vdd_ldo1,avdd_pll*";
  304. regulator-min-microvolt = <1100000>;
  305. regulator-max-microvolt = <1100000>;
  306. regulator-always-on;
  307. };
  308. regulator@6 {
  309. reg = <6>;
  310. regulator-compatible = "ldo2";
  311. regulator-name = "vdd_ldo2,vdd_rtc";
  312. regulator-min-microvolt = <1200000>;
  313. regulator-max-microvolt = <1200000>;
  314. };
  315. regulator@7 {
  316. reg = <7>;
  317. regulator-compatible = "ldo3";
  318. regulator-name = "vdd_ldo3,avdd_usb*";
  319. regulator-min-microvolt = <3300000>;
  320. regulator-max-microvolt = <3300000>;
  321. regulator-always-on;
  322. };
  323. regulator@8 {
  324. reg = <8>;
  325. regulator-compatible = "ldo4";
  326. regulator-name = "vdd_ldo4,avdd_osc,vddio_sys";
  327. regulator-min-microvolt = <1800000>;
  328. regulator-max-microvolt = <1800000>;
  329. regulator-always-on;
  330. };
  331. regulator@9 {
  332. reg = <9>;
  333. regulator-compatible = "ldo5";
  334. regulator-name = "vdd_ldo5,vcore_mmc";
  335. regulator-min-microvolt = <2850000>;
  336. regulator-max-microvolt = <2850000>;
  337. };
  338. regulator@10 {
  339. reg = <10>;
  340. regulator-compatible = "ldo6";
  341. regulator-name = "vdd_ldo6,avdd_vdac";
  342. /*
  343. * According to the Tegra 2 Automotive
  344. * DataSheet, a typical value for this
  345. * would be 2.8V, but the PMIC only
  346. * supports 2.85V.
  347. */
  348. regulator-min-microvolt = <2850000>;
  349. regulator-max-microvolt = <2850000>;
  350. };
  351. regulator@11 {
  352. reg = <11>;
  353. regulator-compatible = "ldo7";
  354. regulator-name = "vdd_ldo7,avdd_hdmi";
  355. regulator-min-microvolt = <3300000>;
  356. regulator-max-microvolt = <3300000>;
  357. };
  358. regulator@12 {
  359. reg = <12>;
  360. regulator-compatible = "ldo8";
  361. regulator-name = "vdd_ldo8,avdd_hdmi_pll";
  362. regulator-min-microvolt = <1800000>;
  363. regulator-max-microvolt = <1800000>;
  364. };
  365. regulator@13 {
  366. reg = <13>;
  367. regulator-compatible = "ldo9";
  368. regulator-name = "vdd_ldo9,vdd_ddr_rx,avdd_cam";
  369. /*
  370. * According to the Tegra 2 Automotive
  371. * DataSheet, a typical value for this
  372. * would be 2.8V, but the PMIC only
  373. * supports 2.85V.
  374. */
  375. regulator-min-microvolt = <2850000>;
  376. regulator-max-microvolt = <2850000>;
  377. regulator-always-on;
  378. };
  379. regulator@14 {
  380. reg = <14>;
  381. regulator-compatible = "ldo_rtc";
  382. regulator-name = "vdd_rtc_out";
  383. regulator-min-microvolt = <3300000>;
  384. regulator-max-microvolt = <3300000>;
  385. regulator-always-on;
  386. };
  387. };
  388. };
  389. };
  390. pmc {
  391. nvidia,invert-interrupt;
  392. };
  393. usb@c5008000 {
  394. status = "okay";
  395. };
  396. sdhci@c8000600 {
  397. cd-gpios = <&gpio 58 0>; /* gpio PH2 */
  398. wp-gpios = <&gpio 59 0>; /* gpio PH3 */
  399. bus-width = <4>;
  400. status = "okay";
  401. };
  402. regulators {
  403. compatible = "simple-bus";
  404. #address-cells = <1>;
  405. #size-cells = <0>;
  406. vdd_5v0_reg: regulator@0 {
  407. compatible = "regulator-fixed";
  408. reg = <0>;
  409. regulator-name = "vdd_5v0";
  410. regulator-min-microvolt = <5000000>;
  411. regulator-max-microvolt = <5000000>;
  412. regulator-always-on;
  413. };
  414. };
  415. };