ehci-omap.c 14 KB

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  1. /*
  2. * ehci-omap.c - driver for USBHOST on OMAP3/4 processors
  3. *
  4. * Bus Glue for the EHCI controllers in OMAP3/4
  5. * Tested on several OMAP3 boards, and OMAP4 Pandaboard
  6. *
  7. * Copyright (C) 2007-2011 Texas Instruments, Inc.
  8. * Author: Vikram Pandita <vikram.pandita@ti.com>
  9. * Author: Anand Gadiyar <gadiyar@ti.com>
  10. * Author: Keshava Munegowda <keshava_mgowda@ti.com>
  11. *
  12. * Copyright (C) 2009 Nokia Corporation
  13. * Contact: Felipe Balbi <felipe.balbi@nokia.com>
  14. *
  15. * Based on "ehci-fsl.c" and "ehci-au1xxx.c" ehci glue layers
  16. *
  17. * This program is free software; you can redistribute it and/or modify
  18. * it under the terms of the GNU General Public License as published by
  19. * the Free Software Foundation; either version 2 of the License, or
  20. * (at your option) any later version.
  21. *
  22. * This program is distributed in the hope that it will be useful,
  23. * but WITHOUT ANY WARRANTY; without even the implied warranty of
  24. * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
  25. * GNU General Public License for more details.
  26. *
  27. * You should have received a copy of the GNU General Public License
  28. * along with this program; if not, write to the Free Software
  29. * Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA
  30. *
  31. * TODO (last updated Feb 27, 2010):
  32. * - add kernel-doc
  33. * - enable AUTOIDLE
  34. * - add suspend/resume
  35. * - add HSIC and TLL support
  36. * - convert to use hwmod and runtime PM
  37. */
  38. #include <linux/platform_device.h>
  39. #include <linux/slab.h>
  40. #include <linux/usb/ulpi.h>
  41. #include <plat/usb.h>
  42. #include <linux/regulator/consumer.h>
  43. #include <linux/pm_runtime.h>
  44. #include <linux/gpio.h>
  45. #include <linux/clk.h>
  46. /* EHCI Register Set */
  47. #define EHCI_INSNREG04 (0xA0)
  48. #define EHCI_INSNREG04_DISABLE_UNSUSPEND (1 << 5)
  49. #define EHCI_INSNREG05_ULPI (0xA4)
  50. #define EHCI_INSNREG05_ULPI_CONTROL_SHIFT 31
  51. #define EHCI_INSNREG05_ULPI_PORTSEL_SHIFT 24
  52. #define EHCI_INSNREG05_ULPI_OPSEL_SHIFT 22
  53. #define EHCI_INSNREG05_ULPI_REGADD_SHIFT 16
  54. #define EHCI_INSNREG05_ULPI_EXTREGADD_SHIFT 8
  55. #define EHCI_INSNREG05_ULPI_WRDATA_SHIFT 0
  56. /* Errata i693 */
  57. static struct clk *utmi_p1_fck;
  58. static struct clk *utmi_p2_fck;
  59. static struct clk *xclk60mhsp1_ck;
  60. static struct clk *xclk60mhsp2_ck;
  61. static struct clk *usbhost_p1_fck;
  62. static struct clk *usbhost_p2_fck;
  63. static struct clk *init_60m_fclk;
  64. /*-------------------------------------------------------------------------*/
  65. static const struct hc_driver ehci_omap_hc_driver;
  66. static inline void ehci_write(void __iomem *base, u32 reg, u32 val)
  67. {
  68. __raw_writel(val, base + reg);
  69. }
  70. static inline u32 ehci_read(void __iomem *base, u32 reg)
  71. {
  72. return __raw_readl(base + reg);
  73. }
  74. /* Erratum i693 workaround sequence */
  75. static void omap_ehci_erratum_i693(struct ehci_hcd *ehci)
  76. {
  77. int ret = 0;
  78. /* Switch to the internal 60 MHz clock */
  79. ret = clk_set_parent(utmi_p1_fck, init_60m_fclk);
  80. if (ret != 0)
  81. ehci_err(ehci, "init_60m_fclk set parent"
  82. "failed error:%d\n", ret);
  83. ret = clk_set_parent(utmi_p2_fck, init_60m_fclk);
  84. if (ret != 0)
  85. ehci_err(ehci, "init_60m_fclk set parent"
  86. "failed error:%d\n", ret);
  87. clk_enable(usbhost_p1_fck);
  88. clk_enable(usbhost_p2_fck);
  89. /* Wait 1ms and switch back to the external clock */
  90. mdelay(1);
  91. ret = clk_set_parent(utmi_p1_fck, xclk60mhsp1_ck);
  92. if (ret != 0)
  93. ehci_err(ehci, "xclk60mhsp1_ck set parent"
  94. "failed error:%d\n", ret);
  95. ret = clk_set_parent(utmi_p2_fck, xclk60mhsp2_ck);
  96. if (ret != 0)
  97. ehci_err(ehci, "xclk60mhsp2_ck set parent"
  98. "failed error:%d\n", ret);
  99. clk_disable(usbhost_p1_fck);
  100. clk_disable(usbhost_p2_fck);
  101. }
  102. static void omap_ehci_soft_phy_reset(struct platform_device *pdev, u8 port)
  103. {
  104. struct usb_hcd *hcd = dev_get_drvdata(&pdev->dev);
  105. unsigned long timeout = jiffies + msecs_to_jiffies(1000);
  106. unsigned reg = 0;
  107. reg = ULPI_FUNC_CTRL_RESET
  108. /* FUNCTION_CTRL_SET register */
  109. | (ULPI_SET(ULPI_FUNC_CTRL) << EHCI_INSNREG05_ULPI_REGADD_SHIFT)
  110. /* Write */
  111. | (2 << EHCI_INSNREG05_ULPI_OPSEL_SHIFT)
  112. /* PORTn */
  113. | ((port + 1) << EHCI_INSNREG05_ULPI_PORTSEL_SHIFT)
  114. /* start ULPI access*/
  115. | (1 << EHCI_INSNREG05_ULPI_CONTROL_SHIFT);
  116. ehci_write(hcd->regs, EHCI_INSNREG05_ULPI, reg);
  117. /* Wait for ULPI access completion */
  118. while ((ehci_read(hcd->regs, EHCI_INSNREG05_ULPI)
  119. & (1 << EHCI_INSNREG05_ULPI_CONTROL_SHIFT))) {
  120. cpu_relax();
  121. if (time_after(jiffies, timeout)) {
  122. dev_dbg(&pdev->dev, "phy reset operation timed out\n");
  123. break;
  124. }
  125. }
  126. }
  127. static int omap_ehci_hub_control(
  128. struct usb_hcd *hcd,
  129. u16 typeReq,
  130. u16 wValue,
  131. u16 wIndex,
  132. char *buf,
  133. u16 wLength
  134. )
  135. {
  136. struct ehci_hcd *ehci = hcd_to_ehci(hcd);
  137. u32 __iomem *status_reg = &ehci->regs->port_status[
  138. (wIndex & 0xff) - 1];
  139. u32 temp;
  140. unsigned long flags;
  141. int retval = 0;
  142. spin_lock_irqsave(&ehci->lock, flags);
  143. if (typeReq == SetPortFeature && wValue == USB_PORT_FEAT_SUSPEND) {
  144. temp = ehci_readl(ehci, status_reg);
  145. if ((temp & PORT_PE) == 0 || (temp & PORT_RESET) != 0) {
  146. retval = -EPIPE;
  147. goto done;
  148. }
  149. temp &= ~PORT_WKCONN_E;
  150. temp |= PORT_WKDISC_E | PORT_WKOC_E;
  151. ehci_writel(ehci, temp | PORT_SUSPEND, status_reg);
  152. omap_ehci_erratum_i693(ehci);
  153. set_bit((wIndex & 0xff) - 1, &ehci->suspended_ports);
  154. goto done;
  155. }
  156. spin_unlock_irqrestore(&ehci->lock, flags);
  157. /* Handle the hub control events here */
  158. return ehci_hub_control(hcd, typeReq, wValue, wIndex, buf, wLength);
  159. done:
  160. spin_unlock_irqrestore(&ehci->lock, flags);
  161. return retval;
  162. }
  163. static void disable_put_regulator(
  164. struct ehci_hcd_omap_platform_data *pdata)
  165. {
  166. int i;
  167. for (i = 0 ; i < OMAP3_HS_USB_PORTS ; i++) {
  168. if (pdata->regulator[i]) {
  169. regulator_disable(pdata->regulator[i]);
  170. regulator_put(pdata->regulator[i]);
  171. }
  172. }
  173. }
  174. /* configure so an HC device and id are always provided */
  175. /* always called with process context; sleeping is OK */
  176. /**
  177. * ehci_hcd_omap_probe - initialize TI-based HCDs
  178. *
  179. * Allocates basic resources for this USB host controller, and
  180. * then invokes the start() method for the HCD associated with it
  181. * through the hotplug entry's driver_data.
  182. */
  183. static int ehci_hcd_omap_probe(struct platform_device *pdev)
  184. {
  185. struct device *dev = &pdev->dev;
  186. struct ehci_hcd_omap_platform_data *pdata = dev->platform_data;
  187. struct resource *res;
  188. struct usb_hcd *hcd;
  189. void __iomem *regs;
  190. struct ehci_hcd *omap_ehci;
  191. int ret = -ENODEV;
  192. int irq;
  193. int i;
  194. char supply[7];
  195. if (usb_disabled())
  196. return -ENODEV;
  197. if (!dev->parent) {
  198. dev_err(dev, "Missing parent device\n");
  199. return -ENODEV;
  200. }
  201. irq = platform_get_irq_byname(pdev, "ehci-irq");
  202. if (irq < 0) {
  203. dev_err(dev, "EHCI irq failed\n");
  204. return -ENODEV;
  205. }
  206. res = platform_get_resource_byname(pdev,
  207. IORESOURCE_MEM, "ehci");
  208. if (!res) {
  209. dev_err(dev, "UHH EHCI get resource failed\n");
  210. return -ENODEV;
  211. }
  212. regs = ioremap(res->start, resource_size(res));
  213. if (!regs) {
  214. dev_err(dev, "UHH EHCI ioremap failed\n");
  215. return -ENOMEM;
  216. }
  217. hcd = usb_create_hcd(&ehci_omap_hc_driver, dev,
  218. dev_name(dev));
  219. if (!hcd) {
  220. dev_err(dev, "failed to create hcd with err %d\n", ret);
  221. ret = -ENOMEM;
  222. goto err_io;
  223. }
  224. hcd->rsrc_start = res->start;
  225. hcd->rsrc_len = resource_size(res);
  226. hcd->regs = regs;
  227. /* get ehci regulator and enable */
  228. for (i = 0 ; i < OMAP3_HS_USB_PORTS ; i++) {
  229. if (pdata->port_mode[i] != OMAP_EHCI_PORT_MODE_PHY) {
  230. pdata->regulator[i] = NULL;
  231. continue;
  232. }
  233. snprintf(supply, sizeof(supply), "hsusb%d", i);
  234. pdata->regulator[i] = regulator_get(dev, supply);
  235. if (IS_ERR(pdata->regulator[i])) {
  236. pdata->regulator[i] = NULL;
  237. dev_dbg(dev,
  238. "failed to get ehci port%d regulator\n", i);
  239. } else {
  240. regulator_enable(pdata->regulator[i]);
  241. }
  242. }
  243. /* Hold PHYs in reset while initializing EHCI controller */
  244. if (pdata->phy_reset) {
  245. if (gpio_is_valid(pdata->reset_gpio_port[0]))
  246. gpio_set_value_cansleep(pdata->reset_gpio_port[0], 0);
  247. if (gpio_is_valid(pdata->reset_gpio_port[1]))
  248. gpio_set_value_cansleep(pdata->reset_gpio_port[1], 0);
  249. /* Hold the PHY in RESET for enough time till DIR is high */
  250. udelay(10);
  251. }
  252. pm_runtime_enable(dev);
  253. pm_runtime_get_sync(dev);
  254. /*
  255. * An undocumented "feature" in the OMAP3 EHCI controller,
  256. * causes suspended ports to be taken out of suspend when
  257. * the USBCMD.Run/Stop bit is cleared (for example when
  258. * we do ehci_bus_suspend).
  259. * This breaks suspend-resume if the root-hub is allowed
  260. * to suspend. Writing 1 to this undocumented register bit
  261. * disables this feature and restores normal behavior.
  262. */
  263. ehci_write(regs, EHCI_INSNREG04,
  264. EHCI_INSNREG04_DISABLE_UNSUSPEND);
  265. /* Soft reset the PHY using PHY reset command over ULPI */
  266. if (pdata->port_mode[0] == OMAP_EHCI_PORT_MODE_PHY)
  267. omap_ehci_soft_phy_reset(pdev, 0);
  268. if (pdata->port_mode[1] == OMAP_EHCI_PORT_MODE_PHY)
  269. omap_ehci_soft_phy_reset(pdev, 1);
  270. omap_ehci = hcd_to_ehci(hcd);
  271. omap_ehci->sbrn = 0x20;
  272. /* we know this is the memory we want, no need to ioremap again */
  273. omap_ehci->caps = hcd->regs;
  274. omap_ehci->regs = hcd->regs
  275. + HC_LENGTH(ehci, readl(&omap_ehci->caps->hc_capbase));
  276. dbg_hcs_params(omap_ehci, "reset");
  277. dbg_hcc_params(omap_ehci, "reset");
  278. /* cache this readonly data; minimize chip reads */
  279. omap_ehci->hcs_params = readl(&omap_ehci->caps->hcs_params);
  280. ehci_reset(omap_ehci);
  281. ret = usb_add_hcd(hcd, irq, IRQF_SHARED);
  282. if (ret) {
  283. dev_err(dev, "failed to add hcd with err %d\n", ret);
  284. goto err_add_hcd;
  285. }
  286. if (pdata->phy_reset) {
  287. /* Hold the PHY in RESET for enough time till
  288. * PHY is settled and ready
  289. */
  290. udelay(10);
  291. if (gpio_is_valid(pdata->reset_gpio_port[0]))
  292. gpio_set_value_cansleep(pdata->reset_gpio_port[0], 1);
  293. if (gpio_is_valid(pdata->reset_gpio_port[1]))
  294. gpio_set_value_cansleep(pdata->reset_gpio_port[1], 1);
  295. }
  296. /* root ports should always stay powered */
  297. ehci_port_power(omap_ehci, 1);
  298. /* get clocks */
  299. utmi_p1_fck = clk_get(dev, "utmi_p1_gfclk");
  300. if (IS_ERR(utmi_p1_fck)) {
  301. ret = PTR_ERR(utmi_p1_fck);
  302. dev_err(dev, "utmi_p1_gfclk failed error:%d\n", ret);
  303. goto err_add_hcd;
  304. }
  305. xclk60mhsp1_ck = clk_get(dev, "xclk60mhsp1_ck");
  306. if (IS_ERR(xclk60mhsp1_ck)) {
  307. ret = PTR_ERR(xclk60mhsp1_ck);
  308. dev_err(dev, "xclk60mhsp1_ck failed error:%d\n", ret);
  309. goto err_utmi_p1_fck;
  310. }
  311. utmi_p2_fck = clk_get(dev, "utmi_p2_gfclk");
  312. if (IS_ERR(utmi_p2_fck)) {
  313. ret = PTR_ERR(utmi_p2_fck);
  314. dev_err(dev, "utmi_p2_gfclk failed error:%d\n", ret);
  315. goto err_xclk60mhsp1_ck;
  316. }
  317. xclk60mhsp2_ck = clk_get(dev, "xclk60mhsp2_ck");
  318. if (IS_ERR(xclk60mhsp2_ck)) {
  319. ret = PTR_ERR(xclk60mhsp2_ck);
  320. dev_err(dev, "xclk60mhsp2_ck failed error:%d\n", ret);
  321. goto err_utmi_p2_fck;
  322. }
  323. usbhost_p1_fck = clk_get(dev, "usb_host_hs_utmi_p1_clk");
  324. if (IS_ERR(usbhost_p1_fck)) {
  325. ret = PTR_ERR(usbhost_p1_fck);
  326. dev_err(dev, "usbhost_p1_fck failed error:%d\n", ret);
  327. goto err_xclk60mhsp2_ck;
  328. }
  329. usbhost_p2_fck = clk_get(dev, "usb_host_hs_utmi_p2_clk");
  330. if (IS_ERR(usbhost_p2_fck)) {
  331. ret = PTR_ERR(usbhost_p2_fck);
  332. dev_err(dev, "usbhost_p2_fck failed error:%d\n", ret);
  333. goto err_usbhost_p1_fck;
  334. }
  335. init_60m_fclk = clk_get(dev, "init_60m_fclk");
  336. if (IS_ERR(init_60m_fclk)) {
  337. ret = PTR_ERR(init_60m_fclk);
  338. dev_err(dev, "init_60m_fclk failed error:%d\n", ret);
  339. goto err_usbhost_p2_fck;
  340. }
  341. return 0;
  342. err_usbhost_p2_fck:
  343. clk_put(usbhost_p2_fck);
  344. err_usbhost_p1_fck:
  345. clk_put(usbhost_p1_fck);
  346. err_xclk60mhsp2_ck:
  347. clk_put(xclk60mhsp2_ck);
  348. err_utmi_p2_fck:
  349. clk_put(utmi_p2_fck);
  350. err_xclk60mhsp1_ck:
  351. clk_put(xclk60mhsp1_ck);
  352. err_utmi_p1_fck:
  353. clk_put(utmi_p1_fck);
  354. err_add_hcd:
  355. disable_put_regulator(pdata);
  356. pm_runtime_put_sync(dev);
  357. err_io:
  358. iounmap(regs);
  359. return ret;
  360. }
  361. /**
  362. * ehci_hcd_omap_remove - shutdown processing for EHCI HCDs
  363. * @pdev: USB Host Controller being removed
  364. *
  365. * Reverses the effect of usb_ehci_hcd_omap_probe(), first invoking
  366. * the HCD's stop() method. It is always called from a thread
  367. * context, normally "rmmod", "apmd", or something similar.
  368. */
  369. static int ehci_hcd_omap_remove(struct platform_device *pdev)
  370. {
  371. struct device *dev = &pdev->dev;
  372. struct usb_hcd *hcd = dev_get_drvdata(dev);
  373. struct ehci_hcd_omap_platform_data *pdata = dev->platform_data;
  374. usb_remove_hcd(hcd);
  375. disable_put_regulator(dev->platform_data);
  376. iounmap(hcd->regs);
  377. usb_put_hcd(hcd);
  378. clk_put(utmi_p1_fck);
  379. clk_put(utmi_p2_fck);
  380. clk_put(xclk60mhsp1_ck);
  381. clk_put(xclk60mhsp2_ck);
  382. clk_put(usbhost_p1_fck);
  383. clk_put(usbhost_p2_fck);
  384. clk_put(init_60m_fclk);
  385. pm_runtime_put_sync(dev);
  386. pm_runtime_disable(dev);
  387. if (pdata->phy_reset) {
  388. if (gpio_is_valid(pdata->reset_gpio_port[0]))
  389. gpio_free(pdata->reset_gpio_port[0]);
  390. if (gpio_is_valid(pdata->reset_gpio_port[1]))
  391. gpio_free(pdata->reset_gpio_port[1]);
  392. }
  393. return 0;
  394. }
  395. static void ehci_hcd_omap_shutdown(struct platform_device *pdev)
  396. {
  397. struct usb_hcd *hcd = dev_get_drvdata(&pdev->dev);
  398. if (hcd->driver->shutdown)
  399. hcd->driver->shutdown(hcd);
  400. }
  401. static struct platform_driver ehci_hcd_omap_driver = {
  402. .probe = ehci_hcd_omap_probe,
  403. .remove = ehci_hcd_omap_remove,
  404. .shutdown = ehci_hcd_omap_shutdown,
  405. /*.suspend = ehci_hcd_omap_suspend, */
  406. /*.resume = ehci_hcd_omap_resume, */
  407. .driver = {
  408. .name = "ehci-omap",
  409. }
  410. };
  411. /*-------------------------------------------------------------------------*/
  412. static const struct hc_driver ehci_omap_hc_driver = {
  413. .description = hcd_name,
  414. .product_desc = "OMAP-EHCI Host Controller",
  415. .hcd_priv_size = sizeof(struct ehci_hcd),
  416. /*
  417. * generic hardware linkage
  418. */
  419. .irq = ehci_irq,
  420. .flags = HCD_MEMORY | HCD_USB2,
  421. /*
  422. * basic lifecycle operations
  423. */
  424. .reset = ehci_init,
  425. .start = ehci_run,
  426. .stop = ehci_stop,
  427. .shutdown = ehci_shutdown,
  428. /*
  429. * managing i/o requests and associated device resources
  430. */
  431. .urb_enqueue = ehci_urb_enqueue,
  432. .urb_dequeue = ehci_urb_dequeue,
  433. .endpoint_disable = ehci_endpoint_disable,
  434. .endpoint_reset = ehci_endpoint_reset,
  435. /*
  436. * scheduling support
  437. */
  438. .get_frame_number = ehci_get_frame,
  439. /*
  440. * root hub support
  441. */
  442. .hub_status_data = ehci_hub_status_data,
  443. .hub_control = omap_ehci_hub_control,
  444. .bus_suspend = ehci_bus_suspend,
  445. .bus_resume = ehci_bus_resume,
  446. .clear_tt_buffer_complete = ehci_clear_tt_buffer_complete,
  447. };
  448. MODULE_ALIAS("platform:omap-ehci");
  449. MODULE_AUTHOR("Texas Instruments, Inc.");
  450. MODULE_AUTHOR("Felipe Balbi <felipe.balbi@nokia.com>");