ksi8560.dts 5.9 KB

123456789101112131415161718192021222324252627282930313233343536373839404142434445464748495051525354555657585960616263646566676869707172737475767778798081828384858687888990919293949596979899100101102103104105106107108109110111112113114115116117118119120121122123124125126127128129130131132133134135136137138139140141142143144145146147148149150151152153154155156157158159160161162163164165166167168169170171172173174175176177178179180181182183184185186187188189190191192193194195196197198199200201202203204205206207208209210211212213214215216217218219220221222223224225226227228229230231232233234235236237238239240241242243244245246247248249250251252253254255256257258259260261262263264265266267268
  1. /*
  2. * Device Tree Source for Emerson KSI8560
  3. *
  4. * Author: Alexandr Smirnov <asmirnov@ru.mvista.com>
  5. *
  6. * Based on mpc8560ads.dts
  7. *
  8. * 2008 (c) MontaVista, Software, Inc. This file is licensed under
  9. * the terms of the GNU General Public License version 2. This program
  10. * is licensed "as is" without any warranty of any kind, whether express
  11. * or implied.
  12. *
  13. */
  14. /dts-v1/;
  15. / {
  16. model = "KSI8560";
  17. compatible = "emerson,KSI8560";
  18. #address-cells = <1>;
  19. #size-cells = <1>;
  20. aliases {
  21. ethernet0 = &enet0;
  22. ethernet1 = &enet1;
  23. ethernet2 = &enet2;
  24. };
  25. cpus {
  26. #address-cells = <1>;
  27. #size-cells = <0>;
  28. PowerPC,8560@0 {
  29. device_type = "cpu";
  30. reg = <0>;
  31. d-cache-line-size = <32>;
  32. i-cache-line-size = <32>;
  33. d-cache-size = <0x8000>; /* L1, 32K */
  34. i-cache-size = <0x8000>; /* L1, 32K */
  35. timebase-frequency = <0>; /* From U-boot */
  36. bus-frequency = <0>; /* From U-boot */
  37. clock-frequency = <0>; /* From U-boot */
  38. next-level-cache = <&L2>;
  39. };
  40. };
  41. memory {
  42. device_type = "memory";
  43. reg = <0x00000000 0x10000000>; /* Fixed by bootwrapper */
  44. };
  45. soc@fdf00000 {
  46. #address-cells = <1>;
  47. #size-cells = <1>;
  48. device_type = "soc";
  49. ranges = <0x00000000 0xfdf00000 0x00100000>;
  50. bus-frequency = <0>; /* Fixed by bootwrapper */
  51. memory-controller@2000 {
  52. compatible = "fsl,8540-memory-controller";
  53. reg = <0x2000 0x1000>;
  54. interrupt-parent = <&MPIC>;
  55. interrupts = <0x12 0x2>;
  56. };
  57. L2: l2-cache-controller@20000 {
  58. compatible = "fsl,8540-l2-cache-controller";
  59. reg = <0x20000 0x1000>;
  60. cache-line-size = <0x20>; /* 32 bytes */
  61. cache-size = <0x40000>; /* L2, 256K */
  62. interrupt-parent = <&MPIC>;
  63. interrupts = <0x10 0x2>;
  64. };
  65. i2c@3000 {
  66. #address-cells = <1>;
  67. #size-cells = <0>;
  68. cell-index = <0>;
  69. compatible = "fsl-i2c";
  70. reg = <0x3000 0x100>;
  71. interrupts = <0x2b 0x2>;
  72. interrupt-parent = <&MPIC>;
  73. dfsrr;
  74. };
  75. mdio@24520 { /* For TSECs */
  76. #address-cells = <1>;
  77. #size-cells = <0>;
  78. compatible = "fsl,gianfar-mdio";
  79. reg = <0x24520 0x20>;
  80. PHY1: ethernet-phy@1 {
  81. interrupt-parent = <&MPIC>;
  82. reg = <0x1>;
  83. device_type = "ethernet-phy";
  84. };
  85. PHY2: ethernet-phy@2 {
  86. interrupt-parent = <&MPIC>;
  87. reg = <0x2>;
  88. device_type = "ethernet-phy";
  89. };
  90. };
  91. enet0: ethernet@24000 {
  92. device_type = "network";
  93. model = "TSEC";
  94. compatible = "gianfar";
  95. reg = <0x24000 0x1000>;
  96. /* Mac address filled in by bootwrapper */
  97. local-mac-address = [ 00 00 00 00 00 00 ];
  98. interrupts = <0x1d 0x2 0x1e 0x2 0x22 0x2>;
  99. interrupt-parent = <&MPIC>;
  100. phy-handle = <&PHY1>;
  101. };
  102. enet1: ethernet@25000 {
  103. device_type = "network";
  104. model = "TSEC";
  105. compatible = "gianfar";
  106. reg = <0x25000 0x1000>;
  107. /* Mac address filled in by bootwrapper */
  108. local-mac-address = [ 00 00 00 00 00 00 ];
  109. interrupts = <0x23 0x2 0x24 0x2 0x28 0x2>;
  110. interrupt-parent = <&MPIC>;
  111. phy-handle = <&PHY2>;
  112. };
  113. MPIC: pic@40000 {
  114. #address-cells = <0>;
  115. #interrupt-cells = <2>;
  116. interrupt-controller;
  117. reg = <0x40000 0x40000>;
  118. device_type = "open-pic";
  119. };
  120. cpm@919c0 {
  121. #address-cells = <1>;
  122. #size-cells = <1>;
  123. compatible = "fsl,mpc8560-cpm", "fsl,cpm2";
  124. reg = <0x919c0 0x30>;
  125. ranges;
  126. muram@80000 {
  127. #address-cells = <1>;
  128. #size-cells = <1>;
  129. ranges = <0x0 0x80000 0x10000>;
  130. data@0 {
  131. compatible = "fsl,cpm-muram-data";
  132. reg = <0x0 0x4000 0x9000 0x2000>;
  133. };
  134. };
  135. brg@919f0 {
  136. compatible = "fsl,mpc8560-brg",
  137. "fsl,cpm2-brg",
  138. "fsl,cpm-brg";
  139. reg = <0x919f0 0x10 0x915f0 0x10>;
  140. clock-frequency = <165000000>; /* 166MHz */
  141. };
  142. CPMPIC: pic@90c00 {
  143. #address-cells = <0>;
  144. #interrupt-cells = <2>;
  145. interrupt-controller;
  146. interrupts = <0x2e 0x2>;
  147. interrupt-parent = <&MPIC>;
  148. reg = <0x90c00 0x80>;
  149. compatible = "fsl,mpc8560-cpm-pic", "fsl,cpm2-pic";
  150. };
  151. serial@91a00 {
  152. device_type = "serial";
  153. compatible = "fsl,mpc8560-scc-uart",
  154. "fsl,cpm2-scc-uart";
  155. reg = <0x91a00 0x20 0x88000 0x100>;
  156. fsl,cpm-brg = <1>;
  157. fsl,cpm-command = <0x800000>;
  158. current-speed = <0x1c200>;
  159. interrupts = <0x28 0x8>;
  160. interrupt-parent = <&CPMPIC>;
  161. };
  162. serial@91a20 {
  163. device_type = "serial";
  164. compatible = "fsl,mpc8560-scc-uart",
  165. "fsl,cpm2-scc-uart";
  166. reg = <0x91a20 0x20 0x88100 0x100>;
  167. fsl,cpm-brg = <2>;
  168. fsl,cpm-command = <0x4a00000>;
  169. current-speed = <0x1c200>;
  170. interrupts = <0x29 0x8>;
  171. interrupt-parent = <&CPMPIC>;
  172. };
  173. mdio@90d00 { /* For FCCs */
  174. #address-cells = <1>;
  175. #size-cells = <0>;
  176. compatible = "fsl,cpm2-mdio-bitbang";
  177. reg = <0x90d00 0x14>;
  178. fsl,mdio-pin = <24>;
  179. fsl,mdc-pin = <25>;
  180. PHY0: ethernet-phy@0 {
  181. interrupt-parent = <&MPIC>;
  182. reg = <0x0>;
  183. device_type = "ethernet-phy";
  184. };
  185. };
  186. enet2: ethernet@91300 {
  187. device_type = "network";
  188. compatible = "fsl,mpc8560-fcc-enet",
  189. "fsl,cpm2-fcc-enet";
  190. reg = <0x91300 0x20 0x88400 0x100 0x91390 0x1>;
  191. /* Mac address filled in by bootwrapper */
  192. local-mac-address = [ 00 00 00 00 00 00 ];
  193. fsl,cpm-command = <0x12000300>;
  194. interrupts = <0x20 0x8>;
  195. interrupt-parent = <&CPMPIC>;
  196. phy-handle = <&PHY0>;
  197. };
  198. };
  199. };
  200. localbus@fdf05000 {
  201. #address-cells = <2>;
  202. #size-cells = <1>;
  203. compatible = "fsl,mpc8560-localbus";
  204. reg = <0xfdf05000 0x68>;
  205. ranges = <0x0 0x0 0xe0000000 0x00800000
  206. 0x4 0x0 0xe8080000 0x00080000>;
  207. flash@0,0 {
  208. #address-cells = <1>;
  209. #size-cells = <1>;
  210. compatible = "jedec-flash";
  211. reg = <0x0 0x0 0x800000>;
  212. bank-width = <0x2>;
  213. partition@0 {
  214. label = "Primary Kernel";
  215. reg = <0x0 0x180000>;
  216. };
  217. partition@180000 {
  218. label = "Primary Filesystem";
  219. reg = <0x180000 0x580000>;
  220. };
  221. partition@700000 {
  222. label = "Monitor";
  223. reg = <0x300000 0x100000>;
  224. read-only;
  225. };
  226. };
  227. cpld@4,0 {
  228. compatible = "emerson,KSI8560-cpld";
  229. reg = <0x4 0x0 0x80000>;
  230. };
  231. };
  232. chosen {
  233. linux,stdout-path = "/soc/cpm/serial@91a00";
  234. };
  235. };