at91sam9x5.dtsi 6.5 KB

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  1. /*
  2. * at91sam9x5.dtsi - Device Tree Include file for AT91SAM9x5 family SoC
  3. * applies to AT91SAM9G15, AT91SAM9G25, AT91SAM9G35,
  4. * AT91SAM9X25, AT91SAM9X35 SoC
  5. *
  6. * Copyright (C) 2012 Atmel,
  7. * 2012 Nicolas Ferre <nicolas.ferre@atmel.com>
  8. *
  9. * Licensed under GPLv2 or later.
  10. */
  11. /include/ "skeleton.dtsi"
  12. / {
  13. model = "Atmel AT91SAM9x5 family SoC";
  14. compatible = "atmel,at91sam9x5";
  15. interrupt-parent = <&aic>;
  16. aliases {
  17. serial0 = &dbgu;
  18. serial1 = &usart0;
  19. serial2 = &usart1;
  20. serial3 = &usart2;
  21. gpio0 = &pioA;
  22. gpio1 = &pioB;
  23. gpio2 = &pioC;
  24. gpio3 = &pioD;
  25. tcb0 = &tcb0;
  26. tcb1 = &tcb1;
  27. };
  28. cpus {
  29. cpu@0 {
  30. compatible = "arm,arm926ejs";
  31. };
  32. };
  33. memory {
  34. reg = <0x20000000 0x10000000>;
  35. };
  36. ahb {
  37. compatible = "simple-bus";
  38. #address-cells = <1>;
  39. #size-cells = <1>;
  40. ranges;
  41. apb {
  42. compatible = "simple-bus";
  43. #address-cells = <1>;
  44. #size-cells = <1>;
  45. ranges;
  46. aic: interrupt-controller@fffff000 {
  47. #interrupt-cells = <3>;
  48. compatible = "atmel,at91rm9200-aic";
  49. interrupt-controller;
  50. reg = <0xfffff000 0x200>;
  51. atmel,external-irqs = <31>;
  52. };
  53. ramc0: ramc@ffffe800 {
  54. compatible = "atmel,at91sam9g45-ddramc";
  55. reg = <0xffffe800 0x200>;
  56. };
  57. pmc: pmc@fffffc00 {
  58. compatible = "atmel,at91rm9200-pmc";
  59. reg = <0xfffffc00 0x100>;
  60. };
  61. rstc@fffffe00 {
  62. compatible = "atmel,at91sam9g45-rstc";
  63. reg = <0xfffffe00 0x10>;
  64. };
  65. shdwc@fffffe10 {
  66. compatible = "atmel,at91sam9x5-shdwc";
  67. reg = <0xfffffe10 0x10>;
  68. };
  69. pit: timer@fffffe30 {
  70. compatible = "atmel,at91sam9260-pit";
  71. reg = <0xfffffe30 0xf>;
  72. interrupts = <1 4 7>;
  73. };
  74. tcb0: timer@f8008000 {
  75. compatible = "atmel,at91sam9x5-tcb";
  76. reg = <0xf8008000 0x100>;
  77. interrupts = <17 4 0>;
  78. };
  79. tcb1: timer@f800c000 {
  80. compatible = "atmel,at91sam9x5-tcb";
  81. reg = <0xf800c000 0x100>;
  82. interrupts = <17 4 0>;
  83. };
  84. dma0: dma-controller@ffffec00 {
  85. compatible = "atmel,at91sam9g45-dma";
  86. reg = <0xffffec00 0x200>;
  87. interrupts = <20 4 0>;
  88. };
  89. dma1: dma-controller@ffffee00 {
  90. compatible = "atmel,at91sam9g45-dma";
  91. reg = <0xffffee00 0x200>;
  92. interrupts = <21 4 0>;
  93. };
  94. pioA: gpio@fffff400 {
  95. compatible = "atmel,at91sam9x5-gpio", "atmel,at91rm9200-gpio";
  96. reg = <0xfffff400 0x100>;
  97. interrupts = <2 4 1>;
  98. #gpio-cells = <2>;
  99. gpio-controller;
  100. interrupt-controller;
  101. #interrupt-cells = <2>;
  102. };
  103. pioB: gpio@fffff600 {
  104. compatible = "atmel,at91sam9x5-gpio", "atmel,at91rm9200-gpio";
  105. reg = <0xfffff600 0x100>;
  106. interrupts = <2 4 1>;
  107. #gpio-cells = <2>;
  108. gpio-controller;
  109. interrupt-controller;
  110. #interrupt-cells = <2>;
  111. };
  112. pioC: gpio@fffff800 {
  113. compatible = "atmel,at91sam9x5-gpio", "atmel,at91rm9200-gpio";
  114. reg = <0xfffff800 0x100>;
  115. interrupts = <3 4 1>;
  116. #gpio-cells = <2>;
  117. gpio-controller;
  118. interrupt-controller;
  119. #interrupt-cells = <2>;
  120. };
  121. pioD: gpio@fffffa00 {
  122. compatible = "atmel,at91sam9x5-gpio", "atmel,at91rm9200-gpio";
  123. reg = <0xfffffa00 0x100>;
  124. interrupts = <3 4 1>;
  125. #gpio-cells = <2>;
  126. gpio-controller;
  127. interrupt-controller;
  128. #interrupt-cells = <2>;
  129. };
  130. dbgu: serial@fffff200 {
  131. compatible = "atmel,at91sam9260-usart";
  132. reg = <0xfffff200 0x200>;
  133. interrupts = <1 4 7>;
  134. status = "disabled";
  135. };
  136. usart0: serial@f801c000 {
  137. compatible = "atmel,at91sam9260-usart";
  138. reg = <0xf801c000 0x200>;
  139. interrupts = <5 4 5>;
  140. atmel,use-dma-rx;
  141. atmel,use-dma-tx;
  142. status = "disabled";
  143. };
  144. usart1: serial@f8020000 {
  145. compatible = "atmel,at91sam9260-usart";
  146. reg = <0xf8020000 0x200>;
  147. interrupts = <6 4 5>;
  148. atmel,use-dma-rx;
  149. atmel,use-dma-tx;
  150. status = "disabled";
  151. };
  152. usart2: serial@f8024000 {
  153. compatible = "atmel,at91sam9260-usart";
  154. reg = <0xf8024000 0x200>;
  155. interrupts = <7 4 5>;
  156. atmel,use-dma-rx;
  157. atmel,use-dma-tx;
  158. status = "disabled";
  159. };
  160. macb0: ethernet@f802c000 {
  161. compatible = "cdns,at32ap7000-macb", "cdns,macb";
  162. reg = <0xf802c000 0x100>;
  163. interrupts = <24 4 3>;
  164. status = "disabled";
  165. };
  166. macb1: ethernet@f8030000 {
  167. compatible = "cdns,at32ap7000-macb", "cdns,macb";
  168. reg = <0xf8030000 0x100>;
  169. interrupts = <27 4 3>;
  170. status = "disabled";
  171. };
  172. adc0: adc@f804c000 {
  173. compatible = "atmel,at91sam9260-adc";
  174. reg = <0xf804c000 0x100>;
  175. interrupts = <19 4 0>;
  176. atmel,adc-use-external;
  177. atmel,adc-channels-used = <0xffff>;
  178. atmel,adc-vref = <3300>;
  179. atmel,adc-num-channels = <12>;
  180. atmel,adc-startup-time = <40>;
  181. atmel,adc-channel-base = <0x50>;
  182. atmel,adc-drdy-mask = <0x1000000>;
  183. atmel,adc-status-register = <0x30>;
  184. atmel,adc-trigger-register = <0xc0>;
  185. trigger@0 {
  186. trigger-name = "external-rising";
  187. trigger-value = <0x1>;
  188. trigger-external;
  189. };
  190. trigger@1 {
  191. trigger-name = "external-falling";
  192. trigger-value = <0x2>;
  193. trigger-external;
  194. };
  195. trigger@2 {
  196. trigger-name = "external-any";
  197. trigger-value = <0x3>;
  198. trigger-external;
  199. };
  200. trigger@3 {
  201. trigger-name = "continuous";
  202. trigger-value = <0x6>;
  203. };
  204. };
  205. };
  206. nand0: nand@40000000 {
  207. compatible = "atmel,at91rm9200-nand";
  208. #address-cells = <1>;
  209. #size-cells = <1>;
  210. reg = <0x40000000 0x10000000
  211. >;
  212. atmel,nand-addr-offset = <21>;
  213. atmel,nand-cmd-offset = <22>;
  214. gpios = <&pioD 5 0
  215. &pioD 4 0
  216. 0
  217. >;
  218. status = "disabled";
  219. };
  220. usb0: ohci@00600000 {
  221. compatible = "atmel,at91rm9200-ohci", "usb-ohci";
  222. reg = <0x00600000 0x100000>;
  223. interrupts = <22 4 2>;
  224. status = "disabled";
  225. };
  226. usb1: ehci@00700000 {
  227. compatible = "atmel,at91sam9g45-ehci", "usb-ehci";
  228. reg = <0x00700000 0x100000>;
  229. interrupts = <22 4 2>;
  230. status = "disabled";
  231. };
  232. };
  233. i2c@0 {
  234. compatible = "i2c-gpio";
  235. gpios = <&pioA 30 0 /* sda */
  236. &pioA 31 0 /* scl */
  237. >;
  238. i2c-gpio,sda-open-drain;
  239. i2c-gpio,scl-open-drain;
  240. i2c-gpio,delay-us = <2>; /* ~100 kHz */
  241. #address-cells = <1>;
  242. #size-cells = <0>;
  243. status = "disabled";
  244. };
  245. i2c@1 {
  246. compatible = "i2c-gpio";
  247. gpios = <&pioC 0 0 /* sda */
  248. &pioC 1 0 /* scl */
  249. >;
  250. i2c-gpio,sda-open-drain;
  251. i2c-gpio,scl-open-drain;
  252. i2c-gpio,delay-us = <2>; /* ~100 kHz */
  253. #address-cells = <1>;
  254. #size-cells = <0>;
  255. status = "disabled";
  256. };
  257. i2c@2 {
  258. compatible = "i2c-gpio";
  259. gpios = <&pioB 4 0 /* sda */
  260. &pioB 5 0 /* scl */
  261. >;
  262. i2c-gpio,sda-open-drain;
  263. i2c-gpio,scl-open-drain;
  264. i2c-gpio,delay-us = <2>; /* ~100 kHz */
  265. #address-cells = <1>;
  266. #size-cells = <0>;
  267. status = "disabled";
  268. };
  269. };