at91sam9n12.dtsi 4.7 KB

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  1. /*
  2. * at91sam9n12.dtsi - Device Tree include file for AT91SAM9N12 SoC
  3. *
  4. * Copyright (C) 2012 Atmel,
  5. * 2012 Hong Xu <hong.xu@atmel.com>
  6. *
  7. * Licensed under GPLv2 or later.
  8. */
  9. /include/ "skeleton.dtsi"
  10. / {
  11. model = "Atmel AT91SAM9N12 SoC";
  12. compatible = "atmel,at91sam9n12";
  13. interrupt-parent = <&aic>;
  14. aliases {
  15. serial0 = &dbgu;
  16. serial1 = &usart0;
  17. serial2 = &usart1;
  18. serial3 = &usart2;
  19. serial4 = &usart3;
  20. gpio0 = &pioA;
  21. gpio1 = &pioB;
  22. gpio2 = &pioC;
  23. gpio3 = &pioD;
  24. tcb0 = &tcb0;
  25. tcb1 = &tcb1;
  26. };
  27. cpus {
  28. cpu@0 {
  29. compatible = "arm,arm926ejs";
  30. };
  31. };
  32. memory {
  33. reg = <0x20000000 0x10000000>;
  34. };
  35. ahb {
  36. compatible = "simple-bus";
  37. #address-cells = <1>;
  38. #size-cells = <1>;
  39. ranges;
  40. apb {
  41. compatible = "simple-bus";
  42. #address-cells = <1>;
  43. #size-cells = <1>;
  44. ranges;
  45. aic: interrupt-controller@fffff000 {
  46. #interrupt-cells = <3>;
  47. compatible = "atmel,at91rm9200-aic";
  48. interrupt-controller;
  49. reg = <0xfffff000 0x200>;
  50. };
  51. ramc0: ramc@ffffe800 {
  52. compatible = "atmel,at91sam9g45-ddramc";
  53. reg = <0xffffe800 0x200>;
  54. };
  55. pmc: pmc@fffffc00 {
  56. compatible = "atmel,at91rm9200-pmc";
  57. reg = <0xfffffc00 0x100>;
  58. };
  59. rstc@fffffe00 {
  60. compatible = "atmel,at91sam9g45-rstc";
  61. reg = <0xfffffe00 0x10>;
  62. };
  63. pit: timer@fffffe30 {
  64. compatible = "atmel,at91sam9260-pit";
  65. reg = <0xfffffe30 0xf>;
  66. interrupts = <1 4 7>;
  67. };
  68. shdwc@fffffe10 {
  69. compatible = "atmel,at91sam9x5-shdwc";
  70. reg = <0xfffffe10 0x10>;
  71. };
  72. tcb0: timer@f8008000 {
  73. compatible = "atmel,at91sam9x5-tcb";
  74. reg = <0xf8008000 0x100>;
  75. interrupts = <17 4 0>;
  76. };
  77. tcb1: timer@f800c000 {
  78. compatible = "atmel,at91sam9x5-tcb";
  79. reg = <0xf800c000 0x100>;
  80. interrupts = <17 4 0>;
  81. };
  82. dma: dma-controller@ffffec00 {
  83. compatible = "atmel,at91sam9g45-dma";
  84. reg = <0xffffec00 0x200>;
  85. interrupts = <20 4 0>;
  86. };
  87. pioA: gpio@fffff400 {
  88. compatible = "atmel,at91sam9x5-gpio", "atmel,at91rm9200-gpio";
  89. reg = <0xfffff400 0x100>;
  90. interrupts = <2 4 1>;
  91. #gpio-cells = <2>;
  92. gpio-controller;
  93. interrupt-controller;
  94. #interrupt-cells = <2>;
  95. };
  96. pioB: gpio@fffff600 {
  97. compatible = "atmel,at91sam9x5-gpio", "atmel,at91rm9200-gpio";
  98. reg = <0xfffff600 0x100>;
  99. interrupts = <2 4 1>;
  100. #gpio-cells = <2>;
  101. gpio-controller;
  102. interrupt-controller;
  103. #interrupt-cells = <2>;
  104. };
  105. pioC: gpio@fffff800 {
  106. compatible = "atmel,at91sam9x5-gpio", "atmel,at91rm9200-gpio";
  107. reg = <0xfffff800 0x100>;
  108. interrupts = <3 4 1>;
  109. #gpio-cells = <2>;
  110. gpio-controller;
  111. interrupt-controller;
  112. #interrupt-cells = <2>;
  113. };
  114. pioD: gpio@fffffa00 {
  115. compatible = "atmel,at91sam9x5-gpio", "atmel,at91rm9200-gpio";
  116. reg = <0xfffffa00 0x100>;
  117. interrupts = <3 4 1>;
  118. #gpio-cells = <2>;
  119. gpio-controller;
  120. interrupt-controller;
  121. #interrupt-cells = <2>;
  122. };
  123. dbgu: serial@fffff200 {
  124. compatible = "atmel,at91sam9260-usart";
  125. reg = <0xfffff200 0x200>;
  126. interrupts = <1 4 7>;
  127. status = "disabled";
  128. };
  129. usart0: serial@f801c000 {
  130. compatible = "atmel,at91sam9260-usart";
  131. reg = <0xf801c000 0x4000>;
  132. interrupts = <5 4 5>;
  133. atmel,use-dma-rx;
  134. atmel,use-dma-tx;
  135. status = "disabled";
  136. };
  137. usart1: serial@f8020000 {
  138. compatible = "atmel,at91sam9260-usart";
  139. reg = <0xf8020000 0x4000>;
  140. interrupts = <6 4 5>;
  141. atmel,use-dma-rx;
  142. atmel,use-dma-tx;
  143. status = "disabled";
  144. };
  145. usart2: serial@f8024000 {
  146. compatible = "atmel,at91sam9260-usart";
  147. reg = <0xf8024000 0x4000>;
  148. interrupts = <7 4 5>;
  149. atmel,use-dma-rx;
  150. atmel,use-dma-tx;
  151. status = "disabled";
  152. };
  153. usart3: serial@f8028000 {
  154. compatible = "atmel,at91sam9260-usart";
  155. reg = <0xf8028000 0x4000>;
  156. interrupts = <8 4 5>;
  157. atmel,use-dma-rx;
  158. atmel,use-dma-tx;
  159. status = "disabled";
  160. };
  161. };
  162. nand0: nand@40000000 {
  163. compatible = "atmel,at91rm9200-nand";
  164. #address-cells = <1>;
  165. #size-cells = <1>;
  166. reg = < 0x40000000 0x10000000
  167. 0xffffe000 0x00000600
  168. 0xffffe600 0x00000200
  169. 0x00100000 0x00100000
  170. >;
  171. atmel,nand-addr-offset = <21>;
  172. atmel,nand-cmd-offset = <22>;
  173. gpios = <&pioD 5 0
  174. &pioD 4 0
  175. 0
  176. >;
  177. status = "disabled";
  178. };
  179. usb0: ohci@00500000 {
  180. compatible = "atmel,at91rm9200-ohci", "usb-ohci";
  181. reg = <0x00500000 0x00100000>;
  182. interrupts = <22 4 2>;
  183. status = "disabled";
  184. };
  185. };
  186. i2c@0 {
  187. compatible = "i2c-gpio";
  188. gpios = <&pioA 30 0 /* sda */
  189. &pioA 31 0 /* scl */
  190. >;
  191. i2c-gpio,sda-open-drain;
  192. i2c-gpio,scl-open-drain;
  193. i2c-gpio,delay-us = <2>; /* ~100 kHz */
  194. #address-cells = <1>;
  195. #size-cells = <0>;
  196. status = "disabled";
  197. };
  198. };