at91sam9g45.dtsi 6.1 KB

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  1. /*
  2. * at91sam9g45.dtsi - Device Tree Include file for AT91SAM9G45 family SoC
  3. * applies to AT91SAM9G45, AT91SAM9M10,
  4. * AT91SAM9G46, AT91SAM9M11 SoC
  5. *
  6. * Copyright (C) 2011 Atmel,
  7. * 2011 Nicolas Ferre <nicolas.ferre@atmel.com>
  8. *
  9. * Licensed under GPLv2 or later.
  10. */
  11. /include/ "skeleton.dtsi"
  12. / {
  13. model = "Atmel AT91SAM9G45 family SoC";
  14. compatible = "atmel,at91sam9g45";
  15. interrupt-parent = <&aic>;
  16. aliases {
  17. serial0 = &dbgu;
  18. serial1 = &usart0;
  19. serial2 = &usart1;
  20. serial3 = &usart2;
  21. serial4 = &usart3;
  22. gpio0 = &pioA;
  23. gpio1 = &pioB;
  24. gpio2 = &pioC;
  25. gpio3 = &pioD;
  26. gpio4 = &pioE;
  27. tcb0 = &tcb0;
  28. tcb1 = &tcb1;
  29. };
  30. cpus {
  31. cpu@0 {
  32. compatible = "arm,arm926ejs";
  33. };
  34. };
  35. memory {
  36. reg = <0x70000000 0x10000000>;
  37. };
  38. ahb {
  39. compatible = "simple-bus";
  40. #address-cells = <1>;
  41. #size-cells = <1>;
  42. ranges;
  43. apb {
  44. compatible = "simple-bus";
  45. #address-cells = <1>;
  46. #size-cells = <1>;
  47. ranges;
  48. aic: interrupt-controller@fffff000 {
  49. #interrupt-cells = <3>;
  50. compatible = "atmel,at91rm9200-aic";
  51. interrupt-controller;
  52. reg = <0xfffff000 0x200>;
  53. atmel,external-irqs = <31>;
  54. };
  55. ramc0: ramc@ffffe400 {
  56. compatible = "atmel,at91sam9g45-ddramc";
  57. reg = <0xffffe400 0x200
  58. 0xffffe600 0x200>;
  59. };
  60. pmc: pmc@fffffc00 {
  61. compatible = "atmel,at91rm9200-pmc";
  62. reg = <0xfffffc00 0x100>;
  63. };
  64. rstc@fffffd00 {
  65. compatible = "atmel,at91sam9g45-rstc";
  66. reg = <0xfffffd00 0x10>;
  67. };
  68. pit: timer@fffffd30 {
  69. compatible = "atmel,at91sam9260-pit";
  70. reg = <0xfffffd30 0xf>;
  71. interrupts = <1 4 7>;
  72. };
  73. shdwc@fffffd10 {
  74. compatible = "atmel,at91sam9rl-shdwc";
  75. reg = <0xfffffd10 0x10>;
  76. };
  77. tcb0: timer@fff7c000 {
  78. compatible = "atmel,at91rm9200-tcb";
  79. reg = <0xfff7c000 0x100>;
  80. interrupts = <18 4 0>;
  81. };
  82. tcb1: timer@fffd4000 {
  83. compatible = "atmel,at91rm9200-tcb";
  84. reg = <0xfffd4000 0x100>;
  85. interrupts = <18 4 0>;
  86. };
  87. dma: dma-controller@ffffec00 {
  88. compatible = "atmel,at91sam9g45-dma";
  89. reg = <0xffffec00 0x200>;
  90. interrupts = <21 4 0>;
  91. };
  92. pioA: gpio@fffff200 {
  93. compatible = "atmel,at91rm9200-gpio";
  94. reg = <0xfffff200 0x100>;
  95. interrupts = <2 4 1>;
  96. #gpio-cells = <2>;
  97. gpio-controller;
  98. interrupt-controller;
  99. #interrupt-cells = <2>;
  100. };
  101. pioB: gpio@fffff400 {
  102. compatible = "atmel,at91rm9200-gpio";
  103. reg = <0xfffff400 0x100>;
  104. interrupts = <3 4 1>;
  105. #gpio-cells = <2>;
  106. gpio-controller;
  107. interrupt-controller;
  108. #interrupt-cells = <2>;
  109. };
  110. pioC: gpio@fffff600 {
  111. compatible = "atmel,at91rm9200-gpio";
  112. reg = <0xfffff600 0x100>;
  113. interrupts = <4 4 1>;
  114. #gpio-cells = <2>;
  115. gpio-controller;
  116. interrupt-controller;
  117. #interrupt-cells = <2>;
  118. };
  119. pioD: gpio@fffff800 {
  120. compatible = "atmel,at91rm9200-gpio";
  121. reg = <0xfffff800 0x100>;
  122. interrupts = <5 4 1>;
  123. #gpio-cells = <2>;
  124. gpio-controller;
  125. interrupt-controller;
  126. #interrupt-cells = <2>;
  127. };
  128. pioE: gpio@fffffa00 {
  129. compatible = "atmel,at91rm9200-gpio";
  130. reg = <0xfffffa00 0x100>;
  131. interrupts = <5 4 1>;
  132. #gpio-cells = <2>;
  133. gpio-controller;
  134. interrupt-controller;
  135. #interrupt-cells = <2>;
  136. };
  137. dbgu: serial@ffffee00 {
  138. compatible = "atmel,at91sam9260-usart";
  139. reg = <0xffffee00 0x200>;
  140. interrupts = <1 4 7>;
  141. status = "disabled";
  142. };
  143. usart0: serial@fff8c000 {
  144. compatible = "atmel,at91sam9260-usart";
  145. reg = <0xfff8c000 0x200>;
  146. interrupts = <7 4 5>;
  147. atmel,use-dma-rx;
  148. atmel,use-dma-tx;
  149. status = "disabled";
  150. };
  151. usart1: serial@fff90000 {
  152. compatible = "atmel,at91sam9260-usart";
  153. reg = <0xfff90000 0x200>;
  154. interrupts = <8 4 5>;
  155. atmel,use-dma-rx;
  156. atmel,use-dma-tx;
  157. status = "disabled";
  158. };
  159. usart2: serial@fff94000 {
  160. compatible = "atmel,at91sam9260-usart";
  161. reg = <0xfff94000 0x200>;
  162. interrupts = <9 4 5>;
  163. atmel,use-dma-rx;
  164. atmel,use-dma-tx;
  165. status = "disabled";
  166. };
  167. usart3: serial@fff98000 {
  168. compatible = "atmel,at91sam9260-usart";
  169. reg = <0xfff98000 0x200>;
  170. interrupts = <10 4 5>;
  171. atmel,use-dma-rx;
  172. atmel,use-dma-tx;
  173. status = "disabled";
  174. };
  175. macb0: ethernet@fffbc000 {
  176. compatible = "cdns,at32ap7000-macb", "cdns,macb";
  177. reg = <0xfffbc000 0x100>;
  178. interrupts = <25 4 3>;
  179. status = "disabled";
  180. };
  181. adc0: adc@fffb0000 {
  182. compatible = "atmel,at91sam9260-adc";
  183. reg = <0xfffb0000 0x100>;
  184. interrupts = <20 4 0>;
  185. atmel,adc-use-external-triggers;
  186. atmel,adc-channels-used = <0xff>;
  187. atmel,adc-vref = <3300>;
  188. atmel,adc-num-channels = <8>;
  189. atmel,adc-startup-time = <40>;
  190. atmel,adc-channel-base = <0x30>;
  191. atmel,adc-drdy-mask = <0x10000>;
  192. atmel,adc-status-register = <0x1c>;
  193. atmel,adc-trigger-register = <0x08>;
  194. trigger@0 {
  195. trigger-name = "external-rising";
  196. trigger-value = <0x1>;
  197. trigger-external;
  198. };
  199. trigger@1 {
  200. trigger-name = "external-falling";
  201. trigger-value = <0x2>;
  202. trigger-external;
  203. };
  204. trigger@2 {
  205. trigger-name = "external-any";
  206. trigger-value = <0x3>;
  207. trigger-external;
  208. };
  209. trigger@3 {
  210. trigger-name = "continuous";
  211. trigger-value = <0x6>;
  212. };
  213. };
  214. };
  215. nand0: nand@40000000 {
  216. compatible = "atmel,at91rm9200-nand";
  217. #address-cells = <1>;
  218. #size-cells = <1>;
  219. reg = <0x40000000 0x10000000
  220. 0xffffe200 0x200
  221. >;
  222. atmel,nand-addr-offset = <21>;
  223. atmel,nand-cmd-offset = <22>;
  224. gpios = <&pioC 8 0
  225. &pioC 14 0
  226. 0
  227. >;
  228. status = "disabled";
  229. };
  230. usb0: ohci@00700000 {
  231. compatible = "atmel,at91rm9200-ohci", "usb-ohci";
  232. reg = <0x00700000 0x100000>;
  233. interrupts = <22 4 2>;
  234. status = "disabled";
  235. };
  236. usb1: ehci@00800000 {
  237. compatible = "atmel,at91sam9g45-ehci", "usb-ehci";
  238. reg = <0x00800000 0x100000>;
  239. interrupts = <22 4 2>;
  240. status = "disabled";
  241. };
  242. };
  243. i2c@0 {
  244. compatible = "i2c-gpio";
  245. gpios = <&pioA 20 0 /* sda */
  246. &pioA 21 0 /* scl */
  247. >;
  248. i2c-gpio,sda-open-drain;
  249. i2c-gpio,scl-open-drain;
  250. i2c-gpio,delay-us = <5>; /* ~100 kHz */
  251. #address-cells = <1>;
  252. #size-cells = <0>;
  253. status = "disabled";
  254. };
  255. };