mantis_hif.c 6.1 KB

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  1. /*
  2. Mantis PCI bridge driver
  3. Copyright (C) 2005, 2006 Manu Abraham (abraham.manu@gmail.com)
  4. This program is free software; you can redistribute it and/or modify
  5. it under the terms of the GNU General Public License as published by
  6. the Free Software Foundation; either version 2 of the License, or
  7. (at your option) any later version.
  8. This program is distributed in the hope that it will be useful,
  9. but WITHOUT ANY WARRANTY; without even the implied warranty of
  10. MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
  11. GNU General Public License for more details.
  12. You should have received a copy of the GNU General Public License
  13. along with this program; if not, write to the Free Software
  14. Foundation, Inc., 675 Mass Ave, Cambridge, MA 02139, USA.
  15. */
  16. #include "mantis_common.h"
  17. #include "mantis_hif.h"
  18. #include "mantis_link.h" /* temporary due to physical layer stuff */
  19. static int mantis_hif_data_available(struct mantis_ca *ca)
  20. {
  21. struct mantis_pci *mantis = ca->ca_priv;
  22. int rc = 0;
  23. if (wait_event_interruptible_timeout(ca->hif_data_wq,
  24. ca->sbuf_status & MANTIS_SBUF_DATA_AVAIL,
  25. msecs_to_jiffies(500)) == -ERESTARTSYS) {
  26. dprintk(verbose, MANTIS_ERROR, 1, "Adapter(%d) Slot(0): HIF Read wait event timeout !", mantis->num);
  27. rc = -EREMOTEIO;
  28. }
  29. ca->sbuf_status &= ~MANTIS_SBUF_DATA_AVAIL;
  30. udelay(2);
  31. return rc;
  32. }
  33. static int mantis_hif_sbuf_opdone_wait(struct mantis_ca *ca)
  34. {
  35. struct mantis_pci *mantis = ca->ca_priv;
  36. int rc = 0;
  37. if (wait_event_interruptible_timeout(ca->hif_opdone_wq,
  38. ca->hif_event & MANTIS_SBUF_OPDONE,
  39. msecs_to_jiffies(500)) == -ERESTARTSYS) {
  40. dprintk(verbose, MANTIS_ERROR, 1, "Adapter(%d) Slot(0): Smart buffer operation timeout !", mantis->num);
  41. rc = -EREMOTEIO;
  42. }
  43. dprintk(verbose, MANTIS_DEBUG, 1, "Smart Buffer Operation complete");
  44. ca->hif_event &= ~MANTIS_SBUF_OPDONE;
  45. udelay(5);
  46. return rc;
  47. }
  48. int mantis_hif_read_mem(struct mantis_ca *ca, u32 addr)
  49. {
  50. struct mantis_pci *mantis = ca->ca_priv;
  51. u32 hif_addr = 0, data, count = 4;
  52. dprintk(verbose, MANTIS_DEBUG, 1, "Adapter(%d) Slot(0): Request HIF Mem Read", mantis->num);
  53. hif_addr |= MANTIS_GPIF_HIFRDWRN;
  54. hif_addr &= ~MANTIS_GPIF_PCMCIAREG;
  55. hif_addr &= ~MANTIS_GPIF_PCMCIAIOM;
  56. hif_addr |= addr;
  57. mmwrite(hif_addr | MANTIS_HIF_STATUS, MANTIS_GPIF_BRADDR);
  58. mmwrite(count, MANTIS_GPIF_BRBYTES);
  59. udelay(20);
  60. mmwrite(hif_addr, MANTIS_GPIF_ADDR);
  61. if (mantis_hif_sbuf_opdone_wait(ca) != 0) {
  62. dprintk(verbose, MANTIS_ERROR, 1, "Adapter(%d) Slot(0): GPIF Smart Buffer operation failed", mantis->num);
  63. return -EREMOTEIO;
  64. }
  65. data = mmread(MANTIS_GPIF_DIN);
  66. dprintk(verbose, MANTIS_DEBUG, 1, "Mem Read: 0x%02x", data);
  67. return (data >> 24) & 0xff;
  68. }
  69. int mantis_hif_write_mem(struct mantis_ca *ca, u32 addr, u8 data)
  70. {
  71. struct mantis_slot *slot = ca->slot;
  72. struct mantis_pci *mantis = ca->ca_priv;
  73. u32 hif_addr = 0;
  74. dprintk(verbose, MANTIS_DEBUG, 1, "Adapter(%d) Slot(0): Request HIF Mem Write", mantis->num);
  75. hif_addr &= ~MANTIS_GPIF_HIFRDWRN;
  76. hif_addr &= ~MANTIS_GPIF_PCMCIAREG;
  77. hif_addr &= ~MANTIS_GPIF_PCMCIAIOM;
  78. hif_addr |= addr;
  79. mmwrite(slot->slave_cfg, MANTIS_GPIF_CFGSLA); /* Slot0 alone for now */
  80. mmwrite(hif_addr | MANTIS_HIF_STATUS, MANTIS_GPIF_ADDR);
  81. mmwrite(data, MANTIS_GPIF_DOUT);
  82. ca->hif_job_queue = MANTIS_HIF_MEMWR;
  83. if (mantis_hif_sbuf_opdone_wait(ca) != 0) {
  84. ca->hif_job_queue &= ~MANTIS_HIF_MEMWR;
  85. dprintk(verbose, MANTIS_ERROR, 1, "Adapter(%d) Slot(0): HIF Smart Buffer operation failed", mantis->num);
  86. return -EREMOTEIO;
  87. }
  88. ca->hif_job_queue &= ~MANTIS_HIF_MEMWR;
  89. dprintk(verbose, MANTIS_DEBUG, 1, "Mem Write: (0x%02x to 0x%02x)", data, addr);
  90. return 0;
  91. }
  92. int mantis_hif_read_iom(struct mantis_ca *ca, u32 addr)
  93. {
  94. struct mantis_pci *mantis = ca->ca_priv;
  95. u32 data, hif_addr = 0;
  96. dprintk(verbose, MANTIS_DEBUG, 1, "Adapter(%d) Slot(0): Request HIF I/O Read", mantis->num);
  97. hif_addr &= ~MANTIS_GPIF_PCMCIAREG;
  98. hif_addr |= MANTIS_GPIF_HIFRDWRN;
  99. hif_addr |= MANTIS_GPIF_PCMCIAIOM;
  100. hif_addr |= addr;
  101. mmwrite(hif_addr | MANTIS_HIF_STATUS, MANTIS_GPIF_ADDR);
  102. ca->hif_job_queue = MANTIS_HIF_IOMRD;
  103. if (mantis_hif_sbuf_opdone_wait(ca) != 0) {
  104. ca->hif_job_queue &= ~MANTIS_HIF_IOMRD;
  105. dprintk(verbose, MANTIS_ERROR, 1, "Adapter(%d) Slot(0): HIF Smart Buffer operation failed", mantis->num);
  106. return -EREMOTEIO;
  107. }
  108. ca->hif_job_queue &= ~MANTIS_HIF_IOMRD;
  109. data = mmread(MANTIS_GPIF_DIN);
  110. dprintk(verbose, MANTIS_DEBUG, 1, "I/O Read: 0x%02x", data);
  111. udelay(50);
  112. return (u8) data;
  113. }
  114. int mantis_hif_write_iom(struct mantis_ca *ca, u32 addr, u8 data)
  115. {
  116. struct mantis_pci *mantis = ca->ca_priv;
  117. u32 hif_addr = 0;
  118. dprintk(verbose, MANTIS_DEBUG, 1, "Adapter(%d) Slot(0): Request HIF I/O Write", mantis->num);
  119. hif_addr &= ~MANTIS_GPIF_PCMCIAREG;
  120. hif_addr &= ~MANTIS_GPIF_HIFRDWRN;
  121. hif_addr |= MANTIS_GPIF_PCMCIAIOM;
  122. hif_addr |= addr;
  123. mmwrite(hif_addr | MANTIS_HIF_STATUS, MANTIS_GPIF_ADDR);
  124. mmwrite(data, MANTIS_GPIF_DOUT);
  125. ca->hif_job_queue = MANTIS_HIF_IOMWR;
  126. if (mantis_hif_sbuf_opdone_wait(ca) != 0) {
  127. ca->hif_job_queue &= ~MANTIS_HIF_IOMWR;
  128. dprintk(verbose, MANTIS_ERROR, 1, "Adapter(%d) Slot(0): HIF Smart Buffer operation failed", mantis->num);
  129. return -EREMOTEIO;
  130. }
  131. ca->hif_job_queue &= ~MANTIS_HIF_IOMWR;
  132. dprintk(verbose, MANTIS_DEBUG, 1, "I/O Write: (0x%02x to 0x%02x)", data, addr);
  133. udelay(50);
  134. return 0;
  135. }
  136. int mantis_hif_init(struct mantis_ca *ca)
  137. {
  138. struct mantis_slot *slot = ca->slot;
  139. struct mantis_pci *mantis = ca->ca_priv;
  140. u32 irqcfg;
  141. slot[0].slave_cfg = 0x70773028;
  142. dprintk(verbose, MANTIS_ERROR, 1, "Adapter(%d) Initializing Mantis Host Interface", mantis->num);
  143. init_waitqueue_head(&ca->hif_data_wq);
  144. init_waitqueue_head(&ca->hif_opdone_wq);
  145. irqcfg = mmread(MANTIS_GPIF_IRQCFG);
  146. irqcfg = MANTIS_MASK_BRRDY |
  147. MANTIS_MASK_WRACK |
  148. MANTIS_MASK_EXTIRQ |
  149. MANTIS_MASK_WSTO |
  150. MANTIS_MASK_OTHERR |
  151. MANTIS_MASK_OVFLW;
  152. mmwrite(irqcfg, MANTIS_GPIF_IRQCFG);
  153. return 0;
  154. }
  155. void mantis_hif_exit(struct mantis_ca *ca)
  156. {
  157. struct mantis_pci *mantis = ca->ca_priv;
  158. u32 irqcfg;
  159. dprintk(verbose, MANTIS_ERROR, 1, "Adapter(%d) Exiting Mantis Host Interface", mantis->num);
  160. irqcfg = mmread(MANTIS_GPIF_IRQCFG);
  161. irqcfg &= ~MANTIS_MASK_BRRDY;
  162. mmwrite(irqcfg, MANTIS_GPIF_IRQCFG);
  163. }