exynos_thermal.c 27 KB

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  1. /*
  2. * exynos_thermal.c - Samsung EXYNOS TMU (Thermal Management Unit)
  3. *
  4. * Copyright (C) 2011 Samsung Electronics
  5. * Donggeun Kim <dg77.kim@samsung.com>
  6. * Amit Daniel Kachhap <amit.kachhap@linaro.org>
  7. *
  8. * This program is free software; you can redistribute it and/or modify
  9. * it under the terms of the GNU General Public License as published by
  10. * the Free Software Foundation; either version 2 of the License, or
  11. * (at your option) any later version.
  12. *
  13. * This program is distributed in the hope that it will be useful,
  14. * but WITHOUT ANY WARRANTY; without even the implied warranty of
  15. * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
  16. * GNU General Public License for more details.
  17. *
  18. * You should have received a copy of the GNU General Public License
  19. * along with this program; if not, write to the Free Software
  20. * Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA
  21. *
  22. */
  23. #include <linux/module.h>
  24. #include <linux/err.h>
  25. #include <linux/kernel.h>
  26. #include <linux/slab.h>
  27. #include <linux/platform_device.h>
  28. #include <linux/interrupt.h>
  29. #include <linux/clk.h>
  30. #include <linux/workqueue.h>
  31. #include <linux/sysfs.h>
  32. #include <linux/kobject.h>
  33. #include <linux/io.h>
  34. #include <linux/mutex.h>
  35. #include <linux/platform_data/exynos_thermal.h>
  36. #include <linux/thermal.h>
  37. #include <linux/cpufreq.h>
  38. #include <linux/cpu_cooling.h>
  39. #include <linux/of.h>
  40. #include <plat/cpu.h>
  41. /* Exynos generic registers */
  42. #define EXYNOS_TMU_REG_TRIMINFO 0x0
  43. #define EXYNOS_TMU_REG_CONTROL 0x20
  44. #define EXYNOS_TMU_REG_STATUS 0x28
  45. #define EXYNOS_TMU_REG_CURRENT_TEMP 0x40
  46. #define EXYNOS_TMU_REG_INTEN 0x70
  47. #define EXYNOS_TMU_REG_INTSTAT 0x74
  48. #define EXYNOS_TMU_REG_INTCLEAR 0x78
  49. #define EXYNOS_TMU_TRIM_TEMP_MASK 0xff
  50. #define EXYNOS_TMU_GAIN_SHIFT 8
  51. #define EXYNOS_TMU_REF_VOLTAGE_SHIFT 24
  52. #define EXYNOS_TMU_CORE_ON 3
  53. #define EXYNOS_TMU_CORE_OFF 2
  54. #define EXYNOS_TMU_DEF_CODE_TO_TEMP_OFFSET 50
  55. /* Exynos4210 specific registers */
  56. #define EXYNOS4210_TMU_REG_THRESHOLD_TEMP 0x44
  57. #define EXYNOS4210_TMU_REG_TRIG_LEVEL0 0x50
  58. #define EXYNOS4210_TMU_REG_TRIG_LEVEL1 0x54
  59. #define EXYNOS4210_TMU_REG_TRIG_LEVEL2 0x58
  60. #define EXYNOS4210_TMU_REG_TRIG_LEVEL3 0x5C
  61. #define EXYNOS4210_TMU_REG_PAST_TEMP0 0x60
  62. #define EXYNOS4210_TMU_REG_PAST_TEMP1 0x64
  63. #define EXYNOS4210_TMU_REG_PAST_TEMP2 0x68
  64. #define EXYNOS4210_TMU_REG_PAST_TEMP3 0x6C
  65. #define EXYNOS4210_TMU_TRIG_LEVEL0_MASK 0x1
  66. #define EXYNOS4210_TMU_TRIG_LEVEL1_MASK 0x10
  67. #define EXYNOS4210_TMU_TRIG_LEVEL2_MASK 0x100
  68. #define EXYNOS4210_TMU_TRIG_LEVEL3_MASK 0x1000
  69. #define EXYNOS4210_TMU_INTCLEAR_VAL 0x1111
  70. /* Exynos5250 and Exynos4412 specific registers */
  71. #define EXYNOS_TMU_TRIMINFO_CON 0x14
  72. #define EXYNOS_THD_TEMP_RISE 0x50
  73. #define EXYNOS_THD_TEMP_FALL 0x54
  74. #define EXYNOS_EMUL_CON 0x80
  75. #define EXYNOS_TRIMINFO_RELOAD 0x1
  76. #define EXYNOS_TMU_CLEAR_RISE_INT 0x111
  77. #define EXYNOS_TMU_CLEAR_FALL_INT (0x111 << 12)
  78. #define EXYNOS_MUX_ADDR_VALUE 6
  79. #define EXYNOS_MUX_ADDR_SHIFT 20
  80. #define EXYNOS_TMU_TRIP_MODE_SHIFT 13
  81. #define EFUSE_MIN_VALUE 40
  82. #define EFUSE_MAX_VALUE 100
  83. /* In-kernel thermal framework related macros & definations */
  84. #define SENSOR_NAME_LEN 16
  85. #define MAX_TRIP_COUNT 8
  86. #define MAX_COOLING_DEVICE 4
  87. #define MAX_THRESHOLD_LEVS 4
  88. #define ACTIVE_INTERVAL 500
  89. #define IDLE_INTERVAL 10000
  90. #define MCELSIUS 1000
  91. #ifdef CONFIG_THERMAL_EMULATION
  92. #define EXYNOS_EMUL_TIME 0x57F0
  93. #define EXYNOS_EMUL_TIME_SHIFT 16
  94. #define EXYNOS_EMUL_DATA_SHIFT 8
  95. #define EXYNOS_EMUL_DATA_MASK 0xFF
  96. #define EXYNOS_EMUL_ENABLE 0x1
  97. #endif /* CONFIG_THERMAL_EMULATION */
  98. /* CPU Zone information */
  99. #define PANIC_ZONE 4
  100. #define WARN_ZONE 3
  101. #define MONITOR_ZONE 2
  102. #define SAFE_ZONE 1
  103. #define GET_ZONE(trip) (trip + 2)
  104. #define GET_TRIP(zone) (zone - 2)
  105. #define EXYNOS_ZONE_COUNT 3
  106. struct exynos_tmu_data {
  107. struct exynos_tmu_platform_data *pdata;
  108. struct resource *mem;
  109. void __iomem *base;
  110. int irq;
  111. enum soc_type soc;
  112. struct work_struct irq_work;
  113. struct mutex lock;
  114. struct clk *clk;
  115. u8 temp_error1, temp_error2;
  116. };
  117. struct thermal_trip_point_conf {
  118. int trip_val[MAX_TRIP_COUNT];
  119. int trip_count;
  120. u8 trigger_falling;
  121. };
  122. struct thermal_cooling_conf {
  123. struct freq_clip_table freq_data[MAX_TRIP_COUNT];
  124. int freq_clip_count;
  125. };
  126. struct thermal_sensor_conf {
  127. char name[SENSOR_NAME_LEN];
  128. int (*read_temperature)(void *data);
  129. int (*write_emul_temp)(void *drv_data, unsigned long temp);
  130. struct thermal_trip_point_conf trip_data;
  131. struct thermal_cooling_conf cooling_data;
  132. void *private_data;
  133. };
  134. struct exynos_thermal_zone {
  135. enum thermal_device_mode mode;
  136. struct thermal_zone_device *therm_dev;
  137. struct thermal_cooling_device *cool_dev[MAX_COOLING_DEVICE];
  138. unsigned int cool_dev_size;
  139. struct platform_device *exynos4_dev;
  140. struct thermal_sensor_conf *sensor_conf;
  141. bool bind;
  142. };
  143. static struct exynos_thermal_zone *th_zone;
  144. static void exynos_unregister_thermal(void);
  145. static int exynos_register_thermal(struct thermal_sensor_conf *sensor_conf);
  146. /* Get mode callback functions for thermal zone */
  147. static int exynos_get_mode(struct thermal_zone_device *thermal,
  148. enum thermal_device_mode *mode)
  149. {
  150. if (th_zone)
  151. *mode = th_zone->mode;
  152. return 0;
  153. }
  154. /* Set mode callback functions for thermal zone */
  155. static int exynos_set_mode(struct thermal_zone_device *thermal,
  156. enum thermal_device_mode mode)
  157. {
  158. if (!th_zone->therm_dev) {
  159. pr_notice("thermal zone not registered\n");
  160. return 0;
  161. }
  162. mutex_lock(&th_zone->therm_dev->lock);
  163. if (mode == THERMAL_DEVICE_ENABLED &&
  164. !th_zone->sensor_conf->trip_data.trigger_falling)
  165. th_zone->therm_dev->polling_delay = IDLE_INTERVAL;
  166. else
  167. th_zone->therm_dev->polling_delay = 0;
  168. mutex_unlock(&th_zone->therm_dev->lock);
  169. th_zone->mode = mode;
  170. thermal_zone_device_update(th_zone->therm_dev);
  171. pr_info("thermal polling set for duration=%d msec\n",
  172. th_zone->therm_dev->polling_delay);
  173. return 0;
  174. }
  175. /* Get trip type callback functions for thermal zone */
  176. static int exynos_get_trip_type(struct thermal_zone_device *thermal, int trip,
  177. enum thermal_trip_type *type)
  178. {
  179. switch (GET_ZONE(trip)) {
  180. case MONITOR_ZONE:
  181. case WARN_ZONE:
  182. *type = THERMAL_TRIP_ACTIVE;
  183. break;
  184. case PANIC_ZONE:
  185. *type = THERMAL_TRIP_CRITICAL;
  186. break;
  187. default:
  188. return -EINVAL;
  189. }
  190. return 0;
  191. }
  192. /* Get trip temperature callback functions for thermal zone */
  193. static int exynos_get_trip_temp(struct thermal_zone_device *thermal, int trip,
  194. unsigned long *temp)
  195. {
  196. if (trip < GET_TRIP(MONITOR_ZONE) || trip > GET_TRIP(PANIC_ZONE))
  197. return -EINVAL;
  198. *temp = th_zone->sensor_conf->trip_data.trip_val[trip];
  199. /* convert the temperature into millicelsius */
  200. *temp = *temp * MCELSIUS;
  201. return 0;
  202. }
  203. /* Get critical temperature callback functions for thermal zone */
  204. static int exynos_get_crit_temp(struct thermal_zone_device *thermal,
  205. unsigned long *temp)
  206. {
  207. int ret;
  208. /* Panic zone */
  209. ret = exynos_get_trip_temp(thermal, GET_TRIP(PANIC_ZONE), temp);
  210. return ret;
  211. }
  212. /* Bind callback functions for thermal zone */
  213. static int exynos_bind(struct thermal_zone_device *thermal,
  214. struct thermal_cooling_device *cdev)
  215. {
  216. int ret = 0, i, tab_size, level;
  217. struct freq_clip_table *tab_ptr, *clip_data;
  218. struct thermal_sensor_conf *data = th_zone->sensor_conf;
  219. tab_ptr = (struct freq_clip_table *)data->cooling_data.freq_data;
  220. tab_size = data->cooling_data.freq_clip_count;
  221. if (tab_ptr == NULL || tab_size == 0)
  222. return -EINVAL;
  223. /* find the cooling device registered*/
  224. for (i = 0; i < th_zone->cool_dev_size; i++)
  225. if (cdev == th_zone->cool_dev[i])
  226. break;
  227. /* No matching cooling device */
  228. if (i == th_zone->cool_dev_size)
  229. return 0;
  230. /* Bind the thermal zone to the cpufreq cooling device */
  231. for (i = 0; i < tab_size; i++) {
  232. clip_data = (struct freq_clip_table *)&(tab_ptr[i]);
  233. level = cpufreq_cooling_get_level(0, clip_data->freq_clip_max);
  234. if (level == THERMAL_CSTATE_INVALID)
  235. return 0;
  236. switch (GET_ZONE(i)) {
  237. case MONITOR_ZONE:
  238. case WARN_ZONE:
  239. if (thermal_zone_bind_cooling_device(thermal, i, cdev,
  240. level, 0)) {
  241. pr_err("error binding cdev inst %d\n", i);
  242. ret = -EINVAL;
  243. }
  244. th_zone->bind = true;
  245. break;
  246. default:
  247. ret = -EINVAL;
  248. }
  249. }
  250. return ret;
  251. }
  252. /* Unbind callback functions for thermal zone */
  253. static int exynos_unbind(struct thermal_zone_device *thermal,
  254. struct thermal_cooling_device *cdev)
  255. {
  256. int ret = 0, i, tab_size;
  257. struct thermal_sensor_conf *data = th_zone->sensor_conf;
  258. if (th_zone->bind == false)
  259. return 0;
  260. tab_size = data->cooling_data.freq_clip_count;
  261. if (tab_size == 0)
  262. return -EINVAL;
  263. /* find the cooling device registered*/
  264. for (i = 0; i < th_zone->cool_dev_size; i++)
  265. if (cdev == th_zone->cool_dev[i])
  266. break;
  267. /* No matching cooling device */
  268. if (i == th_zone->cool_dev_size)
  269. return 0;
  270. /* Bind the thermal zone to the cpufreq cooling device */
  271. for (i = 0; i < tab_size; i++) {
  272. switch (GET_ZONE(i)) {
  273. case MONITOR_ZONE:
  274. case WARN_ZONE:
  275. if (thermal_zone_unbind_cooling_device(thermal, i,
  276. cdev)) {
  277. pr_err("error unbinding cdev inst=%d\n", i);
  278. ret = -EINVAL;
  279. }
  280. th_zone->bind = false;
  281. break;
  282. default:
  283. ret = -EINVAL;
  284. }
  285. }
  286. return ret;
  287. }
  288. /* Get temperature callback functions for thermal zone */
  289. static int exynos_get_temp(struct thermal_zone_device *thermal,
  290. unsigned long *temp)
  291. {
  292. void *data;
  293. if (!th_zone->sensor_conf) {
  294. pr_info("Temperature sensor not initialised\n");
  295. return -EINVAL;
  296. }
  297. data = th_zone->sensor_conf->private_data;
  298. *temp = th_zone->sensor_conf->read_temperature(data);
  299. /* convert the temperature into millicelsius */
  300. *temp = *temp * MCELSIUS;
  301. return 0;
  302. }
  303. /* Get temperature callback functions for thermal zone */
  304. static int exynos_set_emul_temp(struct thermal_zone_device *thermal,
  305. unsigned long temp)
  306. {
  307. void *data;
  308. int ret = -EINVAL;
  309. if (!th_zone->sensor_conf) {
  310. pr_info("Temperature sensor not initialised\n");
  311. return -EINVAL;
  312. }
  313. data = th_zone->sensor_conf->private_data;
  314. if (th_zone->sensor_conf->write_emul_temp)
  315. ret = th_zone->sensor_conf->write_emul_temp(data, temp);
  316. return ret;
  317. }
  318. /* Get the temperature trend */
  319. static int exynos_get_trend(struct thermal_zone_device *thermal,
  320. int trip, enum thermal_trend *trend)
  321. {
  322. int ret;
  323. unsigned long trip_temp;
  324. ret = exynos_get_trip_temp(thermal, trip, &trip_temp);
  325. if (ret < 0)
  326. return ret;
  327. if (thermal->temperature >= trip_temp)
  328. *trend = THERMAL_TREND_RAISE_FULL;
  329. else
  330. *trend = THERMAL_TREND_DROP_FULL;
  331. return 0;
  332. }
  333. /* Operation callback functions for thermal zone */
  334. static struct thermal_zone_device_ops const exynos_dev_ops = {
  335. .bind = exynos_bind,
  336. .unbind = exynos_unbind,
  337. .get_temp = exynos_get_temp,
  338. .set_emul_temp = exynos_set_emul_temp,
  339. .get_trend = exynos_get_trend,
  340. .get_mode = exynos_get_mode,
  341. .set_mode = exynos_set_mode,
  342. .get_trip_type = exynos_get_trip_type,
  343. .get_trip_temp = exynos_get_trip_temp,
  344. .get_crit_temp = exynos_get_crit_temp,
  345. };
  346. /*
  347. * This function may be called from interrupt based temperature sensor
  348. * when threshold is changed.
  349. */
  350. static void exynos_report_trigger(void)
  351. {
  352. unsigned int i;
  353. char data[10];
  354. char *envp[] = { data, NULL };
  355. if (!th_zone || !th_zone->therm_dev)
  356. return;
  357. if (th_zone->bind == false) {
  358. for (i = 0; i < th_zone->cool_dev_size; i++) {
  359. if (!th_zone->cool_dev[i])
  360. continue;
  361. exynos_bind(th_zone->therm_dev,
  362. th_zone->cool_dev[i]);
  363. }
  364. }
  365. thermal_zone_device_update(th_zone->therm_dev);
  366. mutex_lock(&th_zone->therm_dev->lock);
  367. /* Find the level for which trip happened */
  368. for (i = 0; i < th_zone->sensor_conf->trip_data.trip_count; i++) {
  369. if (th_zone->therm_dev->last_temperature <
  370. th_zone->sensor_conf->trip_data.trip_val[i] * MCELSIUS)
  371. break;
  372. }
  373. if (th_zone->mode == THERMAL_DEVICE_ENABLED &&
  374. !th_zone->sensor_conf->trip_data.trigger_falling) {
  375. if (i > 0)
  376. th_zone->therm_dev->polling_delay = ACTIVE_INTERVAL;
  377. else
  378. th_zone->therm_dev->polling_delay = IDLE_INTERVAL;
  379. }
  380. snprintf(data, sizeof(data), "%u", i);
  381. kobject_uevent_env(&th_zone->therm_dev->device.kobj, KOBJ_CHANGE, envp);
  382. mutex_unlock(&th_zone->therm_dev->lock);
  383. }
  384. /* Register with the in-kernel thermal management */
  385. static int exynos_register_thermal(struct thermal_sensor_conf *sensor_conf)
  386. {
  387. int ret;
  388. struct cpumask mask_val;
  389. if (!sensor_conf || !sensor_conf->read_temperature) {
  390. pr_err("Temperature sensor not initialised\n");
  391. return -EINVAL;
  392. }
  393. th_zone = kzalloc(sizeof(struct exynos_thermal_zone), GFP_KERNEL);
  394. if (!th_zone)
  395. return -ENOMEM;
  396. th_zone->sensor_conf = sensor_conf;
  397. cpumask_set_cpu(0, &mask_val);
  398. th_zone->cool_dev[0] = cpufreq_cooling_register(&mask_val);
  399. if (IS_ERR(th_zone->cool_dev[0])) {
  400. pr_err("Failed to register cpufreq cooling device\n");
  401. ret = -EINVAL;
  402. goto err_unregister;
  403. }
  404. th_zone->cool_dev_size++;
  405. th_zone->therm_dev = thermal_zone_device_register(sensor_conf->name,
  406. EXYNOS_ZONE_COUNT, 0, NULL, &exynos_dev_ops, NULL, 0,
  407. sensor_conf->trip_data.trigger_falling ?
  408. 0 : IDLE_INTERVAL);
  409. if (IS_ERR(th_zone->therm_dev)) {
  410. pr_err("Failed to register thermal zone device\n");
  411. ret = PTR_ERR(th_zone->therm_dev);
  412. goto err_unregister;
  413. }
  414. th_zone->mode = THERMAL_DEVICE_ENABLED;
  415. pr_info("Exynos: Kernel Thermal management registered\n");
  416. return 0;
  417. err_unregister:
  418. exynos_unregister_thermal();
  419. return ret;
  420. }
  421. /* Un-Register with the in-kernel thermal management */
  422. static void exynos_unregister_thermal(void)
  423. {
  424. int i;
  425. if (!th_zone)
  426. return;
  427. if (th_zone->therm_dev)
  428. thermal_zone_device_unregister(th_zone->therm_dev);
  429. for (i = 0; i < th_zone->cool_dev_size; i++) {
  430. if (th_zone->cool_dev[i])
  431. cpufreq_cooling_unregister(th_zone->cool_dev[i]);
  432. }
  433. kfree(th_zone);
  434. pr_info("Exynos: Kernel Thermal management unregistered\n");
  435. }
  436. /*
  437. * TMU treats temperature as a mapped temperature code.
  438. * The temperature is converted differently depending on the calibration type.
  439. */
  440. static int temp_to_code(struct exynos_tmu_data *data, u8 temp)
  441. {
  442. struct exynos_tmu_platform_data *pdata = data->pdata;
  443. int temp_code;
  444. if (data->soc == SOC_ARCH_EXYNOS4210)
  445. /* temp should range between 25 and 125 */
  446. if (temp < 25 || temp > 125) {
  447. temp_code = -EINVAL;
  448. goto out;
  449. }
  450. switch (pdata->cal_type) {
  451. case TYPE_TWO_POINT_TRIMMING:
  452. temp_code = (temp - 25) *
  453. (data->temp_error2 - data->temp_error1) /
  454. (85 - 25) + data->temp_error1;
  455. break;
  456. case TYPE_ONE_POINT_TRIMMING:
  457. temp_code = temp + data->temp_error1 - 25;
  458. break;
  459. default:
  460. temp_code = temp + EXYNOS_TMU_DEF_CODE_TO_TEMP_OFFSET;
  461. break;
  462. }
  463. out:
  464. return temp_code;
  465. }
  466. /*
  467. * Calculate a temperature value from a temperature code.
  468. * The unit of the temperature is degree Celsius.
  469. */
  470. static int code_to_temp(struct exynos_tmu_data *data, u8 temp_code)
  471. {
  472. struct exynos_tmu_platform_data *pdata = data->pdata;
  473. int temp;
  474. if (data->soc == SOC_ARCH_EXYNOS4210)
  475. /* temp_code should range between 75 and 175 */
  476. if (temp_code < 75 || temp_code > 175) {
  477. temp = -ENODATA;
  478. goto out;
  479. }
  480. switch (pdata->cal_type) {
  481. case TYPE_TWO_POINT_TRIMMING:
  482. temp = (temp_code - data->temp_error1) * (85 - 25) /
  483. (data->temp_error2 - data->temp_error1) + 25;
  484. break;
  485. case TYPE_ONE_POINT_TRIMMING:
  486. temp = temp_code - data->temp_error1 + 25;
  487. break;
  488. default:
  489. temp = temp_code - EXYNOS_TMU_DEF_CODE_TO_TEMP_OFFSET;
  490. break;
  491. }
  492. out:
  493. return temp;
  494. }
  495. static int exynos_tmu_initialize(struct platform_device *pdev)
  496. {
  497. struct exynos_tmu_data *data = platform_get_drvdata(pdev);
  498. struct exynos_tmu_platform_data *pdata = data->pdata;
  499. unsigned int status, trim_info;
  500. unsigned int rising_threshold = 0, falling_threshold = 0;
  501. int ret = 0, threshold_code, i, trigger_levs = 0;
  502. mutex_lock(&data->lock);
  503. clk_enable(data->clk);
  504. status = readb(data->base + EXYNOS_TMU_REG_STATUS);
  505. if (!status) {
  506. ret = -EBUSY;
  507. goto out;
  508. }
  509. if (data->soc == SOC_ARCH_EXYNOS) {
  510. __raw_writel(EXYNOS_TRIMINFO_RELOAD,
  511. data->base + EXYNOS_TMU_TRIMINFO_CON);
  512. }
  513. /* Save trimming info in order to perform calibration */
  514. trim_info = readl(data->base + EXYNOS_TMU_REG_TRIMINFO);
  515. data->temp_error1 = trim_info & EXYNOS_TMU_TRIM_TEMP_MASK;
  516. data->temp_error2 = ((trim_info >> 8) & EXYNOS_TMU_TRIM_TEMP_MASK);
  517. if ((EFUSE_MIN_VALUE > data->temp_error1) ||
  518. (data->temp_error1 > EFUSE_MAX_VALUE) ||
  519. (data->temp_error2 != 0))
  520. data->temp_error1 = pdata->efuse_value;
  521. /* Count trigger levels to be enabled */
  522. for (i = 0; i < MAX_THRESHOLD_LEVS; i++)
  523. if (pdata->trigger_levels[i])
  524. trigger_levs++;
  525. if (data->soc == SOC_ARCH_EXYNOS4210) {
  526. /* Write temperature code for threshold */
  527. threshold_code = temp_to_code(data, pdata->threshold);
  528. if (threshold_code < 0) {
  529. ret = threshold_code;
  530. goto out;
  531. }
  532. writeb(threshold_code,
  533. data->base + EXYNOS4210_TMU_REG_THRESHOLD_TEMP);
  534. for (i = 0; i < trigger_levs; i++)
  535. writeb(pdata->trigger_levels[i],
  536. data->base + EXYNOS4210_TMU_REG_TRIG_LEVEL0 + i * 4);
  537. writel(EXYNOS4210_TMU_INTCLEAR_VAL,
  538. data->base + EXYNOS_TMU_REG_INTCLEAR);
  539. } else if (data->soc == SOC_ARCH_EXYNOS) {
  540. /* Write temperature code for rising and falling threshold */
  541. for (i = 0; i < trigger_levs; i++) {
  542. threshold_code = temp_to_code(data,
  543. pdata->trigger_levels[i]);
  544. if (threshold_code < 0) {
  545. ret = threshold_code;
  546. goto out;
  547. }
  548. rising_threshold |= threshold_code << 8 * i;
  549. if (pdata->threshold_falling) {
  550. threshold_code = temp_to_code(data,
  551. pdata->trigger_levels[i] -
  552. pdata->threshold_falling);
  553. if (threshold_code > 0)
  554. falling_threshold |=
  555. threshold_code << 8 * i;
  556. }
  557. }
  558. writel(rising_threshold,
  559. data->base + EXYNOS_THD_TEMP_RISE);
  560. writel(falling_threshold,
  561. data->base + EXYNOS_THD_TEMP_FALL);
  562. writel(EXYNOS_TMU_CLEAR_RISE_INT | EXYNOS_TMU_CLEAR_FALL_INT,
  563. data->base + EXYNOS_TMU_REG_INTCLEAR);
  564. }
  565. out:
  566. clk_disable(data->clk);
  567. mutex_unlock(&data->lock);
  568. return ret;
  569. }
  570. static void exynos_tmu_control(struct platform_device *pdev, bool on)
  571. {
  572. struct exynos_tmu_data *data = platform_get_drvdata(pdev);
  573. struct exynos_tmu_platform_data *pdata = data->pdata;
  574. unsigned int con, interrupt_en;
  575. mutex_lock(&data->lock);
  576. clk_enable(data->clk);
  577. con = pdata->reference_voltage << EXYNOS_TMU_REF_VOLTAGE_SHIFT |
  578. pdata->gain << EXYNOS_TMU_GAIN_SHIFT;
  579. if (data->soc == SOC_ARCH_EXYNOS) {
  580. con |= pdata->noise_cancel_mode << EXYNOS_TMU_TRIP_MODE_SHIFT;
  581. con |= (EXYNOS_MUX_ADDR_VALUE << EXYNOS_MUX_ADDR_SHIFT);
  582. }
  583. if (on) {
  584. con |= EXYNOS_TMU_CORE_ON;
  585. interrupt_en = pdata->trigger_level3_en << 12 |
  586. pdata->trigger_level2_en << 8 |
  587. pdata->trigger_level1_en << 4 |
  588. pdata->trigger_level0_en;
  589. if (pdata->threshold_falling)
  590. interrupt_en |= interrupt_en << 16;
  591. } else {
  592. con |= EXYNOS_TMU_CORE_OFF;
  593. interrupt_en = 0; /* Disable all interrupts */
  594. }
  595. writel(interrupt_en, data->base + EXYNOS_TMU_REG_INTEN);
  596. writel(con, data->base + EXYNOS_TMU_REG_CONTROL);
  597. clk_disable(data->clk);
  598. mutex_unlock(&data->lock);
  599. }
  600. static int exynos_tmu_read(struct exynos_tmu_data *data)
  601. {
  602. u8 temp_code;
  603. int temp;
  604. mutex_lock(&data->lock);
  605. clk_enable(data->clk);
  606. temp_code = readb(data->base + EXYNOS_TMU_REG_CURRENT_TEMP);
  607. temp = code_to_temp(data, temp_code);
  608. clk_disable(data->clk);
  609. mutex_unlock(&data->lock);
  610. return temp;
  611. }
  612. #ifdef CONFIG_THERMAL_EMULATION
  613. static int exynos_tmu_set_emulation(void *drv_data, unsigned long temp)
  614. {
  615. struct exynos_tmu_data *data = drv_data;
  616. unsigned int reg;
  617. int ret = -EINVAL;
  618. if (data->soc == SOC_ARCH_EXYNOS4210)
  619. goto out;
  620. if (temp && temp < MCELSIUS)
  621. goto out;
  622. mutex_lock(&data->lock);
  623. clk_enable(data->clk);
  624. reg = readl(data->base + EXYNOS_EMUL_CON);
  625. if (temp) {
  626. temp /= MCELSIUS;
  627. reg = (EXYNOS_EMUL_TIME << EXYNOS_EMUL_TIME_SHIFT) |
  628. (temp_to_code(data, temp)
  629. << EXYNOS_EMUL_DATA_SHIFT) | EXYNOS_EMUL_ENABLE;
  630. } else {
  631. reg &= ~EXYNOS_EMUL_ENABLE;
  632. }
  633. writel(reg, data->base + EXYNOS_EMUL_CON);
  634. clk_disable(data->clk);
  635. mutex_unlock(&data->lock);
  636. return 0;
  637. out:
  638. return ret;
  639. }
  640. #else
  641. static int exynos_tmu_set_emulation(void *drv_data, unsigned long temp)
  642. { return -EINVAL; }
  643. #endif/*CONFIG_THERMAL_EMULATION*/
  644. static void exynos_tmu_work(struct work_struct *work)
  645. {
  646. struct exynos_tmu_data *data = container_of(work,
  647. struct exynos_tmu_data, irq_work);
  648. exynos_report_trigger();
  649. mutex_lock(&data->lock);
  650. clk_enable(data->clk);
  651. if (data->soc == SOC_ARCH_EXYNOS)
  652. writel(EXYNOS_TMU_CLEAR_RISE_INT |
  653. EXYNOS_TMU_CLEAR_FALL_INT,
  654. data->base + EXYNOS_TMU_REG_INTCLEAR);
  655. else
  656. writel(EXYNOS4210_TMU_INTCLEAR_VAL,
  657. data->base + EXYNOS_TMU_REG_INTCLEAR);
  658. clk_disable(data->clk);
  659. mutex_unlock(&data->lock);
  660. enable_irq(data->irq);
  661. }
  662. static irqreturn_t exynos_tmu_irq(int irq, void *id)
  663. {
  664. struct exynos_tmu_data *data = id;
  665. disable_irq_nosync(irq);
  666. schedule_work(&data->irq_work);
  667. return IRQ_HANDLED;
  668. }
  669. static struct thermal_sensor_conf exynos_sensor_conf = {
  670. .name = "exynos-therm",
  671. .read_temperature = (int (*)(void *))exynos_tmu_read,
  672. .write_emul_temp = exynos_tmu_set_emulation,
  673. };
  674. #if defined(CONFIG_CPU_EXYNOS4210)
  675. static struct exynos_tmu_platform_data const exynos4210_default_tmu_data = {
  676. .threshold = 80,
  677. .trigger_levels[0] = 5,
  678. .trigger_levels[1] = 20,
  679. .trigger_levels[2] = 30,
  680. .trigger_level0_en = 1,
  681. .trigger_level1_en = 1,
  682. .trigger_level2_en = 1,
  683. .trigger_level3_en = 0,
  684. .gain = 15,
  685. .reference_voltage = 7,
  686. .cal_type = TYPE_ONE_POINT_TRIMMING,
  687. .freq_tab[0] = {
  688. .freq_clip_max = 800 * 1000,
  689. .temp_level = 85,
  690. },
  691. .freq_tab[1] = {
  692. .freq_clip_max = 200 * 1000,
  693. .temp_level = 100,
  694. },
  695. .freq_tab_count = 2,
  696. .type = SOC_ARCH_EXYNOS4210,
  697. };
  698. #define EXYNOS4210_TMU_DRV_DATA (&exynos4210_default_tmu_data)
  699. #else
  700. #define EXYNOS4210_TMU_DRV_DATA (NULL)
  701. #endif
  702. #if defined(CONFIG_SOC_EXYNOS5250) || defined(CONFIG_SOC_EXYNOS4412)
  703. static struct exynos_tmu_platform_data const exynos_default_tmu_data = {
  704. .threshold_falling = 10,
  705. .trigger_levels[0] = 85,
  706. .trigger_levels[1] = 103,
  707. .trigger_levels[2] = 110,
  708. .trigger_level0_en = 1,
  709. .trigger_level1_en = 1,
  710. .trigger_level2_en = 1,
  711. .trigger_level3_en = 0,
  712. .gain = 8,
  713. .reference_voltage = 16,
  714. .noise_cancel_mode = 4,
  715. .cal_type = TYPE_ONE_POINT_TRIMMING,
  716. .efuse_value = 55,
  717. .freq_tab[0] = {
  718. .freq_clip_max = 800 * 1000,
  719. .temp_level = 85,
  720. },
  721. .freq_tab[1] = {
  722. .freq_clip_max = 200 * 1000,
  723. .temp_level = 103,
  724. },
  725. .freq_tab_count = 2,
  726. .type = SOC_ARCH_EXYNOS,
  727. };
  728. #define EXYNOS_TMU_DRV_DATA (&exynos_default_tmu_data)
  729. #else
  730. #define EXYNOS_TMU_DRV_DATA (NULL)
  731. #endif
  732. #ifdef CONFIG_OF
  733. static const struct of_device_id exynos_tmu_match[] = {
  734. {
  735. .compatible = "samsung,exynos4210-tmu",
  736. .data = (void *)EXYNOS4210_TMU_DRV_DATA,
  737. },
  738. {
  739. .compatible = "samsung,exynos5250-tmu",
  740. .data = (void *)EXYNOS_TMU_DRV_DATA,
  741. },
  742. {},
  743. };
  744. MODULE_DEVICE_TABLE(of, exynos_tmu_match);
  745. #endif
  746. static struct platform_device_id exynos_tmu_driver_ids[] = {
  747. {
  748. .name = "exynos4210-tmu",
  749. .driver_data = (kernel_ulong_t)EXYNOS4210_TMU_DRV_DATA,
  750. },
  751. {
  752. .name = "exynos5250-tmu",
  753. .driver_data = (kernel_ulong_t)EXYNOS_TMU_DRV_DATA,
  754. },
  755. { },
  756. };
  757. MODULE_DEVICE_TABLE(platform, exynos_tmu_driver_ids);
  758. static inline struct exynos_tmu_platform_data *exynos_get_driver_data(
  759. struct platform_device *pdev)
  760. {
  761. #ifdef CONFIG_OF
  762. if (pdev->dev.of_node) {
  763. const struct of_device_id *match;
  764. match = of_match_node(exynos_tmu_match, pdev->dev.of_node);
  765. if (!match)
  766. return NULL;
  767. return (struct exynos_tmu_platform_data *) match->data;
  768. }
  769. #endif
  770. return (struct exynos_tmu_platform_data *)
  771. platform_get_device_id(pdev)->driver_data;
  772. }
  773. static int exynos_tmu_probe(struct platform_device *pdev)
  774. {
  775. struct exynos_tmu_data *data;
  776. struct exynos_tmu_platform_data *pdata = pdev->dev.platform_data;
  777. int ret, i;
  778. if (!pdata)
  779. pdata = exynos_get_driver_data(pdev);
  780. if (!pdata) {
  781. dev_err(&pdev->dev, "No platform init data supplied.\n");
  782. return -ENODEV;
  783. }
  784. data = devm_kzalloc(&pdev->dev, sizeof(struct exynos_tmu_data),
  785. GFP_KERNEL);
  786. if (!data) {
  787. dev_err(&pdev->dev, "Failed to allocate driver structure\n");
  788. return -ENOMEM;
  789. }
  790. data->irq = platform_get_irq(pdev, 0);
  791. if (data->irq < 0) {
  792. dev_err(&pdev->dev, "Failed to get platform irq\n");
  793. return data->irq;
  794. }
  795. INIT_WORK(&data->irq_work, exynos_tmu_work);
  796. data->mem = platform_get_resource(pdev, IORESOURCE_MEM, 0);
  797. if (!data->mem) {
  798. dev_err(&pdev->dev, "Failed to get platform resource\n");
  799. return -ENOENT;
  800. }
  801. data->base = devm_ioremap_resource(&pdev->dev, data->mem);
  802. if (IS_ERR(data->base))
  803. return PTR_ERR(data->base);
  804. ret = devm_request_irq(&pdev->dev, data->irq, exynos_tmu_irq,
  805. IRQF_TRIGGER_RISING, "exynos-tmu", data);
  806. if (ret) {
  807. dev_err(&pdev->dev, "Failed to request irq: %d\n", data->irq);
  808. return ret;
  809. }
  810. data->clk = clk_get(NULL, "tmu_apbif");
  811. if (IS_ERR(data->clk)) {
  812. dev_err(&pdev->dev, "Failed to get clock\n");
  813. return PTR_ERR(data->clk);
  814. }
  815. if (pdata->type == SOC_ARCH_EXYNOS ||
  816. pdata->type == SOC_ARCH_EXYNOS4210)
  817. data->soc = pdata->type;
  818. else {
  819. ret = -EINVAL;
  820. dev_err(&pdev->dev, "Platform not supported\n");
  821. goto err_clk;
  822. }
  823. data->pdata = pdata;
  824. platform_set_drvdata(pdev, data);
  825. mutex_init(&data->lock);
  826. ret = exynos_tmu_initialize(pdev);
  827. if (ret) {
  828. dev_err(&pdev->dev, "Failed to initialize TMU\n");
  829. goto err_clk;
  830. }
  831. exynos_tmu_control(pdev, true);
  832. /* Register the sensor with thermal management interface */
  833. (&exynos_sensor_conf)->private_data = data;
  834. exynos_sensor_conf.trip_data.trip_count = pdata->trigger_level0_en +
  835. pdata->trigger_level1_en + pdata->trigger_level2_en +
  836. pdata->trigger_level3_en;
  837. for (i = 0; i < exynos_sensor_conf.trip_data.trip_count; i++)
  838. exynos_sensor_conf.trip_data.trip_val[i] =
  839. pdata->threshold + pdata->trigger_levels[i];
  840. exynos_sensor_conf.trip_data.trigger_falling = pdata->threshold_falling;
  841. exynos_sensor_conf.cooling_data.freq_clip_count =
  842. pdata->freq_tab_count;
  843. for (i = 0; i < pdata->freq_tab_count; i++) {
  844. exynos_sensor_conf.cooling_data.freq_data[i].freq_clip_max =
  845. pdata->freq_tab[i].freq_clip_max;
  846. exynos_sensor_conf.cooling_data.freq_data[i].temp_level =
  847. pdata->freq_tab[i].temp_level;
  848. }
  849. ret = exynos_register_thermal(&exynos_sensor_conf);
  850. if (ret) {
  851. dev_err(&pdev->dev, "Failed to register thermal interface\n");
  852. goto err_clk;
  853. }
  854. return 0;
  855. err_clk:
  856. platform_set_drvdata(pdev, NULL);
  857. clk_put(data->clk);
  858. return ret;
  859. }
  860. static int exynos_tmu_remove(struct platform_device *pdev)
  861. {
  862. struct exynos_tmu_data *data = platform_get_drvdata(pdev);
  863. exynos_tmu_control(pdev, false);
  864. exynos_unregister_thermal();
  865. clk_put(data->clk);
  866. platform_set_drvdata(pdev, NULL);
  867. return 0;
  868. }
  869. #ifdef CONFIG_PM_SLEEP
  870. static int exynos_tmu_suspend(struct device *dev)
  871. {
  872. exynos_tmu_control(to_platform_device(dev), false);
  873. return 0;
  874. }
  875. static int exynos_tmu_resume(struct device *dev)
  876. {
  877. struct platform_device *pdev = to_platform_device(dev);
  878. exynos_tmu_initialize(pdev);
  879. exynos_tmu_control(pdev, true);
  880. return 0;
  881. }
  882. static SIMPLE_DEV_PM_OPS(exynos_tmu_pm,
  883. exynos_tmu_suspend, exynos_tmu_resume);
  884. #define EXYNOS_TMU_PM (&exynos_tmu_pm)
  885. #else
  886. #define EXYNOS_TMU_PM NULL
  887. #endif
  888. static struct platform_driver exynos_tmu_driver = {
  889. .driver = {
  890. .name = "exynos-tmu",
  891. .owner = THIS_MODULE,
  892. .pm = EXYNOS_TMU_PM,
  893. .of_match_table = of_match_ptr(exynos_tmu_match),
  894. },
  895. .probe = exynos_tmu_probe,
  896. .remove = exynos_tmu_remove,
  897. .id_table = exynos_tmu_driver_ids,
  898. };
  899. module_platform_driver(exynos_tmu_driver);
  900. MODULE_DESCRIPTION("EXYNOS TMU Driver");
  901. MODULE_AUTHOR("Donggeun Kim <dg77.kim@samsung.com>");
  902. MODULE_LICENSE("GPL");
  903. MODULE_ALIAS("platform:exynos-tmu");