max63xx_wdt.c 8.7 KB

123456789101112131415161718192021222324252627282930313233343536373839404142434445464748495051525354555657585960616263646566676869707172737475767778798081828384858687888990919293949596979899100101102103104105106107108109110111112113114115116117118119120121122123124125126127128129130131132133134135136137138139140141142143144145146147148149150151152153154155156157158159160161162163164165166167168169170171172173174175176177178179180181182183184185186187188189190191192193194195196197198199200201202203204205206207208209210211212213214215216217218219220221222223224225226227228229230231232233234235236237238239240241242243244245246247248249250251252253254255256257258259260261262263264265266267268269270271272273274275276277278279280281282283284285286287288289290291292293294295296297298299300301302303304305306307308309310311312313314315316317318319320321322323324325326327328329330331332333334335336337338339340341342343344345346347348349350351352353354355356357358359360361362363364365366367368369370371372373374375376377378379380381382383384385386387388389390391392393394395396397
  1. /*
  2. * drivers/char/watchdog/max63xx_wdt.c
  3. *
  4. * Driver for max63{69,70,71,72,73,74} watchdog timers
  5. *
  6. * Copyright (C) 2009 Marc Zyngier <maz@misterjones.org>
  7. *
  8. * This file is licensed under the terms of the GNU General Public
  9. * License version 2. This program is licensed "as is" without any
  10. * warranty of any kind, whether express or implied.
  11. *
  12. * This driver assumes the watchdog pins are memory mapped (as it is
  13. * the case for the Arcom Zeus). Should it be connected over GPIOs or
  14. * another interface, some abstraction will have to be introduced.
  15. */
  16. #include <linux/module.h>
  17. #include <linux/moduleparam.h>
  18. #include <linux/types.h>
  19. #include <linux/kernel.h>
  20. #include <linux/fs.h>
  21. #include <linux/miscdevice.h>
  22. #include <linux/watchdog.h>
  23. #include <linux/init.h>
  24. #include <linux/bitops.h>
  25. #include <linux/platform_device.h>
  26. #include <linux/spinlock.h>
  27. #include <linux/uaccess.h>
  28. #include <linux/io.h>
  29. #include <linux/device.h>
  30. #define DEFAULT_HEARTBEAT 60
  31. #define MAX_HEARTBEAT 60
  32. static int heartbeat = DEFAULT_HEARTBEAT;
  33. static int nowayout = WATCHDOG_NOWAYOUT;
  34. /*
  35. * Memory mapping: a single byte, 3 first lower bits to select bit 3
  36. * to ping the watchdog.
  37. */
  38. #define MAX6369_WDSET (7 << 0)
  39. #define MAX6369_WDI (1 << 3)
  40. static DEFINE_SPINLOCK(io_lock);
  41. static unsigned long wdt_status;
  42. #define WDT_IN_USE 0
  43. #define WDT_RUNNING 1
  44. #define WDT_OK_TO_CLOSE 2
  45. static int nodelay;
  46. static struct resource *wdt_mem;
  47. static void __iomem *wdt_base;
  48. static struct platform_device *max63xx_pdev;
  49. /*
  50. * The timeout values used are actually the absolute minimum the chip
  51. * offers. Typical values on my board are slightly over twice as long
  52. * (10s setting ends up with a 25s timeout), and can be up to 3 times
  53. * the nominal setting (according to the datasheet). So please take
  54. * these values with a grain of salt. Same goes for the initial delay
  55. * "feature". Only max6373/74 have a few settings without this initial
  56. * delay (selected with the "nodelay" parameter).
  57. *
  58. * I also decided to remove from the tables any timeout smaller than a
  59. * second, as it looked completly overkill...
  60. */
  61. /* Timeouts in second */
  62. struct max63xx_timeout {
  63. u8 wdset;
  64. u8 tdelay;
  65. u8 twd;
  66. };
  67. static struct max63xx_timeout max6369_table[] = {
  68. { 5, 1, 1 },
  69. { 6, 10, 10 },
  70. { 7, 60, 60 },
  71. { },
  72. };
  73. static struct max63xx_timeout max6371_table[] = {
  74. { 6, 60, 3 },
  75. { 7, 60, 60 },
  76. { },
  77. };
  78. static struct max63xx_timeout max6373_table[] = {
  79. { 2, 60, 1 },
  80. { 5, 0, 1 },
  81. { 1, 3, 3 },
  82. { 7, 60, 10 },
  83. { 6, 0, 10 },
  84. { },
  85. };
  86. static struct max63xx_timeout *current_timeout;
  87. static struct max63xx_timeout *
  88. max63xx_select_timeout(struct max63xx_timeout *table, int value)
  89. {
  90. while (table->twd) {
  91. if (value <= table->twd) {
  92. if (nodelay && table->tdelay == 0)
  93. return table;
  94. if (!nodelay)
  95. return table;
  96. }
  97. table++;
  98. }
  99. return NULL;
  100. }
  101. static void max63xx_wdt_ping(void)
  102. {
  103. u8 val;
  104. spin_lock(&io_lock);
  105. val = __raw_readb(wdt_base);
  106. __raw_writeb(val | MAX6369_WDI, wdt_base);
  107. __raw_writeb(val & ~MAX6369_WDI, wdt_base);
  108. spin_unlock(&io_lock);
  109. }
  110. static void max63xx_wdt_enable(struct max63xx_timeout *entry)
  111. {
  112. u8 val;
  113. if (test_and_set_bit(WDT_RUNNING, &wdt_status))
  114. return;
  115. spin_lock(&io_lock);
  116. val = __raw_readb(wdt_base);
  117. val &= ~MAX6369_WDSET;
  118. val |= entry->wdset;
  119. __raw_writeb(val, wdt_base);
  120. spin_unlock(&io_lock);
  121. /* check for a edge triggered startup */
  122. if (entry->tdelay == 0)
  123. max63xx_wdt_ping();
  124. }
  125. static void max63xx_wdt_disable(void)
  126. {
  127. spin_lock(&io_lock);
  128. __raw_writeb(3, wdt_base);
  129. spin_unlock(&io_lock);
  130. clear_bit(WDT_RUNNING, &wdt_status);
  131. }
  132. static int max63xx_wdt_open(struct inode *inode, struct file *file)
  133. {
  134. if (test_and_set_bit(WDT_IN_USE, &wdt_status))
  135. return -EBUSY;
  136. max63xx_wdt_enable(current_timeout);
  137. clear_bit(WDT_OK_TO_CLOSE, &wdt_status);
  138. return nonseekable_open(inode, file);
  139. }
  140. static ssize_t max63xx_wdt_write(struct file *file, const char *data,
  141. size_t len, loff_t *ppos)
  142. {
  143. if (len) {
  144. if (!nowayout) {
  145. size_t i;
  146. clear_bit(WDT_OK_TO_CLOSE, &wdt_status);
  147. for (i = 0; i != len; i++) {
  148. char c;
  149. if (get_user(c, data + i))
  150. return -EFAULT;
  151. if (c == 'V')
  152. set_bit(WDT_OK_TO_CLOSE, &wdt_status);
  153. }
  154. }
  155. max63xx_wdt_ping();
  156. }
  157. return len;
  158. }
  159. static const struct watchdog_info ident = {
  160. .options = WDIOF_MAGICCLOSE | WDIOF_KEEPALIVEPING,
  161. .identity = "max63xx Watchdog",
  162. };
  163. static long max63xx_wdt_ioctl(struct file *file, unsigned int cmd,
  164. unsigned long arg)
  165. {
  166. int ret = -ENOTTY;
  167. switch (cmd) {
  168. case WDIOC_GETSUPPORT:
  169. ret = copy_to_user((struct watchdog_info *)arg, &ident,
  170. sizeof(ident)) ? -EFAULT : 0;
  171. break;
  172. case WDIOC_GETSTATUS:
  173. case WDIOC_GETBOOTSTATUS:
  174. ret = put_user(0, (int *)arg);
  175. break;
  176. case WDIOC_KEEPALIVE:
  177. max63xx_wdt_ping();
  178. ret = 0;
  179. break;
  180. case WDIOC_GETTIMEOUT:
  181. ret = put_user(heartbeat, (int *)arg);
  182. break;
  183. }
  184. return ret;
  185. }
  186. static int max63xx_wdt_release(struct inode *inode, struct file *file)
  187. {
  188. if (test_bit(WDT_OK_TO_CLOSE, &wdt_status))
  189. max63xx_wdt_disable();
  190. else
  191. dev_crit(&max63xx_pdev->dev,
  192. "device closed unexpectedly - timer will not stop\n");
  193. clear_bit(WDT_IN_USE, &wdt_status);
  194. clear_bit(WDT_OK_TO_CLOSE, &wdt_status);
  195. return 0;
  196. }
  197. static const struct file_operations max63xx_wdt_fops = {
  198. .owner = THIS_MODULE,
  199. .llseek = no_llseek,
  200. .write = max63xx_wdt_write,
  201. .unlocked_ioctl = max63xx_wdt_ioctl,
  202. .open = max63xx_wdt_open,
  203. .release = max63xx_wdt_release,
  204. };
  205. static struct miscdevice max63xx_wdt_miscdev = {
  206. .minor = WATCHDOG_MINOR,
  207. .name = "watchdog",
  208. .fops = &max63xx_wdt_fops,
  209. };
  210. static int __devinit max63xx_wdt_probe(struct platform_device *pdev)
  211. {
  212. int ret = 0;
  213. int size;
  214. struct resource *res;
  215. struct device *dev = &pdev->dev;
  216. struct max63xx_timeout *table;
  217. table = (struct max63xx_timeout *)pdev->id_entry->driver_data;
  218. if (heartbeat < 1 || heartbeat > MAX_HEARTBEAT)
  219. heartbeat = DEFAULT_HEARTBEAT;
  220. dev_info(dev, "requesting %ds heartbeat\n", heartbeat);
  221. current_timeout = max63xx_select_timeout(table, heartbeat);
  222. if (!current_timeout) {
  223. dev_err(dev, "unable to satisfy heartbeat request\n");
  224. return -EINVAL;
  225. }
  226. dev_info(dev, "using %ds heartbeat with %ds initial delay\n",
  227. current_timeout->twd, current_timeout->tdelay);
  228. heartbeat = current_timeout->twd;
  229. max63xx_pdev = pdev;
  230. res = platform_get_resource(pdev, IORESOURCE_MEM, 0);
  231. if (res == NULL) {
  232. dev_err(dev, "failed to get memory region resource\n");
  233. return -ENOENT;
  234. }
  235. size = resource_size(res);
  236. wdt_mem = request_mem_region(res->start, size, pdev->name);
  237. if (wdt_mem == NULL) {
  238. dev_err(dev, "failed to get memory region\n");
  239. return -ENOENT;
  240. }
  241. wdt_base = ioremap(res->start, size);
  242. if (!wdt_base) {
  243. dev_err(dev, "failed to map memory region\n");
  244. ret = -ENOMEM;
  245. goto out_request;
  246. }
  247. ret = misc_register(&max63xx_wdt_miscdev);
  248. if (ret < 0) {
  249. dev_err(dev, "cannot register misc device\n");
  250. goto out_unmap;
  251. }
  252. return 0;
  253. out_unmap:
  254. iounmap(wdt_base);
  255. out_request:
  256. release_resource(wdt_mem);
  257. kfree(wdt_mem);
  258. return ret;
  259. }
  260. static int __devexit max63xx_wdt_remove(struct platform_device *pdev)
  261. {
  262. misc_deregister(&max63xx_wdt_miscdev);
  263. if (wdt_mem) {
  264. release_resource(wdt_mem);
  265. kfree(wdt_mem);
  266. wdt_mem = NULL;
  267. }
  268. if (wdt_base)
  269. iounmap(wdt_base);
  270. return 0;
  271. }
  272. static struct platform_device_id max63xx_id_table[] = {
  273. { "max6369_wdt", (kernel_ulong_t)max6369_table, },
  274. { "max6370_wdt", (kernel_ulong_t)max6369_table, },
  275. { "max6371_wdt", (kernel_ulong_t)max6371_table, },
  276. { "max6372_wdt", (kernel_ulong_t)max6371_table, },
  277. { "max6373_wdt", (kernel_ulong_t)max6373_table, },
  278. { "max6374_wdt", (kernel_ulong_t)max6373_table, },
  279. { },
  280. };
  281. MODULE_DEVICE_TABLE(platform, max63xx_id_table);
  282. static struct platform_driver max63xx_wdt_driver = {
  283. .probe = max63xx_wdt_probe,
  284. .remove = __devexit_p(max63xx_wdt_remove),
  285. .id_table = max63xx_id_table,
  286. .driver = {
  287. .name = "max63xx_wdt",
  288. .owner = THIS_MODULE,
  289. },
  290. };
  291. static int __init max63xx_wdt_init(void)
  292. {
  293. return platform_driver_register(&max63xx_wdt_driver);
  294. }
  295. static void __exit max63xx_wdt_exit(void)
  296. {
  297. platform_driver_unregister(&max63xx_wdt_driver);
  298. }
  299. module_init(max63xx_wdt_init);
  300. module_exit(max63xx_wdt_exit);
  301. MODULE_AUTHOR("Marc Zyngier <maz@misterjones.org>");
  302. MODULE_DESCRIPTION("max63xx Watchdog Driver");
  303. module_param(heartbeat, int, 0);
  304. MODULE_PARM_DESC(heartbeat,
  305. "Watchdog heartbeat period in seconds from 1 to "
  306. __MODULE_STRING(MAX_HEARTBEAT) ", default "
  307. __MODULE_STRING(DEFAULT_HEARTBEAT));
  308. module_param(nowayout, int, 0);
  309. MODULE_PARM_DESC(nowayout, "Watchdog cannot be stopped once started (default="
  310. __MODULE_STRING(WATCHDOG_NOWAYOUT) ")");
  311. module_param(nodelay, int, 0);
  312. MODULE_PARM_DESC(nodelay,
  313. "Force selection of a timeout setting without initial delay "
  314. "(max6373/74 only, default=0)");
  315. MODULE_LICENSE("GPL");
  316. MODULE_ALIAS_MISCDEV(WATCHDOG_MINOR);