mmu.c 81 KB

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  1. /*
  2. * Kernel-based Virtual Machine driver for Linux
  3. *
  4. * This module enables machines with Intel VT-x extensions to run virtual
  5. * machines without emulation or binary translation.
  6. *
  7. * MMU support
  8. *
  9. * Copyright (C) 2006 Qumranet, Inc.
  10. *
  11. * Authors:
  12. * Yaniv Kamay <yaniv@qumranet.com>
  13. * Avi Kivity <avi@qumranet.com>
  14. *
  15. * This work is licensed under the terms of the GNU GPL, version 2. See
  16. * the COPYING file in the top-level directory.
  17. *
  18. */
  19. #include "mmu.h"
  20. #include "x86.h"
  21. #include "kvm_cache_regs.h"
  22. #include <linux/kvm_host.h>
  23. #include <linux/types.h>
  24. #include <linux/string.h>
  25. #include <linux/mm.h>
  26. #include <linux/highmem.h>
  27. #include <linux/module.h>
  28. #include <linux/swap.h>
  29. #include <linux/hugetlb.h>
  30. #include <linux/compiler.h>
  31. #include <linux/srcu.h>
  32. #include <asm/page.h>
  33. #include <asm/cmpxchg.h>
  34. #include <asm/io.h>
  35. #include <asm/vmx.h>
  36. /*
  37. * When setting this variable to true it enables Two-Dimensional-Paging
  38. * where the hardware walks 2 page tables:
  39. * 1. the guest-virtual to guest-physical
  40. * 2. while doing 1. it walks guest-physical to host-physical
  41. * If the hardware supports that we don't need to do shadow paging.
  42. */
  43. bool tdp_enabled = false;
  44. #undef MMU_DEBUG
  45. #undef AUDIT
  46. #ifdef AUDIT
  47. static void kvm_mmu_audit(struct kvm_vcpu *vcpu, const char *msg);
  48. #else
  49. static void kvm_mmu_audit(struct kvm_vcpu *vcpu, const char *msg) {}
  50. #endif
  51. #ifdef MMU_DEBUG
  52. #define pgprintk(x...) do { if (dbg) printk(x); } while (0)
  53. #define rmap_printk(x...) do { if (dbg) printk(x); } while (0)
  54. #else
  55. #define pgprintk(x...) do { } while (0)
  56. #define rmap_printk(x...) do { } while (0)
  57. #endif
  58. #if defined(MMU_DEBUG) || defined(AUDIT)
  59. static int dbg = 0;
  60. module_param(dbg, bool, 0644);
  61. #endif
  62. static int oos_shadow = 1;
  63. module_param(oos_shadow, bool, 0644);
  64. #ifndef MMU_DEBUG
  65. #define ASSERT(x) do { } while (0)
  66. #else
  67. #define ASSERT(x) \
  68. if (!(x)) { \
  69. printk(KERN_WARNING "assertion failed %s:%d: %s\n", \
  70. __FILE__, __LINE__, #x); \
  71. }
  72. #endif
  73. #define PT_FIRST_AVAIL_BITS_SHIFT 9
  74. #define PT64_SECOND_AVAIL_BITS_SHIFT 52
  75. #define VALID_PAGE(x) ((x) != INVALID_PAGE)
  76. #define PT64_LEVEL_BITS 9
  77. #define PT64_LEVEL_SHIFT(level) \
  78. (PAGE_SHIFT + (level - 1) * PT64_LEVEL_BITS)
  79. #define PT64_LEVEL_MASK(level) \
  80. (((1ULL << PT64_LEVEL_BITS) - 1) << PT64_LEVEL_SHIFT(level))
  81. #define PT64_INDEX(address, level)\
  82. (((address) >> PT64_LEVEL_SHIFT(level)) & ((1 << PT64_LEVEL_BITS) - 1))
  83. #define PT32_LEVEL_BITS 10
  84. #define PT32_LEVEL_SHIFT(level) \
  85. (PAGE_SHIFT + (level - 1) * PT32_LEVEL_BITS)
  86. #define PT32_LEVEL_MASK(level) \
  87. (((1ULL << PT32_LEVEL_BITS) - 1) << PT32_LEVEL_SHIFT(level))
  88. #define PT32_LVL_OFFSET_MASK(level) \
  89. (PT32_BASE_ADDR_MASK & ((1ULL << (PAGE_SHIFT + (((level) - 1) \
  90. * PT32_LEVEL_BITS))) - 1))
  91. #define PT32_INDEX(address, level)\
  92. (((address) >> PT32_LEVEL_SHIFT(level)) & ((1 << PT32_LEVEL_BITS) - 1))
  93. #define PT64_BASE_ADDR_MASK (((1ULL << 52) - 1) & ~(u64)(PAGE_SIZE-1))
  94. #define PT64_DIR_BASE_ADDR_MASK \
  95. (PT64_BASE_ADDR_MASK & ~((1ULL << (PAGE_SHIFT + PT64_LEVEL_BITS)) - 1))
  96. #define PT64_LVL_ADDR_MASK(level) \
  97. (PT64_BASE_ADDR_MASK & ~((1ULL << (PAGE_SHIFT + (((level) - 1) \
  98. * PT64_LEVEL_BITS))) - 1))
  99. #define PT64_LVL_OFFSET_MASK(level) \
  100. (PT64_BASE_ADDR_MASK & ((1ULL << (PAGE_SHIFT + (((level) - 1) \
  101. * PT64_LEVEL_BITS))) - 1))
  102. #define PT32_BASE_ADDR_MASK PAGE_MASK
  103. #define PT32_DIR_BASE_ADDR_MASK \
  104. (PAGE_MASK & ~((1ULL << (PAGE_SHIFT + PT32_LEVEL_BITS)) - 1))
  105. #define PT32_LVL_ADDR_MASK(level) \
  106. (PAGE_MASK & ~((1ULL << (PAGE_SHIFT + (((level) - 1) \
  107. * PT32_LEVEL_BITS))) - 1))
  108. #define PT64_PERM_MASK (PT_PRESENT_MASK | PT_WRITABLE_MASK | PT_USER_MASK \
  109. | PT64_NX_MASK)
  110. #define RMAP_EXT 4
  111. #define ACC_EXEC_MASK 1
  112. #define ACC_WRITE_MASK PT_WRITABLE_MASK
  113. #define ACC_USER_MASK PT_USER_MASK
  114. #define ACC_ALL (ACC_EXEC_MASK | ACC_WRITE_MASK | ACC_USER_MASK)
  115. #include <trace/events/kvm.h>
  116. #undef TRACE_INCLUDE_FILE
  117. #define CREATE_TRACE_POINTS
  118. #include "mmutrace.h"
  119. #define SPTE_HOST_WRITEABLE (1ULL << PT_FIRST_AVAIL_BITS_SHIFT)
  120. #define SHADOW_PT_INDEX(addr, level) PT64_INDEX(addr, level)
  121. struct kvm_rmap_desc {
  122. u64 *sptes[RMAP_EXT];
  123. struct kvm_rmap_desc *more;
  124. };
  125. struct kvm_shadow_walk_iterator {
  126. u64 addr;
  127. hpa_t shadow_addr;
  128. int level;
  129. u64 *sptep;
  130. unsigned index;
  131. };
  132. #define for_each_shadow_entry(_vcpu, _addr, _walker) \
  133. for (shadow_walk_init(&(_walker), _vcpu, _addr); \
  134. shadow_walk_okay(&(_walker)); \
  135. shadow_walk_next(&(_walker)))
  136. struct kvm_unsync_walk {
  137. int (*entry) (struct kvm_mmu_page *sp, struct kvm_unsync_walk *walk);
  138. };
  139. typedef int (*mmu_parent_walk_fn) (struct kvm_vcpu *vcpu, struct kvm_mmu_page *sp);
  140. static struct kmem_cache *pte_chain_cache;
  141. static struct kmem_cache *rmap_desc_cache;
  142. static struct kmem_cache *mmu_page_header_cache;
  143. static u64 __read_mostly shadow_trap_nonpresent_pte;
  144. static u64 __read_mostly shadow_notrap_nonpresent_pte;
  145. static u64 __read_mostly shadow_base_present_pte;
  146. static u64 __read_mostly shadow_nx_mask;
  147. static u64 __read_mostly shadow_x_mask; /* mutual exclusive with nx_mask */
  148. static u64 __read_mostly shadow_user_mask;
  149. static u64 __read_mostly shadow_accessed_mask;
  150. static u64 __read_mostly shadow_dirty_mask;
  151. static inline u64 rsvd_bits(int s, int e)
  152. {
  153. return ((1ULL << (e - s + 1)) - 1) << s;
  154. }
  155. void kvm_mmu_set_nonpresent_ptes(u64 trap_pte, u64 notrap_pte)
  156. {
  157. shadow_trap_nonpresent_pte = trap_pte;
  158. shadow_notrap_nonpresent_pte = notrap_pte;
  159. }
  160. EXPORT_SYMBOL_GPL(kvm_mmu_set_nonpresent_ptes);
  161. void kvm_mmu_set_base_ptes(u64 base_pte)
  162. {
  163. shadow_base_present_pte = base_pte;
  164. }
  165. EXPORT_SYMBOL_GPL(kvm_mmu_set_base_ptes);
  166. void kvm_mmu_set_mask_ptes(u64 user_mask, u64 accessed_mask,
  167. u64 dirty_mask, u64 nx_mask, u64 x_mask)
  168. {
  169. shadow_user_mask = user_mask;
  170. shadow_accessed_mask = accessed_mask;
  171. shadow_dirty_mask = dirty_mask;
  172. shadow_nx_mask = nx_mask;
  173. shadow_x_mask = x_mask;
  174. }
  175. EXPORT_SYMBOL_GPL(kvm_mmu_set_mask_ptes);
  176. static int is_write_protection(struct kvm_vcpu *vcpu)
  177. {
  178. return kvm_read_cr0_bits(vcpu, X86_CR0_WP);
  179. }
  180. static int is_cpuid_PSE36(void)
  181. {
  182. return 1;
  183. }
  184. static int is_nx(struct kvm_vcpu *vcpu)
  185. {
  186. return vcpu->arch.efer & EFER_NX;
  187. }
  188. static int is_shadow_present_pte(u64 pte)
  189. {
  190. return pte != shadow_trap_nonpresent_pte
  191. && pte != shadow_notrap_nonpresent_pte;
  192. }
  193. static int is_large_pte(u64 pte)
  194. {
  195. return pte & PT_PAGE_SIZE_MASK;
  196. }
  197. static int is_writable_pte(unsigned long pte)
  198. {
  199. return pte & PT_WRITABLE_MASK;
  200. }
  201. static int is_dirty_gpte(unsigned long pte)
  202. {
  203. return pte & PT_DIRTY_MASK;
  204. }
  205. static int is_rmap_spte(u64 pte)
  206. {
  207. return is_shadow_present_pte(pte);
  208. }
  209. static int is_last_spte(u64 pte, int level)
  210. {
  211. if (level == PT_PAGE_TABLE_LEVEL)
  212. return 1;
  213. if (is_large_pte(pte))
  214. return 1;
  215. return 0;
  216. }
  217. static pfn_t spte_to_pfn(u64 pte)
  218. {
  219. return (pte & PT64_BASE_ADDR_MASK) >> PAGE_SHIFT;
  220. }
  221. static gfn_t pse36_gfn_delta(u32 gpte)
  222. {
  223. int shift = 32 - PT32_DIR_PSE36_SHIFT - PAGE_SHIFT;
  224. return (gpte & PT32_DIR_PSE36_MASK) << shift;
  225. }
  226. static void __set_spte(u64 *sptep, u64 spte)
  227. {
  228. #ifdef CONFIG_X86_64
  229. set_64bit((unsigned long *)sptep, spte);
  230. #else
  231. set_64bit((unsigned long long *)sptep, spte);
  232. #endif
  233. }
  234. static int mmu_topup_memory_cache(struct kvm_mmu_memory_cache *cache,
  235. struct kmem_cache *base_cache, int min)
  236. {
  237. void *obj;
  238. if (cache->nobjs >= min)
  239. return 0;
  240. while (cache->nobjs < ARRAY_SIZE(cache->objects)) {
  241. obj = kmem_cache_zalloc(base_cache, GFP_KERNEL);
  242. if (!obj)
  243. return -ENOMEM;
  244. cache->objects[cache->nobjs++] = obj;
  245. }
  246. return 0;
  247. }
  248. static void mmu_free_memory_cache(struct kvm_mmu_memory_cache *mc)
  249. {
  250. while (mc->nobjs)
  251. kfree(mc->objects[--mc->nobjs]);
  252. }
  253. static int mmu_topup_memory_cache_page(struct kvm_mmu_memory_cache *cache,
  254. int min)
  255. {
  256. struct page *page;
  257. if (cache->nobjs >= min)
  258. return 0;
  259. while (cache->nobjs < ARRAY_SIZE(cache->objects)) {
  260. page = alloc_page(GFP_KERNEL);
  261. if (!page)
  262. return -ENOMEM;
  263. set_page_private(page, 0);
  264. cache->objects[cache->nobjs++] = page_address(page);
  265. }
  266. return 0;
  267. }
  268. static void mmu_free_memory_cache_page(struct kvm_mmu_memory_cache *mc)
  269. {
  270. while (mc->nobjs)
  271. free_page((unsigned long)mc->objects[--mc->nobjs]);
  272. }
  273. static int mmu_topup_memory_caches(struct kvm_vcpu *vcpu)
  274. {
  275. int r;
  276. r = mmu_topup_memory_cache(&vcpu->arch.mmu_pte_chain_cache,
  277. pte_chain_cache, 4);
  278. if (r)
  279. goto out;
  280. r = mmu_topup_memory_cache(&vcpu->arch.mmu_rmap_desc_cache,
  281. rmap_desc_cache, 4);
  282. if (r)
  283. goto out;
  284. r = mmu_topup_memory_cache_page(&vcpu->arch.mmu_page_cache, 8);
  285. if (r)
  286. goto out;
  287. r = mmu_topup_memory_cache(&vcpu->arch.mmu_page_header_cache,
  288. mmu_page_header_cache, 4);
  289. out:
  290. return r;
  291. }
  292. static void mmu_free_memory_caches(struct kvm_vcpu *vcpu)
  293. {
  294. mmu_free_memory_cache(&vcpu->arch.mmu_pte_chain_cache);
  295. mmu_free_memory_cache(&vcpu->arch.mmu_rmap_desc_cache);
  296. mmu_free_memory_cache_page(&vcpu->arch.mmu_page_cache);
  297. mmu_free_memory_cache(&vcpu->arch.mmu_page_header_cache);
  298. }
  299. static void *mmu_memory_cache_alloc(struct kvm_mmu_memory_cache *mc,
  300. size_t size)
  301. {
  302. void *p;
  303. BUG_ON(!mc->nobjs);
  304. p = mc->objects[--mc->nobjs];
  305. return p;
  306. }
  307. static struct kvm_pte_chain *mmu_alloc_pte_chain(struct kvm_vcpu *vcpu)
  308. {
  309. return mmu_memory_cache_alloc(&vcpu->arch.mmu_pte_chain_cache,
  310. sizeof(struct kvm_pte_chain));
  311. }
  312. static void mmu_free_pte_chain(struct kvm_pte_chain *pc)
  313. {
  314. kfree(pc);
  315. }
  316. static struct kvm_rmap_desc *mmu_alloc_rmap_desc(struct kvm_vcpu *vcpu)
  317. {
  318. return mmu_memory_cache_alloc(&vcpu->arch.mmu_rmap_desc_cache,
  319. sizeof(struct kvm_rmap_desc));
  320. }
  321. static void mmu_free_rmap_desc(struct kvm_rmap_desc *rd)
  322. {
  323. kfree(rd);
  324. }
  325. /*
  326. * Return the pointer to the largepage write count for a given
  327. * gfn, handling slots that are not large page aligned.
  328. */
  329. static int *slot_largepage_idx(gfn_t gfn,
  330. struct kvm_memory_slot *slot,
  331. int level)
  332. {
  333. unsigned long idx;
  334. idx = (gfn / KVM_PAGES_PER_HPAGE(level)) -
  335. (slot->base_gfn / KVM_PAGES_PER_HPAGE(level));
  336. return &slot->lpage_info[level - 2][idx].write_count;
  337. }
  338. static void account_shadowed(struct kvm *kvm, gfn_t gfn)
  339. {
  340. struct kvm_memory_slot *slot;
  341. int *write_count;
  342. int i;
  343. gfn = unalias_gfn(kvm, gfn);
  344. slot = gfn_to_memslot_unaliased(kvm, gfn);
  345. for (i = PT_DIRECTORY_LEVEL;
  346. i < PT_PAGE_TABLE_LEVEL + KVM_NR_PAGE_SIZES; ++i) {
  347. write_count = slot_largepage_idx(gfn, slot, i);
  348. *write_count += 1;
  349. }
  350. }
  351. static void unaccount_shadowed(struct kvm *kvm, gfn_t gfn)
  352. {
  353. struct kvm_memory_slot *slot;
  354. int *write_count;
  355. int i;
  356. gfn = unalias_gfn(kvm, gfn);
  357. for (i = PT_DIRECTORY_LEVEL;
  358. i < PT_PAGE_TABLE_LEVEL + KVM_NR_PAGE_SIZES; ++i) {
  359. slot = gfn_to_memslot_unaliased(kvm, gfn);
  360. write_count = slot_largepage_idx(gfn, slot, i);
  361. *write_count -= 1;
  362. WARN_ON(*write_count < 0);
  363. }
  364. }
  365. static int has_wrprotected_page(struct kvm *kvm,
  366. gfn_t gfn,
  367. int level)
  368. {
  369. struct kvm_memory_slot *slot;
  370. int *largepage_idx;
  371. gfn = unalias_gfn(kvm, gfn);
  372. slot = gfn_to_memslot_unaliased(kvm, gfn);
  373. if (slot) {
  374. largepage_idx = slot_largepage_idx(gfn, slot, level);
  375. return *largepage_idx;
  376. }
  377. return 1;
  378. }
  379. static int host_mapping_level(struct kvm *kvm, gfn_t gfn)
  380. {
  381. unsigned long page_size;
  382. int i, ret = 0;
  383. page_size = kvm_host_page_size(kvm, gfn);
  384. for (i = PT_PAGE_TABLE_LEVEL;
  385. i < (PT_PAGE_TABLE_LEVEL + KVM_NR_PAGE_SIZES); ++i) {
  386. if (page_size >= KVM_HPAGE_SIZE(i))
  387. ret = i;
  388. else
  389. break;
  390. }
  391. return ret;
  392. }
  393. static int mapping_level(struct kvm_vcpu *vcpu, gfn_t large_gfn)
  394. {
  395. struct kvm_memory_slot *slot;
  396. int host_level, level, max_level;
  397. slot = gfn_to_memslot(vcpu->kvm, large_gfn);
  398. if (slot && slot->dirty_bitmap)
  399. return PT_PAGE_TABLE_LEVEL;
  400. host_level = host_mapping_level(vcpu->kvm, large_gfn);
  401. if (host_level == PT_PAGE_TABLE_LEVEL)
  402. return host_level;
  403. max_level = kvm_x86_ops->get_lpage_level() < host_level ?
  404. kvm_x86_ops->get_lpage_level() : host_level;
  405. for (level = PT_DIRECTORY_LEVEL; level <= max_level; ++level)
  406. if (has_wrprotected_page(vcpu->kvm, large_gfn, level))
  407. break;
  408. return level - 1;
  409. }
  410. /*
  411. * Take gfn and return the reverse mapping to it.
  412. * Note: gfn must be unaliased before this function get called
  413. */
  414. static unsigned long *gfn_to_rmap(struct kvm *kvm, gfn_t gfn, int level)
  415. {
  416. struct kvm_memory_slot *slot;
  417. unsigned long idx;
  418. slot = gfn_to_memslot(kvm, gfn);
  419. if (likely(level == PT_PAGE_TABLE_LEVEL))
  420. return &slot->rmap[gfn - slot->base_gfn];
  421. idx = (gfn / KVM_PAGES_PER_HPAGE(level)) -
  422. (slot->base_gfn / KVM_PAGES_PER_HPAGE(level));
  423. return &slot->lpage_info[level - 2][idx].rmap_pde;
  424. }
  425. /*
  426. * Reverse mapping data structures:
  427. *
  428. * If rmapp bit zero is zero, then rmapp point to the shadw page table entry
  429. * that points to page_address(page).
  430. *
  431. * If rmapp bit zero is one, (then rmap & ~1) points to a struct kvm_rmap_desc
  432. * containing more mappings.
  433. *
  434. * Returns the number of rmap entries before the spte was added or zero if
  435. * the spte was not added.
  436. *
  437. */
  438. static int rmap_add(struct kvm_vcpu *vcpu, u64 *spte, gfn_t gfn)
  439. {
  440. struct kvm_mmu_page *sp;
  441. struct kvm_rmap_desc *desc;
  442. unsigned long *rmapp;
  443. int i, count = 0;
  444. if (!is_rmap_spte(*spte))
  445. return count;
  446. gfn = unalias_gfn(vcpu->kvm, gfn);
  447. sp = page_header(__pa(spte));
  448. sp->gfns[spte - sp->spt] = gfn;
  449. rmapp = gfn_to_rmap(vcpu->kvm, gfn, sp->role.level);
  450. if (!*rmapp) {
  451. rmap_printk("rmap_add: %p %llx 0->1\n", spte, *spte);
  452. *rmapp = (unsigned long)spte;
  453. } else if (!(*rmapp & 1)) {
  454. rmap_printk("rmap_add: %p %llx 1->many\n", spte, *spte);
  455. desc = mmu_alloc_rmap_desc(vcpu);
  456. desc->sptes[0] = (u64 *)*rmapp;
  457. desc->sptes[1] = spte;
  458. *rmapp = (unsigned long)desc | 1;
  459. } else {
  460. rmap_printk("rmap_add: %p %llx many->many\n", spte, *spte);
  461. desc = (struct kvm_rmap_desc *)(*rmapp & ~1ul);
  462. while (desc->sptes[RMAP_EXT-1] && desc->more) {
  463. desc = desc->more;
  464. count += RMAP_EXT;
  465. }
  466. if (desc->sptes[RMAP_EXT-1]) {
  467. desc->more = mmu_alloc_rmap_desc(vcpu);
  468. desc = desc->more;
  469. }
  470. for (i = 0; desc->sptes[i]; ++i)
  471. ;
  472. desc->sptes[i] = spte;
  473. }
  474. return count;
  475. }
  476. static void rmap_desc_remove_entry(unsigned long *rmapp,
  477. struct kvm_rmap_desc *desc,
  478. int i,
  479. struct kvm_rmap_desc *prev_desc)
  480. {
  481. int j;
  482. for (j = RMAP_EXT - 1; !desc->sptes[j] && j > i; --j)
  483. ;
  484. desc->sptes[i] = desc->sptes[j];
  485. desc->sptes[j] = NULL;
  486. if (j != 0)
  487. return;
  488. if (!prev_desc && !desc->more)
  489. *rmapp = (unsigned long)desc->sptes[0];
  490. else
  491. if (prev_desc)
  492. prev_desc->more = desc->more;
  493. else
  494. *rmapp = (unsigned long)desc->more | 1;
  495. mmu_free_rmap_desc(desc);
  496. }
  497. static void rmap_remove(struct kvm *kvm, u64 *spte)
  498. {
  499. struct kvm_rmap_desc *desc;
  500. struct kvm_rmap_desc *prev_desc;
  501. struct kvm_mmu_page *sp;
  502. pfn_t pfn;
  503. unsigned long *rmapp;
  504. int i;
  505. if (!is_rmap_spte(*spte))
  506. return;
  507. sp = page_header(__pa(spte));
  508. pfn = spte_to_pfn(*spte);
  509. if (*spte & shadow_accessed_mask)
  510. kvm_set_pfn_accessed(pfn);
  511. if (is_writable_pte(*spte))
  512. kvm_set_pfn_dirty(pfn);
  513. rmapp = gfn_to_rmap(kvm, sp->gfns[spte - sp->spt], sp->role.level);
  514. if (!*rmapp) {
  515. printk(KERN_ERR "rmap_remove: %p %llx 0->BUG\n", spte, *spte);
  516. BUG();
  517. } else if (!(*rmapp & 1)) {
  518. rmap_printk("rmap_remove: %p %llx 1->0\n", spte, *spte);
  519. if ((u64 *)*rmapp != spte) {
  520. printk(KERN_ERR "rmap_remove: %p %llx 1->BUG\n",
  521. spte, *spte);
  522. BUG();
  523. }
  524. *rmapp = 0;
  525. } else {
  526. rmap_printk("rmap_remove: %p %llx many->many\n", spte, *spte);
  527. desc = (struct kvm_rmap_desc *)(*rmapp & ~1ul);
  528. prev_desc = NULL;
  529. while (desc) {
  530. for (i = 0; i < RMAP_EXT && desc->sptes[i]; ++i)
  531. if (desc->sptes[i] == spte) {
  532. rmap_desc_remove_entry(rmapp,
  533. desc, i,
  534. prev_desc);
  535. return;
  536. }
  537. prev_desc = desc;
  538. desc = desc->more;
  539. }
  540. pr_err("rmap_remove: %p %llx many->many\n", spte, *spte);
  541. BUG();
  542. }
  543. }
  544. static u64 *rmap_next(struct kvm *kvm, unsigned long *rmapp, u64 *spte)
  545. {
  546. struct kvm_rmap_desc *desc;
  547. struct kvm_rmap_desc *prev_desc;
  548. u64 *prev_spte;
  549. int i;
  550. if (!*rmapp)
  551. return NULL;
  552. else if (!(*rmapp & 1)) {
  553. if (!spte)
  554. return (u64 *)*rmapp;
  555. return NULL;
  556. }
  557. desc = (struct kvm_rmap_desc *)(*rmapp & ~1ul);
  558. prev_desc = NULL;
  559. prev_spte = NULL;
  560. while (desc) {
  561. for (i = 0; i < RMAP_EXT && desc->sptes[i]; ++i) {
  562. if (prev_spte == spte)
  563. return desc->sptes[i];
  564. prev_spte = desc->sptes[i];
  565. }
  566. desc = desc->more;
  567. }
  568. return NULL;
  569. }
  570. static int rmap_write_protect(struct kvm *kvm, u64 gfn)
  571. {
  572. unsigned long *rmapp;
  573. u64 *spte;
  574. int i, write_protected = 0;
  575. gfn = unalias_gfn(kvm, gfn);
  576. rmapp = gfn_to_rmap(kvm, gfn, PT_PAGE_TABLE_LEVEL);
  577. spte = rmap_next(kvm, rmapp, NULL);
  578. while (spte) {
  579. BUG_ON(!spte);
  580. BUG_ON(!(*spte & PT_PRESENT_MASK));
  581. rmap_printk("rmap_write_protect: spte %p %llx\n", spte, *spte);
  582. if (is_writable_pte(*spte)) {
  583. __set_spte(spte, *spte & ~PT_WRITABLE_MASK);
  584. write_protected = 1;
  585. }
  586. spte = rmap_next(kvm, rmapp, spte);
  587. }
  588. if (write_protected) {
  589. pfn_t pfn;
  590. spte = rmap_next(kvm, rmapp, NULL);
  591. pfn = spte_to_pfn(*spte);
  592. kvm_set_pfn_dirty(pfn);
  593. }
  594. /* check for huge page mappings */
  595. for (i = PT_DIRECTORY_LEVEL;
  596. i < PT_PAGE_TABLE_LEVEL + KVM_NR_PAGE_SIZES; ++i) {
  597. rmapp = gfn_to_rmap(kvm, gfn, i);
  598. spte = rmap_next(kvm, rmapp, NULL);
  599. while (spte) {
  600. BUG_ON(!spte);
  601. BUG_ON(!(*spte & PT_PRESENT_MASK));
  602. BUG_ON((*spte & (PT_PAGE_SIZE_MASK|PT_PRESENT_MASK)) != (PT_PAGE_SIZE_MASK|PT_PRESENT_MASK));
  603. pgprintk("rmap_write_protect(large): spte %p %llx %lld\n", spte, *spte, gfn);
  604. if (is_writable_pte(*spte)) {
  605. rmap_remove(kvm, spte);
  606. --kvm->stat.lpages;
  607. __set_spte(spte, shadow_trap_nonpresent_pte);
  608. spte = NULL;
  609. write_protected = 1;
  610. }
  611. spte = rmap_next(kvm, rmapp, spte);
  612. }
  613. }
  614. return write_protected;
  615. }
  616. static int kvm_unmap_rmapp(struct kvm *kvm, unsigned long *rmapp,
  617. unsigned long data)
  618. {
  619. u64 *spte;
  620. int need_tlb_flush = 0;
  621. while ((spte = rmap_next(kvm, rmapp, NULL))) {
  622. BUG_ON(!(*spte & PT_PRESENT_MASK));
  623. rmap_printk("kvm_rmap_unmap_hva: spte %p %llx\n", spte, *spte);
  624. rmap_remove(kvm, spte);
  625. __set_spte(spte, shadow_trap_nonpresent_pte);
  626. need_tlb_flush = 1;
  627. }
  628. return need_tlb_flush;
  629. }
  630. static int kvm_set_pte_rmapp(struct kvm *kvm, unsigned long *rmapp,
  631. unsigned long data)
  632. {
  633. int need_flush = 0;
  634. u64 *spte, new_spte;
  635. pte_t *ptep = (pte_t *)data;
  636. pfn_t new_pfn;
  637. WARN_ON(pte_huge(*ptep));
  638. new_pfn = pte_pfn(*ptep);
  639. spte = rmap_next(kvm, rmapp, NULL);
  640. while (spte) {
  641. BUG_ON(!is_shadow_present_pte(*spte));
  642. rmap_printk("kvm_set_pte_rmapp: spte %p %llx\n", spte, *spte);
  643. need_flush = 1;
  644. if (pte_write(*ptep)) {
  645. rmap_remove(kvm, spte);
  646. __set_spte(spte, shadow_trap_nonpresent_pte);
  647. spte = rmap_next(kvm, rmapp, NULL);
  648. } else {
  649. new_spte = *spte &~ (PT64_BASE_ADDR_MASK);
  650. new_spte |= (u64)new_pfn << PAGE_SHIFT;
  651. new_spte &= ~PT_WRITABLE_MASK;
  652. new_spte &= ~SPTE_HOST_WRITEABLE;
  653. if (is_writable_pte(*spte))
  654. kvm_set_pfn_dirty(spte_to_pfn(*spte));
  655. __set_spte(spte, new_spte);
  656. spte = rmap_next(kvm, rmapp, spte);
  657. }
  658. }
  659. if (need_flush)
  660. kvm_flush_remote_tlbs(kvm);
  661. return 0;
  662. }
  663. static int kvm_handle_hva(struct kvm *kvm, unsigned long hva,
  664. unsigned long data,
  665. int (*handler)(struct kvm *kvm, unsigned long *rmapp,
  666. unsigned long data))
  667. {
  668. int i, j;
  669. int ret;
  670. int retval = 0;
  671. struct kvm_memslots *slots;
  672. slots = rcu_dereference(kvm->memslots);
  673. for (i = 0; i < slots->nmemslots; i++) {
  674. struct kvm_memory_slot *memslot = &slots->memslots[i];
  675. unsigned long start = memslot->userspace_addr;
  676. unsigned long end;
  677. end = start + (memslot->npages << PAGE_SHIFT);
  678. if (hva >= start && hva < end) {
  679. gfn_t gfn_offset = (hva - start) >> PAGE_SHIFT;
  680. ret = handler(kvm, &memslot->rmap[gfn_offset], data);
  681. for (j = 0; j < KVM_NR_PAGE_SIZES - 1; ++j) {
  682. int idx = gfn_offset;
  683. idx /= KVM_PAGES_PER_HPAGE(PT_DIRECTORY_LEVEL + j);
  684. ret |= handler(kvm,
  685. &memslot->lpage_info[j][idx].rmap_pde,
  686. data);
  687. }
  688. trace_kvm_age_page(hva, memslot, ret);
  689. retval |= ret;
  690. }
  691. }
  692. return retval;
  693. }
  694. int kvm_unmap_hva(struct kvm *kvm, unsigned long hva)
  695. {
  696. return kvm_handle_hva(kvm, hva, 0, kvm_unmap_rmapp);
  697. }
  698. void kvm_set_spte_hva(struct kvm *kvm, unsigned long hva, pte_t pte)
  699. {
  700. kvm_handle_hva(kvm, hva, (unsigned long)&pte, kvm_set_pte_rmapp);
  701. }
  702. static int kvm_age_rmapp(struct kvm *kvm, unsigned long *rmapp,
  703. unsigned long data)
  704. {
  705. u64 *spte;
  706. int young = 0;
  707. /*
  708. * Emulate the accessed bit for EPT, by checking if this page has
  709. * an EPT mapping, and clearing it if it does. On the next access,
  710. * a new EPT mapping will be established.
  711. * This has some overhead, but not as much as the cost of swapping
  712. * out actively used pages or breaking up actively used hugepages.
  713. */
  714. if (!shadow_accessed_mask)
  715. return kvm_unmap_rmapp(kvm, rmapp, data);
  716. spte = rmap_next(kvm, rmapp, NULL);
  717. while (spte) {
  718. int _young;
  719. u64 _spte = *spte;
  720. BUG_ON(!(_spte & PT_PRESENT_MASK));
  721. _young = _spte & PT_ACCESSED_MASK;
  722. if (_young) {
  723. young = 1;
  724. clear_bit(PT_ACCESSED_SHIFT, (unsigned long *)spte);
  725. }
  726. spte = rmap_next(kvm, rmapp, spte);
  727. }
  728. return young;
  729. }
  730. #define RMAP_RECYCLE_THRESHOLD 1000
  731. static void rmap_recycle(struct kvm_vcpu *vcpu, u64 *spte, gfn_t gfn)
  732. {
  733. unsigned long *rmapp;
  734. struct kvm_mmu_page *sp;
  735. sp = page_header(__pa(spte));
  736. gfn = unalias_gfn(vcpu->kvm, gfn);
  737. rmapp = gfn_to_rmap(vcpu->kvm, gfn, sp->role.level);
  738. kvm_unmap_rmapp(vcpu->kvm, rmapp, 0);
  739. kvm_flush_remote_tlbs(vcpu->kvm);
  740. }
  741. int kvm_age_hva(struct kvm *kvm, unsigned long hva)
  742. {
  743. return kvm_handle_hva(kvm, hva, 0, kvm_age_rmapp);
  744. }
  745. #ifdef MMU_DEBUG
  746. static int is_empty_shadow_page(u64 *spt)
  747. {
  748. u64 *pos;
  749. u64 *end;
  750. for (pos = spt, end = pos + PAGE_SIZE / sizeof(u64); pos != end; pos++)
  751. if (is_shadow_present_pte(*pos)) {
  752. printk(KERN_ERR "%s: %p %llx\n", __func__,
  753. pos, *pos);
  754. return 0;
  755. }
  756. return 1;
  757. }
  758. #endif
  759. static void kvm_mmu_free_page(struct kvm *kvm, struct kvm_mmu_page *sp)
  760. {
  761. ASSERT(is_empty_shadow_page(sp->spt));
  762. list_del(&sp->link);
  763. __free_page(virt_to_page(sp->spt));
  764. __free_page(virt_to_page(sp->gfns));
  765. kfree(sp);
  766. ++kvm->arch.n_free_mmu_pages;
  767. }
  768. static unsigned kvm_page_table_hashfn(gfn_t gfn)
  769. {
  770. return gfn & ((1 << KVM_MMU_HASH_SHIFT) - 1);
  771. }
  772. static struct kvm_mmu_page *kvm_mmu_alloc_page(struct kvm_vcpu *vcpu,
  773. u64 *parent_pte)
  774. {
  775. struct kvm_mmu_page *sp;
  776. sp = mmu_memory_cache_alloc(&vcpu->arch.mmu_page_header_cache, sizeof *sp);
  777. sp->spt = mmu_memory_cache_alloc(&vcpu->arch.mmu_page_cache, PAGE_SIZE);
  778. sp->gfns = mmu_memory_cache_alloc(&vcpu->arch.mmu_page_cache, PAGE_SIZE);
  779. set_page_private(virt_to_page(sp->spt), (unsigned long)sp);
  780. list_add(&sp->link, &vcpu->kvm->arch.active_mmu_pages);
  781. INIT_LIST_HEAD(&sp->oos_link);
  782. bitmap_zero(sp->slot_bitmap, KVM_MEMORY_SLOTS + KVM_PRIVATE_MEM_SLOTS);
  783. sp->multimapped = 0;
  784. sp->parent_pte = parent_pte;
  785. --vcpu->kvm->arch.n_free_mmu_pages;
  786. return sp;
  787. }
  788. static void mmu_page_add_parent_pte(struct kvm_vcpu *vcpu,
  789. struct kvm_mmu_page *sp, u64 *parent_pte)
  790. {
  791. struct kvm_pte_chain *pte_chain;
  792. struct hlist_node *node;
  793. int i;
  794. if (!parent_pte)
  795. return;
  796. if (!sp->multimapped) {
  797. u64 *old = sp->parent_pte;
  798. if (!old) {
  799. sp->parent_pte = parent_pte;
  800. return;
  801. }
  802. sp->multimapped = 1;
  803. pte_chain = mmu_alloc_pte_chain(vcpu);
  804. INIT_HLIST_HEAD(&sp->parent_ptes);
  805. hlist_add_head(&pte_chain->link, &sp->parent_ptes);
  806. pte_chain->parent_ptes[0] = old;
  807. }
  808. hlist_for_each_entry(pte_chain, node, &sp->parent_ptes, link) {
  809. if (pte_chain->parent_ptes[NR_PTE_CHAIN_ENTRIES-1])
  810. continue;
  811. for (i = 0; i < NR_PTE_CHAIN_ENTRIES; ++i)
  812. if (!pte_chain->parent_ptes[i]) {
  813. pte_chain->parent_ptes[i] = parent_pte;
  814. return;
  815. }
  816. }
  817. pte_chain = mmu_alloc_pte_chain(vcpu);
  818. BUG_ON(!pte_chain);
  819. hlist_add_head(&pte_chain->link, &sp->parent_ptes);
  820. pte_chain->parent_ptes[0] = parent_pte;
  821. }
  822. static void mmu_page_remove_parent_pte(struct kvm_mmu_page *sp,
  823. u64 *parent_pte)
  824. {
  825. struct kvm_pte_chain *pte_chain;
  826. struct hlist_node *node;
  827. int i;
  828. if (!sp->multimapped) {
  829. BUG_ON(sp->parent_pte != parent_pte);
  830. sp->parent_pte = NULL;
  831. return;
  832. }
  833. hlist_for_each_entry(pte_chain, node, &sp->parent_ptes, link)
  834. for (i = 0; i < NR_PTE_CHAIN_ENTRIES; ++i) {
  835. if (!pte_chain->parent_ptes[i])
  836. break;
  837. if (pte_chain->parent_ptes[i] != parent_pte)
  838. continue;
  839. while (i + 1 < NR_PTE_CHAIN_ENTRIES
  840. && pte_chain->parent_ptes[i + 1]) {
  841. pte_chain->parent_ptes[i]
  842. = pte_chain->parent_ptes[i + 1];
  843. ++i;
  844. }
  845. pte_chain->parent_ptes[i] = NULL;
  846. if (i == 0) {
  847. hlist_del(&pte_chain->link);
  848. mmu_free_pte_chain(pte_chain);
  849. if (hlist_empty(&sp->parent_ptes)) {
  850. sp->multimapped = 0;
  851. sp->parent_pte = NULL;
  852. }
  853. }
  854. return;
  855. }
  856. BUG();
  857. }
  858. static void mmu_parent_walk(struct kvm_vcpu *vcpu, struct kvm_mmu_page *sp,
  859. mmu_parent_walk_fn fn)
  860. {
  861. struct kvm_pte_chain *pte_chain;
  862. struct hlist_node *node;
  863. struct kvm_mmu_page *parent_sp;
  864. int i;
  865. if (!sp->multimapped && sp->parent_pte) {
  866. parent_sp = page_header(__pa(sp->parent_pte));
  867. fn(vcpu, parent_sp);
  868. mmu_parent_walk(vcpu, parent_sp, fn);
  869. return;
  870. }
  871. hlist_for_each_entry(pte_chain, node, &sp->parent_ptes, link)
  872. for (i = 0; i < NR_PTE_CHAIN_ENTRIES; ++i) {
  873. if (!pte_chain->parent_ptes[i])
  874. break;
  875. parent_sp = page_header(__pa(pte_chain->parent_ptes[i]));
  876. fn(vcpu, parent_sp);
  877. mmu_parent_walk(vcpu, parent_sp, fn);
  878. }
  879. }
  880. static void kvm_mmu_update_unsync_bitmap(u64 *spte)
  881. {
  882. unsigned int index;
  883. struct kvm_mmu_page *sp = page_header(__pa(spte));
  884. index = spte - sp->spt;
  885. if (!__test_and_set_bit(index, sp->unsync_child_bitmap))
  886. sp->unsync_children++;
  887. WARN_ON(!sp->unsync_children);
  888. }
  889. static void kvm_mmu_update_parents_unsync(struct kvm_mmu_page *sp)
  890. {
  891. struct kvm_pte_chain *pte_chain;
  892. struct hlist_node *node;
  893. int i;
  894. if (!sp->parent_pte)
  895. return;
  896. if (!sp->multimapped) {
  897. kvm_mmu_update_unsync_bitmap(sp->parent_pte);
  898. return;
  899. }
  900. hlist_for_each_entry(pte_chain, node, &sp->parent_ptes, link)
  901. for (i = 0; i < NR_PTE_CHAIN_ENTRIES; ++i) {
  902. if (!pte_chain->parent_ptes[i])
  903. break;
  904. kvm_mmu_update_unsync_bitmap(pte_chain->parent_ptes[i]);
  905. }
  906. }
  907. static int unsync_walk_fn(struct kvm_vcpu *vcpu, struct kvm_mmu_page *sp)
  908. {
  909. kvm_mmu_update_parents_unsync(sp);
  910. return 1;
  911. }
  912. static void kvm_mmu_mark_parents_unsync(struct kvm_vcpu *vcpu,
  913. struct kvm_mmu_page *sp)
  914. {
  915. mmu_parent_walk(vcpu, sp, unsync_walk_fn);
  916. kvm_mmu_update_parents_unsync(sp);
  917. }
  918. static void nonpaging_prefetch_page(struct kvm_vcpu *vcpu,
  919. struct kvm_mmu_page *sp)
  920. {
  921. int i;
  922. for (i = 0; i < PT64_ENT_PER_PAGE; ++i)
  923. sp->spt[i] = shadow_trap_nonpresent_pte;
  924. }
  925. static int nonpaging_sync_page(struct kvm_vcpu *vcpu,
  926. struct kvm_mmu_page *sp)
  927. {
  928. return 1;
  929. }
  930. static void nonpaging_invlpg(struct kvm_vcpu *vcpu, gva_t gva)
  931. {
  932. }
  933. #define KVM_PAGE_ARRAY_NR 16
  934. struct kvm_mmu_pages {
  935. struct mmu_page_and_offset {
  936. struct kvm_mmu_page *sp;
  937. unsigned int idx;
  938. } page[KVM_PAGE_ARRAY_NR];
  939. unsigned int nr;
  940. };
  941. #define for_each_unsync_children(bitmap, idx) \
  942. for (idx = find_first_bit(bitmap, 512); \
  943. idx < 512; \
  944. idx = find_next_bit(bitmap, 512, idx+1))
  945. static int mmu_pages_add(struct kvm_mmu_pages *pvec, struct kvm_mmu_page *sp,
  946. int idx)
  947. {
  948. int i;
  949. if (sp->unsync)
  950. for (i=0; i < pvec->nr; i++)
  951. if (pvec->page[i].sp == sp)
  952. return 0;
  953. pvec->page[pvec->nr].sp = sp;
  954. pvec->page[pvec->nr].idx = idx;
  955. pvec->nr++;
  956. return (pvec->nr == KVM_PAGE_ARRAY_NR);
  957. }
  958. static int __mmu_unsync_walk(struct kvm_mmu_page *sp,
  959. struct kvm_mmu_pages *pvec)
  960. {
  961. int i, ret, nr_unsync_leaf = 0;
  962. for_each_unsync_children(sp->unsync_child_bitmap, i) {
  963. u64 ent = sp->spt[i];
  964. if (is_shadow_present_pte(ent) && !is_large_pte(ent)) {
  965. struct kvm_mmu_page *child;
  966. child = page_header(ent & PT64_BASE_ADDR_MASK);
  967. if (child->unsync_children) {
  968. if (mmu_pages_add(pvec, child, i))
  969. return -ENOSPC;
  970. ret = __mmu_unsync_walk(child, pvec);
  971. if (!ret)
  972. __clear_bit(i, sp->unsync_child_bitmap);
  973. else if (ret > 0)
  974. nr_unsync_leaf += ret;
  975. else
  976. return ret;
  977. }
  978. if (child->unsync) {
  979. nr_unsync_leaf++;
  980. if (mmu_pages_add(pvec, child, i))
  981. return -ENOSPC;
  982. }
  983. }
  984. }
  985. if (find_first_bit(sp->unsync_child_bitmap, 512) == 512)
  986. sp->unsync_children = 0;
  987. return nr_unsync_leaf;
  988. }
  989. static int mmu_unsync_walk(struct kvm_mmu_page *sp,
  990. struct kvm_mmu_pages *pvec)
  991. {
  992. if (!sp->unsync_children)
  993. return 0;
  994. mmu_pages_add(pvec, sp, 0);
  995. return __mmu_unsync_walk(sp, pvec);
  996. }
  997. static struct kvm_mmu_page *kvm_mmu_lookup_page(struct kvm *kvm, gfn_t gfn)
  998. {
  999. unsigned index;
  1000. struct hlist_head *bucket;
  1001. struct kvm_mmu_page *sp;
  1002. struct hlist_node *node;
  1003. pgprintk("%s: looking for gfn %lx\n", __func__, gfn);
  1004. index = kvm_page_table_hashfn(gfn);
  1005. bucket = &kvm->arch.mmu_page_hash[index];
  1006. hlist_for_each_entry(sp, node, bucket, hash_link)
  1007. if (sp->gfn == gfn && !sp->role.direct
  1008. && !sp->role.invalid) {
  1009. pgprintk("%s: found role %x\n",
  1010. __func__, sp->role.word);
  1011. return sp;
  1012. }
  1013. return NULL;
  1014. }
  1015. static void kvm_unlink_unsync_page(struct kvm *kvm, struct kvm_mmu_page *sp)
  1016. {
  1017. WARN_ON(!sp->unsync);
  1018. sp->unsync = 0;
  1019. --kvm->stat.mmu_unsync;
  1020. }
  1021. static int kvm_mmu_zap_page(struct kvm *kvm, struct kvm_mmu_page *sp);
  1022. static int kvm_sync_page(struct kvm_vcpu *vcpu, struct kvm_mmu_page *sp)
  1023. {
  1024. if (sp->role.glevels != vcpu->arch.mmu.root_level) {
  1025. kvm_mmu_zap_page(vcpu->kvm, sp);
  1026. return 1;
  1027. }
  1028. trace_kvm_mmu_sync_page(sp);
  1029. if (rmap_write_protect(vcpu->kvm, sp->gfn))
  1030. kvm_flush_remote_tlbs(vcpu->kvm);
  1031. kvm_unlink_unsync_page(vcpu->kvm, sp);
  1032. if (vcpu->arch.mmu.sync_page(vcpu, sp)) {
  1033. kvm_mmu_zap_page(vcpu->kvm, sp);
  1034. return 1;
  1035. }
  1036. kvm_mmu_flush_tlb(vcpu);
  1037. return 0;
  1038. }
  1039. struct mmu_page_path {
  1040. struct kvm_mmu_page *parent[PT64_ROOT_LEVEL-1];
  1041. unsigned int idx[PT64_ROOT_LEVEL-1];
  1042. };
  1043. #define for_each_sp(pvec, sp, parents, i) \
  1044. for (i = mmu_pages_next(&pvec, &parents, -1), \
  1045. sp = pvec.page[i].sp; \
  1046. i < pvec.nr && ({ sp = pvec.page[i].sp; 1;}); \
  1047. i = mmu_pages_next(&pvec, &parents, i))
  1048. static int mmu_pages_next(struct kvm_mmu_pages *pvec,
  1049. struct mmu_page_path *parents,
  1050. int i)
  1051. {
  1052. int n;
  1053. for (n = i+1; n < pvec->nr; n++) {
  1054. struct kvm_mmu_page *sp = pvec->page[n].sp;
  1055. if (sp->role.level == PT_PAGE_TABLE_LEVEL) {
  1056. parents->idx[0] = pvec->page[n].idx;
  1057. return n;
  1058. }
  1059. parents->parent[sp->role.level-2] = sp;
  1060. parents->idx[sp->role.level-1] = pvec->page[n].idx;
  1061. }
  1062. return n;
  1063. }
  1064. static void mmu_pages_clear_parents(struct mmu_page_path *parents)
  1065. {
  1066. struct kvm_mmu_page *sp;
  1067. unsigned int level = 0;
  1068. do {
  1069. unsigned int idx = parents->idx[level];
  1070. sp = parents->parent[level];
  1071. if (!sp)
  1072. return;
  1073. --sp->unsync_children;
  1074. WARN_ON((int)sp->unsync_children < 0);
  1075. __clear_bit(idx, sp->unsync_child_bitmap);
  1076. level++;
  1077. } while (level < PT64_ROOT_LEVEL-1 && !sp->unsync_children);
  1078. }
  1079. static void kvm_mmu_pages_init(struct kvm_mmu_page *parent,
  1080. struct mmu_page_path *parents,
  1081. struct kvm_mmu_pages *pvec)
  1082. {
  1083. parents->parent[parent->role.level-1] = NULL;
  1084. pvec->nr = 0;
  1085. }
  1086. static void mmu_sync_children(struct kvm_vcpu *vcpu,
  1087. struct kvm_mmu_page *parent)
  1088. {
  1089. int i;
  1090. struct kvm_mmu_page *sp;
  1091. struct mmu_page_path parents;
  1092. struct kvm_mmu_pages pages;
  1093. kvm_mmu_pages_init(parent, &parents, &pages);
  1094. while (mmu_unsync_walk(parent, &pages)) {
  1095. int protected = 0;
  1096. for_each_sp(pages, sp, parents, i)
  1097. protected |= rmap_write_protect(vcpu->kvm, sp->gfn);
  1098. if (protected)
  1099. kvm_flush_remote_tlbs(vcpu->kvm);
  1100. for_each_sp(pages, sp, parents, i) {
  1101. kvm_sync_page(vcpu, sp);
  1102. mmu_pages_clear_parents(&parents);
  1103. }
  1104. cond_resched_lock(&vcpu->kvm->mmu_lock);
  1105. kvm_mmu_pages_init(parent, &parents, &pages);
  1106. }
  1107. }
  1108. static struct kvm_mmu_page *kvm_mmu_get_page(struct kvm_vcpu *vcpu,
  1109. gfn_t gfn,
  1110. gva_t gaddr,
  1111. unsigned level,
  1112. int direct,
  1113. unsigned access,
  1114. u64 *parent_pte)
  1115. {
  1116. union kvm_mmu_page_role role;
  1117. unsigned index;
  1118. unsigned quadrant;
  1119. struct hlist_head *bucket;
  1120. struct kvm_mmu_page *sp;
  1121. struct hlist_node *node, *tmp;
  1122. role = vcpu->arch.mmu.base_role;
  1123. role.level = level;
  1124. role.direct = direct;
  1125. role.access = access;
  1126. if (vcpu->arch.mmu.root_level <= PT32_ROOT_LEVEL) {
  1127. quadrant = gaddr >> (PAGE_SHIFT + (PT64_PT_BITS * level));
  1128. quadrant &= (1 << ((PT32_PT_BITS - PT64_PT_BITS) * level)) - 1;
  1129. role.quadrant = quadrant;
  1130. }
  1131. index = kvm_page_table_hashfn(gfn);
  1132. bucket = &vcpu->kvm->arch.mmu_page_hash[index];
  1133. hlist_for_each_entry_safe(sp, node, tmp, bucket, hash_link)
  1134. if (sp->gfn == gfn) {
  1135. if (sp->unsync)
  1136. if (kvm_sync_page(vcpu, sp))
  1137. continue;
  1138. if (sp->role.word != role.word)
  1139. continue;
  1140. mmu_page_add_parent_pte(vcpu, sp, parent_pte);
  1141. if (sp->unsync_children) {
  1142. set_bit(KVM_REQ_MMU_SYNC, &vcpu->requests);
  1143. kvm_mmu_mark_parents_unsync(vcpu, sp);
  1144. }
  1145. trace_kvm_mmu_get_page(sp, false);
  1146. return sp;
  1147. }
  1148. ++vcpu->kvm->stat.mmu_cache_miss;
  1149. sp = kvm_mmu_alloc_page(vcpu, parent_pte);
  1150. if (!sp)
  1151. return sp;
  1152. sp->gfn = gfn;
  1153. sp->role = role;
  1154. hlist_add_head(&sp->hash_link, bucket);
  1155. if (!direct) {
  1156. if (rmap_write_protect(vcpu->kvm, gfn))
  1157. kvm_flush_remote_tlbs(vcpu->kvm);
  1158. account_shadowed(vcpu->kvm, gfn);
  1159. }
  1160. if (shadow_trap_nonpresent_pte != shadow_notrap_nonpresent_pte)
  1161. vcpu->arch.mmu.prefetch_page(vcpu, sp);
  1162. else
  1163. nonpaging_prefetch_page(vcpu, sp);
  1164. trace_kvm_mmu_get_page(sp, true);
  1165. return sp;
  1166. }
  1167. static void shadow_walk_init(struct kvm_shadow_walk_iterator *iterator,
  1168. struct kvm_vcpu *vcpu, u64 addr)
  1169. {
  1170. iterator->addr = addr;
  1171. iterator->shadow_addr = vcpu->arch.mmu.root_hpa;
  1172. iterator->level = vcpu->arch.mmu.shadow_root_level;
  1173. if (iterator->level == PT32E_ROOT_LEVEL) {
  1174. iterator->shadow_addr
  1175. = vcpu->arch.mmu.pae_root[(addr >> 30) & 3];
  1176. iterator->shadow_addr &= PT64_BASE_ADDR_MASK;
  1177. --iterator->level;
  1178. if (!iterator->shadow_addr)
  1179. iterator->level = 0;
  1180. }
  1181. }
  1182. static bool shadow_walk_okay(struct kvm_shadow_walk_iterator *iterator)
  1183. {
  1184. if (iterator->level < PT_PAGE_TABLE_LEVEL)
  1185. return false;
  1186. if (iterator->level == PT_PAGE_TABLE_LEVEL)
  1187. if (is_large_pte(*iterator->sptep))
  1188. return false;
  1189. iterator->index = SHADOW_PT_INDEX(iterator->addr, iterator->level);
  1190. iterator->sptep = ((u64 *)__va(iterator->shadow_addr)) + iterator->index;
  1191. return true;
  1192. }
  1193. static void shadow_walk_next(struct kvm_shadow_walk_iterator *iterator)
  1194. {
  1195. iterator->shadow_addr = *iterator->sptep & PT64_BASE_ADDR_MASK;
  1196. --iterator->level;
  1197. }
  1198. static void kvm_mmu_page_unlink_children(struct kvm *kvm,
  1199. struct kvm_mmu_page *sp)
  1200. {
  1201. unsigned i;
  1202. u64 *pt;
  1203. u64 ent;
  1204. pt = sp->spt;
  1205. for (i = 0; i < PT64_ENT_PER_PAGE; ++i) {
  1206. ent = pt[i];
  1207. if (is_shadow_present_pte(ent)) {
  1208. if (!is_last_spte(ent, sp->role.level)) {
  1209. ent &= PT64_BASE_ADDR_MASK;
  1210. mmu_page_remove_parent_pte(page_header(ent),
  1211. &pt[i]);
  1212. } else {
  1213. if (is_large_pte(ent))
  1214. --kvm->stat.lpages;
  1215. rmap_remove(kvm, &pt[i]);
  1216. }
  1217. }
  1218. pt[i] = shadow_trap_nonpresent_pte;
  1219. }
  1220. }
  1221. static void kvm_mmu_put_page(struct kvm_mmu_page *sp, u64 *parent_pte)
  1222. {
  1223. mmu_page_remove_parent_pte(sp, parent_pte);
  1224. }
  1225. static void kvm_mmu_reset_last_pte_updated(struct kvm *kvm)
  1226. {
  1227. int i;
  1228. struct kvm_vcpu *vcpu;
  1229. kvm_for_each_vcpu(i, vcpu, kvm)
  1230. vcpu->arch.last_pte_updated = NULL;
  1231. }
  1232. static void kvm_mmu_unlink_parents(struct kvm *kvm, struct kvm_mmu_page *sp)
  1233. {
  1234. u64 *parent_pte;
  1235. while (sp->multimapped || sp->parent_pte) {
  1236. if (!sp->multimapped)
  1237. parent_pte = sp->parent_pte;
  1238. else {
  1239. struct kvm_pte_chain *chain;
  1240. chain = container_of(sp->parent_ptes.first,
  1241. struct kvm_pte_chain, link);
  1242. parent_pte = chain->parent_ptes[0];
  1243. }
  1244. BUG_ON(!parent_pte);
  1245. kvm_mmu_put_page(sp, parent_pte);
  1246. __set_spte(parent_pte, shadow_trap_nonpresent_pte);
  1247. }
  1248. }
  1249. static int mmu_zap_unsync_children(struct kvm *kvm,
  1250. struct kvm_mmu_page *parent)
  1251. {
  1252. int i, zapped = 0;
  1253. struct mmu_page_path parents;
  1254. struct kvm_mmu_pages pages;
  1255. if (parent->role.level == PT_PAGE_TABLE_LEVEL)
  1256. return 0;
  1257. kvm_mmu_pages_init(parent, &parents, &pages);
  1258. while (mmu_unsync_walk(parent, &pages)) {
  1259. struct kvm_mmu_page *sp;
  1260. for_each_sp(pages, sp, parents, i) {
  1261. kvm_mmu_zap_page(kvm, sp);
  1262. mmu_pages_clear_parents(&parents);
  1263. }
  1264. zapped += pages.nr;
  1265. kvm_mmu_pages_init(parent, &parents, &pages);
  1266. }
  1267. return zapped;
  1268. }
  1269. static int kvm_mmu_zap_page(struct kvm *kvm, struct kvm_mmu_page *sp)
  1270. {
  1271. int ret;
  1272. trace_kvm_mmu_zap_page(sp);
  1273. ++kvm->stat.mmu_shadow_zapped;
  1274. ret = mmu_zap_unsync_children(kvm, sp);
  1275. kvm_mmu_page_unlink_children(kvm, sp);
  1276. kvm_mmu_unlink_parents(kvm, sp);
  1277. kvm_flush_remote_tlbs(kvm);
  1278. if (!sp->role.invalid && !sp->role.direct)
  1279. unaccount_shadowed(kvm, sp->gfn);
  1280. if (sp->unsync)
  1281. kvm_unlink_unsync_page(kvm, sp);
  1282. if (!sp->root_count) {
  1283. hlist_del(&sp->hash_link);
  1284. kvm_mmu_free_page(kvm, sp);
  1285. } else {
  1286. sp->role.invalid = 1;
  1287. list_move(&sp->link, &kvm->arch.active_mmu_pages);
  1288. kvm_reload_remote_mmus(kvm);
  1289. }
  1290. kvm_mmu_reset_last_pte_updated(kvm);
  1291. return ret;
  1292. }
  1293. /*
  1294. * Changing the number of mmu pages allocated to the vm
  1295. * Note: if kvm_nr_mmu_pages is too small, you will get dead lock
  1296. */
  1297. void kvm_mmu_change_mmu_pages(struct kvm *kvm, unsigned int kvm_nr_mmu_pages)
  1298. {
  1299. int used_pages;
  1300. used_pages = kvm->arch.n_alloc_mmu_pages - kvm->arch.n_free_mmu_pages;
  1301. used_pages = max(0, used_pages);
  1302. /*
  1303. * If we set the number of mmu pages to be smaller be than the
  1304. * number of actived pages , we must to free some mmu pages before we
  1305. * change the value
  1306. */
  1307. if (used_pages > kvm_nr_mmu_pages) {
  1308. while (used_pages > kvm_nr_mmu_pages) {
  1309. struct kvm_mmu_page *page;
  1310. page = container_of(kvm->arch.active_mmu_pages.prev,
  1311. struct kvm_mmu_page, link);
  1312. kvm_mmu_zap_page(kvm, page);
  1313. used_pages--;
  1314. }
  1315. kvm->arch.n_free_mmu_pages = 0;
  1316. }
  1317. else
  1318. kvm->arch.n_free_mmu_pages += kvm_nr_mmu_pages
  1319. - kvm->arch.n_alloc_mmu_pages;
  1320. kvm->arch.n_alloc_mmu_pages = kvm_nr_mmu_pages;
  1321. }
  1322. static int kvm_mmu_unprotect_page(struct kvm *kvm, gfn_t gfn)
  1323. {
  1324. unsigned index;
  1325. struct hlist_head *bucket;
  1326. struct kvm_mmu_page *sp;
  1327. struct hlist_node *node, *n;
  1328. int r;
  1329. pgprintk("%s: looking for gfn %lx\n", __func__, gfn);
  1330. r = 0;
  1331. index = kvm_page_table_hashfn(gfn);
  1332. bucket = &kvm->arch.mmu_page_hash[index];
  1333. hlist_for_each_entry_safe(sp, node, n, bucket, hash_link)
  1334. if (sp->gfn == gfn && !sp->role.direct) {
  1335. pgprintk("%s: gfn %lx role %x\n", __func__, gfn,
  1336. sp->role.word);
  1337. r = 1;
  1338. if (kvm_mmu_zap_page(kvm, sp))
  1339. n = bucket->first;
  1340. }
  1341. return r;
  1342. }
  1343. static void mmu_unshadow(struct kvm *kvm, gfn_t gfn)
  1344. {
  1345. unsigned index;
  1346. struct hlist_head *bucket;
  1347. struct kvm_mmu_page *sp;
  1348. struct hlist_node *node, *nn;
  1349. index = kvm_page_table_hashfn(gfn);
  1350. bucket = &kvm->arch.mmu_page_hash[index];
  1351. hlist_for_each_entry_safe(sp, node, nn, bucket, hash_link) {
  1352. if (sp->gfn == gfn && !sp->role.direct
  1353. && !sp->role.invalid) {
  1354. pgprintk("%s: zap %lx %x\n",
  1355. __func__, gfn, sp->role.word);
  1356. kvm_mmu_zap_page(kvm, sp);
  1357. }
  1358. }
  1359. }
  1360. static void page_header_update_slot(struct kvm *kvm, void *pte, gfn_t gfn)
  1361. {
  1362. int slot = memslot_id(kvm, gfn);
  1363. struct kvm_mmu_page *sp = page_header(__pa(pte));
  1364. __set_bit(slot, sp->slot_bitmap);
  1365. }
  1366. static void mmu_convert_notrap(struct kvm_mmu_page *sp)
  1367. {
  1368. int i;
  1369. u64 *pt = sp->spt;
  1370. if (shadow_trap_nonpresent_pte == shadow_notrap_nonpresent_pte)
  1371. return;
  1372. for (i = 0; i < PT64_ENT_PER_PAGE; ++i) {
  1373. if (pt[i] == shadow_notrap_nonpresent_pte)
  1374. __set_spte(&pt[i], shadow_trap_nonpresent_pte);
  1375. }
  1376. }
  1377. struct page *gva_to_page(struct kvm_vcpu *vcpu, gva_t gva)
  1378. {
  1379. struct page *page;
  1380. gpa_t gpa = kvm_mmu_gva_to_gpa_read(vcpu, gva, NULL);
  1381. if (gpa == UNMAPPED_GVA)
  1382. return NULL;
  1383. page = gfn_to_page(vcpu->kvm, gpa >> PAGE_SHIFT);
  1384. return page;
  1385. }
  1386. /*
  1387. * The function is based on mtrr_type_lookup() in
  1388. * arch/x86/kernel/cpu/mtrr/generic.c
  1389. */
  1390. static int get_mtrr_type(struct mtrr_state_type *mtrr_state,
  1391. u64 start, u64 end)
  1392. {
  1393. int i;
  1394. u64 base, mask;
  1395. u8 prev_match, curr_match;
  1396. int num_var_ranges = KVM_NR_VAR_MTRR;
  1397. if (!mtrr_state->enabled)
  1398. return 0xFF;
  1399. /* Make end inclusive end, instead of exclusive */
  1400. end--;
  1401. /* Look in fixed ranges. Just return the type as per start */
  1402. if (mtrr_state->have_fixed && (start < 0x100000)) {
  1403. int idx;
  1404. if (start < 0x80000) {
  1405. idx = 0;
  1406. idx += (start >> 16);
  1407. return mtrr_state->fixed_ranges[idx];
  1408. } else if (start < 0xC0000) {
  1409. idx = 1 * 8;
  1410. idx += ((start - 0x80000) >> 14);
  1411. return mtrr_state->fixed_ranges[idx];
  1412. } else if (start < 0x1000000) {
  1413. idx = 3 * 8;
  1414. idx += ((start - 0xC0000) >> 12);
  1415. return mtrr_state->fixed_ranges[idx];
  1416. }
  1417. }
  1418. /*
  1419. * Look in variable ranges
  1420. * Look of multiple ranges matching this address and pick type
  1421. * as per MTRR precedence
  1422. */
  1423. if (!(mtrr_state->enabled & 2))
  1424. return mtrr_state->def_type;
  1425. prev_match = 0xFF;
  1426. for (i = 0; i < num_var_ranges; ++i) {
  1427. unsigned short start_state, end_state;
  1428. if (!(mtrr_state->var_ranges[i].mask_lo & (1 << 11)))
  1429. continue;
  1430. base = (((u64)mtrr_state->var_ranges[i].base_hi) << 32) +
  1431. (mtrr_state->var_ranges[i].base_lo & PAGE_MASK);
  1432. mask = (((u64)mtrr_state->var_ranges[i].mask_hi) << 32) +
  1433. (mtrr_state->var_ranges[i].mask_lo & PAGE_MASK);
  1434. start_state = ((start & mask) == (base & mask));
  1435. end_state = ((end & mask) == (base & mask));
  1436. if (start_state != end_state)
  1437. return 0xFE;
  1438. if ((start & mask) != (base & mask))
  1439. continue;
  1440. curr_match = mtrr_state->var_ranges[i].base_lo & 0xff;
  1441. if (prev_match == 0xFF) {
  1442. prev_match = curr_match;
  1443. continue;
  1444. }
  1445. if (prev_match == MTRR_TYPE_UNCACHABLE ||
  1446. curr_match == MTRR_TYPE_UNCACHABLE)
  1447. return MTRR_TYPE_UNCACHABLE;
  1448. if ((prev_match == MTRR_TYPE_WRBACK &&
  1449. curr_match == MTRR_TYPE_WRTHROUGH) ||
  1450. (prev_match == MTRR_TYPE_WRTHROUGH &&
  1451. curr_match == MTRR_TYPE_WRBACK)) {
  1452. prev_match = MTRR_TYPE_WRTHROUGH;
  1453. curr_match = MTRR_TYPE_WRTHROUGH;
  1454. }
  1455. if (prev_match != curr_match)
  1456. return MTRR_TYPE_UNCACHABLE;
  1457. }
  1458. if (prev_match != 0xFF)
  1459. return prev_match;
  1460. return mtrr_state->def_type;
  1461. }
  1462. u8 kvm_get_guest_memory_type(struct kvm_vcpu *vcpu, gfn_t gfn)
  1463. {
  1464. u8 mtrr;
  1465. mtrr = get_mtrr_type(&vcpu->arch.mtrr_state, gfn << PAGE_SHIFT,
  1466. (gfn << PAGE_SHIFT) + PAGE_SIZE);
  1467. if (mtrr == 0xfe || mtrr == 0xff)
  1468. mtrr = MTRR_TYPE_WRBACK;
  1469. return mtrr;
  1470. }
  1471. EXPORT_SYMBOL_GPL(kvm_get_guest_memory_type);
  1472. static int kvm_unsync_page(struct kvm_vcpu *vcpu, struct kvm_mmu_page *sp)
  1473. {
  1474. unsigned index;
  1475. struct hlist_head *bucket;
  1476. struct kvm_mmu_page *s;
  1477. struct hlist_node *node, *n;
  1478. trace_kvm_mmu_unsync_page(sp);
  1479. index = kvm_page_table_hashfn(sp->gfn);
  1480. bucket = &vcpu->kvm->arch.mmu_page_hash[index];
  1481. /* don't unsync if pagetable is shadowed with multiple roles */
  1482. hlist_for_each_entry_safe(s, node, n, bucket, hash_link) {
  1483. if (s->gfn != sp->gfn || s->role.direct)
  1484. continue;
  1485. if (s->role.word != sp->role.word)
  1486. return 1;
  1487. }
  1488. ++vcpu->kvm->stat.mmu_unsync;
  1489. sp->unsync = 1;
  1490. kvm_mmu_mark_parents_unsync(vcpu, sp);
  1491. mmu_convert_notrap(sp);
  1492. return 0;
  1493. }
  1494. static int mmu_need_write_protect(struct kvm_vcpu *vcpu, gfn_t gfn,
  1495. bool can_unsync)
  1496. {
  1497. struct kvm_mmu_page *shadow;
  1498. shadow = kvm_mmu_lookup_page(vcpu->kvm, gfn);
  1499. if (shadow) {
  1500. if (shadow->role.level != PT_PAGE_TABLE_LEVEL)
  1501. return 1;
  1502. if (shadow->unsync)
  1503. return 0;
  1504. if (can_unsync && oos_shadow)
  1505. return kvm_unsync_page(vcpu, shadow);
  1506. return 1;
  1507. }
  1508. return 0;
  1509. }
  1510. static int set_spte(struct kvm_vcpu *vcpu, u64 *sptep,
  1511. unsigned pte_access, int user_fault,
  1512. int write_fault, int dirty, int level,
  1513. gfn_t gfn, pfn_t pfn, bool speculative,
  1514. bool can_unsync, bool reset_host_protection)
  1515. {
  1516. u64 spte;
  1517. int ret = 0;
  1518. /*
  1519. * We don't set the accessed bit, since we sometimes want to see
  1520. * whether the guest actually used the pte (in order to detect
  1521. * demand paging).
  1522. */
  1523. spte = shadow_base_present_pte | shadow_dirty_mask;
  1524. if (!speculative)
  1525. spte |= shadow_accessed_mask;
  1526. if (!dirty)
  1527. pte_access &= ~ACC_WRITE_MASK;
  1528. if (pte_access & ACC_EXEC_MASK)
  1529. spte |= shadow_x_mask;
  1530. else
  1531. spte |= shadow_nx_mask;
  1532. if (pte_access & ACC_USER_MASK)
  1533. spte |= shadow_user_mask;
  1534. if (level > PT_PAGE_TABLE_LEVEL)
  1535. spte |= PT_PAGE_SIZE_MASK;
  1536. if (tdp_enabled)
  1537. spte |= kvm_x86_ops->get_mt_mask(vcpu, gfn,
  1538. kvm_is_mmio_pfn(pfn));
  1539. if (reset_host_protection)
  1540. spte |= SPTE_HOST_WRITEABLE;
  1541. spte |= (u64)pfn << PAGE_SHIFT;
  1542. if ((pte_access & ACC_WRITE_MASK)
  1543. || (write_fault && !is_write_protection(vcpu) && !user_fault)) {
  1544. if (level > PT_PAGE_TABLE_LEVEL &&
  1545. has_wrprotected_page(vcpu->kvm, gfn, level)) {
  1546. ret = 1;
  1547. spte = shadow_trap_nonpresent_pte;
  1548. goto set_pte;
  1549. }
  1550. spte |= PT_WRITABLE_MASK;
  1551. /*
  1552. * Optimization: for pte sync, if spte was writable the hash
  1553. * lookup is unnecessary (and expensive). Write protection
  1554. * is responsibility of mmu_get_page / kvm_sync_page.
  1555. * Same reasoning can be applied to dirty page accounting.
  1556. */
  1557. if (!can_unsync && is_writable_pte(*sptep))
  1558. goto set_pte;
  1559. if (mmu_need_write_protect(vcpu, gfn, can_unsync)) {
  1560. pgprintk("%s: found shadow page for %lx, marking ro\n",
  1561. __func__, gfn);
  1562. ret = 1;
  1563. pte_access &= ~ACC_WRITE_MASK;
  1564. if (is_writable_pte(spte))
  1565. spte &= ~PT_WRITABLE_MASK;
  1566. }
  1567. }
  1568. if (pte_access & ACC_WRITE_MASK)
  1569. mark_page_dirty(vcpu->kvm, gfn);
  1570. set_pte:
  1571. __set_spte(sptep, spte);
  1572. return ret;
  1573. }
  1574. static void mmu_set_spte(struct kvm_vcpu *vcpu, u64 *sptep,
  1575. unsigned pt_access, unsigned pte_access,
  1576. int user_fault, int write_fault, int dirty,
  1577. int *ptwrite, int level, gfn_t gfn,
  1578. pfn_t pfn, bool speculative,
  1579. bool reset_host_protection)
  1580. {
  1581. int was_rmapped = 0;
  1582. int was_writable = is_writable_pte(*sptep);
  1583. int rmap_count;
  1584. pgprintk("%s: spte %llx access %x write_fault %d"
  1585. " user_fault %d gfn %lx\n",
  1586. __func__, *sptep, pt_access,
  1587. write_fault, user_fault, gfn);
  1588. if (is_rmap_spte(*sptep)) {
  1589. /*
  1590. * If we overwrite a PTE page pointer with a 2MB PMD, unlink
  1591. * the parent of the now unreachable PTE.
  1592. */
  1593. if (level > PT_PAGE_TABLE_LEVEL &&
  1594. !is_large_pte(*sptep)) {
  1595. struct kvm_mmu_page *child;
  1596. u64 pte = *sptep;
  1597. child = page_header(pte & PT64_BASE_ADDR_MASK);
  1598. mmu_page_remove_parent_pte(child, sptep);
  1599. } else if (pfn != spte_to_pfn(*sptep)) {
  1600. pgprintk("hfn old %lx new %lx\n",
  1601. spte_to_pfn(*sptep), pfn);
  1602. rmap_remove(vcpu->kvm, sptep);
  1603. } else
  1604. was_rmapped = 1;
  1605. }
  1606. if (set_spte(vcpu, sptep, pte_access, user_fault, write_fault,
  1607. dirty, level, gfn, pfn, speculative, true,
  1608. reset_host_protection)) {
  1609. if (write_fault)
  1610. *ptwrite = 1;
  1611. kvm_x86_ops->tlb_flush(vcpu);
  1612. }
  1613. pgprintk("%s: setting spte %llx\n", __func__, *sptep);
  1614. pgprintk("instantiating %s PTE (%s) at %ld (%llx) addr %p\n",
  1615. is_large_pte(*sptep)? "2MB" : "4kB",
  1616. *sptep & PT_PRESENT_MASK ?"RW":"R", gfn,
  1617. *sptep, sptep);
  1618. if (!was_rmapped && is_large_pte(*sptep))
  1619. ++vcpu->kvm->stat.lpages;
  1620. page_header_update_slot(vcpu->kvm, sptep, gfn);
  1621. if (!was_rmapped) {
  1622. rmap_count = rmap_add(vcpu, sptep, gfn);
  1623. kvm_release_pfn_clean(pfn);
  1624. if (rmap_count > RMAP_RECYCLE_THRESHOLD)
  1625. rmap_recycle(vcpu, sptep, gfn);
  1626. } else {
  1627. if (was_writable)
  1628. kvm_release_pfn_dirty(pfn);
  1629. else
  1630. kvm_release_pfn_clean(pfn);
  1631. }
  1632. if (speculative) {
  1633. vcpu->arch.last_pte_updated = sptep;
  1634. vcpu->arch.last_pte_gfn = gfn;
  1635. }
  1636. }
  1637. static void nonpaging_new_cr3(struct kvm_vcpu *vcpu)
  1638. {
  1639. }
  1640. static int __direct_map(struct kvm_vcpu *vcpu, gpa_t v, int write,
  1641. int level, gfn_t gfn, pfn_t pfn)
  1642. {
  1643. struct kvm_shadow_walk_iterator iterator;
  1644. struct kvm_mmu_page *sp;
  1645. int pt_write = 0;
  1646. gfn_t pseudo_gfn;
  1647. for_each_shadow_entry(vcpu, (u64)gfn << PAGE_SHIFT, iterator) {
  1648. if (iterator.level == level) {
  1649. mmu_set_spte(vcpu, iterator.sptep, ACC_ALL, ACC_ALL,
  1650. 0, write, 1, &pt_write,
  1651. level, gfn, pfn, false, true);
  1652. ++vcpu->stat.pf_fixed;
  1653. break;
  1654. }
  1655. if (*iterator.sptep == shadow_trap_nonpresent_pte) {
  1656. pseudo_gfn = (iterator.addr & PT64_DIR_BASE_ADDR_MASK) >> PAGE_SHIFT;
  1657. sp = kvm_mmu_get_page(vcpu, pseudo_gfn, iterator.addr,
  1658. iterator.level - 1,
  1659. 1, ACC_ALL, iterator.sptep);
  1660. if (!sp) {
  1661. pgprintk("nonpaging_map: ENOMEM\n");
  1662. kvm_release_pfn_clean(pfn);
  1663. return -ENOMEM;
  1664. }
  1665. __set_spte(iterator.sptep,
  1666. __pa(sp->spt)
  1667. | PT_PRESENT_MASK | PT_WRITABLE_MASK
  1668. | shadow_user_mask | shadow_x_mask);
  1669. }
  1670. }
  1671. return pt_write;
  1672. }
  1673. static int nonpaging_map(struct kvm_vcpu *vcpu, gva_t v, int write, gfn_t gfn)
  1674. {
  1675. int r;
  1676. int level;
  1677. pfn_t pfn;
  1678. unsigned long mmu_seq;
  1679. level = mapping_level(vcpu, gfn);
  1680. /*
  1681. * This path builds a PAE pagetable - so we can map 2mb pages at
  1682. * maximum. Therefore check if the level is larger than that.
  1683. */
  1684. if (level > PT_DIRECTORY_LEVEL)
  1685. level = PT_DIRECTORY_LEVEL;
  1686. gfn &= ~(KVM_PAGES_PER_HPAGE(level) - 1);
  1687. mmu_seq = vcpu->kvm->mmu_notifier_seq;
  1688. smp_rmb();
  1689. pfn = gfn_to_pfn(vcpu->kvm, gfn);
  1690. /* mmio */
  1691. if (is_error_pfn(pfn)) {
  1692. kvm_release_pfn_clean(pfn);
  1693. return 1;
  1694. }
  1695. spin_lock(&vcpu->kvm->mmu_lock);
  1696. if (mmu_notifier_retry(vcpu, mmu_seq))
  1697. goto out_unlock;
  1698. kvm_mmu_free_some_pages(vcpu);
  1699. r = __direct_map(vcpu, v, write, level, gfn, pfn);
  1700. spin_unlock(&vcpu->kvm->mmu_lock);
  1701. return r;
  1702. out_unlock:
  1703. spin_unlock(&vcpu->kvm->mmu_lock);
  1704. kvm_release_pfn_clean(pfn);
  1705. return 0;
  1706. }
  1707. static void mmu_free_roots(struct kvm_vcpu *vcpu)
  1708. {
  1709. int i;
  1710. struct kvm_mmu_page *sp;
  1711. if (!VALID_PAGE(vcpu->arch.mmu.root_hpa))
  1712. return;
  1713. spin_lock(&vcpu->kvm->mmu_lock);
  1714. if (vcpu->arch.mmu.shadow_root_level == PT64_ROOT_LEVEL) {
  1715. hpa_t root = vcpu->arch.mmu.root_hpa;
  1716. sp = page_header(root);
  1717. --sp->root_count;
  1718. if (!sp->root_count && sp->role.invalid)
  1719. kvm_mmu_zap_page(vcpu->kvm, sp);
  1720. vcpu->arch.mmu.root_hpa = INVALID_PAGE;
  1721. spin_unlock(&vcpu->kvm->mmu_lock);
  1722. return;
  1723. }
  1724. for (i = 0; i < 4; ++i) {
  1725. hpa_t root = vcpu->arch.mmu.pae_root[i];
  1726. if (root) {
  1727. root &= PT64_BASE_ADDR_MASK;
  1728. sp = page_header(root);
  1729. --sp->root_count;
  1730. if (!sp->root_count && sp->role.invalid)
  1731. kvm_mmu_zap_page(vcpu->kvm, sp);
  1732. }
  1733. vcpu->arch.mmu.pae_root[i] = INVALID_PAGE;
  1734. }
  1735. spin_unlock(&vcpu->kvm->mmu_lock);
  1736. vcpu->arch.mmu.root_hpa = INVALID_PAGE;
  1737. }
  1738. static int mmu_check_root(struct kvm_vcpu *vcpu, gfn_t root_gfn)
  1739. {
  1740. int ret = 0;
  1741. if (!kvm_is_visible_gfn(vcpu->kvm, root_gfn)) {
  1742. set_bit(KVM_REQ_TRIPLE_FAULT, &vcpu->requests);
  1743. ret = 1;
  1744. }
  1745. return ret;
  1746. }
  1747. static int mmu_alloc_roots(struct kvm_vcpu *vcpu)
  1748. {
  1749. int i;
  1750. gfn_t root_gfn;
  1751. struct kvm_mmu_page *sp;
  1752. int direct = 0;
  1753. u64 pdptr;
  1754. root_gfn = vcpu->arch.cr3 >> PAGE_SHIFT;
  1755. if (vcpu->arch.mmu.shadow_root_level == PT64_ROOT_LEVEL) {
  1756. hpa_t root = vcpu->arch.mmu.root_hpa;
  1757. ASSERT(!VALID_PAGE(root));
  1758. if (tdp_enabled)
  1759. direct = 1;
  1760. if (mmu_check_root(vcpu, root_gfn))
  1761. return 1;
  1762. sp = kvm_mmu_get_page(vcpu, root_gfn, 0,
  1763. PT64_ROOT_LEVEL, direct,
  1764. ACC_ALL, NULL);
  1765. root = __pa(sp->spt);
  1766. ++sp->root_count;
  1767. vcpu->arch.mmu.root_hpa = root;
  1768. return 0;
  1769. }
  1770. direct = !is_paging(vcpu);
  1771. if (tdp_enabled)
  1772. direct = 1;
  1773. for (i = 0; i < 4; ++i) {
  1774. hpa_t root = vcpu->arch.mmu.pae_root[i];
  1775. ASSERT(!VALID_PAGE(root));
  1776. if (vcpu->arch.mmu.root_level == PT32E_ROOT_LEVEL) {
  1777. pdptr = kvm_pdptr_read(vcpu, i);
  1778. if (!is_present_gpte(pdptr)) {
  1779. vcpu->arch.mmu.pae_root[i] = 0;
  1780. continue;
  1781. }
  1782. root_gfn = pdptr >> PAGE_SHIFT;
  1783. } else if (vcpu->arch.mmu.root_level == 0)
  1784. root_gfn = 0;
  1785. if (mmu_check_root(vcpu, root_gfn))
  1786. return 1;
  1787. sp = kvm_mmu_get_page(vcpu, root_gfn, i << 30,
  1788. PT32_ROOT_LEVEL, direct,
  1789. ACC_ALL, NULL);
  1790. root = __pa(sp->spt);
  1791. ++sp->root_count;
  1792. vcpu->arch.mmu.pae_root[i] = root | PT_PRESENT_MASK;
  1793. }
  1794. vcpu->arch.mmu.root_hpa = __pa(vcpu->arch.mmu.pae_root);
  1795. return 0;
  1796. }
  1797. static void mmu_sync_roots(struct kvm_vcpu *vcpu)
  1798. {
  1799. int i;
  1800. struct kvm_mmu_page *sp;
  1801. if (!VALID_PAGE(vcpu->arch.mmu.root_hpa))
  1802. return;
  1803. if (vcpu->arch.mmu.shadow_root_level == PT64_ROOT_LEVEL) {
  1804. hpa_t root = vcpu->arch.mmu.root_hpa;
  1805. sp = page_header(root);
  1806. mmu_sync_children(vcpu, sp);
  1807. return;
  1808. }
  1809. for (i = 0; i < 4; ++i) {
  1810. hpa_t root = vcpu->arch.mmu.pae_root[i];
  1811. if (root && VALID_PAGE(root)) {
  1812. root &= PT64_BASE_ADDR_MASK;
  1813. sp = page_header(root);
  1814. mmu_sync_children(vcpu, sp);
  1815. }
  1816. }
  1817. }
  1818. void kvm_mmu_sync_roots(struct kvm_vcpu *vcpu)
  1819. {
  1820. spin_lock(&vcpu->kvm->mmu_lock);
  1821. mmu_sync_roots(vcpu);
  1822. spin_unlock(&vcpu->kvm->mmu_lock);
  1823. }
  1824. static gpa_t nonpaging_gva_to_gpa(struct kvm_vcpu *vcpu, gva_t vaddr,
  1825. u32 access, u32 *error)
  1826. {
  1827. if (error)
  1828. *error = 0;
  1829. return vaddr;
  1830. }
  1831. static int nonpaging_page_fault(struct kvm_vcpu *vcpu, gva_t gva,
  1832. u32 error_code)
  1833. {
  1834. gfn_t gfn;
  1835. int r;
  1836. pgprintk("%s: gva %lx error %x\n", __func__, gva, error_code);
  1837. r = mmu_topup_memory_caches(vcpu);
  1838. if (r)
  1839. return r;
  1840. ASSERT(vcpu);
  1841. ASSERT(VALID_PAGE(vcpu->arch.mmu.root_hpa));
  1842. gfn = gva >> PAGE_SHIFT;
  1843. return nonpaging_map(vcpu, gva & PAGE_MASK,
  1844. error_code & PFERR_WRITE_MASK, gfn);
  1845. }
  1846. static int tdp_page_fault(struct kvm_vcpu *vcpu, gva_t gpa,
  1847. u32 error_code)
  1848. {
  1849. pfn_t pfn;
  1850. int r;
  1851. int level;
  1852. gfn_t gfn = gpa >> PAGE_SHIFT;
  1853. unsigned long mmu_seq;
  1854. ASSERT(vcpu);
  1855. ASSERT(VALID_PAGE(vcpu->arch.mmu.root_hpa));
  1856. r = mmu_topup_memory_caches(vcpu);
  1857. if (r)
  1858. return r;
  1859. level = mapping_level(vcpu, gfn);
  1860. gfn &= ~(KVM_PAGES_PER_HPAGE(level) - 1);
  1861. mmu_seq = vcpu->kvm->mmu_notifier_seq;
  1862. smp_rmb();
  1863. pfn = gfn_to_pfn(vcpu->kvm, gfn);
  1864. if (is_error_pfn(pfn)) {
  1865. kvm_release_pfn_clean(pfn);
  1866. return 1;
  1867. }
  1868. spin_lock(&vcpu->kvm->mmu_lock);
  1869. if (mmu_notifier_retry(vcpu, mmu_seq))
  1870. goto out_unlock;
  1871. kvm_mmu_free_some_pages(vcpu);
  1872. r = __direct_map(vcpu, gpa, error_code & PFERR_WRITE_MASK,
  1873. level, gfn, pfn);
  1874. spin_unlock(&vcpu->kvm->mmu_lock);
  1875. return r;
  1876. out_unlock:
  1877. spin_unlock(&vcpu->kvm->mmu_lock);
  1878. kvm_release_pfn_clean(pfn);
  1879. return 0;
  1880. }
  1881. static void nonpaging_free(struct kvm_vcpu *vcpu)
  1882. {
  1883. mmu_free_roots(vcpu);
  1884. }
  1885. static int nonpaging_init_context(struct kvm_vcpu *vcpu)
  1886. {
  1887. struct kvm_mmu *context = &vcpu->arch.mmu;
  1888. context->new_cr3 = nonpaging_new_cr3;
  1889. context->page_fault = nonpaging_page_fault;
  1890. context->gva_to_gpa = nonpaging_gva_to_gpa;
  1891. context->free = nonpaging_free;
  1892. context->prefetch_page = nonpaging_prefetch_page;
  1893. context->sync_page = nonpaging_sync_page;
  1894. context->invlpg = nonpaging_invlpg;
  1895. context->root_level = 0;
  1896. context->shadow_root_level = PT32E_ROOT_LEVEL;
  1897. context->root_hpa = INVALID_PAGE;
  1898. return 0;
  1899. }
  1900. void kvm_mmu_flush_tlb(struct kvm_vcpu *vcpu)
  1901. {
  1902. ++vcpu->stat.tlb_flush;
  1903. kvm_x86_ops->tlb_flush(vcpu);
  1904. }
  1905. static void paging_new_cr3(struct kvm_vcpu *vcpu)
  1906. {
  1907. pgprintk("%s: cr3 %lx\n", __func__, vcpu->arch.cr3);
  1908. mmu_free_roots(vcpu);
  1909. }
  1910. static void inject_page_fault(struct kvm_vcpu *vcpu,
  1911. u64 addr,
  1912. u32 err_code)
  1913. {
  1914. kvm_inject_page_fault(vcpu, addr, err_code);
  1915. }
  1916. static void paging_free(struct kvm_vcpu *vcpu)
  1917. {
  1918. nonpaging_free(vcpu);
  1919. }
  1920. static bool is_rsvd_bits_set(struct kvm_vcpu *vcpu, u64 gpte, int level)
  1921. {
  1922. int bit7;
  1923. bit7 = (gpte >> 7) & 1;
  1924. return (gpte & vcpu->arch.mmu.rsvd_bits_mask[bit7][level-1]) != 0;
  1925. }
  1926. #define PTTYPE 64
  1927. #include "paging_tmpl.h"
  1928. #undef PTTYPE
  1929. #define PTTYPE 32
  1930. #include "paging_tmpl.h"
  1931. #undef PTTYPE
  1932. static void reset_rsvds_bits_mask(struct kvm_vcpu *vcpu, int level)
  1933. {
  1934. struct kvm_mmu *context = &vcpu->arch.mmu;
  1935. int maxphyaddr = cpuid_maxphyaddr(vcpu);
  1936. u64 exb_bit_rsvd = 0;
  1937. if (!is_nx(vcpu))
  1938. exb_bit_rsvd = rsvd_bits(63, 63);
  1939. switch (level) {
  1940. case PT32_ROOT_LEVEL:
  1941. /* no rsvd bits for 2 level 4K page table entries */
  1942. context->rsvd_bits_mask[0][1] = 0;
  1943. context->rsvd_bits_mask[0][0] = 0;
  1944. if (is_cpuid_PSE36())
  1945. /* 36bits PSE 4MB page */
  1946. context->rsvd_bits_mask[1][1] = rsvd_bits(17, 21);
  1947. else
  1948. /* 32 bits PSE 4MB page */
  1949. context->rsvd_bits_mask[1][1] = rsvd_bits(13, 21);
  1950. context->rsvd_bits_mask[1][0] = context->rsvd_bits_mask[1][0];
  1951. break;
  1952. case PT32E_ROOT_LEVEL:
  1953. context->rsvd_bits_mask[0][2] =
  1954. rsvd_bits(maxphyaddr, 63) |
  1955. rsvd_bits(7, 8) | rsvd_bits(1, 2); /* PDPTE */
  1956. context->rsvd_bits_mask[0][1] = exb_bit_rsvd |
  1957. rsvd_bits(maxphyaddr, 62); /* PDE */
  1958. context->rsvd_bits_mask[0][0] = exb_bit_rsvd |
  1959. rsvd_bits(maxphyaddr, 62); /* PTE */
  1960. context->rsvd_bits_mask[1][1] = exb_bit_rsvd |
  1961. rsvd_bits(maxphyaddr, 62) |
  1962. rsvd_bits(13, 20); /* large page */
  1963. context->rsvd_bits_mask[1][0] = context->rsvd_bits_mask[1][0];
  1964. break;
  1965. case PT64_ROOT_LEVEL:
  1966. context->rsvd_bits_mask[0][3] = exb_bit_rsvd |
  1967. rsvd_bits(maxphyaddr, 51) | rsvd_bits(7, 8);
  1968. context->rsvd_bits_mask[0][2] = exb_bit_rsvd |
  1969. rsvd_bits(maxphyaddr, 51) | rsvd_bits(7, 8);
  1970. context->rsvd_bits_mask[0][1] = exb_bit_rsvd |
  1971. rsvd_bits(maxphyaddr, 51);
  1972. context->rsvd_bits_mask[0][0] = exb_bit_rsvd |
  1973. rsvd_bits(maxphyaddr, 51);
  1974. context->rsvd_bits_mask[1][3] = context->rsvd_bits_mask[0][3];
  1975. context->rsvd_bits_mask[1][2] = exb_bit_rsvd |
  1976. rsvd_bits(maxphyaddr, 51) |
  1977. rsvd_bits(13, 29);
  1978. context->rsvd_bits_mask[1][1] = exb_bit_rsvd |
  1979. rsvd_bits(maxphyaddr, 51) |
  1980. rsvd_bits(13, 20); /* large page */
  1981. context->rsvd_bits_mask[1][0] = context->rsvd_bits_mask[1][0];
  1982. break;
  1983. }
  1984. }
  1985. static int paging64_init_context_common(struct kvm_vcpu *vcpu, int level)
  1986. {
  1987. struct kvm_mmu *context = &vcpu->arch.mmu;
  1988. ASSERT(is_pae(vcpu));
  1989. context->new_cr3 = paging_new_cr3;
  1990. context->page_fault = paging64_page_fault;
  1991. context->gva_to_gpa = paging64_gva_to_gpa;
  1992. context->prefetch_page = paging64_prefetch_page;
  1993. context->sync_page = paging64_sync_page;
  1994. context->invlpg = paging64_invlpg;
  1995. context->free = paging_free;
  1996. context->root_level = level;
  1997. context->shadow_root_level = level;
  1998. context->root_hpa = INVALID_PAGE;
  1999. return 0;
  2000. }
  2001. static int paging64_init_context(struct kvm_vcpu *vcpu)
  2002. {
  2003. reset_rsvds_bits_mask(vcpu, PT64_ROOT_LEVEL);
  2004. return paging64_init_context_common(vcpu, PT64_ROOT_LEVEL);
  2005. }
  2006. static int paging32_init_context(struct kvm_vcpu *vcpu)
  2007. {
  2008. struct kvm_mmu *context = &vcpu->arch.mmu;
  2009. reset_rsvds_bits_mask(vcpu, PT32_ROOT_LEVEL);
  2010. context->new_cr3 = paging_new_cr3;
  2011. context->page_fault = paging32_page_fault;
  2012. context->gva_to_gpa = paging32_gva_to_gpa;
  2013. context->free = paging_free;
  2014. context->prefetch_page = paging32_prefetch_page;
  2015. context->sync_page = paging32_sync_page;
  2016. context->invlpg = paging32_invlpg;
  2017. context->root_level = PT32_ROOT_LEVEL;
  2018. context->shadow_root_level = PT32E_ROOT_LEVEL;
  2019. context->root_hpa = INVALID_PAGE;
  2020. return 0;
  2021. }
  2022. static int paging32E_init_context(struct kvm_vcpu *vcpu)
  2023. {
  2024. reset_rsvds_bits_mask(vcpu, PT32E_ROOT_LEVEL);
  2025. return paging64_init_context_common(vcpu, PT32E_ROOT_LEVEL);
  2026. }
  2027. static int init_kvm_tdp_mmu(struct kvm_vcpu *vcpu)
  2028. {
  2029. struct kvm_mmu *context = &vcpu->arch.mmu;
  2030. context->new_cr3 = nonpaging_new_cr3;
  2031. context->page_fault = tdp_page_fault;
  2032. context->free = nonpaging_free;
  2033. context->prefetch_page = nonpaging_prefetch_page;
  2034. context->sync_page = nonpaging_sync_page;
  2035. context->invlpg = nonpaging_invlpg;
  2036. context->shadow_root_level = kvm_x86_ops->get_tdp_level();
  2037. context->root_hpa = INVALID_PAGE;
  2038. if (!is_paging(vcpu)) {
  2039. context->gva_to_gpa = nonpaging_gva_to_gpa;
  2040. context->root_level = 0;
  2041. } else if (is_long_mode(vcpu)) {
  2042. reset_rsvds_bits_mask(vcpu, PT64_ROOT_LEVEL);
  2043. context->gva_to_gpa = paging64_gva_to_gpa;
  2044. context->root_level = PT64_ROOT_LEVEL;
  2045. } else if (is_pae(vcpu)) {
  2046. reset_rsvds_bits_mask(vcpu, PT32E_ROOT_LEVEL);
  2047. context->gva_to_gpa = paging64_gva_to_gpa;
  2048. context->root_level = PT32E_ROOT_LEVEL;
  2049. } else {
  2050. reset_rsvds_bits_mask(vcpu, PT32_ROOT_LEVEL);
  2051. context->gva_to_gpa = paging32_gva_to_gpa;
  2052. context->root_level = PT32_ROOT_LEVEL;
  2053. }
  2054. return 0;
  2055. }
  2056. static int init_kvm_softmmu(struct kvm_vcpu *vcpu)
  2057. {
  2058. int r;
  2059. ASSERT(vcpu);
  2060. ASSERT(!VALID_PAGE(vcpu->arch.mmu.root_hpa));
  2061. if (!is_paging(vcpu))
  2062. r = nonpaging_init_context(vcpu);
  2063. else if (is_long_mode(vcpu))
  2064. r = paging64_init_context(vcpu);
  2065. else if (is_pae(vcpu))
  2066. r = paging32E_init_context(vcpu);
  2067. else
  2068. r = paging32_init_context(vcpu);
  2069. vcpu->arch.mmu.base_role.glevels = vcpu->arch.mmu.root_level;
  2070. return r;
  2071. }
  2072. static int init_kvm_mmu(struct kvm_vcpu *vcpu)
  2073. {
  2074. vcpu->arch.update_pte.pfn = bad_pfn;
  2075. if (tdp_enabled)
  2076. return init_kvm_tdp_mmu(vcpu);
  2077. else
  2078. return init_kvm_softmmu(vcpu);
  2079. }
  2080. static void destroy_kvm_mmu(struct kvm_vcpu *vcpu)
  2081. {
  2082. ASSERT(vcpu);
  2083. if (VALID_PAGE(vcpu->arch.mmu.root_hpa)) {
  2084. vcpu->arch.mmu.free(vcpu);
  2085. vcpu->arch.mmu.root_hpa = INVALID_PAGE;
  2086. }
  2087. }
  2088. int kvm_mmu_reset_context(struct kvm_vcpu *vcpu)
  2089. {
  2090. destroy_kvm_mmu(vcpu);
  2091. return init_kvm_mmu(vcpu);
  2092. }
  2093. EXPORT_SYMBOL_GPL(kvm_mmu_reset_context);
  2094. int kvm_mmu_load(struct kvm_vcpu *vcpu)
  2095. {
  2096. int r;
  2097. r = mmu_topup_memory_caches(vcpu);
  2098. if (r)
  2099. goto out;
  2100. spin_lock(&vcpu->kvm->mmu_lock);
  2101. kvm_mmu_free_some_pages(vcpu);
  2102. r = mmu_alloc_roots(vcpu);
  2103. mmu_sync_roots(vcpu);
  2104. spin_unlock(&vcpu->kvm->mmu_lock);
  2105. if (r)
  2106. goto out;
  2107. /* set_cr3() should ensure TLB has been flushed */
  2108. kvm_x86_ops->set_cr3(vcpu, vcpu->arch.mmu.root_hpa);
  2109. out:
  2110. return r;
  2111. }
  2112. EXPORT_SYMBOL_GPL(kvm_mmu_load);
  2113. void kvm_mmu_unload(struct kvm_vcpu *vcpu)
  2114. {
  2115. mmu_free_roots(vcpu);
  2116. }
  2117. static void mmu_pte_write_zap_pte(struct kvm_vcpu *vcpu,
  2118. struct kvm_mmu_page *sp,
  2119. u64 *spte)
  2120. {
  2121. u64 pte;
  2122. struct kvm_mmu_page *child;
  2123. pte = *spte;
  2124. if (is_shadow_present_pte(pte)) {
  2125. if (is_last_spte(pte, sp->role.level))
  2126. rmap_remove(vcpu->kvm, spte);
  2127. else {
  2128. child = page_header(pte & PT64_BASE_ADDR_MASK);
  2129. mmu_page_remove_parent_pte(child, spte);
  2130. }
  2131. }
  2132. __set_spte(spte, shadow_trap_nonpresent_pte);
  2133. if (is_large_pte(pte))
  2134. --vcpu->kvm->stat.lpages;
  2135. }
  2136. static void mmu_pte_write_new_pte(struct kvm_vcpu *vcpu,
  2137. struct kvm_mmu_page *sp,
  2138. u64 *spte,
  2139. const void *new)
  2140. {
  2141. if (sp->role.level != PT_PAGE_TABLE_LEVEL) {
  2142. ++vcpu->kvm->stat.mmu_pde_zapped;
  2143. return;
  2144. }
  2145. ++vcpu->kvm->stat.mmu_pte_updated;
  2146. if (sp->role.glevels == PT32_ROOT_LEVEL)
  2147. paging32_update_pte(vcpu, sp, spte, new);
  2148. else
  2149. paging64_update_pte(vcpu, sp, spte, new);
  2150. }
  2151. static bool need_remote_flush(u64 old, u64 new)
  2152. {
  2153. if (!is_shadow_present_pte(old))
  2154. return false;
  2155. if (!is_shadow_present_pte(new))
  2156. return true;
  2157. if ((old ^ new) & PT64_BASE_ADDR_MASK)
  2158. return true;
  2159. old ^= PT64_NX_MASK;
  2160. new ^= PT64_NX_MASK;
  2161. return (old & ~new & PT64_PERM_MASK) != 0;
  2162. }
  2163. static void mmu_pte_write_flush_tlb(struct kvm_vcpu *vcpu, u64 old, u64 new)
  2164. {
  2165. if (need_remote_flush(old, new))
  2166. kvm_flush_remote_tlbs(vcpu->kvm);
  2167. else
  2168. kvm_mmu_flush_tlb(vcpu);
  2169. }
  2170. static bool last_updated_pte_accessed(struct kvm_vcpu *vcpu)
  2171. {
  2172. u64 *spte = vcpu->arch.last_pte_updated;
  2173. return !!(spte && (*spte & shadow_accessed_mask));
  2174. }
  2175. static void mmu_guess_page_from_pte_write(struct kvm_vcpu *vcpu, gpa_t gpa,
  2176. const u8 *new, int bytes)
  2177. {
  2178. gfn_t gfn;
  2179. int r;
  2180. u64 gpte = 0;
  2181. pfn_t pfn;
  2182. if (bytes != 4 && bytes != 8)
  2183. return;
  2184. /*
  2185. * Assume that the pte write on a page table of the same type
  2186. * as the current vcpu paging mode. This is nearly always true
  2187. * (might be false while changing modes). Note it is verified later
  2188. * by update_pte().
  2189. */
  2190. if (is_pae(vcpu)) {
  2191. /* Handle a 32-bit guest writing two halves of a 64-bit gpte */
  2192. if ((bytes == 4) && (gpa % 4 == 0)) {
  2193. r = kvm_read_guest(vcpu->kvm, gpa & ~(u64)7, &gpte, 8);
  2194. if (r)
  2195. return;
  2196. memcpy((void *)&gpte + (gpa % 8), new, 4);
  2197. } else if ((bytes == 8) && (gpa % 8 == 0)) {
  2198. memcpy((void *)&gpte, new, 8);
  2199. }
  2200. } else {
  2201. if ((bytes == 4) && (gpa % 4 == 0))
  2202. memcpy((void *)&gpte, new, 4);
  2203. }
  2204. if (!is_present_gpte(gpte))
  2205. return;
  2206. gfn = (gpte & PT64_BASE_ADDR_MASK) >> PAGE_SHIFT;
  2207. vcpu->arch.update_pte.mmu_seq = vcpu->kvm->mmu_notifier_seq;
  2208. smp_rmb();
  2209. pfn = gfn_to_pfn(vcpu->kvm, gfn);
  2210. if (is_error_pfn(pfn)) {
  2211. kvm_release_pfn_clean(pfn);
  2212. return;
  2213. }
  2214. vcpu->arch.update_pte.gfn = gfn;
  2215. vcpu->arch.update_pte.pfn = pfn;
  2216. }
  2217. static void kvm_mmu_access_page(struct kvm_vcpu *vcpu, gfn_t gfn)
  2218. {
  2219. u64 *spte = vcpu->arch.last_pte_updated;
  2220. if (spte
  2221. && vcpu->arch.last_pte_gfn == gfn
  2222. && shadow_accessed_mask
  2223. && !(*spte & shadow_accessed_mask)
  2224. && is_shadow_present_pte(*spte))
  2225. set_bit(PT_ACCESSED_SHIFT, (unsigned long *)spte);
  2226. }
  2227. void kvm_mmu_pte_write(struct kvm_vcpu *vcpu, gpa_t gpa,
  2228. const u8 *new, int bytes,
  2229. bool guest_initiated)
  2230. {
  2231. gfn_t gfn = gpa >> PAGE_SHIFT;
  2232. struct kvm_mmu_page *sp;
  2233. struct hlist_node *node, *n;
  2234. struct hlist_head *bucket;
  2235. unsigned index;
  2236. u64 entry, gentry;
  2237. u64 *spte;
  2238. unsigned offset = offset_in_page(gpa);
  2239. unsigned pte_size;
  2240. unsigned page_offset;
  2241. unsigned misaligned;
  2242. unsigned quadrant;
  2243. int level;
  2244. int flooded = 0;
  2245. int npte;
  2246. int r;
  2247. pgprintk("%s: gpa %llx bytes %d\n", __func__, gpa, bytes);
  2248. mmu_guess_page_from_pte_write(vcpu, gpa, new, bytes);
  2249. spin_lock(&vcpu->kvm->mmu_lock);
  2250. kvm_mmu_access_page(vcpu, gfn);
  2251. kvm_mmu_free_some_pages(vcpu);
  2252. ++vcpu->kvm->stat.mmu_pte_write;
  2253. kvm_mmu_audit(vcpu, "pre pte write");
  2254. if (guest_initiated) {
  2255. if (gfn == vcpu->arch.last_pt_write_gfn
  2256. && !last_updated_pte_accessed(vcpu)) {
  2257. ++vcpu->arch.last_pt_write_count;
  2258. if (vcpu->arch.last_pt_write_count >= 3)
  2259. flooded = 1;
  2260. } else {
  2261. vcpu->arch.last_pt_write_gfn = gfn;
  2262. vcpu->arch.last_pt_write_count = 1;
  2263. vcpu->arch.last_pte_updated = NULL;
  2264. }
  2265. }
  2266. index = kvm_page_table_hashfn(gfn);
  2267. bucket = &vcpu->kvm->arch.mmu_page_hash[index];
  2268. hlist_for_each_entry_safe(sp, node, n, bucket, hash_link) {
  2269. if (sp->gfn != gfn || sp->role.direct || sp->role.invalid)
  2270. continue;
  2271. pte_size = sp->role.glevels == PT32_ROOT_LEVEL ? 4 : 8;
  2272. misaligned = (offset ^ (offset + bytes - 1)) & ~(pte_size - 1);
  2273. misaligned |= bytes < 4;
  2274. if (misaligned || flooded) {
  2275. /*
  2276. * Misaligned accesses are too much trouble to fix
  2277. * up; also, they usually indicate a page is not used
  2278. * as a page table.
  2279. *
  2280. * If we're seeing too many writes to a page,
  2281. * it may no longer be a page table, or we may be
  2282. * forking, in which case it is better to unmap the
  2283. * page.
  2284. */
  2285. pgprintk("misaligned: gpa %llx bytes %d role %x\n",
  2286. gpa, bytes, sp->role.word);
  2287. if (kvm_mmu_zap_page(vcpu->kvm, sp))
  2288. n = bucket->first;
  2289. ++vcpu->kvm->stat.mmu_flooded;
  2290. continue;
  2291. }
  2292. page_offset = offset;
  2293. level = sp->role.level;
  2294. npte = 1;
  2295. if (sp->role.glevels == PT32_ROOT_LEVEL) {
  2296. page_offset <<= 1; /* 32->64 */
  2297. /*
  2298. * A 32-bit pde maps 4MB while the shadow pdes map
  2299. * only 2MB. So we need to double the offset again
  2300. * and zap two pdes instead of one.
  2301. */
  2302. if (level == PT32_ROOT_LEVEL) {
  2303. page_offset &= ~7; /* kill rounding error */
  2304. page_offset <<= 1;
  2305. npte = 2;
  2306. }
  2307. quadrant = page_offset >> PAGE_SHIFT;
  2308. page_offset &= ~PAGE_MASK;
  2309. if (quadrant != sp->role.quadrant)
  2310. continue;
  2311. }
  2312. spte = &sp->spt[page_offset / sizeof(*spte)];
  2313. if ((gpa & (pte_size - 1)) || (bytes < pte_size)) {
  2314. gentry = 0;
  2315. r = kvm_read_guest_atomic(vcpu->kvm,
  2316. gpa & ~(u64)(pte_size - 1),
  2317. &gentry, pte_size);
  2318. new = (const void *)&gentry;
  2319. if (r < 0)
  2320. new = NULL;
  2321. }
  2322. while (npte--) {
  2323. entry = *spte;
  2324. mmu_pte_write_zap_pte(vcpu, sp, spte);
  2325. if (new)
  2326. mmu_pte_write_new_pte(vcpu, sp, spte, new);
  2327. mmu_pte_write_flush_tlb(vcpu, entry, *spte);
  2328. ++spte;
  2329. }
  2330. }
  2331. kvm_mmu_audit(vcpu, "post pte write");
  2332. spin_unlock(&vcpu->kvm->mmu_lock);
  2333. if (!is_error_pfn(vcpu->arch.update_pte.pfn)) {
  2334. kvm_release_pfn_clean(vcpu->arch.update_pte.pfn);
  2335. vcpu->arch.update_pte.pfn = bad_pfn;
  2336. }
  2337. }
  2338. int kvm_mmu_unprotect_page_virt(struct kvm_vcpu *vcpu, gva_t gva)
  2339. {
  2340. gpa_t gpa;
  2341. int r;
  2342. if (tdp_enabled)
  2343. return 0;
  2344. gpa = kvm_mmu_gva_to_gpa_read(vcpu, gva, NULL);
  2345. spin_lock(&vcpu->kvm->mmu_lock);
  2346. r = kvm_mmu_unprotect_page(vcpu->kvm, gpa >> PAGE_SHIFT);
  2347. spin_unlock(&vcpu->kvm->mmu_lock);
  2348. return r;
  2349. }
  2350. EXPORT_SYMBOL_GPL(kvm_mmu_unprotect_page_virt);
  2351. void __kvm_mmu_free_some_pages(struct kvm_vcpu *vcpu)
  2352. {
  2353. while (vcpu->kvm->arch.n_free_mmu_pages < KVM_REFILL_PAGES &&
  2354. !list_empty(&vcpu->kvm->arch.active_mmu_pages)) {
  2355. struct kvm_mmu_page *sp;
  2356. sp = container_of(vcpu->kvm->arch.active_mmu_pages.prev,
  2357. struct kvm_mmu_page, link);
  2358. kvm_mmu_zap_page(vcpu->kvm, sp);
  2359. ++vcpu->kvm->stat.mmu_recycled;
  2360. }
  2361. }
  2362. int kvm_mmu_page_fault(struct kvm_vcpu *vcpu, gva_t cr2, u32 error_code)
  2363. {
  2364. int r;
  2365. enum emulation_result er;
  2366. r = vcpu->arch.mmu.page_fault(vcpu, cr2, error_code);
  2367. if (r < 0)
  2368. goto out;
  2369. if (!r) {
  2370. r = 1;
  2371. goto out;
  2372. }
  2373. r = mmu_topup_memory_caches(vcpu);
  2374. if (r)
  2375. goto out;
  2376. er = emulate_instruction(vcpu, cr2, error_code, 0);
  2377. switch (er) {
  2378. case EMULATE_DONE:
  2379. return 1;
  2380. case EMULATE_DO_MMIO:
  2381. ++vcpu->stat.mmio_exits;
  2382. return 0;
  2383. case EMULATE_FAIL:
  2384. vcpu->run->exit_reason = KVM_EXIT_INTERNAL_ERROR;
  2385. vcpu->run->internal.suberror = KVM_INTERNAL_ERROR_EMULATION;
  2386. vcpu->run->internal.ndata = 0;
  2387. return 0;
  2388. default:
  2389. BUG();
  2390. }
  2391. out:
  2392. return r;
  2393. }
  2394. EXPORT_SYMBOL_GPL(kvm_mmu_page_fault);
  2395. void kvm_mmu_invlpg(struct kvm_vcpu *vcpu, gva_t gva)
  2396. {
  2397. vcpu->arch.mmu.invlpg(vcpu, gva);
  2398. kvm_mmu_flush_tlb(vcpu);
  2399. ++vcpu->stat.invlpg;
  2400. }
  2401. EXPORT_SYMBOL_GPL(kvm_mmu_invlpg);
  2402. void kvm_enable_tdp(void)
  2403. {
  2404. tdp_enabled = true;
  2405. }
  2406. EXPORT_SYMBOL_GPL(kvm_enable_tdp);
  2407. void kvm_disable_tdp(void)
  2408. {
  2409. tdp_enabled = false;
  2410. }
  2411. EXPORT_SYMBOL_GPL(kvm_disable_tdp);
  2412. static void free_mmu_pages(struct kvm_vcpu *vcpu)
  2413. {
  2414. free_page((unsigned long)vcpu->arch.mmu.pae_root);
  2415. }
  2416. static int alloc_mmu_pages(struct kvm_vcpu *vcpu)
  2417. {
  2418. struct page *page;
  2419. int i;
  2420. ASSERT(vcpu);
  2421. /*
  2422. * When emulating 32-bit mode, cr3 is only 32 bits even on x86_64.
  2423. * Therefore we need to allocate shadow page tables in the first
  2424. * 4GB of memory, which happens to fit the DMA32 zone.
  2425. */
  2426. page = alloc_page(GFP_KERNEL | __GFP_DMA32);
  2427. if (!page)
  2428. return -ENOMEM;
  2429. vcpu->arch.mmu.pae_root = page_address(page);
  2430. for (i = 0; i < 4; ++i)
  2431. vcpu->arch.mmu.pae_root[i] = INVALID_PAGE;
  2432. return 0;
  2433. }
  2434. int kvm_mmu_create(struct kvm_vcpu *vcpu)
  2435. {
  2436. ASSERT(vcpu);
  2437. ASSERT(!VALID_PAGE(vcpu->arch.mmu.root_hpa));
  2438. return alloc_mmu_pages(vcpu);
  2439. }
  2440. int kvm_mmu_setup(struct kvm_vcpu *vcpu)
  2441. {
  2442. ASSERT(vcpu);
  2443. ASSERT(!VALID_PAGE(vcpu->arch.mmu.root_hpa));
  2444. return init_kvm_mmu(vcpu);
  2445. }
  2446. void kvm_mmu_destroy(struct kvm_vcpu *vcpu)
  2447. {
  2448. ASSERT(vcpu);
  2449. destroy_kvm_mmu(vcpu);
  2450. free_mmu_pages(vcpu);
  2451. mmu_free_memory_caches(vcpu);
  2452. }
  2453. void kvm_mmu_slot_remove_write_access(struct kvm *kvm, int slot)
  2454. {
  2455. struct kvm_mmu_page *sp;
  2456. list_for_each_entry(sp, &kvm->arch.active_mmu_pages, link) {
  2457. int i;
  2458. u64 *pt;
  2459. if (!test_bit(slot, sp->slot_bitmap))
  2460. continue;
  2461. pt = sp->spt;
  2462. for (i = 0; i < PT64_ENT_PER_PAGE; ++i)
  2463. /* avoid RMW */
  2464. if (pt[i] & PT_WRITABLE_MASK)
  2465. pt[i] &= ~PT_WRITABLE_MASK;
  2466. }
  2467. kvm_flush_remote_tlbs(kvm);
  2468. }
  2469. void kvm_mmu_zap_all(struct kvm *kvm)
  2470. {
  2471. struct kvm_mmu_page *sp, *node;
  2472. spin_lock(&kvm->mmu_lock);
  2473. list_for_each_entry_safe(sp, node, &kvm->arch.active_mmu_pages, link)
  2474. if (kvm_mmu_zap_page(kvm, sp))
  2475. node = container_of(kvm->arch.active_mmu_pages.next,
  2476. struct kvm_mmu_page, link);
  2477. spin_unlock(&kvm->mmu_lock);
  2478. kvm_flush_remote_tlbs(kvm);
  2479. }
  2480. static void kvm_mmu_remove_one_alloc_mmu_page(struct kvm *kvm)
  2481. {
  2482. struct kvm_mmu_page *page;
  2483. page = container_of(kvm->arch.active_mmu_pages.prev,
  2484. struct kvm_mmu_page, link);
  2485. kvm_mmu_zap_page(kvm, page);
  2486. }
  2487. static int mmu_shrink(int nr_to_scan, gfp_t gfp_mask)
  2488. {
  2489. struct kvm *kvm;
  2490. struct kvm *kvm_freed = NULL;
  2491. int cache_count = 0;
  2492. spin_lock(&kvm_lock);
  2493. list_for_each_entry(kvm, &vm_list, vm_list) {
  2494. int npages, idx;
  2495. idx = srcu_read_lock(&kvm->srcu);
  2496. spin_lock(&kvm->mmu_lock);
  2497. npages = kvm->arch.n_alloc_mmu_pages -
  2498. kvm->arch.n_free_mmu_pages;
  2499. cache_count += npages;
  2500. if (!kvm_freed && nr_to_scan > 0 && npages > 0) {
  2501. kvm_mmu_remove_one_alloc_mmu_page(kvm);
  2502. cache_count--;
  2503. kvm_freed = kvm;
  2504. }
  2505. nr_to_scan--;
  2506. spin_unlock(&kvm->mmu_lock);
  2507. srcu_read_unlock(&kvm->srcu, idx);
  2508. }
  2509. if (kvm_freed)
  2510. list_move_tail(&kvm_freed->vm_list, &vm_list);
  2511. spin_unlock(&kvm_lock);
  2512. return cache_count;
  2513. }
  2514. static struct shrinker mmu_shrinker = {
  2515. .shrink = mmu_shrink,
  2516. .seeks = DEFAULT_SEEKS * 10,
  2517. };
  2518. static void mmu_destroy_caches(void)
  2519. {
  2520. if (pte_chain_cache)
  2521. kmem_cache_destroy(pte_chain_cache);
  2522. if (rmap_desc_cache)
  2523. kmem_cache_destroy(rmap_desc_cache);
  2524. if (mmu_page_header_cache)
  2525. kmem_cache_destroy(mmu_page_header_cache);
  2526. }
  2527. void kvm_mmu_module_exit(void)
  2528. {
  2529. mmu_destroy_caches();
  2530. unregister_shrinker(&mmu_shrinker);
  2531. }
  2532. int kvm_mmu_module_init(void)
  2533. {
  2534. pte_chain_cache = kmem_cache_create("kvm_pte_chain",
  2535. sizeof(struct kvm_pte_chain),
  2536. 0, 0, NULL);
  2537. if (!pte_chain_cache)
  2538. goto nomem;
  2539. rmap_desc_cache = kmem_cache_create("kvm_rmap_desc",
  2540. sizeof(struct kvm_rmap_desc),
  2541. 0, 0, NULL);
  2542. if (!rmap_desc_cache)
  2543. goto nomem;
  2544. mmu_page_header_cache = kmem_cache_create("kvm_mmu_page_header",
  2545. sizeof(struct kvm_mmu_page),
  2546. 0, 0, NULL);
  2547. if (!mmu_page_header_cache)
  2548. goto nomem;
  2549. register_shrinker(&mmu_shrinker);
  2550. return 0;
  2551. nomem:
  2552. mmu_destroy_caches();
  2553. return -ENOMEM;
  2554. }
  2555. /*
  2556. * Caculate mmu pages needed for kvm.
  2557. */
  2558. unsigned int kvm_mmu_calculate_mmu_pages(struct kvm *kvm)
  2559. {
  2560. int i;
  2561. unsigned int nr_mmu_pages;
  2562. unsigned int nr_pages = 0;
  2563. struct kvm_memslots *slots;
  2564. slots = rcu_dereference(kvm->memslots);
  2565. for (i = 0; i < slots->nmemslots; i++)
  2566. nr_pages += slots->memslots[i].npages;
  2567. nr_mmu_pages = nr_pages * KVM_PERMILLE_MMU_PAGES / 1000;
  2568. nr_mmu_pages = max(nr_mmu_pages,
  2569. (unsigned int) KVM_MIN_ALLOC_MMU_PAGES);
  2570. return nr_mmu_pages;
  2571. }
  2572. static void *pv_mmu_peek_buffer(struct kvm_pv_mmu_op_buffer *buffer,
  2573. unsigned len)
  2574. {
  2575. if (len > buffer->len)
  2576. return NULL;
  2577. return buffer->ptr;
  2578. }
  2579. static void *pv_mmu_read_buffer(struct kvm_pv_mmu_op_buffer *buffer,
  2580. unsigned len)
  2581. {
  2582. void *ret;
  2583. ret = pv_mmu_peek_buffer(buffer, len);
  2584. if (!ret)
  2585. return ret;
  2586. buffer->ptr += len;
  2587. buffer->len -= len;
  2588. buffer->processed += len;
  2589. return ret;
  2590. }
  2591. static int kvm_pv_mmu_write(struct kvm_vcpu *vcpu,
  2592. gpa_t addr, gpa_t value)
  2593. {
  2594. int bytes = 8;
  2595. int r;
  2596. if (!is_long_mode(vcpu) && !is_pae(vcpu))
  2597. bytes = 4;
  2598. r = mmu_topup_memory_caches(vcpu);
  2599. if (r)
  2600. return r;
  2601. if (!emulator_write_phys(vcpu, addr, &value, bytes))
  2602. return -EFAULT;
  2603. return 1;
  2604. }
  2605. static int kvm_pv_mmu_flush_tlb(struct kvm_vcpu *vcpu)
  2606. {
  2607. kvm_set_cr3(vcpu, vcpu->arch.cr3);
  2608. return 1;
  2609. }
  2610. static int kvm_pv_mmu_release_pt(struct kvm_vcpu *vcpu, gpa_t addr)
  2611. {
  2612. spin_lock(&vcpu->kvm->mmu_lock);
  2613. mmu_unshadow(vcpu->kvm, addr >> PAGE_SHIFT);
  2614. spin_unlock(&vcpu->kvm->mmu_lock);
  2615. return 1;
  2616. }
  2617. static int kvm_pv_mmu_op_one(struct kvm_vcpu *vcpu,
  2618. struct kvm_pv_mmu_op_buffer *buffer)
  2619. {
  2620. struct kvm_mmu_op_header *header;
  2621. header = pv_mmu_peek_buffer(buffer, sizeof *header);
  2622. if (!header)
  2623. return 0;
  2624. switch (header->op) {
  2625. case KVM_MMU_OP_WRITE_PTE: {
  2626. struct kvm_mmu_op_write_pte *wpte;
  2627. wpte = pv_mmu_read_buffer(buffer, sizeof *wpte);
  2628. if (!wpte)
  2629. return 0;
  2630. return kvm_pv_mmu_write(vcpu, wpte->pte_phys,
  2631. wpte->pte_val);
  2632. }
  2633. case KVM_MMU_OP_FLUSH_TLB: {
  2634. struct kvm_mmu_op_flush_tlb *ftlb;
  2635. ftlb = pv_mmu_read_buffer(buffer, sizeof *ftlb);
  2636. if (!ftlb)
  2637. return 0;
  2638. return kvm_pv_mmu_flush_tlb(vcpu);
  2639. }
  2640. case KVM_MMU_OP_RELEASE_PT: {
  2641. struct kvm_mmu_op_release_pt *rpt;
  2642. rpt = pv_mmu_read_buffer(buffer, sizeof *rpt);
  2643. if (!rpt)
  2644. return 0;
  2645. return kvm_pv_mmu_release_pt(vcpu, rpt->pt_phys);
  2646. }
  2647. default: return 0;
  2648. }
  2649. }
  2650. int kvm_pv_mmu_op(struct kvm_vcpu *vcpu, unsigned long bytes,
  2651. gpa_t addr, unsigned long *ret)
  2652. {
  2653. int r;
  2654. struct kvm_pv_mmu_op_buffer *buffer = &vcpu->arch.mmu_op_buffer;
  2655. buffer->ptr = buffer->buf;
  2656. buffer->len = min_t(unsigned long, bytes, sizeof buffer->buf);
  2657. buffer->processed = 0;
  2658. r = kvm_read_guest(vcpu->kvm, addr, buffer->buf, buffer->len);
  2659. if (r)
  2660. goto out;
  2661. while (buffer->len) {
  2662. r = kvm_pv_mmu_op_one(vcpu, buffer);
  2663. if (r < 0)
  2664. goto out;
  2665. if (r == 0)
  2666. break;
  2667. }
  2668. r = 1;
  2669. out:
  2670. *ret = buffer->processed;
  2671. return r;
  2672. }
  2673. int kvm_mmu_get_spte_hierarchy(struct kvm_vcpu *vcpu, u64 addr, u64 sptes[4])
  2674. {
  2675. struct kvm_shadow_walk_iterator iterator;
  2676. int nr_sptes = 0;
  2677. spin_lock(&vcpu->kvm->mmu_lock);
  2678. for_each_shadow_entry(vcpu, addr, iterator) {
  2679. sptes[iterator.level-1] = *iterator.sptep;
  2680. nr_sptes++;
  2681. if (!is_shadow_present_pte(*iterator.sptep))
  2682. break;
  2683. }
  2684. spin_unlock(&vcpu->kvm->mmu_lock);
  2685. return nr_sptes;
  2686. }
  2687. EXPORT_SYMBOL_GPL(kvm_mmu_get_spte_hierarchy);
  2688. #ifdef AUDIT
  2689. static const char *audit_msg;
  2690. static gva_t canonicalize(gva_t gva)
  2691. {
  2692. #ifdef CONFIG_X86_64
  2693. gva = (long long)(gva << 16) >> 16;
  2694. #endif
  2695. return gva;
  2696. }
  2697. typedef void (*inspect_spte_fn) (struct kvm *kvm, struct kvm_mmu_page *sp,
  2698. u64 *sptep);
  2699. static void __mmu_spte_walk(struct kvm *kvm, struct kvm_mmu_page *sp,
  2700. inspect_spte_fn fn)
  2701. {
  2702. int i;
  2703. for (i = 0; i < PT64_ENT_PER_PAGE; ++i) {
  2704. u64 ent = sp->spt[i];
  2705. if (is_shadow_present_pte(ent)) {
  2706. if (!is_last_spte(ent, sp->role.level)) {
  2707. struct kvm_mmu_page *child;
  2708. child = page_header(ent & PT64_BASE_ADDR_MASK);
  2709. __mmu_spte_walk(kvm, child, fn);
  2710. } else
  2711. fn(kvm, sp, &sp->spt[i]);
  2712. }
  2713. }
  2714. }
  2715. static void mmu_spte_walk(struct kvm_vcpu *vcpu, inspect_spte_fn fn)
  2716. {
  2717. int i;
  2718. struct kvm_mmu_page *sp;
  2719. if (!VALID_PAGE(vcpu->arch.mmu.root_hpa))
  2720. return;
  2721. if (vcpu->arch.mmu.shadow_root_level == PT64_ROOT_LEVEL) {
  2722. hpa_t root = vcpu->arch.mmu.root_hpa;
  2723. sp = page_header(root);
  2724. __mmu_spte_walk(vcpu->kvm, sp, fn);
  2725. return;
  2726. }
  2727. for (i = 0; i < 4; ++i) {
  2728. hpa_t root = vcpu->arch.mmu.pae_root[i];
  2729. if (root && VALID_PAGE(root)) {
  2730. root &= PT64_BASE_ADDR_MASK;
  2731. sp = page_header(root);
  2732. __mmu_spte_walk(vcpu->kvm, sp, fn);
  2733. }
  2734. }
  2735. return;
  2736. }
  2737. static void audit_mappings_page(struct kvm_vcpu *vcpu, u64 page_pte,
  2738. gva_t va, int level)
  2739. {
  2740. u64 *pt = __va(page_pte & PT64_BASE_ADDR_MASK);
  2741. int i;
  2742. gva_t va_delta = 1ul << (PAGE_SHIFT + 9 * (level - 1));
  2743. for (i = 0; i < PT64_ENT_PER_PAGE; ++i, va += va_delta) {
  2744. u64 ent = pt[i];
  2745. if (ent == shadow_trap_nonpresent_pte)
  2746. continue;
  2747. va = canonicalize(va);
  2748. if (is_shadow_present_pte(ent) && !is_last_spte(ent, level))
  2749. audit_mappings_page(vcpu, ent, va, level - 1);
  2750. else {
  2751. gpa_t gpa = kvm_mmu_gva_to_gpa_read(vcpu, va, NULL);
  2752. gfn_t gfn = gpa >> PAGE_SHIFT;
  2753. pfn_t pfn = gfn_to_pfn(vcpu->kvm, gfn);
  2754. hpa_t hpa = (hpa_t)pfn << PAGE_SHIFT;
  2755. if (is_error_pfn(pfn)) {
  2756. kvm_release_pfn_clean(pfn);
  2757. continue;
  2758. }
  2759. if (is_shadow_present_pte(ent)
  2760. && (ent & PT64_BASE_ADDR_MASK) != hpa)
  2761. printk(KERN_ERR "xx audit error: (%s) levels %d"
  2762. " gva %lx gpa %llx hpa %llx ent %llx %d\n",
  2763. audit_msg, vcpu->arch.mmu.root_level,
  2764. va, gpa, hpa, ent,
  2765. is_shadow_present_pte(ent));
  2766. else if (ent == shadow_notrap_nonpresent_pte
  2767. && !is_error_hpa(hpa))
  2768. printk(KERN_ERR "audit: (%s) notrap shadow,"
  2769. " valid guest gva %lx\n", audit_msg, va);
  2770. kvm_release_pfn_clean(pfn);
  2771. }
  2772. }
  2773. }
  2774. static void audit_mappings(struct kvm_vcpu *vcpu)
  2775. {
  2776. unsigned i;
  2777. if (vcpu->arch.mmu.root_level == 4)
  2778. audit_mappings_page(vcpu, vcpu->arch.mmu.root_hpa, 0, 4);
  2779. else
  2780. for (i = 0; i < 4; ++i)
  2781. if (vcpu->arch.mmu.pae_root[i] & PT_PRESENT_MASK)
  2782. audit_mappings_page(vcpu,
  2783. vcpu->arch.mmu.pae_root[i],
  2784. i << 30,
  2785. 2);
  2786. }
  2787. static int count_rmaps(struct kvm_vcpu *vcpu)
  2788. {
  2789. int nmaps = 0;
  2790. int i, j, k, idx;
  2791. idx = srcu_read_lock(&kvm->srcu);
  2792. slots = rcu_dereference(kvm->memslots);
  2793. for (i = 0; i < KVM_MEMORY_SLOTS; ++i) {
  2794. struct kvm_memory_slot *m = &slots->memslots[i];
  2795. struct kvm_rmap_desc *d;
  2796. for (j = 0; j < m->npages; ++j) {
  2797. unsigned long *rmapp = &m->rmap[j];
  2798. if (!*rmapp)
  2799. continue;
  2800. if (!(*rmapp & 1)) {
  2801. ++nmaps;
  2802. continue;
  2803. }
  2804. d = (struct kvm_rmap_desc *)(*rmapp & ~1ul);
  2805. while (d) {
  2806. for (k = 0; k < RMAP_EXT; ++k)
  2807. if (d->sptes[k])
  2808. ++nmaps;
  2809. else
  2810. break;
  2811. d = d->more;
  2812. }
  2813. }
  2814. }
  2815. srcu_read_unlock(&kvm->srcu, idx);
  2816. return nmaps;
  2817. }
  2818. void inspect_spte_has_rmap(struct kvm *kvm, struct kvm_mmu_page *sp, u64 *sptep)
  2819. {
  2820. unsigned long *rmapp;
  2821. struct kvm_mmu_page *rev_sp;
  2822. gfn_t gfn;
  2823. if (*sptep & PT_WRITABLE_MASK) {
  2824. rev_sp = page_header(__pa(sptep));
  2825. gfn = rev_sp->gfns[sptep - rev_sp->spt];
  2826. if (!gfn_to_memslot(kvm, gfn)) {
  2827. if (!printk_ratelimit())
  2828. return;
  2829. printk(KERN_ERR "%s: no memslot for gfn %ld\n",
  2830. audit_msg, gfn);
  2831. printk(KERN_ERR "%s: index %ld of sp (gfn=%lx)\n",
  2832. audit_msg, sptep - rev_sp->spt,
  2833. rev_sp->gfn);
  2834. dump_stack();
  2835. return;
  2836. }
  2837. rmapp = gfn_to_rmap(kvm, rev_sp->gfns[sptep - rev_sp->spt],
  2838. is_large_pte(*sptep));
  2839. if (!*rmapp) {
  2840. if (!printk_ratelimit())
  2841. return;
  2842. printk(KERN_ERR "%s: no rmap for writable spte %llx\n",
  2843. audit_msg, *sptep);
  2844. dump_stack();
  2845. }
  2846. }
  2847. }
  2848. void audit_writable_sptes_have_rmaps(struct kvm_vcpu *vcpu)
  2849. {
  2850. mmu_spte_walk(vcpu, inspect_spte_has_rmap);
  2851. }
  2852. static void check_writable_mappings_rmap(struct kvm_vcpu *vcpu)
  2853. {
  2854. struct kvm_mmu_page *sp;
  2855. int i;
  2856. list_for_each_entry(sp, &vcpu->kvm->arch.active_mmu_pages, link) {
  2857. u64 *pt = sp->spt;
  2858. if (sp->role.level != PT_PAGE_TABLE_LEVEL)
  2859. continue;
  2860. for (i = 0; i < PT64_ENT_PER_PAGE; ++i) {
  2861. u64 ent = pt[i];
  2862. if (!(ent & PT_PRESENT_MASK))
  2863. continue;
  2864. if (!(ent & PT_WRITABLE_MASK))
  2865. continue;
  2866. inspect_spte_has_rmap(vcpu->kvm, sp, &pt[i]);
  2867. }
  2868. }
  2869. return;
  2870. }
  2871. static void audit_rmap(struct kvm_vcpu *vcpu)
  2872. {
  2873. check_writable_mappings_rmap(vcpu);
  2874. count_rmaps(vcpu);
  2875. }
  2876. static void audit_write_protection(struct kvm_vcpu *vcpu)
  2877. {
  2878. struct kvm_mmu_page *sp;
  2879. struct kvm_memory_slot *slot;
  2880. unsigned long *rmapp;
  2881. u64 *spte;
  2882. gfn_t gfn;
  2883. list_for_each_entry(sp, &vcpu->kvm->arch.active_mmu_pages, link) {
  2884. if (sp->role.direct)
  2885. continue;
  2886. if (sp->unsync)
  2887. continue;
  2888. gfn = unalias_gfn(vcpu->kvm, sp->gfn);
  2889. slot = gfn_to_memslot_unaliased(vcpu->kvm, sp->gfn);
  2890. rmapp = &slot->rmap[gfn - slot->base_gfn];
  2891. spte = rmap_next(vcpu->kvm, rmapp, NULL);
  2892. while (spte) {
  2893. if (*spte & PT_WRITABLE_MASK)
  2894. printk(KERN_ERR "%s: (%s) shadow page has "
  2895. "writable mappings: gfn %lx role %x\n",
  2896. __func__, audit_msg, sp->gfn,
  2897. sp->role.word);
  2898. spte = rmap_next(vcpu->kvm, rmapp, spte);
  2899. }
  2900. }
  2901. }
  2902. static void kvm_mmu_audit(struct kvm_vcpu *vcpu, const char *msg)
  2903. {
  2904. int olddbg = dbg;
  2905. dbg = 0;
  2906. audit_msg = msg;
  2907. audit_rmap(vcpu);
  2908. audit_write_protection(vcpu);
  2909. if (strcmp("pre pte write", audit_msg) != 0)
  2910. audit_mappings(vcpu);
  2911. audit_writable_sptes_have_rmaps(vcpu);
  2912. dbg = olddbg;
  2913. }
  2914. #endif