devs.c 11 KB

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  1. /* linux/arch/arm/plat-s3c24xx/devs.c
  2. *
  3. * Copyright (c) 2004 Simtec Electronics
  4. * Ben Dooks <ben@simtec.co.uk>
  5. *
  6. * Base S3C24XX platform device definitions
  7. *
  8. * This program is free software; you can redistribute it and/or modify
  9. * it under the terms of the GNU General Public License version 2 as
  10. * published by the Free Software Foundation.
  11. *
  12. */
  13. #include <linux/kernel.h>
  14. #include <linux/types.h>
  15. #include <linux/interrupt.h>
  16. #include <linux/list.h>
  17. #include <linux/timer.h>
  18. #include <linux/init.h>
  19. #include <linux/serial_core.h>
  20. #include <linux/platform_device.h>
  21. #include <linux/io.h>
  22. #include <asm/mach/arch.h>
  23. #include <asm/mach/map.h>
  24. #include <asm/mach/irq.h>
  25. #include <mach/fb.h>
  26. #include <mach/hardware.h>
  27. #include <mach/dma.h>
  28. #include <mach/irqs.h>
  29. #include <asm/irq.h>
  30. #include <plat/regs-serial.h>
  31. #include <plat/udc.h>
  32. #include <plat/mci.h>
  33. #include <plat/devs.h>
  34. #include <plat/cpu.h>
  35. #include <plat/regs-spi.h>
  36. #include <mach/ts.h>
  37. /* Serial port registrations */
  38. static struct resource s3c2410_uart0_resource[] = {
  39. [0] = {
  40. .start = S3C2410_PA_UART0,
  41. .end = S3C2410_PA_UART0 + 0x3fff,
  42. .flags = IORESOURCE_MEM,
  43. },
  44. [1] = {
  45. .start = IRQ_S3CUART_RX0,
  46. .end = IRQ_S3CUART_ERR0,
  47. .flags = IORESOURCE_IRQ,
  48. }
  49. };
  50. static struct resource s3c2410_uart1_resource[] = {
  51. [0] = {
  52. .start = S3C2410_PA_UART1,
  53. .end = S3C2410_PA_UART1 + 0x3fff,
  54. .flags = IORESOURCE_MEM,
  55. },
  56. [1] = {
  57. .start = IRQ_S3CUART_RX1,
  58. .end = IRQ_S3CUART_ERR1,
  59. .flags = IORESOURCE_IRQ,
  60. }
  61. };
  62. static struct resource s3c2410_uart2_resource[] = {
  63. [0] = {
  64. .start = S3C2410_PA_UART2,
  65. .end = S3C2410_PA_UART2 + 0x3fff,
  66. .flags = IORESOURCE_MEM,
  67. },
  68. [1] = {
  69. .start = IRQ_S3CUART_RX2,
  70. .end = IRQ_S3CUART_ERR2,
  71. .flags = IORESOURCE_IRQ,
  72. }
  73. };
  74. static struct resource s3c2410_uart3_resource[] = {
  75. [0] = {
  76. .start = S3C2443_PA_UART3,
  77. .end = S3C2443_PA_UART3 + 0x3fff,
  78. .flags = IORESOURCE_MEM,
  79. },
  80. [1] = {
  81. .start = IRQ_S3CUART_RX3,
  82. .end = IRQ_S3CUART_ERR3,
  83. .flags = IORESOURCE_IRQ,
  84. },
  85. };
  86. struct s3c24xx_uart_resources s3c2410_uart_resources[] __initdata = {
  87. [0] = {
  88. .resources = s3c2410_uart0_resource,
  89. .nr_resources = ARRAY_SIZE(s3c2410_uart0_resource),
  90. },
  91. [1] = {
  92. .resources = s3c2410_uart1_resource,
  93. .nr_resources = ARRAY_SIZE(s3c2410_uart1_resource),
  94. },
  95. [2] = {
  96. .resources = s3c2410_uart2_resource,
  97. .nr_resources = ARRAY_SIZE(s3c2410_uart2_resource),
  98. },
  99. [3] = {
  100. .resources = s3c2410_uart3_resource,
  101. .nr_resources = ARRAY_SIZE(s3c2410_uart3_resource),
  102. },
  103. };
  104. /* LCD Controller */
  105. static struct resource s3c_lcd_resource[] = {
  106. [0] = {
  107. .start = S3C24XX_PA_LCD,
  108. .end = S3C24XX_PA_LCD + S3C24XX_SZ_LCD - 1,
  109. .flags = IORESOURCE_MEM,
  110. },
  111. [1] = {
  112. .start = IRQ_LCD,
  113. .end = IRQ_LCD,
  114. .flags = IORESOURCE_IRQ,
  115. }
  116. };
  117. static u64 s3c_device_lcd_dmamask = 0xffffffffUL;
  118. struct platform_device s3c_device_lcd = {
  119. .name = "s3c2410-lcd",
  120. .id = -1,
  121. .num_resources = ARRAY_SIZE(s3c_lcd_resource),
  122. .resource = s3c_lcd_resource,
  123. .dev = {
  124. .dma_mask = &s3c_device_lcd_dmamask,
  125. .coherent_dma_mask = 0xffffffffUL
  126. }
  127. };
  128. EXPORT_SYMBOL(s3c_device_lcd);
  129. void __init s3c24xx_fb_set_platdata(struct s3c2410fb_mach_info *pd)
  130. {
  131. struct s3c2410fb_mach_info *npd;
  132. npd = kmalloc(sizeof(*npd), GFP_KERNEL);
  133. if (npd) {
  134. memcpy(npd, pd, sizeof(*npd));
  135. s3c_device_lcd.dev.platform_data = npd;
  136. } else {
  137. printk(KERN_ERR "no memory for LCD platform data\n");
  138. }
  139. }
  140. /* Touchscreen */
  141. static struct resource s3c_ts_resource[] = {
  142. [0] = {
  143. .start = S3C24XX_PA_ADC,
  144. .end = S3C24XX_PA_ADC + S3C24XX_SZ_ADC - 1,
  145. .flags = IORESOURCE_MEM,
  146. },
  147. [1] = {
  148. .start = IRQ_TC,
  149. .end = IRQ_TC,
  150. .flags = IORESOURCE_IRQ,
  151. },
  152. };
  153. struct platform_device s3c_device_ts = {
  154. .name = "s3c2410-ts",
  155. .id = -1,
  156. .dev.parent = &s3c_device_adc.dev,
  157. .num_resources = ARRAY_SIZE(s3c_ts_resource),
  158. .resource = s3c_ts_resource,
  159. };
  160. EXPORT_SYMBOL(s3c_device_ts);
  161. static struct s3c2410_ts_mach_info s3c2410ts_info;
  162. void __init s3c24xx_ts_set_platdata(struct s3c2410_ts_mach_info *hard_s3c2410ts_info)
  163. {
  164. memcpy(&s3c2410ts_info, hard_s3c2410ts_info, sizeof(struct s3c2410_ts_mach_info));
  165. s3c_device_ts.dev.platform_data = &s3c2410ts_info;
  166. }
  167. EXPORT_SYMBOL(s3c24xx_ts_set_platdata);
  168. /* USB Device (Gadget)*/
  169. static struct resource s3c_usbgadget_resource[] = {
  170. [0] = {
  171. .start = S3C24XX_PA_USBDEV,
  172. .end = S3C24XX_PA_USBDEV + S3C24XX_SZ_USBDEV - 1,
  173. .flags = IORESOURCE_MEM,
  174. },
  175. [1] = {
  176. .start = IRQ_USBD,
  177. .end = IRQ_USBD,
  178. .flags = IORESOURCE_IRQ,
  179. }
  180. };
  181. struct platform_device s3c_device_usbgadget = {
  182. .name = "s3c2410-usbgadget",
  183. .id = -1,
  184. .num_resources = ARRAY_SIZE(s3c_usbgadget_resource),
  185. .resource = s3c_usbgadget_resource,
  186. };
  187. EXPORT_SYMBOL(s3c_device_usbgadget);
  188. void __init s3c24xx_udc_set_platdata(struct s3c2410_udc_mach_info *pd)
  189. {
  190. struct s3c2410_udc_mach_info *npd;
  191. npd = kmalloc(sizeof(*npd), GFP_KERNEL);
  192. if (npd) {
  193. memcpy(npd, pd, sizeof(*npd));
  194. s3c_device_usbgadget.dev.platform_data = npd;
  195. } else {
  196. printk(KERN_ERR "no memory for udc platform data\n");
  197. }
  198. }
  199. /* Watchdog */
  200. static struct resource s3c_wdt_resource[] = {
  201. [0] = {
  202. .start = S3C24XX_PA_WATCHDOG,
  203. .end = S3C24XX_PA_WATCHDOG + S3C24XX_SZ_WATCHDOG - 1,
  204. .flags = IORESOURCE_MEM,
  205. },
  206. [1] = {
  207. .start = IRQ_WDT,
  208. .end = IRQ_WDT,
  209. .flags = IORESOURCE_IRQ,
  210. }
  211. };
  212. struct platform_device s3c_device_wdt = {
  213. .name = "s3c2410-wdt",
  214. .id = -1,
  215. .num_resources = ARRAY_SIZE(s3c_wdt_resource),
  216. .resource = s3c_wdt_resource,
  217. };
  218. EXPORT_SYMBOL(s3c_device_wdt);
  219. /* IIS */
  220. static struct resource s3c_iis_resource[] = {
  221. [0] = {
  222. .start = S3C24XX_PA_IIS,
  223. .end = S3C24XX_PA_IIS + S3C24XX_SZ_IIS -1,
  224. .flags = IORESOURCE_MEM,
  225. }
  226. };
  227. static u64 s3c_device_iis_dmamask = 0xffffffffUL;
  228. struct platform_device s3c_device_iis = {
  229. .name = "s3c2410-iis",
  230. .id = -1,
  231. .num_resources = ARRAY_SIZE(s3c_iis_resource),
  232. .resource = s3c_iis_resource,
  233. .dev = {
  234. .dma_mask = &s3c_device_iis_dmamask,
  235. .coherent_dma_mask = 0xffffffffUL
  236. }
  237. };
  238. EXPORT_SYMBOL(s3c_device_iis);
  239. /* RTC */
  240. static struct resource s3c_rtc_resource[] = {
  241. [0] = {
  242. .start = S3C24XX_PA_RTC,
  243. .end = S3C24XX_PA_RTC + 0xff,
  244. .flags = IORESOURCE_MEM,
  245. },
  246. [1] = {
  247. .start = IRQ_RTC,
  248. .end = IRQ_RTC,
  249. .flags = IORESOURCE_IRQ,
  250. },
  251. [2] = {
  252. .start = IRQ_TICK,
  253. .end = IRQ_TICK,
  254. .flags = IORESOURCE_IRQ
  255. }
  256. };
  257. struct platform_device s3c_device_rtc = {
  258. .name = "s3c2410-rtc",
  259. .id = -1,
  260. .num_resources = ARRAY_SIZE(s3c_rtc_resource),
  261. .resource = s3c_rtc_resource,
  262. };
  263. EXPORT_SYMBOL(s3c_device_rtc);
  264. /* ADC */
  265. static struct resource s3c_adc_resource[] = {
  266. [0] = {
  267. .start = S3C24XX_PA_ADC,
  268. .end = S3C24XX_PA_ADC + S3C24XX_SZ_ADC - 1,
  269. .flags = IORESOURCE_MEM,
  270. },
  271. [1] = {
  272. .start = IRQ_TC,
  273. .end = IRQ_TC,
  274. .flags = IORESOURCE_IRQ,
  275. },
  276. [2] = {
  277. .start = IRQ_ADC,
  278. .end = IRQ_ADC,
  279. .flags = IORESOURCE_IRQ,
  280. }
  281. };
  282. struct platform_device s3c_device_adc = {
  283. .name = "s3c24xx-adc",
  284. .id = -1,
  285. .num_resources = ARRAY_SIZE(s3c_adc_resource),
  286. .resource = s3c_adc_resource,
  287. };
  288. /* HWMON */
  289. struct platform_device s3c_device_hwmon = {
  290. .name = "s3c-hwmon",
  291. .id = -1,
  292. .dev.parent = &s3c_device_adc.dev,
  293. };
  294. /* SDI */
  295. static struct resource s3c_sdi_resource[] = {
  296. [0] = {
  297. .start = S3C24XX_PA_SDI,
  298. .end = S3C24XX_PA_SDI + S3C24XX_SZ_SDI - 1,
  299. .flags = IORESOURCE_MEM,
  300. },
  301. [1] = {
  302. .start = IRQ_SDI,
  303. .end = IRQ_SDI,
  304. .flags = IORESOURCE_IRQ,
  305. }
  306. };
  307. struct platform_device s3c_device_sdi = {
  308. .name = "s3c2410-sdi",
  309. .id = -1,
  310. .num_resources = ARRAY_SIZE(s3c_sdi_resource),
  311. .resource = s3c_sdi_resource,
  312. };
  313. EXPORT_SYMBOL(s3c_device_sdi);
  314. void s3c24xx_mci_set_platdata(struct s3c24xx_mci_pdata *pdata)
  315. {
  316. struct s3c24xx_mci_pdata *npd;
  317. npd = kmemdup(pdata, sizeof(struct s3c24xx_mci_pdata), GFP_KERNEL);
  318. if (!npd)
  319. printk(KERN_ERR "%s: no memory to copy pdata", __func__);
  320. s3c_device_sdi.dev.platform_data = npd;
  321. }
  322. /* SPI (0) */
  323. static struct resource s3c_spi0_resource[] = {
  324. [0] = {
  325. .start = S3C24XX_PA_SPI,
  326. .end = S3C24XX_PA_SPI + 0x1f,
  327. .flags = IORESOURCE_MEM,
  328. },
  329. [1] = {
  330. .start = IRQ_SPI0,
  331. .end = IRQ_SPI0,
  332. .flags = IORESOURCE_IRQ,
  333. }
  334. };
  335. static u64 s3c_device_spi0_dmamask = 0xffffffffUL;
  336. struct platform_device s3c_device_spi0 = {
  337. .name = "s3c2410-spi",
  338. .id = 0,
  339. .num_resources = ARRAY_SIZE(s3c_spi0_resource),
  340. .resource = s3c_spi0_resource,
  341. .dev = {
  342. .dma_mask = &s3c_device_spi0_dmamask,
  343. .coherent_dma_mask = 0xffffffffUL
  344. }
  345. };
  346. EXPORT_SYMBOL(s3c_device_spi0);
  347. /* SPI (1) */
  348. static struct resource s3c_spi1_resource[] = {
  349. [0] = {
  350. .start = S3C24XX_PA_SPI + S3C2410_SPI1,
  351. .end = S3C24XX_PA_SPI + S3C2410_SPI1 + 0x1f,
  352. .flags = IORESOURCE_MEM,
  353. },
  354. [1] = {
  355. .start = IRQ_SPI1,
  356. .end = IRQ_SPI1,
  357. .flags = IORESOURCE_IRQ,
  358. }
  359. };
  360. static u64 s3c_device_spi1_dmamask = 0xffffffffUL;
  361. struct platform_device s3c_device_spi1 = {
  362. .name = "s3c2410-spi",
  363. .id = 1,
  364. .num_resources = ARRAY_SIZE(s3c_spi1_resource),
  365. .resource = s3c_spi1_resource,
  366. .dev = {
  367. .dma_mask = &s3c_device_spi1_dmamask,
  368. .coherent_dma_mask = 0xffffffffUL
  369. }
  370. };
  371. EXPORT_SYMBOL(s3c_device_spi1);
  372. #ifdef CONFIG_CPU_S3C2440
  373. /* Camif Controller */
  374. static struct resource s3c_camif_resource[] = {
  375. [0] = {
  376. .start = S3C2440_PA_CAMIF,
  377. .end = S3C2440_PA_CAMIF + S3C2440_SZ_CAMIF - 1,
  378. .flags = IORESOURCE_MEM,
  379. },
  380. [1] = {
  381. .start = IRQ_CAM,
  382. .end = IRQ_CAM,
  383. .flags = IORESOURCE_IRQ,
  384. }
  385. };
  386. static u64 s3c_device_camif_dmamask = 0xffffffffUL;
  387. struct platform_device s3c_device_camif = {
  388. .name = "s3c2440-camif",
  389. .id = -1,
  390. .num_resources = ARRAY_SIZE(s3c_camif_resource),
  391. .resource = s3c_camif_resource,
  392. .dev = {
  393. .dma_mask = &s3c_device_camif_dmamask,
  394. .coherent_dma_mask = 0xffffffffUL
  395. }
  396. };
  397. EXPORT_SYMBOL(s3c_device_camif);
  398. /* AC97 */
  399. static struct resource s3c_ac97_resource[] = {
  400. [0] = {
  401. .start = S3C2440_PA_AC97,
  402. .end = S3C2440_PA_AC97 + S3C2440_SZ_AC97 -1,
  403. .flags = IORESOURCE_MEM,
  404. },
  405. [1] = {
  406. .start = IRQ_S3C244x_AC97,
  407. .end = IRQ_S3C244x_AC97,
  408. .flags = IORESOURCE_IRQ,
  409. },
  410. [2] = {
  411. .name = "PCM out",
  412. .start = DMACH_PCM_OUT,
  413. .end = DMACH_PCM_OUT,
  414. .flags = IORESOURCE_DMA,
  415. },
  416. [3] = {
  417. .name = "PCM in",
  418. .start = DMACH_PCM_IN,
  419. .end = DMACH_PCM_IN,
  420. .flags = IORESOURCE_DMA,
  421. },
  422. [4] = {
  423. .name = "Mic in",
  424. .start = DMACH_MIC_IN,
  425. .end = DMACH_MIC_IN,
  426. .flags = IORESOURCE_DMA,
  427. },
  428. };
  429. static u64 s3c_device_ac97_dmamask = 0xffffffffUL;
  430. struct platform_device s3c_device_ac97 = {
  431. .name = "s3c-ac97",
  432. .id = -1,
  433. .num_resources = ARRAY_SIZE(s3c_ac97_resource),
  434. .resource = s3c_ac97_resource,
  435. .dev = {
  436. .dma_mask = &s3c_device_ac97_dmamask,
  437. .coherent_dma_mask = 0xffffffffUL
  438. }
  439. };
  440. EXPORT_SYMBOL(s3c_device_ac97);
  441. #endif // CONFIG_CPU_S32440