common.c 8.3 KB

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  1. /*
  2. * linux/arch/arm/plat-omap/common.c
  3. *
  4. * Code common to all OMAP machines.
  5. * The file is created by Tony Lindgren <tony@atomide.com>
  6. *
  7. * Copyright (C) 2009 Texas Instruments
  8. * Added OMAP4 support - Santosh Shilimkar <santosh.shilimkar@ti.com>
  9. *
  10. * This program is free software; you can redistribute it and/or modify
  11. * it under the terms of the GNU General Public License version 2 as
  12. * published by the Free Software Foundation.
  13. */
  14. #include <linux/module.h>
  15. #include <linux/kernel.h>
  16. #include <linux/init.h>
  17. #include <linux/delay.h>
  18. #include <linux/console.h>
  19. #include <linux/serial.h>
  20. #include <linux/tty.h>
  21. #include <linux/serial_8250.h>
  22. #include <linux/serial_reg.h>
  23. #include <linux/clk.h>
  24. #include <linux/io.h>
  25. #include <mach/hardware.h>
  26. #include <asm/system.h>
  27. #include <asm/pgtable.h>
  28. #include <asm/mach/map.h>
  29. #include <asm/setup.h>
  30. #include <plat/common.h>
  31. #include <plat/board.h>
  32. #include <plat/control.h>
  33. #include <plat/mux.h>
  34. #include <plat/fpga.h>
  35. #include <plat/serial.h>
  36. #include <plat/clock.h>
  37. #if defined(CONFIG_ARCH_OMAP2) || defined(CONFIG_ARCH_OMAP3)
  38. # include "../mach-omap2/sdrc.h"
  39. #endif
  40. #define NO_LENGTH_CHECK 0xffffffff
  41. unsigned char omap_bootloader_tag[512];
  42. int omap_bootloader_tag_len;
  43. struct omap_board_config_kernel *omap_board_config;
  44. int omap_board_config_size;
  45. /* used by omap-smp.c and board-4430sdp.c */
  46. void __iomem *gic_cpu_base_addr;
  47. static const void *get_config(u16 tag, size_t len, int skip, size_t *len_out)
  48. {
  49. struct omap_board_config_kernel *kinfo = NULL;
  50. int i;
  51. /* Try to find the config from the board-specific structures
  52. * in the kernel. */
  53. for (i = 0; i < omap_board_config_size; i++) {
  54. if (omap_board_config[i].tag == tag) {
  55. if (skip == 0) {
  56. kinfo = &omap_board_config[i];
  57. break;
  58. } else {
  59. skip--;
  60. }
  61. }
  62. }
  63. if (kinfo == NULL)
  64. return NULL;
  65. return kinfo->data;
  66. }
  67. const void *__omap_get_config(u16 tag, size_t len, int nr)
  68. {
  69. return get_config(tag, len, nr, NULL);
  70. }
  71. EXPORT_SYMBOL(__omap_get_config);
  72. const void *omap_get_var_config(u16 tag, size_t *len)
  73. {
  74. return get_config(tag, NO_LENGTH_CHECK, 0, len);
  75. }
  76. EXPORT_SYMBOL(omap_get_var_config);
  77. /*
  78. * 32KHz clocksource ... always available, on pretty most chips except
  79. * OMAP 730 and 1510. Other timers could be used as clocksources, with
  80. * higher resolution in free-running counter modes (e.g. 12 MHz xtal),
  81. * but systems won't necessarily want to spend resources that way.
  82. */
  83. #define OMAP16XX_TIMER_32K_SYNCHRONIZED 0xfffbc410
  84. #if !(defined(CONFIG_ARCH_OMAP730) || defined(CONFIG_ARCH_OMAP15XX))
  85. #include <linux/clocksource.h>
  86. #ifdef CONFIG_ARCH_OMAP16XX
  87. static cycle_t omap16xx_32k_read(struct clocksource *cs)
  88. {
  89. return omap_readl(OMAP16XX_TIMER_32K_SYNCHRONIZED);
  90. }
  91. #else
  92. #define omap16xx_32k_read NULL
  93. #endif
  94. #ifdef CONFIG_ARCH_OMAP2420
  95. static cycle_t omap2420_32k_read(struct clocksource *cs)
  96. {
  97. return omap_readl(OMAP2420_32KSYNCT_BASE + 0x10);
  98. }
  99. #else
  100. #define omap2420_32k_read NULL
  101. #endif
  102. #ifdef CONFIG_ARCH_OMAP2430
  103. static cycle_t omap2430_32k_read(struct clocksource *cs)
  104. {
  105. return omap_readl(OMAP2430_32KSYNCT_BASE + 0x10);
  106. }
  107. #else
  108. #define omap2430_32k_read NULL
  109. #endif
  110. #ifdef CONFIG_ARCH_OMAP3
  111. static cycle_t omap34xx_32k_read(struct clocksource *cs)
  112. {
  113. return omap_readl(OMAP3430_32KSYNCT_BASE + 0x10);
  114. }
  115. #else
  116. #define omap34xx_32k_read NULL
  117. #endif
  118. #ifdef CONFIG_ARCH_OMAP4
  119. static cycle_t omap44xx_32k_read(struct clocksource *cs)
  120. {
  121. return omap_readl(OMAP4430_32KSYNCT_BASE + 0x10);
  122. }
  123. #else
  124. #define omap44xx_32k_read NULL
  125. #endif
  126. /*
  127. * Kernel assumes that sched_clock can be called early but may not have
  128. * things ready yet.
  129. */
  130. static cycle_t omap_32k_read_dummy(struct clocksource *cs)
  131. {
  132. return 0;
  133. }
  134. static struct clocksource clocksource_32k = {
  135. .name = "32k_counter",
  136. .rating = 250,
  137. .read = omap_32k_read_dummy,
  138. .mask = CLOCKSOURCE_MASK(32),
  139. .shift = 10,
  140. .flags = CLOCK_SOURCE_IS_CONTINUOUS,
  141. };
  142. /*
  143. * Returns current time from boot in nsecs. It's OK for this to wrap
  144. * around for now, as it's just a relative time stamp.
  145. */
  146. unsigned long long sched_clock(void)
  147. {
  148. return clocksource_cyc2ns(clocksource_32k.read(&clocksource_32k),
  149. clocksource_32k.mult, clocksource_32k.shift);
  150. }
  151. /**
  152. * read_persistent_clock - Return time from a persistent clock.
  153. *
  154. * Reads the time from a source which isn't disabled during PM, the
  155. * 32k sync timer. Convert the cycles elapsed since last read into
  156. * nsecs and adds to a monotonically increasing timespec.
  157. */
  158. static struct timespec persistent_ts;
  159. static cycles_t cycles, last_cycles;
  160. void read_persistent_clock(struct timespec *ts)
  161. {
  162. unsigned long long nsecs;
  163. cycles_t delta;
  164. struct timespec *tsp = &persistent_ts;
  165. last_cycles = cycles;
  166. cycles = clocksource_32k.read(&clocksource_32k);
  167. delta = cycles - last_cycles;
  168. nsecs = clocksource_cyc2ns(delta,
  169. clocksource_32k.mult, clocksource_32k.shift);
  170. timespec_add_ns(tsp, nsecs);
  171. *ts = *tsp;
  172. }
  173. static int __init omap_init_clocksource_32k(void)
  174. {
  175. static char err[] __initdata = KERN_ERR
  176. "%s: can't register clocksource!\n";
  177. if (cpu_is_omap16xx() || cpu_class_is_omap2()) {
  178. struct clk *sync_32k_ick;
  179. if (cpu_is_omap16xx())
  180. clocksource_32k.read = omap16xx_32k_read;
  181. else if (cpu_is_omap2420())
  182. clocksource_32k.read = omap2420_32k_read;
  183. else if (cpu_is_omap2430())
  184. clocksource_32k.read = omap2430_32k_read;
  185. else if (cpu_is_omap34xx())
  186. clocksource_32k.read = omap34xx_32k_read;
  187. else if (cpu_is_omap44xx())
  188. clocksource_32k.read = omap44xx_32k_read;
  189. else
  190. return -ENODEV;
  191. sync_32k_ick = clk_get(NULL, "omap_32ksync_ick");
  192. if (sync_32k_ick)
  193. clk_enable(sync_32k_ick);
  194. clocksource_32k.mult = clocksource_hz2mult(32768,
  195. clocksource_32k.shift);
  196. if (clocksource_register(&clocksource_32k))
  197. printk(err, clocksource_32k.name);
  198. }
  199. return 0;
  200. }
  201. arch_initcall(omap_init_clocksource_32k);
  202. #endif /* !(defined(CONFIG_ARCH_OMAP730) || defined(CONFIG_ARCH_OMAP15XX)) */
  203. /* Global address base setup code */
  204. #if defined(CONFIG_ARCH_OMAP2) || defined(CONFIG_ARCH_OMAP3)
  205. static void __init __omap2_set_globals(struct omap_globals *omap2_globals)
  206. {
  207. omap2_set_globals_tap(omap2_globals);
  208. omap2_set_globals_sdrc(omap2_globals);
  209. omap2_set_globals_control(omap2_globals);
  210. omap2_set_globals_prcm(omap2_globals);
  211. omap2_set_globals_uart(omap2_globals);
  212. }
  213. #endif
  214. #if defined(CONFIG_ARCH_OMAP2420)
  215. static struct omap_globals omap242x_globals = {
  216. .class = OMAP242X_CLASS,
  217. .tap = OMAP2_L4_IO_ADDRESS(0x48014000),
  218. .sdrc = OMAP2420_SDRC_BASE,
  219. .sms = OMAP2420_SMS_BASE,
  220. .ctrl = OMAP2420_CTRL_BASE,
  221. .prm = OMAP2420_PRM_BASE,
  222. .cm = OMAP2420_CM_BASE,
  223. .uart1_phys = OMAP2_UART1_BASE,
  224. .uart2_phys = OMAP2_UART2_BASE,
  225. .uart3_phys = OMAP2_UART3_BASE,
  226. };
  227. void __init omap2_set_globals_242x(void)
  228. {
  229. __omap2_set_globals(&omap242x_globals);
  230. }
  231. #endif
  232. #if defined(CONFIG_ARCH_OMAP2430)
  233. static struct omap_globals omap243x_globals = {
  234. .class = OMAP243X_CLASS,
  235. .tap = OMAP2_L4_IO_ADDRESS(0x4900a000),
  236. .sdrc = OMAP243X_SDRC_BASE,
  237. .sms = OMAP243X_SMS_BASE,
  238. .ctrl = OMAP243X_CTRL_BASE,
  239. .prm = OMAP2430_PRM_BASE,
  240. .cm = OMAP2430_CM_BASE,
  241. .uart1_phys = OMAP2_UART1_BASE,
  242. .uart2_phys = OMAP2_UART2_BASE,
  243. .uart3_phys = OMAP2_UART3_BASE,
  244. };
  245. void __init omap2_set_globals_243x(void)
  246. {
  247. __omap2_set_globals(&omap243x_globals);
  248. }
  249. #endif
  250. #if defined(CONFIG_ARCH_OMAP3)
  251. static struct omap_globals omap3_globals = {
  252. .class = OMAP343X_CLASS,
  253. .tap = OMAP2_L4_IO_ADDRESS(0x4830A000),
  254. .sdrc = OMAP343X_SDRC_BASE,
  255. .sms = OMAP343X_SMS_BASE,
  256. .ctrl = OMAP343X_CTRL_BASE,
  257. .prm = OMAP3430_PRM_BASE,
  258. .cm = OMAP3430_CM_BASE,
  259. .uart1_phys = OMAP3_UART1_BASE,
  260. .uart2_phys = OMAP3_UART2_BASE,
  261. .uart3_phys = OMAP3_UART3_BASE,
  262. };
  263. void __init omap2_set_globals_343x(void)
  264. {
  265. __omap2_set_globals(&omap3_globals);
  266. }
  267. void __init omap2_set_globals_36xx(void)
  268. {
  269. omap3_globals.uart4_phys = OMAP3_UART4_BASE;
  270. __omap2_set_globals(&omap3_globals);
  271. }
  272. #endif
  273. #if defined(CONFIG_ARCH_OMAP4)
  274. static struct omap_globals omap4_globals = {
  275. .class = OMAP443X_CLASS,
  276. .tap = OMAP2_L4_IO_ADDRESS(OMAP443X_SCM_BASE),
  277. .ctrl = OMAP443X_CTRL_BASE,
  278. .prm = OMAP4430_PRM_BASE,
  279. .cm = OMAP4430_CM_BASE,
  280. .cm2 = OMAP4430_CM2_BASE,
  281. .uart1_phys = OMAP4_UART1_BASE,
  282. .uart2_phys = OMAP4_UART2_BASE,
  283. .uart3_phys = OMAP4_UART3_BASE,
  284. .uart4_phys = OMAP4_UART4_BASE,
  285. };
  286. void __init omap2_set_globals_443x(void)
  287. {
  288. omap2_set_globals_tap(&omap4_globals);
  289. omap2_set_globals_control(&omap4_globals);
  290. omap2_set_globals_prcm(&omap4_globals);
  291. omap2_set_globals_uart(&omap4_globals);
  292. }
  293. #endif