mach-smdk6410.c 15 KB

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  1. /* linux/arch/arm/mach-s3c64xx/mach-smdk6410.c
  2. *
  3. * Copyright 2008 Openmoko, Inc.
  4. * Copyright 2008 Simtec Electronics
  5. * Ben Dooks <ben@simtec.co.uk>
  6. * http://armlinux.simtec.co.uk/
  7. *
  8. * This program is free software; you can redistribute it and/or modify
  9. * it under the terms of the GNU General Public License version 2 as
  10. * published by the Free Software Foundation.
  11. *
  12. */
  13. #include <linux/kernel.h>
  14. #include <linux/types.h>
  15. #include <linux/interrupt.h>
  16. #include <linux/list.h>
  17. #include <linux/timer.h>
  18. #include <linux/init.h>
  19. #include <linux/serial_core.h>
  20. #include <linux/platform_device.h>
  21. #include <linux/io.h>
  22. #include <linux/i2c.h>
  23. #include <linux/leds.h>
  24. #include <linux/fb.h>
  25. #include <linux/gpio.h>
  26. #include <linux/delay.h>
  27. #include <linux/smsc911x.h>
  28. #include <linux/regulator/fixed.h>
  29. #ifdef CONFIG_SMDK6410_WM1190_EV1
  30. #include <linux/mfd/wm8350/core.h>
  31. #include <linux/mfd/wm8350/pmic.h>
  32. #endif
  33. #ifdef CONFIG_SMDK6410_WM1192_EV1
  34. #include <linux/mfd/wm831x/core.h>
  35. #include <linux/mfd/wm831x/pdata.h>
  36. #endif
  37. #include <video/platform_lcd.h>
  38. #include <asm/mach/arch.h>
  39. #include <asm/mach/map.h>
  40. #include <asm/mach/irq.h>
  41. #include <mach/hardware.h>
  42. #include <mach/regs-fb.h>
  43. #include <mach/map.h>
  44. #include <asm/irq.h>
  45. #include <asm/mach-types.h>
  46. #include <plat/regs-serial.h>
  47. #include <mach/regs-modem.h>
  48. #include <mach/regs-gpio.h>
  49. #include <mach/regs-sys.h>
  50. #include <mach/regs-srom.h>
  51. #include <plat/iic.h>
  52. #include <plat/fb.h>
  53. #include <plat/gpio-cfg.h>
  54. #include <mach/s3c6410.h>
  55. #include <plat/clock.h>
  56. #include <plat/devs.h>
  57. #include <plat/cpu.h>
  58. #define UCON S3C2410_UCON_DEFAULT | S3C2410_UCON_UCLK
  59. #define ULCON S3C2410_LCON_CS8 | S3C2410_LCON_PNONE | S3C2410_LCON_STOPB
  60. #define UFCON S3C2410_UFCON_RXTRIG8 | S3C2410_UFCON_FIFOMODE
  61. static struct s3c2410_uartcfg smdk6410_uartcfgs[] __initdata = {
  62. [0] = {
  63. .hwport = 0,
  64. .flags = 0,
  65. .ucon = UCON,
  66. .ulcon = ULCON,
  67. .ufcon = UFCON,
  68. },
  69. [1] = {
  70. .hwport = 1,
  71. .flags = 0,
  72. .ucon = UCON,
  73. .ulcon = ULCON,
  74. .ufcon = UFCON,
  75. },
  76. [2] = {
  77. .hwport = 2,
  78. .flags = 0,
  79. .ucon = UCON,
  80. .ulcon = ULCON,
  81. .ufcon = UFCON,
  82. },
  83. [3] = {
  84. .hwport = 3,
  85. .flags = 0,
  86. .ucon = UCON,
  87. .ulcon = ULCON,
  88. .ufcon = UFCON,
  89. },
  90. };
  91. /* framebuffer and LCD setup. */
  92. /* GPF15 = LCD backlight control
  93. * GPF13 => Panel power
  94. * GPN5 = LCD nRESET signal
  95. * PWM_TOUT1 => backlight brightness
  96. */
  97. static void smdk6410_lcd_power_set(struct plat_lcd_data *pd,
  98. unsigned int power)
  99. {
  100. if (power) {
  101. gpio_direction_output(S3C64XX_GPF(13), 1);
  102. gpio_direction_output(S3C64XX_GPF(15), 1);
  103. /* fire nRESET on power up */
  104. gpio_direction_output(S3C64XX_GPN(5), 0);
  105. msleep(10);
  106. gpio_direction_output(S3C64XX_GPN(5), 1);
  107. msleep(1);
  108. } else {
  109. gpio_direction_output(S3C64XX_GPF(15), 0);
  110. gpio_direction_output(S3C64XX_GPF(13), 0);
  111. }
  112. }
  113. static struct plat_lcd_data smdk6410_lcd_power_data = {
  114. .set_power = smdk6410_lcd_power_set,
  115. };
  116. static struct platform_device smdk6410_lcd_powerdev = {
  117. .name = "platform-lcd",
  118. .dev.parent = &s3c_device_fb.dev,
  119. .dev.platform_data = &smdk6410_lcd_power_data,
  120. };
  121. static struct s3c_fb_pd_win smdk6410_fb_win0 = {
  122. /* this is to ensure we use win0 */
  123. .win_mode = {
  124. .pixclock = 41094,
  125. .left_margin = 8,
  126. .right_margin = 13,
  127. .upper_margin = 7,
  128. .lower_margin = 5,
  129. .hsync_len = 3,
  130. .vsync_len = 1,
  131. .xres = 800,
  132. .yres = 480,
  133. },
  134. .max_bpp = 32,
  135. .default_bpp = 16,
  136. };
  137. /* 405566 clocks per frame => 60Hz refresh requires 24333960Hz clock */
  138. static struct s3c_fb_platdata smdk6410_lcd_pdata __initdata = {
  139. .setup_gpio = s3c64xx_fb_gpio_setup_24bpp,
  140. .win[0] = &smdk6410_fb_win0,
  141. .vidcon0 = VIDCON0_VIDOUT_RGB | VIDCON0_PNRMODE_RGB,
  142. .vidcon1 = VIDCON1_INV_HSYNC | VIDCON1_INV_VSYNC,
  143. };
  144. /*
  145. * Configuring Ethernet on SMDK6410
  146. *
  147. * Both CS8900A and LAN9115 chips share one chip select mediated by CFG6.
  148. * The constant address below corresponds to nCS1
  149. *
  150. * 1) Set CFGB2 p3 ON others off, no other CFGB selects "ethernet"
  151. * 2) CFG6 needs to be switched to "LAN9115" side
  152. */
  153. static struct resource smdk6410_smsc911x_resources[] = {
  154. [0] = {
  155. .start = S3C64XX_PA_XM0CSN1,
  156. .end = S3C64XX_PA_XM0CSN1 + SZ_64K - 1,
  157. .flags = IORESOURCE_MEM,
  158. },
  159. [1] = {
  160. .start = S3C_EINT(10),
  161. .end = S3C_EINT(10),
  162. .flags = IORESOURCE_IRQ | IRQ_TYPE_LEVEL_LOW,
  163. },
  164. };
  165. static struct smsc911x_platform_config smdk6410_smsc911x_pdata = {
  166. .irq_polarity = SMSC911X_IRQ_POLARITY_ACTIVE_LOW,
  167. .irq_type = SMSC911X_IRQ_TYPE_OPEN_DRAIN,
  168. .flags = SMSC911X_USE_32BIT | SMSC911X_FORCE_INTERNAL_PHY,
  169. .phy_interface = PHY_INTERFACE_MODE_MII,
  170. };
  171. static struct platform_device smdk6410_smsc911x = {
  172. .name = "smsc911x",
  173. .id = -1,
  174. .num_resources = ARRAY_SIZE(smdk6410_smsc911x_resources),
  175. .resource = &smdk6410_smsc911x_resources[0],
  176. .dev = {
  177. .platform_data = &smdk6410_smsc911x_pdata,
  178. },
  179. };
  180. #ifdef CONFIG_REGULATOR
  181. static struct regulator_consumer_supply smdk6410_b_pwr_5v_consumers[] = {
  182. {
  183. /* WM8580 */
  184. .supply = "PVDD",
  185. .dev_name = "0-001b",
  186. },
  187. {
  188. /* WM8580 */
  189. .supply = "AVDD",
  190. .dev_name = "0-001b",
  191. },
  192. };
  193. static struct regulator_init_data smdk6410_b_pwr_5v_data = {
  194. .constraints = {
  195. .always_on = 1,
  196. },
  197. .num_consumer_supplies = ARRAY_SIZE(smdk6410_b_pwr_5v_consumers),
  198. .consumer_supplies = smdk6410_b_pwr_5v_consumers,
  199. };
  200. static struct fixed_voltage_config smdk6410_b_pwr_5v_pdata = {
  201. .supply_name = "B_PWR_5V",
  202. .microvolts = 5000000,
  203. .init_data = &smdk6410_b_pwr_5v_data,
  204. .gpio = -EINVAL,
  205. };
  206. static struct platform_device smdk6410_b_pwr_5v = {
  207. .name = "reg-fixed-voltage",
  208. .id = -1,
  209. .dev = {
  210. .platform_data = &smdk6410_b_pwr_5v_pdata,
  211. },
  212. };
  213. #endif
  214. static struct map_desc smdk6410_iodesc[] = {};
  215. static struct platform_device *smdk6410_devices[] __initdata = {
  216. #ifdef CONFIG_SMDK6410_SD_CH0
  217. &s3c_device_hsmmc0,
  218. #endif
  219. #ifdef CONFIG_SMDK6410_SD_CH1
  220. &s3c_device_hsmmc1,
  221. #endif
  222. &s3c_device_i2c0,
  223. &s3c_device_i2c1,
  224. &s3c_device_fb,
  225. &s3c_device_ohci,
  226. &s3c_device_usb_hsotg,
  227. &s3c64xx_device_iisv4,
  228. #ifdef CONFIG_REGULATOR
  229. &smdk6410_b_pwr_5v,
  230. #endif
  231. &smdk6410_lcd_powerdev,
  232. &smdk6410_smsc911x,
  233. };
  234. #ifdef CONFIG_REGULATOR
  235. /* ARM core */
  236. static struct regulator_consumer_supply smdk6410_vddarm_consumers[] = {
  237. {
  238. .supply = "vddarm",
  239. }
  240. };
  241. /* VDDARM, BUCK1 on J5 */
  242. static struct regulator_init_data smdk6410_vddarm = {
  243. .constraints = {
  244. .name = "PVDD_ARM",
  245. .min_uV = 1000000,
  246. .max_uV = 1300000,
  247. .always_on = 1,
  248. .valid_ops_mask = REGULATOR_CHANGE_VOLTAGE,
  249. },
  250. .num_consumer_supplies = ARRAY_SIZE(smdk6410_vddarm_consumers),
  251. .consumer_supplies = smdk6410_vddarm_consumers,
  252. };
  253. /* VDD_INT, BUCK2 on J5 */
  254. static struct regulator_init_data smdk6410_vddint = {
  255. .constraints = {
  256. .name = "PVDD_INT",
  257. .min_uV = 1000000,
  258. .max_uV = 1200000,
  259. .always_on = 1,
  260. .valid_ops_mask = REGULATOR_CHANGE_VOLTAGE,
  261. },
  262. };
  263. /* VDD_HI, LDO3 on J5 */
  264. static struct regulator_init_data smdk6410_vddhi = {
  265. .constraints = {
  266. .name = "PVDD_HI",
  267. .always_on = 1,
  268. },
  269. };
  270. /* VDD_PLL, LDO2 on J5 */
  271. static struct regulator_init_data smdk6410_vddpll = {
  272. .constraints = {
  273. .name = "PVDD_PLL",
  274. .always_on = 1,
  275. },
  276. };
  277. /* VDD_UH_MMC, LDO5 on J5 */
  278. static struct regulator_init_data smdk6410_vdduh_mmc = {
  279. .constraints = {
  280. .name = "PVDD_UH/PVDD_MMC",
  281. .always_on = 1,
  282. },
  283. };
  284. /* VCCM3BT, LDO8 on J5 */
  285. static struct regulator_init_data smdk6410_vccmc3bt = {
  286. .constraints = {
  287. .name = "PVCCM3BT",
  288. .always_on = 1,
  289. },
  290. };
  291. /* VCCM2MTV, LDO11 on J5 */
  292. static struct regulator_init_data smdk6410_vccm2mtv = {
  293. .constraints = {
  294. .name = "PVCCM2MTV",
  295. .always_on = 1,
  296. },
  297. };
  298. /* VDD_LCD, LDO12 on J5 */
  299. static struct regulator_init_data smdk6410_vddlcd = {
  300. .constraints = {
  301. .name = "PVDD_LCD",
  302. .always_on = 1,
  303. },
  304. };
  305. /* VDD_OTGI, LDO9 on J5 */
  306. static struct regulator_init_data smdk6410_vddotgi = {
  307. .constraints = {
  308. .name = "PVDD_OTGI",
  309. .always_on = 1,
  310. },
  311. };
  312. /* VDD_OTG, LDO14 on J5 */
  313. static struct regulator_init_data smdk6410_vddotg = {
  314. .constraints = {
  315. .name = "PVDD_OTG",
  316. .always_on = 1,
  317. },
  318. };
  319. /* VDD_ALIVE, LDO15 on J5 */
  320. static struct regulator_init_data smdk6410_vddalive = {
  321. .constraints = {
  322. .name = "PVDD_ALIVE",
  323. .always_on = 1,
  324. },
  325. };
  326. /* VDD_AUDIO, VLDO_AUDIO on J5 */
  327. static struct regulator_init_data smdk6410_vddaudio = {
  328. .constraints = {
  329. .name = "PVDD_AUDIO",
  330. .always_on = 1,
  331. },
  332. };
  333. #endif
  334. #ifdef CONFIG_SMDK6410_WM1190_EV1
  335. /* S3C64xx internal logic & PLL */
  336. static struct regulator_init_data wm8350_dcdc1_data = {
  337. .constraints = {
  338. .name = "PVDD_INT/PVDD_PLL",
  339. .min_uV = 1200000,
  340. .max_uV = 1200000,
  341. .always_on = 1,
  342. .apply_uV = 1,
  343. },
  344. };
  345. /* Memory */
  346. static struct regulator_init_data wm8350_dcdc3_data = {
  347. .constraints = {
  348. .name = "PVDD_MEM",
  349. .min_uV = 1800000,
  350. .max_uV = 1800000,
  351. .always_on = 1,
  352. .state_mem = {
  353. .uV = 1800000,
  354. .mode = REGULATOR_MODE_NORMAL,
  355. .enabled = 1,
  356. },
  357. .initial_state = PM_SUSPEND_MEM,
  358. },
  359. };
  360. /* USB, EXT, PCM, ADC/DAC, USB, MMC */
  361. static struct regulator_consumer_supply wm8350_dcdc4_consumers[] = {
  362. {
  363. /* WM8580 */
  364. .supply = "DVDD",
  365. .dev_name = "0-001b",
  366. },
  367. };
  368. static struct regulator_init_data wm8350_dcdc4_data = {
  369. .constraints = {
  370. .name = "PVDD_HI/PVDD_EXT/PVDD_SYS/PVCCM2MTV",
  371. .min_uV = 3000000,
  372. .max_uV = 3000000,
  373. .always_on = 1,
  374. },
  375. .num_consumer_supplies = ARRAY_SIZE(wm8350_dcdc4_consumers),
  376. .consumer_supplies = wm8350_dcdc4_consumers,
  377. };
  378. /* OTGi/1190-EV1 HPVDD & AVDD */
  379. static struct regulator_init_data wm8350_ldo4_data = {
  380. .constraints = {
  381. .name = "PVDD_OTGI/HPVDD/AVDD",
  382. .min_uV = 1200000,
  383. .max_uV = 1200000,
  384. .apply_uV = 1,
  385. .always_on = 1,
  386. },
  387. };
  388. static struct {
  389. int regulator;
  390. struct regulator_init_data *initdata;
  391. } wm1190_regulators[] = {
  392. { WM8350_DCDC_1, &wm8350_dcdc1_data },
  393. { WM8350_DCDC_3, &wm8350_dcdc3_data },
  394. { WM8350_DCDC_4, &wm8350_dcdc4_data },
  395. { WM8350_DCDC_6, &smdk6410_vddarm },
  396. { WM8350_LDO_1, &smdk6410_vddalive },
  397. { WM8350_LDO_2, &smdk6410_vddotg },
  398. { WM8350_LDO_3, &smdk6410_vddlcd },
  399. { WM8350_LDO_4, &wm8350_ldo4_data },
  400. };
  401. static int __init smdk6410_wm8350_init(struct wm8350 *wm8350)
  402. {
  403. int i;
  404. /* Configure the IRQ line */
  405. s3c_gpio_setpull(S3C64XX_GPN(12), S3C_GPIO_PULL_UP);
  406. /* Instantiate the regulators */
  407. for (i = 0; i < ARRAY_SIZE(wm1190_regulators); i++)
  408. wm8350_register_regulator(wm8350,
  409. wm1190_regulators[i].regulator,
  410. wm1190_regulators[i].initdata);
  411. return 0;
  412. }
  413. static struct wm8350_platform_data __initdata smdk6410_wm8350_pdata = {
  414. .init = smdk6410_wm8350_init,
  415. .irq_high = 1,
  416. .irq_base = IRQ_BOARD_START,
  417. };
  418. #endif
  419. #ifdef CONFIG_SMDK6410_WM1192_EV1
  420. static struct gpio_led wm1192_pmic_leds[] = {
  421. {
  422. .name = "PMIC:red:power",
  423. .gpio = GPIO_BOARD_START + 3,
  424. .default_state = LEDS_GPIO_DEFSTATE_ON,
  425. },
  426. };
  427. static struct gpio_led_platform_data wm1192_pmic_led = {
  428. .num_leds = ARRAY_SIZE(wm1192_pmic_leds),
  429. .leds = wm1192_pmic_leds,
  430. };
  431. static struct platform_device wm1192_pmic_led_dev = {
  432. .name = "leds-gpio",
  433. .id = -1,
  434. .dev = {
  435. .platform_data = &wm1192_pmic_led,
  436. },
  437. };
  438. static int wm1192_pre_init(struct wm831x *wm831x)
  439. {
  440. int ret;
  441. /* Configure the IRQ line */
  442. s3c_gpio_setpull(S3C64XX_GPN(12), S3C_GPIO_PULL_UP);
  443. ret = platform_device_register(&wm1192_pmic_led_dev);
  444. if (ret != 0)
  445. dev_err(wm831x->dev, "Failed to add PMIC LED: %d\n", ret);
  446. return 0;
  447. }
  448. static struct wm831x_backlight_pdata wm1192_backlight_pdata = {
  449. .isink = 1,
  450. .max_uA = 27554,
  451. };
  452. static struct regulator_init_data wm1192_dcdc3 = {
  453. .constraints = {
  454. .name = "PVDD_MEM/PVDD_GPS",
  455. .always_on = 1,
  456. },
  457. };
  458. static struct regulator_consumer_supply wm1192_ldo1_consumers[] = {
  459. { .supply = "DVDD", .dev_name = "0-001b", }, /* WM8580 */
  460. };
  461. static struct regulator_init_data wm1192_ldo1 = {
  462. .constraints = {
  463. .name = "PVDD_LCD/PVDD_EXT",
  464. .always_on = 1,
  465. },
  466. .consumer_supplies = wm1192_ldo1_consumers,
  467. .num_consumer_supplies = ARRAY_SIZE(wm1192_ldo1_consumers),
  468. };
  469. static struct wm831x_status_pdata wm1192_led7_pdata = {
  470. .name = "LED7:green:",
  471. };
  472. static struct wm831x_status_pdata wm1192_led8_pdata = {
  473. .name = "LED8:green:",
  474. };
  475. static struct wm831x_pdata smdk6410_wm1192_pdata = {
  476. .pre_init = wm1192_pre_init,
  477. .irq_base = IRQ_BOARD_START,
  478. .backlight = &wm1192_backlight_pdata,
  479. .dcdc = {
  480. &smdk6410_vddarm, /* DCDC1 */
  481. &smdk6410_vddint, /* DCDC2 */
  482. &wm1192_dcdc3,
  483. },
  484. .gpio_base = GPIO_BOARD_START,
  485. .ldo = {
  486. &wm1192_ldo1, /* LDO1 */
  487. &smdk6410_vdduh_mmc, /* LDO2 */
  488. NULL, /* LDO3 NC */
  489. &smdk6410_vddotgi, /* LDO4 */
  490. &smdk6410_vddotg, /* LDO5 */
  491. &smdk6410_vddhi, /* LDO6 */
  492. &smdk6410_vddaudio, /* LDO7 */
  493. &smdk6410_vccm2mtv, /* LDO8 */
  494. &smdk6410_vddpll, /* LDO9 */
  495. &smdk6410_vccmc3bt, /* LDO10 */
  496. &smdk6410_vddalive, /* LDO11 */
  497. },
  498. .status = {
  499. &wm1192_led7_pdata,
  500. &wm1192_led8_pdata,
  501. },
  502. };
  503. #endif
  504. static struct i2c_board_info i2c_devs0[] __initdata = {
  505. { I2C_BOARD_INFO("24c08", 0x50), },
  506. { I2C_BOARD_INFO("wm8580", 0x1b), },
  507. #ifdef CONFIG_SMDK6410_WM1192_EV1
  508. { I2C_BOARD_INFO("wm8312", 0x34),
  509. .platform_data = &smdk6410_wm1192_pdata,
  510. .irq = S3C_EINT(12),
  511. },
  512. #endif
  513. #ifdef CONFIG_SMDK6410_WM1190_EV1
  514. { I2C_BOARD_INFO("wm8350", 0x1a),
  515. .platform_data = &smdk6410_wm8350_pdata,
  516. .irq = S3C_EINT(12),
  517. },
  518. #endif
  519. };
  520. static struct i2c_board_info i2c_devs1[] __initdata = {
  521. { I2C_BOARD_INFO("24c128", 0x57), }, /* Samsung S524AD0XD1 */
  522. };
  523. static void __init smdk6410_map_io(void)
  524. {
  525. u32 tmp;
  526. s3c64xx_init_io(smdk6410_iodesc, ARRAY_SIZE(smdk6410_iodesc));
  527. s3c24xx_init_clocks(12000000);
  528. s3c24xx_init_uarts(smdk6410_uartcfgs, ARRAY_SIZE(smdk6410_uartcfgs));
  529. /* set the LCD type */
  530. tmp = __raw_readl(S3C64XX_SPCON);
  531. tmp &= ~S3C64XX_SPCON_LCD_SEL_MASK;
  532. tmp |= S3C64XX_SPCON_LCD_SEL_RGB;
  533. __raw_writel(tmp, S3C64XX_SPCON);
  534. /* remove the lcd bypass */
  535. tmp = __raw_readl(S3C64XX_MODEM_MIFPCON);
  536. tmp &= ~MIFPCON_LCD_BYPASS;
  537. __raw_writel(tmp, S3C64XX_MODEM_MIFPCON);
  538. }
  539. static void __init smdk6410_machine_init(void)
  540. {
  541. u32 cs1;
  542. s3c_i2c0_set_platdata(NULL);
  543. s3c_i2c1_set_platdata(NULL);
  544. s3c_fb_set_platdata(&smdk6410_lcd_pdata);
  545. /* configure nCS1 width to 16 bits */
  546. cs1 = __raw_readl(S3C64XX_SROM_BW) &
  547. ~(S3C64XX_SROM_BW__CS_MASK << S3C64XX_SROM_BW__NCS1__SHIFT);
  548. cs1 |= ((1 << S3C64XX_SROM_BW__DATAWIDTH__SHIFT) |
  549. (1 << S3C64XX_SROM_BW__WAITENABLE__SHIFT) |
  550. (1 << S3C64XX_SROM_BW__BYTEENABLE__SHIFT)) <<
  551. S3C64XX_SROM_BW__NCS1__SHIFT;
  552. __raw_writel(cs1, S3C64XX_SROM_BW);
  553. /* set timing for nCS1 suitable for ethernet chip */
  554. __raw_writel((0 << S3C64XX_SROM_BCX__PMC__SHIFT) |
  555. (6 << S3C64XX_SROM_BCX__TACP__SHIFT) |
  556. (4 << S3C64XX_SROM_BCX__TCAH__SHIFT) |
  557. (1 << S3C64XX_SROM_BCX__TCOH__SHIFT) |
  558. (0xe << S3C64XX_SROM_BCX__TACC__SHIFT) |
  559. (4 << S3C64XX_SROM_BCX__TCOS__SHIFT) |
  560. (0 << S3C64XX_SROM_BCX__TACS__SHIFT), S3C64XX_SROM_BC1);
  561. gpio_request(S3C64XX_GPN(5), "LCD power");
  562. gpio_request(S3C64XX_GPF(13), "LCD power");
  563. gpio_request(S3C64XX_GPF(15), "LCD power");
  564. i2c_register_board_info(0, i2c_devs0, ARRAY_SIZE(i2c_devs0));
  565. i2c_register_board_info(1, i2c_devs1, ARRAY_SIZE(i2c_devs1));
  566. platform_add_devices(smdk6410_devices, ARRAY_SIZE(smdk6410_devices));
  567. }
  568. MACHINE_START(SMDK6410, "SMDK6410")
  569. /* Maintainer: Ben Dooks <ben@fluff.org> */
  570. .phys_io = S3C_PA_UART & 0xfff00000,
  571. .io_pg_offst = (((u32)S3C_VA_UART) >> 18) & 0xfffc,
  572. .boot_params = S3C64XX_PA_SDRAM + 0x100,
  573. .init_irq = s3c6410_init_irq,
  574. .map_io = smdk6410_map_io,
  575. .init_machine = smdk6410_machine_init,
  576. .timer = &s3c24xx_timer,
  577. MACHINE_END