viper.c 22 KB

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  1. /*
  2. * linux/arch/arm/mach-pxa/viper.c
  3. *
  4. * Support for the Arcom VIPER SBC.
  5. *
  6. * Author: Ian Campbell
  7. * Created: Feb 03, 2003
  8. * Copyright: Arcom Control Systems
  9. *
  10. * Maintained by Marc Zyngier <maz@misterjones.org>
  11. * <marc.zyngier@altran.com>
  12. *
  13. * Based on lubbock.c:
  14. * Author: Nicolas Pitre
  15. * Created: Jun 15, 2001
  16. * Copyright: MontaVista Software Inc.
  17. *
  18. * This program is free software; you can redistribute it and/or modify
  19. * it under the terms of the GNU General Public License version 2 as
  20. * published by the Free Software Foundation.
  21. */
  22. #include <linux/types.h>
  23. #include <linux/memory.h>
  24. #include <linux/cpu.h>
  25. #include <linux/cpufreq.h>
  26. #include <linux/delay.h>
  27. #include <linux/fs.h>
  28. #include <linux/init.h>
  29. #include <linux/interrupt.h>
  30. #include <linux/major.h>
  31. #include <linux/module.h>
  32. #include <linux/pm.h>
  33. #include <linux/sched.h>
  34. #include <linux/gpio.h>
  35. #include <linux/i2c-gpio.h>
  36. #include <linux/serial_8250.h>
  37. #include <linux/smc91x.h>
  38. #include <linux/pwm_backlight.h>
  39. #include <linux/usb/isp116x.h>
  40. #include <linux/mtd/mtd.h>
  41. #include <linux/mtd/partitions.h>
  42. #include <linux/mtd/physmap.h>
  43. #include <mach/pxa25x.h>
  44. #include <mach/audio.h>
  45. #include <mach/pxafb.h>
  46. #include <plat/i2c.h>
  47. #include <mach/regs-uart.h>
  48. #include <mach/arcom-pcmcia.h>
  49. #include <mach/viper.h>
  50. #include <asm/setup.h>
  51. #include <asm/mach-types.h>
  52. #include <asm/irq.h>
  53. #include <asm/sizes.h>
  54. #include <asm/mach/arch.h>
  55. #include <asm/mach/map.h>
  56. #include <asm/mach/irq.h>
  57. #include "generic.h"
  58. #include "devices.h"
  59. static unsigned int icr;
  60. static void viper_icr_set_bit(unsigned int bit)
  61. {
  62. icr |= bit;
  63. VIPER_ICR = icr;
  64. }
  65. static void viper_icr_clear_bit(unsigned int bit)
  66. {
  67. icr &= ~bit;
  68. VIPER_ICR = icr;
  69. }
  70. /* This function is used from the pcmcia module to reset the CF */
  71. static void viper_cf_reset(int state)
  72. {
  73. if (state)
  74. viper_icr_set_bit(VIPER_ICR_CF_RST);
  75. else
  76. viper_icr_clear_bit(VIPER_ICR_CF_RST);
  77. }
  78. static struct arcom_pcmcia_pdata viper_pcmcia_info = {
  79. .cd_gpio = VIPER_CF_CD_GPIO,
  80. .rdy_gpio = VIPER_CF_RDY_GPIO,
  81. .pwr_gpio = VIPER_CF_POWER_GPIO,
  82. .reset = viper_cf_reset,
  83. };
  84. static struct platform_device viper_pcmcia_device = {
  85. .name = "viper-pcmcia",
  86. .id = -1,
  87. .dev = {
  88. .platform_data = &viper_pcmcia_info,
  89. },
  90. };
  91. /*
  92. * The CPLD version register was not present on VIPER boards prior to
  93. * v2i1. On v1 boards where the version register is not present we
  94. * will just read back the previous value from the databus.
  95. *
  96. * Therefore we do two reads. The first time we write 0 to the
  97. * (read-only) register before reading and the second time we write
  98. * 0xff first. If the two reads do not match or they read back as 0xff
  99. * or 0x00 then we have version 1 hardware.
  100. */
  101. static u8 viper_hw_version(void)
  102. {
  103. u8 v1, v2;
  104. unsigned long flags;
  105. local_irq_save(flags);
  106. VIPER_VERSION = 0;
  107. v1 = VIPER_VERSION;
  108. VIPER_VERSION = 0xff;
  109. v2 = VIPER_VERSION;
  110. v1 = (v1 != v2 || v1 == 0xff) ? 0 : v1;
  111. local_irq_restore(flags);
  112. return v1;
  113. }
  114. /* CPU sysdev */
  115. static int viper_cpu_suspend(struct sys_device *sysdev, pm_message_t state)
  116. {
  117. viper_icr_set_bit(VIPER_ICR_R_DIS);
  118. return 0;
  119. }
  120. static int viper_cpu_resume(struct sys_device *sysdev)
  121. {
  122. viper_icr_clear_bit(VIPER_ICR_R_DIS);
  123. return 0;
  124. }
  125. static struct sysdev_driver viper_cpu_sysdev_driver = {
  126. .suspend = viper_cpu_suspend,
  127. .resume = viper_cpu_resume,
  128. };
  129. static unsigned int current_voltage_divisor;
  130. /*
  131. * If force is not true then step from existing to new divisor. If
  132. * force is true then jump straight to the new divisor. Stepping is
  133. * used because if the jump in voltage is too large, the VCC can dip
  134. * too low and the regulator cuts out.
  135. *
  136. * force can be used to initialize the divisor to a know state by
  137. * setting the value for the current clock speed, since we are already
  138. * running at that speed we know the voltage should be pretty close so
  139. * the jump won't be too large
  140. */
  141. static void viper_set_core_cpu_voltage(unsigned long khz, int force)
  142. {
  143. int i = 0;
  144. unsigned int divisor = 0;
  145. const char *v;
  146. if (khz < 200000) {
  147. v = "1.0"; divisor = 0xfff;
  148. } else if (khz < 300000) {
  149. v = "1.1"; divisor = 0xde5;
  150. } else {
  151. v = "1.3"; divisor = 0x325;
  152. }
  153. pr_debug("viper: setting CPU core voltage to %sV at %d.%03dMHz\n",
  154. v, (int)khz / 1000, (int)khz % 1000);
  155. #define STEP 0x100
  156. do {
  157. int step;
  158. if (force)
  159. step = divisor;
  160. else if (current_voltage_divisor < divisor - STEP)
  161. step = current_voltage_divisor + STEP;
  162. else if (current_voltage_divisor > divisor + STEP)
  163. step = current_voltage_divisor - STEP;
  164. else
  165. step = divisor;
  166. force = 0;
  167. gpio_set_value(VIPER_PSU_CLK_GPIO, 0);
  168. gpio_set_value(VIPER_PSU_nCS_LD_GPIO, 0);
  169. for (i = 1 << 11 ; i > 0 ; i >>= 1) {
  170. udelay(1);
  171. gpio_set_value(VIPER_PSU_DATA_GPIO, step & i);
  172. udelay(1);
  173. gpio_set_value(VIPER_PSU_CLK_GPIO, 1);
  174. udelay(1);
  175. gpio_set_value(VIPER_PSU_CLK_GPIO, 0);
  176. }
  177. udelay(1);
  178. gpio_set_value(VIPER_PSU_nCS_LD_GPIO, 1);
  179. udelay(1);
  180. gpio_set_value(VIPER_PSU_nCS_LD_GPIO, 0);
  181. current_voltage_divisor = step;
  182. } while (current_voltage_divisor != divisor);
  183. }
  184. /* Interrupt handling */
  185. static unsigned long viper_irq_enabled_mask;
  186. static const int viper_isa_irqs[] = { 3, 4, 5, 6, 7, 10, 11, 12, 9, 14, 15 };
  187. static const int viper_isa_irq_map[] = {
  188. 0, /* ISA irq #0, invalid */
  189. 0, /* ISA irq #1, invalid */
  190. 0, /* ISA irq #2, invalid */
  191. 1 << 0, /* ISA irq #3 */
  192. 1 << 1, /* ISA irq #4 */
  193. 1 << 2, /* ISA irq #5 */
  194. 1 << 3, /* ISA irq #6 */
  195. 1 << 4, /* ISA irq #7 */
  196. 0, /* ISA irq #8, invalid */
  197. 1 << 8, /* ISA irq #9 */
  198. 1 << 5, /* ISA irq #10 */
  199. 1 << 6, /* ISA irq #11 */
  200. 1 << 7, /* ISA irq #12 */
  201. 0, /* ISA irq #13, invalid */
  202. 1 << 9, /* ISA irq #14 */
  203. 1 << 10, /* ISA irq #15 */
  204. };
  205. static inline int viper_irq_to_bitmask(unsigned int irq)
  206. {
  207. return viper_isa_irq_map[irq - PXA_ISA_IRQ(0)];
  208. }
  209. static inline int viper_bit_to_irq(int bit)
  210. {
  211. return viper_isa_irqs[bit] + PXA_ISA_IRQ(0);
  212. }
  213. static void viper_ack_irq(unsigned int irq)
  214. {
  215. int viper_irq = viper_irq_to_bitmask(irq);
  216. if (viper_irq & 0xff)
  217. VIPER_LO_IRQ_STATUS = viper_irq;
  218. else
  219. VIPER_HI_IRQ_STATUS = (viper_irq >> 8);
  220. }
  221. static void viper_mask_irq(unsigned int irq)
  222. {
  223. viper_irq_enabled_mask &= ~(viper_irq_to_bitmask(irq));
  224. }
  225. static void viper_unmask_irq(unsigned int irq)
  226. {
  227. viper_irq_enabled_mask |= viper_irq_to_bitmask(irq);
  228. }
  229. static inline unsigned long viper_irq_pending(void)
  230. {
  231. return (VIPER_HI_IRQ_STATUS << 8 | VIPER_LO_IRQ_STATUS) &
  232. viper_irq_enabled_mask;
  233. }
  234. static void viper_irq_handler(unsigned int irq, struct irq_desc *desc)
  235. {
  236. unsigned long pending;
  237. pending = viper_irq_pending();
  238. do {
  239. /* we're in a chained irq handler,
  240. * so ack the interrupt by hand */
  241. desc->chip->ack(irq);
  242. if (likely(pending)) {
  243. irq = viper_bit_to_irq(__ffs(pending));
  244. generic_handle_irq(irq);
  245. }
  246. pending = viper_irq_pending();
  247. } while (pending);
  248. }
  249. static struct irq_chip viper_irq_chip = {
  250. .name = "ISA",
  251. .ack = viper_ack_irq,
  252. .mask = viper_mask_irq,
  253. .unmask = viper_unmask_irq
  254. };
  255. static void __init viper_init_irq(void)
  256. {
  257. int level;
  258. int isa_irq;
  259. pxa25x_init_irq();
  260. /* setup ISA IRQs */
  261. for (level = 0; level < ARRAY_SIZE(viper_isa_irqs); level++) {
  262. isa_irq = viper_bit_to_irq(level);
  263. set_irq_chip(isa_irq, &viper_irq_chip);
  264. set_irq_handler(isa_irq, handle_edge_irq);
  265. set_irq_flags(isa_irq, IRQF_VALID | IRQF_PROBE);
  266. }
  267. set_irq_chained_handler(gpio_to_irq(VIPER_CPLD_GPIO),
  268. viper_irq_handler);
  269. set_irq_type(gpio_to_irq(VIPER_CPLD_GPIO), IRQ_TYPE_EDGE_BOTH);
  270. }
  271. /* Flat Panel */
  272. static struct pxafb_mode_info fb_mode_info[] = {
  273. {
  274. .pixclock = 157500,
  275. .xres = 320,
  276. .yres = 240,
  277. .bpp = 16,
  278. .hsync_len = 63,
  279. .left_margin = 7,
  280. .right_margin = 13,
  281. .vsync_len = 20,
  282. .upper_margin = 0,
  283. .lower_margin = 0,
  284. .sync = 0,
  285. },
  286. };
  287. static struct pxafb_mach_info fb_info = {
  288. .modes = fb_mode_info,
  289. .num_modes = 1,
  290. .lcd_conn = LCD_COLOR_TFT_16BPP | LCD_PCLK_EDGE_FALL,
  291. };
  292. static int viper_backlight_init(struct device *dev)
  293. {
  294. int ret;
  295. /* GPIO9 and 10 control FB backlight. Initialise to off */
  296. ret = gpio_request(VIPER_BCKLIGHT_EN_GPIO, "Backlight");
  297. if (ret)
  298. goto err_request_bckl;
  299. ret = gpio_request(VIPER_LCD_EN_GPIO, "LCD");
  300. if (ret)
  301. goto err_request_lcd;
  302. ret = gpio_direction_output(VIPER_BCKLIGHT_EN_GPIO, 0);
  303. if (ret)
  304. goto err_dir;
  305. ret = gpio_direction_output(VIPER_LCD_EN_GPIO, 0);
  306. if (ret)
  307. goto err_dir;
  308. return 0;
  309. err_dir:
  310. gpio_free(VIPER_LCD_EN_GPIO);
  311. err_request_lcd:
  312. gpio_free(VIPER_BCKLIGHT_EN_GPIO);
  313. err_request_bckl:
  314. dev_err(dev, "Failed to setup LCD GPIOs\n");
  315. return ret;
  316. }
  317. static int viper_backlight_notify(struct device *dev, int brightness)
  318. {
  319. gpio_set_value(VIPER_LCD_EN_GPIO, !!brightness);
  320. gpio_set_value(VIPER_BCKLIGHT_EN_GPIO, !!brightness);
  321. return brightness;
  322. }
  323. static void viper_backlight_exit(struct device *dev)
  324. {
  325. gpio_free(VIPER_LCD_EN_GPIO);
  326. gpio_free(VIPER_BCKLIGHT_EN_GPIO);
  327. }
  328. static struct platform_pwm_backlight_data viper_backlight_data = {
  329. .pwm_id = 0,
  330. .max_brightness = 100,
  331. .dft_brightness = 100,
  332. .pwm_period_ns = 1000000,
  333. .init = viper_backlight_init,
  334. .notify = viper_backlight_notify,
  335. .exit = viper_backlight_exit,
  336. };
  337. static struct platform_device viper_backlight_device = {
  338. .name = "pwm-backlight",
  339. .dev = {
  340. .parent = &pxa25x_device_pwm0.dev,
  341. .platform_data = &viper_backlight_data,
  342. },
  343. };
  344. /* Ethernet */
  345. static struct resource smc91x_resources[] = {
  346. [0] = {
  347. .name = "smc91x-regs",
  348. .start = VIPER_ETH_PHYS + 0x300,
  349. .end = VIPER_ETH_PHYS + 0x30f,
  350. .flags = IORESOURCE_MEM,
  351. },
  352. [1] = {
  353. .start = gpio_to_irq(VIPER_ETH_GPIO),
  354. .end = gpio_to_irq(VIPER_ETH_GPIO),
  355. .flags = IORESOURCE_IRQ | IORESOURCE_IRQ_HIGHEDGE,
  356. },
  357. [2] = {
  358. .name = "smc91x-data32",
  359. .start = VIPER_ETH_DATA_PHYS,
  360. .end = VIPER_ETH_DATA_PHYS + 3,
  361. .flags = IORESOURCE_MEM,
  362. },
  363. };
  364. static struct smc91x_platdata viper_smc91x_info = {
  365. .flags = SMC91X_USE_16BIT | SMC91X_NOWAIT,
  366. .leda = RPC_LED_100_10,
  367. .ledb = RPC_LED_TX_RX,
  368. };
  369. static struct platform_device smc91x_device = {
  370. .name = "smc91x",
  371. .id = -1,
  372. .num_resources = ARRAY_SIZE(smc91x_resources),
  373. .resource = smc91x_resources,
  374. .dev = {
  375. .platform_data = &viper_smc91x_info,
  376. },
  377. };
  378. /* i2c */
  379. static struct i2c_gpio_platform_data i2c_bus_data = {
  380. .sda_pin = VIPER_RTC_I2C_SDA_GPIO,
  381. .scl_pin = VIPER_RTC_I2C_SCL_GPIO,
  382. .udelay = 10,
  383. .timeout = 100,
  384. };
  385. static struct platform_device i2c_bus_device = {
  386. .name = "i2c-gpio",
  387. .id = 1, /* pxa2xx-i2c is bus 0, so start at 1 */
  388. .dev = {
  389. .platform_data = &i2c_bus_data,
  390. }
  391. };
  392. static struct i2c_board_info __initdata viper_i2c_devices[] = {
  393. {
  394. I2C_BOARD_INFO("ds1338", 0x68),
  395. },
  396. };
  397. /*
  398. * Serial configuration:
  399. * You can either have the standard PXA ports driven by the PXA driver,
  400. * or all the ports (PXA + 16850) driven by the 8250 driver.
  401. * Choose your poison.
  402. */
  403. static struct resource viper_serial_resources[] = {
  404. #ifndef CONFIG_SERIAL_PXA
  405. {
  406. .start = 0x40100000,
  407. .end = 0x4010001f,
  408. .flags = IORESOURCE_MEM,
  409. },
  410. {
  411. .start = 0x40200000,
  412. .end = 0x4020001f,
  413. .flags = IORESOURCE_MEM,
  414. },
  415. {
  416. .start = 0x40700000,
  417. .end = 0x4070001f,
  418. .flags = IORESOURCE_MEM,
  419. },
  420. {
  421. .start = VIPER_UARTA_PHYS,
  422. .end = VIPER_UARTA_PHYS + 0xf,
  423. .flags = IORESOURCE_MEM,
  424. },
  425. {
  426. .start = VIPER_UARTB_PHYS,
  427. .end = VIPER_UARTB_PHYS + 0xf,
  428. .flags = IORESOURCE_MEM,
  429. },
  430. #else
  431. {
  432. 0,
  433. },
  434. #endif
  435. };
  436. static struct plat_serial8250_port serial_platform_data[] = {
  437. #ifndef CONFIG_SERIAL_PXA
  438. /* Internal UARTs */
  439. {
  440. .membase = (void *)&FFUART,
  441. .mapbase = __PREG(FFUART),
  442. .irq = IRQ_FFUART,
  443. .uartclk = 921600 * 16,
  444. .regshift = 2,
  445. .flags = UPF_BOOT_AUTOCONF | UPF_SKIP_TEST,
  446. .iotype = UPIO_MEM,
  447. },
  448. {
  449. .membase = (void *)&BTUART,
  450. .mapbase = __PREG(BTUART),
  451. .irq = IRQ_BTUART,
  452. .uartclk = 921600 * 16,
  453. .regshift = 2,
  454. .flags = UPF_BOOT_AUTOCONF | UPF_SKIP_TEST,
  455. .iotype = UPIO_MEM,
  456. },
  457. {
  458. .membase = (void *)&STUART,
  459. .mapbase = __PREG(STUART),
  460. .irq = IRQ_STUART,
  461. .uartclk = 921600 * 16,
  462. .regshift = 2,
  463. .flags = UPF_BOOT_AUTOCONF | UPF_SKIP_TEST,
  464. .iotype = UPIO_MEM,
  465. },
  466. /* External UARTs */
  467. {
  468. .mapbase = VIPER_UARTA_PHYS,
  469. .irq = gpio_to_irq(VIPER_UARTA_GPIO),
  470. .irqflags = IRQF_TRIGGER_RISING,
  471. .uartclk = 1843200,
  472. .regshift = 1,
  473. .iotype = UPIO_MEM,
  474. .flags = UPF_BOOT_AUTOCONF | UPF_IOREMAP |
  475. UPF_SKIP_TEST,
  476. },
  477. {
  478. .mapbase = VIPER_UARTB_PHYS,
  479. .irq = gpio_to_irq(VIPER_UARTB_GPIO),
  480. .irqflags = IRQF_TRIGGER_RISING,
  481. .uartclk = 1843200,
  482. .regshift = 1,
  483. .iotype = UPIO_MEM,
  484. .flags = UPF_BOOT_AUTOCONF | UPF_IOREMAP |
  485. UPF_SKIP_TEST,
  486. },
  487. #endif
  488. { },
  489. };
  490. static struct platform_device serial_device = {
  491. .name = "serial8250",
  492. .id = 0,
  493. .dev = {
  494. .platform_data = serial_platform_data,
  495. },
  496. .num_resources = ARRAY_SIZE(viper_serial_resources),
  497. .resource = viper_serial_resources,
  498. };
  499. /* USB */
  500. static void isp116x_delay(struct device *dev, int delay)
  501. {
  502. ndelay(delay);
  503. }
  504. static struct resource isp116x_resources[] = {
  505. [0] = { /* DATA */
  506. .start = VIPER_USB_PHYS + 0,
  507. .end = VIPER_USB_PHYS + 1,
  508. .flags = IORESOURCE_MEM,
  509. },
  510. [1] = { /* ADDR */
  511. .start = VIPER_USB_PHYS + 2,
  512. .end = VIPER_USB_PHYS + 3,
  513. .flags = IORESOURCE_MEM,
  514. },
  515. [2] = {
  516. .start = gpio_to_irq(VIPER_USB_GPIO),
  517. .end = gpio_to_irq(VIPER_USB_GPIO),
  518. .flags = IORESOURCE_IRQ | IORESOURCE_IRQ_HIGHEDGE,
  519. },
  520. };
  521. /* (DataBusWidth16|AnalogOCEnable|DREQOutputPolarity|DownstreamPort15KRSel ) */
  522. static struct isp116x_platform_data isp116x_platform_data = {
  523. /* Enable internal resistors on downstream ports */
  524. .sel15Kres = 1,
  525. /* On-chip overcurrent protection */
  526. .oc_enable = 1,
  527. /* INT output polarity */
  528. .int_act_high = 1,
  529. /* INT edge or level triggered */
  530. .int_edge_triggered = 0,
  531. /* WAKEUP pin connected - NOT SUPPORTED */
  532. /* .remote_wakeup_connected = 0, */
  533. /* Wakeup by devices on usb bus enabled */
  534. .remote_wakeup_enable = 0,
  535. .delay = isp116x_delay,
  536. };
  537. static struct platform_device isp116x_device = {
  538. .name = "isp116x-hcd",
  539. .id = -1,
  540. .num_resources = ARRAY_SIZE(isp116x_resources),
  541. .resource = isp116x_resources,
  542. .dev = {
  543. .platform_data = &isp116x_platform_data,
  544. },
  545. };
  546. /* MTD */
  547. static struct resource mtd_resources[] = {
  548. [0] = { /* RedBoot config + filesystem flash */
  549. .start = VIPER_FLASH_PHYS,
  550. .end = VIPER_FLASH_PHYS + SZ_32M - 1,
  551. .flags = IORESOURCE_MEM,
  552. },
  553. [1] = { /* Boot flash */
  554. .start = VIPER_BOOT_PHYS,
  555. .end = VIPER_BOOT_PHYS + SZ_1M - 1,
  556. .flags = IORESOURCE_MEM,
  557. },
  558. [2] = { /*
  559. * SRAM size is actually 256KB, 8bits, with a sparse mapping
  560. * (each byte is on a 16bit boundary).
  561. */
  562. .start = _VIPER_SRAM_BASE,
  563. .end = _VIPER_SRAM_BASE + SZ_512K - 1,
  564. .flags = IORESOURCE_MEM,
  565. },
  566. };
  567. static struct mtd_partition viper_boot_flash_partition = {
  568. .name = "RedBoot",
  569. .size = SZ_1M,
  570. .offset = 0,
  571. .mask_flags = MTD_WRITEABLE, /* force R/O */
  572. };
  573. static struct physmap_flash_data viper_flash_data[] = {
  574. [0] = {
  575. .width = 2,
  576. .parts = NULL,
  577. .nr_parts = 0,
  578. },
  579. [1] = {
  580. .width = 2,
  581. .parts = &viper_boot_flash_partition,
  582. .nr_parts = 1,
  583. },
  584. };
  585. static struct platform_device viper_mtd_devices[] = {
  586. [0] = {
  587. .name = "physmap-flash",
  588. .id = 0,
  589. .dev = {
  590. .platform_data = &viper_flash_data[0],
  591. },
  592. .resource = &mtd_resources[0],
  593. .num_resources = 1,
  594. },
  595. [1] = {
  596. .name = "physmap-flash",
  597. .id = 1,
  598. .dev = {
  599. .platform_data = &viper_flash_data[1],
  600. },
  601. .resource = &mtd_resources[1],
  602. .num_resources = 1,
  603. },
  604. };
  605. static struct platform_device *viper_devs[] __initdata = {
  606. &smc91x_device,
  607. &i2c_bus_device,
  608. &serial_device,
  609. &isp116x_device,
  610. &viper_mtd_devices[0],
  611. &viper_mtd_devices[1],
  612. &viper_backlight_device,
  613. &viper_pcmcia_device,
  614. };
  615. static mfp_cfg_t viper_pin_config[] __initdata = {
  616. /* Chip selects */
  617. GPIO15_nCS_1,
  618. GPIO78_nCS_2,
  619. GPIO79_nCS_3,
  620. GPIO80_nCS_4,
  621. GPIO33_nCS_5,
  622. /* AC97 */
  623. GPIO28_AC97_BITCLK,
  624. GPIO29_AC97_SDATA_IN_0,
  625. GPIO30_AC97_SDATA_OUT,
  626. GPIO31_AC97_SYNC,
  627. /* FP Backlight */
  628. GPIO9_GPIO, /* VIPER_BCKLIGHT_EN_GPIO */
  629. GPIO10_GPIO, /* VIPER_LCD_EN_GPIO */
  630. GPIO16_PWM0_OUT,
  631. /* Ethernet PHY Ready */
  632. GPIO18_RDY,
  633. /* Serial shutdown */
  634. GPIO12_GPIO | MFP_LPM_DRIVE_HIGH, /* VIPER_UART_SHDN_GPIO */
  635. /* Compact-Flash / PC104 */
  636. GPIO48_nPOE,
  637. GPIO49_nPWE,
  638. GPIO50_nPIOR,
  639. GPIO51_nPIOW,
  640. GPIO52_nPCE_1,
  641. GPIO53_nPCE_2,
  642. GPIO54_nPSKTSEL,
  643. GPIO55_nPREG,
  644. GPIO56_nPWAIT,
  645. GPIO57_nIOIS16,
  646. GPIO8_GPIO, /* VIPER_CF_RDY_GPIO */
  647. GPIO32_GPIO, /* VIPER_CF_CD_GPIO */
  648. GPIO82_GPIO, /* VIPER_CF_POWER_GPIO */
  649. /* Integrated UPS control */
  650. GPIO20_GPIO, /* VIPER_UPS_GPIO */
  651. /* Vcc regulator control */
  652. GPIO6_GPIO, /* VIPER_PSU_DATA_GPIO */
  653. GPIO11_GPIO, /* VIPER_PSU_CLK_GPIO */
  654. GPIO19_GPIO, /* VIPER_PSU_nCS_LD_GPIO */
  655. /* i2c busses */
  656. GPIO26_GPIO, /* VIPER_TPM_I2C_SDA_GPIO */
  657. GPIO27_GPIO, /* VIPER_TPM_I2C_SCL_GPIO */
  658. GPIO83_GPIO, /* VIPER_RTC_I2C_SDA_GPIO */
  659. GPIO84_GPIO, /* VIPER_RTC_I2C_SCL_GPIO */
  660. /* PC/104 Interrupt */
  661. GPIO1_GPIO | WAKEUP_ON_EDGE_RISE, /* VIPER_CPLD_GPIO */
  662. };
  663. static unsigned long viper_tpm;
  664. static int __init viper_tpm_setup(char *str)
  665. {
  666. strict_strtoul(str, 10, &viper_tpm);
  667. return 1;
  668. }
  669. __setup("tpm=", viper_tpm_setup);
  670. static void __init viper_tpm_init(void)
  671. {
  672. struct platform_device *tpm_device;
  673. struct i2c_gpio_platform_data i2c_tpm_data = {
  674. .sda_pin = VIPER_TPM_I2C_SDA_GPIO,
  675. .scl_pin = VIPER_TPM_I2C_SCL_GPIO,
  676. .udelay = 10,
  677. .timeout = 100,
  678. };
  679. char *errstr;
  680. /* Allocate TPM i2c bus if requested */
  681. if (!viper_tpm)
  682. return;
  683. tpm_device = platform_device_alloc("i2c-gpio", 2);
  684. if (tpm_device) {
  685. if (!platform_device_add_data(tpm_device,
  686. &i2c_tpm_data,
  687. sizeof(i2c_tpm_data))) {
  688. if (platform_device_add(tpm_device)) {
  689. errstr = "register TPM i2c bus";
  690. goto error_free_tpm;
  691. }
  692. } else {
  693. errstr = "allocate TPM i2c bus data";
  694. goto error_free_tpm;
  695. }
  696. } else {
  697. errstr = "allocate TPM i2c device";
  698. goto error_tpm;
  699. }
  700. return;
  701. error_free_tpm:
  702. kfree(tpm_device);
  703. error_tpm:
  704. pr_err("viper: Couldn't %s, giving up\n", errstr);
  705. }
  706. static void __init viper_init_vcore_gpios(void)
  707. {
  708. if (gpio_request(VIPER_PSU_DATA_GPIO, "PSU data"))
  709. goto err_request_data;
  710. if (gpio_request(VIPER_PSU_CLK_GPIO, "PSU clock"))
  711. goto err_request_clk;
  712. if (gpio_request(VIPER_PSU_nCS_LD_GPIO, "PSU cs"))
  713. goto err_request_cs;
  714. if (gpio_direction_output(VIPER_PSU_DATA_GPIO, 0) ||
  715. gpio_direction_output(VIPER_PSU_CLK_GPIO, 0) ||
  716. gpio_direction_output(VIPER_PSU_nCS_LD_GPIO, 0))
  717. goto err_dir;
  718. /* c/should assume redboot set the correct level ??? */
  719. viper_set_core_cpu_voltage(get_clk_frequency_khz(0), 1);
  720. return;
  721. err_dir:
  722. gpio_free(VIPER_PSU_nCS_LD_GPIO);
  723. err_request_cs:
  724. gpio_free(VIPER_PSU_CLK_GPIO);
  725. err_request_clk:
  726. gpio_free(VIPER_PSU_DATA_GPIO);
  727. err_request_data:
  728. pr_err("viper: Failed to setup vcore control GPIOs\n");
  729. }
  730. static void __init viper_init_serial_gpio(void)
  731. {
  732. if (gpio_request(VIPER_UART_SHDN_GPIO, "UARTs shutdown"))
  733. goto err_request;
  734. if (gpio_direction_output(VIPER_UART_SHDN_GPIO, 0))
  735. goto err_dir;
  736. return;
  737. err_dir:
  738. gpio_free(VIPER_UART_SHDN_GPIO);
  739. err_request:
  740. pr_err("viper: Failed to setup UART shutdown GPIO\n");
  741. }
  742. #ifdef CONFIG_CPU_FREQ
  743. static int viper_cpufreq_notifier(struct notifier_block *nb,
  744. unsigned long val, void *data)
  745. {
  746. struct cpufreq_freqs *freq = data;
  747. /* TODO: Adjust timings??? */
  748. switch (val) {
  749. case CPUFREQ_PRECHANGE:
  750. if (freq->old < freq->new) {
  751. /* we are getting faster so raise the voltage
  752. * before we change freq */
  753. viper_set_core_cpu_voltage(freq->new, 0);
  754. }
  755. break;
  756. case CPUFREQ_POSTCHANGE:
  757. if (freq->old > freq->new) {
  758. /* we are slowing down so drop the power
  759. * after we change freq */
  760. viper_set_core_cpu_voltage(freq->new, 0);
  761. }
  762. break;
  763. case CPUFREQ_RESUMECHANGE:
  764. viper_set_core_cpu_voltage(freq->new, 0);
  765. break;
  766. default:
  767. /* ignore */
  768. break;
  769. }
  770. return 0;
  771. }
  772. static struct notifier_block viper_cpufreq_notifier_block = {
  773. .notifier_call = viper_cpufreq_notifier
  774. };
  775. static void __init viper_init_cpufreq(void)
  776. {
  777. if (cpufreq_register_notifier(&viper_cpufreq_notifier_block,
  778. CPUFREQ_TRANSITION_NOTIFIER))
  779. pr_err("viper: Failed to setup cpufreq notifier\n");
  780. }
  781. #else
  782. static inline void viper_init_cpufreq(void) {}
  783. #endif
  784. static void viper_power_off(void)
  785. {
  786. pr_notice("Shutting off UPS\n");
  787. gpio_set_value(VIPER_UPS_GPIO, 1);
  788. /* Spin to death... */
  789. while (1);
  790. }
  791. static void __init viper_init(void)
  792. {
  793. u8 version;
  794. pm_power_off = viper_power_off;
  795. pxa2xx_mfp_config(ARRAY_AND_SIZE(viper_pin_config));
  796. pxa_set_ffuart_info(NULL);
  797. pxa_set_btuart_info(NULL);
  798. pxa_set_stuart_info(NULL);
  799. /* Wake-up serial console */
  800. viper_init_serial_gpio();
  801. set_pxa_fb_info(&fb_info);
  802. /* v1 hardware cannot use the datacs line */
  803. version = viper_hw_version();
  804. if (version == 0)
  805. smc91x_device.num_resources--;
  806. pxa_set_i2c_info(NULL);
  807. platform_add_devices(viper_devs, ARRAY_SIZE(viper_devs));
  808. viper_init_vcore_gpios();
  809. viper_init_cpufreq();
  810. sysdev_driver_register(&cpu_sysdev_class, &viper_cpu_sysdev_driver);
  811. if (version) {
  812. pr_info("viper: hardware v%di%d detected. "
  813. "CPLD revision %d.\n",
  814. VIPER_BOARD_VERSION(version),
  815. VIPER_BOARD_ISSUE(version),
  816. VIPER_CPLD_REVISION(version));
  817. system_rev = (VIPER_BOARD_VERSION(version) << 8) |
  818. (VIPER_BOARD_ISSUE(version) << 4) |
  819. VIPER_CPLD_REVISION(version);
  820. } else {
  821. pr_info("viper: No version register.\n");
  822. }
  823. i2c_register_board_info(1, ARRAY_AND_SIZE(viper_i2c_devices));
  824. viper_tpm_init();
  825. pxa_set_ac97_info(NULL);
  826. }
  827. static struct map_desc viper_io_desc[] __initdata = {
  828. {
  829. .virtual = VIPER_CPLD_BASE,
  830. .pfn = __phys_to_pfn(VIPER_CPLD_PHYS),
  831. .length = 0x00300000,
  832. .type = MT_DEVICE,
  833. },
  834. {
  835. .virtual = VIPER_PC104IO_BASE,
  836. .pfn = __phys_to_pfn(0x30000000),
  837. .length = 0x00800000,
  838. .type = MT_DEVICE,
  839. },
  840. };
  841. static void __init viper_map_io(void)
  842. {
  843. pxa_map_io();
  844. iotable_init(viper_io_desc, ARRAY_SIZE(viper_io_desc));
  845. PCFR |= PCFR_OPDE;
  846. }
  847. MACHINE_START(VIPER, "Arcom/Eurotech VIPER SBC")
  848. /* Maintainer: Marc Zyngier <maz@misterjones.org> */
  849. .phys_io = 0x40000000,
  850. .io_pg_offst = (io_p2v(0x40000000) >> 18) & 0xfffc,
  851. .boot_params = 0xa0000100,
  852. .map_io = viper_map_io,
  853. .init_irq = viper_init_irq,
  854. .timer = &pxa_timer,
  855. .init_machine = viper_init,
  856. MACHINE_END