board-cm-t35.c 22 KB

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  1. /*
  2. * board-cm-t35.c (CompuLab CM-T35 module)
  3. *
  4. * Copyright (C) 2009 CompuLab, Ltd.
  5. * Author: Mike Rapoport <mike@compulab.co.il>
  6. *
  7. * This program is free software; you can redistribute it and/or
  8. * modify it under the terms of the GNU General Public License
  9. * version 2 as published by the Free Software Foundation.
  10. *
  11. * This program is distributed in the hope that it will be useful, but
  12. * WITHOUT ANY WARRANTY; without even the implied warranty of
  13. * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU
  14. * General Public License for more details.
  15. *
  16. * You should have received a copy of the GNU General Public License
  17. * along with this program; if not, write to the Free Software
  18. * Foundation, Inc., 51 Franklin St, Fifth Floor, Boston, MA
  19. * 02110-1301 USA
  20. *
  21. */
  22. #include <linux/kernel.h>
  23. #include <linux/init.h>
  24. #include <linux/platform_device.h>
  25. #include <linux/input.h>
  26. #include <linux/input/matrix_keypad.h>
  27. #include <linux/delay.h>
  28. #include <linux/gpio.h>
  29. #include <linux/i2c/at24.h>
  30. #include <linux/i2c/twl.h>
  31. #include <linux/regulator/machine.h>
  32. #include <linux/spi/spi.h>
  33. #include <linux/spi/tdo24m.h>
  34. #include <asm/mach-types.h>
  35. #include <asm/mach/arch.h>
  36. #include <asm/mach/map.h>
  37. #include <plat/board.h>
  38. #include <plat/common.h>
  39. #include <plat/nand.h>
  40. #include <plat/gpmc.h>
  41. #include <plat/usb.h>
  42. #include <plat/display.h>
  43. #include <mach/hardware.h>
  44. #include "mux.h"
  45. #include "sdram-micron-mt46h32m32lf-6.h"
  46. #include "hsmmc.h"
  47. #define CM_T35_GPIO_PENDOWN 57
  48. #define CM_T35_SMSC911X_CS 5
  49. #define CM_T35_SMSC911X_GPIO 163
  50. #define SB_T35_SMSC911X_CS 4
  51. #define SB_T35_SMSC911X_GPIO 65
  52. #define NAND_BLOCK_SIZE SZ_128K
  53. #define GPMC_CS0_BASE 0x60
  54. #define GPMC_CS0_BASE_ADDR (OMAP34XX_GPMC_VIRT + GPMC_CS0_BASE)
  55. #if defined(CONFIG_SMSC911X) || defined(CONFIG_SMSC911X_MODULE)
  56. #include <linux/smsc911x.h>
  57. static struct smsc911x_platform_config cm_t35_smsc911x_config = {
  58. .irq_polarity = SMSC911X_IRQ_POLARITY_ACTIVE_LOW,
  59. .irq_type = SMSC911X_IRQ_TYPE_OPEN_DRAIN,
  60. .flags = SMSC911X_USE_32BIT | SMSC911X_SAVE_MAC_ADDRESS,
  61. .phy_interface = PHY_INTERFACE_MODE_MII,
  62. };
  63. static struct resource cm_t35_smsc911x_resources[] = {
  64. {
  65. .flags = IORESOURCE_MEM,
  66. },
  67. {
  68. .start = OMAP_GPIO_IRQ(CM_T35_SMSC911X_GPIO),
  69. .end = OMAP_GPIO_IRQ(CM_T35_SMSC911X_GPIO),
  70. .flags = IORESOURCE_IRQ | IORESOURCE_IRQ_LOWLEVEL,
  71. },
  72. };
  73. static struct platform_device cm_t35_smsc911x_device = {
  74. .name = "smsc911x",
  75. .id = 0,
  76. .num_resources = ARRAY_SIZE(cm_t35_smsc911x_resources),
  77. .resource = cm_t35_smsc911x_resources,
  78. .dev = {
  79. .platform_data = &cm_t35_smsc911x_config,
  80. },
  81. };
  82. static struct resource sb_t35_smsc911x_resources[] = {
  83. {
  84. .flags = IORESOURCE_MEM,
  85. },
  86. {
  87. .start = OMAP_GPIO_IRQ(SB_T35_SMSC911X_GPIO),
  88. .end = OMAP_GPIO_IRQ(SB_T35_SMSC911X_GPIO),
  89. .flags = IORESOURCE_IRQ | IORESOURCE_IRQ_LOWLEVEL,
  90. },
  91. };
  92. static struct platform_device sb_t35_smsc911x_device = {
  93. .name = "smsc911x",
  94. .id = 1,
  95. .num_resources = ARRAY_SIZE(sb_t35_smsc911x_resources),
  96. .resource = sb_t35_smsc911x_resources,
  97. .dev = {
  98. .platform_data = &cm_t35_smsc911x_config,
  99. },
  100. };
  101. static void __init cm_t35_init_smsc911x(struct platform_device *dev,
  102. int cs, int irq_gpio)
  103. {
  104. unsigned long cs_mem_base;
  105. if (gpmc_cs_request(cs, SZ_16M, &cs_mem_base) < 0) {
  106. pr_err("CM-T35: Failed request for GPMC mem for smsc911x\n");
  107. return;
  108. }
  109. dev->resource[0].start = cs_mem_base + 0x0;
  110. dev->resource[0].end = cs_mem_base + 0xff;
  111. if ((gpio_request(irq_gpio, "ETH IRQ") == 0) &&
  112. (gpio_direction_input(irq_gpio) == 0)) {
  113. gpio_export(irq_gpio, 0);
  114. } else {
  115. pr_err("CM-T35: could not obtain gpio for SMSC911X IRQ\n");
  116. return;
  117. }
  118. platform_device_register(dev);
  119. }
  120. static void __init cm_t35_init_ethernet(void)
  121. {
  122. cm_t35_init_smsc911x(&cm_t35_smsc911x_device,
  123. CM_T35_SMSC911X_CS, CM_T35_SMSC911X_GPIO);
  124. cm_t35_init_smsc911x(&sb_t35_smsc911x_device,
  125. SB_T35_SMSC911X_CS, SB_T35_SMSC911X_GPIO);
  126. }
  127. #else
  128. static inline void __init cm_t35_init_ethernet(void) { return; }
  129. #endif
  130. #if defined(CONFIG_LEDS_GPIO) || defined(CONFIG_LEDS_GPIO_MODULE)
  131. #include <linux/leds.h>
  132. static struct gpio_led cm_t35_leds[] = {
  133. [0] = {
  134. .gpio = 186,
  135. .name = "cm-t35:green",
  136. .default_trigger = "heartbeat",
  137. .active_low = 0,
  138. },
  139. };
  140. static struct gpio_led_platform_data cm_t35_led_pdata = {
  141. .num_leds = ARRAY_SIZE(cm_t35_leds),
  142. .leds = cm_t35_leds,
  143. };
  144. static struct platform_device cm_t35_led_device = {
  145. .name = "leds-gpio",
  146. .id = -1,
  147. .dev = {
  148. .platform_data = &cm_t35_led_pdata,
  149. },
  150. };
  151. static void __init cm_t35_init_led(void)
  152. {
  153. platform_device_register(&cm_t35_led_device);
  154. }
  155. #else
  156. static inline void cm_t35_init_led(void) {}
  157. #endif
  158. #if defined(CONFIG_MTD_NAND_OMAP2) || defined(CONFIG_MTD_NAND_OMAP2_MODULE)
  159. #include <linux/mtd/mtd.h>
  160. #include <linux/mtd/nand.h>
  161. #include <linux/mtd/partitions.h>
  162. static struct mtd_partition cm_t35_nand_partitions[] = {
  163. {
  164. .name = "xloader",
  165. .offset = 0, /* Offset = 0x00000 */
  166. .size = 4 * NAND_BLOCK_SIZE,
  167. .mask_flags = MTD_WRITEABLE
  168. },
  169. {
  170. .name = "uboot",
  171. .offset = MTDPART_OFS_APPEND, /* Offset = 0x80000 */
  172. .size = 15 * NAND_BLOCK_SIZE,
  173. },
  174. {
  175. .name = "uboot environment",
  176. .offset = MTDPART_OFS_APPEND, /* Offset = 0x260000 */
  177. .size = 2 * NAND_BLOCK_SIZE,
  178. },
  179. {
  180. .name = "linux",
  181. .offset = MTDPART_OFS_APPEND, /* Offset = 0x280000 */
  182. .size = 32 * NAND_BLOCK_SIZE,
  183. },
  184. {
  185. .name = "rootfs",
  186. .offset = MTDPART_OFS_APPEND, /* Offset = 0x680000 */
  187. .size = MTDPART_SIZ_FULL,
  188. },
  189. };
  190. static struct omap_nand_platform_data cm_t35_nand_data = {
  191. .parts = cm_t35_nand_partitions,
  192. .nr_parts = ARRAY_SIZE(cm_t35_nand_partitions),
  193. .dma_channel = -1, /* disable DMA in OMAP NAND driver */
  194. .cs = 0,
  195. .gpmc_cs_baseaddr = (void __iomem *)GPMC_CS0_BASE_ADDR,
  196. .gpmc_baseaddr = (void __iomem *)OMAP34XX_GPMC_VIRT,
  197. };
  198. static struct resource cm_t35_nand_resource = {
  199. .flags = IORESOURCE_MEM,
  200. };
  201. static struct platform_device cm_t35_nand_device = {
  202. .name = "omap2-nand",
  203. .id = -1,
  204. .num_resources = 1,
  205. .resource = &cm_t35_nand_resource,
  206. .dev = {
  207. .platform_data = &cm_t35_nand_data,
  208. },
  209. };
  210. static void __init cm_t35_init_nand(void)
  211. {
  212. if (platform_device_register(&cm_t35_nand_device) < 0)
  213. pr_err("CM-T35: Unable to register NAND device\n");
  214. }
  215. #else
  216. static inline void cm_t35_init_nand(void) {}
  217. #endif
  218. #if defined(CONFIG_TOUCHSCREEN_ADS7846) || \
  219. defined(CONFIG_TOUCHSCREEN_ADS7846_MODULE)
  220. #include <linux/spi/ads7846.h>
  221. #include <plat/mcspi.h>
  222. static struct omap2_mcspi_device_config ads7846_mcspi_config = {
  223. .turbo_mode = 0,
  224. .single_channel = 1, /* 0: slave, 1: master */
  225. };
  226. static int ads7846_get_pendown_state(void)
  227. {
  228. return !gpio_get_value(CM_T35_GPIO_PENDOWN);
  229. }
  230. static struct ads7846_platform_data ads7846_config = {
  231. .x_max = 0x0fff,
  232. .y_max = 0x0fff,
  233. .x_plate_ohms = 180,
  234. .pressure_max = 255,
  235. .debounce_max = 10,
  236. .debounce_tol = 3,
  237. .debounce_rep = 1,
  238. .get_pendown_state = ads7846_get_pendown_state,
  239. .keep_vref_on = 1,
  240. };
  241. static struct spi_board_info cm_t35_spi_board_info[] __initdata = {
  242. {
  243. .modalias = "ads7846",
  244. .bus_num = 1,
  245. .chip_select = 0,
  246. .max_speed_hz = 1500000,
  247. .controller_data = &ads7846_mcspi_config,
  248. .irq = OMAP_GPIO_IRQ(CM_T35_GPIO_PENDOWN),
  249. .platform_data = &ads7846_config,
  250. },
  251. };
  252. static void __init cm_t35_init_ads7846(void)
  253. {
  254. if ((gpio_request(CM_T35_GPIO_PENDOWN, "ADS7846_PENDOWN") == 0) &&
  255. (gpio_direction_input(CM_T35_GPIO_PENDOWN) == 0)) {
  256. gpio_export(CM_T35_GPIO_PENDOWN, 0);
  257. } else {
  258. pr_err("CM-T35: could not obtain gpio for ADS7846_PENDOWN\n");
  259. return;
  260. }
  261. spi_register_board_info(cm_t35_spi_board_info,
  262. ARRAY_SIZE(cm_t35_spi_board_info));
  263. }
  264. #else
  265. static inline void cm_t35_init_ads7846(void) {}
  266. #endif
  267. #define CM_T35_LCD_EN_GPIO 157
  268. #define CM_T35_LCD_BL_GPIO 58
  269. #define CM_T35_DVI_EN_GPIO 54
  270. static int lcd_bl_gpio;
  271. static int lcd_en_gpio;
  272. static int dvi_en_gpio;
  273. static int lcd_enabled;
  274. static int dvi_enabled;
  275. static int cm_t35_panel_enable_lcd(struct omap_dss_device *dssdev)
  276. {
  277. if (dvi_enabled) {
  278. printk(KERN_ERR "cannot enable LCD, DVI is enabled\n");
  279. return -EINVAL;
  280. }
  281. gpio_set_value(lcd_en_gpio, 1);
  282. gpio_set_value(lcd_bl_gpio, 1);
  283. lcd_enabled = 1;
  284. return 0;
  285. }
  286. static void cm_t35_panel_disable_lcd(struct omap_dss_device *dssdev)
  287. {
  288. lcd_enabled = 0;
  289. gpio_set_value(lcd_bl_gpio, 0);
  290. gpio_set_value(lcd_en_gpio, 0);
  291. }
  292. static int cm_t35_panel_enable_dvi(struct omap_dss_device *dssdev)
  293. {
  294. if (lcd_enabled) {
  295. printk(KERN_ERR "cannot enable DVI, LCD is enabled\n");
  296. return -EINVAL;
  297. }
  298. gpio_set_value(dvi_en_gpio, 0);
  299. dvi_enabled = 1;
  300. return 0;
  301. }
  302. static void cm_t35_panel_disable_dvi(struct omap_dss_device *dssdev)
  303. {
  304. gpio_set_value(dvi_en_gpio, 1);
  305. dvi_enabled = 0;
  306. }
  307. static int cm_t35_panel_enable_tv(struct omap_dss_device *dssdev)
  308. {
  309. return 0;
  310. }
  311. static void cm_t35_panel_disable_tv(struct omap_dss_device *dssdev)
  312. {
  313. }
  314. static struct omap_dss_device cm_t35_lcd_device = {
  315. .name = "lcd",
  316. .driver_name = "toppoly_tdo35s_panel",
  317. .type = OMAP_DISPLAY_TYPE_DPI,
  318. .phy.dpi.data_lines = 18,
  319. .platform_enable = cm_t35_panel_enable_lcd,
  320. .platform_disable = cm_t35_panel_disable_lcd,
  321. };
  322. static struct omap_dss_device cm_t35_dvi_device = {
  323. .name = "dvi",
  324. .driver_name = "generic_panel",
  325. .type = OMAP_DISPLAY_TYPE_DPI,
  326. .phy.dpi.data_lines = 24,
  327. .platform_enable = cm_t35_panel_enable_dvi,
  328. .platform_disable = cm_t35_panel_disable_dvi,
  329. };
  330. static struct omap_dss_device cm_t35_tv_device = {
  331. .name = "tv",
  332. .driver_name = "venc",
  333. .type = OMAP_DISPLAY_TYPE_VENC,
  334. .phy.venc.type = OMAP_DSS_VENC_TYPE_SVIDEO,
  335. .platform_enable = cm_t35_panel_enable_tv,
  336. .platform_disable = cm_t35_panel_disable_tv,
  337. };
  338. static struct omap_dss_device *cm_t35_dss_devices[] = {
  339. &cm_t35_lcd_device,
  340. &cm_t35_dvi_device,
  341. &cm_t35_tv_device,
  342. };
  343. static struct omap_dss_board_info cm_t35_dss_data = {
  344. .num_devices = ARRAY_SIZE(cm_t35_dss_devices),
  345. .devices = cm_t35_dss_devices,
  346. .default_device = &cm_t35_dvi_device,
  347. };
  348. static struct platform_device cm_t35_dss_device = {
  349. .name = "omapdss",
  350. .id = -1,
  351. .dev = {
  352. .platform_data = &cm_t35_dss_data,
  353. },
  354. };
  355. static struct omap2_mcspi_device_config tdo24m_mcspi_config = {
  356. .turbo_mode = 0,
  357. .single_channel = 1, /* 0: slave, 1: master */
  358. };
  359. static struct tdo24m_platform_data tdo24m_config = {
  360. .model = TDO35S,
  361. };
  362. static struct spi_board_info cm_t35_lcd_spi_board_info[] __initdata = {
  363. {
  364. .modalias = "tdo24m",
  365. .bus_num = 4,
  366. .chip_select = 0,
  367. .max_speed_hz = 1000000,
  368. .controller_data = &tdo24m_mcspi_config,
  369. .platform_data = &tdo24m_config,
  370. },
  371. };
  372. static void __init cm_t35_init_display(void)
  373. {
  374. int err;
  375. lcd_en_gpio = CM_T35_LCD_EN_GPIO;
  376. lcd_bl_gpio = CM_T35_LCD_BL_GPIO;
  377. dvi_en_gpio = CM_T35_DVI_EN_GPIO;
  378. spi_register_board_info(cm_t35_lcd_spi_board_info,
  379. ARRAY_SIZE(cm_t35_lcd_spi_board_info));
  380. err = gpio_request(lcd_en_gpio, "LCD RST");
  381. if (err) {
  382. pr_err("CM-T35: failed to get LCD reset GPIO\n");
  383. goto out;
  384. }
  385. err = gpio_request(lcd_bl_gpio, "LCD BL");
  386. if (err) {
  387. pr_err("CM-T35: failed to get LCD backlight control GPIO\n");
  388. goto err_lcd_bl;
  389. }
  390. err = gpio_request(dvi_en_gpio, "DVI EN");
  391. if (err) {
  392. pr_err("CM-T35: failed to get DVI reset GPIO\n");
  393. goto err_dvi_en;
  394. }
  395. gpio_export(lcd_en_gpio, 0);
  396. gpio_export(lcd_bl_gpio, 0);
  397. gpio_export(dvi_en_gpio, 0);
  398. gpio_direction_output(lcd_en_gpio, 0);
  399. gpio_direction_output(lcd_bl_gpio, 0);
  400. gpio_direction_output(dvi_en_gpio, 1);
  401. msleep(50);
  402. gpio_set_value(lcd_en_gpio, 1);
  403. err = platform_device_register(&cm_t35_dss_device);
  404. if (err) {
  405. pr_err("CM-T35: failed to register DSS device\n");
  406. goto err_dev_reg;
  407. }
  408. return;
  409. err_dev_reg:
  410. gpio_free(dvi_en_gpio);
  411. err_dvi_en:
  412. gpio_free(lcd_bl_gpio);
  413. err_lcd_bl:
  414. gpio_free(lcd_en_gpio);
  415. out:
  416. return;
  417. }
  418. static struct regulator_consumer_supply cm_t35_vmmc1_supply = {
  419. .supply = "vmmc",
  420. };
  421. static struct regulator_consumer_supply cm_t35_vsim_supply = {
  422. .supply = "vmmc_aux",
  423. };
  424. static struct regulator_consumer_supply cm_t35_vdac_supply = {
  425. .supply = "vdda_dac",
  426. .dev = &cm_t35_dss_device.dev,
  427. };
  428. static struct regulator_consumer_supply cm_t35_vdvi_supply = {
  429. .supply = "vdvi",
  430. .dev = &cm_t35_dss_device.dev,
  431. };
  432. /* VMMC1 for MMC1 pins CMD, CLK, DAT0..DAT3 (20 mA, plus card == max 220 mA) */
  433. static struct regulator_init_data cm_t35_vmmc1 = {
  434. .constraints = {
  435. .min_uV = 1850000,
  436. .max_uV = 3150000,
  437. .valid_modes_mask = REGULATOR_MODE_NORMAL
  438. | REGULATOR_MODE_STANDBY,
  439. .valid_ops_mask = REGULATOR_CHANGE_VOLTAGE
  440. | REGULATOR_CHANGE_MODE
  441. | REGULATOR_CHANGE_STATUS,
  442. },
  443. .num_consumer_supplies = 1,
  444. .consumer_supplies = &cm_t35_vmmc1_supply,
  445. };
  446. /* VSIM for MMC1 pins DAT4..DAT7 (2 mA, plus card == max 50 mA) */
  447. static struct regulator_init_data cm_t35_vsim = {
  448. .constraints = {
  449. .min_uV = 1800000,
  450. .max_uV = 3000000,
  451. .valid_modes_mask = REGULATOR_MODE_NORMAL
  452. | REGULATOR_MODE_STANDBY,
  453. .valid_ops_mask = REGULATOR_CHANGE_VOLTAGE
  454. | REGULATOR_CHANGE_MODE
  455. | REGULATOR_CHANGE_STATUS,
  456. },
  457. .num_consumer_supplies = 1,
  458. .consumer_supplies = &cm_t35_vsim_supply,
  459. };
  460. /* VDAC for DSS driving S-Video (8 mA unloaded, max 65 mA) */
  461. static struct regulator_init_data cm_t35_vdac = {
  462. .constraints = {
  463. .min_uV = 1800000,
  464. .max_uV = 1800000,
  465. .valid_modes_mask = REGULATOR_MODE_NORMAL
  466. | REGULATOR_MODE_STANDBY,
  467. .valid_ops_mask = REGULATOR_CHANGE_MODE
  468. | REGULATOR_CHANGE_STATUS,
  469. },
  470. .num_consumer_supplies = 1,
  471. .consumer_supplies = &cm_t35_vdac_supply,
  472. };
  473. /* VPLL2 for digital video outputs */
  474. static struct regulator_init_data cm_t35_vpll2 = {
  475. .constraints = {
  476. .name = "VDVI",
  477. .min_uV = 1800000,
  478. .max_uV = 1800000,
  479. .valid_modes_mask = REGULATOR_MODE_NORMAL
  480. | REGULATOR_MODE_STANDBY,
  481. .valid_ops_mask = REGULATOR_CHANGE_MODE
  482. | REGULATOR_CHANGE_STATUS,
  483. },
  484. .num_consumer_supplies = 1,
  485. .consumer_supplies = &cm_t35_vdvi_supply,
  486. };
  487. static struct twl4030_usb_data cm_t35_usb_data = {
  488. .usb_mode = T2_USB_MODE_ULPI,
  489. };
  490. static int cm_t35_keymap[] = {
  491. KEY(0, 0, KEY_A), KEY(0, 1, KEY_B), KEY(0, 2, KEY_LEFT),
  492. KEY(1, 0, KEY_UP), KEY(1, 1, KEY_ENTER), KEY(1, 2, KEY_DOWN),
  493. KEY(2, 0, KEY_RIGHT), KEY(2, 1, KEY_C), KEY(2, 2, KEY_D),
  494. };
  495. static struct matrix_keymap_data cm_t35_keymap_data = {
  496. .keymap = cm_t35_keymap,
  497. .keymap_size = ARRAY_SIZE(cm_t35_keymap),
  498. };
  499. static struct twl4030_keypad_data cm_t35_kp_data = {
  500. .keymap_data = &cm_t35_keymap_data,
  501. .rows = 3,
  502. .cols = 3,
  503. .rep = 1,
  504. };
  505. static struct omap2_hsmmc_info mmc[] = {
  506. {
  507. .mmc = 1,
  508. .wires = 4,
  509. .gpio_cd = -EINVAL,
  510. .gpio_wp = -EINVAL,
  511. },
  512. {
  513. .mmc = 2,
  514. .wires = 4,
  515. .transceiver = 1,
  516. .gpio_cd = -EINVAL,
  517. .gpio_wp = -EINVAL,
  518. .ocr_mask = 0x00100000, /* 3.3V */
  519. },
  520. {} /* Terminator */
  521. };
  522. static struct ehci_hcd_omap_platform_data ehci_pdata __initdata = {
  523. .port_mode[0] = EHCI_HCD_OMAP_MODE_PHY,
  524. .port_mode[1] = EHCI_HCD_OMAP_MODE_PHY,
  525. .port_mode[2] = EHCI_HCD_OMAP_MODE_UNKNOWN,
  526. .phy_reset = true,
  527. .reset_gpio_port[0] = -EINVAL,
  528. .reset_gpio_port[1] = -EINVAL,
  529. .reset_gpio_port[2] = -EINVAL
  530. };
  531. static int cm_t35_twl_gpio_setup(struct device *dev, unsigned gpio,
  532. unsigned ngpio)
  533. {
  534. int wlan_rst = gpio + 2;
  535. if ((gpio_request(wlan_rst, "WLAN RST") == 0) &&
  536. (gpio_direction_output(wlan_rst, 1) == 0)) {
  537. gpio_export(wlan_rst, 0);
  538. udelay(10);
  539. gpio_set_value(wlan_rst, 0);
  540. udelay(10);
  541. gpio_set_value(wlan_rst, 1);
  542. } else {
  543. pr_err("CM-T35: could not obtain gpio for WiFi reset\n");
  544. }
  545. /* gpio + 0 is "mmc0_cd" (input/IRQ) */
  546. mmc[0].gpio_cd = gpio + 0;
  547. omap2_hsmmc_init(mmc);
  548. /* link regulators to MMC adapters */
  549. cm_t35_vmmc1_supply.dev = mmc[0].dev;
  550. cm_t35_vsim_supply.dev = mmc[0].dev;
  551. /* setup USB with proper PHY reset GPIOs */
  552. ehci_pdata.reset_gpio_port[0] = gpio + 6;
  553. ehci_pdata.reset_gpio_port[1] = gpio + 7;
  554. usb_ehci_init(&ehci_pdata);
  555. return 0;
  556. }
  557. static struct twl4030_gpio_platform_data cm_t35_gpio_data = {
  558. .gpio_base = OMAP_MAX_GPIO_LINES,
  559. .irq_base = TWL4030_GPIO_IRQ_BASE,
  560. .irq_end = TWL4030_GPIO_IRQ_END,
  561. .setup = cm_t35_twl_gpio_setup,
  562. };
  563. static struct twl4030_platform_data cm_t35_twldata = {
  564. .irq_base = TWL4030_IRQ_BASE,
  565. .irq_end = TWL4030_IRQ_END,
  566. /* platform_data for children goes here */
  567. .keypad = &cm_t35_kp_data,
  568. .usb = &cm_t35_usb_data,
  569. .gpio = &cm_t35_gpio_data,
  570. .vmmc1 = &cm_t35_vmmc1,
  571. .vsim = &cm_t35_vsim,
  572. .vdac = &cm_t35_vdac,
  573. .vpll2 = &cm_t35_vpll2,
  574. };
  575. static struct i2c_board_info __initdata cm_t35_i2c_boardinfo[] = {
  576. {
  577. I2C_BOARD_INFO("tps65930", 0x48),
  578. .flags = I2C_CLIENT_WAKE,
  579. .irq = INT_34XX_SYS_NIRQ,
  580. .platform_data = &cm_t35_twldata,
  581. },
  582. };
  583. static void __init cm_t35_init_i2c(void)
  584. {
  585. omap_register_i2c_bus(1, 2600, cm_t35_i2c_boardinfo,
  586. ARRAY_SIZE(cm_t35_i2c_boardinfo));
  587. }
  588. static struct omap_board_config_kernel cm_t35_config[] __initdata = {
  589. };
  590. static void __init cm_t35_init_irq(void)
  591. {
  592. omap_board_config = cm_t35_config;
  593. omap_board_config_size = ARRAY_SIZE(cm_t35_config);
  594. omap2_init_common_hw(mt46h32m32lf6_sdrc_params,
  595. mt46h32m32lf6_sdrc_params);
  596. omap_init_irq();
  597. omap_gpio_init();
  598. }
  599. static void __init cm_t35_map_io(void)
  600. {
  601. omap2_set_globals_343x();
  602. omap34xx_map_common_io();
  603. }
  604. static struct omap_board_mux board_mux[] __initdata = {
  605. /* nCS and IRQ for CM-T35 ethernet */
  606. OMAP3_MUX(GPMC_NCS5, OMAP_MUX_MODE0),
  607. OMAP3_MUX(UART3_CTS_RCTX, OMAP_MUX_MODE4 | OMAP_PIN_INPUT_PULLUP),
  608. /* nCS and IRQ for SB-T35 ethernet */
  609. OMAP3_MUX(GPMC_NCS4, OMAP_MUX_MODE0),
  610. OMAP3_MUX(GPMC_WAIT3, OMAP_MUX_MODE4 | OMAP_PIN_INPUT_PULLUP),
  611. /* PENDOWN GPIO */
  612. OMAP3_MUX(GPMC_NCS6, OMAP_MUX_MODE4 | OMAP_PIN_INPUT),
  613. /* mUSB */
  614. OMAP3_MUX(HSUSB0_CLK, OMAP_MUX_MODE0 | OMAP_PIN_INPUT),
  615. OMAP3_MUX(HSUSB0_STP, OMAP_MUX_MODE0 | OMAP_PIN_OUTPUT),
  616. OMAP3_MUX(HSUSB0_DIR, OMAP_MUX_MODE0 | OMAP_PIN_INPUT),
  617. OMAP3_MUX(HSUSB0_NXT, OMAP_MUX_MODE0 | OMAP_PIN_INPUT),
  618. OMAP3_MUX(HSUSB0_DATA0, OMAP_MUX_MODE0 | OMAP_PIN_INPUT),
  619. OMAP3_MUX(HSUSB0_DATA1, OMAP_MUX_MODE0 | OMAP_PIN_INPUT),
  620. OMAP3_MUX(HSUSB0_DATA2, OMAP_MUX_MODE0 | OMAP_PIN_INPUT),
  621. OMAP3_MUX(HSUSB0_DATA3, OMAP_MUX_MODE0 | OMAP_PIN_INPUT),
  622. OMAP3_MUX(HSUSB0_DATA4, OMAP_MUX_MODE0 | OMAP_PIN_INPUT),
  623. OMAP3_MUX(HSUSB0_DATA5, OMAP_MUX_MODE0 | OMAP_PIN_INPUT),
  624. OMAP3_MUX(HSUSB0_DATA6, OMAP_MUX_MODE0 | OMAP_PIN_INPUT),
  625. OMAP3_MUX(HSUSB0_DATA7, OMAP_MUX_MODE0 | OMAP_PIN_INPUT),
  626. /* MMC 2 */
  627. OMAP3_MUX(SDMMC2_DAT4, OMAP_MUX_MODE1 | OMAP_PIN_OUTPUT),
  628. OMAP3_MUX(SDMMC2_DAT5, OMAP_MUX_MODE1 | OMAP_PIN_OUTPUT),
  629. OMAP3_MUX(SDMMC2_DAT6, OMAP_MUX_MODE1 | OMAP_PIN_OUTPUT),
  630. OMAP3_MUX(SDMMC2_DAT7, OMAP_MUX_MODE1 | OMAP_PIN_INPUT),
  631. /* McSPI 1 */
  632. OMAP3_MUX(MCSPI1_CLK, OMAP_MUX_MODE0 | OMAP_PIN_INPUT),
  633. OMAP3_MUX(MCSPI1_SIMO, OMAP_MUX_MODE0 | OMAP_PIN_INPUT),
  634. OMAP3_MUX(MCSPI1_SOMI, OMAP_MUX_MODE0 | OMAP_PIN_INPUT),
  635. OMAP3_MUX(MCSPI1_CS0, OMAP_MUX_MODE0 | OMAP_PIN_INPUT_PULLDOWN),
  636. /* McSPI 4 */
  637. OMAP3_MUX(MCBSP1_CLKR, OMAP_MUX_MODE1 | OMAP_PIN_INPUT),
  638. OMAP3_MUX(MCBSP1_DX, OMAP_MUX_MODE1 | OMAP_PIN_INPUT),
  639. OMAP3_MUX(MCBSP1_DR, OMAP_MUX_MODE1 | OMAP_PIN_INPUT),
  640. OMAP3_MUX(MCBSP1_FSX, OMAP_MUX_MODE1 | OMAP_PIN_INPUT_PULLUP),
  641. /* McBSP 2 */
  642. OMAP3_MUX(MCBSP2_FSX, OMAP_MUX_MODE0 | OMAP_PIN_INPUT),
  643. OMAP3_MUX(MCBSP2_CLKX, OMAP_MUX_MODE0 | OMAP_PIN_INPUT),
  644. OMAP3_MUX(MCBSP2_DR, OMAP_MUX_MODE0 | OMAP_PIN_INPUT),
  645. OMAP3_MUX(MCBSP2_DX, OMAP_MUX_MODE0 | OMAP_PIN_OUTPUT),
  646. /* serial ports */
  647. OMAP3_MUX(MCBSP3_CLKX, OMAP_MUX_MODE1 | OMAP_PIN_OUTPUT),
  648. OMAP3_MUX(MCBSP3_FSX, OMAP_MUX_MODE1 | OMAP_PIN_INPUT),
  649. OMAP3_MUX(UART1_TX, OMAP_MUX_MODE0 | OMAP_PIN_OUTPUT),
  650. OMAP3_MUX(UART1_RX, OMAP_MUX_MODE0 | OMAP_PIN_INPUT),
  651. /* DSS */
  652. OMAP3_MUX(DSS_PCLK, OMAP_MUX_MODE0 | OMAP_PIN_OUTPUT),
  653. OMAP3_MUX(DSS_HSYNC, OMAP_MUX_MODE0 | OMAP_PIN_OUTPUT),
  654. OMAP3_MUX(DSS_VSYNC, OMAP_MUX_MODE0 | OMAP_PIN_OUTPUT),
  655. OMAP3_MUX(DSS_ACBIAS, OMAP_MUX_MODE0 | OMAP_PIN_OUTPUT),
  656. OMAP3_MUX(DSS_DATA0, OMAP_MUX_MODE0 | OMAP_PIN_OUTPUT),
  657. OMAP3_MUX(DSS_DATA1, OMAP_MUX_MODE0 | OMAP_PIN_OUTPUT),
  658. OMAP3_MUX(DSS_DATA2, OMAP_MUX_MODE0 | OMAP_PIN_OUTPUT),
  659. OMAP3_MUX(DSS_DATA3, OMAP_MUX_MODE0 | OMAP_PIN_OUTPUT),
  660. OMAP3_MUX(DSS_DATA4, OMAP_MUX_MODE0 | OMAP_PIN_OUTPUT),
  661. OMAP3_MUX(DSS_DATA5, OMAP_MUX_MODE0 | OMAP_PIN_OUTPUT),
  662. OMAP3_MUX(DSS_DATA6, OMAP_MUX_MODE0 | OMAP_PIN_OUTPUT),
  663. OMAP3_MUX(DSS_DATA7, OMAP_MUX_MODE0 | OMAP_PIN_OUTPUT),
  664. OMAP3_MUX(DSS_DATA8, OMAP_MUX_MODE0 | OMAP_PIN_OUTPUT),
  665. OMAP3_MUX(DSS_DATA9, OMAP_MUX_MODE0 | OMAP_PIN_OUTPUT),
  666. OMAP3_MUX(DSS_DATA10, OMAP_MUX_MODE0 | OMAP_PIN_OUTPUT),
  667. OMAP3_MUX(DSS_DATA11, OMAP_MUX_MODE0 | OMAP_PIN_OUTPUT),
  668. OMAP3_MUX(DSS_DATA12, OMAP_MUX_MODE0 | OMAP_PIN_OUTPUT),
  669. OMAP3_MUX(DSS_DATA13, OMAP_MUX_MODE0 | OMAP_PIN_OUTPUT),
  670. OMAP3_MUX(DSS_DATA14, OMAP_MUX_MODE0 | OMAP_PIN_OUTPUT),
  671. OMAP3_MUX(DSS_DATA15, OMAP_MUX_MODE0 | OMAP_PIN_OUTPUT),
  672. OMAP3_MUX(DSS_DATA16, OMAP_MUX_MODE0 | OMAP_PIN_OUTPUT),
  673. OMAP3_MUX(DSS_DATA17, OMAP_MUX_MODE0 | OMAP_PIN_OUTPUT),
  674. OMAP3_MUX(DSS_DATA18, OMAP_MUX_MODE0 | OMAP_PIN_OUTPUT),
  675. OMAP3_MUX(DSS_DATA19, OMAP_MUX_MODE0 | OMAP_PIN_OUTPUT),
  676. OMAP3_MUX(DSS_DATA20, OMAP_MUX_MODE0 | OMAP_PIN_OUTPUT),
  677. OMAP3_MUX(DSS_DATA21, OMAP_MUX_MODE0 | OMAP_PIN_OUTPUT),
  678. OMAP3_MUX(DSS_DATA22, OMAP_MUX_MODE0 | OMAP_PIN_OUTPUT),
  679. OMAP3_MUX(DSS_DATA23, OMAP_MUX_MODE0 | OMAP_PIN_OUTPUT),
  680. /* display controls */
  681. OMAP3_MUX(MCBSP1_FSR, OMAP_MUX_MODE4 | OMAP_PIN_OUTPUT),
  682. OMAP3_MUX(GPMC_NCS7, OMAP_MUX_MODE4 | OMAP_PIN_OUTPUT),
  683. OMAP3_MUX(GPMC_NCS3, OMAP_MUX_MODE4 | OMAP_PIN_OUTPUT),
  684. /* TPS IRQ */
  685. OMAP3_MUX(SYS_NIRQ, OMAP_MUX_MODE0 | OMAP_WAKEUP_EN | \
  686. OMAP_PIN_INPUT_PULLUP),
  687. { .reg_offset = OMAP_MUX_TERMINATOR },
  688. };
  689. static struct omap_musb_board_data musb_board_data = {
  690. .interface_type = MUSB_INTERFACE_ULPI,
  691. .mode = MUSB_OTG,
  692. .power = 100,
  693. };
  694. static void __init cm_t35_init(void)
  695. {
  696. omap3_mux_init(board_mux, OMAP_PACKAGE_CUS);
  697. omap_serial_init();
  698. cm_t35_init_i2c();
  699. cm_t35_init_nand();
  700. cm_t35_init_ads7846();
  701. cm_t35_init_ethernet();
  702. cm_t35_init_led();
  703. cm_t35_init_display();
  704. usb_musb_init(&musb_board_data);
  705. }
  706. MACHINE_START(CM_T35, "Compulab CM-T35")
  707. .phys_io = 0x48000000,
  708. .io_pg_offst = ((0xd8000000) >> 18) & 0xfffc,
  709. .boot_params = 0x80000100,
  710. .map_io = cm_t35_map_io,
  711. .init_irq = cm_t35_init_irq,
  712. .init_machine = cm_t35_init,
  713. .timer = &omap_timer,
  714. MACHINE_END