mach-pca100.c 9.8 KB

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  1. /*
  2. * Copyright 2007 Robert Schwebel <r.schwebel@pengutronix.de>, Pengutronix
  3. * Copyright (C) 2009 Sascha Hauer (kernel@pengutronix.de)
  4. *
  5. * This program is free software; you can redistribute it and/or
  6. * modify it under the terms of the GNU General Public License
  7. * as published by the Free Software Foundation; either version 2
  8. * of the License, or (at your option) any later version.
  9. * This program is distributed in the hope that it will be useful,
  10. * but WITHOUT ANY WARRANTY; without even the implied warranty of
  11. * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
  12. * GNU General Public License for more details.
  13. *
  14. * You should have received a copy of the GNU General Public License
  15. * along with this program; if not, write to the Free Software
  16. * Foundation, Inc., 51 Franklin Street, Fifth Floor, Boston,
  17. * MA 02110-1301, USA.
  18. */
  19. #include <linux/platform_device.h>
  20. #include <linux/io.h>
  21. #include <linux/i2c.h>
  22. #include <linux/i2c/at24.h>
  23. #include <linux/dma-mapping.h>
  24. #include <linux/spi/spi.h>
  25. #include <linux/spi/eeprom.h>
  26. #include <linux/irq.h>
  27. #include <linux/delay.h>
  28. #include <linux/gpio.h>
  29. #include <linux/usb/otg.h>
  30. #include <linux/usb/ulpi.h>
  31. #include <linux/fsl_devices.h>
  32. #include <asm/mach/arch.h>
  33. #include <asm/mach-types.h>
  34. #include <mach/common.h>
  35. #include <mach/hardware.h>
  36. #include <mach/iomux-mx27.h>
  37. #include <mach/i2c.h>
  38. #include <asm/mach/time.h>
  39. #if defined(CONFIG_SPI_IMX) || defined(CONFIG_SPI_IMX_MODULE)
  40. #include <mach/spi.h>
  41. #endif
  42. #include <mach/imx-uart.h>
  43. #include <mach/audmux.h>
  44. #include <mach/ssi.h>
  45. #include <mach/mxc_nand.h>
  46. #include <mach/irqs.h>
  47. #include <mach/mmc.h>
  48. #include <mach/mxc_ehci.h>
  49. #include <mach/ulpi.h>
  50. #include "devices.h"
  51. #define OTG_PHY_CS_GPIO (GPIO_PORTB + 23)
  52. #define USBH2_PHY_CS_GPIO (GPIO_PORTB + 24)
  53. static int pca100_pins[] = {
  54. /* UART1 */
  55. PE12_PF_UART1_TXD,
  56. PE13_PF_UART1_RXD,
  57. PE14_PF_UART1_CTS,
  58. PE15_PF_UART1_RTS,
  59. /* SDHC */
  60. PB4_PF_SD2_D0,
  61. PB5_PF_SD2_D1,
  62. PB6_PF_SD2_D2,
  63. PB7_PF_SD2_D3,
  64. PB8_PF_SD2_CMD,
  65. PB9_PF_SD2_CLK,
  66. /* FEC */
  67. PD0_AIN_FEC_TXD0,
  68. PD1_AIN_FEC_TXD1,
  69. PD2_AIN_FEC_TXD2,
  70. PD3_AIN_FEC_TXD3,
  71. PD4_AOUT_FEC_RX_ER,
  72. PD5_AOUT_FEC_RXD1,
  73. PD6_AOUT_FEC_RXD2,
  74. PD7_AOUT_FEC_RXD3,
  75. PD8_AF_FEC_MDIO,
  76. PD9_AIN_FEC_MDC,
  77. PD10_AOUT_FEC_CRS,
  78. PD11_AOUT_FEC_TX_CLK,
  79. PD12_AOUT_FEC_RXD0,
  80. PD13_AOUT_FEC_RX_DV,
  81. PD14_AOUT_FEC_RX_CLK,
  82. PD15_AOUT_FEC_COL,
  83. PD16_AIN_FEC_TX_ER,
  84. PF23_AIN_FEC_TX_EN,
  85. /* SSI1 */
  86. PC20_PF_SSI1_FS,
  87. PC21_PF_SSI1_RXD,
  88. PC22_PF_SSI1_TXD,
  89. PC23_PF_SSI1_CLK,
  90. /* onboard I2C */
  91. PC5_PF_I2C2_SDA,
  92. PC6_PF_I2C2_SCL,
  93. /* external I2C */
  94. PD17_PF_I2C_DATA,
  95. PD18_PF_I2C_CLK,
  96. /* SPI1 */
  97. PD25_PF_CSPI1_RDY,
  98. PD29_PF_CSPI1_SCLK,
  99. PD30_PF_CSPI1_MISO,
  100. PD31_PF_CSPI1_MOSI,
  101. /* OTG */
  102. OTG_PHY_CS_GPIO | GPIO_GPIO | GPIO_OUT,
  103. PC7_PF_USBOTG_DATA5,
  104. PC8_PF_USBOTG_DATA6,
  105. PC9_PF_USBOTG_DATA0,
  106. PC10_PF_USBOTG_DATA2,
  107. PC11_PF_USBOTG_DATA1,
  108. PC12_PF_USBOTG_DATA4,
  109. PC13_PF_USBOTG_DATA3,
  110. PE0_PF_USBOTG_NXT,
  111. PE1_PF_USBOTG_STP,
  112. PE2_PF_USBOTG_DIR,
  113. PE24_PF_USBOTG_CLK,
  114. PE25_PF_USBOTG_DATA7,
  115. /* USBH2 */
  116. USBH2_PHY_CS_GPIO | GPIO_GPIO | GPIO_OUT,
  117. PA0_PF_USBH2_CLK,
  118. PA1_PF_USBH2_DIR,
  119. PA2_PF_USBH2_DATA7,
  120. PA3_PF_USBH2_NXT,
  121. PA4_PF_USBH2_STP,
  122. PD19_AF_USBH2_DATA4,
  123. PD20_AF_USBH2_DATA3,
  124. PD21_AF_USBH2_DATA6,
  125. PD22_AF_USBH2_DATA0,
  126. PD23_AF_USBH2_DATA2,
  127. PD24_AF_USBH2_DATA1,
  128. PD26_AF_USBH2_DATA5,
  129. };
  130. static struct imxuart_platform_data uart_pdata = {
  131. .flags = IMXUART_HAVE_RTSCTS,
  132. };
  133. static struct mxc_nand_platform_data pca100_nand_board_info = {
  134. .width = 1,
  135. .hw_ecc = 1,
  136. };
  137. static struct platform_device *platform_devices[] __initdata = {
  138. &mxc_w1_master_device,
  139. &mxc_fec_device,
  140. };
  141. static struct imxi2c_platform_data pca100_i2c_1_data = {
  142. .bitrate = 100000,
  143. };
  144. static struct at24_platform_data board_eeprom = {
  145. .byte_len = 4096,
  146. .page_size = 32,
  147. .flags = AT24_FLAG_ADDR16,
  148. };
  149. static struct i2c_board_info pca100_i2c_devices[] = {
  150. {
  151. I2C_BOARD_INFO("at24", 0x52), /* E0=0, E1=1, E2=0 */
  152. .platform_data = &board_eeprom,
  153. }, {
  154. I2C_BOARD_INFO("rtc-pcf8563", 0x51),
  155. .type = "pcf8563"
  156. }, {
  157. I2C_BOARD_INFO("lm75", 0x4a),
  158. .type = "lm75"
  159. }
  160. };
  161. #if defined(CONFIG_SPI_IMX) || defined(CONFIG_SPI_IMX_MODULE)
  162. static struct spi_eeprom at25320 = {
  163. .name = "at25320an",
  164. .byte_len = 4096,
  165. .page_size = 32,
  166. .flags = EE_ADDR2,
  167. };
  168. static struct spi_board_info pca100_spi_board_info[] __initdata = {
  169. {
  170. .modalias = "at25",
  171. .max_speed_hz = 30000,
  172. .bus_num = 0,
  173. .chip_select = 1,
  174. .platform_data = &at25320,
  175. },
  176. };
  177. static int pca100_spi_cs[] = {GPIO_PORTD + 28, GPIO_PORTD + 27};
  178. static struct spi_imx_master pca100_spi_0_data = {
  179. .chipselect = pca100_spi_cs,
  180. .num_chipselect = ARRAY_SIZE(pca100_spi_cs),
  181. };
  182. #endif
  183. static void pca100_ac97_warm_reset(struct snd_ac97 *ac97)
  184. {
  185. mxc_gpio_mode(GPIO_PORTC | 20 | GPIO_GPIO | GPIO_OUT);
  186. gpio_set_value(GPIO_PORTC + 20, 1);
  187. udelay(2);
  188. gpio_set_value(GPIO_PORTC + 20, 0);
  189. mxc_gpio_mode(PC20_PF_SSI1_FS);
  190. msleep(2);
  191. }
  192. static void pca100_ac97_cold_reset(struct snd_ac97 *ac97)
  193. {
  194. mxc_gpio_mode(GPIO_PORTC | 20 | GPIO_GPIO | GPIO_OUT); /* FS */
  195. gpio_set_value(GPIO_PORTC + 20, 0);
  196. mxc_gpio_mode(GPIO_PORTC | 22 | GPIO_GPIO | GPIO_OUT); /* TX */
  197. gpio_set_value(GPIO_PORTC + 22, 0);
  198. mxc_gpio_mode(GPIO_PORTC | 28 | GPIO_GPIO | GPIO_OUT); /* reset */
  199. gpio_set_value(GPIO_PORTC + 28, 0);
  200. udelay(10);
  201. gpio_set_value(GPIO_PORTC + 28, 1);
  202. mxc_gpio_mode(PC20_PF_SSI1_FS);
  203. mxc_gpio_mode(PC22_PF_SSI1_TXD);
  204. msleep(2);
  205. }
  206. static struct imx_ssi_platform_data pca100_ssi_pdata = {
  207. .ac97_reset = pca100_ac97_cold_reset,
  208. .ac97_warm_reset = pca100_ac97_warm_reset,
  209. .flags = IMX_SSI_USE_AC97,
  210. };
  211. static int pca100_sdhc2_init(struct device *dev, irq_handler_t detect_irq,
  212. void *data)
  213. {
  214. int ret;
  215. ret = request_irq(IRQ_GPIOC(29), detect_irq,
  216. IRQF_DISABLED | IRQF_TRIGGER_FALLING,
  217. "imx-mmc-detect", data);
  218. if (ret)
  219. printk(KERN_ERR
  220. "pca100: Failed to reuest irq for sd/mmc detection\n");
  221. return ret;
  222. }
  223. static void pca100_sdhc2_exit(struct device *dev, void *data)
  224. {
  225. free_irq(IRQ_GPIOC(29), data);
  226. }
  227. static struct imxmmc_platform_data sdhc_pdata = {
  228. .init = pca100_sdhc2_init,
  229. .exit = pca100_sdhc2_exit,
  230. };
  231. static int otg_phy_init(struct platform_device *pdev)
  232. {
  233. gpio_set_value(OTG_PHY_CS_GPIO, 0);
  234. return 0;
  235. }
  236. static struct mxc_usbh_platform_data otg_pdata = {
  237. .init = otg_phy_init,
  238. .portsc = MXC_EHCI_MODE_ULPI,
  239. .flags = MXC_EHCI_INTERFACE_DIFF_UNI,
  240. };
  241. static int usbh2_phy_init(struct platform_device *pdev)
  242. {
  243. gpio_set_value(USBH2_PHY_CS_GPIO, 0);
  244. return 0;
  245. }
  246. static struct mxc_usbh_platform_data usbh2_pdata = {
  247. .init = usbh2_phy_init,
  248. .portsc = MXC_EHCI_MODE_ULPI,
  249. .flags = MXC_EHCI_INTERFACE_DIFF_UNI,
  250. };
  251. static struct fsl_usb2_platform_data otg_device_pdata = {
  252. .operating_mode = FSL_USB2_DR_DEVICE,
  253. .phy_mode = FSL_USB2_PHY_ULPI,
  254. };
  255. static int otg_mode_host;
  256. static int __init pca100_otg_mode(char *options)
  257. {
  258. if (!strcmp(options, "host"))
  259. otg_mode_host = 1;
  260. else if (!strcmp(options, "device"))
  261. otg_mode_host = 0;
  262. else
  263. pr_info("otg_mode neither \"host\" nor \"device\". "
  264. "Defaulting to device\n");
  265. return 0;
  266. }
  267. __setup("otg_mode=", pca100_otg_mode);
  268. static void __init pca100_init(void)
  269. {
  270. int ret;
  271. /* SSI unit */
  272. mxc_audmux_v1_configure_port(MX27_AUDMUX_HPCR1_SSI0,
  273. MXC_AUDMUX_V1_PCR_SYN | /* 4wire mode */
  274. MXC_AUDMUX_V1_PCR_TFCSEL(3) |
  275. MXC_AUDMUX_V1_PCR_TCLKDIR | /* clock is output */
  276. MXC_AUDMUX_V1_PCR_RXDSEL(3));
  277. mxc_audmux_v1_configure_port(3,
  278. MXC_AUDMUX_V1_PCR_SYN | /* 4wire mode */
  279. MXC_AUDMUX_V1_PCR_TFCSEL(0) |
  280. MXC_AUDMUX_V1_PCR_TFSDIR |
  281. MXC_AUDMUX_V1_PCR_RXDSEL(0));
  282. ret = mxc_gpio_setup_multiple_pins(pca100_pins,
  283. ARRAY_SIZE(pca100_pins), "PCA100");
  284. if (ret)
  285. printk(KERN_ERR "pca100: Failed to setup pins (%d)\n", ret);
  286. mxc_register_device(&imx_ssi_device0, &pca100_ssi_pdata);
  287. mxc_register_device(&mxc_uart_device0, &uart_pdata);
  288. mxc_gpio_mode(GPIO_PORTC | 29 | GPIO_GPIO | GPIO_IN);
  289. mxc_register_device(&mxc_sdhc_device1, &sdhc_pdata);
  290. mxc_register_device(&imx27_nand_device, &pca100_nand_board_info);
  291. /* only the i2c master 1 is used on this CPU card */
  292. i2c_register_board_info(1, pca100_i2c_devices,
  293. ARRAY_SIZE(pca100_i2c_devices));
  294. mxc_register_device(&mxc_i2c_device1, &pca100_i2c_1_data);
  295. mxc_gpio_mode(GPIO_PORTD | 28 | GPIO_GPIO | GPIO_OUT);
  296. mxc_gpio_mode(GPIO_PORTD | 27 | GPIO_GPIO | GPIO_OUT);
  297. /* GPIO0_IRQ */
  298. mxc_gpio_mode(GPIO_PORTC | 31 | GPIO_GPIO | GPIO_IN);
  299. /* GPIO1_IRQ */
  300. mxc_gpio_mode(GPIO_PORTC | 25 | GPIO_GPIO | GPIO_IN);
  301. /* GPIO2_IRQ */
  302. mxc_gpio_mode(GPIO_PORTE | 5 | GPIO_GPIO | GPIO_IN);
  303. #if defined(CONFIG_SPI_IMX) || defined(CONFIG_SPI_IMX_MODULE)
  304. spi_register_board_info(pca100_spi_board_info,
  305. ARRAY_SIZE(pca100_spi_board_info));
  306. mxc_register_device(&mxc_spi_device0, &pca100_spi_0_data);
  307. #endif
  308. gpio_request(OTG_PHY_CS_GPIO, "usb-otg-cs");
  309. gpio_direction_output(OTG_PHY_CS_GPIO, 1);
  310. gpio_request(USBH2_PHY_CS_GPIO, "usb-host2-cs");
  311. gpio_direction_output(USBH2_PHY_CS_GPIO, 1);
  312. #if defined(CONFIG_USB_ULPI)
  313. if (otg_mode_host) {
  314. otg_pdata.otg = otg_ulpi_create(&mxc_ulpi_access_ops,
  315. USB_OTG_DRV_VBUS | USB_OTG_DRV_VBUS_EXT);
  316. mxc_register_device(&mxc_otg_host, &otg_pdata);
  317. }
  318. usbh2_pdata.otg = otg_ulpi_create(&mxc_ulpi_access_ops,
  319. USB_OTG_DRV_VBUS | USB_OTG_DRV_VBUS_EXT);
  320. mxc_register_device(&mxc_usbh2, &usbh2_pdata);
  321. #endif
  322. if (!otg_mode_host) {
  323. gpio_set_value(OTG_PHY_CS_GPIO, 0);
  324. mxc_register_device(&mxc_otg_udc_device, &otg_device_pdata);
  325. }
  326. platform_add_devices(platform_devices, ARRAY_SIZE(platform_devices));
  327. }
  328. static void __init pca100_timer_init(void)
  329. {
  330. mx27_clocks_init(26000000);
  331. }
  332. static struct sys_timer pca100_timer = {
  333. .init = pca100_timer_init,
  334. };
  335. MACHINE_START(PCA100, "phyCARD-i.MX27")
  336. .phys_io = MX27_AIPI_BASE_ADDR,
  337. .io_pg_offst = ((MX27_AIPI_BASE_ADDR_VIRT) >> 18) & 0xfffc,
  338. .boot_params = MX27_PHYS_OFFSET + 0x100,
  339. .map_io = mx27_map_io,
  340. .init_irq = mx27_init_irq,
  341. .init_machine = pca100_init,
  342. .timer = &pca100_timer,
  343. MACHINE_END