apic_flat_64.c 9.9 KB

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  1. /*
  2. * Copyright 2004 James Cleverdon, IBM.
  3. * Subject to the GNU Public License, v.2
  4. *
  5. * Flat APIC subarch code.
  6. *
  7. * Hacked for x86-64 by James Cleverdon from i386 architecture code by
  8. * Martin Bligh, Andi Kleen, James Bottomley, John Stultz, and
  9. * James Cleverdon.
  10. */
  11. #include <linux/errno.h>
  12. #include <linux/threads.h>
  13. #include <linux/cpumask.h>
  14. #include <linux/string.h>
  15. #include <linux/kernel.h>
  16. #include <linux/ctype.h>
  17. #include <linux/init.h>
  18. #include <linux/hardirq.h>
  19. #include <linux/module.h>
  20. #include <asm/smp.h>
  21. #include <asm/apic.h>
  22. #include <asm/ipi.h>
  23. #ifdef CONFIG_ACPI
  24. #include <acpi/acpi_bus.h>
  25. #endif
  26. static struct apic apic_physflat;
  27. static struct apic apic_flat;
  28. struct apic __read_mostly *apic = &apic_flat;
  29. EXPORT_SYMBOL_GPL(apic);
  30. static int flat_acpi_madt_oem_check(char *oem_id, char *oem_table_id)
  31. {
  32. return 1;
  33. }
  34. static void flat_vector_allocation_domain(int cpu, struct cpumask *retmask)
  35. {
  36. /* Careful. Some cpus do not strictly honor the set of cpus
  37. * specified in the interrupt destination when using lowest
  38. * priority interrupt delivery mode.
  39. *
  40. * In particular there was a hyperthreading cpu observed to
  41. * deliver interrupts to the wrong hyperthread when only one
  42. * hyperthread was specified in the interrupt desitination.
  43. */
  44. cpumask_clear(retmask);
  45. cpumask_bits(retmask)[0] = APIC_ALL_CPUS;
  46. }
  47. /*
  48. * Set up the logical destination ID.
  49. *
  50. * Intel recommends to set DFR, LDR and TPR before enabling
  51. * an APIC. See e.g. "AP-388 82489DX User's Manual" (Intel
  52. * document number 292116). So here it goes...
  53. */
  54. void flat_init_apic_ldr(void)
  55. {
  56. unsigned long val;
  57. unsigned long num, id;
  58. num = smp_processor_id();
  59. id = 1UL << num;
  60. apic_write(APIC_DFR, APIC_DFR_FLAT);
  61. val = apic_read(APIC_LDR) & ~APIC_LDR_MASK;
  62. val |= SET_APIC_LOGICAL_ID(id);
  63. apic_write(APIC_LDR, val);
  64. }
  65. static inline void _flat_send_IPI_mask(unsigned long mask, int vector)
  66. {
  67. unsigned long flags;
  68. local_irq_save(flags);
  69. __default_send_IPI_dest_field(mask, vector, apic->dest_logical);
  70. local_irq_restore(flags);
  71. }
  72. static void flat_send_IPI_mask(const struct cpumask *cpumask, int vector)
  73. {
  74. unsigned long mask = cpumask_bits(cpumask)[0];
  75. _flat_send_IPI_mask(mask, vector);
  76. }
  77. static void
  78. flat_send_IPI_mask_allbutself(const struct cpumask *cpumask, int vector)
  79. {
  80. unsigned long mask = cpumask_bits(cpumask)[0];
  81. int cpu = smp_processor_id();
  82. if (cpu < BITS_PER_LONG)
  83. clear_bit(cpu, &mask);
  84. _flat_send_IPI_mask(mask, vector);
  85. }
  86. static void flat_send_IPI_allbutself(int vector)
  87. {
  88. int cpu = smp_processor_id();
  89. #ifdef CONFIG_HOTPLUG_CPU
  90. int hotplug = 1;
  91. #else
  92. int hotplug = 0;
  93. #endif
  94. if (hotplug || vector == NMI_VECTOR) {
  95. if (!cpumask_equal(cpu_online_mask, cpumask_of(cpu))) {
  96. unsigned long mask = cpumask_bits(cpu_online_mask)[0];
  97. if (cpu < BITS_PER_LONG)
  98. clear_bit(cpu, &mask);
  99. _flat_send_IPI_mask(mask, vector);
  100. }
  101. } else if (num_online_cpus() > 1) {
  102. __default_send_IPI_shortcut(APIC_DEST_ALLBUT,
  103. vector, apic->dest_logical);
  104. }
  105. }
  106. static void flat_send_IPI_all(int vector)
  107. {
  108. if (vector == NMI_VECTOR) {
  109. flat_send_IPI_mask(cpu_online_mask, vector);
  110. } else {
  111. __default_send_IPI_shortcut(APIC_DEST_ALLINC,
  112. vector, apic->dest_logical);
  113. }
  114. }
  115. static unsigned int flat_get_apic_id(unsigned long x)
  116. {
  117. unsigned int id;
  118. id = (((x)>>24) & 0xFFu);
  119. return id;
  120. }
  121. static unsigned long set_apic_id(unsigned int id)
  122. {
  123. unsigned long x;
  124. x = ((id & 0xFFu)<<24);
  125. return x;
  126. }
  127. static unsigned int read_xapic_id(void)
  128. {
  129. unsigned int id;
  130. id = flat_get_apic_id(apic_read(APIC_ID));
  131. return id;
  132. }
  133. static int flat_apic_id_registered(void)
  134. {
  135. return physid_isset(read_xapic_id(), phys_cpu_present_map);
  136. }
  137. static int flat_phys_pkg_id(int initial_apic_id, int index_msb)
  138. {
  139. return initial_apic_id >> index_msb;
  140. }
  141. static int flat_probe(void)
  142. {
  143. return 1;
  144. }
  145. static struct apic apic_flat = {
  146. .name = "flat",
  147. .probe = flat_probe,
  148. .acpi_madt_oem_check = flat_acpi_madt_oem_check,
  149. .apic_id_valid = default_apic_id_valid,
  150. .apic_id_registered = flat_apic_id_registered,
  151. .irq_delivery_mode = dest_LowestPrio,
  152. .irq_dest_mode = 1, /* logical */
  153. .target_cpus = online_target_cpus,
  154. .disable_esr = 0,
  155. .dest_logical = APIC_DEST_LOGICAL,
  156. .check_apicid_used = NULL,
  157. .check_apicid_present = NULL,
  158. .vector_allocation_domain = flat_vector_allocation_domain,
  159. .init_apic_ldr = flat_init_apic_ldr,
  160. .ioapic_phys_id_map = NULL,
  161. .setup_apic_routing = NULL,
  162. .multi_timer_check = NULL,
  163. .cpu_present_to_apicid = default_cpu_present_to_apicid,
  164. .apicid_to_cpu_present = NULL,
  165. .setup_portio_remap = NULL,
  166. .check_phys_apicid_present = default_check_phys_apicid_present,
  167. .enable_apic_mode = NULL,
  168. .phys_pkg_id = flat_phys_pkg_id,
  169. .mps_oem_check = NULL,
  170. .get_apic_id = flat_get_apic_id,
  171. .set_apic_id = set_apic_id,
  172. .apic_id_mask = 0xFFu << 24,
  173. .cpu_mask_to_apicid = default_cpu_mask_to_apicid,
  174. .cpu_mask_to_apicid_and = default_cpu_mask_to_apicid_and,
  175. .send_IPI_mask = flat_send_IPI_mask,
  176. .send_IPI_mask_allbutself = flat_send_IPI_mask_allbutself,
  177. .send_IPI_allbutself = flat_send_IPI_allbutself,
  178. .send_IPI_all = flat_send_IPI_all,
  179. .send_IPI_self = apic_send_IPI_self,
  180. .trampoline_phys_low = DEFAULT_TRAMPOLINE_PHYS_LOW,
  181. .trampoline_phys_high = DEFAULT_TRAMPOLINE_PHYS_HIGH,
  182. .wait_for_init_deassert = NULL,
  183. .smp_callin_clear_local_apic = NULL,
  184. .inquire_remote_apic = default_inquire_remote_apic,
  185. .read = native_apic_mem_read,
  186. .write = native_apic_mem_write,
  187. .eoi_write = native_apic_mem_write,
  188. .icr_read = native_apic_icr_read,
  189. .icr_write = native_apic_icr_write,
  190. .wait_icr_idle = native_apic_wait_icr_idle,
  191. .safe_wait_icr_idle = native_safe_apic_wait_icr_idle,
  192. };
  193. /*
  194. * Physflat mode is used when there are more than 8 CPUs on a system.
  195. * We cannot use logical delivery in this case because the mask
  196. * overflows, so use physical mode.
  197. */
  198. static int physflat_acpi_madt_oem_check(char *oem_id, char *oem_table_id)
  199. {
  200. #ifdef CONFIG_ACPI
  201. /*
  202. * Quirk: some x86_64 machines can only use physical APIC mode
  203. * regardless of how many processors are present (x86_64 ES7000
  204. * is an example).
  205. */
  206. if (acpi_gbl_FADT.header.revision >= FADT2_REVISION_ID &&
  207. (acpi_gbl_FADT.flags & ACPI_FADT_APIC_PHYSICAL)) {
  208. printk(KERN_DEBUG "system APIC only can use physical flat");
  209. return 1;
  210. }
  211. if (!strncmp(oem_id, "IBM", 3) && !strncmp(oem_table_id, "EXA", 3)) {
  212. printk(KERN_DEBUG "IBM Summit detected, will use apic physical");
  213. return 1;
  214. }
  215. #endif
  216. return 0;
  217. }
  218. static void physflat_vector_allocation_domain(int cpu, struct cpumask *retmask)
  219. {
  220. cpumask_clear(retmask);
  221. cpumask_set_cpu(cpu, retmask);
  222. }
  223. static void physflat_send_IPI_mask(const struct cpumask *cpumask, int vector)
  224. {
  225. default_send_IPI_mask_sequence_phys(cpumask, vector);
  226. }
  227. static void physflat_send_IPI_mask_allbutself(const struct cpumask *cpumask,
  228. int vector)
  229. {
  230. default_send_IPI_mask_allbutself_phys(cpumask, vector);
  231. }
  232. static void physflat_send_IPI_allbutself(int vector)
  233. {
  234. default_send_IPI_mask_allbutself_phys(cpu_online_mask, vector);
  235. }
  236. static void physflat_send_IPI_all(int vector)
  237. {
  238. physflat_send_IPI_mask(cpu_online_mask, vector);
  239. }
  240. static unsigned int physflat_cpu_mask_to_apicid(const struct cpumask *cpumask)
  241. {
  242. int cpu;
  243. /*
  244. * We're using fixed IRQ delivery, can only return one phys APIC ID.
  245. * May as well be the first.
  246. */
  247. cpu = cpumask_first(cpumask);
  248. if ((unsigned)cpu < nr_cpu_ids)
  249. return per_cpu(x86_cpu_to_apicid, cpu);
  250. else
  251. return BAD_APICID;
  252. }
  253. static unsigned int
  254. physflat_cpu_mask_to_apicid_and(const struct cpumask *cpumask,
  255. const struct cpumask *andmask)
  256. {
  257. int cpu;
  258. /*
  259. * We're using fixed IRQ delivery, can only return one phys APIC ID.
  260. * May as well be the first.
  261. */
  262. for_each_cpu_and(cpu, cpumask, andmask) {
  263. if (cpumask_test_cpu(cpu, cpu_online_mask))
  264. break;
  265. }
  266. return per_cpu(x86_cpu_to_apicid, cpu);
  267. }
  268. static int physflat_probe(void)
  269. {
  270. if (apic == &apic_physflat || num_possible_cpus() > 8)
  271. return 1;
  272. return 0;
  273. }
  274. static struct apic apic_physflat = {
  275. .name = "physical flat",
  276. .probe = physflat_probe,
  277. .acpi_madt_oem_check = physflat_acpi_madt_oem_check,
  278. .apic_id_valid = default_apic_id_valid,
  279. .apic_id_registered = flat_apic_id_registered,
  280. .irq_delivery_mode = dest_Fixed,
  281. .irq_dest_mode = 0, /* physical */
  282. .target_cpus = online_target_cpus,
  283. .disable_esr = 0,
  284. .dest_logical = 0,
  285. .check_apicid_used = NULL,
  286. .check_apicid_present = NULL,
  287. .vector_allocation_domain = physflat_vector_allocation_domain,
  288. /* not needed, but shouldn't hurt: */
  289. .init_apic_ldr = flat_init_apic_ldr,
  290. .ioapic_phys_id_map = NULL,
  291. .setup_apic_routing = NULL,
  292. .multi_timer_check = NULL,
  293. .cpu_present_to_apicid = default_cpu_present_to_apicid,
  294. .apicid_to_cpu_present = NULL,
  295. .setup_portio_remap = NULL,
  296. .check_phys_apicid_present = default_check_phys_apicid_present,
  297. .enable_apic_mode = NULL,
  298. .phys_pkg_id = flat_phys_pkg_id,
  299. .mps_oem_check = NULL,
  300. .get_apic_id = flat_get_apic_id,
  301. .set_apic_id = set_apic_id,
  302. .apic_id_mask = 0xFFu << 24,
  303. .cpu_mask_to_apicid = physflat_cpu_mask_to_apicid,
  304. .cpu_mask_to_apicid_and = physflat_cpu_mask_to_apicid_and,
  305. .send_IPI_mask = physflat_send_IPI_mask,
  306. .send_IPI_mask_allbutself = physflat_send_IPI_mask_allbutself,
  307. .send_IPI_allbutself = physflat_send_IPI_allbutself,
  308. .send_IPI_all = physflat_send_IPI_all,
  309. .send_IPI_self = apic_send_IPI_self,
  310. .trampoline_phys_low = DEFAULT_TRAMPOLINE_PHYS_LOW,
  311. .trampoline_phys_high = DEFAULT_TRAMPOLINE_PHYS_HIGH,
  312. .wait_for_init_deassert = NULL,
  313. .smp_callin_clear_local_apic = NULL,
  314. .inquire_remote_apic = default_inquire_remote_apic,
  315. .read = native_apic_mem_read,
  316. .write = native_apic_mem_write,
  317. .eoi_write = native_apic_mem_write,
  318. .icr_read = native_apic_icr_read,
  319. .icr_write = native_apic_icr_write,
  320. .wait_icr_idle = native_apic_wait_icr_idle,
  321. .safe_wait_icr_idle = native_safe_apic_wait_icr_idle,
  322. };
  323. /*
  324. * We need to check for physflat first, so this order is important.
  325. */
  326. apic_drivers(apic_physflat, apic_flat);