irqchip.c 5.1 KB

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  1. /*
  2. * File: arch/blackfin/kernel/irqchip.c
  3. * Based on:
  4. * Author:
  5. *
  6. * Created:
  7. * Description: This file contains the simple DMA Implementation for Blackfin
  8. *
  9. * Modified:
  10. * Copyright 2004-2006 Analog Devices Inc.
  11. *
  12. * Bugs: Enter bugs at http://blackfin.uclinux.org/
  13. *
  14. * This program is free software; you can redistribute it and/or modify
  15. * it under the terms of the GNU General Public License as published by
  16. * the Free Software Foundation; either version 2 of the License, or
  17. * (at your option) any later version.
  18. *
  19. * This program is distributed in the hope that it will be useful,
  20. * but WITHOUT ANY WARRANTY; without even the implied warranty of
  21. * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
  22. * GNU General Public License for more details.
  23. *
  24. * You should have received a copy of the GNU General Public License
  25. * along with this program; if not, see the file COPYING, or write
  26. * to the Free Software Foundation, Inc.,
  27. * 51 Franklin St, Fifth Floor, Boston, MA 02110-1301 USA
  28. */
  29. #include <linux/kernel_stat.h>
  30. #include <linux/module.h>
  31. #include <linux/random.h>
  32. #include <linux/seq_file.h>
  33. #include <linux/kallsyms.h>
  34. #include <linux/interrupt.h>
  35. #include <linux/irq.h>
  36. #include <asm/trace.h>
  37. #include <asm/pda.h>
  38. static atomic_t irq_err_count;
  39. static spinlock_t irq_controller_lock;
  40. /*
  41. * Dummy mask/unmask handler
  42. */
  43. void dummy_mask_unmask_irq(unsigned int irq)
  44. {
  45. }
  46. void ack_bad_irq(unsigned int irq)
  47. {
  48. atomic_inc(&irq_err_count);
  49. printk(KERN_ERR "IRQ: spurious interrupt %d\n", irq);
  50. }
  51. static struct irq_chip bad_chip = {
  52. .ack = dummy_mask_unmask_irq,
  53. .mask = dummy_mask_unmask_irq,
  54. .unmask = dummy_mask_unmask_irq,
  55. };
  56. static int bad_stats;
  57. static struct irq_desc bad_irq_desc = {
  58. .status = IRQ_DISABLED,
  59. .chip = &bad_chip,
  60. .handle_irq = handle_bad_irq,
  61. .depth = 1,
  62. .lock = __SPIN_LOCK_UNLOCKED(irq_desc->lock),
  63. .kstat_irqs = &bad_stats,
  64. #ifdef CONFIG_SMP
  65. .affinity = CPU_MASK_ALL
  66. #endif
  67. };
  68. #ifdef CONFIG_CPUMASK_OFFSTACK
  69. /* We are not allocating a variable-sized bad_irq_desc.affinity */
  70. #error "Blackfin architecture does not support CONFIG_CPUMASK_OFFSTACK."
  71. #endif
  72. int show_interrupts(struct seq_file *p, void *v)
  73. {
  74. int i = *(loff_t *) v, j;
  75. struct irqaction *action;
  76. unsigned long flags;
  77. if (i < NR_IRQS) {
  78. spin_lock_irqsave(&irq_desc[i].lock, flags);
  79. action = irq_desc[i].action;
  80. if (!action)
  81. goto skip;
  82. seq_printf(p, "%3d: ", i);
  83. for_each_online_cpu(j)
  84. seq_printf(p, "%10u ", kstat_irqs_cpu(i, j));
  85. seq_printf(p, " %8s", irq_desc[i].chip->name);
  86. seq_printf(p, " %s", action->name);
  87. for (action = action->next; action; action = action->next)
  88. seq_printf(p, " %s", action->name);
  89. seq_putc(p, '\n');
  90. skip:
  91. spin_unlock_irqrestore(&irq_desc[i].lock, flags);
  92. } else if (i == NR_IRQS) {
  93. seq_printf(p, "NMI: ");
  94. for_each_online_cpu(j)
  95. seq_printf(p, "%10u ", cpu_pda[j].__nmi_count);
  96. seq_printf(p, " CORE Non Maskable Interrupt\n");
  97. seq_printf(p, "Err: %10u\n", atomic_read(&irq_err_count));
  98. }
  99. return 0;
  100. }
  101. /*
  102. * do_IRQ handles all hardware IRQs. Decoded IRQs should not
  103. * come via this function. Instead, they should provide their
  104. * own 'handler'
  105. */
  106. #ifdef CONFIG_DO_IRQ_L1
  107. __attribute__((l1_text))
  108. #endif
  109. asmlinkage void asm_do_IRQ(unsigned int irq, struct pt_regs *regs)
  110. {
  111. struct pt_regs *old_regs;
  112. struct irq_desc *desc = irq_desc + irq;
  113. #ifndef CONFIG_IPIPE
  114. unsigned short pending, other_ints;
  115. #endif
  116. old_regs = set_irq_regs(regs);
  117. /*
  118. * Some hardware gives randomly wrong interrupts. Rather
  119. * than crashing, do something sensible.
  120. */
  121. if (irq >= NR_IRQS)
  122. desc = &bad_irq_desc;
  123. irq_enter();
  124. #ifdef CONFIG_DEBUG_STACKOVERFLOW
  125. /* Debugging check for stack overflow: is there less than STACK_WARN free? */
  126. {
  127. long sp;
  128. sp = __get_SP() & (THREAD_SIZE-1);
  129. if (unlikely(sp < (sizeof(struct thread_info) + STACK_WARN))) {
  130. dump_stack();
  131. printk(KERN_EMERG "%s: possible stack overflow while handling irq %i "
  132. " only %ld bytes free\n",
  133. __func__, irq, sp - sizeof(struct thread_info));
  134. }
  135. }
  136. #endif
  137. generic_handle_irq(irq);
  138. #ifndef CONFIG_IPIPE
  139. /*
  140. * If we're the only interrupt running (ignoring IRQ15 which
  141. * is for syscalls), lower our priority to IRQ14 so that
  142. * softirqs run at that level. If there's another,
  143. * lower-level interrupt, irq_exit will defer softirqs to
  144. * that. If the interrupt pipeline is enabled, we are already
  145. * running at IRQ14 priority, so we don't need this code.
  146. */
  147. CSYNC();
  148. pending = bfin_read_IPEND() & ~0x8000;
  149. other_ints = pending & (pending - 1);
  150. if (other_ints == 0)
  151. lower_to_irq14();
  152. #endif /* !CONFIG_IPIPE */
  153. irq_exit();
  154. set_irq_regs(old_regs);
  155. }
  156. void __init init_IRQ(void)
  157. {
  158. struct irq_desc *desc;
  159. int irq;
  160. spin_lock_init(&irq_controller_lock);
  161. for (irq = 0, desc = irq_desc; irq < NR_IRQS; irq++, desc++) {
  162. *desc = bad_irq_desc;
  163. }
  164. init_arch_irq();
  165. #ifdef CONFIG_DEBUG_BFIN_HWTRACE_EXPAND
  166. /* Now that evt_ivhw is set up, turn this on */
  167. trace_buff_offset = 0;
  168. bfin_write_TBUFCTL(BFIN_TRACE_ON);
  169. printk(KERN_INFO "Hardware Trace expanded to %ik\n",
  170. 1 << CONFIG_DEBUG_BFIN_HWTRACE_EXPAND_LEN);
  171. #endif
  172. }