wm8523.c 14 KB

123456789101112131415161718192021222324252627282930313233343536373839404142434445464748495051525354555657585960616263646566676869707172737475767778798081828384858687888990919293949596979899100101102103104105106107108109110111112113114115116117118119120121122123124125126127128129130131132133134135136137138139140141142143144145146147148149150151152153154155156157158159160161162163164165166167168169170171172173174175176177178179180181182183184185186187188189190191192193194195196197198199200201202203204205206207208209210211212213214215216217218219220221222223224225226227228229230231232233234235236237238239240241242243244245246247248249250251252253254255256257258259260261262263264265266267268269270271272273274275276277278279280281282283284285286287288289290291292293294295296297298299300301302303304305306307308309310311312313314315316317318319320321322323324325326327328329330331332333334335336337338339340341342343344345346347348349350351352353354355356357358359360361362363364365366367368369370371372373374375376377378379380381382383384385386387388389390391392393394395396397398399400401402403404405406407408409410411412413414415416417418419420421422423424425426427428429430431432433434435436437438439440441442443444445446447448449450451452453454455456457458459460461462463464465466467468469470471472473474475476477478479480481482483484485486487488489490491492493494495496497498499500501502503504505506507508509510511512513514515516517518519520521522523524525526527528529530531532533534535536537538539540541542543544545546547548549550551552553554555556557558559560561562563564565566567568569570571572573574575576577578579580581582583584585586587588589590591592593594
  1. /*
  2. * wm8523.c -- WM8523 ALSA SoC Audio driver
  3. *
  4. * Copyright 2009 Wolfson Microelectronics plc
  5. *
  6. * Author: Mark Brown <broonie@opensource.wolfsonmicro.com>
  7. *
  8. *
  9. * This program is free software; you can redistribute it and/or modify
  10. * it under the terms of the GNU General Public License version 2 as
  11. * published by the Free Software Foundation.
  12. */
  13. #include <linux/module.h>
  14. #include <linux/moduleparam.h>
  15. #include <linux/init.h>
  16. #include <linux/delay.h>
  17. #include <linux/pm.h>
  18. #include <linux/i2c.h>
  19. #include <linux/platform_device.h>
  20. #include <linux/regulator/consumer.h>
  21. #include <linux/slab.h>
  22. #include <linux/of_device.h>
  23. #include <sound/core.h>
  24. #include <sound/pcm.h>
  25. #include <sound/pcm_params.h>
  26. #include <sound/soc.h>
  27. #include <sound/initval.h>
  28. #include <sound/tlv.h>
  29. #include "wm8523.h"
  30. #define WM8523_NUM_SUPPLIES 2
  31. static const char *wm8523_supply_names[WM8523_NUM_SUPPLIES] = {
  32. "AVDD",
  33. "LINEVDD",
  34. };
  35. #define WM8523_NUM_RATES 7
  36. /* codec private data */
  37. struct wm8523_priv {
  38. enum snd_soc_control_type control_type;
  39. struct regulator_bulk_data supplies[WM8523_NUM_SUPPLIES];
  40. unsigned int sysclk;
  41. unsigned int rate_constraint_list[WM8523_NUM_RATES];
  42. struct snd_pcm_hw_constraint_list rate_constraint;
  43. };
  44. static const u16 wm8523_reg[WM8523_REGISTER_COUNT] = {
  45. 0x8523, /* R0 - DEVICE_ID */
  46. 0x0001, /* R1 - REVISION */
  47. 0x0000, /* R2 - PSCTRL1 */
  48. 0x1812, /* R3 - AIF_CTRL1 */
  49. 0x0000, /* R4 - AIF_CTRL2 */
  50. 0x0001, /* R5 - DAC_CTRL3 */
  51. 0x0190, /* R6 - DAC_GAINL */
  52. 0x0190, /* R7 - DAC_GAINR */
  53. 0x0000, /* R8 - ZERO_DETECT */
  54. };
  55. static int wm8523_volatile_register(struct snd_soc_codec *codec, unsigned int reg)
  56. {
  57. switch (reg) {
  58. case WM8523_DEVICE_ID:
  59. case WM8523_REVISION:
  60. return 1;
  61. default:
  62. return 0;
  63. }
  64. }
  65. static int wm8523_reset(struct snd_soc_codec *codec)
  66. {
  67. return snd_soc_write(codec, WM8523_DEVICE_ID, 0);
  68. }
  69. static const DECLARE_TLV_DB_SCALE(dac_tlv, -10000, 25, 0);
  70. static const char *wm8523_zd_count_text[] = {
  71. "1024",
  72. "2048",
  73. };
  74. static const struct soc_enum wm8523_zc_count =
  75. SOC_ENUM_SINGLE(WM8523_ZERO_DETECT, 0, 2, wm8523_zd_count_text);
  76. static const struct snd_kcontrol_new wm8523_snd_controls[] = {
  77. SOC_DOUBLE_R_TLV("Playback Volume", WM8523_DAC_GAINL, WM8523_DAC_GAINR,
  78. 0, 448, 0, dac_tlv),
  79. SOC_SINGLE("ZC Switch", WM8523_DAC_CTRL3, 4, 1, 0),
  80. SOC_SINGLE("Playback Deemphasis Switch", WM8523_AIF_CTRL1, 8, 1, 0),
  81. SOC_DOUBLE("Playback Switch", WM8523_DAC_CTRL3, 2, 3, 1, 1),
  82. SOC_SINGLE("Volume Ramp Up Switch", WM8523_DAC_CTRL3, 1, 1, 0),
  83. SOC_SINGLE("Volume Ramp Down Switch", WM8523_DAC_CTRL3, 0, 1, 0),
  84. SOC_ENUM("Zero Detect Count", wm8523_zc_count),
  85. };
  86. static const struct snd_soc_dapm_widget wm8523_dapm_widgets[] = {
  87. SND_SOC_DAPM_DAC("DAC", "Playback", SND_SOC_NOPM, 0, 0),
  88. SND_SOC_DAPM_OUTPUT("LINEVOUTL"),
  89. SND_SOC_DAPM_OUTPUT("LINEVOUTR"),
  90. };
  91. static const struct snd_soc_dapm_route intercon[] = {
  92. { "LINEVOUTL", NULL, "DAC" },
  93. { "LINEVOUTR", NULL, "DAC" },
  94. };
  95. static int wm8523_add_widgets(struct snd_soc_codec *codec)
  96. {
  97. struct snd_soc_dapm_context *dapm = &codec->dapm;
  98. snd_soc_dapm_new_controls(dapm, wm8523_dapm_widgets,
  99. ARRAY_SIZE(wm8523_dapm_widgets));
  100. snd_soc_dapm_add_routes(dapm, intercon, ARRAY_SIZE(intercon));
  101. return 0;
  102. }
  103. static struct {
  104. int value;
  105. int ratio;
  106. } lrclk_ratios[WM8523_NUM_RATES] = {
  107. { 1, 128 },
  108. { 2, 192 },
  109. { 3, 256 },
  110. { 4, 384 },
  111. { 5, 512 },
  112. { 6, 768 },
  113. { 7, 1152 },
  114. };
  115. static int wm8523_startup(struct snd_pcm_substream *substream,
  116. struct snd_soc_dai *dai)
  117. {
  118. struct snd_soc_codec *codec = dai->codec;
  119. struct wm8523_priv *wm8523 = snd_soc_codec_get_drvdata(codec);
  120. /* The set of sample rates that can be supported depends on the
  121. * MCLK supplied to the CODEC - enforce this.
  122. */
  123. if (!wm8523->sysclk) {
  124. dev_err(codec->dev,
  125. "No MCLK configured, call set_sysclk() on init\n");
  126. return -EINVAL;
  127. }
  128. snd_pcm_hw_constraint_list(substream->runtime, 0,
  129. SNDRV_PCM_HW_PARAM_RATE,
  130. &wm8523->rate_constraint);
  131. return 0;
  132. }
  133. static int wm8523_hw_params(struct snd_pcm_substream *substream,
  134. struct snd_pcm_hw_params *params,
  135. struct snd_soc_dai *dai)
  136. {
  137. struct snd_soc_pcm_runtime *rtd = substream->private_data;
  138. struct snd_soc_codec *codec = rtd->codec;
  139. struct wm8523_priv *wm8523 = snd_soc_codec_get_drvdata(codec);
  140. int i;
  141. u16 aifctrl1 = snd_soc_read(codec, WM8523_AIF_CTRL1);
  142. u16 aifctrl2 = snd_soc_read(codec, WM8523_AIF_CTRL2);
  143. /* Find a supported LRCLK ratio */
  144. for (i = 0; i < ARRAY_SIZE(lrclk_ratios); i++) {
  145. if (wm8523->sysclk / params_rate(params) ==
  146. lrclk_ratios[i].ratio)
  147. break;
  148. }
  149. /* Should never happen, should be handled by constraints */
  150. if (i == ARRAY_SIZE(lrclk_ratios)) {
  151. dev_err(codec->dev, "MCLK/fs ratio %d unsupported\n",
  152. wm8523->sysclk / params_rate(params));
  153. return -EINVAL;
  154. }
  155. aifctrl2 &= ~WM8523_SR_MASK;
  156. aifctrl2 |= lrclk_ratios[i].value;
  157. aifctrl1 &= ~WM8523_WL_MASK;
  158. switch (params_format(params)) {
  159. case SNDRV_PCM_FORMAT_S16_LE:
  160. break;
  161. case SNDRV_PCM_FORMAT_S20_3LE:
  162. aifctrl1 |= 0x8;
  163. break;
  164. case SNDRV_PCM_FORMAT_S24_LE:
  165. aifctrl1 |= 0x10;
  166. break;
  167. case SNDRV_PCM_FORMAT_S32_LE:
  168. aifctrl1 |= 0x18;
  169. break;
  170. }
  171. snd_soc_write(codec, WM8523_AIF_CTRL1, aifctrl1);
  172. snd_soc_write(codec, WM8523_AIF_CTRL2, aifctrl2);
  173. return 0;
  174. }
  175. static int wm8523_set_dai_sysclk(struct snd_soc_dai *codec_dai,
  176. int clk_id, unsigned int freq, int dir)
  177. {
  178. struct snd_soc_codec *codec = codec_dai->codec;
  179. struct wm8523_priv *wm8523 = snd_soc_codec_get_drvdata(codec);
  180. unsigned int val;
  181. int i;
  182. wm8523->sysclk = freq;
  183. wm8523->rate_constraint.count = 0;
  184. for (i = 0; i < ARRAY_SIZE(lrclk_ratios); i++) {
  185. val = freq / lrclk_ratios[i].ratio;
  186. /* Check that it's a standard rate since core can't
  187. * cope with others and having the odd rates confuses
  188. * constraint matching.
  189. */
  190. switch (val) {
  191. case 8000:
  192. case 11025:
  193. case 16000:
  194. case 22050:
  195. case 32000:
  196. case 44100:
  197. case 48000:
  198. case 64000:
  199. case 88200:
  200. case 96000:
  201. case 176400:
  202. case 192000:
  203. dev_dbg(codec->dev, "Supported sample rate: %dHz\n",
  204. val);
  205. wm8523->rate_constraint_list[i] = val;
  206. wm8523->rate_constraint.count++;
  207. break;
  208. default:
  209. dev_dbg(codec->dev, "Skipping sample rate: %dHz\n",
  210. val);
  211. }
  212. }
  213. /* Need at least one supported rate... */
  214. if (wm8523->rate_constraint.count == 0)
  215. return -EINVAL;
  216. return 0;
  217. }
  218. static int wm8523_set_dai_fmt(struct snd_soc_dai *codec_dai,
  219. unsigned int fmt)
  220. {
  221. struct snd_soc_codec *codec = codec_dai->codec;
  222. u16 aifctrl1 = snd_soc_read(codec, WM8523_AIF_CTRL1);
  223. aifctrl1 &= ~(WM8523_BCLK_INV_MASK | WM8523_LRCLK_INV_MASK |
  224. WM8523_FMT_MASK | WM8523_AIF_MSTR_MASK);
  225. switch (fmt & SND_SOC_DAIFMT_MASTER_MASK) {
  226. case SND_SOC_DAIFMT_CBM_CFM:
  227. aifctrl1 |= WM8523_AIF_MSTR;
  228. break;
  229. case SND_SOC_DAIFMT_CBS_CFS:
  230. break;
  231. default:
  232. return -EINVAL;
  233. }
  234. switch (fmt & SND_SOC_DAIFMT_FORMAT_MASK) {
  235. case SND_SOC_DAIFMT_I2S:
  236. aifctrl1 |= 0x0002;
  237. break;
  238. case SND_SOC_DAIFMT_RIGHT_J:
  239. break;
  240. case SND_SOC_DAIFMT_LEFT_J:
  241. aifctrl1 |= 0x0001;
  242. break;
  243. case SND_SOC_DAIFMT_DSP_A:
  244. aifctrl1 |= 0x0003;
  245. break;
  246. case SND_SOC_DAIFMT_DSP_B:
  247. aifctrl1 |= 0x0023;
  248. break;
  249. default:
  250. return -EINVAL;
  251. }
  252. switch (fmt & SND_SOC_DAIFMT_INV_MASK) {
  253. case SND_SOC_DAIFMT_NB_NF:
  254. break;
  255. case SND_SOC_DAIFMT_IB_IF:
  256. aifctrl1 |= WM8523_BCLK_INV | WM8523_LRCLK_INV;
  257. break;
  258. case SND_SOC_DAIFMT_IB_NF:
  259. aifctrl1 |= WM8523_BCLK_INV;
  260. break;
  261. case SND_SOC_DAIFMT_NB_IF:
  262. aifctrl1 |= WM8523_LRCLK_INV;
  263. break;
  264. default:
  265. return -EINVAL;
  266. }
  267. snd_soc_write(codec, WM8523_AIF_CTRL1, aifctrl1);
  268. return 0;
  269. }
  270. static int wm8523_set_bias_level(struct snd_soc_codec *codec,
  271. enum snd_soc_bias_level level)
  272. {
  273. struct wm8523_priv *wm8523 = snd_soc_codec_get_drvdata(codec);
  274. u16 *reg_cache = codec->reg_cache;
  275. int ret, i;
  276. switch (level) {
  277. case SND_SOC_BIAS_ON:
  278. break;
  279. case SND_SOC_BIAS_PREPARE:
  280. /* Full power on */
  281. snd_soc_update_bits(codec, WM8523_PSCTRL1,
  282. WM8523_SYS_ENA_MASK, 3);
  283. break;
  284. case SND_SOC_BIAS_STANDBY:
  285. if (codec->dapm.bias_level == SND_SOC_BIAS_OFF) {
  286. ret = regulator_bulk_enable(ARRAY_SIZE(wm8523->supplies),
  287. wm8523->supplies);
  288. if (ret != 0) {
  289. dev_err(codec->dev,
  290. "Failed to enable supplies: %d\n",
  291. ret);
  292. return ret;
  293. }
  294. /* Initial power up */
  295. snd_soc_update_bits(codec, WM8523_PSCTRL1,
  296. WM8523_SYS_ENA_MASK, 1);
  297. /* Sync back default/cached values */
  298. for (i = WM8523_AIF_CTRL1;
  299. i < WM8523_MAX_REGISTER; i++)
  300. snd_soc_write(codec, i, reg_cache[i]);
  301. msleep(100);
  302. }
  303. /* Power up to mute */
  304. snd_soc_update_bits(codec, WM8523_PSCTRL1,
  305. WM8523_SYS_ENA_MASK, 2);
  306. break;
  307. case SND_SOC_BIAS_OFF:
  308. /* The chip runs through the power down sequence for us. */
  309. snd_soc_update_bits(codec, WM8523_PSCTRL1,
  310. WM8523_SYS_ENA_MASK, 0);
  311. msleep(100);
  312. regulator_bulk_disable(ARRAY_SIZE(wm8523->supplies),
  313. wm8523->supplies);
  314. break;
  315. }
  316. codec->dapm.bias_level = level;
  317. return 0;
  318. }
  319. #define WM8523_RATES SNDRV_PCM_RATE_8000_192000
  320. #define WM8523_FORMATS (SNDRV_PCM_FMTBIT_S16_LE | SNDRV_PCM_FMTBIT_S20_3LE |\
  321. SNDRV_PCM_FMTBIT_S24_LE | SNDRV_PCM_FMTBIT_S32_LE)
  322. static struct snd_soc_dai_ops wm8523_dai_ops = {
  323. .startup = wm8523_startup,
  324. .hw_params = wm8523_hw_params,
  325. .set_sysclk = wm8523_set_dai_sysclk,
  326. .set_fmt = wm8523_set_dai_fmt,
  327. };
  328. static struct snd_soc_dai_driver wm8523_dai = {
  329. .name = "wm8523-hifi",
  330. .playback = {
  331. .stream_name = "Playback",
  332. .channels_min = 2, /* Mono modes not yet supported */
  333. .channels_max = 2,
  334. .rates = WM8523_RATES,
  335. .formats = WM8523_FORMATS,
  336. },
  337. .ops = &wm8523_dai_ops,
  338. };
  339. #ifdef CONFIG_PM
  340. static int wm8523_suspend(struct snd_soc_codec *codec, pm_message_t state)
  341. {
  342. wm8523_set_bias_level(codec, SND_SOC_BIAS_OFF);
  343. return 0;
  344. }
  345. static int wm8523_resume(struct snd_soc_codec *codec)
  346. {
  347. wm8523_set_bias_level(codec, SND_SOC_BIAS_STANDBY);
  348. return 0;
  349. }
  350. #else
  351. #define wm8523_suspend NULL
  352. #define wm8523_resume NULL
  353. #endif
  354. static int wm8523_probe(struct snd_soc_codec *codec)
  355. {
  356. struct wm8523_priv *wm8523 = snd_soc_codec_get_drvdata(codec);
  357. int ret, i;
  358. codec->hw_write = (hw_write_t)i2c_master_send;
  359. wm8523->rate_constraint.list = &wm8523->rate_constraint_list[0];
  360. wm8523->rate_constraint.count =
  361. ARRAY_SIZE(wm8523->rate_constraint_list);
  362. ret = snd_soc_codec_set_cache_io(codec, 8, 16, wm8523->control_type);
  363. if (ret != 0) {
  364. dev_err(codec->dev, "Failed to set cache I/O: %d\n", ret);
  365. return ret;
  366. }
  367. for (i = 0; i < ARRAY_SIZE(wm8523->supplies); i++)
  368. wm8523->supplies[i].supply = wm8523_supply_names[i];
  369. ret = regulator_bulk_get(codec->dev, ARRAY_SIZE(wm8523->supplies),
  370. wm8523->supplies);
  371. if (ret != 0) {
  372. dev_err(codec->dev, "Failed to request supplies: %d\n", ret);
  373. return ret;
  374. }
  375. ret = regulator_bulk_enable(ARRAY_SIZE(wm8523->supplies),
  376. wm8523->supplies);
  377. if (ret != 0) {
  378. dev_err(codec->dev, "Failed to enable supplies: %d\n", ret);
  379. goto err_get;
  380. }
  381. ret = snd_soc_read(codec, WM8523_DEVICE_ID);
  382. if (ret < 0) {
  383. dev_err(codec->dev, "Failed to read ID register\n");
  384. goto err_enable;
  385. }
  386. if (ret != wm8523_reg[WM8523_DEVICE_ID]) {
  387. dev_err(codec->dev, "Device is not a WM8523, ID is %x\n", ret);
  388. ret = -EINVAL;
  389. goto err_enable;
  390. }
  391. ret = snd_soc_read(codec, WM8523_REVISION);
  392. if (ret < 0) {
  393. dev_err(codec->dev, "Failed to read revision register\n");
  394. goto err_enable;
  395. }
  396. dev_info(codec->dev, "revision %c\n",
  397. (ret & WM8523_CHIP_REV_MASK) + 'A');
  398. ret = wm8523_reset(codec);
  399. if (ret < 0) {
  400. dev_err(codec->dev, "Failed to issue reset\n");
  401. goto err_enable;
  402. }
  403. /* Change some default settings - latch VU and enable ZC */
  404. snd_soc_update_bits(codec, WM8523_DAC_GAINR,
  405. WM8523_DACR_VU, WM8523_DACR_VU);
  406. snd_soc_update_bits(codec, WM8523_DAC_CTRL3, WM8523_ZC, WM8523_ZC);
  407. wm8523_set_bias_level(codec, SND_SOC_BIAS_STANDBY);
  408. /* Bias level configuration will have done an extra enable */
  409. regulator_bulk_disable(ARRAY_SIZE(wm8523->supplies), wm8523->supplies);
  410. snd_soc_add_controls(codec, wm8523_snd_controls,
  411. ARRAY_SIZE(wm8523_snd_controls));
  412. wm8523_add_widgets(codec);
  413. return 0;
  414. err_enable:
  415. regulator_bulk_disable(ARRAY_SIZE(wm8523->supplies), wm8523->supplies);
  416. err_get:
  417. regulator_bulk_free(ARRAY_SIZE(wm8523->supplies), wm8523->supplies);
  418. return ret;
  419. }
  420. static int wm8523_remove(struct snd_soc_codec *codec)
  421. {
  422. struct wm8523_priv *wm8523 = snd_soc_codec_get_drvdata(codec);
  423. wm8523_set_bias_level(codec, SND_SOC_BIAS_OFF);
  424. regulator_bulk_free(ARRAY_SIZE(wm8523->supplies), wm8523->supplies);
  425. return 0;
  426. }
  427. static struct snd_soc_codec_driver soc_codec_dev_wm8523 = {
  428. .probe = wm8523_probe,
  429. .remove = wm8523_remove,
  430. .suspend = wm8523_suspend,
  431. .resume = wm8523_resume,
  432. .set_bias_level = wm8523_set_bias_level,
  433. .reg_cache_size = WM8523_REGISTER_COUNT,
  434. .reg_word_size = sizeof(u16),
  435. .reg_cache_default = wm8523_reg,
  436. .volatile_register = wm8523_volatile_register,
  437. };
  438. static const struct of_device_id wm8523_of_match[] = {
  439. { .compatible = "wlf,wm8523" },
  440. { },
  441. };
  442. #if defined(CONFIG_I2C) || defined(CONFIG_I2C_MODULE)
  443. static __devinit int wm8523_i2c_probe(struct i2c_client *i2c,
  444. const struct i2c_device_id *id)
  445. {
  446. struct wm8523_priv *wm8523;
  447. int ret;
  448. wm8523 = kzalloc(sizeof(struct wm8523_priv), GFP_KERNEL);
  449. if (wm8523 == NULL)
  450. return -ENOMEM;
  451. i2c_set_clientdata(i2c, wm8523);
  452. wm8523->control_type = SND_SOC_I2C;
  453. ret = snd_soc_register_codec(&i2c->dev,
  454. &soc_codec_dev_wm8523, &wm8523_dai, 1);
  455. if (ret < 0)
  456. kfree(wm8523);
  457. return ret;
  458. }
  459. static __devexit int wm8523_i2c_remove(struct i2c_client *client)
  460. {
  461. snd_soc_unregister_codec(&client->dev);
  462. kfree(i2c_get_clientdata(client));
  463. return 0;
  464. }
  465. static const struct i2c_device_id wm8523_i2c_id[] = {
  466. { "wm8523", 0 },
  467. { }
  468. };
  469. MODULE_DEVICE_TABLE(i2c, wm8523_i2c_id);
  470. static struct i2c_driver wm8523_i2c_driver = {
  471. .driver = {
  472. .name = "wm8523",
  473. .owner = THIS_MODULE,
  474. .of_match_table = wm8523_of_match,
  475. },
  476. .probe = wm8523_i2c_probe,
  477. .remove = __devexit_p(wm8523_i2c_remove),
  478. .id_table = wm8523_i2c_id,
  479. };
  480. #endif
  481. static int __init wm8523_modinit(void)
  482. {
  483. int ret;
  484. #if defined(CONFIG_I2C) || defined(CONFIG_I2C_MODULE)
  485. ret = i2c_add_driver(&wm8523_i2c_driver);
  486. if (ret != 0) {
  487. printk(KERN_ERR "Failed to register WM8523 I2C driver: %d\n",
  488. ret);
  489. }
  490. #endif
  491. return 0;
  492. }
  493. module_init(wm8523_modinit);
  494. static void __exit wm8523_exit(void)
  495. {
  496. #if defined(CONFIG_I2C) || defined(CONFIG_I2C_MODULE)
  497. i2c_del_driver(&wm8523_i2c_driver);
  498. #endif
  499. }
  500. module_exit(wm8523_exit);
  501. MODULE_DESCRIPTION("ASoC WM8523 driver");
  502. MODULE_AUTHOR("Mark Brown <broonie@opensource.wolfsonmicro.com>");
  503. MODULE_LICENSE("GPL");