apply.c 18 KB

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  1. /*
  2. * Copyright (C) 2011 Texas Instruments
  3. * Author: Tomi Valkeinen <tomi.valkeinen@ti.com>
  4. *
  5. * This program is free software; you can redistribute it and/or modify it
  6. * under the terms of the GNU General Public License version 2 as published by
  7. * the Free Software Foundation.
  8. *
  9. * This program is distributed in the hope that it will be useful, but WITHOUT
  10. * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
  11. * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for
  12. * more details.
  13. *
  14. * You should have received a copy of the GNU General Public License along with
  15. * this program. If not, see <http://www.gnu.org/licenses/>.
  16. */
  17. #define DSS_SUBSYS_NAME "APPLY"
  18. #include <linux/kernel.h>
  19. #include <linux/slab.h>
  20. #include <linux/spinlock.h>
  21. #include <linux/jiffies.h>
  22. #include <video/omapdss.h>
  23. #include "dss.h"
  24. #include "dss_features.h"
  25. /*
  26. * We have 4 levels of cache for the dispc settings. First two are in SW and
  27. * the latter two in HW.
  28. *
  29. * +--------------------+
  30. * |overlay/manager_info|
  31. * +--------------------+
  32. * v
  33. * apply()
  34. * v
  35. * +--------------------+
  36. * | info |
  37. * +--------------------+
  38. * v
  39. * write_regs()
  40. * v
  41. * +--------------------+
  42. * | shadow registers |
  43. * +--------------------+
  44. * v
  45. * VFP or lcd/digit_enable
  46. * v
  47. * +--------------------+
  48. * | registers |
  49. * +--------------------+
  50. */
  51. struct ovl_priv_data {
  52. /* If true, cache changed, but not written to shadow registers. Set
  53. * in apply(), cleared when registers written. */
  54. bool dirty;
  55. /* If true, shadow registers contain changed values not yet in real
  56. * registers. Set when writing to shadow registers, cleared at
  57. * VSYNC/EVSYNC */
  58. bool shadow_dirty;
  59. bool enabled;
  60. struct omap_overlay_info info;
  61. enum omap_channel channel;
  62. u32 fifo_low;
  63. u32 fifo_high;
  64. };
  65. struct mgr_priv_data {
  66. /* If true, cache changed, but not written to shadow registers. Set
  67. * in apply(), cleared when registers written. */
  68. bool dirty;
  69. /* If true, shadow registers contain changed values not yet in real
  70. * registers. Set when writing to shadow registers, cleared at
  71. * VSYNC/EVSYNC */
  72. bool shadow_dirty;
  73. struct omap_overlay_manager_info info;
  74. bool manual_update;
  75. bool do_manual_update;
  76. /* If true, a display is enabled using this manager */
  77. bool enabled;
  78. };
  79. static struct {
  80. struct ovl_priv_data ovl_priv_data_array[MAX_DSS_OVERLAYS];
  81. struct mgr_priv_data mgr_priv_data_array[MAX_DSS_MANAGERS];
  82. bool irq_enabled;
  83. } dss_data;
  84. /* protects dss_data */
  85. static spinlock_t data_lock;
  86. /* lock for blocking functions */
  87. static DEFINE_MUTEX(apply_lock);
  88. static struct ovl_priv_data *get_ovl_priv(struct omap_overlay *ovl)
  89. {
  90. return &dss_data.ovl_priv_data_array[ovl->id];
  91. }
  92. static struct mgr_priv_data *get_mgr_priv(struct omap_overlay_manager *mgr)
  93. {
  94. return &dss_data.mgr_priv_data_array[mgr->id];
  95. }
  96. void dss_apply_init(void)
  97. {
  98. spin_lock_init(&data_lock);
  99. }
  100. static bool ovl_manual_update(struct omap_overlay *ovl)
  101. {
  102. return ovl->manager->device->caps & OMAP_DSS_DISPLAY_CAP_MANUAL_UPDATE;
  103. }
  104. static bool mgr_manual_update(struct omap_overlay_manager *mgr)
  105. {
  106. return mgr->device->caps & OMAP_DSS_DISPLAY_CAP_MANUAL_UPDATE;
  107. }
  108. static int overlay_enabled(struct omap_overlay *ovl)
  109. {
  110. return ovl->info.enabled && ovl->manager && ovl->manager->device;
  111. }
  112. int dss_mgr_wait_for_go(struct omap_overlay_manager *mgr)
  113. {
  114. unsigned long timeout = msecs_to_jiffies(500);
  115. struct mgr_priv_data *mp;
  116. u32 irq;
  117. int r;
  118. int i;
  119. struct omap_dss_device *dssdev = mgr->device;
  120. if (!dssdev || dssdev->state != OMAP_DSS_DISPLAY_ACTIVE)
  121. return 0;
  122. if (mgr_manual_update(mgr))
  123. return 0;
  124. irq = dispc_mgr_get_vsync_irq(mgr->id);
  125. mp = get_mgr_priv(mgr);
  126. i = 0;
  127. while (1) {
  128. unsigned long flags;
  129. bool shadow_dirty, dirty;
  130. spin_lock_irqsave(&data_lock, flags);
  131. dirty = mp->dirty;
  132. shadow_dirty = mp->shadow_dirty;
  133. spin_unlock_irqrestore(&data_lock, flags);
  134. if (!dirty && !shadow_dirty) {
  135. r = 0;
  136. break;
  137. }
  138. /* 4 iterations is the worst case:
  139. * 1 - initial iteration, dirty = true (between VFP and VSYNC)
  140. * 2 - first VSYNC, dirty = true
  141. * 3 - dirty = false, shadow_dirty = true
  142. * 4 - shadow_dirty = false */
  143. if (i++ == 3) {
  144. DSSERR("mgr(%d)->wait_for_go() not finishing\n",
  145. mgr->id);
  146. r = 0;
  147. break;
  148. }
  149. r = omap_dispc_wait_for_irq_interruptible_timeout(irq, timeout);
  150. if (r == -ERESTARTSYS)
  151. break;
  152. if (r) {
  153. DSSERR("mgr(%d)->wait_for_go() timeout\n", mgr->id);
  154. break;
  155. }
  156. }
  157. return r;
  158. }
  159. int dss_mgr_wait_for_go_ovl(struct omap_overlay *ovl)
  160. {
  161. unsigned long timeout = msecs_to_jiffies(500);
  162. struct ovl_priv_data *op;
  163. struct omap_dss_device *dssdev;
  164. u32 irq;
  165. int r;
  166. int i;
  167. if (!ovl->manager)
  168. return 0;
  169. dssdev = ovl->manager->device;
  170. if (!dssdev || dssdev->state != OMAP_DSS_DISPLAY_ACTIVE)
  171. return 0;
  172. if (ovl_manual_update(ovl))
  173. return 0;
  174. irq = dispc_mgr_get_vsync_irq(ovl->manager->id);
  175. op = get_ovl_priv(ovl);
  176. i = 0;
  177. while (1) {
  178. unsigned long flags;
  179. bool shadow_dirty, dirty;
  180. spin_lock_irqsave(&data_lock, flags);
  181. dirty = op->dirty;
  182. shadow_dirty = op->shadow_dirty;
  183. spin_unlock_irqrestore(&data_lock, flags);
  184. if (!dirty && !shadow_dirty) {
  185. r = 0;
  186. break;
  187. }
  188. /* 4 iterations is the worst case:
  189. * 1 - initial iteration, dirty = true (between VFP and VSYNC)
  190. * 2 - first VSYNC, dirty = true
  191. * 3 - dirty = false, shadow_dirty = true
  192. * 4 - shadow_dirty = false */
  193. if (i++ == 3) {
  194. DSSERR("ovl(%d)->wait_for_go() not finishing\n",
  195. ovl->id);
  196. r = 0;
  197. break;
  198. }
  199. r = omap_dispc_wait_for_irq_interruptible_timeout(irq, timeout);
  200. if (r == -ERESTARTSYS)
  201. break;
  202. if (r) {
  203. DSSERR("ovl(%d)->wait_for_go() timeout\n", ovl->id);
  204. break;
  205. }
  206. }
  207. return r;
  208. }
  209. static int dss_ovl_write_regs(struct omap_overlay *ovl)
  210. {
  211. struct ovl_priv_data *op;
  212. struct omap_overlay_info *oi;
  213. bool ilace, replication;
  214. int r;
  215. DSSDBGF("%d", ovl->id);
  216. op = get_ovl_priv(ovl);
  217. oi = &op->info;
  218. if (!op->enabled) {
  219. dispc_ovl_enable(ovl->id, 0);
  220. return 0;
  221. }
  222. replication = dss_use_replication(ovl->manager->device, oi->color_mode);
  223. ilace = ovl->manager->device->type == OMAP_DISPLAY_TYPE_VENC;
  224. dispc_ovl_set_channel_out(ovl->id, op->channel);
  225. r = dispc_ovl_setup(ovl->id, oi, ilace, replication);
  226. if (r) {
  227. /* this shouldn't happen */
  228. DSSERR("dispc_ovl_setup failed for ovl %d\n", ovl->id);
  229. dispc_ovl_enable(ovl->id, 0);
  230. return r;
  231. }
  232. dispc_ovl_set_fifo_threshold(ovl->id, op->fifo_low, op->fifo_high);
  233. dispc_ovl_enable(ovl->id, 1);
  234. return 0;
  235. }
  236. static void dss_mgr_write_regs(struct omap_overlay_manager *mgr)
  237. {
  238. struct mgr_priv_data *mp;
  239. struct omap_overlay_manager_info *mi;
  240. DSSDBGF("%d", mgr->id);
  241. mp = get_mgr_priv(mgr);
  242. mi = &mp->info;
  243. dispc_mgr_setup(mgr->id, mi);
  244. }
  245. /* dss_write_regs() tries to write values from cache to shadow registers.
  246. * It writes only to those managers/overlays that are not busy.
  247. * returns 0 if everything could be written to shadow registers.
  248. * returns 1 if not everything could be written to shadow registers. */
  249. static int dss_write_regs(void)
  250. {
  251. struct omap_overlay *ovl;
  252. struct omap_overlay_manager *mgr;
  253. struct ovl_priv_data *op;
  254. struct mgr_priv_data *mp;
  255. const int num_ovls = dss_feat_get_num_ovls();
  256. const int num_mgrs = dss_feat_get_num_mgrs();
  257. int i;
  258. int r;
  259. bool mgr_busy[MAX_DSS_MANAGERS];
  260. bool mgr_go[MAX_DSS_MANAGERS];
  261. bool busy;
  262. r = 0;
  263. busy = false;
  264. for (i = 0; i < num_mgrs; i++) {
  265. mgr_busy[i] = dispc_mgr_go_busy(i);
  266. mgr_go[i] = false;
  267. }
  268. /* Commit overlay settings */
  269. for (i = 0; i < num_ovls; ++i) {
  270. ovl = omap_dss_get_overlay(i);
  271. op = get_ovl_priv(ovl);
  272. if (!op->dirty)
  273. continue;
  274. mp = get_mgr_priv(ovl->manager);
  275. if (mp->manual_update && !mp->do_manual_update)
  276. continue;
  277. if (mgr_busy[op->channel]) {
  278. busy = true;
  279. continue;
  280. }
  281. r = dss_ovl_write_regs(ovl);
  282. if (r)
  283. DSSERR("dss_ovl_write_regs %d failed\n", i);
  284. op->dirty = false;
  285. op->shadow_dirty = true;
  286. mgr_go[op->channel] = true;
  287. }
  288. /* Commit manager settings */
  289. for (i = 0; i < num_mgrs; ++i) {
  290. mgr = omap_dss_get_overlay_manager(i);
  291. mp = get_mgr_priv(mgr);
  292. if (!mp->dirty)
  293. continue;
  294. if (mp->manual_update && !mp->do_manual_update)
  295. continue;
  296. if (mgr_busy[i]) {
  297. busy = true;
  298. continue;
  299. }
  300. dss_mgr_write_regs(mgr);
  301. mp->dirty = false;
  302. mp->shadow_dirty = true;
  303. mgr_go[i] = true;
  304. }
  305. /* set GO */
  306. for (i = 0; i < num_mgrs; ++i) {
  307. mgr = omap_dss_get_overlay_manager(i);
  308. mp = get_mgr_priv(mgr);
  309. if (!mgr_go[i])
  310. continue;
  311. /* We don't need GO with manual update display. LCD iface will
  312. * always be turned off after frame, and new settings will be
  313. * taken in to use at next update */
  314. if (!mp->manual_update)
  315. dispc_mgr_go(i);
  316. }
  317. if (busy)
  318. r = 1;
  319. else
  320. r = 0;
  321. return r;
  322. }
  323. void dss_mgr_start_update(struct omap_overlay_manager *mgr)
  324. {
  325. struct mgr_priv_data *mp = get_mgr_priv(mgr);
  326. struct ovl_priv_data *op;
  327. struct omap_overlay *ovl;
  328. unsigned long flags;
  329. spin_lock_irqsave(&data_lock, flags);
  330. mp->do_manual_update = true;
  331. dss_write_regs();
  332. mp->do_manual_update = false;
  333. list_for_each_entry(ovl, &mgr->overlays, list) {
  334. op = get_ovl_priv(ovl);
  335. op->shadow_dirty = false;
  336. }
  337. mp->shadow_dirty = false;
  338. dispc_mgr_enable(mgr->id, true);
  339. spin_unlock_irqrestore(&data_lock, flags);
  340. }
  341. static void dss_apply_irq_handler(void *data, u32 mask);
  342. static void dss_register_vsync_isr(void)
  343. {
  344. const int num_mgrs = dss_feat_get_num_mgrs();
  345. u32 mask;
  346. int r, i;
  347. mask = 0;
  348. for (i = 0; i < num_mgrs; ++i)
  349. mask |= dispc_mgr_get_vsync_irq(i);
  350. r = omap_dispc_register_isr(dss_apply_irq_handler, NULL, mask);
  351. WARN_ON(r);
  352. dss_data.irq_enabled = true;
  353. }
  354. static void dss_unregister_vsync_isr(void)
  355. {
  356. const int num_mgrs = dss_feat_get_num_mgrs();
  357. u32 mask;
  358. int r, i;
  359. mask = 0;
  360. for (i = 0; i < num_mgrs; ++i)
  361. mask |= dispc_mgr_get_vsync_irq(i);
  362. r = omap_dispc_unregister_isr(dss_apply_irq_handler, NULL, mask);
  363. WARN_ON(r);
  364. dss_data.irq_enabled = false;
  365. }
  366. static void dss_apply_irq_handler(void *data, u32 mask)
  367. {
  368. struct omap_overlay *ovl;
  369. struct omap_overlay_manager *mgr;
  370. struct mgr_priv_data *mp;
  371. struct ovl_priv_data *op;
  372. const int num_ovls = dss_feat_get_num_ovls();
  373. const int num_mgrs = dss_feat_get_num_mgrs();
  374. int i, r;
  375. bool mgr_busy[MAX_DSS_MANAGERS];
  376. for (i = 0; i < num_mgrs; i++)
  377. mgr_busy[i] = dispc_mgr_go_busy(i);
  378. spin_lock(&data_lock);
  379. for (i = 0; i < num_ovls; ++i) {
  380. ovl = omap_dss_get_overlay(i);
  381. op = get_ovl_priv(ovl);
  382. if (!mgr_busy[op->channel])
  383. op->shadow_dirty = false;
  384. }
  385. for (i = 0; i < num_mgrs; ++i) {
  386. mgr = omap_dss_get_overlay_manager(i);
  387. mp = get_mgr_priv(mgr);
  388. if (!mgr_busy[i])
  389. mp->shadow_dirty = false;
  390. }
  391. r = dss_write_regs();
  392. if (r == 1)
  393. goto end;
  394. /* re-read busy flags */
  395. for (i = 0; i < num_mgrs; i++)
  396. mgr_busy[i] = dispc_mgr_go_busy(i);
  397. /* keep running as long as there are busy managers, so that
  398. * we can collect overlay-applied information */
  399. for (i = 0; i < num_mgrs; ++i) {
  400. if (mgr_busy[i])
  401. goto end;
  402. }
  403. dss_unregister_vsync_isr();
  404. end:
  405. spin_unlock(&data_lock);
  406. }
  407. static void omap_dss_mgr_apply_ovl(struct omap_overlay *ovl)
  408. {
  409. struct ovl_priv_data *op;
  410. op = get_ovl_priv(ovl);
  411. if (ovl->manager_changed) {
  412. ovl->manager_changed = false;
  413. ovl->info_dirty = true;
  414. }
  415. if (!overlay_enabled(ovl)) {
  416. if (op->enabled) {
  417. op->enabled = false;
  418. op->dirty = true;
  419. }
  420. return;
  421. }
  422. if (!ovl->info_dirty)
  423. return;
  424. ovl->info_dirty = false;
  425. op->dirty = true;
  426. op->info = ovl->info;
  427. op->channel = ovl->manager->id;
  428. op->enabled = true;
  429. }
  430. static void omap_dss_mgr_apply_mgr(struct omap_overlay_manager *mgr)
  431. {
  432. struct mgr_priv_data *mp;
  433. mp = get_mgr_priv(mgr);
  434. if (mgr->device_changed) {
  435. mgr->device_changed = false;
  436. mgr->info_dirty = true;
  437. }
  438. if (!mgr->info_dirty)
  439. return;
  440. if (!mgr->device)
  441. return;
  442. mgr->info_dirty = false;
  443. mp->dirty = true;
  444. mp->info = mgr->info;
  445. mp->manual_update = mgr_manual_update(mgr);
  446. }
  447. static void omap_dss_mgr_apply_ovl_fifos(struct omap_overlay *ovl)
  448. {
  449. struct ovl_priv_data *op;
  450. struct omap_dss_device *dssdev;
  451. u32 size, burst_size;
  452. op = get_ovl_priv(ovl);
  453. if (!op->enabled)
  454. return;
  455. dssdev = ovl->manager->device;
  456. size = dispc_ovl_get_fifo_size(ovl->id);
  457. burst_size = dispc_ovl_get_burst_size(ovl->id);
  458. switch (dssdev->type) {
  459. case OMAP_DISPLAY_TYPE_DPI:
  460. case OMAP_DISPLAY_TYPE_DBI:
  461. case OMAP_DISPLAY_TYPE_SDI:
  462. case OMAP_DISPLAY_TYPE_VENC:
  463. case OMAP_DISPLAY_TYPE_HDMI:
  464. default_get_overlay_fifo_thresholds(ovl->id, size,
  465. burst_size, &op->fifo_low,
  466. &op->fifo_high);
  467. break;
  468. #ifdef CONFIG_OMAP2_DSS_DSI
  469. case OMAP_DISPLAY_TYPE_DSI:
  470. dsi_get_overlay_fifo_thresholds(ovl->id, size,
  471. burst_size, &op->fifo_low,
  472. &op->fifo_high);
  473. break;
  474. #endif
  475. default:
  476. BUG();
  477. }
  478. }
  479. int omap_dss_mgr_apply(struct omap_overlay_manager *mgr)
  480. {
  481. int r;
  482. unsigned long flags;
  483. struct omap_overlay *ovl;
  484. struct mgr_priv_data *mp = get_mgr_priv(mgr);
  485. DSSDBG("omap_dss_mgr_apply(%s)\n", mgr->name);
  486. r = dispc_runtime_get();
  487. if (r)
  488. return r;
  489. spin_lock_irqsave(&data_lock, flags);
  490. /* Configure overlays */
  491. list_for_each_entry(ovl, &mgr->overlays, list)
  492. omap_dss_mgr_apply_ovl(ovl);
  493. /* Configure manager */
  494. omap_dss_mgr_apply_mgr(mgr);
  495. /* Configure overlay fifos */
  496. list_for_each_entry(ovl, &mgr->overlays, list)
  497. omap_dss_mgr_apply_ovl_fifos(ovl);
  498. r = 0;
  499. if (mp->enabled && !mgr_manual_update(mgr)) {
  500. if (!dss_data.irq_enabled)
  501. dss_register_vsync_isr();
  502. dss_write_regs();
  503. }
  504. spin_unlock_irqrestore(&data_lock, flags);
  505. dispc_runtime_put();
  506. return r;
  507. }
  508. void dss_mgr_enable(struct omap_overlay_manager *mgr)
  509. {
  510. struct mgr_priv_data *mp = get_mgr_priv(mgr);
  511. unsigned long flags;
  512. mutex_lock(&apply_lock);
  513. if (!mgr_manual_update(mgr))
  514. dispc_mgr_enable(mgr->id, true);
  515. spin_lock_irqsave(&data_lock, flags);
  516. mp->enabled = true;
  517. spin_unlock_irqrestore(&data_lock, flags);
  518. mutex_unlock(&apply_lock);
  519. }
  520. void dss_mgr_disable(struct omap_overlay_manager *mgr)
  521. {
  522. struct mgr_priv_data *mp = get_mgr_priv(mgr);
  523. unsigned long flags;
  524. mutex_lock(&apply_lock);
  525. if (!mgr_manual_update(mgr))
  526. dispc_mgr_enable(mgr->id, false);
  527. spin_lock_irqsave(&data_lock, flags);
  528. mp->enabled = false;
  529. spin_unlock_irqrestore(&data_lock, flags);
  530. mutex_unlock(&apply_lock);
  531. }
  532. int dss_mgr_set_info(struct omap_overlay_manager *mgr,
  533. struct omap_overlay_manager_info *info)
  534. {
  535. unsigned long flags;
  536. spin_lock_irqsave(&data_lock, flags);
  537. mgr->info = *info;
  538. mgr->info_dirty = true;
  539. spin_unlock_irqrestore(&data_lock, flags);
  540. return 0;
  541. }
  542. void dss_mgr_get_info(struct omap_overlay_manager *mgr,
  543. struct omap_overlay_manager_info *info)
  544. {
  545. unsigned long flags;
  546. spin_lock_irqsave(&data_lock, flags);
  547. *info = mgr->info;
  548. spin_unlock_irqrestore(&data_lock, flags);
  549. }
  550. int dss_mgr_set_device(struct omap_overlay_manager *mgr,
  551. struct omap_dss_device *dssdev)
  552. {
  553. int r;
  554. mutex_lock(&apply_lock);
  555. if (dssdev->manager) {
  556. DSSERR("display '%s' already has a manager '%s'\n",
  557. dssdev->name, dssdev->manager->name);
  558. r = -EINVAL;
  559. goto err;
  560. }
  561. if ((mgr->supported_displays & dssdev->type) == 0) {
  562. DSSERR("display '%s' does not support manager '%s'\n",
  563. dssdev->name, mgr->name);
  564. r = -EINVAL;
  565. goto err;
  566. }
  567. dssdev->manager = mgr;
  568. mgr->device = dssdev;
  569. mgr->device_changed = true;
  570. mutex_unlock(&apply_lock);
  571. return 0;
  572. err:
  573. mutex_unlock(&apply_lock);
  574. return r;
  575. }
  576. int dss_mgr_unset_device(struct omap_overlay_manager *mgr)
  577. {
  578. int r;
  579. mutex_lock(&apply_lock);
  580. if (!mgr->device) {
  581. DSSERR("failed to unset display, display not set.\n");
  582. r = -EINVAL;
  583. goto err;
  584. }
  585. /*
  586. * Don't allow currently enabled displays to have the overlay manager
  587. * pulled out from underneath them
  588. */
  589. if (mgr->device->state != OMAP_DSS_DISPLAY_DISABLED) {
  590. r = -EINVAL;
  591. goto err;
  592. }
  593. mgr->device->manager = NULL;
  594. mgr->device = NULL;
  595. mgr->device_changed = true;
  596. mutex_unlock(&apply_lock);
  597. return 0;
  598. err:
  599. mutex_unlock(&apply_lock);
  600. return r;
  601. }
  602. int dss_ovl_set_info(struct omap_overlay *ovl,
  603. struct omap_overlay_info *info)
  604. {
  605. unsigned long flags;
  606. spin_lock_irqsave(&data_lock, flags);
  607. ovl->info = *info;
  608. ovl->info_dirty = true;
  609. spin_unlock_irqrestore(&data_lock, flags);
  610. return 0;
  611. }
  612. void dss_ovl_get_info(struct omap_overlay *ovl,
  613. struct omap_overlay_info *info)
  614. {
  615. unsigned long flags;
  616. spin_lock_irqsave(&data_lock, flags);
  617. *info = ovl->info;
  618. spin_unlock_irqrestore(&data_lock, flags);
  619. }
  620. int dss_ovl_set_manager(struct omap_overlay *ovl,
  621. struct omap_overlay_manager *mgr)
  622. {
  623. int r;
  624. if (!mgr)
  625. return -EINVAL;
  626. mutex_lock(&apply_lock);
  627. if (ovl->manager) {
  628. DSSERR("overlay '%s' already has a manager '%s'\n",
  629. ovl->name, ovl->manager->name);
  630. r = -EINVAL;
  631. goto err;
  632. }
  633. if (ovl->info.enabled) {
  634. DSSERR("overlay has to be disabled to change the manager\n");
  635. r = -EINVAL;
  636. goto err;
  637. }
  638. ovl->manager = mgr;
  639. list_add_tail(&ovl->list, &mgr->overlays);
  640. ovl->manager_changed = true;
  641. /* XXX: When there is an overlay on a DSI manual update display, and
  642. * the overlay is first disabled, then moved to tv, and enabled, we
  643. * seem to get SYNC_LOST_DIGIT error.
  644. *
  645. * Waiting doesn't seem to help, but updating the manual update display
  646. * after disabling the overlay seems to fix this. This hints that the
  647. * overlay is perhaps somehow tied to the LCD output until the output
  648. * is updated.
  649. *
  650. * Userspace workaround for this is to update the LCD after disabling
  651. * the overlay, but before moving the overlay to TV.
  652. */
  653. mutex_unlock(&apply_lock);
  654. return 0;
  655. err:
  656. mutex_unlock(&apply_lock);
  657. return r;
  658. }
  659. int dss_ovl_unset_manager(struct omap_overlay *ovl)
  660. {
  661. int r;
  662. mutex_lock(&apply_lock);
  663. if (!ovl->manager) {
  664. DSSERR("failed to detach overlay: manager not set\n");
  665. r = -EINVAL;
  666. goto err;
  667. }
  668. if (ovl->info.enabled) {
  669. DSSERR("overlay has to be disabled to unset the manager\n");
  670. r = -EINVAL;
  671. goto err;
  672. }
  673. ovl->manager = NULL;
  674. list_del(&ovl->list);
  675. ovl->manager_changed = true;
  676. mutex_unlock(&apply_lock);
  677. return 0;
  678. err:
  679. mutex_unlock(&apply_lock);
  680. return r;
  681. }