nouveau_drv.c 13 KB

123456789101112131415161718192021222324252627282930313233343536373839404142434445464748495051525354555657585960616263646566676869707172737475767778798081828384858687888990919293949596979899100101102103104105106107108109110111112113114115116117118119120121122123124125126127128129130131132133134135136137138139140141142143144145146147148149150151152153154155156157158159160161162163164165166167168169170171172173174175176177178179180181182183184185186187188189190191192193194195196197198199200201202203204205206207208209210211212213214215216217218219220221222223224225226227228229230231232233234235236237238239240241242243244245246247248249250251252253254255256257258259260261262263264265266267268269270271272273274275276277278279280281282283284285286287288289290291292293294295296297298299300301302303304305306307308309310311312313314315316317318319320321322323324325326327328329330331332333334335336337338339340341342343344345346347348349350351352353354355356357358359360361362363364365366367368369370371372373374375376377378379380381382383384385386387388389390391392393394395396397398399400401402403404405406407408409410411412413414415416417418419420421422423424425426427428429430431432433434435436437438439440441442443444445446447448449450451452453454455456457458459460461462463464465466467468469470471472473474475476477478479480481482483484485486487488489
  1. /*
  2. * Copyright 2005 Stephane Marchesin.
  3. * All Rights Reserved.
  4. *
  5. * Permission is hereby granted, free of charge, to any person obtaining a
  6. * copy of this software and associated documentation files (the "Software"),
  7. * to deal in the Software without restriction, including without limitation
  8. * the rights to use, copy, modify, merge, publish, distribute, sublicense,
  9. * and/or sell copies of the Software, and to permit persons to whom the
  10. * Software is furnished to do so, subject to the following conditions:
  11. *
  12. * The above copyright notice and this permission notice (including the next
  13. * paragraph) shall be included in all copies or substantial portions of the
  14. * Software.
  15. *
  16. * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
  17. * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
  18. * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL
  19. * VA LINUX SYSTEMS AND/OR ITS SUPPLIERS BE LIABLE FOR ANY CLAIM, DAMAGES OR
  20. * OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE,
  21. * ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR
  22. * OTHER DEALINGS IN THE SOFTWARE.
  23. */
  24. #include <linux/console.h>
  25. #include <linux/module.h>
  26. #include "drmP.h"
  27. #include "drm.h"
  28. #include "drm_crtc_helper.h"
  29. #include "nouveau_drv.h"
  30. #include "nouveau_hw.h"
  31. #include "nouveau_fb.h"
  32. #include "nouveau_fbcon.h"
  33. #include "nouveau_pm.h"
  34. #include "nv50_display.h"
  35. #include "drm_pciids.h"
  36. MODULE_PARM_DESC(agpmode, "AGP mode (0 to disable AGP)");
  37. int nouveau_agpmode = -1;
  38. module_param_named(agpmode, nouveau_agpmode, int, 0400);
  39. MODULE_PARM_DESC(modeset, "Enable kernel modesetting");
  40. int nouveau_modeset = -1;
  41. module_param_named(modeset, nouveau_modeset, int, 0400);
  42. MODULE_PARM_DESC(vbios, "Override default VBIOS location");
  43. char *nouveau_vbios;
  44. module_param_named(vbios, nouveau_vbios, charp, 0400);
  45. MODULE_PARM_DESC(vram_pushbuf, "Force DMA push buffers to be in VRAM");
  46. int nouveau_vram_pushbuf;
  47. module_param_named(vram_pushbuf, nouveau_vram_pushbuf, int, 0400);
  48. MODULE_PARM_DESC(vram_notify, "Force DMA notifiers to be in VRAM");
  49. int nouveau_vram_notify = 0;
  50. module_param_named(vram_notify, nouveau_vram_notify, int, 0400);
  51. MODULE_PARM_DESC(duallink, "Allow dual-link TMDS (>=GeForce 8)");
  52. int nouveau_duallink = 1;
  53. module_param_named(duallink, nouveau_duallink, int, 0400);
  54. MODULE_PARM_DESC(uscript_lvds, "LVDS output script table ID (>=GeForce 8)");
  55. int nouveau_uscript_lvds = -1;
  56. module_param_named(uscript_lvds, nouveau_uscript_lvds, int, 0400);
  57. MODULE_PARM_DESC(uscript_tmds, "TMDS output script table ID (>=GeForce 8)");
  58. int nouveau_uscript_tmds = -1;
  59. module_param_named(uscript_tmds, nouveau_uscript_tmds, int, 0400);
  60. MODULE_PARM_DESC(ignorelid, "Ignore ACPI lid status");
  61. int nouveau_ignorelid = 0;
  62. module_param_named(ignorelid, nouveau_ignorelid, int, 0400);
  63. MODULE_PARM_DESC(noaccel, "Disable all acceleration");
  64. int nouveau_noaccel = -1;
  65. module_param_named(noaccel, nouveau_noaccel, int, 0400);
  66. MODULE_PARM_DESC(nofbaccel, "Disable fbcon acceleration");
  67. int nouveau_nofbaccel = 0;
  68. module_param_named(nofbaccel, nouveau_nofbaccel, int, 0400);
  69. MODULE_PARM_DESC(force_post, "Force POST");
  70. int nouveau_force_post = 0;
  71. module_param_named(force_post, nouveau_force_post, int, 0400);
  72. MODULE_PARM_DESC(override_conntype, "Ignore DCB connector type");
  73. int nouveau_override_conntype = 0;
  74. module_param_named(override_conntype, nouveau_override_conntype, int, 0400);
  75. MODULE_PARM_DESC(tv_disable, "Disable TV-out detection\n");
  76. int nouveau_tv_disable = 0;
  77. module_param_named(tv_disable, nouveau_tv_disable, int, 0400);
  78. MODULE_PARM_DESC(tv_norm, "Default TV norm.\n"
  79. "\t\tSupported: PAL, PAL-M, PAL-N, PAL-Nc, NTSC-M, NTSC-J,\n"
  80. "\t\t\thd480i, hd480p, hd576i, hd576p, hd720p, hd1080i.\n"
  81. "\t\tDefault: PAL\n"
  82. "\t\t*NOTE* Ignored for cards with external TV encoders.");
  83. char *nouveau_tv_norm;
  84. module_param_named(tv_norm, nouveau_tv_norm, charp, 0400);
  85. MODULE_PARM_DESC(reg_debug, "Register access debug bitmask:\n"
  86. "\t\t0x1 mc, 0x2 video, 0x4 fb, 0x8 extdev,\n"
  87. "\t\t0x10 crtc, 0x20 ramdac, 0x40 vgacrtc, 0x80 rmvio,\n"
  88. "\t\t0x100 vgaattr, 0x200 EVO (G80+). ");
  89. int nouveau_reg_debug;
  90. module_param_named(reg_debug, nouveau_reg_debug, int, 0600);
  91. MODULE_PARM_DESC(perflvl, "Performance level (default: boot)\n");
  92. char *nouveau_perflvl;
  93. module_param_named(perflvl, nouveau_perflvl, charp, 0400);
  94. MODULE_PARM_DESC(perflvl_wr, "Allow perflvl changes (warning: dangerous!)\n");
  95. int nouveau_perflvl_wr;
  96. module_param_named(perflvl_wr, nouveau_perflvl_wr, int, 0400);
  97. MODULE_PARM_DESC(msi, "Enable MSI (default: off)\n");
  98. int nouveau_msi;
  99. module_param_named(msi, nouveau_msi, int, 0400);
  100. MODULE_PARM_DESC(ctxfw, "Use external HUB/GPC ucode (fermi)\n");
  101. int nouveau_ctxfw;
  102. module_param_named(ctxfw, nouveau_ctxfw, int, 0400);
  103. int nouveau_fbpercrtc;
  104. #if 0
  105. module_param_named(fbpercrtc, nouveau_fbpercrtc, int, 0400);
  106. #endif
  107. static struct pci_device_id pciidlist[] = {
  108. {
  109. PCI_DEVICE(PCI_VENDOR_ID_NVIDIA, PCI_ANY_ID),
  110. .class = PCI_BASE_CLASS_DISPLAY << 16,
  111. .class_mask = 0xff << 16,
  112. },
  113. {
  114. PCI_DEVICE(PCI_VENDOR_ID_NVIDIA_SGS, PCI_ANY_ID),
  115. .class = PCI_BASE_CLASS_DISPLAY << 16,
  116. .class_mask = 0xff << 16,
  117. },
  118. {}
  119. };
  120. MODULE_DEVICE_TABLE(pci, pciidlist);
  121. static struct drm_driver driver;
  122. static int __devinit
  123. nouveau_pci_probe(struct pci_dev *pdev, const struct pci_device_id *ent)
  124. {
  125. return drm_get_pci_dev(pdev, ent, &driver);
  126. }
  127. static void
  128. nouveau_pci_remove(struct pci_dev *pdev)
  129. {
  130. struct drm_device *dev = pci_get_drvdata(pdev);
  131. drm_put_dev(dev);
  132. }
  133. int
  134. nouveau_pci_suspend(struct pci_dev *pdev, pm_message_t pm_state)
  135. {
  136. struct drm_device *dev = pci_get_drvdata(pdev);
  137. struct drm_nouveau_private *dev_priv = dev->dev_private;
  138. struct nouveau_instmem_engine *pinstmem = &dev_priv->engine.instmem;
  139. struct nouveau_fifo_engine *pfifo = &dev_priv->engine.fifo;
  140. struct nouveau_channel *chan;
  141. struct drm_crtc *crtc;
  142. int ret, i, e;
  143. if (pm_state.event == PM_EVENT_PRETHAW)
  144. return 0;
  145. if (dev->switch_power_state == DRM_SWITCH_POWER_OFF)
  146. return 0;
  147. NV_INFO(dev, "Disabling display...\n");
  148. nouveau_display_fini(dev);
  149. NV_INFO(dev, "Disabling fbcon...\n");
  150. nouveau_fbcon_set_suspend(dev, 1);
  151. NV_INFO(dev, "Unpinning framebuffer(s)...\n");
  152. list_for_each_entry(crtc, &dev->mode_config.crtc_list, head) {
  153. struct nouveau_framebuffer *nouveau_fb;
  154. nouveau_fb = nouveau_framebuffer(crtc->fb);
  155. if (!nouveau_fb || !nouveau_fb->nvbo)
  156. continue;
  157. nouveau_bo_unpin(nouveau_fb->nvbo);
  158. }
  159. list_for_each_entry(crtc, &dev->mode_config.crtc_list, head) {
  160. struct nouveau_crtc *nv_crtc = nouveau_crtc(crtc);
  161. nouveau_bo_unmap(nv_crtc->cursor.nvbo);
  162. nouveau_bo_unpin(nv_crtc->cursor.nvbo);
  163. }
  164. NV_INFO(dev, "Evicting buffers...\n");
  165. ttm_bo_evict_mm(&dev_priv->ttm.bdev, TTM_PL_VRAM);
  166. NV_INFO(dev, "Idling channels...\n");
  167. for (i = 0; i < pfifo->channels; i++) {
  168. chan = dev_priv->channels.ptr[i];
  169. if (chan && chan->pushbuf_bo)
  170. nouveau_channel_idle(chan);
  171. }
  172. pfifo->reassign(dev, false);
  173. pfifo->disable(dev);
  174. pfifo->unload_context(dev);
  175. for (e = NVOBJ_ENGINE_NR - 1; e >= 0; e--) {
  176. if (!dev_priv->eng[e])
  177. continue;
  178. ret = dev_priv->eng[e]->fini(dev, e, true);
  179. if (ret) {
  180. NV_ERROR(dev, "... engine %d failed: %d\n", e, ret);
  181. goto out_abort;
  182. }
  183. }
  184. ret = pinstmem->suspend(dev);
  185. if (ret) {
  186. NV_ERROR(dev, "... failed: %d\n", ret);
  187. goto out_abort;
  188. }
  189. NV_INFO(dev, "Suspending GPU objects...\n");
  190. ret = nouveau_gpuobj_suspend(dev);
  191. if (ret) {
  192. NV_ERROR(dev, "... failed: %d\n", ret);
  193. pinstmem->resume(dev);
  194. goto out_abort;
  195. }
  196. NV_INFO(dev, "And we're gone!\n");
  197. pci_save_state(pdev);
  198. if (pm_state.event == PM_EVENT_SUSPEND) {
  199. pci_disable_device(pdev);
  200. pci_set_power_state(pdev, PCI_D3hot);
  201. }
  202. return 0;
  203. out_abort:
  204. NV_INFO(dev, "Re-enabling acceleration..\n");
  205. for (e = e + 1; e < NVOBJ_ENGINE_NR; e++) {
  206. if (dev_priv->eng[e])
  207. dev_priv->eng[e]->init(dev, e);
  208. }
  209. pfifo->enable(dev);
  210. pfifo->reassign(dev, true);
  211. return ret;
  212. }
  213. int
  214. nouveau_pci_resume(struct pci_dev *pdev)
  215. {
  216. struct drm_device *dev = pci_get_drvdata(pdev);
  217. struct drm_nouveau_private *dev_priv = dev->dev_private;
  218. struct nouveau_engine *engine = &dev_priv->engine;
  219. struct drm_crtc *crtc;
  220. int ret, i;
  221. if (dev->switch_power_state == DRM_SWITCH_POWER_OFF)
  222. return 0;
  223. NV_INFO(dev, "We're back, enabling device...\n");
  224. pci_set_power_state(pdev, PCI_D0);
  225. pci_restore_state(pdev);
  226. if (pci_enable_device(pdev))
  227. return -1;
  228. pci_set_master(dev->pdev);
  229. /* Make sure the AGP controller is in a consistent state */
  230. if (dev_priv->gart_info.type == NOUVEAU_GART_AGP)
  231. nouveau_mem_reset_agp(dev);
  232. /* Make the CRTCs accessible */
  233. engine->display.early_init(dev);
  234. NV_INFO(dev, "POSTing device...\n");
  235. ret = nouveau_run_vbios_init(dev);
  236. if (ret)
  237. return ret;
  238. if (dev_priv->gart_info.type == NOUVEAU_GART_AGP) {
  239. ret = nouveau_mem_init_agp(dev);
  240. if (ret) {
  241. NV_ERROR(dev, "error reinitialising AGP: %d\n", ret);
  242. return ret;
  243. }
  244. }
  245. NV_INFO(dev, "Restoring GPU objects...\n");
  246. nouveau_gpuobj_resume(dev);
  247. NV_INFO(dev, "Reinitialising engines...\n");
  248. engine->instmem.resume(dev);
  249. engine->mc.init(dev);
  250. engine->timer.init(dev);
  251. engine->fb.init(dev);
  252. for (i = 0; i < NVOBJ_ENGINE_NR; i++) {
  253. if (dev_priv->eng[i])
  254. dev_priv->eng[i]->init(dev, i);
  255. }
  256. engine->fifo.init(dev);
  257. nouveau_irq_postinstall(dev);
  258. /* Re-write SKIPS, they'll have been lost over the suspend */
  259. if (nouveau_vram_pushbuf) {
  260. struct nouveau_channel *chan;
  261. int j;
  262. for (i = 0; i < dev_priv->engine.fifo.channels; i++) {
  263. chan = dev_priv->channels.ptr[i];
  264. if (!chan || !chan->pushbuf_bo)
  265. continue;
  266. for (j = 0; j < NOUVEAU_DMA_SKIPS; j++)
  267. nouveau_bo_wr32(chan->pushbuf_bo, i, 0);
  268. }
  269. }
  270. nouveau_pm_resume(dev);
  271. NV_INFO(dev, "Restoring mode...\n");
  272. list_for_each_entry(crtc, &dev->mode_config.crtc_list, head) {
  273. struct nouveau_framebuffer *nouveau_fb;
  274. nouveau_fb = nouveau_framebuffer(crtc->fb);
  275. if (!nouveau_fb || !nouveau_fb->nvbo)
  276. continue;
  277. nouveau_bo_pin(nouveau_fb->nvbo, TTM_PL_FLAG_VRAM);
  278. }
  279. list_for_each_entry(crtc, &dev->mode_config.crtc_list, head) {
  280. struct nouveau_crtc *nv_crtc = nouveau_crtc(crtc);
  281. ret = nouveau_bo_pin(nv_crtc->cursor.nvbo, TTM_PL_FLAG_VRAM);
  282. if (!ret)
  283. ret = nouveau_bo_map(nv_crtc->cursor.nvbo);
  284. if (ret)
  285. NV_ERROR(dev, "Could not pin/map cursor.\n");
  286. }
  287. nouveau_fbcon_set_suspend(dev, 0);
  288. nouveau_fbcon_zfill_all(dev);
  289. nouveau_display_init(dev);
  290. /* Force CLUT to get re-loaded during modeset */
  291. list_for_each_entry(crtc, &dev->mode_config.crtc_list, head) {
  292. struct nouveau_crtc *nv_crtc = nouveau_crtc(crtc);
  293. nv_crtc->lut.depth = 0;
  294. }
  295. drm_helper_resume_force_mode(dev);
  296. list_for_each_entry(crtc, &dev->mode_config.crtc_list, head) {
  297. struct nouveau_crtc *nv_crtc = nouveau_crtc(crtc);
  298. u32 offset = nv_crtc->cursor.nvbo->bo.offset;
  299. nv_crtc->cursor.set_offset(nv_crtc, offset);
  300. nv_crtc->cursor.set_pos(nv_crtc, nv_crtc->cursor_saved_x,
  301. nv_crtc->cursor_saved_y);
  302. }
  303. return 0;
  304. }
  305. static const struct file_operations nouveau_driver_fops = {
  306. .owner = THIS_MODULE,
  307. .open = drm_open,
  308. .release = drm_release,
  309. .unlocked_ioctl = drm_ioctl,
  310. .mmap = nouveau_ttm_mmap,
  311. .poll = drm_poll,
  312. .fasync = drm_fasync,
  313. .read = drm_read,
  314. #if defined(CONFIG_COMPAT)
  315. .compat_ioctl = nouveau_compat_ioctl,
  316. #endif
  317. .llseek = noop_llseek,
  318. };
  319. static struct drm_driver driver = {
  320. .driver_features =
  321. DRIVER_USE_AGP | DRIVER_PCI_DMA | DRIVER_SG |
  322. DRIVER_HAVE_IRQ | DRIVER_IRQ_SHARED | DRIVER_GEM |
  323. DRIVER_MODESET,
  324. .load = nouveau_load,
  325. .firstopen = nouveau_firstopen,
  326. .lastclose = nouveau_lastclose,
  327. .unload = nouveau_unload,
  328. .open = nouveau_open,
  329. .preclose = nouveau_preclose,
  330. .postclose = nouveau_postclose,
  331. #if defined(CONFIG_DRM_NOUVEAU_DEBUG)
  332. .debugfs_init = nouveau_debugfs_init,
  333. .debugfs_cleanup = nouveau_debugfs_takedown,
  334. #endif
  335. .irq_preinstall = nouveau_irq_preinstall,
  336. .irq_postinstall = nouveau_irq_postinstall,
  337. .irq_uninstall = nouveau_irq_uninstall,
  338. .irq_handler = nouveau_irq_handler,
  339. .get_vblank_counter = drm_vblank_count,
  340. .enable_vblank = nouveau_vblank_enable,
  341. .disable_vblank = nouveau_vblank_disable,
  342. .reclaim_buffers = drm_core_reclaim_buffers,
  343. .ioctls = nouveau_ioctls,
  344. .fops = &nouveau_driver_fops,
  345. .gem_init_object = nouveau_gem_object_new,
  346. .gem_free_object = nouveau_gem_object_del,
  347. .gem_open_object = nouveau_gem_object_open,
  348. .gem_close_object = nouveau_gem_object_close,
  349. .dumb_create = nouveau_display_dumb_create,
  350. .dumb_map_offset = nouveau_display_dumb_map_offset,
  351. .dumb_destroy = nouveau_display_dumb_destroy,
  352. .name = DRIVER_NAME,
  353. .desc = DRIVER_DESC,
  354. #ifdef GIT_REVISION
  355. .date = GIT_REVISION,
  356. #else
  357. .date = DRIVER_DATE,
  358. #endif
  359. .major = DRIVER_MAJOR,
  360. .minor = DRIVER_MINOR,
  361. .patchlevel = DRIVER_PATCHLEVEL,
  362. };
  363. static struct pci_driver nouveau_pci_driver = {
  364. .name = DRIVER_NAME,
  365. .id_table = pciidlist,
  366. .probe = nouveau_pci_probe,
  367. .remove = nouveau_pci_remove,
  368. .suspend = nouveau_pci_suspend,
  369. .resume = nouveau_pci_resume
  370. };
  371. static int __init nouveau_init(void)
  372. {
  373. driver.num_ioctls = nouveau_max_ioctl;
  374. if (nouveau_modeset == -1) {
  375. #ifdef CONFIG_VGA_CONSOLE
  376. if (vgacon_text_force())
  377. nouveau_modeset = 0;
  378. else
  379. #endif
  380. nouveau_modeset = 1;
  381. }
  382. if (!nouveau_modeset)
  383. return 0;
  384. nouveau_register_dsm_handler();
  385. return drm_pci_init(&driver, &nouveau_pci_driver);
  386. }
  387. static void __exit nouveau_exit(void)
  388. {
  389. if (!nouveau_modeset)
  390. return;
  391. drm_pci_exit(&driver, &nouveau_pci_driver);
  392. nouveau_unregister_dsm_handler();
  393. }
  394. module_init(nouveau_init);
  395. module_exit(nouveau_exit);
  396. MODULE_AUTHOR(DRIVER_AUTHOR);
  397. MODULE_DESCRIPTION(DRIVER_DESC);
  398. MODULE_LICENSE("GPL and additional rights");