mpc52xx-device-tree-bindings.txt 7.4 KB

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  1. MPC52xx Device Tree Bindings
  2. ----------------------------
  3. (c) 2006 Secret Lab Technologies Ltd
  4. Grant Likely <grant.likely at secretlab.ca>
  5. I - Introduction
  6. ================
  7. Boards supported by the arch/powerpc architecture require device tree be
  8. passed by the boot loader to the kernel at boot time. The device tree
  9. describes what devices are present on the board and how they are
  10. connected. The device tree can either be passed as a binary blob (as
  11. described in Documentation/powerpc/booting-without-of.txt), or passed
  12. by Open Firmare (IEEE 1275) compatible firmware using an OF compatible
  13. client interface API.
  14. This document specifies the requirements on the device-tree for mpc52xx
  15. based boards. These requirements are above and beyond the details
  16. specified in either the OpenFirmware spec or booting-without-of.txt
  17. All new mpc52xx-based boards are expected to match this document. In
  18. cases where this document is not sufficient to support a new board port,
  19. this document should be updated as part of adding the new board support.
  20. II - Philosophy
  21. ===============
  22. The core of this document is naming convention. The whole point of
  23. defining this convention is to reduce or eliminate the number of
  24. special cases required to support a 52xx board. If all 52xx boards
  25. follow the same convention, then generic 52xx support code will work
  26. rather than coding special cases for each new board.
  27. This section tries to capture the thought process behind why the naming
  28. convention is what it is.
  29. 1. Node names
  30. -------------
  31. There is strong convention/requirements already established for children
  32. of the root node. 'cpus' describes the processor cores, 'memory'
  33. describes memory, and 'chosen' provides boot configuration. Other nodes
  34. are added to describe devices attached to the processor local bus.
  35. Following convention already established with other system-on-chip
  36. processors, MPC52xx boards must have an 'soc5200' node as a child of the
  37. root node.
  38. The soc5200 node holds child nodes for all on chip devices. Child nodes
  39. are typically named after the configured function. ie. the FEC node is
  40. named 'ethernet', and a PSC in uart mode is named 'serial'.
  41. 2. device_type property
  42. -----------------------
  43. similar to the node name convention above; the device_type reflects the
  44. configured function of a device. ie. 'serial' for a uart and 'spi' for
  45. an spi controller. However, while node names *should* reflect the
  46. configured function, device_type *must* match the configured function
  47. exactly.
  48. 3. compatible property
  49. ----------------------
  50. Since device_type isn't enough to match devices to drivers, there also
  51. needs to be a naming convention for the compatible property. Compatible
  52. is an list of device descriptions sorted from specific to generic. For
  53. the mpc52xx, the required format for each compatible value is
  54. <chip>-<device>[-<mode>]. At the minimum, the list shall contain two
  55. items; the first specifying the exact chip, and the second specifying
  56. mpc52xx for the chip.
  57. ie. ethernet on mpc5200b: compatible = "mpc5200b-ethernet\0mpc52xx-ethernet"
  58. The idea here is that most drivers will match to the most generic field
  59. in the compatible list (mpc52xx-*), but can also test the more specific
  60. field for enabling bug fixes or extra features.
  61. Modal devices, like PSCs, also append the configured function to the
  62. end of the compatible field. ie. A PSC in i2s mode would specify
  63. "mpc52xx-psc-i2s", not "mpc52xx-i2s". This convention is chosen to
  64. avoid naming conflicts with non-psc devices providing the same
  65. function. For example, "mpc52xx-spi" and "mpc52xx-psc-spi" describe
  66. the mpc5200 simple spi device and a PSC spi mode respectively.
  67. If the soc device is more generic and present on other SOCs, the
  68. compatible property can specify the more generic device type also.
  69. ie. mscan: compatible = "mpc5200-mscan\0mpc52xx-mscan\0fsl,mscan";
  70. At the time of writing, exact chip may be either 'mpc5200' or
  71. 'mpc5200b'.
  72. Device drivers should always try to match as generically as possible.
  73. III - Structure
  74. ===============
  75. The device tree for an mpc52xx board follows the structure defined in
  76. booting-without-of.txt with the following additional notes:
  77. 0) the root node
  78. ----------------
  79. Typical root description node; see booting-without-of
  80. 1) The cpus node
  81. ----------------
  82. The cpus node follows the basic layout described in booting-without-of.
  83. The bus-frequency property holds the XLB bus frequency
  84. The clock-frequency property holds the core frequency
  85. 2) The memory node
  86. ------------------
  87. Typical memory description node; see booting-without-of.
  88. 3) The soc5200 node
  89. -------------------
  90. This node describes the on chip SOC peripherals. Every mpc52xx based
  91. board will have this node, and as such there is a common naming
  92. convention for SOC devices.
  93. Required properties:
  94. name type description
  95. ---- ---- -----------
  96. device_type string must be "soc"
  97. ranges int should be <0 baseaddr baseaddr+10000>
  98. reg int must be <baseaddr 10000>
  99. Recommended properties:
  100. name type description
  101. ---- ---- -----------
  102. compatible string should be "<chip>-soc\0mpc52xx-soc"
  103. ie. "mpc5200b-soc\0mpc52xx-soc"
  104. #interrupt-cells int must be <3>. If it is not defined
  105. here then it must be defined in every
  106. soc device node.
  107. bus-frequency int IPB bus frequency in HZ. Clock rate
  108. used by most of the soc devices.
  109. Defining it here avoids needing it
  110. added to every device node.
  111. 4) soc5200 child nodes
  112. ----------------------
  113. Any on chip SOC devices available to Linux must appear as soc5200 child nodes.
  114. Note: in the tables below, '*' matches all <chip> values. ie.
  115. *-pic would translate to "mpc5200-pic\0mpc52xx-pic"
  116. Required soc5200 child nodes:
  117. name device_type compatible Description
  118. ---- ----------- ---------- -----------
  119. cdm@<addr> cdm *-cmd Clock Distribution
  120. pic@<addr> interrupt-controller *-pic need an interrupt
  121. controller to boot
  122. bestcomm@<addr> dma-controller *-bestcomm 52xx pic also requires
  123. the bestcomm device
  124. Recommended soc5200 child nodes; populate as needed for your board
  125. name device_type compatible Description
  126. ---- ----------- ---------- -----------
  127. gpt@<addr> gpt *-gpt General purpose timers
  128. rtc@<addr> rtc *-rtc Real time clock
  129. mscan@<addr> mscan *-mscan CAN bus controller
  130. pci@<addr> pci *-pci PCI bridge
  131. serial@<addr> serial *-psc-uart PSC in serial mode
  132. i2s@<addr> i2s *-psc-i2s PSC in i2s mode
  133. ac97@<addr> ac97 *-psc-ac97 PSC in ac97 mode
  134. spi@<addr> spi *-psc-spi PSC in spi mode
  135. irda@<addr> irda *-psc-irda PSC in IrDA mode
  136. spi@<addr> spi *-spi MPC52xx spi device
  137. ethernet@<addr> network *-fec MPC52xx ethernet device
  138. ata@<addr> ata *-ata IDE ATA interface
  139. i2c@<addr> i2c *-i2c I2C controller
  140. usb@<addr> usb-ohci-be *-ohci,ohci-be USB controller
  141. xlb@<addr> xlb *-xlb XLB arbritrator
  142. IV - Extra Notes
  143. ================
  144. 1. Interrupt mapping
  145. --------------------
  146. The mpc52xx pic driver splits hardware IRQ numbers into two levels. The
  147. split reflects the layout of the PIC hardware itself, which groups
  148. interrupts into one of three groups; CRIT, MAIN or PERP. Also, the
  149. Bestcomm dma engine has it's own set of interrupt sources which are
  150. cascaded off of peripheral interrupt 0, which the driver interprets as a
  151. fourth group, SDMA.
  152. The interrupts property for device nodes using the mpc52xx pic consists
  153. of three cells; <L1 L2 level>
  154. L1 := [CRIT=0, MAIN=1, PERP=2, SDMA=3]
  155. L2 := interrupt number; directly mapped from the value in the
  156. "ICTL PerStat, MainStat, CritStat Encoded Register"
  157. level := [LEVEL_HIGH=0, EDGE_RISING=1, EDGE_FALLING=2, LEVEL_LOW=3]