rtc-s3c.c 15 KB

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  1. /* drivers/rtc/rtc-s3c.c
  2. *
  3. * Copyright (c) 2010 Samsung Electronics Co., Ltd.
  4. * http://www.samsung.com/
  5. *
  6. * Copyright (c) 2004,2006 Simtec Electronics
  7. * Ben Dooks, <ben@simtec.co.uk>
  8. * http://armlinux.simtec.co.uk/
  9. *
  10. * This program is free software; you can redistribute it and/or modify
  11. * it under the terms of the GNU General Public License version 2 as
  12. * published by the Free Software Foundation.
  13. *
  14. * S3C2410/S3C2440/S3C24XX Internal RTC Driver
  15. */
  16. #include <linux/module.h>
  17. #include <linux/fs.h>
  18. #include <linux/string.h>
  19. #include <linux/init.h>
  20. #include <linux/platform_device.h>
  21. #include <linux/interrupt.h>
  22. #include <linux/rtc.h>
  23. #include <linux/bcd.h>
  24. #include <linux/clk.h>
  25. #include <linux/log2.h>
  26. #include <linux/slab.h>
  27. #include <mach/hardware.h>
  28. #include <asm/uaccess.h>
  29. #include <asm/io.h>
  30. #include <asm/irq.h>
  31. #include <plat/regs-rtc.h>
  32. enum s3c_cpu_type {
  33. TYPE_S3C2410,
  34. TYPE_S3C64XX,
  35. };
  36. /* I have yet to find an S3C implementation with more than one
  37. * of these rtc blocks in */
  38. static struct resource *s3c_rtc_mem;
  39. static struct clk *rtc_clk;
  40. static void __iomem *s3c_rtc_base;
  41. static int s3c_rtc_alarmno = NO_IRQ;
  42. static int s3c_rtc_tickno = NO_IRQ;
  43. static enum s3c_cpu_type s3c_rtc_cpu_type;
  44. static DEFINE_SPINLOCK(s3c_rtc_pie_lock);
  45. /* IRQ Handlers */
  46. static irqreturn_t s3c_rtc_alarmirq(int irq, void *id)
  47. {
  48. struct rtc_device *rdev = id;
  49. rtc_update_irq(rdev, 1, RTC_AF | RTC_IRQF);
  50. if (s3c_rtc_cpu_type == TYPE_S3C64XX)
  51. writeb(S3C2410_INTP_ALM, s3c_rtc_base + S3C2410_INTP);
  52. return IRQ_HANDLED;
  53. }
  54. static irqreturn_t s3c_rtc_tickirq(int irq, void *id)
  55. {
  56. struct rtc_device *rdev = id;
  57. rtc_update_irq(rdev, 1, RTC_PF | RTC_IRQF);
  58. if (s3c_rtc_cpu_type == TYPE_S3C64XX)
  59. writeb(S3C2410_INTP_TIC, s3c_rtc_base + S3C2410_INTP);
  60. return IRQ_HANDLED;
  61. }
  62. /* Update control registers */
  63. static int s3c_rtc_setaie(struct device *dev, unsigned int enabled)
  64. {
  65. unsigned int tmp;
  66. pr_debug("%s: aie=%d\n", __func__, enabled);
  67. tmp = readb(s3c_rtc_base + S3C2410_RTCALM) & ~S3C2410_RTCALM_ALMEN;
  68. if (enabled)
  69. tmp |= S3C2410_RTCALM_ALMEN;
  70. writeb(tmp, s3c_rtc_base + S3C2410_RTCALM);
  71. return 0;
  72. }
  73. static int s3c_rtc_setpie(struct device *dev, int enabled)
  74. {
  75. unsigned int tmp;
  76. pr_debug("%s: pie=%d\n", __func__, enabled);
  77. spin_lock_irq(&s3c_rtc_pie_lock);
  78. if (s3c_rtc_cpu_type == TYPE_S3C64XX) {
  79. tmp = readw(s3c_rtc_base + S3C2410_RTCCON);
  80. tmp &= ~S3C64XX_RTCCON_TICEN;
  81. if (enabled)
  82. tmp |= S3C64XX_RTCCON_TICEN;
  83. writew(tmp, s3c_rtc_base + S3C2410_RTCCON);
  84. } else {
  85. tmp = readb(s3c_rtc_base + S3C2410_TICNT);
  86. tmp &= ~S3C2410_TICNT_ENABLE;
  87. if (enabled)
  88. tmp |= S3C2410_TICNT_ENABLE;
  89. writeb(tmp, s3c_rtc_base + S3C2410_TICNT);
  90. }
  91. spin_unlock_irq(&s3c_rtc_pie_lock);
  92. return 0;
  93. }
  94. static int s3c_rtc_setfreq(struct device *dev, int freq)
  95. {
  96. struct platform_device *pdev = to_platform_device(dev);
  97. struct rtc_device *rtc_dev = platform_get_drvdata(pdev);
  98. unsigned int tmp = 0;
  99. if (!is_power_of_2(freq))
  100. return -EINVAL;
  101. spin_lock_irq(&s3c_rtc_pie_lock);
  102. if (s3c_rtc_cpu_type == TYPE_S3C2410) {
  103. tmp = readb(s3c_rtc_base + S3C2410_TICNT);
  104. tmp &= S3C2410_TICNT_ENABLE;
  105. }
  106. tmp |= (rtc_dev->max_user_freq / freq)-1;
  107. writel(tmp, s3c_rtc_base + S3C2410_TICNT);
  108. spin_unlock_irq(&s3c_rtc_pie_lock);
  109. return 0;
  110. }
  111. /* Time read/write */
  112. static int s3c_rtc_gettime(struct device *dev, struct rtc_time *rtc_tm)
  113. {
  114. unsigned int have_retried = 0;
  115. void __iomem *base = s3c_rtc_base;
  116. retry_get_time:
  117. rtc_tm->tm_min = readb(base + S3C2410_RTCMIN);
  118. rtc_tm->tm_hour = readb(base + S3C2410_RTCHOUR);
  119. rtc_tm->tm_mday = readb(base + S3C2410_RTCDATE);
  120. rtc_tm->tm_mon = readb(base + S3C2410_RTCMON);
  121. rtc_tm->tm_year = readb(base + S3C2410_RTCYEAR);
  122. rtc_tm->tm_sec = readb(base + S3C2410_RTCSEC);
  123. /* the only way to work out wether the system was mid-update
  124. * when we read it is to check the second counter, and if it
  125. * is zero, then we re-try the entire read
  126. */
  127. if (rtc_tm->tm_sec == 0 && !have_retried) {
  128. have_retried = 1;
  129. goto retry_get_time;
  130. }
  131. pr_debug("read time %04d.%02d.%02d %02d:%02d:%02d\n",
  132. 1900 + rtc_tm->tm_year, rtc_tm->tm_mon, rtc_tm->tm_mday,
  133. rtc_tm->tm_hour, rtc_tm->tm_min, rtc_tm->tm_sec);
  134. rtc_tm->tm_sec = bcd2bin(rtc_tm->tm_sec);
  135. rtc_tm->tm_min = bcd2bin(rtc_tm->tm_min);
  136. rtc_tm->tm_hour = bcd2bin(rtc_tm->tm_hour);
  137. rtc_tm->tm_mday = bcd2bin(rtc_tm->tm_mday);
  138. rtc_tm->tm_mon = bcd2bin(rtc_tm->tm_mon);
  139. rtc_tm->tm_year = bcd2bin(rtc_tm->tm_year);
  140. rtc_tm->tm_year += 100;
  141. rtc_tm->tm_mon -= 1;
  142. return rtc_valid_tm(rtc_tm);
  143. }
  144. static int s3c_rtc_settime(struct device *dev, struct rtc_time *tm)
  145. {
  146. void __iomem *base = s3c_rtc_base;
  147. int year = tm->tm_year - 100;
  148. pr_debug("set time %04d.%02d.%02d %02d:%02d:%02d\n",
  149. 1900 + tm->tm_year, tm->tm_mon, tm->tm_mday,
  150. tm->tm_hour, tm->tm_min, tm->tm_sec);
  151. /* we get around y2k by simply not supporting it */
  152. if (year < 0 || year >= 100) {
  153. dev_err(dev, "rtc only supports 100 years\n");
  154. return -EINVAL;
  155. }
  156. writeb(bin2bcd(tm->tm_sec), base + S3C2410_RTCSEC);
  157. writeb(bin2bcd(tm->tm_min), base + S3C2410_RTCMIN);
  158. writeb(bin2bcd(tm->tm_hour), base + S3C2410_RTCHOUR);
  159. writeb(bin2bcd(tm->tm_mday), base + S3C2410_RTCDATE);
  160. writeb(bin2bcd(tm->tm_mon + 1), base + S3C2410_RTCMON);
  161. writeb(bin2bcd(year), base + S3C2410_RTCYEAR);
  162. return 0;
  163. }
  164. static int s3c_rtc_getalarm(struct device *dev, struct rtc_wkalrm *alrm)
  165. {
  166. struct rtc_time *alm_tm = &alrm->time;
  167. void __iomem *base = s3c_rtc_base;
  168. unsigned int alm_en;
  169. alm_tm->tm_sec = readb(base + S3C2410_ALMSEC);
  170. alm_tm->tm_min = readb(base + S3C2410_ALMMIN);
  171. alm_tm->tm_hour = readb(base + S3C2410_ALMHOUR);
  172. alm_tm->tm_mon = readb(base + S3C2410_ALMMON);
  173. alm_tm->tm_mday = readb(base + S3C2410_ALMDATE);
  174. alm_tm->tm_year = readb(base + S3C2410_ALMYEAR);
  175. alm_en = readb(base + S3C2410_RTCALM);
  176. alrm->enabled = (alm_en & S3C2410_RTCALM_ALMEN) ? 1 : 0;
  177. pr_debug("read alarm %d, %04d.%02d.%02d %02d:%02d:%02d\n",
  178. alm_en,
  179. 1900 + alm_tm->tm_year, alm_tm->tm_mon, alm_tm->tm_mday,
  180. alm_tm->tm_hour, alm_tm->tm_min, alm_tm->tm_sec);
  181. /* decode the alarm enable field */
  182. if (alm_en & S3C2410_RTCALM_SECEN)
  183. alm_tm->tm_sec = bcd2bin(alm_tm->tm_sec);
  184. else
  185. alm_tm->tm_sec = -1;
  186. if (alm_en & S3C2410_RTCALM_MINEN)
  187. alm_tm->tm_min = bcd2bin(alm_tm->tm_min);
  188. else
  189. alm_tm->tm_min = -1;
  190. if (alm_en & S3C2410_RTCALM_HOUREN)
  191. alm_tm->tm_hour = bcd2bin(alm_tm->tm_hour);
  192. else
  193. alm_tm->tm_hour = -1;
  194. if (alm_en & S3C2410_RTCALM_DAYEN)
  195. alm_tm->tm_mday = bcd2bin(alm_tm->tm_mday);
  196. else
  197. alm_tm->tm_mday = -1;
  198. if (alm_en & S3C2410_RTCALM_MONEN) {
  199. alm_tm->tm_mon = bcd2bin(alm_tm->tm_mon);
  200. alm_tm->tm_mon -= 1;
  201. } else {
  202. alm_tm->tm_mon = -1;
  203. }
  204. if (alm_en & S3C2410_RTCALM_YEAREN)
  205. alm_tm->tm_year = bcd2bin(alm_tm->tm_year);
  206. else
  207. alm_tm->tm_year = -1;
  208. return 0;
  209. }
  210. static int s3c_rtc_setalarm(struct device *dev, struct rtc_wkalrm *alrm)
  211. {
  212. struct rtc_time *tm = &alrm->time;
  213. void __iomem *base = s3c_rtc_base;
  214. unsigned int alrm_en;
  215. pr_debug("s3c_rtc_setalarm: %d, %04d.%02d.%02d %02d:%02d:%02d\n",
  216. alrm->enabled,
  217. 1900 + tm->tm_year, tm->tm_mon, tm->tm_mday,
  218. tm->tm_hour, tm->tm_min, tm->tm_sec);
  219. alrm_en = readb(base + S3C2410_RTCALM) & S3C2410_RTCALM_ALMEN;
  220. writeb(0x00, base + S3C2410_RTCALM);
  221. if (tm->tm_sec < 60 && tm->tm_sec >= 0) {
  222. alrm_en |= S3C2410_RTCALM_SECEN;
  223. writeb(bin2bcd(tm->tm_sec), base + S3C2410_ALMSEC);
  224. }
  225. if (tm->tm_min < 60 && tm->tm_min >= 0) {
  226. alrm_en |= S3C2410_RTCALM_MINEN;
  227. writeb(bin2bcd(tm->tm_min), base + S3C2410_ALMMIN);
  228. }
  229. if (tm->tm_hour < 24 && tm->tm_hour >= 0) {
  230. alrm_en |= S3C2410_RTCALM_HOUREN;
  231. writeb(bin2bcd(tm->tm_hour), base + S3C2410_ALMHOUR);
  232. }
  233. pr_debug("setting S3C2410_RTCALM to %08x\n", alrm_en);
  234. writeb(alrm_en, base + S3C2410_RTCALM);
  235. s3c_rtc_setaie(dev, alrm->enabled);
  236. return 0;
  237. }
  238. static int s3c_rtc_proc(struct device *dev, struct seq_file *seq)
  239. {
  240. unsigned int ticnt;
  241. if (s3c_rtc_cpu_type == TYPE_S3C64XX) {
  242. ticnt = readw(s3c_rtc_base + S3C2410_RTCCON);
  243. ticnt &= S3C64XX_RTCCON_TICEN;
  244. } else {
  245. ticnt = readb(s3c_rtc_base + S3C2410_TICNT);
  246. ticnt &= S3C2410_TICNT_ENABLE;
  247. }
  248. seq_printf(seq, "periodic_IRQ\t: %s\n", ticnt ? "yes" : "no");
  249. return 0;
  250. }
  251. static int s3c_rtc_open(struct device *dev)
  252. {
  253. struct platform_device *pdev = to_platform_device(dev);
  254. struct rtc_device *rtc_dev = platform_get_drvdata(pdev);
  255. int ret;
  256. ret = request_irq(s3c_rtc_alarmno, s3c_rtc_alarmirq,
  257. IRQF_DISABLED, "s3c2410-rtc alarm", rtc_dev);
  258. if (ret) {
  259. dev_err(dev, "IRQ%d error %d\n", s3c_rtc_alarmno, ret);
  260. return ret;
  261. }
  262. ret = request_irq(s3c_rtc_tickno, s3c_rtc_tickirq,
  263. IRQF_DISABLED, "s3c2410-rtc tick", rtc_dev);
  264. if (ret) {
  265. dev_err(dev, "IRQ%d error %d\n", s3c_rtc_tickno, ret);
  266. goto tick_err;
  267. }
  268. return ret;
  269. tick_err:
  270. free_irq(s3c_rtc_alarmno, rtc_dev);
  271. return ret;
  272. }
  273. static void s3c_rtc_release(struct device *dev)
  274. {
  275. struct platform_device *pdev = to_platform_device(dev);
  276. struct rtc_device *rtc_dev = platform_get_drvdata(pdev);
  277. /* do not clear AIE here, it may be needed for wake */
  278. s3c_rtc_setpie(dev, 0);
  279. free_irq(s3c_rtc_alarmno, rtc_dev);
  280. free_irq(s3c_rtc_tickno, rtc_dev);
  281. }
  282. static const struct rtc_class_ops s3c_rtcops = {
  283. .open = s3c_rtc_open,
  284. .release = s3c_rtc_release,
  285. .read_time = s3c_rtc_gettime,
  286. .set_time = s3c_rtc_settime,
  287. .read_alarm = s3c_rtc_getalarm,
  288. .set_alarm = s3c_rtc_setalarm,
  289. .irq_set_freq = s3c_rtc_setfreq,
  290. .irq_set_state = s3c_rtc_setpie,
  291. .proc = s3c_rtc_proc,
  292. .alarm_irq_enable = s3c_rtc_setaie,
  293. };
  294. static void s3c_rtc_enable(struct platform_device *pdev, int en)
  295. {
  296. void __iomem *base = s3c_rtc_base;
  297. unsigned int tmp;
  298. if (s3c_rtc_base == NULL)
  299. return;
  300. if (!en) {
  301. tmp = readw(base + S3C2410_RTCCON);
  302. if (s3c_rtc_cpu_type == TYPE_S3C64XX)
  303. tmp &= ~S3C64XX_RTCCON_TICEN;
  304. tmp &= ~S3C2410_RTCCON_RTCEN;
  305. writew(tmp, base + S3C2410_RTCCON);
  306. if (s3c_rtc_cpu_type == TYPE_S3C2410) {
  307. tmp = readb(base + S3C2410_TICNT);
  308. tmp &= ~S3C2410_TICNT_ENABLE;
  309. writeb(tmp, base + S3C2410_TICNT);
  310. }
  311. } else {
  312. /* re-enable the device, and check it is ok */
  313. if ((readw(base+S3C2410_RTCCON) & S3C2410_RTCCON_RTCEN) == 0) {
  314. dev_info(&pdev->dev, "rtc disabled, re-enabling\n");
  315. tmp = readw(base + S3C2410_RTCCON);
  316. writew(tmp | S3C2410_RTCCON_RTCEN,
  317. base + S3C2410_RTCCON);
  318. }
  319. if ((readw(base + S3C2410_RTCCON) & S3C2410_RTCCON_CNTSEL)) {
  320. dev_info(&pdev->dev, "removing RTCCON_CNTSEL\n");
  321. tmp = readw(base + S3C2410_RTCCON);
  322. writew(tmp & ~S3C2410_RTCCON_CNTSEL,
  323. base + S3C2410_RTCCON);
  324. }
  325. if ((readw(base + S3C2410_RTCCON) & S3C2410_RTCCON_CLKRST)) {
  326. dev_info(&pdev->dev, "removing RTCCON_CLKRST\n");
  327. tmp = readw(base + S3C2410_RTCCON);
  328. writew(tmp & ~S3C2410_RTCCON_CLKRST,
  329. base + S3C2410_RTCCON);
  330. }
  331. }
  332. }
  333. static int __devexit s3c_rtc_remove(struct platform_device *dev)
  334. {
  335. struct rtc_device *rtc = platform_get_drvdata(dev);
  336. platform_set_drvdata(dev, NULL);
  337. rtc_device_unregister(rtc);
  338. s3c_rtc_setpie(&dev->dev, 0);
  339. s3c_rtc_setaie(&dev->dev, 0);
  340. clk_disable(rtc_clk);
  341. clk_put(rtc_clk);
  342. rtc_clk = NULL;
  343. iounmap(s3c_rtc_base);
  344. release_resource(s3c_rtc_mem);
  345. kfree(s3c_rtc_mem);
  346. return 0;
  347. }
  348. static int __devinit s3c_rtc_probe(struct platform_device *pdev)
  349. {
  350. struct rtc_device *rtc;
  351. struct rtc_time rtc_tm;
  352. struct resource *res;
  353. int ret;
  354. pr_debug("%s: probe=%p\n", __func__, pdev);
  355. /* find the IRQs */
  356. s3c_rtc_tickno = platform_get_irq(pdev, 1);
  357. if (s3c_rtc_tickno < 0) {
  358. dev_err(&pdev->dev, "no irq for rtc tick\n");
  359. return -ENOENT;
  360. }
  361. s3c_rtc_alarmno = platform_get_irq(pdev, 0);
  362. if (s3c_rtc_alarmno < 0) {
  363. dev_err(&pdev->dev, "no irq for alarm\n");
  364. return -ENOENT;
  365. }
  366. pr_debug("s3c2410_rtc: tick irq %d, alarm irq %d\n",
  367. s3c_rtc_tickno, s3c_rtc_alarmno);
  368. /* get the memory region */
  369. res = platform_get_resource(pdev, IORESOURCE_MEM, 0);
  370. if (res == NULL) {
  371. dev_err(&pdev->dev, "failed to get memory region resource\n");
  372. return -ENOENT;
  373. }
  374. s3c_rtc_mem = request_mem_region(res->start,
  375. res->end-res->start+1,
  376. pdev->name);
  377. if (s3c_rtc_mem == NULL) {
  378. dev_err(&pdev->dev, "failed to reserve memory region\n");
  379. ret = -ENOENT;
  380. goto err_nores;
  381. }
  382. s3c_rtc_base = ioremap(res->start, res->end - res->start + 1);
  383. if (s3c_rtc_base == NULL) {
  384. dev_err(&pdev->dev, "failed ioremap()\n");
  385. ret = -EINVAL;
  386. goto err_nomap;
  387. }
  388. rtc_clk = clk_get(&pdev->dev, "rtc");
  389. if (IS_ERR(rtc_clk)) {
  390. dev_err(&pdev->dev, "failed to find rtc clock source\n");
  391. ret = PTR_ERR(rtc_clk);
  392. rtc_clk = NULL;
  393. goto err_clk;
  394. }
  395. clk_enable(rtc_clk);
  396. /* check to see if everything is setup correctly */
  397. s3c_rtc_enable(pdev, 1);
  398. pr_debug("s3c2410_rtc: RTCCON=%02x\n",
  399. readw(s3c_rtc_base + S3C2410_RTCCON));
  400. device_init_wakeup(&pdev->dev, 1);
  401. /* register RTC and exit */
  402. rtc = rtc_device_register("s3c", &pdev->dev, &s3c_rtcops,
  403. THIS_MODULE);
  404. if (IS_ERR(rtc)) {
  405. dev_err(&pdev->dev, "cannot attach rtc\n");
  406. ret = PTR_ERR(rtc);
  407. goto err_nortc;
  408. }
  409. s3c_rtc_cpu_type = platform_get_device_id(pdev)->driver_data;
  410. /* Check RTC Time */
  411. s3c_rtc_gettime(NULL, &rtc_tm);
  412. if (rtc_valid_tm(&rtc_tm)) {
  413. rtc_tm.tm_year = 100;
  414. rtc_tm.tm_mon = 0;
  415. rtc_tm.tm_mday = 1;
  416. rtc_tm.tm_hour = 0;
  417. rtc_tm.tm_min = 0;
  418. rtc_tm.tm_sec = 0;
  419. s3c_rtc_settime(NULL, &rtc_tm);
  420. dev_warn(&pdev->dev, "warning: invalid RTC value so initializing it\n");
  421. }
  422. if (s3c_rtc_cpu_type == TYPE_S3C64XX)
  423. rtc->max_user_freq = 32768;
  424. else
  425. rtc->max_user_freq = 128;
  426. platform_set_drvdata(pdev, rtc);
  427. s3c_rtc_setfreq(&pdev->dev, 1);
  428. return 0;
  429. err_nortc:
  430. s3c_rtc_enable(pdev, 0);
  431. clk_disable(rtc_clk);
  432. clk_put(rtc_clk);
  433. err_clk:
  434. iounmap(s3c_rtc_base);
  435. err_nomap:
  436. release_resource(s3c_rtc_mem);
  437. err_nores:
  438. return ret;
  439. }
  440. #ifdef CONFIG_PM
  441. /* RTC Power management control */
  442. static int ticnt_save, ticnt_en_save;
  443. static int s3c_rtc_suspend(struct platform_device *pdev, pm_message_t state)
  444. {
  445. /* save TICNT for anyone using periodic interrupts */
  446. ticnt_save = readb(s3c_rtc_base + S3C2410_TICNT);
  447. if (s3c_rtc_cpu_type == TYPE_S3C64XX) {
  448. ticnt_en_save = readw(s3c_rtc_base + S3C2410_RTCCON);
  449. ticnt_en_save &= S3C64XX_RTCCON_TICEN;
  450. }
  451. s3c_rtc_enable(pdev, 0);
  452. if (device_may_wakeup(&pdev->dev))
  453. enable_irq_wake(s3c_rtc_alarmno);
  454. return 0;
  455. }
  456. static int s3c_rtc_resume(struct platform_device *pdev)
  457. {
  458. unsigned int tmp;
  459. s3c_rtc_enable(pdev, 1);
  460. writeb(ticnt_save, s3c_rtc_base + S3C2410_TICNT);
  461. if (s3c_rtc_cpu_type == TYPE_S3C64XX && ticnt_en_save) {
  462. tmp = readw(s3c_rtc_base + S3C2410_RTCCON);
  463. writew(tmp | ticnt_en_save, s3c_rtc_base + S3C2410_RTCCON);
  464. }
  465. if (device_may_wakeup(&pdev->dev))
  466. disable_irq_wake(s3c_rtc_alarmno);
  467. return 0;
  468. }
  469. #else
  470. #define s3c_rtc_suspend NULL
  471. #define s3c_rtc_resume NULL
  472. #endif
  473. static struct platform_device_id s3c_rtc_driver_ids[] = {
  474. {
  475. .name = "s3c2410-rtc",
  476. .driver_data = TYPE_S3C2410,
  477. }, {
  478. .name = "s3c64xx-rtc",
  479. .driver_data = TYPE_S3C64XX,
  480. },
  481. { }
  482. };
  483. MODULE_DEVICE_TABLE(platform, s3c_rtc_driver_ids);
  484. static struct platform_driver s3c_rtc_driver = {
  485. .probe = s3c_rtc_probe,
  486. .remove = __devexit_p(s3c_rtc_remove),
  487. .suspend = s3c_rtc_suspend,
  488. .resume = s3c_rtc_resume,
  489. .id_table = s3c_rtc_driver_ids,
  490. .driver = {
  491. .name = "s3c-rtc",
  492. .owner = THIS_MODULE,
  493. },
  494. };
  495. static char __initdata banner[] = "S3C24XX RTC, (c) 2004,2006 Simtec Electronics\n";
  496. static int __init s3c_rtc_init(void)
  497. {
  498. printk(banner);
  499. return platform_driver_register(&s3c_rtc_driver);
  500. }
  501. static void __exit s3c_rtc_exit(void)
  502. {
  503. platform_driver_unregister(&s3c_rtc_driver);
  504. }
  505. module_init(s3c_rtc_init);
  506. module_exit(s3c_rtc_exit);
  507. MODULE_DESCRIPTION("Samsung S3C RTC Driver");
  508. MODULE_AUTHOR("Ben Dooks <ben@simtec.co.uk>");
  509. MODULE_LICENSE("GPL");
  510. MODULE_ALIAS("platform:s3c2410-rtc");