bnx2x_stats.c 58 KB

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  1. /* bnx2x_stats.c: Broadcom Everest network driver.
  2. *
  3. * Copyright (c) 2007-2012 Broadcom Corporation
  4. *
  5. * This program is free software; you can redistribute it and/or modify
  6. * it under the terms of the GNU General Public License as published by
  7. * the Free Software Foundation.
  8. *
  9. * Maintained by: Eilon Greenstein <eilong@broadcom.com>
  10. * Written by: Eliezer Tamir
  11. * Based on code from Michael Chan's bnx2 driver
  12. * UDP CSUM errata workaround by Arik Gendelman
  13. * Slowpath and fastpath rework by Vladislav Zolotarov
  14. * Statistics and Link management by Yitchak Gertner
  15. *
  16. */
  17. #define pr_fmt(fmt) KBUILD_MODNAME ": " fmt
  18. #include "bnx2x_stats.h"
  19. #include "bnx2x_cmn.h"
  20. /* Statistics */
  21. /*
  22. * General service functions
  23. */
  24. static inline long bnx2x_hilo(u32 *hiref)
  25. {
  26. u32 lo = *(hiref + 1);
  27. #if (BITS_PER_LONG == 64)
  28. u32 hi = *hiref;
  29. return HILO_U64(hi, lo);
  30. #else
  31. return lo;
  32. #endif
  33. }
  34. static u16 bnx2x_get_port_stats_dma_len(struct bnx2x *bp)
  35. {
  36. u16 res = sizeof(struct host_port_stats) >> 2;
  37. /* if PFC stats are not supported by the MFW, don't DMA them */
  38. if (!(bp->flags & BC_SUPPORTS_PFC_STATS))
  39. res -= (sizeof(u32)*4) >> 2;
  40. return res;
  41. }
  42. /*
  43. * Init service functions
  44. */
  45. /* Post the next statistics ramrod. Protect it with the spin in
  46. * order to ensure the strict order between statistics ramrods
  47. * (each ramrod has a sequence number passed in a
  48. * bp->fw_stats_req->hdr.drv_stats_counter and ramrods must be
  49. * sent in order).
  50. */
  51. static void bnx2x_storm_stats_post(struct bnx2x *bp)
  52. {
  53. if (!bp->stats_pending) {
  54. int rc;
  55. spin_lock_bh(&bp->stats_lock);
  56. if (bp->stats_pending) {
  57. spin_unlock_bh(&bp->stats_lock);
  58. return;
  59. }
  60. bp->fw_stats_req->hdr.drv_stats_counter =
  61. cpu_to_le16(bp->stats_counter++);
  62. DP(BNX2X_MSG_STATS, "Sending statistics ramrod %d\n",
  63. bp->fw_stats_req->hdr.drv_stats_counter);
  64. /* send FW stats ramrod */
  65. rc = bnx2x_sp_post(bp, RAMROD_CMD_ID_COMMON_STAT_QUERY, 0,
  66. U64_HI(bp->fw_stats_req_mapping),
  67. U64_LO(bp->fw_stats_req_mapping),
  68. NONE_CONNECTION_TYPE);
  69. if (rc == 0)
  70. bp->stats_pending = 1;
  71. spin_unlock_bh(&bp->stats_lock);
  72. }
  73. }
  74. static void bnx2x_hw_stats_post(struct bnx2x *bp)
  75. {
  76. struct dmae_command *dmae = &bp->stats_dmae;
  77. u32 *stats_comp = bnx2x_sp(bp, stats_comp);
  78. *stats_comp = DMAE_COMP_VAL;
  79. if (CHIP_REV_IS_SLOW(bp))
  80. return;
  81. /* loader */
  82. if (bp->executer_idx) {
  83. int loader_idx = PMF_DMAE_C(bp);
  84. u32 opcode = bnx2x_dmae_opcode(bp, DMAE_SRC_PCI, DMAE_DST_GRC,
  85. true, DMAE_COMP_GRC);
  86. opcode = bnx2x_dmae_opcode_clr_src_reset(opcode);
  87. memset(dmae, 0, sizeof(struct dmae_command));
  88. dmae->opcode = opcode;
  89. dmae->src_addr_lo = U64_LO(bnx2x_sp_mapping(bp, dmae[0]));
  90. dmae->src_addr_hi = U64_HI(bnx2x_sp_mapping(bp, dmae[0]));
  91. dmae->dst_addr_lo = (DMAE_REG_CMD_MEM +
  92. sizeof(struct dmae_command) *
  93. (loader_idx + 1)) >> 2;
  94. dmae->dst_addr_hi = 0;
  95. dmae->len = sizeof(struct dmae_command) >> 2;
  96. if (CHIP_IS_E1(bp))
  97. dmae->len--;
  98. dmae->comp_addr_lo = dmae_reg_go_c[loader_idx + 1] >> 2;
  99. dmae->comp_addr_hi = 0;
  100. dmae->comp_val = 1;
  101. *stats_comp = 0;
  102. bnx2x_post_dmae(bp, dmae, loader_idx);
  103. } else if (bp->func_stx) {
  104. *stats_comp = 0;
  105. memcpy(bnx2x_sp(bp, func_stats), &bp->func_stats,
  106. sizeof(bp->func_stats));
  107. bnx2x_post_dmae(bp, dmae, INIT_DMAE_C(bp));
  108. }
  109. }
  110. static int bnx2x_stats_comp(struct bnx2x *bp)
  111. {
  112. u32 *stats_comp = bnx2x_sp(bp, stats_comp);
  113. int cnt = 10;
  114. might_sleep();
  115. while (*stats_comp != DMAE_COMP_VAL) {
  116. if (!cnt) {
  117. BNX2X_ERR("timeout waiting for stats finished\n");
  118. break;
  119. }
  120. cnt--;
  121. usleep_range(1000, 1000);
  122. }
  123. return 1;
  124. }
  125. /*
  126. * Statistics service functions
  127. */
  128. static void bnx2x_stats_pmf_update(struct bnx2x *bp)
  129. {
  130. struct dmae_command *dmae;
  131. u32 opcode;
  132. int loader_idx = PMF_DMAE_C(bp);
  133. u32 *stats_comp = bnx2x_sp(bp, stats_comp);
  134. /* sanity */
  135. if (!bp->port.pmf || !bp->port.port_stx) {
  136. BNX2X_ERR("BUG!\n");
  137. return;
  138. }
  139. bp->executer_idx = 0;
  140. opcode = bnx2x_dmae_opcode(bp, DMAE_SRC_GRC, DMAE_DST_PCI, false, 0);
  141. dmae = bnx2x_sp(bp, dmae[bp->executer_idx++]);
  142. dmae->opcode = bnx2x_dmae_opcode_add_comp(opcode, DMAE_COMP_GRC);
  143. dmae->src_addr_lo = bp->port.port_stx >> 2;
  144. dmae->src_addr_hi = 0;
  145. dmae->dst_addr_lo = U64_LO(bnx2x_sp_mapping(bp, port_stats));
  146. dmae->dst_addr_hi = U64_HI(bnx2x_sp_mapping(bp, port_stats));
  147. dmae->len = DMAE_LEN32_RD_MAX;
  148. dmae->comp_addr_lo = dmae_reg_go_c[loader_idx] >> 2;
  149. dmae->comp_addr_hi = 0;
  150. dmae->comp_val = 1;
  151. dmae = bnx2x_sp(bp, dmae[bp->executer_idx++]);
  152. dmae->opcode = bnx2x_dmae_opcode_add_comp(opcode, DMAE_COMP_PCI);
  153. dmae->src_addr_lo = (bp->port.port_stx >> 2) + DMAE_LEN32_RD_MAX;
  154. dmae->src_addr_hi = 0;
  155. dmae->dst_addr_lo = U64_LO(bnx2x_sp_mapping(bp, port_stats) +
  156. DMAE_LEN32_RD_MAX * 4);
  157. dmae->dst_addr_hi = U64_HI(bnx2x_sp_mapping(bp, port_stats) +
  158. DMAE_LEN32_RD_MAX * 4);
  159. dmae->len = bnx2x_get_port_stats_dma_len(bp) - DMAE_LEN32_RD_MAX;
  160. dmae->comp_addr_lo = U64_LO(bnx2x_sp_mapping(bp, stats_comp));
  161. dmae->comp_addr_hi = U64_HI(bnx2x_sp_mapping(bp, stats_comp));
  162. dmae->comp_val = DMAE_COMP_VAL;
  163. *stats_comp = 0;
  164. bnx2x_hw_stats_post(bp);
  165. bnx2x_stats_comp(bp);
  166. }
  167. static void bnx2x_port_stats_init(struct bnx2x *bp)
  168. {
  169. struct dmae_command *dmae;
  170. int port = BP_PORT(bp);
  171. u32 opcode;
  172. int loader_idx = PMF_DMAE_C(bp);
  173. u32 mac_addr;
  174. u32 *stats_comp = bnx2x_sp(bp, stats_comp);
  175. /* sanity */
  176. if (!bp->link_vars.link_up || !bp->port.pmf) {
  177. BNX2X_ERR("BUG!\n");
  178. return;
  179. }
  180. bp->executer_idx = 0;
  181. /* MCP */
  182. opcode = bnx2x_dmae_opcode(bp, DMAE_SRC_PCI, DMAE_DST_GRC,
  183. true, DMAE_COMP_GRC);
  184. if (bp->port.port_stx) {
  185. dmae = bnx2x_sp(bp, dmae[bp->executer_idx++]);
  186. dmae->opcode = opcode;
  187. dmae->src_addr_lo = U64_LO(bnx2x_sp_mapping(bp, port_stats));
  188. dmae->src_addr_hi = U64_HI(bnx2x_sp_mapping(bp, port_stats));
  189. dmae->dst_addr_lo = bp->port.port_stx >> 2;
  190. dmae->dst_addr_hi = 0;
  191. dmae->len = bnx2x_get_port_stats_dma_len(bp);
  192. dmae->comp_addr_lo = dmae_reg_go_c[loader_idx] >> 2;
  193. dmae->comp_addr_hi = 0;
  194. dmae->comp_val = 1;
  195. }
  196. if (bp->func_stx) {
  197. dmae = bnx2x_sp(bp, dmae[bp->executer_idx++]);
  198. dmae->opcode = opcode;
  199. dmae->src_addr_lo = U64_LO(bnx2x_sp_mapping(bp, func_stats));
  200. dmae->src_addr_hi = U64_HI(bnx2x_sp_mapping(bp, func_stats));
  201. dmae->dst_addr_lo = bp->func_stx >> 2;
  202. dmae->dst_addr_hi = 0;
  203. dmae->len = sizeof(struct host_func_stats) >> 2;
  204. dmae->comp_addr_lo = dmae_reg_go_c[loader_idx] >> 2;
  205. dmae->comp_addr_hi = 0;
  206. dmae->comp_val = 1;
  207. }
  208. /* MAC */
  209. opcode = bnx2x_dmae_opcode(bp, DMAE_SRC_GRC, DMAE_DST_PCI,
  210. true, DMAE_COMP_GRC);
  211. /* EMAC is special */
  212. if (bp->link_vars.mac_type == MAC_TYPE_EMAC) {
  213. mac_addr = (port ? GRCBASE_EMAC1 : GRCBASE_EMAC0);
  214. /* EMAC_REG_EMAC_RX_STAT_AC (EMAC_REG_EMAC_RX_STAT_AC_COUNT)*/
  215. dmae = bnx2x_sp(bp, dmae[bp->executer_idx++]);
  216. dmae->opcode = opcode;
  217. dmae->src_addr_lo = (mac_addr +
  218. EMAC_REG_EMAC_RX_STAT_AC) >> 2;
  219. dmae->src_addr_hi = 0;
  220. dmae->dst_addr_lo = U64_LO(bnx2x_sp_mapping(bp, mac_stats));
  221. dmae->dst_addr_hi = U64_HI(bnx2x_sp_mapping(bp, mac_stats));
  222. dmae->len = EMAC_REG_EMAC_RX_STAT_AC_COUNT;
  223. dmae->comp_addr_lo = dmae_reg_go_c[loader_idx] >> 2;
  224. dmae->comp_addr_hi = 0;
  225. dmae->comp_val = 1;
  226. /* EMAC_REG_EMAC_RX_STAT_AC_28 */
  227. dmae = bnx2x_sp(bp, dmae[bp->executer_idx++]);
  228. dmae->opcode = opcode;
  229. dmae->src_addr_lo = (mac_addr +
  230. EMAC_REG_EMAC_RX_STAT_AC_28) >> 2;
  231. dmae->src_addr_hi = 0;
  232. dmae->dst_addr_lo = U64_LO(bnx2x_sp_mapping(bp, mac_stats) +
  233. offsetof(struct emac_stats, rx_stat_falsecarriererrors));
  234. dmae->dst_addr_hi = U64_HI(bnx2x_sp_mapping(bp, mac_stats) +
  235. offsetof(struct emac_stats, rx_stat_falsecarriererrors));
  236. dmae->len = 1;
  237. dmae->comp_addr_lo = dmae_reg_go_c[loader_idx] >> 2;
  238. dmae->comp_addr_hi = 0;
  239. dmae->comp_val = 1;
  240. /* EMAC_REG_EMAC_TX_STAT_AC (EMAC_REG_EMAC_TX_STAT_AC_COUNT)*/
  241. dmae = bnx2x_sp(bp, dmae[bp->executer_idx++]);
  242. dmae->opcode = opcode;
  243. dmae->src_addr_lo = (mac_addr +
  244. EMAC_REG_EMAC_TX_STAT_AC) >> 2;
  245. dmae->src_addr_hi = 0;
  246. dmae->dst_addr_lo = U64_LO(bnx2x_sp_mapping(bp, mac_stats) +
  247. offsetof(struct emac_stats, tx_stat_ifhcoutoctets));
  248. dmae->dst_addr_hi = U64_HI(bnx2x_sp_mapping(bp, mac_stats) +
  249. offsetof(struct emac_stats, tx_stat_ifhcoutoctets));
  250. dmae->len = EMAC_REG_EMAC_TX_STAT_AC_COUNT;
  251. dmae->comp_addr_lo = dmae_reg_go_c[loader_idx] >> 2;
  252. dmae->comp_addr_hi = 0;
  253. dmae->comp_val = 1;
  254. } else {
  255. u32 tx_src_addr_lo, rx_src_addr_lo;
  256. u16 rx_len, tx_len;
  257. /* configure the params according to MAC type */
  258. switch (bp->link_vars.mac_type) {
  259. case MAC_TYPE_BMAC:
  260. mac_addr = (port ? NIG_REG_INGRESS_BMAC1_MEM :
  261. NIG_REG_INGRESS_BMAC0_MEM);
  262. /* BIGMAC_REGISTER_TX_STAT_GTPKT ..
  263. BIGMAC_REGISTER_TX_STAT_GTBYT */
  264. if (CHIP_IS_E1x(bp)) {
  265. tx_src_addr_lo = (mac_addr +
  266. BIGMAC_REGISTER_TX_STAT_GTPKT) >> 2;
  267. tx_len = (8 + BIGMAC_REGISTER_TX_STAT_GTBYT -
  268. BIGMAC_REGISTER_TX_STAT_GTPKT) >> 2;
  269. rx_src_addr_lo = (mac_addr +
  270. BIGMAC_REGISTER_RX_STAT_GR64) >> 2;
  271. rx_len = (8 + BIGMAC_REGISTER_RX_STAT_GRIPJ -
  272. BIGMAC_REGISTER_RX_STAT_GR64) >> 2;
  273. } else {
  274. tx_src_addr_lo = (mac_addr +
  275. BIGMAC2_REGISTER_TX_STAT_GTPOK) >> 2;
  276. tx_len = (8 + BIGMAC2_REGISTER_TX_STAT_GTBYT -
  277. BIGMAC2_REGISTER_TX_STAT_GTPOK) >> 2;
  278. rx_src_addr_lo = (mac_addr +
  279. BIGMAC2_REGISTER_RX_STAT_GR64) >> 2;
  280. rx_len = (8 + BIGMAC2_REGISTER_RX_STAT_GRIPJ -
  281. BIGMAC2_REGISTER_RX_STAT_GR64) >> 2;
  282. }
  283. break;
  284. case MAC_TYPE_UMAC: /* handled by MSTAT */
  285. case MAC_TYPE_XMAC: /* handled by MSTAT */
  286. default:
  287. mac_addr = port ? GRCBASE_MSTAT1 : GRCBASE_MSTAT0;
  288. tx_src_addr_lo = (mac_addr +
  289. MSTAT_REG_TX_STAT_GTXPOK_LO) >> 2;
  290. rx_src_addr_lo = (mac_addr +
  291. MSTAT_REG_RX_STAT_GR64_LO) >> 2;
  292. tx_len = sizeof(bp->slowpath->
  293. mac_stats.mstat_stats.stats_tx) >> 2;
  294. rx_len = sizeof(bp->slowpath->
  295. mac_stats.mstat_stats.stats_rx) >> 2;
  296. break;
  297. }
  298. /* TX stats */
  299. dmae = bnx2x_sp(bp, dmae[bp->executer_idx++]);
  300. dmae->opcode = opcode;
  301. dmae->src_addr_lo = tx_src_addr_lo;
  302. dmae->src_addr_hi = 0;
  303. dmae->len = tx_len;
  304. dmae->dst_addr_lo = U64_LO(bnx2x_sp_mapping(bp, mac_stats));
  305. dmae->dst_addr_hi = U64_HI(bnx2x_sp_mapping(bp, mac_stats));
  306. dmae->comp_addr_lo = dmae_reg_go_c[loader_idx] >> 2;
  307. dmae->comp_addr_hi = 0;
  308. dmae->comp_val = 1;
  309. /* RX stats */
  310. dmae = bnx2x_sp(bp, dmae[bp->executer_idx++]);
  311. dmae->opcode = opcode;
  312. dmae->src_addr_hi = 0;
  313. dmae->src_addr_lo = rx_src_addr_lo;
  314. dmae->dst_addr_lo =
  315. U64_LO(bnx2x_sp_mapping(bp, mac_stats) + (tx_len << 2));
  316. dmae->dst_addr_hi =
  317. U64_HI(bnx2x_sp_mapping(bp, mac_stats) + (tx_len << 2));
  318. dmae->len = rx_len;
  319. dmae->comp_addr_lo = dmae_reg_go_c[loader_idx] >> 2;
  320. dmae->comp_addr_hi = 0;
  321. dmae->comp_val = 1;
  322. }
  323. /* NIG */
  324. if (!CHIP_IS_E3(bp)) {
  325. dmae = bnx2x_sp(bp, dmae[bp->executer_idx++]);
  326. dmae->opcode = opcode;
  327. dmae->src_addr_lo = (port ? NIG_REG_STAT1_EGRESS_MAC_PKT0 :
  328. NIG_REG_STAT0_EGRESS_MAC_PKT0) >> 2;
  329. dmae->src_addr_hi = 0;
  330. dmae->dst_addr_lo = U64_LO(bnx2x_sp_mapping(bp, nig_stats) +
  331. offsetof(struct nig_stats, egress_mac_pkt0_lo));
  332. dmae->dst_addr_hi = U64_HI(bnx2x_sp_mapping(bp, nig_stats) +
  333. offsetof(struct nig_stats, egress_mac_pkt0_lo));
  334. dmae->len = (2*sizeof(u32)) >> 2;
  335. dmae->comp_addr_lo = dmae_reg_go_c[loader_idx] >> 2;
  336. dmae->comp_addr_hi = 0;
  337. dmae->comp_val = 1;
  338. dmae = bnx2x_sp(bp, dmae[bp->executer_idx++]);
  339. dmae->opcode = opcode;
  340. dmae->src_addr_lo = (port ? NIG_REG_STAT1_EGRESS_MAC_PKT1 :
  341. NIG_REG_STAT0_EGRESS_MAC_PKT1) >> 2;
  342. dmae->src_addr_hi = 0;
  343. dmae->dst_addr_lo = U64_LO(bnx2x_sp_mapping(bp, nig_stats) +
  344. offsetof(struct nig_stats, egress_mac_pkt1_lo));
  345. dmae->dst_addr_hi = U64_HI(bnx2x_sp_mapping(bp, nig_stats) +
  346. offsetof(struct nig_stats, egress_mac_pkt1_lo));
  347. dmae->len = (2*sizeof(u32)) >> 2;
  348. dmae->comp_addr_lo = dmae_reg_go_c[loader_idx] >> 2;
  349. dmae->comp_addr_hi = 0;
  350. dmae->comp_val = 1;
  351. }
  352. dmae = bnx2x_sp(bp, dmae[bp->executer_idx++]);
  353. dmae->opcode = bnx2x_dmae_opcode(bp, DMAE_SRC_GRC, DMAE_DST_PCI,
  354. true, DMAE_COMP_PCI);
  355. dmae->src_addr_lo = (port ? NIG_REG_STAT1_BRB_DISCARD :
  356. NIG_REG_STAT0_BRB_DISCARD) >> 2;
  357. dmae->src_addr_hi = 0;
  358. dmae->dst_addr_lo = U64_LO(bnx2x_sp_mapping(bp, nig_stats));
  359. dmae->dst_addr_hi = U64_HI(bnx2x_sp_mapping(bp, nig_stats));
  360. dmae->len = (sizeof(struct nig_stats) - 4*sizeof(u32)) >> 2;
  361. dmae->comp_addr_lo = U64_LO(bnx2x_sp_mapping(bp, stats_comp));
  362. dmae->comp_addr_hi = U64_HI(bnx2x_sp_mapping(bp, stats_comp));
  363. dmae->comp_val = DMAE_COMP_VAL;
  364. *stats_comp = 0;
  365. }
  366. static void bnx2x_func_stats_init(struct bnx2x *bp)
  367. {
  368. struct dmae_command *dmae = &bp->stats_dmae;
  369. u32 *stats_comp = bnx2x_sp(bp, stats_comp);
  370. /* sanity */
  371. if (!bp->func_stx) {
  372. BNX2X_ERR("BUG!\n");
  373. return;
  374. }
  375. bp->executer_idx = 0;
  376. memset(dmae, 0, sizeof(struct dmae_command));
  377. dmae->opcode = bnx2x_dmae_opcode(bp, DMAE_SRC_PCI, DMAE_DST_GRC,
  378. true, DMAE_COMP_PCI);
  379. dmae->src_addr_lo = U64_LO(bnx2x_sp_mapping(bp, func_stats));
  380. dmae->src_addr_hi = U64_HI(bnx2x_sp_mapping(bp, func_stats));
  381. dmae->dst_addr_lo = bp->func_stx >> 2;
  382. dmae->dst_addr_hi = 0;
  383. dmae->len = sizeof(struct host_func_stats) >> 2;
  384. dmae->comp_addr_lo = U64_LO(bnx2x_sp_mapping(bp, stats_comp));
  385. dmae->comp_addr_hi = U64_HI(bnx2x_sp_mapping(bp, stats_comp));
  386. dmae->comp_val = DMAE_COMP_VAL;
  387. *stats_comp = 0;
  388. }
  389. static void bnx2x_stats_start(struct bnx2x *bp)
  390. {
  391. if (bp->port.pmf)
  392. bnx2x_port_stats_init(bp);
  393. else if (bp->func_stx)
  394. bnx2x_func_stats_init(bp);
  395. bnx2x_hw_stats_post(bp);
  396. bnx2x_storm_stats_post(bp);
  397. }
  398. static void bnx2x_stats_pmf_start(struct bnx2x *bp)
  399. {
  400. bnx2x_stats_comp(bp);
  401. bnx2x_stats_pmf_update(bp);
  402. bnx2x_stats_start(bp);
  403. }
  404. static void bnx2x_stats_restart(struct bnx2x *bp)
  405. {
  406. bnx2x_stats_comp(bp);
  407. bnx2x_stats_start(bp);
  408. }
  409. static void bnx2x_bmac_stats_update(struct bnx2x *bp)
  410. {
  411. struct host_port_stats *pstats = bnx2x_sp(bp, port_stats);
  412. struct bnx2x_eth_stats *estats = &bp->eth_stats;
  413. struct {
  414. u32 lo;
  415. u32 hi;
  416. } diff;
  417. if (CHIP_IS_E1x(bp)) {
  418. struct bmac1_stats *new = bnx2x_sp(bp, mac_stats.bmac1_stats);
  419. /* the macros below will use "bmac1_stats" type */
  420. UPDATE_STAT64(rx_stat_grerb, rx_stat_ifhcinbadoctets);
  421. UPDATE_STAT64(rx_stat_grfcs, rx_stat_dot3statsfcserrors);
  422. UPDATE_STAT64(rx_stat_grund, rx_stat_etherstatsundersizepkts);
  423. UPDATE_STAT64(rx_stat_grovr, rx_stat_dot3statsframestoolong);
  424. UPDATE_STAT64(rx_stat_grfrg, rx_stat_etherstatsfragments);
  425. UPDATE_STAT64(rx_stat_grjbr, rx_stat_etherstatsjabbers);
  426. UPDATE_STAT64(rx_stat_grxcf, rx_stat_maccontrolframesreceived);
  427. UPDATE_STAT64(rx_stat_grxpf, rx_stat_xoffstateentered);
  428. UPDATE_STAT64(rx_stat_grxpf, rx_stat_mac_xpf);
  429. UPDATE_STAT64(tx_stat_gtxpf, tx_stat_outxoffsent);
  430. UPDATE_STAT64(tx_stat_gtxpf, tx_stat_flowcontroldone);
  431. UPDATE_STAT64(tx_stat_gt64, tx_stat_etherstatspkts64octets);
  432. UPDATE_STAT64(tx_stat_gt127,
  433. tx_stat_etherstatspkts65octetsto127octets);
  434. UPDATE_STAT64(tx_stat_gt255,
  435. tx_stat_etherstatspkts128octetsto255octets);
  436. UPDATE_STAT64(tx_stat_gt511,
  437. tx_stat_etherstatspkts256octetsto511octets);
  438. UPDATE_STAT64(tx_stat_gt1023,
  439. tx_stat_etherstatspkts512octetsto1023octets);
  440. UPDATE_STAT64(tx_stat_gt1518,
  441. tx_stat_etherstatspkts1024octetsto1522octets);
  442. UPDATE_STAT64(tx_stat_gt2047, tx_stat_mac_2047);
  443. UPDATE_STAT64(tx_stat_gt4095, tx_stat_mac_4095);
  444. UPDATE_STAT64(tx_stat_gt9216, tx_stat_mac_9216);
  445. UPDATE_STAT64(tx_stat_gt16383, tx_stat_mac_16383);
  446. UPDATE_STAT64(tx_stat_gterr,
  447. tx_stat_dot3statsinternalmactransmiterrors);
  448. UPDATE_STAT64(tx_stat_gtufl, tx_stat_mac_ufl);
  449. } else {
  450. struct bmac2_stats *new = bnx2x_sp(bp, mac_stats.bmac2_stats);
  451. /* the macros below will use "bmac2_stats" type */
  452. UPDATE_STAT64(rx_stat_grerb, rx_stat_ifhcinbadoctets);
  453. UPDATE_STAT64(rx_stat_grfcs, rx_stat_dot3statsfcserrors);
  454. UPDATE_STAT64(rx_stat_grund, rx_stat_etherstatsundersizepkts);
  455. UPDATE_STAT64(rx_stat_grovr, rx_stat_dot3statsframestoolong);
  456. UPDATE_STAT64(rx_stat_grfrg, rx_stat_etherstatsfragments);
  457. UPDATE_STAT64(rx_stat_grjbr, rx_stat_etherstatsjabbers);
  458. UPDATE_STAT64(rx_stat_grxcf, rx_stat_maccontrolframesreceived);
  459. UPDATE_STAT64(rx_stat_grxpf, rx_stat_xoffstateentered);
  460. UPDATE_STAT64(rx_stat_grxpf, rx_stat_mac_xpf);
  461. UPDATE_STAT64(tx_stat_gtxpf, tx_stat_outxoffsent);
  462. UPDATE_STAT64(tx_stat_gtxpf, tx_stat_flowcontroldone);
  463. UPDATE_STAT64(tx_stat_gt64, tx_stat_etherstatspkts64octets);
  464. UPDATE_STAT64(tx_stat_gt127,
  465. tx_stat_etherstatspkts65octetsto127octets);
  466. UPDATE_STAT64(tx_stat_gt255,
  467. tx_stat_etherstatspkts128octetsto255octets);
  468. UPDATE_STAT64(tx_stat_gt511,
  469. tx_stat_etherstatspkts256octetsto511octets);
  470. UPDATE_STAT64(tx_stat_gt1023,
  471. tx_stat_etherstatspkts512octetsto1023octets);
  472. UPDATE_STAT64(tx_stat_gt1518,
  473. tx_stat_etherstatspkts1024octetsto1522octets);
  474. UPDATE_STAT64(tx_stat_gt2047, tx_stat_mac_2047);
  475. UPDATE_STAT64(tx_stat_gt4095, tx_stat_mac_4095);
  476. UPDATE_STAT64(tx_stat_gt9216, tx_stat_mac_9216);
  477. UPDATE_STAT64(tx_stat_gt16383, tx_stat_mac_16383);
  478. UPDATE_STAT64(tx_stat_gterr,
  479. tx_stat_dot3statsinternalmactransmiterrors);
  480. UPDATE_STAT64(tx_stat_gtufl, tx_stat_mac_ufl);
  481. /* collect PFC stats */
  482. pstats->pfc_frames_tx_hi = new->tx_stat_gtpp_hi;
  483. pstats->pfc_frames_tx_lo = new->tx_stat_gtpp_lo;
  484. pstats->pfc_frames_rx_hi = new->rx_stat_grpp_hi;
  485. pstats->pfc_frames_rx_lo = new->rx_stat_grpp_lo;
  486. }
  487. estats->pause_frames_received_hi =
  488. pstats->mac_stx[1].rx_stat_mac_xpf_hi;
  489. estats->pause_frames_received_lo =
  490. pstats->mac_stx[1].rx_stat_mac_xpf_lo;
  491. estats->pause_frames_sent_hi =
  492. pstats->mac_stx[1].tx_stat_outxoffsent_hi;
  493. estats->pause_frames_sent_lo =
  494. pstats->mac_stx[1].tx_stat_outxoffsent_lo;
  495. estats->pfc_frames_received_hi =
  496. pstats->pfc_frames_rx_hi;
  497. estats->pfc_frames_received_lo =
  498. pstats->pfc_frames_rx_lo;
  499. estats->pfc_frames_sent_hi =
  500. pstats->pfc_frames_tx_hi;
  501. estats->pfc_frames_sent_lo =
  502. pstats->pfc_frames_tx_lo;
  503. }
  504. static void bnx2x_mstat_stats_update(struct bnx2x *bp)
  505. {
  506. struct host_port_stats *pstats = bnx2x_sp(bp, port_stats);
  507. struct bnx2x_eth_stats *estats = &bp->eth_stats;
  508. struct mstat_stats *new = bnx2x_sp(bp, mac_stats.mstat_stats);
  509. ADD_STAT64(stats_rx.rx_grerb, rx_stat_ifhcinbadoctets);
  510. ADD_STAT64(stats_rx.rx_grfcs, rx_stat_dot3statsfcserrors);
  511. ADD_STAT64(stats_rx.rx_grund, rx_stat_etherstatsundersizepkts);
  512. ADD_STAT64(stats_rx.rx_grovr, rx_stat_dot3statsframestoolong);
  513. ADD_STAT64(stats_rx.rx_grfrg, rx_stat_etherstatsfragments);
  514. ADD_STAT64(stats_rx.rx_grxcf, rx_stat_maccontrolframesreceived);
  515. ADD_STAT64(stats_rx.rx_grxpf, rx_stat_xoffstateentered);
  516. ADD_STAT64(stats_rx.rx_grxpf, rx_stat_mac_xpf);
  517. ADD_STAT64(stats_tx.tx_gtxpf, tx_stat_outxoffsent);
  518. ADD_STAT64(stats_tx.tx_gtxpf, tx_stat_flowcontroldone);
  519. /* collect pfc stats */
  520. ADD_64(pstats->pfc_frames_tx_hi, new->stats_tx.tx_gtxpp_hi,
  521. pstats->pfc_frames_tx_lo, new->stats_tx.tx_gtxpp_lo);
  522. ADD_64(pstats->pfc_frames_rx_hi, new->stats_rx.rx_grxpp_hi,
  523. pstats->pfc_frames_rx_lo, new->stats_rx.rx_grxpp_lo);
  524. ADD_STAT64(stats_tx.tx_gt64, tx_stat_etherstatspkts64octets);
  525. ADD_STAT64(stats_tx.tx_gt127,
  526. tx_stat_etherstatspkts65octetsto127octets);
  527. ADD_STAT64(stats_tx.tx_gt255,
  528. tx_stat_etherstatspkts128octetsto255octets);
  529. ADD_STAT64(stats_tx.tx_gt511,
  530. tx_stat_etherstatspkts256octetsto511octets);
  531. ADD_STAT64(stats_tx.tx_gt1023,
  532. tx_stat_etherstatspkts512octetsto1023octets);
  533. ADD_STAT64(stats_tx.tx_gt1518,
  534. tx_stat_etherstatspkts1024octetsto1522octets);
  535. ADD_STAT64(stats_tx.tx_gt2047, tx_stat_mac_2047);
  536. ADD_STAT64(stats_tx.tx_gt4095, tx_stat_mac_4095);
  537. ADD_STAT64(stats_tx.tx_gt9216, tx_stat_mac_9216);
  538. ADD_STAT64(stats_tx.tx_gt16383, tx_stat_mac_16383);
  539. ADD_STAT64(stats_tx.tx_gterr,
  540. tx_stat_dot3statsinternalmactransmiterrors);
  541. ADD_STAT64(stats_tx.tx_gtufl, tx_stat_mac_ufl);
  542. estats->etherstatspkts1024octetsto1522octets_hi =
  543. pstats->mac_stx[1].tx_stat_etherstatspkts1024octetsto1522octets_hi;
  544. estats->etherstatspkts1024octetsto1522octets_lo =
  545. pstats->mac_stx[1].tx_stat_etherstatspkts1024octetsto1522octets_lo;
  546. estats->etherstatspktsover1522octets_hi =
  547. pstats->mac_stx[1].tx_stat_mac_2047_hi;
  548. estats->etherstatspktsover1522octets_lo =
  549. pstats->mac_stx[1].tx_stat_mac_2047_lo;
  550. ADD_64(estats->etherstatspktsover1522octets_hi,
  551. pstats->mac_stx[1].tx_stat_mac_4095_hi,
  552. estats->etherstatspktsover1522octets_lo,
  553. pstats->mac_stx[1].tx_stat_mac_4095_lo);
  554. ADD_64(estats->etherstatspktsover1522octets_hi,
  555. pstats->mac_stx[1].tx_stat_mac_9216_hi,
  556. estats->etherstatspktsover1522octets_lo,
  557. pstats->mac_stx[1].tx_stat_mac_9216_lo);
  558. ADD_64(estats->etherstatspktsover1522octets_hi,
  559. pstats->mac_stx[1].tx_stat_mac_16383_hi,
  560. estats->etherstatspktsover1522octets_lo,
  561. pstats->mac_stx[1].tx_stat_mac_16383_lo);
  562. estats->pause_frames_received_hi =
  563. pstats->mac_stx[1].rx_stat_mac_xpf_hi;
  564. estats->pause_frames_received_lo =
  565. pstats->mac_stx[1].rx_stat_mac_xpf_lo;
  566. estats->pause_frames_sent_hi =
  567. pstats->mac_stx[1].tx_stat_outxoffsent_hi;
  568. estats->pause_frames_sent_lo =
  569. pstats->mac_stx[1].tx_stat_outxoffsent_lo;
  570. estats->pfc_frames_received_hi =
  571. pstats->pfc_frames_rx_hi;
  572. estats->pfc_frames_received_lo =
  573. pstats->pfc_frames_rx_lo;
  574. estats->pfc_frames_sent_hi =
  575. pstats->pfc_frames_tx_hi;
  576. estats->pfc_frames_sent_lo =
  577. pstats->pfc_frames_tx_lo;
  578. }
  579. static void bnx2x_emac_stats_update(struct bnx2x *bp)
  580. {
  581. struct emac_stats *new = bnx2x_sp(bp, mac_stats.emac_stats);
  582. struct host_port_stats *pstats = bnx2x_sp(bp, port_stats);
  583. struct bnx2x_eth_stats *estats = &bp->eth_stats;
  584. UPDATE_EXTEND_STAT(rx_stat_ifhcinbadoctets);
  585. UPDATE_EXTEND_STAT(tx_stat_ifhcoutbadoctets);
  586. UPDATE_EXTEND_STAT(rx_stat_dot3statsfcserrors);
  587. UPDATE_EXTEND_STAT(rx_stat_dot3statsalignmenterrors);
  588. UPDATE_EXTEND_STAT(rx_stat_dot3statscarriersenseerrors);
  589. UPDATE_EXTEND_STAT(rx_stat_falsecarriererrors);
  590. UPDATE_EXTEND_STAT(rx_stat_etherstatsundersizepkts);
  591. UPDATE_EXTEND_STAT(rx_stat_dot3statsframestoolong);
  592. UPDATE_EXTEND_STAT(rx_stat_etherstatsfragments);
  593. UPDATE_EXTEND_STAT(rx_stat_etherstatsjabbers);
  594. UPDATE_EXTEND_STAT(rx_stat_maccontrolframesreceived);
  595. UPDATE_EXTEND_STAT(rx_stat_xoffstateentered);
  596. UPDATE_EXTEND_STAT(rx_stat_xonpauseframesreceived);
  597. UPDATE_EXTEND_STAT(rx_stat_xoffpauseframesreceived);
  598. UPDATE_EXTEND_STAT(tx_stat_outxonsent);
  599. UPDATE_EXTEND_STAT(tx_stat_outxoffsent);
  600. UPDATE_EXTEND_STAT(tx_stat_flowcontroldone);
  601. UPDATE_EXTEND_STAT(tx_stat_etherstatscollisions);
  602. UPDATE_EXTEND_STAT(tx_stat_dot3statssinglecollisionframes);
  603. UPDATE_EXTEND_STAT(tx_stat_dot3statsmultiplecollisionframes);
  604. UPDATE_EXTEND_STAT(tx_stat_dot3statsdeferredtransmissions);
  605. UPDATE_EXTEND_STAT(tx_stat_dot3statsexcessivecollisions);
  606. UPDATE_EXTEND_STAT(tx_stat_dot3statslatecollisions);
  607. UPDATE_EXTEND_STAT(tx_stat_etherstatspkts64octets);
  608. UPDATE_EXTEND_STAT(tx_stat_etherstatspkts65octetsto127octets);
  609. UPDATE_EXTEND_STAT(tx_stat_etherstatspkts128octetsto255octets);
  610. UPDATE_EXTEND_STAT(tx_stat_etherstatspkts256octetsto511octets);
  611. UPDATE_EXTEND_STAT(tx_stat_etherstatspkts512octetsto1023octets);
  612. UPDATE_EXTEND_STAT(tx_stat_etherstatspkts1024octetsto1522octets);
  613. UPDATE_EXTEND_STAT(tx_stat_etherstatspktsover1522octets);
  614. UPDATE_EXTEND_STAT(tx_stat_dot3statsinternalmactransmiterrors);
  615. estats->pause_frames_received_hi =
  616. pstats->mac_stx[1].rx_stat_xonpauseframesreceived_hi;
  617. estats->pause_frames_received_lo =
  618. pstats->mac_stx[1].rx_stat_xonpauseframesreceived_lo;
  619. ADD_64(estats->pause_frames_received_hi,
  620. pstats->mac_stx[1].rx_stat_xoffpauseframesreceived_hi,
  621. estats->pause_frames_received_lo,
  622. pstats->mac_stx[1].rx_stat_xoffpauseframesreceived_lo);
  623. estats->pause_frames_sent_hi =
  624. pstats->mac_stx[1].tx_stat_outxonsent_hi;
  625. estats->pause_frames_sent_lo =
  626. pstats->mac_stx[1].tx_stat_outxonsent_lo;
  627. ADD_64(estats->pause_frames_sent_hi,
  628. pstats->mac_stx[1].tx_stat_outxoffsent_hi,
  629. estats->pause_frames_sent_lo,
  630. pstats->mac_stx[1].tx_stat_outxoffsent_lo);
  631. }
  632. static int bnx2x_hw_stats_update(struct bnx2x *bp)
  633. {
  634. struct nig_stats *new = bnx2x_sp(bp, nig_stats);
  635. struct nig_stats *old = &(bp->port.old_nig_stats);
  636. struct host_port_stats *pstats = bnx2x_sp(bp, port_stats);
  637. struct bnx2x_eth_stats *estats = &bp->eth_stats;
  638. struct {
  639. u32 lo;
  640. u32 hi;
  641. } diff;
  642. switch (bp->link_vars.mac_type) {
  643. case MAC_TYPE_BMAC:
  644. bnx2x_bmac_stats_update(bp);
  645. break;
  646. case MAC_TYPE_EMAC:
  647. bnx2x_emac_stats_update(bp);
  648. break;
  649. case MAC_TYPE_UMAC:
  650. case MAC_TYPE_XMAC:
  651. bnx2x_mstat_stats_update(bp);
  652. break;
  653. case MAC_TYPE_NONE: /* unreached */
  654. DP(BNX2X_MSG_STATS,
  655. "stats updated by DMAE but no MAC active\n");
  656. return -1;
  657. default: /* unreached */
  658. BNX2X_ERR("Unknown MAC type\n");
  659. }
  660. ADD_EXTEND_64(pstats->brb_drop_hi, pstats->brb_drop_lo,
  661. new->brb_discard - old->brb_discard);
  662. ADD_EXTEND_64(estats->brb_truncate_hi, estats->brb_truncate_lo,
  663. new->brb_truncate - old->brb_truncate);
  664. if (!CHIP_IS_E3(bp)) {
  665. UPDATE_STAT64_NIG(egress_mac_pkt0,
  666. etherstatspkts1024octetsto1522octets);
  667. UPDATE_STAT64_NIG(egress_mac_pkt1,
  668. etherstatspktsover1522octets);
  669. }
  670. memcpy(old, new, sizeof(struct nig_stats));
  671. memcpy(&(estats->rx_stat_ifhcinbadoctets_hi), &(pstats->mac_stx[1]),
  672. sizeof(struct mac_stx));
  673. estats->brb_drop_hi = pstats->brb_drop_hi;
  674. estats->brb_drop_lo = pstats->brb_drop_lo;
  675. pstats->host_port_stats_counter++;
  676. if (CHIP_IS_E3(bp)) {
  677. u32 lpi_reg = BP_PORT(bp) ? MISC_REG_CPMU_LP_SM_ENT_CNT_P1
  678. : MISC_REG_CPMU_LP_SM_ENT_CNT_P0;
  679. estats->eee_tx_lpi += REG_RD(bp, lpi_reg);
  680. }
  681. if (!BP_NOMCP(bp)) {
  682. u32 nig_timer_max =
  683. SHMEM_RD(bp, port_mb[BP_PORT(bp)].stat_nig_timer);
  684. if (nig_timer_max != estats->nig_timer_max) {
  685. estats->nig_timer_max = nig_timer_max;
  686. BNX2X_ERR("NIG timer max (%u)\n",
  687. estats->nig_timer_max);
  688. }
  689. }
  690. return 0;
  691. }
  692. static int bnx2x_storm_stats_update(struct bnx2x *bp)
  693. {
  694. struct tstorm_per_port_stats *tport =
  695. &bp->fw_stats_data->port.tstorm_port_statistics;
  696. struct tstorm_per_pf_stats *tfunc =
  697. &bp->fw_stats_data->pf.tstorm_pf_statistics;
  698. struct host_func_stats *fstats = &bp->func_stats;
  699. struct bnx2x_eth_stats *estats = &bp->eth_stats;
  700. struct bnx2x_eth_stats_old *estats_old = &bp->eth_stats_old;
  701. struct stats_counter *counters = &bp->fw_stats_data->storm_counters;
  702. int i;
  703. u16 cur_stats_counter;
  704. /* Make sure we use the value of the counter
  705. * used for sending the last stats ramrod.
  706. */
  707. spin_lock_bh(&bp->stats_lock);
  708. cur_stats_counter = bp->stats_counter - 1;
  709. spin_unlock_bh(&bp->stats_lock);
  710. /* are storm stats valid? */
  711. if (le16_to_cpu(counters->xstats_counter) != cur_stats_counter) {
  712. DP(BNX2X_MSG_STATS,
  713. "stats not updated by xstorm xstorm counter (0x%x) != stats_counter (0x%x)\n",
  714. le16_to_cpu(counters->xstats_counter), bp->stats_counter);
  715. return -EAGAIN;
  716. }
  717. if (le16_to_cpu(counters->ustats_counter) != cur_stats_counter) {
  718. DP(BNX2X_MSG_STATS,
  719. "stats not updated by ustorm ustorm counter (0x%x) != stats_counter (0x%x)\n",
  720. le16_to_cpu(counters->ustats_counter), bp->stats_counter);
  721. return -EAGAIN;
  722. }
  723. if (le16_to_cpu(counters->cstats_counter) != cur_stats_counter) {
  724. DP(BNX2X_MSG_STATS,
  725. "stats not updated by cstorm cstorm counter (0x%x) != stats_counter (0x%x)\n",
  726. le16_to_cpu(counters->cstats_counter), bp->stats_counter);
  727. return -EAGAIN;
  728. }
  729. if (le16_to_cpu(counters->tstats_counter) != cur_stats_counter) {
  730. DP(BNX2X_MSG_STATS,
  731. "stats not updated by tstorm tstorm counter (0x%x) != stats_counter (0x%x)\n",
  732. le16_to_cpu(counters->tstats_counter), bp->stats_counter);
  733. return -EAGAIN;
  734. }
  735. estats->error_bytes_received_hi = 0;
  736. estats->error_bytes_received_lo = 0;
  737. for_each_eth_queue(bp, i) {
  738. struct bnx2x_fastpath *fp = &bp->fp[i];
  739. struct tstorm_per_queue_stats *tclient =
  740. &bp->fw_stats_data->queue_stats[i].
  741. tstorm_queue_statistics;
  742. struct tstorm_per_queue_stats *old_tclient =
  743. &bnx2x_fp_stats(bp, fp)->old_tclient;
  744. struct ustorm_per_queue_stats *uclient =
  745. &bp->fw_stats_data->queue_stats[i].
  746. ustorm_queue_statistics;
  747. struct ustorm_per_queue_stats *old_uclient =
  748. &bnx2x_fp_stats(bp, fp)->old_uclient;
  749. struct xstorm_per_queue_stats *xclient =
  750. &bp->fw_stats_data->queue_stats[i].
  751. xstorm_queue_statistics;
  752. struct xstorm_per_queue_stats *old_xclient =
  753. &bnx2x_fp_stats(bp, fp)->old_xclient;
  754. struct bnx2x_eth_q_stats *qstats =
  755. &bnx2x_fp_stats(bp, fp)->eth_q_stats;
  756. struct bnx2x_eth_q_stats_old *qstats_old =
  757. &bnx2x_fp_stats(bp, fp)->eth_q_stats_old;
  758. u32 diff;
  759. DP(BNX2X_MSG_STATS, "queue[%d]: ucast_sent 0x%x, bcast_sent 0x%x mcast_sent 0x%x\n",
  760. i, xclient->ucast_pkts_sent,
  761. xclient->bcast_pkts_sent, xclient->mcast_pkts_sent);
  762. DP(BNX2X_MSG_STATS, "---------------\n");
  763. UPDATE_QSTAT(tclient->rcv_bcast_bytes,
  764. total_broadcast_bytes_received);
  765. UPDATE_QSTAT(tclient->rcv_mcast_bytes,
  766. total_multicast_bytes_received);
  767. UPDATE_QSTAT(tclient->rcv_ucast_bytes,
  768. total_unicast_bytes_received);
  769. /*
  770. * sum to total_bytes_received all
  771. * unicast/multicast/broadcast
  772. */
  773. qstats->total_bytes_received_hi =
  774. qstats->total_broadcast_bytes_received_hi;
  775. qstats->total_bytes_received_lo =
  776. qstats->total_broadcast_bytes_received_lo;
  777. ADD_64(qstats->total_bytes_received_hi,
  778. qstats->total_multicast_bytes_received_hi,
  779. qstats->total_bytes_received_lo,
  780. qstats->total_multicast_bytes_received_lo);
  781. ADD_64(qstats->total_bytes_received_hi,
  782. qstats->total_unicast_bytes_received_hi,
  783. qstats->total_bytes_received_lo,
  784. qstats->total_unicast_bytes_received_lo);
  785. qstats->valid_bytes_received_hi =
  786. qstats->total_bytes_received_hi;
  787. qstats->valid_bytes_received_lo =
  788. qstats->total_bytes_received_lo;
  789. UPDATE_EXTEND_TSTAT(rcv_ucast_pkts,
  790. total_unicast_packets_received);
  791. UPDATE_EXTEND_TSTAT(rcv_mcast_pkts,
  792. total_multicast_packets_received);
  793. UPDATE_EXTEND_TSTAT(rcv_bcast_pkts,
  794. total_broadcast_packets_received);
  795. UPDATE_EXTEND_E_TSTAT(pkts_too_big_discard,
  796. etherstatsoverrsizepkts);
  797. UPDATE_EXTEND_E_TSTAT(no_buff_discard, no_buff_discard);
  798. SUB_EXTEND_USTAT(ucast_no_buff_pkts,
  799. total_unicast_packets_received);
  800. SUB_EXTEND_USTAT(mcast_no_buff_pkts,
  801. total_multicast_packets_received);
  802. SUB_EXTEND_USTAT(bcast_no_buff_pkts,
  803. total_broadcast_packets_received);
  804. UPDATE_EXTEND_E_USTAT(ucast_no_buff_pkts, no_buff_discard);
  805. UPDATE_EXTEND_E_USTAT(mcast_no_buff_pkts, no_buff_discard);
  806. UPDATE_EXTEND_E_USTAT(bcast_no_buff_pkts, no_buff_discard);
  807. UPDATE_QSTAT(xclient->bcast_bytes_sent,
  808. total_broadcast_bytes_transmitted);
  809. UPDATE_QSTAT(xclient->mcast_bytes_sent,
  810. total_multicast_bytes_transmitted);
  811. UPDATE_QSTAT(xclient->ucast_bytes_sent,
  812. total_unicast_bytes_transmitted);
  813. /*
  814. * sum to total_bytes_transmitted all
  815. * unicast/multicast/broadcast
  816. */
  817. qstats->total_bytes_transmitted_hi =
  818. qstats->total_unicast_bytes_transmitted_hi;
  819. qstats->total_bytes_transmitted_lo =
  820. qstats->total_unicast_bytes_transmitted_lo;
  821. ADD_64(qstats->total_bytes_transmitted_hi,
  822. qstats->total_broadcast_bytes_transmitted_hi,
  823. qstats->total_bytes_transmitted_lo,
  824. qstats->total_broadcast_bytes_transmitted_lo);
  825. ADD_64(qstats->total_bytes_transmitted_hi,
  826. qstats->total_multicast_bytes_transmitted_hi,
  827. qstats->total_bytes_transmitted_lo,
  828. qstats->total_multicast_bytes_transmitted_lo);
  829. UPDATE_EXTEND_XSTAT(ucast_pkts_sent,
  830. total_unicast_packets_transmitted);
  831. UPDATE_EXTEND_XSTAT(mcast_pkts_sent,
  832. total_multicast_packets_transmitted);
  833. UPDATE_EXTEND_XSTAT(bcast_pkts_sent,
  834. total_broadcast_packets_transmitted);
  835. UPDATE_EXTEND_TSTAT(checksum_discard,
  836. total_packets_received_checksum_discarded);
  837. UPDATE_EXTEND_TSTAT(ttl0_discard,
  838. total_packets_received_ttl0_discarded);
  839. UPDATE_EXTEND_XSTAT(error_drop_pkts,
  840. total_transmitted_dropped_packets_error);
  841. /* TPA aggregations completed */
  842. UPDATE_EXTEND_E_USTAT(coalesced_events, total_tpa_aggregations);
  843. /* Number of network frames aggregated by TPA */
  844. UPDATE_EXTEND_E_USTAT(coalesced_pkts,
  845. total_tpa_aggregated_frames);
  846. /* Total number of bytes in completed TPA aggregations */
  847. UPDATE_QSTAT(uclient->coalesced_bytes, total_tpa_bytes);
  848. UPDATE_ESTAT_QSTAT_64(total_tpa_bytes);
  849. UPDATE_FSTAT_QSTAT(total_bytes_received);
  850. UPDATE_FSTAT_QSTAT(total_bytes_transmitted);
  851. UPDATE_FSTAT_QSTAT(total_unicast_packets_received);
  852. UPDATE_FSTAT_QSTAT(total_multicast_packets_received);
  853. UPDATE_FSTAT_QSTAT(total_broadcast_packets_received);
  854. UPDATE_FSTAT_QSTAT(total_unicast_packets_transmitted);
  855. UPDATE_FSTAT_QSTAT(total_multicast_packets_transmitted);
  856. UPDATE_FSTAT_QSTAT(total_broadcast_packets_transmitted);
  857. UPDATE_FSTAT_QSTAT(valid_bytes_received);
  858. }
  859. ADD_64(estats->total_bytes_received_hi,
  860. estats->rx_stat_ifhcinbadoctets_hi,
  861. estats->total_bytes_received_lo,
  862. estats->rx_stat_ifhcinbadoctets_lo);
  863. ADD_64(estats->total_bytes_received_hi,
  864. le32_to_cpu(tfunc->rcv_error_bytes.hi),
  865. estats->total_bytes_received_lo,
  866. le32_to_cpu(tfunc->rcv_error_bytes.lo));
  867. ADD_64(estats->error_bytes_received_hi,
  868. le32_to_cpu(tfunc->rcv_error_bytes.hi),
  869. estats->error_bytes_received_lo,
  870. le32_to_cpu(tfunc->rcv_error_bytes.lo));
  871. UPDATE_ESTAT(etherstatsoverrsizepkts, rx_stat_dot3statsframestoolong);
  872. ADD_64(estats->error_bytes_received_hi,
  873. estats->rx_stat_ifhcinbadoctets_hi,
  874. estats->error_bytes_received_lo,
  875. estats->rx_stat_ifhcinbadoctets_lo);
  876. if (bp->port.pmf) {
  877. struct bnx2x_fw_port_stats_old *fwstats = &bp->fw_stats_old;
  878. UPDATE_FW_STAT(mac_filter_discard);
  879. UPDATE_FW_STAT(mf_tag_discard);
  880. UPDATE_FW_STAT(brb_truncate_discard);
  881. UPDATE_FW_STAT(mac_discard);
  882. }
  883. fstats->host_func_stats_start = ++fstats->host_func_stats_end;
  884. bp->stats_pending = 0;
  885. return 0;
  886. }
  887. static void bnx2x_net_stats_update(struct bnx2x *bp)
  888. {
  889. struct bnx2x_eth_stats *estats = &bp->eth_stats;
  890. struct net_device_stats *nstats = &bp->dev->stats;
  891. unsigned long tmp;
  892. int i;
  893. nstats->rx_packets =
  894. bnx2x_hilo(&estats->total_unicast_packets_received_hi) +
  895. bnx2x_hilo(&estats->total_multicast_packets_received_hi) +
  896. bnx2x_hilo(&estats->total_broadcast_packets_received_hi);
  897. nstats->tx_packets =
  898. bnx2x_hilo(&estats->total_unicast_packets_transmitted_hi) +
  899. bnx2x_hilo(&estats->total_multicast_packets_transmitted_hi) +
  900. bnx2x_hilo(&estats->total_broadcast_packets_transmitted_hi);
  901. nstats->rx_bytes = bnx2x_hilo(&estats->total_bytes_received_hi);
  902. nstats->tx_bytes = bnx2x_hilo(&estats->total_bytes_transmitted_hi);
  903. tmp = estats->mac_discard;
  904. for_each_rx_queue(bp, i) {
  905. struct tstorm_per_queue_stats *old_tclient =
  906. &bp->fp_stats[i].old_tclient;
  907. tmp += le32_to_cpu(old_tclient->checksum_discard);
  908. }
  909. nstats->rx_dropped = tmp + bp->net_stats_old.rx_dropped;
  910. nstats->tx_dropped = 0;
  911. nstats->multicast =
  912. bnx2x_hilo(&estats->total_multicast_packets_received_hi);
  913. nstats->collisions =
  914. bnx2x_hilo(&estats->tx_stat_etherstatscollisions_hi);
  915. nstats->rx_length_errors =
  916. bnx2x_hilo(&estats->rx_stat_etherstatsundersizepkts_hi) +
  917. bnx2x_hilo(&estats->etherstatsoverrsizepkts_hi);
  918. nstats->rx_over_errors = bnx2x_hilo(&estats->brb_drop_hi) +
  919. bnx2x_hilo(&estats->brb_truncate_hi);
  920. nstats->rx_crc_errors =
  921. bnx2x_hilo(&estats->rx_stat_dot3statsfcserrors_hi);
  922. nstats->rx_frame_errors =
  923. bnx2x_hilo(&estats->rx_stat_dot3statsalignmenterrors_hi);
  924. nstats->rx_fifo_errors = bnx2x_hilo(&estats->no_buff_discard_hi);
  925. nstats->rx_missed_errors = 0;
  926. nstats->rx_errors = nstats->rx_length_errors +
  927. nstats->rx_over_errors +
  928. nstats->rx_crc_errors +
  929. nstats->rx_frame_errors +
  930. nstats->rx_fifo_errors +
  931. nstats->rx_missed_errors;
  932. nstats->tx_aborted_errors =
  933. bnx2x_hilo(&estats->tx_stat_dot3statslatecollisions_hi) +
  934. bnx2x_hilo(&estats->tx_stat_dot3statsexcessivecollisions_hi);
  935. nstats->tx_carrier_errors =
  936. bnx2x_hilo(&estats->rx_stat_dot3statscarriersenseerrors_hi);
  937. nstats->tx_fifo_errors = 0;
  938. nstats->tx_heartbeat_errors = 0;
  939. nstats->tx_window_errors = 0;
  940. nstats->tx_errors = nstats->tx_aborted_errors +
  941. nstats->tx_carrier_errors +
  942. bnx2x_hilo(&estats->tx_stat_dot3statsinternalmactransmiterrors_hi);
  943. }
  944. static void bnx2x_drv_stats_update(struct bnx2x *bp)
  945. {
  946. struct bnx2x_eth_stats *estats = &bp->eth_stats;
  947. int i;
  948. for_each_queue(bp, i) {
  949. struct bnx2x_eth_q_stats *qstats = &bp->fp_stats[i].eth_q_stats;
  950. struct bnx2x_eth_q_stats_old *qstats_old =
  951. &bp->fp_stats[i].eth_q_stats_old;
  952. UPDATE_ESTAT_QSTAT(driver_xoff);
  953. UPDATE_ESTAT_QSTAT(rx_err_discard_pkt);
  954. UPDATE_ESTAT_QSTAT(rx_skb_alloc_failed);
  955. UPDATE_ESTAT_QSTAT(hw_csum_err);
  956. }
  957. }
  958. static bool bnx2x_edebug_stats_stopped(struct bnx2x *bp)
  959. {
  960. u32 val;
  961. if (SHMEM2_HAS(bp, edebug_driver_if[1])) {
  962. val = SHMEM2_RD(bp, edebug_driver_if[1]);
  963. if (val == EDEBUG_DRIVER_IF_OP_CODE_DISABLE_STAT)
  964. return true;
  965. }
  966. return false;
  967. }
  968. static void bnx2x_stats_update(struct bnx2x *bp)
  969. {
  970. u32 *stats_comp = bnx2x_sp(bp, stats_comp);
  971. if (bnx2x_edebug_stats_stopped(bp))
  972. return;
  973. if (*stats_comp != DMAE_COMP_VAL)
  974. return;
  975. if (bp->port.pmf)
  976. bnx2x_hw_stats_update(bp);
  977. if (bnx2x_storm_stats_update(bp)) {
  978. if (bp->stats_pending++ == 3) {
  979. BNX2X_ERR("storm stats were not updated for 3 times\n");
  980. bnx2x_panic();
  981. }
  982. return;
  983. }
  984. bnx2x_net_stats_update(bp);
  985. bnx2x_drv_stats_update(bp);
  986. if (netif_msg_timer(bp)) {
  987. struct bnx2x_eth_stats *estats = &bp->eth_stats;
  988. netdev_dbg(bp->dev, "brb drops %u brb truncate %u\n",
  989. estats->brb_drop_lo, estats->brb_truncate_lo);
  990. }
  991. bnx2x_hw_stats_post(bp);
  992. bnx2x_storm_stats_post(bp);
  993. }
  994. static void bnx2x_port_stats_stop(struct bnx2x *bp)
  995. {
  996. struct dmae_command *dmae;
  997. u32 opcode;
  998. int loader_idx = PMF_DMAE_C(bp);
  999. u32 *stats_comp = bnx2x_sp(bp, stats_comp);
  1000. bp->executer_idx = 0;
  1001. opcode = bnx2x_dmae_opcode(bp, DMAE_SRC_PCI, DMAE_DST_GRC, false, 0);
  1002. if (bp->port.port_stx) {
  1003. dmae = bnx2x_sp(bp, dmae[bp->executer_idx++]);
  1004. if (bp->func_stx)
  1005. dmae->opcode = bnx2x_dmae_opcode_add_comp(
  1006. opcode, DMAE_COMP_GRC);
  1007. else
  1008. dmae->opcode = bnx2x_dmae_opcode_add_comp(
  1009. opcode, DMAE_COMP_PCI);
  1010. dmae->src_addr_lo = U64_LO(bnx2x_sp_mapping(bp, port_stats));
  1011. dmae->src_addr_hi = U64_HI(bnx2x_sp_mapping(bp, port_stats));
  1012. dmae->dst_addr_lo = bp->port.port_stx >> 2;
  1013. dmae->dst_addr_hi = 0;
  1014. dmae->len = bnx2x_get_port_stats_dma_len(bp);
  1015. if (bp->func_stx) {
  1016. dmae->comp_addr_lo = dmae_reg_go_c[loader_idx] >> 2;
  1017. dmae->comp_addr_hi = 0;
  1018. dmae->comp_val = 1;
  1019. } else {
  1020. dmae->comp_addr_lo =
  1021. U64_LO(bnx2x_sp_mapping(bp, stats_comp));
  1022. dmae->comp_addr_hi =
  1023. U64_HI(bnx2x_sp_mapping(bp, stats_comp));
  1024. dmae->comp_val = DMAE_COMP_VAL;
  1025. *stats_comp = 0;
  1026. }
  1027. }
  1028. if (bp->func_stx) {
  1029. dmae = bnx2x_sp(bp, dmae[bp->executer_idx++]);
  1030. dmae->opcode =
  1031. bnx2x_dmae_opcode_add_comp(opcode, DMAE_COMP_PCI);
  1032. dmae->src_addr_lo = U64_LO(bnx2x_sp_mapping(bp, func_stats));
  1033. dmae->src_addr_hi = U64_HI(bnx2x_sp_mapping(bp, func_stats));
  1034. dmae->dst_addr_lo = bp->func_stx >> 2;
  1035. dmae->dst_addr_hi = 0;
  1036. dmae->len = sizeof(struct host_func_stats) >> 2;
  1037. dmae->comp_addr_lo = U64_LO(bnx2x_sp_mapping(bp, stats_comp));
  1038. dmae->comp_addr_hi = U64_HI(bnx2x_sp_mapping(bp, stats_comp));
  1039. dmae->comp_val = DMAE_COMP_VAL;
  1040. *stats_comp = 0;
  1041. }
  1042. }
  1043. static void bnx2x_stats_stop(struct bnx2x *bp)
  1044. {
  1045. int update = 0;
  1046. bnx2x_stats_comp(bp);
  1047. if (bp->port.pmf)
  1048. update = (bnx2x_hw_stats_update(bp) == 0);
  1049. update |= (bnx2x_storm_stats_update(bp) == 0);
  1050. if (update) {
  1051. bnx2x_net_stats_update(bp);
  1052. if (bp->port.pmf)
  1053. bnx2x_port_stats_stop(bp);
  1054. bnx2x_hw_stats_post(bp);
  1055. bnx2x_stats_comp(bp);
  1056. }
  1057. }
  1058. static void bnx2x_stats_do_nothing(struct bnx2x *bp)
  1059. {
  1060. }
  1061. static const struct {
  1062. void (*action)(struct bnx2x *bp);
  1063. enum bnx2x_stats_state next_state;
  1064. } bnx2x_stats_stm[STATS_STATE_MAX][STATS_EVENT_MAX] = {
  1065. /* state event */
  1066. {
  1067. /* DISABLED PMF */ {bnx2x_stats_pmf_update, STATS_STATE_DISABLED},
  1068. /* LINK_UP */ {bnx2x_stats_start, STATS_STATE_ENABLED},
  1069. /* UPDATE */ {bnx2x_stats_do_nothing, STATS_STATE_DISABLED},
  1070. /* STOP */ {bnx2x_stats_do_nothing, STATS_STATE_DISABLED}
  1071. },
  1072. {
  1073. /* ENABLED PMF */ {bnx2x_stats_pmf_start, STATS_STATE_ENABLED},
  1074. /* LINK_UP */ {bnx2x_stats_restart, STATS_STATE_ENABLED},
  1075. /* UPDATE */ {bnx2x_stats_update, STATS_STATE_ENABLED},
  1076. /* STOP */ {bnx2x_stats_stop, STATS_STATE_DISABLED}
  1077. }
  1078. };
  1079. void bnx2x_stats_handle(struct bnx2x *bp, enum bnx2x_stats_event event)
  1080. {
  1081. enum bnx2x_stats_state state;
  1082. if (unlikely(bp->panic))
  1083. return;
  1084. spin_lock_bh(&bp->stats_lock);
  1085. state = bp->stats_state;
  1086. bp->stats_state = bnx2x_stats_stm[state][event].next_state;
  1087. spin_unlock_bh(&bp->stats_lock);
  1088. bnx2x_stats_stm[state][event].action(bp);
  1089. if ((event != STATS_EVENT_UPDATE) || netif_msg_timer(bp))
  1090. DP(BNX2X_MSG_STATS, "state %d -> event %d -> state %d\n",
  1091. state, event, bp->stats_state);
  1092. }
  1093. static void bnx2x_port_stats_base_init(struct bnx2x *bp)
  1094. {
  1095. struct dmae_command *dmae;
  1096. u32 *stats_comp = bnx2x_sp(bp, stats_comp);
  1097. /* sanity */
  1098. if (!bp->port.pmf || !bp->port.port_stx) {
  1099. BNX2X_ERR("BUG!\n");
  1100. return;
  1101. }
  1102. bp->executer_idx = 0;
  1103. dmae = bnx2x_sp(bp, dmae[bp->executer_idx++]);
  1104. dmae->opcode = bnx2x_dmae_opcode(bp, DMAE_SRC_PCI, DMAE_DST_GRC,
  1105. true, DMAE_COMP_PCI);
  1106. dmae->src_addr_lo = U64_LO(bnx2x_sp_mapping(bp, port_stats));
  1107. dmae->src_addr_hi = U64_HI(bnx2x_sp_mapping(bp, port_stats));
  1108. dmae->dst_addr_lo = bp->port.port_stx >> 2;
  1109. dmae->dst_addr_hi = 0;
  1110. dmae->len = bnx2x_get_port_stats_dma_len(bp);
  1111. dmae->comp_addr_lo = U64_LO(bnx2x_sp_mapping(bp, stats_comp));
  1112. dmae->comp_addr_hi = U64_HI(bnx2x_sp_mapping(bp, stats_comp));
  1113. dmae->comp_val = DMAE_COMP_VAL;
  1114. *stats_comp = 0;
  1115. bnx2x_hw_stats_post(bp);
  1116. bnx2x_stats_comp(bp);
  1117. }
  1118. /* This function will prepare the statistics ramrod data the way
  1119. * we will only have to increment the statistics counter and
  1120. * send the ramrod each time we have to.
  1121. */
  1122. static void bnx2x_prep_fw_stats_req(struct bnx2x *bp)
  1123. {
  1124. int i;
  1125. int first_queue_query_index;
  1126. struct stats_query_header *stats_hdr = &bp->fw_stats_req->hdr;
  1127. dma_addr_t cur_data_offset;
  1128. struct stats_query_entry *cur_query_entry;
  1129. stats_hdr->cmd_num = bp->fw_stats_num;
  1130. stats_hdr->drv_stats_counter = 0;
  1131. /* storm_counters struct contains the counters of completed
  1132. * statistics requests per storm which are incremented by FW
  1133. * each time it completes hadning a statistics ramrod. We will
  1134. * check these counters in the timer handler and discard a
  1135. * (statistics) ramrod completion.
  1136. */
  1137. cur_data_offset = bp->fw_stats_data_mapping +
  1138. offsetof(struct bnx2x_fw_stats_data, storm_counters);
  1139. stats_hdr->stats_counters_addrs.hi =
  1140. cpu_to_le32(U64_HI(cur_data_offset));
  1141. stats_hdr->stats_counters_addrs.lo =
  1142. cpu_to_le32(U64_LO(cur_data_offset));
  1143. /* prepare to the first stats ramrod (will be completed with
  1144. * the counters equal to zero) - init counters to somethig different.
  1145. */
  1146. memset(&bp->fw_stats_data->storm_counters, 0xff,
  1147. sizeof(struct stats_counter));
  1148. /**** Port FW statistics data ****/
  1149. cur_data_offset = bp->fw_stats_data_mapping +
  1150. offsetof(struct bnx2x_fw_stats_data, port);
  1151. cur_query_entry = &bp->fw_stats_req->query[BNX2X_PORT_QUERY_IDX];
  1152. cur_query_entry->kind = STATS_TYPE_PORT;
  1153. /* For port query index is a DONT CARE */
  1154. cur_query_entry->index = BP_PORT(bp);
  1155. /* For port query funcID is a DONT CARE */
  1156. cur_query_entry->funcID = cpu_to_le16(BP_FUNC(bp));
  1157. cur_query_entry->address.hi = cpu_to_le32(U64_HI(cur_data_offset));
  1158. cur_query_entry->address.lo = cpu_to_le32(U64_LO(cur_data_offset));
  1159. /**** PF FW statistics data ****/
  1160. cur_data_offset = bp->fw_stats_data_mapping +
  1161. offsetof(struct bnx2x_fw_stats_data, pf);
  1162. cur_query_entry = &bp->fw_stats_req->query[BNX2X_PF_QUERY_IDX];
  1163. cur_query_entry->kind = STATS_TYPE_PF;
  1164. /* For PF query index is a DONT CARE */
  1165. cur_query_entry->index = BP_PORT(bp);
  1166. cur_query_entry->funcID = cpu_to_le16(BP_FUNC(bp));
  1167. cur_query_entry->address.hi = cpu_to_le32(U64_HI(cur_data_offset));
  1168. cur_query_entry->address.lo = cpu_to_le32(U64_LO(cur_data_offset));
  1169. /**** FCoE FW statistics data ****/
  1170. if (!NO_FCOE(bp)) {
  1171. cur_data_offset = bp->fw_stats_data_mapping +
  1172. offsetof(struct bnx2x_fw_stats_data, fcoe);
  1173. cur_query_entry =
  1174. &bp->fw_stats_req->query[BNX2X_FCOE_QUERY_IDX];
  1175. cur_query_entry->kind = STATS_TYPE_FCOE;
  1176. /* For FCoE query index is a DONT CARE */
  1177. cur_query_entry->index = BP_PORT(bp);
  1178. cur_query_entry->funcID = cpu_to_le16(BP_FUNC(bp));
  1179. cur_query_entry->address.hi =
  1180. cpu_to_le32(U64_HI(cur_data_offset));
  1181. cur_query_entry->address.lo =
  1182. cpu_to_le32(U64_LO(cur_data_offset));
  1183. }
  1184. /**** Clients' queries ****/
  1185. cur_data_offset = bp->fw_stats_data_mapping +
  1186. offsetof(struct bnx2x_fw_stats_data, queue_stats);
  1187. /* first queue query index depends whether FCoE offloaded request will
  1188. * be included in the ramrod
  1189. */
  1190. if (!NO_FCOE(bp))
  1191. first_queue_query_index = BNX2X_FIRST_QUEUE_QUERY_IDX;
  1192. else
  1193. first_queue_query_index = BNX2X_FIRST_QUEUE_QUERY_IDX - 1;
  1194. for_each_eth_queue(bp, i) {
  1195. cur_query_entry =
  1196. &bp->fw_stats_req->
  1197. query[first_queue_query_index + i];
  1198. cur_query_entry->kind = STATS_TYPE_QUEUE;
  1199. cur_query_entry->index = bnx2x_stats_id(&bp->fp[i]);
  1200. cur_query_entry->funcID = cpu_to_le16(BP_FUNC(bp));
  1201. cur_query_entry->address.hi =
  1202. cpu_to_le32(U64_HI(cur_data_offset));
  1203. cur_query_entry->address.lo =
  1204. cpu_to_le32(U64_LO(cur_data_offset));
  1205. cur_data_offset += sizeof(struct per_queue_stats);
  1206. }
  1207. /* add FCoE queue query if needed */
  1208. if (!NO_FCOE(bp)) {
  1209. cur_query_entry =
  1210. &bp->fw_stats_req->
  1211. query[first_queue_query_index + i];
  1212. cur_query_entry->kind = STATS_TYPE_QUEUE;
  1213. cur_query_entry->index = bnx2x_stats_id(&bp->fp[FCOE_IDX(bp)]);
  1214. cur_query_entry->funcID = cpu_to_le16(BP_FUNC(bp));
  1215. cur_query_entry->address.hi =
  1216. cpu_to_le32(U64_HI(cur_data_offset));
  1217. cur_query_entry->address.lo =
  1218. cpu_to_le32(U64_LO(cur_data_offset));
  1219. }
  1220. }
  1221. void bnx2x_stats_init(struct bnx2x *bp)
  1222. {
  1223. int /*abs*/port = BP_PORT(bp);
  1224. int mb_idx = BP_FW_MB_IDX(bp);
  1225. int i;
  1226. bp->stats_pending = 0;
  1227. bp->executer_idx = 0;
  1228. bp->stats_counter = 0;
  1229. /* port and func stats for management */
  1230. if (!BP_NOMCP(bp)) {
  1231. bp->port.port_stx = SHMEM_RD(bp, port_mb[port].port_stx);
  1232. bp->func_stx = SHMEM_RD(bp, func_mb[mb_idx].fw_mb_param);
  1233. } else {
  1234. bp->port.port_stx = 0;
  1235. bp->func_stx = 0;
  1236. }
  1237. DP(BNX2X_MSG_STATS, "port_stx 0x%x func_stx 0x%x\n",
  1238. bp->port.port_stx, bp->func_stx);
  1239. /* pmf should retrieve port statistics from SP on a non-init*/
  1240. if (!bp->stats_init && bp->port.pmf && bp->port.port_stx)
  1241. bnx2x_stats_handle(bp, STATS_EVENT_PMF);
  1242. port = BP_PORT(bp);
  1243. /* port stats */
  1244. memset(&(bp->port.old_nig_stats), 0, sizeof(struct nig_stats));
  1245. bp->port.old_nig_stats.brb_discard =
  1246. REG_RD(bp, NIG_REG_STAT0_BRB_DISCARD + port*0x38);
  1247. bp->port.old_nig_stats.brb_truncate =
  1248. REG_RD(bp, NIG_REG_STAT0_BRB_TRUNCATE + port*0x38);
  1249. if (!CHIP_IS_E3(bp)) {
  1250. REG_RD_DMAE(bp, NIG_REG_STAT0_EGRESS_MAC_PKT0 + port*0x50,
  1251. &(bp->port.old_nig_stats.egress_mac_pkt0_lo), 2);
  1252. REG_RD_DMAE(bp, NIG_REG_STAT0_EGRESS_MAC_PKT1 + port*0x50,
  1253. &(bp->port.old_nig_stats.egress_mac_pkt1_lo), 2);
  1254. }
  1255. /* function stats */
  1256. for_each_queue(bp, i) {
  1257. struct bnx2x_fp_stats *fp_stats = &bp->fp_stats[i];
  1258. memset(&fp_stats->old_tclient, 0,
  1259. sizeof(fp_stats->old_tclient));
  1260. memset(&fp_stats->old_uclient, 0,
  1261. sizeof(fp_stats->old_uclient));
  1262. memset(&fp_stats->old_xclient, 0,
  1263. sizeof(fp_stats->old_xclient));
  1264. if (bp->stats_init) {
  1265. memset(&fp_stats->eth_q_stats, 0,
  1266. sizeof(fp_stats->eth_q_stats));
  1267. memset(&fp_stats->eth_q_stats_old, 0,
  1268. sizeof(fp_stats->eth_q_stats_old));
  1269. }
  1270. }
  1271. /* Prepare statistics ramrod data */
  1272. bnx2x_prep_fw_stats_req(bp);
  1273. memset(&bp->dev->stats, 0, sizeof(bp->dev->stats));
  1274. if (bp->stats_init) {
  1275. memset(&bp->net_stats_old, 0, sizeof(bp->net_stats_old));
  1276. memset(&bp->fw_stats_old, 0, sizeof(bp->fw_stats_old));
  1277. memset(&bp->eth_stats_old, 0, sizeof(bp->eth_stats_old));
  1278. memset(&bp->eth_stats, 0, sizeof(bp->eth_stats));
  1279. memset(&bp->func_stats, 0, sizeof(bp->func_stats));
  1280. /* Clean SP from previous statistics */
  1281. if (bp->func_stx) {
  1282. memset(bnx2x_sp(bp, func_stats), 0,
  1283. sizeof(struct host_func_stats));
  1284. bnx2x_func_stats_init(bp);
  1285. bnx2x_hw_stats_post(bp);
  1286. bnx2x_stats_comp(bp);
  1287. }
  1288. }
  1289. bp->stats_state = STATS_STATE_DISABLED;
  1290. if (bp->port.pmf && bp->port.port_stx)
  1291. bnx2x_port_stats_base_init(bp);
  1292. /* mark the end of statistics initializiation */
  1293. bp->stats_init = false;
  1294. }
  1295. void bnx2x_save_statistics(struct bnx2x *bp)
  1296. {
  1297. int i;
  1298. struct net_device_stats *nstats = &bp->dev->stats;
  1299. /* save queue statistics */
  1300. for_each_eth_queue(bp, i) {
  1301. struct bnx2x_fastpath *fp = &bp->fp[i];
  1302. struct bnx2x_eth_q_stats *qstats =
  1303. &bnx2x_fp_stats(bp, fp)->eth_q_stats;
  1304. struct bnx2x_eth_q_stats_old *qstats_old =
  1305. &bnx2x_fp_stats(bp, fp)->eth_q_stats_old;
  1306. UPDATE_QSTAT_OLD(total_unicast_bytes_received_hi);
  1307. UPDATE_QSTAT_OLD(total_unicast_bytes_received_lo);
  1308. UPDATE_QSTAT_OLD(total_broadcast_bytes_received_hi);
  1309. UPDATE_QSTAT_OLD(total_broadcast_bytes_received_lo);
  1310. UPDATE_QSTAT_OLD(total_multicast_bytes_received_hi);
  1311. UPDATE_QSTAT_OLD(total_multicast_bytes_received_lo);
  1312. UPDATE_QSTAT_OLD(total_unicast_bytes_transmitted_hi);
  1313. UPDATE_QSTAT_OLD(total_unicast_bytes_transmitted_lo);
  1314. UPDATE_QSTAT_OLD(total_broadcast_bytes_transmitted_hi);
  1315. UPDATE_QSTAT_OLD(total_broadcast_bytes_transmitted_lo);
  1316. UPDATE_QSTAT_OLD(total_multicast_bytes_transmitted_hi);
  1317. UPDATE_QSTAT_OLD(total_multicast_bytes_transmitted_lo);
  1318. UPDATE_QSTAT_OLD(total_tpa_bytes_hi);
  1319. UPDATE_QSTAT_OLD(total_tpa_bytes_lo);
  1320. }
  1321. /* save net_device_stats statistics */
  1322. bp->net_stats_old.rx_dropped = nstats->rx_dropped;
  1323. /* store port firmware statistics */
  1324. if (bp->port.pmf && IS_MF(bp)) {
  1325. struct bnx2x_eth_stats *estats = &bp->eth_stats;
  1326. struct bnx2x_fw_port_stats_old *fwstats = &bp->fw_stats_old;
  1327. UPDATE_FW_STAT_OLD(mac_filter_discard);
  1328. UPDATE_FW_STAT_OLD(mf_tag_discard);
  1329. UPDATE_FW_STAT_OLD(brb_truncate_discard);
  1330. UPDATE_FW_STAT_OLD(mac_discard);
  1331. }
  1332. }
  1333. void bnx2x_afex_collect_stats(struct bnx2x *bp, void *void_afex_stats,
  1334. u32 stats_type)
  1335. {
  1336. int i;
  1337. struct afex_stats *afex_stats = (struct afex_stats *)void_afex_stats;
  1338. struct bnx2x_eth_stats *estats = &bp->eth_stats;
  1339. struct per_queue_stats *fcoe_q_stats =
  1340. &bp->fw_stats_data->queue_stats[FCOE_IDX(bp)];
  1341. struct tstorm_per_queue_stats *fcoe_q_tstorm_stats =
  1342. &fcoe_q_stats->tstorm_queue_statistics;
  1343. struct ustorm_per_queue_stats *fcoe_q_ustorm_stats =
  1344. &fcoe_q_stats->ustorm_queue_statistics;
  1345. struct xstorm_per_queue_stats *fcoe_q_xstorm_stats =
  1346. &fcoe_q_stats->xstorm_queue_statistics;
  1347. struct fcoe_statistics_params *fw_fcoe_stat =
  1348. &bp->fw_stats_data->fcoe;
  1349. memset(afex_stats, 0, sizeof(struct afex_stats));
  1350. for_each_eth_queue(bp, i) {
  1351. struct bnx2x_eth_q_stats *qstats = &bp->fp_stats[i].eth_q_stats;
  1352. ADD_64(afex_stats->rx_unicast_bytes_hi,
  1353. qstats->total_unicast_bytes_received_hi,
  1354. afex_stats->rx_unicast_bytes_lo,
  1355. qstats->total_unicast_bytes_received_lo);
  1356. ADD_64(afex_stats->rx_broadcast_bytes_hi,
  1357. qstats->total_broadcast_bytes_received_hi,
  1358. afex_stats->rx_broadcast_bytes_lo,
  1359. qstats->total_broadcast_bytes_received_lo);
  1360. ADD_64(afex_stats->rx_multicast_bytes_hi,
  1361. qstats->total_multicast_bytes_received_hi,
  1362. afex_stats->rx_multicast_bytes_lo,
  1363. qstats->total_multicast_bytes_received_lo);
  1364. ADD_64(afex_stats->rx_unicast_frames_hi,
  1365. qstats->total_unicast_packets_received_hi,
  1366. afex_stats->rx_unicast_frames_lo,
  1367. qstats->total_unicast_packets_received_lo);
  1368. ADD_64(afex_stats->rx_broadcast_frames_hi,
  1369. qstats->total_broadcast_packets_received_hi,
  1370. afex_stats->rx_broadcast_frames_lo,
  1371. qstats->total_broadcast_packets_received_lo);
  1372. ADD_64(afex_stats->rx_multicast_frames_hi,
  1373. qstats->total_multicast_packets_received_hi,
  1374. afex_stats->rx_multicast_frames_lo,
  1375. qstats->total_multicast_packets_received_lo);
  1376. /* sum to rx_frames_discarded all discraded
  1377. * packets due to size, ttl0 and checksum
  1378. */
  1379. ADD_64(afex_stats->rx_frames_discarded_hi,
  1380. qstats->total_packets_received_checksum_discarded_hi,
  1381. afex_stats->rx_frames_discarded_lo,
  1382. qstats->total_packets_received_checksum_discarded_lo);
  1383. ADD_64(afex_stats->rx_frames_discarded_hi,
  1384. qstats->total_packets_received_ttl0_discarded_hi,
  1385. afex_stats->rx_frames_discarded_lo,
  1386. qstats->total_packets_received_ttl0_discarded_lo);
  1387. ADD_64(afex_stats->rx_frames_discarded_hi,
  1388. qstats->etherstatsoverrsizepkts_hi,
  1389. afex_stats->rx_frames_discarded_lo,
  1390. qstats->etherstatsoverrsizepkts_lo);
  1391. ADD_64(afex_stats->rx_frames_dropped_hi,
  1392. qstats->no_buff_discard_hi,
  1393. afex_stats->rx_frames_dropped_lo,
  1394. qstats->no_buff_discard_lo);
  1395. ADD_64(afex_stats->tx_unicast_bytes_hi,
  1396. qstats->total_unicast_bytes_transmitted_hi,
  1397. afex_stats->tx_unicast_bytes_lo,
  1398. qstats->total_unicast_bytes_transmitted_lo);
  1399. ADD_64(afex_stats->tx_broadcast_bytes_hi,
  1400. qstats->total_broadcast_bytes_transmitted_hi,
  1401. afex_stats->tx_broadcast_bytes_lo,
  1402. qstats->total_broadcast_bytes_transmitted_lo);
  1403. ADD_64(afex_stats->tx_multicast_bytes_hi,
  1404. qstats->total_multicast_bytes_transmitted_hi,
  1405. afex_stats->tx_multicast_bytes_lo,
  1406. qstats->total_multicast_bytes_transmitted_lo);
  1407. ADD_64(afex_stats->tx_unicast_frames_hi,
  1408. qstats->total_unicast_packets_transmitted_hi,
  1409. afex_stats->tx_unicast_frames_lo,
  1410. qstats->total_unicast_packets_transmitted_lo);
  1411. ADD_64(afex_stats->tx_broadcast_frames_hi,
  1412. qstats->total_broadcast_packets_transmitted_hi,
  1413. afex_stats->tx_broadcast_frames_lo,
  1414. qstats->total_broadcast_packets_transmitted_lo);
  1415. ADD_64(afex_stats->tx_multicast_frames_hi,
  1416. qstats->total_multicast_packets_transmitted_hi,
  1417. afex_stats->tx_multicast_frames_lo,
  1418. qstats->total_multicast_packets_transmitted_lo);
  1419. ADD_64(afex_stats->tx_frames_dropped_hi,
  1420. qstats->total_transmitted_dropped_packets_error_hi,
  1421. afex_stats->tx_frames_dropped_lo,
  1422. qstats->total_transmitted_dropped_packets_error_lo);
  1423. }
  1424. /* now add FCoE statistics which are collected separately
  1425. * (both offloaded and non offloaded)
  1426. */
  1427. if (!NO_FCOE(bp)) {
  1428. ADD_64_LE(afex_stats->rx_unicast_bytes_hi,
  1429. LE32_0,
  1430. afex_stats->rx_unicast_bytes_lo,
  1431. fw_fcoe_stat->rx_stat0.fcoe_rx_byte_cnt);
  1432. ADD_64_LE(afex_stats->rx_unicast_bytes_hi,
  1433. fcoe_q_tstorm_stats->rcv_ucast_bytes.hi,
  1434. afex_stats->rx_unicast_bytes_lo,
  1435. fcoe_q_tstorm_stats->rcv_ucast_bytes.lo);
  1436. ADD_64_LE(afex_stats->rx_broadcast_bytes_hi,
  1437. fcoe_q_tstorm_stats->rcv_bcast_bytes.hi,
  1438. afex_stats->rx_broadcast_bytes_lo,
  1439. fcoe_q_tstorm_stats->rcv_bcast_bytes.lo);
  1440. ADD_64_LE(afex_stats->rx_multicast_bytes_hi,
  1441. fcoe_q_tstorm_stats->rcv_mcast_bytes.hi,
  1442. afex_stats->rx_multicast_bytes_lo,
  1443. fcoe_q_tstorm_stats->rcv_mcast_bytes.lo);
  1444. ADD_64_LE(afex_stats->rx_unicast_frames_hi,
  1445. LE32_0,
  1446. afex_stats->rx_unicast_frames_lo,
  1447. fw_fcoe_stat->rx_stat0.fcoe_rx_pkt_cnt);
  1448. ADD_64_LE(afex_stats->rx_unicast_frames_hi,
  1449. LE32_0,
  1450. afex_stats->rx_unicast_frames_lo,
  1451. fcoe_q_tstorm_stats->rcv_ucast_pkts);
  1452. ADD_64_LE(afex_stats->rx_broadcast_frames_hi,
  1453. LE32_0,
  1454. afex_stats->rx_broadcast_frames_lo,
  1455. fcoe_q_tstorm_stats->rcv_bcast_pkts);
  1456. ADD_64_LE(afex_stats->rx_multicast_frames_hi,
  1457. LE32_0,
  1458. afex_stats->rx_multicast_frames_lo,
  1459. fcoe_q_tstorm_stats->rcv_ucast_pkts);
  1460. ADD_64_LE(afex_stats->rx_frames_discarded_hi,
  1461. LE32_0,
  1462. afex_stats->rx_frames_discarded_lo,
  1463. fcoe_q_tstorm_stats->checksum_discard);
  1464. ADD_64_LE(afex_stats->rx_frames_discarded_hi,
  1465. LE32_0,
  1466. afex_stats->rx_frames_discarded_lo,
  1467. fcoe_q_tstorm_stats->pkts_too_big_discard);
  1468. ADD_64_LE(afex_stats->rx_frames_discarded_hi,
  1469. LE32_0,
  1470. afex_stats->rx_frames_discarded_lo,
  1471. fcoe_q_tstorm_stats->ttl0_discard);
  1472. ADD_64_LE16(afex_stats->rx_frames_dropped_hi,
  1473. LE16_0,
  1474. afex_stats->rx_frames_dropped_lo,
  1475. fcoe_q_tstorm_stats->no_buff_discard);
  1476. ADD_64_LE(afex_stats->rx_frames_dropped_hi,
  1477. LE32_0,
  1478. afex_stats->rx_frames_dropped_lo,
  1479. fcoe_q_ustorm_stats->ucast_no_buff_pkts);
  1480. ADD_64_LE(afex_stats->rx_frames_dropped_hi,
  1481. LE32_0,
  1482. afex_stats->rx_frames_dropped_lo,
  1483. fcoe_q_ustorm_stats->mcast_no_buff_pkts);
  1484. ADD_64_LE(afex_stats->rx_frames_dropped_hi,
  1485. LE32_0,
  1486. afex_stats->rx_frames_dropped_lo,
  1487. fcoe_q_ustorm_stats->bcast_no_buff_pkts);
  1488. ADD_64_LE(afex_stats->rx_frames_dropped_hi,
  1489. LE32_0,
  1490. afex_stats->rx_frames_dropped_lo,
  1491. fw_fcoe_stat->rx_stat1.fcoe_rx_drop_pkt_cnt);
  1492. ADD_64_LE(afex_stats->rx_frames_dropped_hi,
  1493. LE32_0,
  1494. afex_stats->rx_frames_dropped_lo,
  1495. fw_fcoe_stat->rx_stat2.fcoe_rx_drop_pkt_cnt);
  1496. ADD_64_LE(afex_stats->tx_unicast_bytes_hi,
  1497. LE32_0,
  1498. afex_stats->tx_unicast_bytes_lo,
  1499. fw_fcoe_stat->tx_stat.fcoe_tx_byte_cnt);
  1500. ADD_64_LE(afex_stats->tx_unicast_bytes_hi,
  1501. fcoe_q_xstorm_stats->ucast_bytes_sent.hi,
  1502. afex_stats->tx_unicast_bytes_lo,
  1503. fcoe_q_xstorm_stats->ucast_bytes_sent.lo);
  1504. ADD_64_LE(afex_stats->tx_broadcast_bytes_hi,
  1505. fcoe_q_xstorm_stats->bcast_bytes_sent.hi,
  1506. afex_stats->tx_broadcast_bytes_lo,
  1507. fcoe_q_xstorm_stats->bcast_bytes_sent.lo);
  1508. ADD_64_LE(afex_stats->tx_multicast_bytes_hi,
  1509. fcoe_q_xstorm_stats->mcast_bytes_sent.hi,
  1510. afex_stats->tx_multicast_bytes_lo,
  1511. fcoe_q_xstorm_stats->mcast_bytes_sent.lo);
  1512. ADD_64_LE(afex_stats->tx_unicast_frames_hi,
  1513. LE32_0,
  1514. afex_stats->tx_unicast_frames_lo,
  1515. fw_fcoe_stat->tx_stat.fcoe_tx_pkt_cnt);
  1516. ADD_64_LE(afex_stats->tx_unicast_frames_hi,
  1517. LE32_0,
  1518. afex_stats->tx_unicast_frames_lo,
  1519. fcoe_q_xstorm_stats->ucast_pkts_sent);
  1520. ADD_64_LE(afex_stats->tx_broadcast_frames_hi,
  1521. LE32_0,
  1522. afex_stats->tx_broadcast_frames_lo,
  1523. fcoe_q_xstorm_stats->bcast_pkts_sent);
  1524. ADD_64_LE(afex_stats->tx_multicast_frames_hi,
  1525. LE32_0,
  1526. afex_stats->tx_multicast_frames_lo,
  1527. fcoe_q_xstorm_stats->mcast_pkts_sent);
  1528. ADD_64_LE(afex_stats->tx_frames_dropped_hi,
  1529. LE32_0,
  1530. afex_stats->tx_frames_dropped_lo,
  1531. fcoe_q_xstorm_stats->error_drop_pkts);
  1532. }
  1533. /* if port stats are requested, add them to the PMF
  1534. * stats, as anyway they will be accumulated by the
  1535. * MCP before sent to the switch
  1536. */
  1537. if ((bp->port.pmf) && (stats_type == VICSTATST_UIF_INDEX)) {
  1538. ADD_64(afex_stats->rx_frames_dropped_hi,
  1539. 0,
  1540. afex_stats->rx_frames_dropped_lo,
  1541. estats->mac_filter_discard);
  1542. ADD_64(afex_stats->rx_frames_dropped_hi,
  1543. 0,
  1544. afex_stats->rx_frames_dropped_lo,
  1545. estats->brb_truncate_discard);
  1546. ADD_64(afex_stats->rx_frames_discarded_hi,
  1547. 0,
  1548. afex_stats->rx_frames_discarded_lo,
  1549. estats->mac_discard);
  1550. }
  1551. }