mainstone.c 15 KB

123456789101112131415161718192021222324252627282930313233343536373839404142434445464748495051525354555657585960616263646566676869707172737475767778798081828384858687888990919293949596979899100101102103104105106107108109110111112113114115116117118119120121122123124125126127128129130131132133134135136137138139140141142143144145146147148149150151152153154155156157158159160161162163164165166167168169170171172173174175176177178179180181182183184185186187188189190191192193194195196197198199200201202203204205206207208209210211212213214215216217218219220221222223224225226227228229230231232233234235236237238239240241242243244245246247248249250251252253254255256257258259260261262263264265266267268269270271272273274275276277278279280281282283284285286287288289290291292293294295296297298299300301302303304305306307308309310311312313314315316317318319320321322323324325326327328329330331332333334335336337338339340341342343344345346347348349350351352353354355356357358359360361362363364365366367368369370371372373374375376377378379380381382383384385386387388389390391392393394395396397398399400401402403404405406407408409410411412413414415416417418419420421422423424425426427428429430431432433434435436437438439440441442443444445446447448449450451452453454455456457458459460461462463464465466467468469470471472473474475476477478479480481482483484485486487488489490491492493494495496497498499500501502503504505506507508509510511512513514515516517518519520521522523524525526527528529530531532533534535536537538539540541542543544545546547548549550551552553554555556557558559560561562563564565566567568569570571572573574575576577578579580581582583584585586587588589590591592593594595596597598599600601602603604605606607608609610611612613614615616617618619620621622623624625626627628629630
  1. /*
  2. * linux/arch/arm/mach-pxa/mainstone.c
  3. *
  4. * Support for the Intel HCDDBBVA0 Development Platform.
  5. * (go figure how they came up with such name...)
  6. *
  7. * Author: Nicolas Pitre
  8. * Created: Nov 05, 2002
  9. * Copyright: MontaVista Software Inc.
  10. *
  11. * This program is free software; you can redistribute it and/or modify
  12. * it under the terms of the GNU General Public License version 2 as
  13. * published by the Free Software Foundation.
  14. */
  15. #include <linux/init.h>
  16. #include <linux/platform_device.h>
  17. #include <linux/sysdev.h>
  18. #include <linux/interrupt.h>
  19. #include <linux/sched.h>
  20. #include <linux/bitops.h>
  21. #include <linux/fb.h>
  22. #include <linux/ioport.h>
  23. #include <linux/mtd/mtd.h>
  24. #include <linux/mtd/partitions.h>
  25. #include <linux/input.h>
  26. #include <linux/gpio_keys.h>
  27. #include <linux/pwm_backlight.h>
  28. #include <linux/smc91x.h>
  29. #include <asm/types.h>
  30. #include <asm/setup.h>
  31. #include <asm/memory.h>
  32. #include <asm/mach-types.h>
  33. #include <mach/hardware.h>
  34. #include <asm/irq.h>
  35. #include <asm/sizes.h>
  36. #include <asm/mach/arch.h>
  37. #include <asm/mach/map.h>
  38. #include <asm/mach/irq.h>
  39. #include <asm/mach/flash.h>
  40. #include <mach/pxa27x.h>
  41. #include <mach/gpio.h>
  42. #include <mach/mainstone.h>
  43. #include <mach/audio.h>
  44. #include <mach/pxafb.h>
  45. #include <plat/i2c.h>
  46. #include <mach/mmc.h>
  47. #include <mach/irda.h>
  48. #include <mach/ohci.h>
  49. #include <mach/pxa27x_keypad.h>
  50. #include "generic.h"
  51. #include "devices.h"
  52. static unsigned long mainstone_pin_config[] = {
  53. /* Chip Select */
  54. GPIO15_nCS_1,
  55. /* LCD - 16bpp Active TFT */
  56. GPIOxx_LCD_TFT_16BPP,
  57. GPIO16_PWM0_OUT, /* Backlight */
  58. /* MMC */
  59. GPIO32_MMC_CLK,
  60. GPIO112_MMC_CMD,
  61. GPIO92_MMC_DAT_0,
  62. GPIO109_MMC_DAT_1,
  63. GPIO110_MMC_DAT_2,
  64. GPIO111_MMC_DAT_3,
  65. /* USB Host Port 1 */
  66. GPIO88_USBH1_PWR,
  67. GPIO89_USBH1_PEN,
  68. /* PC Card */
  69. GPIO48_nPOE,
  70. GPIO49_nPWE,
  71. GPIO50_nPIOR,
  72. GPIO51_nPIOW,
  73. GPIO85_nPCE_1,
  74. GPIO54_nPCE_2,
  75. GPIO79_PSKTSEL,
  76. GPIO55_nPREG,
  77. GPIO56_nPWAIT,
  78. GPIO57_nIOIS16,
  79. /* AC97 */
  80. GPIO45_AC97_SYSCLK,
  81. /* Keypad */
  82. GPIO93_KP_DKIN_0,
  83. GPIO94_KP_DKIN_1,
  84. GPIO95_KP_DKIN_2,
  85. GPIO100_KP_MKIN_0 | WAKEUP_ON_LEVEL_HIGH,
  86. GPIO101_KP_MKIN_1 | WAKEUP_ON_LEVEL_HIGH,
  87. GPIO102_KP_MKIN_2 | WAKEUP_ON_LEVEL_HIGH,
  88. GPIO97_KP_MKIN_3 | WAKEUP_ON_LEVEL_HIGH,
  89. GPIO98_KP_MKIN_4 | WAKEUP_ON_LEVEL_HIGH,
  90. GPIO99_KP_MKIN_5 | WAKEUP_ON_LEVEL_HIGH,
  91. GPIO103_KP_MKOUT_0,
  92. GPIO104_KP_MKOUT_1,
  93. GPIO105_KP_MKOUT_2,
  94. GPIO106_KP_MKOUT_3,
  95. GPIO107_KP_MKOUT_4,
  96. GPIO108_KP_MKOUT_5,
  97. GPIO96_KP_MKOUT_6,
  98. /* I2C */
  99. GPIO117_I2C_SCL,
  100. GPIO118_I2C_SDA,
  101. /* GPIO */
  102. GPIO1_GPIO | WAKEUP_ON_EDGE_BOTH,
  103. };
  104. static unsigned long mainstone_irq_enabled;
  105. static void mainstone_mask_irq(unsigned int irq)
  106. {
  107. int mainstone_irq = (irq - MAINSTONE_IRQ(0));
  108. MST_INTMSKENA = (mainstone_irq_enabled &= ~(1 << mainstone_irq));
  109. }
  110. static void mainstone_unmask_irq(unsigned int irq)
  111. {
  112. int mainstone_irq = (irq - MAINSTONE_IRQ(0));
  113. /* the irq can be acknowledged only if deasserted, so it's done here */
  114. MST_INTSETCLR &= ~(1 << mainstone_irq);
  115. MST_INTMSKENA = (mainstone_irq_enabled |= (1 << mainstone_irq));
  116. }
  117. static struct irq_chip mainstone_irq_chip = {
  118. .name = "FPGA",
  119. .ack = mainstone_mask_irq,
  120. .mask = mainstone_mask_irq,
  121. .unmask = mainstone_unmask_irq,
  122. };
  123. static void mainstone_irq_handler(unsigned int irq, struct irq_desc *desc)
  124. {
  125. unsigned long pending = MST_INTSETCLR & mainstone_irq_enabled;
  126. do {
  127. desc->chip->ack(irq); /* clear useless edge notification */
  128. if (likely(pending)) {
  129. irq = MAINSTONE_IRQ(0) + __ffs(pending);
  130. generic_handle_irq(irq);
  131. }
  132. pending = MST_INTSETCLR & mainstone_irq_enabled;
  133. } while (pending);
  134. }
  135. static void __init mainstone_init_irq(void)
  136. {
  137. int irq;
  138. pxa27x_init_irq();
  139. /* setup extra Mainstone irqs */
  140. for(irq = MAINSTONE_IRQ(0); irq <= MAINSTONE_IRQ(15); irq++) {
  141. set_irq_chip(irq, &mainstone_irq_chip);
  142. set_irq_handler(irq, handle_level_irq);
  143. if (irq == MAINSTONE_IRQ(10) || irq == MAINSTONE_IRQ(14))
  144. set_irq_flags(irq, IRQF_VALID | IRQF_PROBE | IRQF_NOAUTOEN);
  145. else
  146. set_irq_flags(irq, IRQF_VALID | IRQF_PROBE);
  147. }
  148. set_irq_flags(MAINSTONE_IRQ(8), 0);
  149. set_irq_flags(MAINSTONE_IRQ(12), 0);
  150. MST_INTMSKENA = 0;
  151. MST_INTSETCLR = 0;
  152. set_irq_chained_handler(IRQ_GPIO(0), mainstone_irq_handler);
  153. set_irq_type(IRQ_GPIO(0), IRQ_TYPE_EDGE_FALLING);
  154. }
  155. #ifdef CONFIG_PM
  156. static int mainstone_irq_resume(struct sys_device *dev)
  157. {
  158. MST_INTMSKENA = mainstone_irq_enabled;
  159. return 0;
  160. }
  161. static struct sysdev_class mainstone_irq_sysclass = {
  162. .name = "cpld_irq",
  163. .resume = mainstone_irq_resume,
  164. };
  165. static struct sys_device mainstone_irq_device = {
  166. .cls = &mainstone_irq_sysclass,
  167. };
  168. static int __init mainstone_irq_device_init(void)
  169. {
  170. int ret = -ENODEV;
  171. if (machine_is_mainstone()) {
  172. ret = sysdev_class_register(&mainstone_irq_sysclass);
  173. if (ret == 0)
  174. ret = sysdev_register(&mainstone_irq_device);
  175. }
  176. return ret;
  177. }
  178. device_initcall(mainstone_irq_device_init);
  179. #endif
  180. static struct resource smc91x_resources[] = {
  181. [0] = {
  182. .start = (MST_ETH_PHYS + 0x300),
  183. .end = (MST_ETH_PHYS + 0xfffff),
  184. .flags = IORESOURCE_MEM,
  185. },
  186. [1] = {
  187. .start = MAINSTONE_IRQ(3),
  188. .end = MAINSTONE_IRQ(3),
  189. .flags = IORESOURCE_IRQ | IORESOURCE_IRQ_HIGHEDGE,
  190. }
  191. };
  192. static struct smc91x_platdata mainstone_smc91x_info = {
  193. .flags = SMC91X_USE_8BIT | SMC91X_USE_16BIT | SMC91X_USE_32BIT |
  194. SMC91X_NOWAIT | SMC91X_USE_DMA,
  195. };
  196. static struct platform_device smc91x_device = {
  197. .name = "smc91x",
  198. .id = 0,
  199. .num_resources = ARRAY_SIZE(smc91x_resources),
  200. .resource = smc91x_resources,
  201. .dev = {
  202. .platform_data = &mainstone_smc91x_info,
  203. },
  204. };
  205. static int mst_audio_startup(struct snd_pcm_substream *substream, void *priv)
  206. {
  207. if (substream->stream == SNDRV_PCM_STREAM_PLAYBACK)
  208. MST_MSCWR2 &= ~MST_MSCWR2_AC97_SPKROFF;
  209. return 0;
  210. }
  211. static void mst_audio_shutdown(struct snd_pcm_substream *substream, void *priv)
  212. {
  213. if (substream->stream == SNDRV_PCM_STREAM_PLAYBACK)
  214. MST_MSCWR2 |= MST_MSCWR2_AC97_SPKROFF;
  215. }
  216. static long mst_audio_suspend_mask;
  217. static void mst_audio_suspend(void *priv)
  218. {
  219. mst_audio_suspend_mask = MST_MSCWR2;
  220. MST_MSCWR2 |= MST_MSCWR2_AC97_SPKROFF;
  221. }
  222. static void mst_audio_resume(void *priv)
  223. {
  224. MST_MSCWR2 &= mst_audio_suspend_mask | ~MST_MSCWR2_AC97_SPKROFF;
  225. }
  226. static pxa2xx_audio_ops_t mst_audio_ops = {
  227. .startup = mst_audio_startup,
  228. .shutdown = mst_audio_shutdown,
  229. .suspend = mst_audio_suspend,
  230. .resume = mst_audio_resume,
  231. };
  232. static struct resource flash_resources[] = {
  233. [0] = {
  234. .start = PXA_CS0_PHYS,
  235. .end = PXA_CS0_PHYS + SZ_64M - 1,
  236. .flags = IORESOURCE_MEM,
  237. },
  238. [1] = {
  239. .start = PXA_CS1_PHYS,
  240. .end = PXA_CS1_PHYS + SZ_64M - 1,
  241. .flags = IORESOURCE_MEM,
  242. },
  243. };
  244. static struct mtd_partition mainstoneflash0_partitions[] = {
  245. {
  246. .name = "Bootloader",
  247. .size = 0x00040000,
  248. .offset = 0,
  249. .mask_flags = MTD_WRITEABLE /* force read-only */
  250. },{
  251. .name = "Kernel",
  252. .size = 0x00400000,
  253. .offset = 0x00040000,
  254. },{
  255. .name = "Filesystem",
  256. .size = MTDPART_SIZ_FULL,
  257. .offset = 0x00440000
  258. }
  259. };
  260. static struct flash_platform_data mst_flash_data[2] = {
  261. {
  262. .map_name = "cfi_probe",
  263. .parts = mainstoneflash0_partitions,
  264. .nr_parts = ARRAY_SIZE(mainstoneflash0_partitions),
  265. }, {
  266. .map_name = "cfi_probe",
  267. .parts = NULL,
  268. .nr_parts = 0,
  269. }
  270. };
  271. static struct platform_device mst_flash_device[2] = {
  272. {
  273. .name = "pxa2xx-flash",
  274. .id = 0,
  275. .dev = {
  276. .platform_data = &mst_flash_data[0],
  277. },
  278. .resource = &flash_resources[0],
  279. .num_resources = 1,
  280. },
  281. {
  282. .name = "pxa2xx-flash",
  283. .id = 1,
  284. .dev = {
  285. .platform_data = &mst_flash_data[1],
  286. },
  287. .resource = &flash_resources[1],
  288. .num_resources = 1,
  289. },
  290. };
  291. #if defined(CONFIG_FB_PXA) || defined(CONFIG_FB_PXA_MODULE)
  292. static struct platform_pwm_backlight_data mainstone_backlight_data = {
  293. .pwm_id = 0,
  294. .max_brightness = 1023,
  295. .dft_brightness = 1023,
  296. .pwm_period_ns = 78770,
  297. };
  298. static struct platform_device mainstone_backlight_device = {
  299. .name = "pwm-backlight",
  300. .dev = {
  301. .parent = &pxa27x_device_pwm0.dev,
  302. .platform_data = &mainstone_backlight_data,
  303. },
  304. };
  305. static void __init mainstone_backlight_register(void)
  306. {
  307. int ret = platform_device_register(&mainstone_backlight_device);
  308. if (ret)
  309. printk(KERN_ERR "mainstone: failed to register backlight device: %d\n", ret);
  310. }
  311. #else
  312. #define mainstone_backlight_register() do { } while (0)
  313. #endif
  314. static struct pxafb_mode_info toshiba_ltm04c380k_mode = {
  315. .pixclock = 50000,
  316. .xres = 640,
  317. .yres = 480,
  318. .bpp = 16,
  319. .hsync_len = 1,
  320. .left_margin = 0x9f,
  321. .right_margin = 1,
  322. .vsync_len = 44,
  323. .upper_margin = 0,
  324. .lower_margin = 0,
  325. .sync = FB_SYNC_HOR_HIGH_ACT|FB_SYNC_VERT_HIGH_ACT,
  326. };
  327. static struct pxafb_mode_info toshiba_ltm035a776c_mode = {
  328. .pixclock = 110000,
  329. .xres = 240,
  330. .yres = 320,
  331. .bpp = 16,
  332. .hsync_len = 4,
  333. .left_margin = 8,
  334. .right_margin = 20,
  335. .vsync_len = 3,
  336. .upper_margin = 1,
  337. .lower_margin = 10,
  338. .sync = FB_SYNC_HOR_HIGH_ACT|FB_SYNC_VERT_HIGH_ACT,
  339. };
  340. static struct pxafb_mach_info mainstone_pxafb_info = {
  341. .num_modes = 1,
  342. .lcd_conn = LCD_COLOR_TFT_16BPP | LCD_PCLK_EDGE_FALL,
  343. };
  344. static int mainstone_mci_init(struct device *dev, irq_handler_t mstone_detect_int, void *data)
  345. {
  346. int err;
  347. /* make sure SD/Memory Stick multiplexer's signals
  348. * are routed to MMC controller
  349. */
  350. MST_MSCWR1 &= ~MST_MSCWR1_MS_SEL;
  351. err = request_irq(MAINSTONE_MMC_IRQ, mstone_detect_int, IRQF_DISABLED,
  352. "MMC card detect", data);
  353. if (err)
  354. printk(KERN_ERR "mainstone_mci_init: MMC/SD: can't request MMC card detect IRQ\n");
  355. return err;
  356. }
  357. static void mainstone_mci_setpower(struct device *dev, unsigned int vdd)
  358. {
  359. struct pxamci_platform_data* p_d = dev->platform_data;
  360. if (( 1 << vdd) & p_d->ocr_mask) {
  361. printk(KERN_DEBUG "%s: on\n", __func__);
  362. MST_MSCWR1 |= MST_MSCWR1_MMC_ON;
  363. MST_MSCWR1 &= ~MST_MSCWR1_MS_SEL;
  364. } else {
  365. printk(KERN_DEBUG "%s: off\n", __func__);
  366. MST_MSCWR1 &= ~MST_MSCWR1_MMC_ON;
  367. }
  368. }
  369. static void mainstone_mci_exit(struct device *dev, void *data)
  370. {
  371. free_irq(MAINSTONE_MMC_IRQ, data);
  372. }
  373. static struct pxamci_platform_data mainstone_mci_platform_data = {
  374. .ocr_mask = MMC_VDD_32_33|MMC_VDD_33_34,
  375. .init = mainstone_mci_init,
  376. .setpower = mainstone_mci_setpower,
  377. .exit = mainstone_mci_exit,
  378. .gpio_card_detect = -1,
  379. .gpio_card_ro = -1,
  380. .gpio_power = -1,
  381. };
  382. static void mainstone_irda_transceiver_mode(struct device *dev, int mode)
  383. {
  384. unsigned long flags;
  385. local_irq_save(flags);
  386. if (mode & IR_SIRMODE) {
  387. MST_MSCWR1 &= ~MST_MSCWR1_IRDA_FIR;
  388. } else if (mode & IR_FIRMODE) {
  389. MST_MSCWR1 |= MST_MSCWR1_IRDA_FIR;
  390. }
  391. pxa2xx_transceiver_mode(dev, mode);
  392. if (mode & IR_OFF) {
  393. MST_MSCWR1 = (MST_MSCWR1 & ~MST_MSCWR1_IRDA_MASK) | MST_MSCWR1_IRDA_OFF;
  394. } else {
  395. MST_MSCWR1 = (MST_MSCWR1 & ~MST_MSCWR1_IRDA_MASK) | MST_MSCWR1_IRDA_FULL;
  396. }
  397. local_irq_restore(flags);
  398. }
  399. static struct pxaficp_platform_data mainstone_ficp_platform_data = {
  400. .gpio_pwdown = -1,
  401. .transceiver_cap = IR_SIRMODE | IR_FIRMODE | IR_OFF,
  402. .transceiver_mode = mainstone_irda_transceiver_mode,
  403. };
  404. static struct gpio_keys_button gpio_keys_button[] = {
  405. [0] = {
  406. .desc = "wakeup",
  407. .code = KEY_SUSPEND,
  408. .type = EV_KEY,
  409. .gpio = 1,
  410. .wakeup = 1,
  411. },
  412. };
  413. static struct gpio_keys_platform_data mainstone_gpio_keys = {
  414. .buttons = gpio_keys_button,
  415. .nbuttons = 1,
  416. };
  417. static struct platform_device mst_gpio_keys_device = {
  418. .name = "gpio-keys",
  419. .id = -1,
  420. .dev = {
  421. .platform_data = &mainstone_gpio_keys,
  422. },
  423. };
  424. static struct platform_device *platform_devices[] __initdata = {
  425. &smc91x_device,
  426. &mst_flash_device[0],
  427. &mst_flash_device[1],
  428. &mst_gpio_keys_device,
  429. };
  430. static struct pxaohci_platform_data mainstone_ohci_platform_data = {
  431. .port_mode = PMM_PERPORT_MODE,
  432. .flags = ENABLE_PORT_ALL | POWER_CONTROL_LOW | POWER_SENSE_LOW,
  433. };
  434. #if defined(CONFIG_KEYBOARD_PXA27x) || defined(CONFIG_KEYBOARD_PXA27x_MODULE)
  435. static unsigned int mainstone_matrix_keys[] = {
  436. KEY(0, 0, KEY_A), KEY(1, 0, KEY_B), KEY(2, 0, KEY_C),
  437. KEY(3, 0, KEY_D), KEY(4, 0, KEY_E), KEY(5, 0, KEY_F),
  438. KEY(0, 1, KEY_G), KEY(1, 1, KEY_H), KEY(2, 1, KEY_I),
  439. KEY(3, 1, KEY_J), KEY(4, 1, KEY_K), KEY(5, 1, KEY_L),
  440. KEY(0, 2, KEY_M), KEY(1, 2, KEY_N), KEY(2, 2, KEY_O),
  441. KEY(3, 2, KEY_P), KEY(4, 2, KEY_Q), KEY(5, 2, KEY_R),
  442. KEY(0, 3, KEY_S), KEY(1, 3, KEY_T), KEY(2, 3, KEY_U),
  443. KEY(3, 3, KEY_V), KEY(4, 3, KEY_W), KEY(5, 3, KEY_X),
  444. KEY(2, 4, KEY_Y), KEY(3, 4, KEY_Z),
  445. KEY(0, 4, KEY_DOT), /* . */
  446. KEY(1, 4, KEY_CLOSE), /* @ */
  447. KEY(4, 4, KEY_SLASH),
  448. KEY(5, 4, KEY_BACKSLASH),
  449. KEY(0, 5, KEY_HOME),
  450. KEY(1, 5, KEY_LEFTSHIFT),
  451. KEY(2, 5, KEY_SPACE),
  452. KEY(3, 5, KEY_SPACE),
  453. KEY(4, 5, KEY_ENTER),
  454. KEY(5, 5, KEY_BACKSPACE),
  455. KEY(0, 6, KEY_UP),
  456. KEY(1, 6, KEY_DOWN),
  457. KEY(2, 6, KEY_LEFT),
  458. KEY(3, 6, KEY_RIGHT),
  459. KEY(4, 6, KEY_SELECT),
  460. };
  461. struct pxa27x_keypad_platform_data mainstone_keypad_info = {
  462. .matrix_key_rows = 6,
  463. .matrix_key_cols = 7,
  464. .matrix_key_map = mainstone_matrix_keys,
  465. .matrix_key_map_size = ARRAY_SIZE(mainstone_matrix_keys),
  466. .enable_rotary0 = 1,
  467. .rotary0_up_key = KEY_UP,
  468. .rotary0_down_key = KEY_DOWN,
  469. .debounce_interval = 30,
  470. };
  471. static void __init mainstone_init_keypad(void)
  472. {
  473. pxa_set_keypad_info(&mainstone_keypad_info);
  474. }
  475. #else
  476. static inline void mainstone_init_keypad(void) {}
  477. #endif
  478. static void __init mainstone_init(void)
  479. {
  480. int SW7 = 0; /* FIXME: get from SCR (Mst doc section 3.2.1.1) */
  481. pxa2xx_mfp_config(ARRAY_AND_SIZE(mainstone_pin_config));
  482. pxa_set_ffuart_info(NULL);
  483. pxa_set_btuart_info(NULL);
  484. pxa_set_stuart_info(NULL);
  485. mst_flash_data[0].width = (BOOT_DEF & 1) ? 2 : 4;
  486. mst_flash_data[1].width = 4;
  487. /* Compensate for SW7 which swaps the flash banks */
  488. mst_flash_data[SW7].name = "processor-flash";
  489. mst_flash_data[SW7 ^ 1].name = "mainboard-flash";
  490. printk(KERN_NOTICE "Mainstone configured to boot from %s\n",
  491. mst_flash_data[0].name);
  492. /* system bus arbiter setting
  493. * - Core_Park
  494. * - LCD_wt:DMA_wt:CORE_Wt = 2:3:4
  495. */
  496. ARB_CNTRL = ARB_CORE_PARK | 0x234;
  497. platform_add_devices(platform_devices, ARRAY_SIZE(platform_devices));
  498. /* reading Mainstone's "Virtual Configuration Register"
  499. might be handy to select LCD type here */
  500. if (0)
  501. mainstone_pxafb_info.modes = &toshiba_ltm04c380k_mode;
  502. else
  503. mainstone_pxafb_info.modes = &toshiba_ltm035a776c_mode;
  504. set_pxa_fb_info(&mainstone_pxafb_info);
  505. mainstone_backlight_register();
  506. pxa_set_mci_info(&mainstone_mci_platform_data);
  507. pxa_set_ficp_info(&mainstone_ficp_platform_data);
  508. pxa_set_ohci_info(&mainstone_ohci_platform_data);
  509. pxa_set_i2c_info(NULL);
  510. pxa_set_ac97_info(&mst_audio_ops);
  511. mainstone_init_keypad();
  512. }
  513. static struct map_desc mainstone_io_desc[] __initdata = {
  514. { /* CPLD */
  515. .virtual = MST_FPGA_VIRT,
  516. .pfn = __phys_to_pfn(MST_FPGA_PHYS),
  517. .length = 0x00100000,
  518. .type = MT_DEVICE
  519. }
  520. };
  521. static void __init mainstone_map_io(void)
  522. {
  523. pxa_map_io();
  524. iotable_init(mainstone_io_desc, ARRAY_SIZE(mainstone_io_desc));
  525. /* for use I SRAM as framebuffer. */
  526. PSLR |= 0xF04;
  527. PCFR = 0x66;
  528. }
  529. MACHINE_START(MAINSTONE, "Intel HCDDBBVA0 Development Platform (aka Mainstone)")
  530. /* Maintainer: MontaVista Software Inc. */
  531. .phys_io = 0x40000000,
  532. .boot_params = 0xa0000100, /* BLOB boot parameter setting */
  533. .io_pg_offst = (io_p2v(0x40000000) >> 18) & 0xfffc,
  534. .map_io = mainstone_map_io,
  535. .init_irq = mainstone_init_irq,
  536. .timer = &pxa_timer,
  537. .init_machine = mainstone_init,
  538. MACHINE_END