mmu.c 55 KB

12345678910111213141516171819202122232425262728293031323334353637383940414243444546474849505152535455565758596061626364656667686970717273747576777879808182838485868788899091929394959697989910010110210310410510610710810911011111211311411511611711811912012112212312412512612712812913013113213313413513613713813914014114214314414514614714814915015115215315415515615715815916016116216316416516616716816917017117217317417517617717817918018118218318418518618718818919019119219319419519619719819920020120220320420520620720820921021121221321421521621721821922022122222322422522622722822923023123223323423523623723823924024124224324424524624724824925025125225325425525625725825926026126226326426526626726826927027127227327427527627727827928028128228328428528628728828929029129229329429529629729829930030130230330430530630730830931031131231331431531631731831932032132232332432532632732832933033133233333433533633733833934034134234334434534634734834935035135235335435535635735835936036136236336436536636736836937037137237337437537637737837938038138238338438538638738838939039139239339439539639739839940040140240340440540640740840941041141241341441541641741841942042142242342442542642742842943043143243343443543643743843944044144244344444544644744844945045145245345445545645745845946046146246346446546646746846947047147247347447547647747847948048148248348448548648748848949049149249349449549649749849950050150250350450550650750850951051151251351451551651751851952052152252352452552652752852953053153253353453553653753853954054154254354454554654754854955055155255355455555655755855956056156256356456556656756856957057157257357457557657757857958058158258358458558658758858959059159259359459559659759859960060160260360460560660760860961061161261361461561661761861962062162262362462562662762862963063163263363463563663763863964064164264364464564664764864965065165265365465565665765865966066166266366466566666766866967067167267367467567667767867968068168268368468568668768868969069169269369469569669769869970070170270370470570670770870971071171271371471571671771871972072172272372472572672772872973073173273373473573673773873974074174274374474574674774874975075175275375475575675775875976076176276376476576676776876977077177277377477577677777877978078178278378478578678778878979079179279379479579679779879980080180280380480580680780880981081181281381481581681781881982082182282382482582682782882983083183283383483583683783883984084184284384484584684784884985085185285385485585685785885986086186286386486586686786886987087187287387487587687787887988088188288388488588688788888989089189289389489589689789889990090190290390490590690790890991091191291391491591691791891992092192292392492592692792892993093193293393493593693793893994094194294394494594694794894995095195295395495595695795895996096196296396496596696796896997097197297397497597697797897998098198298398498598698798898999099199299399499599699799899910001001100210031004100510061007100810091010101110121013101410151016101710181019102010211022102310241025102610271028102910301031103210331034103510361037103810391040104110421043104410451046104710481049105010511052105310541055105610571058105910601061106210631064106510661067106810691070107110721073107410751076107710781079108010811082108310841085108610871088108910901091109210931094109510961097109810991100110111021103110411051106110711081109111011111112111311141115111611171118111911201121112211231124112511261127112811291130113111321133113411351136113711381139114011411142114311441145114611471148114911501151115211531154115511561157115811591160116111621163116411651166116711681169117011711172117311741175117611771178117911801181118211831184118511861187118811891190119111921193119411951196119711981199120012011202120312041205120612071208120912101211121212131214121512161217121812191220122112221223122412251226122712281229123012311232123312341235123612371238123912401241124212431244124512461247124812491250125112521253125412551256125712581259126012611262126312641265126612671268126912701271127212731274127512761277127812791280128112821283128412851286128712881289129012911292129312941295129612971298129913001301130213031304130513061307130813091310131113121313131413151316131713181319132013211322132313241325132613271328132913301331133213331334133513361337133813391340134113421343134413451346134713481349135013511352135313541355135613571358135913601361136213631364136513661367136813691370137113721373137413751376137713781379138013811382138313841385138613871388138913901391139213931394139513961397139813991400140114021403140414051406140714081409141014111412141314141415141614171418141914201421142214231424142514261427142814291430143114321433143414351436143714381439144014411442144314441445144614471448144914501451145214531454145514561457145814591460146114621463146414651466146714681469147014711472147314741475147614771478147914801481148214831484148514861487148814891490149114921493149414951496149714981499150015011502150315041505150615071508150915101511151215131514151515161517151815191520152115221523152415251526152715281529153015311532153315341535153615371538153915401541154215431544154515461547154815491550155115521553155415551556155715581559156015611562156315641565156615671568156915701571157215731574157515761577157815791580158115821583158415851586158715881589159015911592159315941595159615971598159916001601160216031604160516061607160816091610161116121613161416151616161716181619162016211622162316241625162616271628162916301631163216331634163516361637163816391640164116421643164416451646164716481649165016511652165316541655165616571658165916601661166216631664166516661667166816691670167116721673167416751676167716781679168016811682168316841685168616871688168916901691169216931694169516961697169816991700170117021703170417051706170717081709171017111712171317141715171617171718171917201721172217231724172517261727172817291730173117321733173417351736173717381739174017411742174317441745174617471748174917501751175217531754175517561757175817591760176117621763176417651766176717681769177017711772177317741775177617771778177917801781178217831784178517861787178817891790179117921793179417951796179717981799180018011802180318041805180618071808180918101811181218131814181518161817181818191820182118221823182418251826182718281829183018311832183318341835183618371838183918401841184218431844184518461847184818491850185118521853185418551856185718581859186018611862186318641865186618671868186918701871187218731874187518761877187818791880188118821883188418851886188718881889189018911892189318941895189618971898189919001901190219031904190519061907190819091910191119121913191419151916191719181919192019211922192319241925192619271928192919301931193219331934193519361937193819391940194119421943194419451946194719481949195019511952195319541955195619571958195919601961196219631964196519661967196819691970197119721973197419751976197719781979198019811982198319841985198619871988198919901991199219931994199519961997199819992000200120022003200420052006200720082009201020112012201320142015201620172018201920202021202220232024202520262027202820292030203120322033203420352036203720382039204020412042204320442045204620472048204920502051205220532054205520562057205820592060206120622063206420652066206720682069207020712072207320742075207620772078207920802081208220832084208520862087208820892090209120922093209420952096209720982099210021012102210321042105210621072108210921102111211221132114211521162117211821192120212121222123212421252126212721282129213021312132213321342135213621372138213921402141214221432144214521462147214821492150215121522153215421552156215721582159216021612162216321642165216621672168216921702171217221732174217521762177217821792180218121822183218421852186218721882189219021912192219321942195219621972198219922002201220222032204220522062207220822092210221122122213221422152216221722182219222022212222222322242225222622272228222922302231223222332234223522362237223822392240224122422243224422452246224722482249225022512252225322542255225622572258225922602261226222632264226522662267226822692270227122722273227422752276227722782279228022812282228322842285228622872288228922902291229222932294229522962297229822992300230123022303230423052306230723082309231023112312231323142315231623172318231923202321232223232324232523262327232823292330233123322333233423352336233723382339234023412342234323442345234623472348234923502351235223532354235523562357235823592360236123622363236423652366236723682369237023712372237323742375
  1. /*
  2. * Kernel-based Virtual Machine driver for Linux
  3. *
  4. * This module enables machines with Intel VT-x extensions to run virtual
  5. * machines without emulation or binary translation.
  6. *
  7. * MMU support
  8. *
  9. * Copyright (C) 2006 Qumranet, Inc.
  10. *
  11. * Authors:
  12. * Yaniv Kamay <yaniv@qumranet.com>
  13. * Avi Kivity <avi@qumranet.com>
  14. *
  15. * This work is licensed under the terms of the GNU GPL, version 2. See
  16. * the COPYING file in the top-level directory.
  17. *
  18. */
  19. #include "vmx.h"
  20. #include "mmu.h"
  21. #include <linux/kvm_host.h>
  22. #include <linux/types.h>
  23. #include <linux/string.h>
  24. #include <linux/mm.h>
  25. #include <linux/highmem.h>
  26. #include <linux/module.h>
  27. #include <linux/swap.h>
  28. #include <linux/hugetlb.h>
  29. #include <linux/compiler.h>
  30. #include <asm/page.h>
  31. #include <asm/cmpxchg.h>
  32. #include <asm/io.h>
  33. /*
  34. * When setting this variable to true it enables Two-Dimensional-Paging
  35. * where the hardware walks 2 page tables:
  36. * 1. the guest-virtual to guest-physical
  37. * 2. while doing 1. it walks guest-physical to host-physical
  38. * If the hardware supports that we don't need to do shadow paging.
  39. */
  40. bool tdp_enabled = false;
  41. #undef MMU_DEBUG
  42. #undef AUDIT
  43. #ifdef AUDIT
  44. static void kvm_mmu_audit(struct kvm_vcpu *vcpu, const char *msg);
  45. #else
  46. static void kvm_mmu_audit(struct kvm_vcpu *vcpu, const char *msg) {}
  47. #endif
  48. #ifdef MMU_DEBUG
  49. #define pgprintk(x...) do { if (dbg) printk(x); } while (0)
  50. #define rmap_printk(x...) do { if (dbg) printk(x); } while (0)
  51. #else
  52. #define pgprintk(x...) do { } while (0)
  53. #define rmap_printk(x...) do { } while (0)
  54. #endif
  55. #if defined(MMU_DEBUG) || defined(AUDIT)
  56. static int dbg = 1;
  57. #endif
  58. #ifndef MMU_DEBUG
  59. #define ASSERT(x) do { } while (0)
  60. #else
  61. #define ASSERT(x) \
  62. if (!(x)) { \
  63. printk(KERN_WARNING "assertion failed %s:%d: %s\n", \
  64. __FILE__, __LINE__, #x); \
  65. }
  66. #endif
  67. #define PT64_PT_BITS 9
  68. #define PT64_ENT_PER_PAGE (1 << PT64_PT_BITS)
  69. #define PT32_PT_BITS 10
  70. #define PT32_ENT_PER_PAGE (1 << PT32_PT_BITS)
  71. #define PT_WRITABLE_SHIFT 1
  72. #define PT_PRESENT_MASK (1ULL << 0)
  73. #define PT_WRITABLE_MASK (1ULL << PT_WRITABLE_SHIFT)
  74. #define PT_USER_MASK (1ULL << 2)
  75. #define PT_PWT_MASK (1ULL << 3)
  76. #define PT_PCD_MASK (1ULL << 4)
  77. #define PT_ACCESSED_MASK (1ULL << 5)
  78. #define PT_DIRTY_MASK (1ULL << 6)
  79. #define PT_PAGE_SIZE_MASK (1ULL << 7)
  80. #define PT_PAT_MASK (1ULL << 7)
  81. #define PT_GLOBAL_MASK (1ULL << 8)
  82. #define PT64_NX_SHIFT 63
  83. #define PT64_NX_MASK (1ULL << PT64_NX_SHIFT)
  84. #define PT_PAT_SHIFT 7
  85. #define PT_DIR_PAT_SHIFT 12
  86. #define PT_DIR_PAT_MASK (1ULL << PT_DIR_PAT_SHIFT)
  87. #define PT32_DIR_PSE36_SIZE 4
  88. #define PT32_DIR_PSE36_SHIFT 13
  89. #define PT32_DIR_PSE36_MASK \
  90. (((1ULL << PT32_DIR_PSE36_SIZE) - 1) << PT32_DIR_PSE36_SHIFT)
  91. #define PT_FIRST_AVAIL_BITS_SHIFT 9
  92. #define PT64_SECOND_AVAIL_BITS_SHIFT 52
  93. #define VALID_PAGE(x) ((x) != INVALID_PAGE)
  94. #define PT64_LEVEL_BITS 9
  95. #define PT64_LEVEL_SHIFT(level) \
  96. (PAGE_SHIFT + (level - 1) * PT64_LEVEL_BITS)
  97. #define PT64_LEVEL_MASK(level) \
  98. (((1ULL << PT64_LEVEL_BITS) - 1) << PT64_LEVEL_SHIFT(level))
  99. #define PT64_INDEX(address, level)\
  100. (((address) >> PT64_LEVEL_SHIFT(level)) & ((1 << PT64_LEVEL_BITS) - 1))
  101. #define PT32_LEVEL_BITS 10
  102. #define PT32_LEVEL_SHIFT(level) \
  103. (PAGE_SHIFT + (level - 1) * PT32_LEVEL_BITS)
  104. #define PT32_LEVEL_MASK(level) \
  105. (((1ULL << PT32_LEVEL_BITS) - 1) << PT32_LEVEL_SHIFT(level))
  106. #define PT32_INDEX(address, level)\
  107. (((address) >> PT32_LEVEL_SHIFT(level)) & ((1 << PT32_LEVEL_BITS) - 1))
  108. #define PT64_BASE_ADDR_MASK (((1ULL << 52) - 1) & ~(u64)(PAGE_SIZE-1))
  109. #define PT64_DIR_BASE_ADDR_MASK \
  110. (PT64_BASE_ADDR_MASK & ~((1ULL << (PAGE_SHIFT + PT64_LEVEL_BITS)) - 1))
  111. #define PT32_BASE_ADDR_MASK PAGE_MASK
  112. #define PT32_DIR_BASE_ADDR_MASK \
  113. (PAGE_MASK & ~((1ULL << (PAGE_SHIFT + PT32_LEVEL_BITS)) - 1))
  114. #define PT64_PERM_MASK (PT_PRESENT_MASK | PT_WRITABLE_MASK | PT_USER_MASK \
  115. | PT64_NX_MASK)
  116. #define PFERR_PRESENT_MASK (1U << 0)
  117. #define PFERR_WRITE_MASK (1U << 1)
  118. #define PFERR_USER_MASK (1U << 2)
  119. #define PFERR_FETCH_MASK (1U << 4)
  120. #define PT64_ROOT_LEVEL 4
  121. #define PT32_ROOT_LEVEL 2
  122. #define PT32E_ROOT_LEVEL 3
  123. #define PT_DIRECTORY_LEVEL 2
  124. #define PT_PAGE_TABLE_LEVEL 1
  125. #define RMAP_EXT 4
  126. #define ACC_EXEC_MASK 1
  127. #define ACC_WRITE_MASK PT_WRITABLE_MASK
  128. #define ACC_USER_MASK PT_USER_MASK
  129. #define ACC_ALL (ACC_EXEC_MASK | ACC_WRITE_MASK | ACC_USER_MASK)
  130. struct kvm_pv_mmu_op_buffer {
  131. void *ptr;
  132. unsigned len;
  133. unsigned processed;
  134. char buf[512] __aligned(sizeof(long));
  135. };
  136. struct kvm_rmap_desc {
  137. u64 *shadow_ptes[RMAP_EXT];
  138. struct kvm_rmap_desc *more;
  139. };
  140. static struct kmem_cache *pte_chain_cache;
  141. static struct kmem_cache *rmap_desc_cache;
  142. static struct kmem_cache *mmu_page_header_cache;
  143. static u64 __read_mostly shadow_trap_nonpresent_pte;
  144. static u64 __read_mostly shadow_notrap_nonpresent_pte;
  145. void kvm_mmu_set_nonpresent_ptes(u64 trap_pte, u64 notrap_pte)
  146. {
  147. shadow_trap_nonpresent_pte = trap_pte;
  148. shadow_notrap_nonpresent_pte = notrap_pte;
  149. }
  150. EXPORT_SYMBOL_GPL(kvm_mmu_set_nonpresent_ptes);
  151. static int is_write_protection(struct kvm_vcpu *vcpu)
  152. {
  153. return vcpu->arch.cr0 & X86_CR0_WP;
  154. }
  155. static int is_cpuid_PSE36(void)
  156. {
  157. return 1;
  158. }
  159. static int is_nx(struct kvm_vcpu *vcpu)
  160. {
  161. return vcpu->arch.shadow_efer & EFER_NX;
  162. }
  163. static int is_present_pte(unsigned long pte)
  164. {
  165. return pte & PT_PRESENT_MASK;
  166. }
  167. static int is_shadow_present_pte(u64 pte)
  168. {
  169. return pte != shadow_trap_nonpresent_pte
  170. && pte != shadow_notrap_nonpresent_pte;
  171. }
  172. static int is_large_pte(u64 pte)
  173. {
  174. return pte & PT_PAGE_SIZE_MASK;
  175. }
  176. static int is_writeble_pte(unsigned long pte)
  177. {
  178. return pte & PT_WRITABLE_MASK;
  179. }
  180. static int is_dirty_pte(unsigned long pte)
  181. {
  182. return pte & PT_DIRTY_MASK;
  183. }
  184. static int is_rmap_pte(u64 pte)
  185. {
  186. return is_shadow_present_pte(pte);
  187. }
  188. static struct page *spte_to_page(u64 pte)
  189. {
  190. hfn_t hfn = (pte & PT64_BASE_ADDR_MASK) >> PAGE_SHIFT;
  191. return pfn_to_page(hfn);
  192. }
  193. static gfn_t pse36_gfn_delta(u32 gpte)
  194. {
  195. int shift = 32 - PT32_DIR_PSE36_SHIFT - PAGE_SHIFT;
  196. return (gpte & PT32_DIR_PSE36_MASK) << shift;
  197. }
  198. static void set_shadow_pte(u64 *sptep, u64 spte)
  199. {
  200. #ifdef CONFIG_X86_64
  201. set_64bit((unsigned long *)sptep, spte);
  202. #else
  203. set_64bit((unsigned long long *)sptep, spte);
  204. #endif
  205. }
  206. static int mmu_topup_memory_cache(struct kvm_mmu_memory_cache *cache,
  207. struct kmem_cache *base_cache, int min)
  208. {
  209. void *obj;
  210. if (cache->nobjs >= min)
  211. return 0;
  212. while (cache->nobjs < ARRAY_SIZE(cache->objects)) {
  213. obj = kmem_cache_zalloc(base_cache, GFP_KERNEL);
  214. if (!obj)
  215. return -ENOMEM;
  216. cache->objects[cache->nobjs++] = obj;
  217. }
  218. return 0;
  219. }
  220. static void mmu_free_memory_cache(struct kvm_mmu_memory_cache *mc)
  221. {
  222. while (mc->nobjs)
  223. kfree(mc->objects[--mc->nobjs]);
  224. }
  225. static int mmu_topup_memory_cache_page(struct kvm_mmu_memory_cache *cache,
  226. int min)
  227. {
  228. struct page *page;
  229. if (cache->nobjs >= min)
  230. return 0;
  231. while (cache->nobjs < ARRAY_SIZE(cache->objects)) {
  232. page = alloc_page(GFP_KERNEL);
  233. if (!page)
  234. return -ENOMEM;
  235. set_page_private(page, 0);
  236. cache->objects[cache->nobjs++] = page_address(page);
  237. }
  238. return 0;
  239. }
  240. static void mmu_free_memory_cache_page(struct kvm_mmu_memory_cache *mc)
  241. {
  242. while (mc->nobjs)
  243. free_page((unsigned long)mc->objects[--mc->nobjs]);
  244. }
  245. static int mmu_topup_memory_caches(struct kvm_vcpu *vcpu)
  246. {
  247. int r;
  248. r = mmu_topup_memory_cache(&vcpu->arch.mmu_pte_chain_cache,
  249. pte_chain_cache, 4);
  250. if (r)
  251. goto out;
  252. r = mmu_topup_memory_cache(&vcpu->arch.mmu_rmap_desc_cache,
  253. rmap_desc_cache, 1);
  254. if (r)
  255. goto out;
  256. r = mmu_topup_memory_cache_page(&vcpu->arch.mmu_page_cache, 8);
  257. if (r)
  258. goto out;
  259. r = mmu_topup_memory_cache(&vcpu->arch.mmu_page_header_cache,
  260. mmu_page_header_cache, 4);
  261. out:
  262. return r;
  263. }
  264. static void mmu_free_memory_caches(struct kvm_vcpu *vcpu)
  265. {
  266. mmu_free_memory_cache(&vcpu->arch.mmu_pte_chain_cache);
  267. mmu_free_memory_cache(&vcpu->arch.mmu_rmap_desc_cache);
  268. mmu_free_memory_cache_page(&vcpu->arch.mmu_page_cache);
  269. mmu_free_memory_cache(&vcpu->arch.mmu_page_header_cache);
  270. }
  271. static void *mmu_memory_cache_alloc(struct kvm_mmu_memory_cache *mc,
  272. size_t size)
  273. {
  274. void *p;
  275. BUG_ON(!mc->nobjs);
  276. p = mc->objects[--mc->nobjs];
  277. memset(p, 0, size);
  278. return p;
  279. }
  280. static struct kvm_pte_chain *mmu_alloc_pte_chain(struct kvm_vcpu *vcpu)
  281. {
  282. return mmu_memory_cache_alloc(&vcpu->arch.mmu_pte_chain_cache,
  283. sizeof(struct kvm_pte_chain));
  284. }
  285. static void mmu_free_pte_chain(struct kvm_pte_chain *pc)
  286. {
  287. kfree(pc);
  288. }
  289. static struct kvm_rmap_desc *mmu_alloc_rmap_desc(struct kvm_vcpu *vcpu)
  290. {
  291. return mmu_memory_cache_alloc(&vcpu->arch.mmu_rmap_desc_cache,
  292. sizeof(struct kvm_rmap_desc));
  293. }
  294. static void mmu_free_rmap_desc(struct kvm_rmap_desc *rd)
  295. {
  296. kfree(rd);
  297. }
  298. /*
  299. * Return the pointer to the largepage write count for a given
  300. * gfn, handling slots that are not large page aligned.
  301. */
  302. static int *slot_largepage_idx(gfn_t gfn, struct kvm_memory_slot *slot)
  303. {
  304. unsigned long idx;
  305. idx = (gfn / KVM_PAGES_PER_HPAGE) -
  306. (slot->base_gfn / KVM_PAGES_PER_HPAGE);
  307. return &slot->lpage_info[idx].write_count;
  308. }
  309. static void account_shadowed(struct kvm *kvm, gfn_t gfn)
  310. {
  311. int *write_count;
  312. write_count = slot_largepage_idx(gfn, gfn_to_memslot(kvm, gfn));
  313. *write_count += 1;
  314. WARN_ON(*write_count > KVM_PAGES_PER_HPAGE);
  315. }
  316. static void unaccount_shadowed(struct kvm *kvm, gfn_t gfn)
  317. {
  318. int *write_count;
  319. write_count = slot_largepage_idx(gfn, gfn_to_memslot(kvm, gfn));
  320. *write_count -= 1;
  321. WARN_ON(*write_count < 0);
  322. }
  323. static int has_wrprotected_page(struct kvm *kvm, gfn_t gfn)
  324. {
  325. struct kvm_memory_slot *slot = gfn_to_memslot(kvm, gfn);
  326. int *largepage_idx;
  327. if (slot) {
  328. largepage_idx = slot_largepage_idx(gfn, slot);
  329. return *largepage_idx;
  330. }
  331. return 1;
  332. }
  333. static int host_largepage_backed(struct kvm *kvm, gfn_t gfn)
  334. {
  335. struct vm_area_struct *vma;
  336. unsigned long addr;
  337. addr = gfn_to_hva(kvm, gfn);
  338. if (kvm_is_error_hva(addr))
  339. return 0;
  340. vma = find_vma(current->mm, addr);
  341. if (vma && is_vm_hugetlb_page(vma))
  342. return 1;
  343. return 0;
  344. }
  345. static int is_largepage_backed(struct kvm_vcpu *vcpu, gfn_t large_gfn)
  346. {
  347. struct kvm_memory_slot *slot;
  348. if (has_wrprotected_page(vcpu->kvm, large_gfn))
  349. return 0;
  350. if (!host_largepage_backed(vcpu->kvm, large_gfn))
  351. return 0;
  352. slot = gfn_to_memslot(vcpu->kvm, large_gfn);
  353. if (slot && slot->dirty_bitmap)
  354. return 0;
  355. return 1;
  356. }
  357. /*
  358. * Take gfn and return the reverse mapping to it.
  359. * Note: gfn must be unaliased before this function get called
  360. */
  361. static unsigned long *gfn_to_rmap(struct kvm *kvm, gfn_t gfn, int lpage)
  362. {
  363. struct kvm_memory_slot *slot;
  364. unsigned long idx;
  365. slot = gfn_to_memslot(kvm, gfn);
  366. if (!lpage)
  367. return &slot->rmap[gfn - slot->base_gfn];
  368. idx = (gfn / KVM_PAGES_PER_HPAGE) -
  369. (slot->base_gfn / KVM_PAGES_PER_HPAGE);
  370. return &slot->lpage_info[idx].rmap_pde;
  371. }
  372. /*
  373. * Reverse mapping data structures:
  374. *
  375. * If rmapp bit zero is zero, then rmapp point to the shadw page table entry
  376. * that points to page_address(page).
  377. *
  378. * If rmapp bit zero is one, (then rmap & ~1) points to a struct kvm_rmap_desc
  379. * containing more mappings.
  380. */
  381. static void rmap_add(struct kvm_vcpu *vcpu, u64 *spte, gfn_t gfn, int lpage)
  382. {
  383. struct kvm_mmu_page *sp;
  384. struct kvm_rmap_desc *desc;
  385. unsigned long *rmapp;
  386. int i;
  387. if (!is_rmap_pte(*spte))
  388. return;
  389. gfn = unalias_gfn(vcpu->kvm, gfn);
  390. sp = page_header(__pa(spte));
  391. sp->gfns[spte - sp->spt] = gfn;
  392. rmapp = gfn_to_rmap(vcpu->kvm, gfn, lpage);
  393. if (!*rmapp) {
  394. rmap_printk("rmap_add: %p %llx 0->1\n", spte, *spte);
  395. *rmapp = (unsigned long)spte;
  396. } else if (!(*rmapp & 1)) {
  397. rmap_printk("rmap_add: %p %llx 1->many\n", spte, *spte);
  398. desc = mmu_alloc_rmap_desc(vcpu);
  399. desc->shadow_ptes[0] = (u64 *)*rmapp;
  400. desc->shadow_ptes[1] = spte;
  401. *rmapp = (unsigned long)desc | 1;
  402. } else {
  403. rmap_printk("rmap_add: %p %llx many->many\n", spte, *spte);
  404. desc = (struct kvm_rmap_desc *)(*rmapp & ~1ul);
  405. while (desc->shadow_ptes[RMAP_EXT-1] && desc->more)
  406. desc = desc->more;
  407. if (desc->shadow_ptes[RMAP_EXT-1]) {
  408. desc->more = mmu_alloc_rmap_desc(vcpu);
  409. desc = desc->more;
  410. }
  411. for (i = 0; desc->shadow_ptes[i]; ++i)
  412. ;
  413. desc->shadow_ptes[i] = spte;
  414. }
  415. }
  416. static void rmap_desc_remove_entry(unsigned long *rmapp,
  417. struct kvm_rmap_desc *desc,
  418. int i,
  419. struct kvm_rmap_desc *prev_desc)
  420. {
  421. int j;
  422. for (j = RMAP_EXT - 1; !desc->shadow_ptes[j] && j > i; --j)
  423. ;
  424. desc->shadow_ptes[i] = desc->shadow_ptes[j];
  425. desc->shadow_ptes[j] = NULL;
  426. if (j != 0)
  427. return;
  428. if (!prev_desc && !desc->more)
  429. *rmapp = (unsigned long)desc->shadow_ptes[0];
  430. else
  431. if (prev_desc)
  432. prev_desc->more = desc->more;
  433. else
  434. *rmapp = (unsigned long)desc->more | 1;
  435. mmu_free_rmap_desc(desc);
  436. }
  437. static void rmap_remove(struct kvm *kvm, u64 *spte)
  438. {
  439. struct kvm_rmap_desc *desc;
  440. struct kvm_rmap_desc *prev_desc;
  441. struct kvm_mmu_page *sp;
  442. struct page *page;
  443. unsigned long *rmapp;
  444. int i;
  445. if (!is_rmap_pte(*spte))
  446. return;
  447. sp = page_header(__pa(spte));
  448. page = spte_to_page(*spte);
  449. if (*spte & PT_ACCESSED_MASK)
  450. mark_page_accessed(page);
  451. if (is_writeble_pte(*spte))
  452. kvm_release_page_dirty(page);
  453. else
  454. kvm_release_page_clean(page);
  455. rmapp = gfn_to_rmap(kvm, sp->gfns[spte - sp->spt], is_large_pte(*spte));
  456. if (!*rmapp) {
  457. printk(KERN_ERR "rmap_remove: %p %llx 0->BUG\n", spte, *spte);
  458. BUG();
  459. } else if (!(*rmapp & 1)) {
  460. rmap_printk("rmap_remove: %p %llx 1->0\n", spte, *spte);
  461. if ((u64 *)*rmapp != spte) {
  462. printk(KERN_ERR "rmap_remove: %p %llx 1->BUG\n",
  463. spte, *spte);
  464. BUG();
  465. }
  466. *rmapp = 0;
  467. } else {
  468. rmap_printk("rmap_remove: %p %llx many->many\n", spte, *spte);
  469. desc = (struct kvm_rmap_desc *)(*rmapp & ~1ul);
  470. prev_desc = NULL;
  471. while (desc) {
  472. for (i = 0; i < RMAP_EXT && desc->shadow_ptes[i]; ++i)
  473. if (desc->shadow_ptes[i] == spte) {
  474. rmap_desc_remove_entry(rmapp,
  475. desc, i,
  476. prev_desc);
  477. return;
  478. }
  479. prev_desc = desc;
  480. desc = desc->more;
  481. }
  482. BUG();
  483. }
  484. }
  485. static u64 *rmap_next(struct kvm *kvm, unsigned long *rmapp, u64 *spte)
  486. {
  487. struct kvm_rmap_desc *desc;
  488. struct kvm_rmap_desc *prev_desc;
  489. u64 *prev_spte;
  490. int i;
  491. if (!*rmapp)
  492. return NULL;
  493. else if (!(*rmapp & 1)) {
  494. if (!spte)
  495. return (u64 *)*rmapp;
  496. return NULL;
  497. }
  498. desc = (struct kvm_rmap_desc *)(*rmapp & ~1ul);
  499. prev_desc = NULL;
  500. prev_spte = NULL;
  501. while (desc) {
  502. for (i = 0; i < RMAP_EXT && desc->shadow_ptes[i]; ++i) {
  503. if (prev_spte == spte)
  504. return desc->shadow_ptes[i];
  505. prev_spte = desc->shadow_ptes[i];
  506. }
  507. desc = desc->more;
  508. }
  509. return NULL;
  510. }
  511. static void rmap_write_protect(struct kvm *kvm, u64 gfn)
  512. {
  513. unsigned long *rmapp;
  514. u64 *spte;
  515. int write_protected = 0;
  516. gfn = unalias_gfn(kvm, gfn);
  517. rmapp = gfn_to_rmap(kvm, gfn, 0);
  518. spte = rmap_next(kvm, rmapp, NULL);
  519. while (spte) {
  520. BUG_ON(!spte);
  521. BUG_ON(!(*spte & PT_PRESENT_MASK));
  522. rmap_printk("rmap_write_protect: spte %p %llx\n", spte, *spte);
  523. if (is_writeble_pte(*spte)) {
  524. set_shadow_pte(spte, *spte & ~PT_WRITABLE_MASK);
  525. write_protected = 1;
  526. }
  527. spte = rmap_next(kvm, rmapp, spte);
  528. }
  529. if (write_protected) {
  530. struct page *page;
  531. spte = rmap_next(kvm, rmapp, NULL);
  532. page = spte_to_page(*spte);
  533. SetPageDirty(page);
  534. }
  535. /* check for huge page mappings */
  536. rmapp = gfn_to_rmap(kvm, gfn, 1);
  537. spte = rmap_next(kvm, rmapp, NULL);
  538. while (spte) {
  539. BUG_ON(!spte);
  540. BUG_ON(!(*spte & PT_PRESENT_MASK));
  541. BUG_ON((*spte & (PT_PAGE_SIZE_MASK|PT_PRESENT_MASK)) != (PT_PAGE_SIZE_MASK|PT_PRESENT_MASK));
  542. pgprintk("rmap_write_protect(large): spte %p %llx %lld\n", spte, *spte, gfn);
  543. if (is_writeble_pte(*spte)) {
  544. rmap_remove(kvm, spte);
  545. --kvm->stat.lpages;
  546. set_shadow_pte(spte, shadow_trap_nonpresent_pte);
  547. write_protected = 1;
  548. }
  549. spte = rmap_next(kvm, rmapp, spte);
  550. }
  551. if (write_protected)
  552. kvm_flush_remote_tlbs(kvm);
  553. account_shadowed(kvm, gfn);
  554. }
  555. #ifdef MMU_DEBUG
  556. static int is_empty_shadow_page(u64 *spt)
  557. {
  558. u64 *pos;
  559. u64 *end;
  560. for (pos = spt, end = pos + PAGE_SIZE / sizeof(u64); pos != end; pos++)
  561. if (*pos != shadow_trap_nonpresent_pte) {
  562. printk(KERN_ERR "%s: %p %llx\n", __func__,
  563. pos, *pos);
  564. return 0;
  565. }
  566. return 1;
  567. }
  568. #endif
  569. static void kvm_mmu_free_page(struct kvm *kvm, struct kvm_mmu_page *sp)
  570. {
  571. ASSERT(is_empty_shadow_page(sp->spt));
  572. list_del(&sp->link);
  573. __free_page(virt_to_page(sp->spt));
  574. __free_page(virt_to_page(sp->gfns));
  575. kfree(sp);
  576. ++kvm->arch.n_free_mmu_pages;
  577. }
  578. static unsigned kvm_page_table_hashfn(gfn_t gfn)
  579. {
  580. return gfn & ((1 << KVM_MMU_HASH_SHIFT) - 1);
  581. }
  582. static struct kvm_mmu_page *kvm_mmu_alloc_page(struct kvm_vcpu *vcpu,
  583. u64 *parent_pte)
  584. {
  585. struct kvm_mmu_page *sp;
  586. sp = mmu_memory_cache_alloc(&vcpu->arch.mmu_page_header_cache, sizeof *sp);
  587. sp->spt = mmu_memory_cache_alloc(&vcpu->arch.mmu_page_cache, PAGE_SIZE);
  588. sp->gfns = mmu_memory_cache_alloc(&vcpu->arch.mmu_page_cache, PAGE_SIZE);
  589. set_page_private(virt_to_page(sp->spt), (unsigned long)sp);
  590. list_add(&sp->link, &vcpu->kvm->arch.active_mmu_pages);
  591. ASSERT(is_empty_shadow_page(sp->spt));
  592. sp->slot_bitmap = 0;
  593. sp->multimapped = 0;
  594. sp->parent_pte = parent_pte;
  595. --vcpu->kvm->arch.n_free_mmu_pages;
  596. return sp;
  597. }
  598. static void mmu_page_add_parent_pte(struct kvm_vcpu *vcpu,
  599. struct kvm_mmu_page *sp, u64 *parent_pte)
  600. {
  601. struct kvm_pte_chain *pte_chain;
  602. struct hlist_node *node;
  603. int i;
  604. if (!parent_pte)
  605. return;
  606. if (!sp->multimapped) {
  607. u64 *old = sp->parent_pte;
  608. if (!old) {
  609. sp->parent_pte = parent_pte;
  610. return;
  611. }
  612. sp->multimapped = 1;
  613. pte_chain = mmu_alloc_pte_chain(vcpu);
  614. INIT_HLIST_HEAD(&sp->parent_ptes);
  615. hlist_add_head(&pte_chain->link, &sp->parent_ptes);
  616. pte_chain->parent_ptes[0] = old;
  617. }
  618. hlist_for_each_entry(pte_chain, node, &sp->parent_ptes, link) {
  619. if (pte_chain->parent_ptes[NR_PTE_CHAIN_ENTRIES-1])
  620. continue;
  621. for (i = 0; i < NR_PTE_CHAIN_ENTRIES; ++i)
  622. if (!pte_chain->parent_ptes[i]) {
  623. pte_chain->parent_ptes[i] = parent_pte;
  624. return;
  625. }
  626. }
  627. pte_chain = mmu_alloc_pte_chain(vcpu);
  628. BUG_ON(!pte_chain);
  629. hlist_add_head(&pte_chain->link, &sp->parent_ptes);
  630. pte_chain->parent_ptes[0] = parent_pte;
  631. }
  632. static void mmu_page_remove_parent_pte(struct kvm_mmu_page *sp,
  633. u64 *parent_pte)
  634. {
  635. struct kvm_pte_chain *pte_chain;
  636. struct hlist_node *node;
  637. int i;
  638. if (!sp->multimapped) {
  639. BUG_ON(sp->parent_pte != parent_pte);
  640. sp->parent_pte = NULL;
  641. return;
  642. }
  643. hlist_for_each_entry(pte_chain, node, &sp->parent_ptes, link)
  644. for (i = 0; i < NR_PTE_CHAIN_ENTRIES; ++i) {
  645. if (!pte_chain->parent_ptes[i])
  646. break;
  647. if (pte_chain->parent_ptes[i] != parent_pte)
  648. continue;
  649. while (i + 1 < NR_PTE_CHAIN_ENTRIES
  650. && pte_chain->parent_ptes[i + 1]) {
  651. pte_chain->parent_ptes[i]
  652. = pte_chain->parent_ptes[i + 1];
  653. ++i;
  654. }
  655. pte_chain->parent_ptes[i] = NULL;
  656. if (i == 0) {
  657. hlist_del(&pte_chain->link);
  658. mmu_free_pte_chain(pte_chain);
  659. if (hlist_empty(&sp->parent_ptes)) {
  660. sp->multimapped = 0;
  661. sp->parent_pte = NULL;
  662. }
  663. }
  664. return;
  665. }
  666. BUG();
  667. }
  668. static struct kvm_mmu_page *kvm_mmu_lookup_page(struct kvm *kvm, gfn_t gfn)
  669. {
  670. unsigned index;
  671. struct hlist_head *bucket;
  672. struct kvm_mmu_page *sp;
  673. struct hlist_node *node;
  674. pgprintk("%s: looking for gfn %lx\n", __func__, gfn);
  675. index = kvm_page_table_hashfn(gfn);
  676. bucket = &kvm->arch.mmu_page_hash[index];
  677. hlist_for_each_entry(sp, node, bucket, hash_link)
  678. if (sp->gfn == gfn && !sp->role.metaphysical
  679. && !sp->role.invalid) {
  680. pgprintk("%s: found role %x\n",
  681. __func__, sp->role.word);
  682. return sp;
  683. }
  684. return NULL;
  685. }
  686. static struct kvm_mmu_page *kvm_mmu_get_page(struct kvm_vcpu *vcpu,
  687. gfn_t gfn,
  688. gva_t gaddr,
  689. unsigned level,
  690. int metaphysical,
  691. unsigned access,
  692. u64 *parent_pte)
  693. {
  694. union kvm_mmu_page_role role;
  695. unsigned index;
  696. unsigned quadrant;
  697. struct hlist_head *bucket;
  698. struct kvm_mmu_page *sp;
  699. struct hlist_node *node;
  700. role.word = 0;
  701. role.glevels = vcpu->arch.mmu.root_level;
  702. role.level = level;
  703. role.metaphysical = metaphysical;
  704. role.access = access;
  705. if (vcpu->arch.mmu.root_level <= PT32_ROOT_LEVEL) {
  706. quadrant = gaddr >> (PAGE_SHIFT + (PT64_PT_BITS * level));
  707. quadrant &= (1 << ((PT32_PT_BITS - PT64_PT_BITS) * level)) - 1;
  708. role.quadrant = quadrant;
  709. }
  710. pgprintk("%s: looking gfn %lx role %x\n", __func__,
  711. gfn, role.word);
  712. index = kvm_page_table_hashfn(gfn);
  713. bucket = &vcpu->kvm->arch.mmu_page_hash[index];
  714. hlist_for_each_entry(sp, node, bucket, hash_link)
  715. if (sp->gfn == gfn && sp->role.word == role.word) {
  716. mmu_page_add_parent_pte(vcpu, sp, parent_pte);
  717. pgprintk("%s: found\n", __func__);
  718. return sp;
  719. }
  720. ++vcpu->kvm->stat.mmu_cache_miss;
  721. sp = kvm_mmu_alloc_page(vcpu, parent_pte);
  722. if (!sp)
  723. return sp;
  724. pgprintk("%s: adding gfn %lx role %x\n", __func__, gfn, role.word);
  725. sp->gfn = gfn;
  726. sp->role = role;
  727. hlist_add_head(&sp->hash_link, bucket);
  728. if (!metaphysical)
  729. rmap_write_protect(vcpu->kvm, gfn);
  730. vcpu->arch.mmu.prefetch_page(vcpu, sp);
  731. return sp;
  732. }
  733. static void kvm_mmu_page_unlink_children(struct kvm *kvm,
  734. struct kvm_mmu_page *sp)
  735. {
  736. unsigned i;
  737. u64 *pt;
  738. u64 ent;
  739. pt = sp->spt;
  740. if (sp->role.level == PT_PAGE_TABLE_LEVEL) {
  741. for (i = 0; i < PT64_ENT_PER_PAGE; ++i) {
  742. if (is_shadow_present_pte(pt[i]))
  743. rmap_remove(kvm, &pt[i]);
  744. pt[i] = shadow_trap_nonpresent_pte;
  745. }
  746. kvm_flush_remote_tlbs(kvm);
  747. return;
  748. }
  749. for (i = 0; i < PT64_ENT_PER_PAGE; ++i) {
  750. ent = pt[i];
  751. if (is_shadow_present_pte(ent)) {
  752. if (!is_large_pte(ent)) {
  753. ent &= PT64_BASE_ADDR_MASK;
  754. mmu_page_remove_parent_pte(page_header(ent),
  755. &pt[i]);
  756. } else {
  757. --kvm->stat.lpages;
  758. rmap_remove(kvm, &pt[i]);
  759. }
  760. }
  761. pt[i] = shadow_trap_nonpresent_pte;
  762. }
  763. kvm_flush_remote_tlbs(kvm);
  764. }
  765. static void kvm_mmu_put_page(struct kvm_mmu_page *sp, u64 *parent_pte)
  766. {
  767. mmu_page_remove_parent_pte(sp, parent_pte);
  768. }
  769. static void kvm_mmu_reset_last_pte_updated(struct kvm *kvm)
  770. {
  771. int i;
  772. for (i = 0; i < KVM_MAX_VCPUS; ++i)
  773. if (kvm->vcpus[i])
  774. kvm->vcpus[i]->arch.last_pte_updated = NULL;
  775. }
  776. static void kvm_mmu_zap_page(struct kvm *kvm, struct kvm_mmu_page *sp)
  777. {
  778. u64 *parent_pte;
  779. ++kvm->stat.mmu_shadow_zapped;
  780. while (sp->multimapped || sp->parent_pte) {
  781. if (!sp->multimapped)
  782. parent_pte = sp->parent_pte;
  783. else {
  784. struct kvm_pte_chain *chain;
  785. chain = container_of(sp->parent_ptes.first,
  786. struct kvm_pte_chain, link);
  787. parent_pte = chain->parent_ptes[0];
  788. }
  789. BUG_ON(!parent_pte);
  790. kvm_mmu_put_page(sp, parent_pte);
  791. set_shadow_pte(parent_pte, shadow_trap_nonpresent_pte);
  792. }
  793. kvm_mmu_page_unlink_children(kvm, sp);
  794. if (!sp->root_count) {
  795. if (!sp->role.metaphysical)
  796. unaccount_shadowed(kvm, sp->gfn);
  797. hlist_del(&sp->hash_link);
  798. kvm_mmu_free_page(kvm, sp);
  799. } else {
  800. list_move(&sp->link, &kvm->arch.active_mmu_pages);
  801. sp->role.invalid = 1;
  802. kvm_reload_remote_mmus(kvm);
  803. }
  804. kvm_mmu_reset_last_pte_updated(kvm);
  805. }
  806. /*
  807. * Changing the number of mmu pages allocated to the vm
  808. * Note: if kvm_nr_mmu_pages is too small, you will get dead lock
  809. */
  810. void kvm_mmu_change_mmu_pages(struct kvm *kvm, unsigned int kvm_nr_mmu_pages)
  811. {
  812. /*
  813. * If we set the number of mmu pages to be smaller be than the
  814. * number of actived pages , we must to free some mmu pages before we
  815. * change the value
  816. */
  817. if ((kvm->arch.n_alloc_mmu_pages - kvm->arch.n_free_mmu_pages) >
  818. kvm_nr_mmu_pages) {
  819. int n_used_mmu_pages = kvm->arch.n_alloc_mmu_pages
  820. - kvm->arch.n_free_mmu_pages;
  821. while (n_used_mmu_pages > kvm_nr_mmu_pages) {
  822. struct kvm_mmu_page *page;
  823. page = container_of(kvm->arch.active_mmu_pages.prev,
  824. struct kvm_mmu_page, link);
  825. kvm_mmu_zap_page(kvm, page);
  826. n_used_mmu_pages--;
  827. }
  828. kvm->arch.n_free_mmu_pages = 0;
  829. }
  830. else
  831. kvm->arch.n_free_mmu_pages += kvm_nr_mmu_pages
  832. - kvm->arch.n_alloc_mmu_pages;
  833. kvm->arch.n_alloc_mmu_pages = kvm_nr_mmu_pages;
  834. }
  835. static int kvm_mmu_unprotect_page(struct kvm *kvm, gfn_t gfn)
  836. {
  837. unsigned index;
  838. struct hlist_head *bucket;
  839. struct kvm_mmu_page *sp;
  840. struct hlist_node *node, *n;
  841. int r;
  842. pgprintk("%s: looking for gfn %lx\n", __func__, gfn);
  843. r = 0;
  844. index = kvm_page_table_hashfn(gfn);
  845. bucket = &kvm->arch.mmu_page_hash[index];
  846. hlist_for_each_entry_safe(sp, node, n, bucket, hash_link)
  847. if (sp->gfn == gfn && !sp->role.metaphysical) {
  848. pgprintk("%s: gfn %lx role %x\n", __func__, gfn,
  849. sp->role.word);
  850. kvm_mmu_zap_page(kvm, sp);
  851. r = 1;
  852. }
  853. return r;
  854. }
  855. static void mmu_unshadow(struct kvm *kvm, gfn_t gfn)
  856. {
  857. struct kvm_mmu_page *sp;
  858. while ((sp = kvm_mmu_lookup_page(kvm, gfn)) != NULL) {
  859. pgprintk("%s: zap %lx %x\n", __func__, gfn, sp->role.word);
  860. kvm_mmu_zap_page(kvm, sp);
  861. }
  862. }
  863. static void page_header_update_slot(struct kvm *kvm, void *pte, gfn_t gfn)
  864. {
  865. int slot = memslot_id(kvm, gfn_to_memslot(kvm, gfn));
  866. struct kvm_mmu_page *sp = page_header(__pa(pte));
  867. __set_bit(slot, &sp->slot_bitmap);
  868. }
  869. struct page *gva_to_page(struct kvm_vcpu *vcpu, gva_t gva)
  870. {
  871. struct page *page;
  872. gpa_t gpa = vcpu->arch.mmu.gva_to_gpa(vcpu, gva);
  873. if (gpa == UNMAPPED_GVA)
  874. return NULL;
  875. down_read(&current->mm->mmap_sem);
  876. page = gfn_to_page(vcpu->kvm, gpa >> PAGE_SHIFT);
  877. up_read(&current->mm->mmap_sem);
  878. return page;
  879. }
  880. static void mmu_set_spte(struct kvm_vcpu *vcpu, u64 *shadow_pte,
  881. unsigned pt_access, unsigned pte_access,
  882. int user_fault, int write_fault, int dirty,
  883. int *ptwrite, int largepage, gfn_t gfn,
  884. struct page *page, bool speculative)
  885. {
  886. u64 spte;
  887. int was_rmapped = 0;
  888. int was_writeble = is_writeble_pte(*shadow_pte);
  889. pgprintk("%s: spte %llx access %x write_fault %d"
  890. " user_fault %d gfn %lx\n",
  891. __func__, *shadow_pte, pt_access,
  892. write_fault, user_fault, gfn);
  893. if (is_rmap_pte(*shadow_pte)) {
  894. /*
  895. * If we overwrite a PTE page pointer with a 2MB PMD, unlink
  896. * the parent of the now unreachable PTE.
  897. */
  898. if (largepage && !is_large_pte(*shadow_pte)) {
  899. struct kvm_mmu_page *child;
  900. u64 pte = *shadow_pte;
  901. child = page_header(pte & PT64_BASE_ADDR_MASK);
  902. mmu_page_remove_parent_pte(child, shadow_pte);
  903. } else if (page != spte_to_page(*shadow_pte)) {
  904. pgprintk("hfn old %lx new %lx\n",
  905. page_to_pfn(spte_to_page(*shadow_pte)),
  906. page_to_pfn(page));
  907. rmap_remove(vcpu->kvm, shadow_pte);
  908. } else {
  909. if (largepage)
  910. was_rmapped = is_large_pte(*shadow_pte);
  911. else
  912. was_rmapped = 1;
  913. }
  914. }
  915. /*
  916. * We don't set the accessed bit, since we sometimes want to see
  917. * whether the guest actually used the pte (in order to detect
  918. * demand paging).
  919. */
  920. spte = PT_PRESENT_MASK | PT_DIRTY_MASK;
  921. if (!speculative)
  922. pte_access |= PT_ACCESSED_MASK;
  923. if (!dirty)
  924. pte_access &= ~ACC_WRITE_MASK;
  925. if (!(pte_access & ACC_EXEC_MASK))
  926. spte |= PT64_NX_MASK;
  927. spte |= PT_PRESENT_MASK;
  928. if (pte_access & ACC_USER_MASK)
  929. spte |= PT_USER_MASK;
  930. if (largepage)
  931. spte |= PT_PAGE_SIZE_MASK;
  932. spte |= page_to_phys(page);
  933. if ((pte_access & ACC_WRITE_MASK)
  934. || (write_fault && !is_write_protection(vcpu) && !user_fault)) {
  935. struct kvm_mmu_page *shadow;
  936. spte |= PT_WRITABLE_MASK;
  937. if (user_fault) {
  938. mmu_unshadow(vcpu->kvm, gfn);
  939. goto unshadowed;
  940. }
  941. shadow = kvm_mmu_lookup_page(vcpu->kvm, gfn);
  942. if (shadow ||
  943. (largepage && has_wrprotected_page(vcpu->kvm, gfn))) {
  944. pgprintk("%s: found shadow page for %lx, marking ro\n",
  945. __func__, gfn);
  946. pte_access &= ~ACC_WRITE_MASK;
  947. if (is_writeble_pte(spte)) {
  948. spte &= ~PT_WRITABLE_MASK;
  949. kvm_x86_ops->tlb_flush(vcpu);
  950. }
  951. if (write_fault)
  952. *ptwrite = 1;
  953. }
  954. }
  955. unshadowed:
  956. if (pte_access & ACC_WRITE_MASK)
  957. mark_page_dirty(vcpu->kvm, gfn);
  958. pgprintk("%s: setting spte %llx\n", __func__, spte);
  959. pgprintk("instantiating %s PTE (%s) at %d (%llx) addr %llx\n",
  960. (spte&PT_PAGE_SIZE_MASK)? "2MB" : "4kB",
  961. (spte&PT_WRITABLE_MASK)?"RW":"R", gfn, spte, shadow_pte);
  962. set_shadow_pte(shadow_pte, spte);
  963. if (!was_rmapped && (spte & PT_PAGE_SIZE_MASK)
  964. && (spte & PT_PRESENT_MASK))
  965. ++vcpu->kvm->stat.lpages;
  966. page_header_update_slot(vcpu->kvm, shadow_pte, gfn);
  967. if (!was_rmapped) {
  968. rmap_add(vcpu, shadow_pte, gfn, largepage);
  969. if (!is_rmap_pte(*shadow_pte))
  970. kvm_release_page_clean(page);
  971. } else {
  972. if (was_writeble)
  973. kvm_release_page_dirty(page);
  974. else
  975. kvm_release_page_clean(page);
  976. }
  977. if (!ptwrite || !*ptwrite)
  978. vcpu->arch.last_pte_updated = shadow_pte;
  979. }
  980. static void nonpaging_new_cr3(struct kvm_vcpu *vcpu)
  981. {
  982. }
  983. static int __direct_map(struct kvm_vcpu *vcpu, gpa_t v, int write,
  984. int largepage, gfn_t gfn, struct page *page,
  985. int level)
  986. {
  987. hpa_t table_addr = vcpu->arch.mmu.root_hpa;
  988. int pt_write = 0;
  989. for (; ; level--) {
  990. u32 index = PT64_INDEX(v, level);
  991. u64 *table;
  992. ASSERT(VALID_PAGE(table_addr));
  993. table = __va(table_addr);
  994. if (level == 1) {
  995. mmu_set_spte(vcpu, &table[index], ACC_ALL, ACC_ALL,
  996. 0, write, 1, &pt_write, 0, gfn, page, false);
  997. return pt_write;
  998. }
  999. if (largepage && level == 2) {
  1000. mmu_set_spte(vcpu, &table[index], ACC_ALL, ACC_ALL,
  1001. 0, write, 1, &pt_write, 1, gfn, page, false);
  1002. return pt_write;
  1003. }
  1004. if (table[index] == shadow_trap_nonpresent_pte) {
  1005. struct kvm_mmu_page *new_table;
  1006. gfn_t pseudo_gfn;
  1007. pseudo_gfn = (v & PT64_DIR_BASE_ADDR_MASK)
  1008. >> PAGE_SHIFT;
  1009. new_table = kvm_mmu_get_page(vcpu, pseudo_gfn,
  1010. v, level - 1,
  1011. 1, ACC_ALL, &table[index]);
  1012. if (!new_table) {
  1013. pgprintk("nonpaging_map: ENOMEM\n");
  1014. kvm_release_page_clean(page);
  1015. return -ENOMEM;
  1016. }
  1017. table[index] = __pa(new_table->spt) | PT_PRESENT_MASK
  1018. | PT_WRITABLE_MASK | PT_USER_MASK;
  1019. }
  1020. table_addr = table[index] & PT64_BASE_ADDR_MASK;
  1021. }
  1022. }
  1023. static int nonpaging_map(struct kvm_vcpu *vcpu, gva_t v, int write, gfn_t gfn)
  1024. {
  1025. int r;
  1026. int largepage = 0;
  1027. struct page *page;
  1028. down_read(&current->mm->mmap_sem);
  1029. if (is_largepage_backed(vcpu, gfn & ~(KVM_PAGES_PER_HPAGE-1))) {
  1030. gfn &= ~(KVM_PAGES_PER_HPAGE-1);
  1031. largepage = 1;
  1032. }
  1033. page = gfn_to_page(vcpu->kvm, gfn);
  1034. up_read(&current->mm->mmap_sem);
  1035. /* mmio */
  1036. if (is_error_page(page)) {
  1037. kvm_release_page_clean(page);
  1038. return 1;
  1039. }
  1040. spin_lock(&vcpu->kvm->mmu_lock);
  1041. kvm_mmu_free_some_pages(vcpu);
  1042. r = __direct_map(vcpu, v, write, largepage, gfn, page,
  1043. PT32E_ROOT_LEVEL);
  1044. spin_unlock(&vcpu->kvm->mmu_lock);
  1045. return r;
  1046. }
  1047. static void nonpaging_prefetch_page(struct kvm_vcpu *vcpu,
  1048. struct kvm_mmu_page *sp)
  1049. {
  1050. int i;
  1051. for (i = 0; i < PT64_ENT_PER_PAGE; ++i)
  1052. sp->spt[i] = shadow_trap_nonpresent_pte;
  1053. }
  1054. static void mmu_free_roots(struct kvm_vcpu *vcpu)
  1055. {
  1056. int i;
  1057. struct kvm_mmu_page *sp;
  1058. if (!VALID_PAGE(vcpu->arch.mmu.root_hpa))
  1059. return;
  1060. spin_lock(&vcpu->kvm->mmu_lock);
  1061. #ifdef CONFIG_X86_64
  1062. if (vcpu->arch.mmu.shadow_root_level == PT64_ROOT_LEVEL) {
  1063. hpa_t root = vcpu->arch.mmu.root_hpa;
  1064. sp = page_header(root);
  1065. --sp->root_count;
  1066. if (!sp->root_count && sp->role.invalid)
  1067. kvm_mmu_zap_page(vcpu->kvm, sp);
  1068. vcpu->arch.mmu.root_hpa = INVALID_PAGE;
  1069. spin_unlock(&vcpu->kvm->mmu_lock);
  1070. return;
  1071. }
  1072. #endif
  1073. for (i = 0; i < 4; ++i) {
  1074. hpa_t root = vcpu->arch.mmu.pae_root[i];
  1075. if (root) {
  1076. root &= PT64_BASE_ADDR_MASK;
  1077. sp = page_header(root);
  1078. --sp->root_count;
  1079. if (!sp->root_count && sp->role.invalid)
  1080. kvm_mmu_zap_page(vcpu->kvm, sp);
  1081. }
  1082. vcpu->arch.mmu.pae_root[i] = INVALID_PAGE;
  1083. }
  1084. spin_unlock(&vcpu->kvm->mmu_lock);
  1085. vcpu->arch.mmu.root_hpa = INVALID_PAGE;
  1086. }
  1087. static void mmu_alloc_roots(struct kvm_vcpu *vcpu)
  1088. {
  1089. int i;
  1090. gfn_t root_gfn;
  1091. struct kvm_mmu_page *sp;
  1092. int metaphysical = 0;
  1093. root_gfn = vcpu->arch.cr3 >> PAGE_SHIFT;
  1094. #ifdef CONFIG_X86_64
  1095. if (vcpu->arch.mmu.shadow_root_level == PT64_ROOT_LEVEL) {
  1096. hpa_t root = vcpu->arch.mmu.root_hpa;
  1097. ASSERT(!VALID_PAGE(root));
  1098. if (tdp_enabled)
  1099. metaphysical = 1;
  1100. sp = kvm_mmu_get_page(vcpu, root_gfn, 0,
  1101. PT64_ROOT_LEVEL, metaphysical,
  1102. ACC_ALL, NULL);
  1103. root = __pa(sp->spt);
  1104. ++sp->root_count;
  1105. vcpu->arch.mmu.root_hpa = root;
  1106. return;
  1107. }
  1108. #endif
  1109. metaphysical = !is_paging(vcpu);
  1110. if (tdp_enabled)
  1111. metaphysical = 1;
  1112. for (i = 0; i < 4; ++i) {
  1113. hpa_t root = vcpu->arch.mmu.pae_root[i];
  1114. ASSERT(!VALID_PAGE(root));
  1115. if (vcpu->arch.mmu.root_level == PT32E_ROOT_LEVEL) {
  1116. if (!is_present_pte(vcpu->arch.pdptrs[i])) {
  1117. vcpu->arch.mmu.pae_root[i] = 0;
  1118. continue;
  1119. }
  1120. root_gfn = vcpu->arch.pdptrs[i] >> PAGE_SHIFT;
  1121. } else if (vcpu->arch.mmu.root_level == 0)
  1122. root_gfn = 0;
  1123. sp = kvm_mmu_get_page(vcpu, root_gfn, i << 30,
  1124. PT32_ROOT_LEVEL, metaphysical,
  1125. ACC_ALL, NULL);
  1126. root = __pa(sp->spt);
  1127. ++sp->root_count;
  1128. vcpu->arch.mmu.pae_root[i] = root | PT_PRESENT_MASK;
  1129. }
  1130. vcpu->arch.mmu.root_hpa = __pa(vcpu->arch.mmu.pae_root);
  1131. }
  1132. static gpa_t nonpaging_gva_to_gpa(struct kvm_vcpu *vcpu, gva_t vaddr)
  1133. {
  1134. return vaddr;
  1135. }
  1136. static int nonpaging_page_fault(struct kvm_vcpu *vcpu, gva_t gva,
  1137. u32 error_code)
  1138. {
  1139. gfn_t gfn;
  1140. int r;
  1141. pgprintk("%s: gva %lx error %x\n", __func__, gva, error_code);
  1142. r = mmu_topup_memory_caches(vcpu);
  1143. if (r)
  1144. return r;
  1145. ASSERT(vcpu);
  1146. ASSERT(VALID_PAGE(vcpu->arch.mmu.root_hpa));
  1147. gfn = gva >> PAGE_SHIFT;
  1148. return nonpaging_map(vcpu, gva & PAGE_MASK,
  1149. error_code & PFERR_WRITE_MASK, gfn);
  1150. }
  1151. static int tdp_page_fault(struct kvm_vcpu *vcpu, gva_t gpa,
  1152. u32 error_code)
  1153. {
  1154. struct page *page;
  1155. int r;
  1156. int largepage = 0;
  1157. gfn_t gfn = gpa >> PAGE_SHIFT;
  1158. ASSERT(vcpu);
  1159. ASSERT(VALID_PAGE(vcpu->arch.mmu.root_hpa));
  1160. r = mmu_topup_memory_caches(vcpu);
  1161. if (r)
  1162. return r;
  1163. down_read(&current->mm->mmap_sem);
  1164. if (is_largepage_backed(vcpu, gfn & ~(KVM_PAGES_PER_HPAGE-1))) {
  1165. gfn &= ~(KVM_PAGES_PER_HPAGE-1);
  1166. largepage = 1;
  1167. }
  1168. page = gfn_to_page(vcpu->kvm, gfn);
  1169. up_read(&current->mm->mmap_sem);
  1170. if (is_error_page(page)) {
  1171. kvm_release_page_clean(page);
  1172. return 1;
  1173. }
  1174. spin_lock(&vcpu->kvm->mmu_lock);
  1175. kvm_mmu_free_some_pages(vcpu);
  1176. r = __direct_map(vcpu, gpa, error_code & PFERR_WRITE_MASK,
  1177. largepage, gfn, page, TDP_ROOT_LEVEL);
  1178. spin_unlock(&vcpu->kvm->mmu_lock);
  1179. return r;
  1180. }
  1181. static void nonpaging_free(struct kvm_vcpu *vcpu)
  1182. {
  1183. mmu_free_roots(vcpu);
  1184. }
  1185. static int nonpaging_init_context(struct kvm_vcpu *vcpu)
  1186. {
  1187. struct kvm_mmu *context = &vcpu->arch.mmu;
  1188. context->new_cr3 = nonpaging_new_cr3;
  1189. context->page_fault = nonpaging_page_fault;
  1190. context->gva_to_gpa = nonpaging_gva_to_gpa;
  1191. context->free = nonpaging_free;
  1192. context->prefetch_page = nonpaging_prefetch_page;
  1193. context->root_level = 0;
  1194. context->shadow_root_level = PT32E_ROOT_LEVEL;
  1195. context->root_hpa = INVALID_PAGE;
  1196. return 0;
  1197. }
  1198. void kvm_mmu_flush_tlb(struct kvm_vcpu *vcpu)
  1199. {
  1200. ++vcpu->stat.tlb_flush;
  1201. kvm_x86_ops->tlb_flush(vcpu);
  1202. }
  1203. static void paging_new_cr3(struct kvm_vcpu *vcpu)
  1204. {
  1205. pgprintk("%s: cr3 %lx\n", __func__, vcpu->arch.cr3);
  1206. mmu_free_roots(vcpu);
  1207. }
  1208. static void inject_page_fault(struct kvm_vcpu *vcpu,
  1209. u64 addr,
  1210. u32 err_code)
  1211. {
  1212. kvm_inject_page_fault(vcpu, addr, err_code);
  1213. }
  1214. static void paging_free(struct kvm_vcpu *vcpu)
  1215. {
  1216. nonpaging_free(vcpu);
  1217. }
  1218. #define PTTYPE 64
  1219. #include "paging_tmpl.h"
  1220. #undef PTTYPE
  1221. #define PTTYPE 32
  1222. #include "paging_tmpl.h"
  1223. #undef PTTYPE
  1224. static int paging64_init_context_common(struct kvm_vcpu *vcpu, int level)
  1225. {
  1226. struct kvm_mmu *context = &vcpu->arch.mmu;
  1227. ASSERT(is_pae(vcpu));
  1228. context->new_cr3 = paging_new_cr3;
  1229. context->page_fault = paging64_page_fault;
  1230. context->gva_to_gpa = paging64_gva_to_gpa;
  1231. context->prefetch_page = paging64_prefetch_page;
  1232. context->free = paging_free;
  1233. context->root_level = level;
  1234. context->shadow_root_level = level;
  1235. context->root_hpa = INVALID_PAGE;
  1236. return 0;
  1237. }
  1238. static int paging64_init_context(struct kvm_vcpu *vcpu)
  1239. {
  1240. return paging64_init_context_common(vcpu, PT64_ROOT_LEVEL);
  1241. }
  1242. static int paging32_init_context(struct kvm_vcpu *vcpu)
  1243. {
  1244. struct kvm_mmu *context = &vcpu->arch.mmu;
  1245. context->new_cr3 = paging_new_cr3;
  1246. context->page_fault = paging32_page_fault;
  1247. context->gva_to_gpa = paging32_gva_to_gpa;
  1248. context->free = paging_free;
  1249. context->prefetch_page = paging32_prefetch_page;
  1250. context->root_level = PT32_ROOT_LEVEL;
  1251. context->shadow_root_level = PT32E_ROOT_LEVEL;
  1252. context->root_hpa = INVALID_PAGE;
  1253. return 0;
  1254. }
  1255. static int paging32E_init_context(struct kvm_vcpu *vcpu)
  1256. {
  1257. return paging64_init_context_common(vcpu, PT32E_ROOT_LEVEL);
  1258. }
  1259. static int init_kvm_tdp_mmu(struct kvm_vcpu *vcpu)
  1260. {
  1261. struct kvm_mmu *context = &vcpu->arch.mmu;
  1262. context->new_cr3 = nonpaging_new_cr3;
  1263. context->page_fault = tdp_page_fault;
  1264. context->free = nonpaging_free;
  1265. context->prefetch_page = nonpaging_prefetch_page;
  1266. context->shadow_root_level = TDP_ROOT_LEVEL;
  1267. context->root_hpa = INVALID_PAGE;
  1268. if (!is_paging(vcpu)) {
  1269. context->gva_to_gpa = nonpaging_gva_to_gpa;
  1270. context->root_level = 0;
  1271. } else if (is_long_mode(vcpu)) {
  1272. context->gva_to_gpa = paging64_gva_to_gpa;
  1273. context->root_level = PT64_ROOT_LEVEL;
  1274. } else if (is_pae(vcpu)) {
  1275. context->gva_to_gpa = paging64_gva_to_gpa;
  1276. context->root_level = PT32E_ROOT_LEVEL;
  1277. } else {
  1278. context->gva_to_gpa = paging32_gva_to_gpa;
  1279. context->root_level = PT32_ROOT_LEVEL;
  1280. }
  1281. return 0;
  1282. }
  1283. static int init_kvm_softmmu(struct kvm_vcpu *vcpu)
  1284. {
  1285. ASSERT(vcpu);
  1286. ASSERT(!VALID_PAGE(vcpu->arch.mmu.root_hpa));
  1287. if (!is_paging(vcpu))
  1288. return nonpaging_init_context(vcpu);
  1289. else if (is_long_mode(vcpu))
  1290. return paging64_init_context(vcpu);
  1291. else if (is_pae(vcpu))
  1292. return paging32E_init_context(vcpu);
  1293. else
  1294. return paging32_init_context(vcpu);
  1295. }
  1296. static int init_kvm_mmu(struct kvm_vcpu *vcpu)
  1297. {
  1298. if (tdp_enabled)
  1299. return init_kvm_tdp_mmu(vcpu);
  1300. else
  1301. return init_kvm_softmmu(vcpu);
  1302. }
  1303. static void destroy_kvm_mmu(struct kvm_vcpu *vcpu)
  1304. {
  1305. ASSERT(vcpu);
  1306. if (VALID_PAGE(vcpu->arch.mmu.root_hpa)) {
  1307. vcpu->arch.mmu.free(vcpu);
  1308. vcpu->arch.mmu.root_hpa = INVALID_PAGE;
  1309. }
  1310. }
  1311. int kvm_mmu_reset_context(struct kvm_vcpu *vcpu)
  1312. {
  1313. destroy_kvm_mmu(vcpu);
  1314. return init_kvm_mmu(vcpu);
  1315. }
  1316. EXPORT_SYMBOL_GPL(kvm_mmu_reset_context);
  1317. int kvm_mmu_load(struct kvm_vcpu *vcpu)
  1318. {
  1319. int r;
  1320. r = mmu_topup_memory_caches(vcpu);
  1321. if (r)
  1322. goto out;
  1323. spin_lock(&vcpu->kvm->mmu_lock);
  1324. kvm_mmu_free_some_pages(vcpu);
  1325. mmu_alloc_roots(vcpu);
  1326. spin_unlock(&vcpu->kvm->mmu_lock);
  1327. kvm_x86_ops->set_cr3(vcpu, vcpu->arch.mmu.root_hpa);
  1328. kvm_mmu_flush_tlb(vcpu);
  1329. out:
  1330. return r;
  1331. }
  1332. EXPORT_SYMBOL_GPL(kvm_mmu_load);
  1333. void kvm_mmu_unload(struct kvm_vcpu *vcpu)
  1334. {
  1335. mmu_free_roots(vcpu);
  1336. }
  1337. static void mmu_pte_write_zap_pte(struct kvm_vcpu *vcpu,
  1338. struct kvm_mmu_page *sp,
  1339. u64 *spte)
  1340. {
  1341. u64 pte;
  1342. struct kvm_mmu_page *child;
  1343. pte = *spte;
  1344. if (is_shadow_present_pte(pte)) {
  1345. if (sp->role.level == PT_PAGE_TABLE_LEVEL ||
  1346. is_large_pte(pte))
  1347. rmap_remove(vcpu->kvm, spte);
  1348. else {
  1349. child = page_header(pte & PT64_BASE_ADDR_MASK);
  1350. mmu_page_remove_parent_pte(child, spte);
  1351. }
  1352. }
  1353. set_shadow_pte(spte, shadow_trap_nonpresent_pte);
  1354. if (is_large_pte(pte))
  1355. --vcpu->kvm->stat.lpages;
  1356. }
  1357. static void mmu_pte_write_new_pte(struct kvm_vcpu *vcpu,
  1358. struct kvm_mmu_page *sp,
  1359. u64 *spte,
  1360. const void *new)
  1361. {
  1362. if ((sp->role.level != PT_PAGE_TABLE_LEVEL)
  1363. && !vcpu->arch.update_pte.largepage) {
  1364. ++vcpu->kvm->stat.mmu_pde_zapped;
  1365. return;
  1366. }
  1367. ++vcpu->kvm->stat.mmu_pte_updated;
  1368. if (sp->role.glevels == PT32_ROOT_LEVEL)
  1369. paging32_update_pte(vcpu, sp, spte, new);
  1370. else
  1371. paging64_update_pte(vcpu, sp, spte, new);
  1372. }
  1373. static bool need_remote_flush(u64 old, u64 new)
  1374. {
  1375. if (!is_shadow_present_pte(old))
  1376. return false;
  1377. if (!is_shadow_present_pte(new))
  1378. return true;
  1379. if ((old ^ new) & PT64_BASE_ADDR_MASK)
  1380. return true;
  1381. old ^= PT64_NX_MASK;
  1382. new ^= PT64_NX_MASK;
  1383. return (old & ~new & PT64_PERM_MASK) != 0;
  1384. }
  1385. static void mmu_pte_write_flush_tlb(struct kvm_vcpu *vcpu, u64 old, u64 new)
  1386. {
  1387. if (need_remote_flush(old, new))
  1388. kvm_flush_remote_tlbs(vcpu->kvm);
  1389. else
  1390. kvm_mmu_flush_tlb(vcpu);
  1391. }
  1392. static bool last_updated_pte_accessed(struct kvm_vcpu *vcpu)
  1393. {
  1394. u64 *spte = vcpu->arch.last_pte_updated;
  1395. return !!(spte && (*spte & PT_ACCESSED_MASK));
  1396. }
  1397. static void mmu_guess_page_from_pte_write(struct kvm_vcpu *vcpu, gpa_t gpa,
  1398. const u8 *new, int bytes)
  1399. {
  1400. gfn_t gfn;
  1401. int r;
  1402. u64 gpte = 0;
  1403. struct page *page;
  1404. vcpu->arch.update_pte.largepage = 0;
  1405. if (bytes != 4 && bytes != 8)
  1406. return;
  1407. /*
  1408. * Assume that the pte write on a page table of the same type
  1409. * as the current vcpu paging mode. This is nearly always true
  1410. * (might be false while changing modes). Note it is verified later
  1411. * by update_pte().
  1412. */
  1413. if (is_pae(vcpu)) {
  1414. /* Handle a 32-bit guest writing two halves of a 64-bit gpte */
  1415. if ((bytes == 4) && (gpa % 4 == 0)) {
  1416. r = kvm_read_guest(vcpu->kvm, gpa & ~(u64)7, &gpte, 8);
  1417. if (r)
  1418. return;
  1419. memcpy((void *)&gpte + (gpa % 8), new, 4);
  1420. } else if ((bytes == 8) && (gpa % 8 == 0)) {
  1421. memcpy((void *)&gpte, new, 8);
  1422. }
  1423. } else {
  1424. if ((bytes == 4) && (gpa % 4 == 0))
  1425. memcpy((void *)&gpte, new, 4);
  1426. }
  1427. if (!is_present_pte(gpte))
  1428. return;
  1429. gfn = (gpte & PT64_BASE_ADDR_MASK) >> PAGE_SHIFT;
  1430. down_read(&current->mm->mmap_sem);
  1431. if (is_large_pte(gpte) && is_largepage_backed(vcpu, gfn)) {
  1432. gfn &= ~(KVM_PAGES_PER_HPAGE-1);
  1433. vcpu->arch.update_pte.largepage = 1;
  1434. }
  1435. page = gfn_to_page(vcpu->kvm, gfn);
  1436. up_read(&current->mm->mmap_sem);
  1437. if (is_error_page(page)) {
  1438. kvm_release_page_clean(page);
  1439. return;
  1440. }
  1441. vcpu->arch.update_pte.gfn = gfn;
  1442. vcpu->arch.update_pte.page = page;
  1443. }
  1444. void kvm_mmu_pte_write(struct kvm_vcpu *vcpu, gpa_t gpa,
  1445. const u8 *new, int bytes)
  1446. {
  1447. gfn_t gfn = gpa >> PAGE_SHIFT;
  1448. struct kvm_mmu_page *sp;
  1449. struct hlist_node *node, *n;
  1450. struct hlist_head *bucket;
  1451. unsigned index;
  1452. u64 entry, gentry;
  1453. u64 *spte;
  1454. unsigned offset = offset_in_page(gpa);
  1455. unsigned pte_size;
  1456. unsigned page_offset;
  1457. unsigned misaligned;
  1458. unsigned quadrant;
  1459. int level;
  1460. int flooded = 0;
  1461. int npte;
  1462. int r;
  1463. pgprintk("%s: gpa %llx bytes %d\n", __func__, gpa, bytes);
  1464. mmu_guess_page_from_pte_write(vcpu, gpa, new, bytes);
  1465. spin_lock(&vcpu->kvm->mmu_lock);
  1466. kvm_mmu_free_some_pages(vcpu);
  1467. ++vcpu->kvm->stat.mmu_pte_write;
  1468. kvm_mmu_audit(vcpu, "pre pte write");
  1469. if (gfn == vcpu->arch.last_pt_write_gfn
  1470. && !last_updated_pte_accessed(vcpu)) {
  1471. ++vcpu->arch.last_pt_write_count;
  1472. if (vcpu->arch.last_pt_write_count >= 3)
  1473. flooded = 1;
  1474. } else {
  1475. vcpu->arch.last_pt_write_gfn = gfn;
  1476. vcpu->arch.last_pt_write_count = 1;
  1477. vcpu->arch.last_pte_updated = NULL;
  1478. }
  1479. index = kvm_page_table_hashfn(gfn);
  1480. bucket = &vcpu->kvm->arch.mmu_page_hash[index];
  1481. hlist_for_each_entry_safe(sp, node, n, bucket, hash_link) {
  1482. if (sp->gfn != gfn || sp->role.metaphysical)
  1483. continue;
  1484. pte_size = sp->role.glevels == PT32_ROOT_LEVEL ? 4 : 8;
  1485. misaligned = (offset ^ (offset + bytes - 1)) & ~(pte_size - 1);
  1486. misaligned |= bytes < 4;
  1487. if (misaligned || flooded) {
  1488. /*
  1489. * Misaligned accesses are too much trouble to fix
  1490. * up; also, they usually indicate a page is not used
  1491. * as a page table.
  1492. *
  1493. * If we're seeing too many writes to a page,
  1494. * it may no longer be a page table, or we may be
  1495. * forking, in which case it is better to unmap the
  1496. * page.
  1497. */
  1498. pgprintk("misaligned: gpa %llx bytes %d role %x\n",
  1499. gpa, bytes, sp->role.word);
  1500. kvm_mmu_zap_page(vcpu->kvm, sp);
  1501. ++vcpu->kvm->stat.mmu_flooded;
  1502. continue;
  1503. }
  1504. page_offset = offset;
  1505. level = sp->role.level;
  1506. npte = 1;
  1507. if (sp->role.glevels == PT32_ROOT_LEVEL) {
  1508. page_offset <<= 1; /* 32->64 */
  1509. /*
  1510. * A 32-bit pde maps 4MB while the shadow pdes map
  1511. * only 2MB. So we need to double the offset again
  1512. * and zap two pdes instead of one.
  1513. */
  1514. if (level == PT32_ROOT_LEVEL) {
  1515. page_offset &= ~7; /* kill rounding error */
  1516. page_offset <<= 1;
  1517. npte = 2;
  1518. }
  1519. quadrant = page_offset >> PAGE_SHIFT;
  1520. page_offset &= ~PAGE_MASK;
  1521. if (quadrant != sp->role.quadrant)
  1522. continue;
  1523. }
  1524. spte = &sp->spt[page_offset / sizeof(*spte)];
  1525. if ((gpa & (pte_size - 1)) || (bytes < pte_size)) {
  1526. gentry = 0;
  1527. r = kvm_read_guest_atomic(vcpu->kvm,
  1528. gpa & ~(u64)(pte_size - 1),
  1529. &gentry, pte_size);
  1530. new = (const void *)&gentry;
  1531. if (r < 0)
  1532. new = NULL;
  1533. }
  1534. while (npte--) {
  1535. entry = *spte;
  1536. mmu_pte_write_zap_pte(vcpu, sp, spte);
  1537. if (new)
  1538. mmu_pte_write_new_pte(vcpu, sp, spte, new);
  1539. mmu_pte_write_flush_tlb(vcpu, entry, *spte);
  1540. ++spte;
  1541. }
  1542. }
  1543. kvm_mmu_audit(vcpu, "post pte write");
  1544. spin_unlock(&vcpu->kvm->mmu_lock);
  1545. if (vcpu->arch.update_pte.page) {
  1546. kvm_release_page_clean(vcpu->arch.update_pte.page);
  1547. vcpu->arch.update_pte.page = NULL;
  1548. }
  1549. }
  1550. int kvm_mmu_unprotect_page_virt(struct kvm_vcpu *vcpu, gva_t gva)
  1551. {
  1552. gpa_t gpa;
  1553. int r;
  1554. gpa = vcpu->arch.mmu.gva_to_gpa(vcpu, gva);
  1555. spin_lock(&vcpu->kvm->mmu_lock);
  1556. r = kvm_mmu_unprotect_page(vcpu->kvm, gpa >> PAGE_SHIFT);
  1557. spin_unlock(&vcpu->kvm->mmu_lock);
  1558. return r;
  1559. }
  1560. void __kvm_mmu_free_some_pages(struct kvm_vcpu *vcpu)
  1561. {
  1562. while (vcpu->kvm->arch.n_free_mmu_pages < KVM_REFILL_PAGES) {
  1563. struct kvm_mmu_page *sp;
  1564. sp = container_of(vcpu->kvm->arch.active_mmu_pages.prev,
  1565. struct kvm_mmu_page, link);
  1566. kvm_mmu_zap_page(vcpu->kvm, sp);
  1567. ++vcpu->kvm->stat.mmu_recycled;
  1568. }
  1569. }
  1570. int kvm_mmu_page_fault(struct kvm_vcpu *vcpu, gva_t cr2, u32 error_code)
  1571. {
  1572. int r;
  1573. enum emulation_result er;
  1574. r = vcpu->arch.mmu.page_fault(vcpu, cr2, error_code);
  1575. if (r < 0)
  1576. goto out;
  1577. if (!r) {
  1578. r = 1;
  1579. goto out;
  1580. }
  1581. r = mmu_topup_memory_caches(vcpu);
  1582. if (r)
  1583. goto out;
  1584. er = emulate_instruction(vcpu, vcpu->run, cr2, error_code, 0);
  1585. switch (er) {
  1586. case EMULATE_DONE:
  1587. return 1;
  1588. case EMULATE_DO_MMIO:
  1589. ++vcpu->stat.mmio_exits;
  1590. return 0;
  1591. case EMULATE_FAIL:
  1592. kvm_report_emulation_failure(vcpu, "pagetable");
  1593. return 1;
  1594. default:
  1595. BUG();
  1596. }
  1597. out:
  1598. return r;
  1599. }
  1600. EXPORT_SYMBOL_GPL(kvm_mmu_page_fault);
  1601. void kvm_enable_tdp(void)
  1602. {
  1603. tdp_enabled = true;
  1604. }
  1605. EXPORT_SYMBOL_GPL(kvm_enable_tdp);
  1606. static void free_mmu_pages(struct kvm_vcpu *vcpu)
  1607. {
  1608. struct kvm_mmu_page *sp;
  1609. while (!list_empty(&vcpu->kvm->arch.active_mmu_pages)) {
  1610. sp = container_of(vcpu->kvm->arch.active_mmu_pages.next,
  1611. struct kvm_mmu_page, link);
  1612. kvm_mmu_zap_page(vcpu->kvm, sp);
  1613. }
  1614. free_page((unsigned long)vcpu->arch.mmu.pae_root);
  1615. }
  1616. static int alloc_mmu_pages(struct kvm_vcpu *vcpu)
  1617. {
  1618. struct page *page;
  1619. int i;
  1620. ASSERT(vcpu);
  1621. if (vcpu->kvm->arch.n_requested_mmu_pages)
  1622. vcpu->kvm->arch.n_free_mmu_pages =
  1623. vcpu->kvm->arch.n_requested_mmu_pages;
  1624. else
  1625. vcpu->kvm->arch.n_free_mmu_pages =
  1626. vcpu->kvm->arch.n_alloc_mmu_pages;
  1627. /*
  1628. * When emulating 32-bit mode, cr3 is only 32 bits even on x86_64.
  1629. * Therefore we need to allocate shadow page tables in the first
  1630. * 4GB of memory, which happens to fit the DMA32 zone.
  1631. */
  1632. page = alloc_page(GFP_KERNEL | __GFP_DMA32);
  1633. if (!page)
  1634. goto error_1;
  1635. vcpu->arch.mmu.pae_root = page_address(page);
  1636. for (i = 0; i < 4; ++i)
  1637. vcpu->arch.mmu.pae_root[i] = INVALID_PAGE;
  1638. return 0;
  1639. error_1:
  1640. free_mmu_pages(vcpu);
  1641. return -ENOMEM;
  1642. }
  1643. int kvm_mmu_create(struct kvm_vcpu *vcpu)
  1644. {
  1645. ASSERT(vcpu);
  1646. ASSERT(!VALID_PAGE(vcpu->arch.mmu.root_hpa));
  1647. return alloc_mmu_pages(vcpu);
  1648. }
  1649. int kvm_mmu_setup(struct kvm_vcpu *vcpu)
  1650. {
  1651. ASSERT(vcpu);
  1652. ASSERT(!VALID_PAGE(vcpu->arch.mmu.root_hpa));
  1653. return init_kvm_mmu(vcpu);
  1654. }
  1655. void kvm_mmu_destroy(struct kvm_vcpu *vcpu)
  1656. {
  1657. ASSERT(vcpu);
  1658. destroy_kvm_mmu(vcpu);
  1659. free_mmu_pages(vcpu);
  1660. mmu_free_memory_caches(vcpu);
  1661. }
  1662. void kvm_mmu_slot_remove_write_access(struct kvm *kvm, int slot)
  1663. {
  1664. struct kvm_mmu_page *sp;
  1665. list_for_each_entry(sp, &kvm->arch.active_mmu_pages, link) {
  1666. int i;
  1667. u64 *pt;
  1668. if (!test_bit(slot, &sp->slot_bitmap))
  1669. continue;
  1670. pt = sp->spt;
  1671. for (i = 0; i < PT64_ENT_PER_PAGE; ++i)
  1672. /* avoid RMW */
  1673. if (pt[i] & PT_WRITABLE_MASK)
  1674. pt[i] &= ~PT_WRITABLE_MASK;
  1675. }
  1676. }
  1677. void kvm_mmu_zap_all(struct kvm *kvm)
  1678. {
  1679. struct kvm_mmu_page *sp, *node;
  1680. spin_lock(&kvm->mmu_lock);
  1681. list_for_each_entry_safe(sp, node, &kvm->arch.active_mmu_pages, link)
  1682. kvm_mmu_zap_page(kvm, sp);
  1683. spin_unlock(&kvm->mmu_lock);
  1684. kvm_flush_remote_tlbs(kvm);
  1685. }
  1686. void kvm_mmu_remove_one_alloc_mmu_page(struct kvm *kvm)
  1687. {
  1688. struct kvm_mmu_page *page;
  1689. page = container_of(kvm->arch.active_mmu_pages.prev,
  1690. struct kvm_mmu_page, link);
  1691. kvm_mmu_zap_page(kvm, page);
  1692. }
  1693. static int mmu_shrink(int nr_to_scan, gfp_t gfp_mask)
  1694. {
  1695. struct kvm *kvm;
  1696. struct kvm *kvm_freed = NULL;
  1697. int cache_count = 0;
  1698. spin_lock(&kvm_lock);
  1699. list_for_each_entry(kvm, &vm_list, vm_list) {
  1700. int npages;
  1701. spin_lock(&kvm->mmu_lock);
  1702. npages = kvm->arch.n_alloc_mmu_pages -
  1703. kvm->arch.n_free_mmu_pages;
  1704. cache_count += npages;
  1705. if (!kvm_freed && nr_to_scan > 0 && npages > 0) {
  1706. kvm_mmu_remove_one_alloc_mmu_page(kvm);
  1707. cache_count--;
  1708. kvm_freed = kvm;
  1709. }
  1710. nr_to_scan--;
  1711. spin_unlock(&kvm->mmu_lock);
  1712. }
  1713. if (kvm_freed)
  1714. list_move_tail(&kvm_freed->vm_list, &vm_list);
  1715. spin_unlock(&kvm_lock);
  1716. return cache_count;
  1717. }
  1718. static struct shrinker mmu_shrinker = {
  1719. .shrink = mmu_shrink,
  1720. .seeks = DEFAULT_SEEKS * 10,
  1721. };
  1722. void mmu_destroy_caches(void)
  1723. {
  1724. if (pte_chain_cache)
  1725. kmem_cache_destroy(pte_chain_cache);
  1726. if (rmap_desc_cache)
  1727. kmem_cache_destroy(rmap_desc_cache);
  1728. if (mmu_page_header_cache)
  1729. kmem_cache_destroy(mmu_page_header_cache);
  1730. }
  1731. void kvm_mmu_module_exit(void)
  1732. {
  1733. mmu_destroy_caches();
  1734. unregister_shrinker(&mmu_shrinker);
  1735. }
  1736. int kvm_mmu_module_init(void)
  1737. {
  1738. pte_chain_cache = kmem_cache_create("kvm_pte_chain",
  1739. sizeof(struct kvm_pte_chain),
  1740. 0, 0, NULL);
  1741. if (!pte_chain_cache)
  1742. goto nomem;
  1743. rmap_desc_cache = kmem_cache_create("kvm_rmap_desc",
  1744. sizeof(struct kvm_rmap_desc),
  1745. 0, 0, NULL);
  1746. if (!rmap_desc_cache)
  1747. goto nomem;
  1748. mmu_page_header_cache = kmem_cache_create("kvm_mmu_page_header",
  1749. sizeof(struct kvm_mmu_page),
  1750. 0, 0, NULL);
  1751. if (!mmu_page_header_cache)
  1752. goto nomem;
  1753. register_shrinker(&mmu_shrinker);
  1754. return 0;
  1755. nomem:
  1756. mmu_destroy_caches();
  1757. return -ENOMEM;
  1758. }
  1759. /*
  1760. * Caculate mmu pages needed for kvm.
  1761. */
  1762. unsigned int kvm_mmu_calculate_mmu_pages(struct kvm *kvm)
  1763. {
  1764. int i;
  1765. unsigned int nr_mmu_pages;
  1766. unsigned int nr_pages = 0;
  1767. for (i = 0; i < kvm->nmemslots; i++)
  1768. nr_pages += kvm->memslots[i].npages;
  1769. nr_mmu_pages = nr_pages * KVM_PERMILLE_MMU_PAGES / 1000;
  1770. nr_mmu_pages = max(nr_mmu_pages,
  1771. (unsigned int) KVM_MIN_ALLOC_MMU_PAGES);
  1772. return nr_mmu_pages;
  1773. }
  1774. static void *pv_mmu_peek_buffer(struct kvm_pv_mmu_op_buffer *buffer,
  1775. unsigned len)
  1776. {
  1777. if (len > buffer->len)
  1778. return NULL;
  1779. return buffer->ptr;
  1780. }
  1781. static void *pv_mmu_read_buffer(struct kvm_pv_mmu_op_buffer *buffer,
  1782. unsigned len)
  1783. {
  1784. void *ret;
  1785. ret = pv_mmu_peek_buffer(buffer, len);
  1786. if (!ret)
  1787. return ret;
  1788. buffer->ptr += len;
  1789. buffer->len -= len;
  1790. buffer->processed += len;
  1791. return ret;
  1792. }
  1793. static int kvm_pv_mmu_write(struct kvm_vcpu *vcpu,
  1794. gpa_t addr, gpa_t value)
  1795. {
  1796. int bytes = 8;
  1797. int r;
  1798. if (!is_long_mode(vcpu) && !is_pae(vcpu))
  1799. bytes = 4;
  1800. r = mmu_topup_memory_caches(vcpu);
  1801. if (r)
  1802. return r;
  1803. if (!emulator_write_phys(vcpu, addr, &value, bytes))
  1804. return -EFAULT;
  1805. return 1;
  1806. }
  1807. static int kvm_pv_mmu_flush_tlb(struct kvm_vcpu *vcpu)
  1808. {
  1809. kvm_x86_ops->tlb_flush(vcpu);
  1810. return 1;
  1811. }
  1812. static int kvm_pv_mmu_release_pt(struct kvm_vcpu *vcpu, gpa_t addr)
  1813. {
  1814. spin_lock(&vcpu->kvm->mmu_lock);
  1815. mmu_unshadow(vcpu->kvm, addr >> PAGE_SHIFT);
  1816. spin_unlock(&vcpu->kvm->mmu_lock);
  1817. return 1;
  1818. }
  1819. static int kvm_pv_mmu_op_one(struct kvm_vcpu *vcpu,
  1820. struct kvm_pv_mmu_op_buffer *buffer)
  1821. {
  1822. struct kvm_mmu_op_header *header;
  1823. header = pv_mmu_peek_buffer(buffer, sizeof *header);
  1824. if (!header)
  1825. return 0;
  1826. switch (header->op) {
  1827. case KVM_MMU_OP_WRITE_PTE: {
  1828. struct kvm_mmu_op_write_pte *wpte;
  1829. wpte = pv_mmu_read_buffer(buffer, sizeof *wpte);
  1830. if (!wpte)
  1831. return 0;
  1832. return kvm_pv_mmu_write(vcpu, wpte->pte_phys,
  1833. wpte->pte_val);
  1834. }
  1835. case KVM_MMU_OP_FLUSH_TLB: {
  1836. struct kvm_mmu_op_flush_tlb *ftlb;
  1837. ftlb = pv_mmu_read_buffer(buffer, sizeof *ftlb);
  1838. if (!ftlb)
  1839. return 0;
  1840. return kvm_pv_mmu_flush_tlb(vcpu);
  1841. }
  1842. case KVM_MMU_OP_RELEASE_PT: {
  1843. struct kvm_mmu_op_release_pt *rpt;
  1844. rpt = pv_mmu_read_buffer(buffer, sizeof *rpt);
  1845. if (!rpt)
  1846. return 0;
  1847. return kvm_pv_mmu_release_pt(vcpu, rpt->pt_phys);
  1848. }
  1849. default: return 0;
  1850. }
  1851. }
  1852. int kvm_pv_mmu_op(struct kvm_vcpu *vcpu, unsigned long bytes,
  1853. gpa_t addr, unsigned long *ret)
  1854. {
  1855. int r;
  1856. struct kvm_pv_mmu_op_buffer buffer;
  1857. down_read(&current->mm->mmap_sem);
  1858. buffer.ptr = buffer.buf;
  1859. buffer.len = min_t(unsigned long, bytes, sizeof buffer.buf);
  1860. buffer.processed = 0;
  1861. r = kvm_read_guest(vcpu->kvm, addr, buffer.buf, buffer.len);
  1862. if (r)
  1863. goto out;
  1864. while (buffer.len) {
  1865. r = kvm_pv_mmu_op_one(vcpu, &buffer);
  1866. if (r < 0)
  1867. goto out;
  1868. if (r == 0)
  1869. break;
  1870. }
  1871. r = 1;
  1872. out:
  1873. *ret = buffer.processed;
  1874. up_read(&current->mm->mmap_sem);
  1875. return r;
  1876. }
  1877. #ifdef AUDIT
  1878. static const char *audit_msg;
  1879. static gva_t canonicalize(gva_t gva)
  1880. {
  1881. #ifdef CONFIG_X86_64
  1882. gva = (long long)(gva << 16) >> 16;
  1883. #endif
  1884. return gva;
  1885. }
  1886. static void audit_mappings_page(struct kvm_vcpu *vcpu, u64 page_pte,
  1887. gva_t va, int level)
  1888. {
  1889. u64 *pt = __va(page_pte & PT64_BASE_ADDR_MASK);
  1890. int i;
  1891. gva_t va_delta = 1ul << (PAGE_SHIFT + 9 * (level - 1));
  1892. for (i = 0; i < PT64_ENT_PER_PAGE; ++i, va += va_delta) {
  1893. u64 ent = pt[i];
  1894. if (ent == shadow_trap_nonpresent_pte)
  1895. continue;
  1896. va = canonicalize(va);
  1897. if (level > 1) {
  1898. if (ent == shadow_notrap_nonpresent_pte)
  1899. printk(KERN_ERR "audit: (%s) nontrapping pte"
  1900. " in nonleaf level: levels %d gva %lx"
  1901. " level %d pte %llx\n", audit_msg,
  1902. vcpu->arch.mmu.root_level, va, level, ent);
  1903. audit_mappings_page(vcpu, ent, va, level - 1);
  1904. } else {
  1905. gpa_t gpa = vcpu->arch.mmu.gva_to_gpa(vcpu, va);
  1906. struct page *page = gpa_to_page(vcpu, gpa);
  1907. hpa_t hpa = page_to_phys(page);
  1908. if (is_shadow_present_pte(ent)
  1909. && (ent & PT64_BASE_ADDR_MASK) != hpa)
  1910. printk(KERN_ERR "xx audit error: (%s) levels %d"
  1911. " gva %lx gpa %llx hpa %llx ent %llx %d\n",
  1912. audit_msg, vcpu->arch.mmu.root_level,
  1913. va, gpa, hpa, ent,
  1914. is_shadow_present_pte(ent));
  1915. else if (ent == shadow_notrap_nonpresent_pte
  1916. && !is_error_hpa(hpa))
  1917. printk(KERN_ERR "audit: (%s) notrap shadow,"
  1918. " valid guest gva %lx\n", audit_msg, va);
  1919. kvm_release_page_clean(page);
  1920. }
  1921. }
  1922. }
  1923. static void audit_mappings(struct kvm_vcpu *vcpu)
  1924. {
  1925. unsigned i;
  1926. if (vcpu->arch.mmu.root_level == 4)
  1927. audit_mappings_page(vcpu, vcpu->arch.mmu.root_hpa, 0, 4);
  1928. else
  1929. for (i = 0; i < 4; ++i)
  1930. if (vcpu->arch.mmu.pae_root[i] & PT_PRESENT_MASK)
  1931. audit_mappings_page(vcpu,
  1932. vcpu->arch.mmu.pae_root[i],
  1933. i << 30,
  1934. 2);
  1935. }
  1936. static int count_rmaps(struct kvm_vcpu *vcpu)
  1937. {
  1938. int nmaps = 0;
  1939. int i, j, k;
  1940. for (i = 0; i < KVM_MEMORY_SLOTS; ++i) {
  1941. struct kvm_memory_slot *m = &vcpu->kvm->memslots[i];
  1942. struct kvm_rmap_desc *d;
  1943. for (j = 0; j < m->npages; ++j) {
  1944. unsigned long *rmapp = &m->rmap[j];
  1945. if (!*rmapp)
  1946. continue;
  1947. if (!(*rmapp & 1)) {
  1948. ++nmaps;
  1949. continue;
  1950. }
  1951. d = (struct kvm_rmap_desc *)(*rmapp & ~1ul);
  1952. while (d) {
  1953. for (k = 0; k < RMAP_EXT; ++k)
  1954. if (d->shadow_ptes[k])
  1955. ++nmaps;
  1956. else
  1957. break;
  1958. d = d->more;
  1959. }
  1960. }
  1961. }
  1962. return nmaps;
  1963. }
  1964. static int count_writable_mappings(struct kvm_vcpu *vcpu)
  1965. {
  1966. int nmaps = 0;
  1967. struct kvm_mmu_page *sp;
  1968. int i;
  1969. list_for_each_entry(sp, &vcpu->kvm->arch.active_mmu_pages, link) {
  1970. u64 *pt = sp->spt;
  1971. if (sp->role.level != PT_PAGE_TABLE_LEVEL)
  1972. continue;
  1973. for (i = 0; i < PT64_ENT_PER_PAGE; ++i) {
  1974. u64 ent = pt[i];
  1975. if (!(ent & PT_PRESENT_MASK))
  1976. continue;
  1977. if (!(ent & PT_WRITABLE_MASK))
  1978. continue;
  1979. ++nmaps;
  1980. }
  1981. }
  1982. return nmaps;
  1983. }
  1984. static void audit_rmap(struct kvm_vcpu *vcpu)
  1985. {
  1986. int n_rmap = count_rmaps(vcpu);
  1987. int n_actual = count_writable_mappings(vcpu);
  1988. if (n_rmap != n_actual)
  1989. printk(KERN_ERR "%s: (%s) rmap %d actual %d\n",
  1990. __func__, audit_msg, n_rmap, n_actual);
  1991. }
  1992. static void audit_write_protection(struct kvm_vcpu *vcpu)
  1993. {
  1994. struct kvm_mmu_page *sp;
  1995. struct kvm_memory_slot *slot;
  1996. unsigned long *rmapp;
  1997. gfn_t gfn;
  1998. list_for_each_entry(sp, &vcpu->kvm->arch.active_mmu_pages, link) {
  1999. if (sp->role.metaphysical)
  2000. continue;
  2001. slot = gfn_to_memslot(vcpu->kvm, sp->gfn);
  2002. gfn = unalias_gfn(vcpu->kvm, sp->gfn);
  2003. rmapp = &slot->rmap[gfn - slot->base_gfn];
  2004. if (*rmapp)
  2005. printk(KERN_ERR "%s: (%s) shadow page has writable"
  2006. " mappings: gfn %lx role %x\n",
  2007. __func__, audit_msg, sp->gfn,
  2008. sp->role.word);
  2009. }
  2010. }
  2011. static void kvm_mmu_audit(struct kvm_vcpu *vcpu, const char *msg)
  2012. {
  2013. int olddbg = dbg;
  2014. dbg = 0;
  2015. audit_msg = msg;
  2016. audit_rmap(vcpu);
  2017. audit_write_protection(vcpu);
  2018. audit_mappings(vcpu);
  2019. dbg = olddbg;
  2020. }
  2021. #endif