cx88-dvb.c 37 KB

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  1. /*
  2. *
  3. * device driver for Conexant 2388x based TV cards
  4. * MPEG Transport Stream (DVB) routines
  5. *
  6. * (c) 2004, 2005 Chris Pascoe <c.pascoe@itee.uq.edu.au>
  7. * (c) 2004 Gerd Knorr <kraxel@bytesex.org> [SuSE Labs]
  8. *
  9. * This program is free software; you can redistribute it and/or modify
  10. * it under the terms of the GNU General Public License as published by
  11. * the Free Software Foundation; either version 2 of the License, or
  12. * (at your option) any later version.
  13. *
  14. * This program is distributed in the hope that it will be useful,
  15. * but WITHOUT ANY WARRANTY; without even the implied warranty of
  16. * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
  17. * GNU General Public License for more details.
  18. *
  19. * You should have received a copy of the GNU General Public License
  20. * along with this program; if not, write to the Free Software
  21. * Foundation, Inc., 675 Mass Ave, Cambridge, MA 02139, USA.
  22. */
  23. #include <linux/module.h>
  24. #include <linux/init.h>
  25. #include <linux/device.h>
  26. #include <linux/fs.h>
  27. #include <linux/kthread.h>
  28. #include <linux/file.h>
  29. #include <linux/suspend.h>
  30. #include "cx88.h"
  31. #include "dvb-pll.h"
  32. #include <media/v4l2-common.h>
  33. #include "mt352.h"
  34. #include "mt352_priv.h"
  35. #include "cx88-vp3054-i2c.h"
  36. #include "zl10353.h"
  37. #include "cx22702.h"
  38. #include "or51132.h"
  39. #include "lgdt330x.h"
  40. #include "s5h1409.h"
  41. #include "xc5000.h"
  42. #include "nxt200x.h"
  43. #include "cx24123.h"
  44. #include "isl6421.h"
  45. #include "tuner-simple.h"
  46. #include "tda9887.h"
  47. #include "s5h1411.h"
  48. #include "stv0299.h"
  49. #include "z0194a.h"
  50. #include "stv0288.h"
  51. #include "stb6000.h"
  52. #include "cx24116.h"
  53. MODULE_DESCRIPTION("driver for cx2388x based DVB cards");
  54. MODULE_AUTHOR("Chris Pascoe <c.pascoe@itee.uq.edu.au>");
  55. MODULE_AUTHOR("Gerd Knorr <kraxel@bytesex.org> [SuSE Labs]");
  56. MODULE_LICENSE("GPL");
  57. static unsigned int debug;
  58. module_param(debug, int, 0644);
  59. MODULE_PARM_DESC(debug,"enable debug messages [dvb]");
  60. DVB_DEFINE_MOD_OPT_ADAPTER_NR(adapter_nr);
  61. #define dprintk(level,fmt, arg...) if (debug >= level) \
  62. printk(KERN_DEBUG "%s/2-dvb: " fmt, core->name, ## arg)
  63. /* ------------------------------------------------------------------ */
  64. static int dvb_buf_setup(struct videobuf_queue *q,
  65. unsigned int *count, unsigned int *size)
  66. {
  67. struct cx8802_dev *dev = q->priv_data;
  68. dev->ts_packet_size = 188 * 4;
  69. dev->ts_packet_count = 32;
  70. *size = dev->ts_packet_size * dev->ts_packet_count;
  71. *count = 32;
  72. return 0;
  73. }
  74. static int dvb_buf_prepare(struct videobuf_queue *q,
  75. struct videobuf_buffer *vb, enum v4l2_field field)
  76. {
  77. struct cx8802_dev *dev = q->priv_data;
  78. return cx8802_buf_prepare(q, dev, (struct cx88_buffer*)vb,field);
  79. }
  80. static void dvb_buf_queue(struct videobuf_queue *q, struct videobuf_buffer *vb)
  81. {
  82. struct cx8802_dev *dev = q->priv_data;
  83. cx8802_buf_queue(dev, (struct cx88_buffer*)vb);
  84. }
  85. static void dvb_buf_release(struct videobuf_queue *q,
  86. struct videobuf_buffer *vb)
  87. {
  88. cx88_free_buffer(q, (struct cx88_buffer*)vb);
  89. }
  90. static struct videobuf_queue_ops dvb_qops = {
  91. .buf_setup = dvb_buf_setup,
  92. .buf_prepare = dvb_buf_prepare,
  93. .buf_queue = dvb_buf_queue,
  94. .buf_release = dvb_buf_release,
  95. };
  96. /* ------------------------------------------------------------------ */
  97. static int cx88_dvb_bus_ctrl(struct dvb_frontend* fe, int acquire)
  98. {
  99. struct cx8802_dev *dev= fe->dvb->priv;
  100. struct cx8802_driver *drv = NULL;
  101. int ret = 0;
  102. int fe_id;
  103. fe_id = videobuf_dvb_find_frontend(&dev->frontends, fe);
  104. if (!fe_id) {
  105. printk(KERN_ERR "%s() No frontend found\n", __func__);
  106. return -EINVAL;
  107. }
  108. drv = cx8802_get_driver(dev, CX88_MPEG_DVB);
  109. if (drv) {
  110. if (acquire){
  111. dev->frontends.active_fe_id = fe_id;
  112. ret = drv->request_acquire(drv);
  113. } else {
  114. ret = drv->request_release(drv);
  115. dev->frontends.active_fe_id = 0;
  116. }
  117. }
  118. return ret;
  119. }
  120. /* ------------------------------------------------------------------ */
  121. static int dvico_fusionhdtv_demod_init(struct dvb_frontend* fe)
  122. {
  123. static u8 clock_config [] = { CLOCK_CTL, 0x38, 0x39 };
  124. static u8 reset [] = { RESET, 0x80 };
  125. static u8 adc_ctl_1_cfg [] = { ADC_CTL_1, 0x40 };
  126. static u8 agc_cfg [] = { AGC_TARGET, 0x24, 0x20 };
  127. static u8 gpp_ctl_cfg [] = { GPP_CTL, 0x33 };
  128. static u8 capt_range_cfg[] = { CAPT_RANGE, 0x32 };
  129. mt352_write(fe, clock_config, sizeof(clock_config));
  130. udelay(200);
  131. mt352_write(fe, reset, sizeof(reset));
  132. mt352_write(fe, adc_ctl_1_cfg, sizeof(adc_ctl_1_cfg));
  133. mt352_write(fe, agc_cfg, sizeof(agc_cfg));
  134. mt352_write(fe, gpp_ctl_cfg, sizeof(gpp_ctl_cfg));
  135. mt352_write(fe, capt_range_cfg, sizeof(capt_range_cfg));
  136. return 0;
  137. }
  138. static int dvico_dual_demod_init(struct dvb_frontend *fe)
  139. {
  140. static u8 clock_config [] = { CLOCK_CTL, 0x38, 0x38 };
  141. static u8 reset [] = { RESET, 0x80 };
  142. static u8 adc_ctl_1_cfg [] = { ADC_CTL_1, 0x40 };
  143. static u8 agc_cfg [] = { AGC_TARGET, 0x28, 0x20 };
  144. static u8 gpp_ctl_cfg [] = { GPP_CTL, 0x33 };
  145. static u8 capt_range_cfg[] = { CAPT_RANGE, 0x32 };
  146. mt352_write(fe, clock_config, sizeof(clock_config));
  147. udelay(200);
  148. mt352_write(fe, reset, sizeof(reset));
  149. mt352_write(fe, adc_ctl_1_cfg, sizeof(adc_ctl_1_cfg));
  150. mt352_write(fe, agc_cfg, sizeof(agc_cfg));
  151. mt352_write(fe, gpp_ctl_cfg, sizeof(gpp_ctl_cfg));
  152. mt352_write(fe, capt_range_cfg, sizeof(capt_range_cfg));
  153. return 0;
  154. }
  155. static int dntv_live_dvbt_demod_init(struct dvb_frontend* fe)
  156. {
  157. static u8 clock_config [] = { 0x89, 0x38, 0x39 };
  158. static u8 reset [] = { 0x50, 0x80 };
  159. static u8 adc_ctl_1_cfg [] = { 0x8E, 0x40 };
  160. static u8 agc_cfg [] = { 0x67, 0x10, 0x23, 0x00, 0xFF, 0xFF,
  161. 0x00, 0xFF, 0x00, 0x40, 0x40 };
  162. static u8 dntv_extra[] = { 0xB5, 0x7A };
  163. static u8 capt_range_cfg[] = { 0x75, 0x32 };
  164. mt352_write(fe, clock_config, sizeof(clock_config));
  165. udelay(2000);
  166. mt352_write(fe, reset, sizeof(reset));
  167. mt352_write(fe, adc_ctl_1_cfg, sizeof(adc_ctl_1_cfg));
  168. mt352_write(fe, agc_cfg, sizeof(agc_cfg));
  169. udelay(2000);
  170. mt352_write(fe, dntv_extra, sizeof(dntv_extra));
  171. mt352_write(fe, capt_range_cfg, sizeof(capt_range_cfg));
  172. return 0;
  173. }
  174. static struct mt352_config dvico_fusionhdtv = {
  175. .demod_address = 0x0f,
  176. .demod_init = dvico_fusionhdtv_demod_init,
  177. };
  178. static struct mt352_config dntv_live_dvbt_config = {
  179. .demod_address = 0x0f,
  180. .demod_init = dntv_live_dvbt_demod_init,
  181. };
  182. static struct mt352_config dvico_fusionhdtv_dual = {
  183. .demod_address = 0x0f,
  184. .demod_init = dvico_dual_demod_init,
  185. };
  186. #if defined(CONFIG_VIDEO_CX88_VP3054) || (defined(CONFIG_VIDEO_CX88_VP3054_MODULE) && defined(MODULE))
  187. static int dntv_live_dvbt_pro_demod_init(struct dvb_frontend* fe)
  188. {
  189. static u8 clock_config [] = { 0x89, 0x38, 0x38 };
  190. static u8 reset [] = { 0x50, 0x80 };
  191. static u8 adc_ctl_1_cfg [] = { 0x8E, 0x40 };
  192. static u8 agc_cfg [] = { 0x67, 0x10, 0x20, 0x00, 0xFF, 0xFF,
  193. 0x00, 0xFF, 0x00, 0x40, 0x40 };
  194. static u8 dntv_extra[] = { 0xB5, 0x7A };
  195. static u8 capt_range_cfg[] = { 0x75, 0x32 };
  196. mt352_write(fe, clock_config, sizeof(clock_config));
  197. udelay(2000);
  198. mt352_write(fe, reset, sizeof(reset));
  199. mt352_write(fe, adc_ctl_1_cfg, sizeof(adc_ctl_1_cfg));
  200. mt352_write(fe, agc_cfg, sizeof(agc_cfg));
  201. udelay(2000);
  202. mt352_write(fe, dntv_extra, sizeof(dntv_extra));
  203. mt352_write(fe, capt_range_cfg, sizeof(capt_range_cfg));
  204. return 0;
  205. }
  206. static struct mt352_config dntv_live_dvbt_pro_config = {
  207. .demod_address = 0x0f,
  208. .no_tuner = 1,
  209. .demod_init = dntv_live_dvbt_pro_demod_init,
  210. };
  211. #endif
  212. static struct zl10353_config dvico_fusionhdtv_hybrid = {
  213. .demod_address = 0x0f,
  214. .no_tuner = 1,
  215. };
  216. static struct zl10353_config dvico_fusionhdtv_xc3028 = {
  217. .demod_address = 0x0f,
  218. .if2 = 45600,
  219. .no_tuner = 1,
  220. };
  221. static struct mt352_config dvico_fusionhdtv_mt352_xc3028 = {
  222. .demod_address = 0x0f,
  223. .if2 = 4560,
  224. .no_tuner = 1,
  225. .demod_init = dvico_fusionhdtv_demod_init,
  226. };
  227. static struct zl10353_config dvico_fusionhdtv_plus_v1_1 = {
  228. .demod_address = 0x0f,
  229. };
  230. static struct cx22702_config connexant_refboard_config = {
  231. .demod_address = 0x43,
  232. .output_mode = CX22702_SERIAL_OUTPUT,
  233. };
  234. static struct cx22702_config hauppauge_hvr_config = {
  235. .demod_address = 0x63,
  236. .output_mode = CX22702_SERIAL_OUTPUT,
  237. };
  238. static int or51132_set_ts_param(struct dvb_frontend* fe, int is_punctured)
  239. {
  240. struct cx8802_dev *dev= fe->dvb->priv;
  241. dev->ts_gen_cntrl = is_punctured ? 0x04 : 0x00;
  242. return 0;
  243. }
  244. static struct or51132_config pchdtv_hd3000 = {
  245. .demod_address = 0x15,
  246. .set_ts_params = or51132_set_ts_param,
  247. };
  248. static int lgdt330x_pll_rf_set(struct dvb_frontend* fe, int index)
  249. {
  250. struct cx8802_dev *dev= fe->dvb->priv;
  251. struct cx88_core *core = dev->core;
  252. dprintk(1, "%s: index = %d\n", __func__, index);
  253. if (index == 0)
  254. cx_clear(MO_GP0_IO, 8);
  255. else
  256. cx_set(MO_GP0_IO, 8);
  257. return 0;
  258. }
  259. static int lgdt330x_set_ts_param(struct dvb_frontend* fe, int is_punctured)
  260. {
  261. struct cx8802_dev *dev= fe->dvb->priv;
  262. if (is_punctured)
  263. dev->ts_gen_cntrl |= 0x04;
  264. else
  265. dev->ts_gen_cntrl &= ~0x04;
  266. return 0;
  267. }
  268. static struct lgdt330x_config fusionhdtv_3_gold = {
  269. .demod_address = 0x0e,
  270. .demod_chip = LGDT3302,
  271. .serial_mpeg = 0x04, /* TPSERIAL for 3302 in TOP_CONTROL */
  272. .set_ts_params = lgdt330x_set_ts_param,
  273. };
  274. static struct lgdt330x_config fusionhdtv_5_gold = {
  275. .demod_address = 0x0e,
  276. .demod_chip = LGDT3303,
  277. .serial_mpeg = 0x40, /* TPSERIAL for 3303 in TOP_CONTROL */
  278. .set_ts_params = lgdt330x_set_ts_param,
  279. };
  280. static struct lgdt330x_config pchdtv_hd5500 = {
  281. .demod_address = 0x59,
  282. .demod_chip = LGDT3303,
  283. .serial_mpeg = 0x40, /* TPSERIAL for 3303 in TOP_CONTROL */
  284. .set_ts_params = lgdt330x_set_ts_param,
  285. };
  286. static int nxt200x_set_ts_param(struct dvb_frontend* fe, int is_punctured)
  287. {
  288. struct cx8802_dev *dev= fe->dvb->priv;
  289. dev->ts_gen_cntrl = is_punctured ? 0x04 : 0x00;
  290. return 0;
  291. }
  292. static struct nxt200x_config ati_hdtvwonder = {
  293. .demod_address = 0x0a,
  294. .set_ts_params = nxt200x_set_ts_param,
  295. };
  296. static int cx24123_set_ts_param(struct dvb_frontend* fe,
  297. int is_punctured)
  298. {
  299. struct cx8802_dev *dev= fe->dvb->priv;
  300. dev->ts_gen_cntrl = 0x02;
  301. return 0;
  302. }
  303. static int kworld_dvbs_100_set_voltage(struct dvb_frontend* fe,
  304. fe_sec_voltage_t voltage)
  305. {
  306. struct cx8802_dev *dev= fe->dvb->priv;
  307. struct cx88_core *core = dev->core;
  308. if (voltage == SEC_VOLTAGE_OFF)
  309. cx_write(MO_GP0_IO, 0x000006fb);
  310. else
  311. cx_write(MO_GP0_IO, 0x000006f9);
  312. if (core->prev_set_voltage)
  313. return core->prev_set_voltage(fe, voltage);
  314. return 0;
  315. }
  316. static int geniatech_dvbs_set_voltage(struct dvb_frontend *fe,
  317. fe_sec_voltage_t voltage)
  318. {
  319. struct cx8802_dev *dev= fe->dvb->priv;
  320. struct cx88_core *core = dev->core;
  321. if (voltage == SEC_VOLTAGE_OFF) {
  322. dprintk(1,"LNB Voltage OFF\n");
  323. cx_write(MO_GP0_IO, 0x0000efff);
  324. }
  325. if (core->prev_set_voltage)
  326. return core->prev_set_voltage(fe, voltage);
  327. return 0;
  328. }
  329. static int tevii_dvbs_set_voltage(struct dvb_frontend *fe,
  330. fe_sec_voltage_t voltage)
  331. {
  332. struct cx8802_dev *dev= fe->dvb->priv;
  333. struct cx88_core *core = dev->core;
  334. switch (voltage) {
  335. case SEC_VOLTAGE_13:
  336. printk("LNB Voltage SEC_VOLTAGE_13\n");
  337. cx_write(MO_GP0_IO, 0x00006040);
  338. break;
  339. case SEC_VOLTAGE_18:
  340. printk("LNB Voltage SEC_VOLTAGE_18\n");
  341. cx_write(MO_GP0_IO, 0x00006060);
  342. break;
  343. case SEC_VOLTAGE_OFF:
  344. printk("LNB Voltage SEC_VOLTAGE_off\n");
  345. break;
  346. }
  347. if (core->prev_set_voltage)
  348. return core->prev_set_voltage(fe, voltage);
  349. return 0;
  350. }
  351. static struct cx24123_config geniatech_dvbs_config = {
  352. .demod_address = 0x55,
  353. .set_ts_params = cx24123_set_ts_param,
  354. };
  355. static struct cx24123_config hauppauge_novas_config = {
  356. .demod_address = 0x55,
  357. .set_ts_params = cx24123_set_ts_param,
  358. };
  359. static struct cx24123_config kworld_dvbs_100_config = {
  360. .demod_address = 0x15,
  361. .set_ts_params = cx24123_set_ts_param,
  362. .lnb_polarity = 1,
  363. };
  364. static struct s5h1409_config pinnacle_pctv_hd_800i_config = {
  365. .demod_address = 0x32 >> 1,
  366. .output_mode = S5H1409_PARALLEL_OUTPUT,
  367. .gpio = S5H1409_GPIO_ON,
  368. .qam_if = 44000,
  369. .inversion = S5H1409_INVERSION_OFF,
  370. .status_mode = S5H1409_DEMODLOCKING,
  371. .mpeg_timing = S5H1409_MPEGTIMING_NONCONTINOUS_NONINVERTING_CLOCK,
  372. };
  373. static struct s5h1409_config dvico_hdtv5_pci_nano_config = {
  374. .demod_address = 0x32 >> 1,
  375. .output_mode = S5H1409_SERIAL_OUTPUT,
  376. .gpio = S5H1409_GPIO_OFF,
  377. .inversion = S5H1409_INVERSION_OFF,
  378. .status_mode = S5H1409_DEMODLOCKING,
  379. .mpeg_timing = S5H1409_MPEGTIMING_CONTINOUS_NONINVERTING_CLOCK,
  380. };
  381. static struct s5h1409_config kworld_atsc_120_config = {
  382. .demod_address = 0x32 >> 1,
  383. .output_mode = S5H1409_SERIAL_OUTPUT,
  384. .gpio = S5H1409_GPIO_OFF,
  385. .inversion = S5H1409_INVERSION_OFF,
  386. .status_mode = S5H1409_DEMODLOCKING,
  387. .mpeg_timing = S5H1409_MPEGTIMING_CONTINOUS_NONINVERTING_CLOCK,
  388. };
  389. static struct xc5000_config pinnacle_pctv_hd_800i_tuner_config = {
  390. .i2c_address = 0x64,
  391. .if_khz = 5380,
  392. };
  393. static struct zl10353_config cx88_pinnacle_hybrid_pctv = {
  394. .demod_address = (0x1e >> 1),
  395. .no_tuner = 1,
  396. .if2 = 45600,
  397. };
  398. static struct zl10353_config cx88_geniatech_x8000_mt = {
  399. .demod_address = (0x1e >> 1),
  400. .no_tuner = 1,
  401. };
  402. static struct s5h1411_config dvico_fusionhdtv7_config = {
  403. .output_mode = S5H1411_SERIAL_OUTPUT,
  404. .gpio = S5H1411_GPIO_ON,
  405. .mpeg_timing = S5H1411_MPEGTIMING_CONTINOUS_NONINVERTING_CLOCK,
  406. .qam_if = S5H1411_IF_44000,
  407. .vsb_if = S5H1411_IF_44000,
  408. .inversion = S5H1411_INVERSION_OFF,
  409. .status_mode = S5H1411_DEMODLOCKING
  410. };
  411. static struct xc5000_config dvico_fusionhdtv7_tuner_config = {
  412. .i2c_address = 0xc2 >> 1,
  413. .if_khz = 5380,
  414. };
  415. static int attach_xc3028(u8 addr, struct cx8802_dev *dev)
  416. {
  417. struct dvb_frontend *fe;
  418. struct videobuf_dvb_frontend *fe0 = NULL;
  419. struct xc2028_ctrl ctl;
  420. struct xc2028_config cfg = {
  421. .i2c_adap = &dev->core->i2c_adap,
  422. .i2c_addr = addr,
  423. .ctrl = &ctl,
  424. };
  425. /* Get the first frontend */
  426. fe0 = videobuf_dvb_get_frontend(&dev->frontends, 1);
  427. if (!fe0)
  428. return -EINVAL;
  429. if (!fe0->dvb.frontend) {
  430. printk(KERN_ERR "%s/2: dvb frontend not attached. "
  431. "Can't attach xc3028\n",
  432. dev->core->name);
  433. return -EINVAL;
  434. }
  435. /*
  436. * Some xc3028 devices may be hidden by an I2C gate. This is known
  437. * to happen with some s5h1409-based devices.
  438. * Now that I2C gate is open, sets up xc3028 configuration
  439. */
  440. cx88_setup_xc3028(dev->core, &ctl);
  441. fe = dvb_attach(xc2028_attach, fe0->dvb.frontend, &cfg);
  442. if (!fe) {
  443. printk(KERN_ERR "%s/2: xc3028 attach failed\n",
  444. dev->core->name);
  445. dvb_frontend_detach(fe0->dvb.frontend);
  446. dvb_unregister_frontend(fe0->dvb.frontend);
  447. fe0->dvb.frontend = NULL;
  448. return -EINVAL;
  449. }
  450. printk(KERN_INFO "%s/2: xc3028 attached\n",
  451. dev->core->name);
  452. return 0;
  453. }
  454. static int cx24116_set_ts_param(struct dvb_frontend *fe,
  455. int is_punctured)
  456. {
  457. struct cx8802_dev *dev = fe->dvb->priv;
  458. dev->ts_gen_cntrl = 0x2;
  459. return 0;
  460. }
  461. static int cx24116_reset_device(struct dvb_frontend *fe)
  462. {
  463. struct cx8802_dev *dev = fe->dvb->priv;
  464. struct cx88_core *core = dev->core;
  465. /* Reset the part */
  466. /* Put the cx24116 into reset */
  467. cx_write(MO_SRST_IO, 0);
  468. msleep(10);
  469. /* Take the cx24116 out of reset */
  470. cx_write(MO_SRST_IO, 1);
  471. msleep(10);
  472. return 0;
  473. }
  474. static struct cx24116_config hauppauge_hvr4000_config = {
  475. .demod_address = 0x05,
  476. .set_ts_params = cx24116_set_ts_param,
  477. .reset_device = cx24116_reset_device,
  478. };
  479. static struct cx24116_config tevii_s460_config = {
  480. .demod_address = 0x55,
  481. .set_ts_params = cx24116_set_ts_param,
  482. .reset_device = cx24116_reset_device,
  483. };
  484. static struct stv0299_config tevii_tuner_sharp_config = {
  485. .demod_address = 0x68,
  486. .inittab = sharp_z0194a_inittab,
  487. .mclk = 88000000UL,
  488. .invert = 1,
  489. .skip_reinit = 0,
  490. .lock_output = 1,
  491. .volt13_op0_op1 = STV0299_VOLT13_OP1,
  492. .min_delay_ms = 100,
  493. .set_symbol_rate = sharp_z0194a_set_symbol_rate,
  494. .set_ts_params = cx24116_set_ts_param,
  495. };
  496. static struct stv0288_config tevii_tuner_earda_config = {
  497. .demod_address = 0x68,
  498. .min_delay_ms = 100,
  499. .set_ts_params = cx24116_set_ts_param,
  500. };
  501. static int dvb_register(struct cx8802_dev *dev)
  502. {
  503. struct cx88_core *core = dev->core;
  504. struct videobuf_dvb_frontend *fe0, *fe1 = NULL;
  505. int mfe_shared = 0; /* bus not shared by default */
  506. /* Get the first frontend */
  507. fe0 = videobuf_dvb_get_frontend(&dev->frontends, 1);
  508. if (!fe0)
  509. return -EINVAL;
  510. /* multi-frontend gate control is undefined or defaults to fe0 */
  511. dev->frontends.gate = 0;
  512. /* init frontend(s) */
  513. switch (core->boardnr) {
  514. case CX88_BOARD_HAUPPAUGE_DVB_T1:
  515. fe0->dvb.frontend = dvb_attach(cx22702_attach,
  516. &connexant_refboard_config,
  517. &core->i2c_adap);
  518. if (fe0->dvb.frontend != NULL) {
  519. if (!dvb_attach(dvb_pll_attach, fe0->dvb.frontend,
  520. 0x61, &core->i2c_adap,
  521. DVB_PLL_THOMSON_DTT759X))
  522. goto frontend_detach;
  523. }
  524. break;
  525. case CX88_BOARD_TERRATEC_CINERGY_1400_DVB_T1:
  526. case CX88_BOARD_CONEXANT_DVB_T1:
  527. case CX88_BOARD_KWORLD_DVB_T_CX22702:
  528. case CX88_BOARD_WINFAST_DTV1000:
  529. fe0->dvb.frontend = dvb_attach(cx22702_attach,
  530. &connexant_refboard_config,
  531. &core->i2c_adap);
  532. if (fe0->dvb.frontend != NULL) {
  533. if (!dvb_attach(dvb_pll_attach, fe0->dvb.frontend,
  534. 0x60, &core->i2c_adap,
  535. DVB_PLL_THOMSON_DTT7579))
  536. goto frontend_detach;
  537. }
  538. break;
  539. case CX88_BOARD_WINFAST_DTV2000H:
  540. case CX88_BOARD_HAUPPAUGE_HVR1100:
  541. case CX88_BOARD_HAUPPAUGE_HVR1100LP:
  542. case CX88_BOARD_HAUPPAUGE_HVR1300:
  543. fe0->dvb.frontend = dvb_attach(cx22702_attach,
  544. &hauppauge_hvr_config,
  545. &core->i2c_adap);
  546. if (fe0->dvb.frontend != NULL) {
  547. if (!dvb_attach(simple_tuner_attach, fe0->dvb.frontend,
  548. &core->i2c_adap, 0x61,
  549. TUNER_PHILIPS_FMD1216ME_MK3))
  550. goto frontend_detach;
  551. }
  552. break;
  553. case CX88_BOARD_HAUPPAUGE_HVR3000:
  554. /* DVB-S init */
  555. fe0->dvb.frontend = dvb_attach(cx24123_attach,
  556. &hauppauge_novas_config,
  557. &dev->core->i2c_adap);
  558. if (fe0->dvb.frontend) {
  559. if (!dvb_attach(isl6421_attach, fe0->dvb.frontend,
  560. &dev->core->i2c_adap, 0x08, ISL6421_DCL, 0x00)) {
  561. dprintk( 1, "%s(): HVR3000 - DVB-S LNB Init: failed\n", __func__);
  562. }
  563. } else {
  564. dprintk( 1, "%s(): HVR3000 - DVB-S Init: failed\n", __func__);
  565. }
  566. /* DVB-T init */
  567. fe1 = videobuf_dvb_get_frontend(&dev->frontends, 2);
  568. if (fe1) {
  569. dev->frontends.gate = 2;
  570. mfe_shared = 1;
  571. fe1->dvb.frontend = dvb_attach(cx22702_attach,
  572. &hauppauge_hvr_config,
  573. &dev->core->i2c_adap);
  574. if (fe1->dvb.frontend) {
  575. fe1->dvb.frontend->id = 1;
  576. if(!dvb_attach(simple_tuner_attach, fe1->dvb.frontend,
  577. &dev->core->i2c_adap, 0x61,
  578. TUNER_PHILIPS_FMD1216ME_MK3)) {
  579. dprintk( 1, "%s(): HVR3000 - DVB-T misc Init: failed\n", __func__);
  580. }
  581. } else {
  582. dprintk( 1, "%s(): HVR3000 - DVB-T Init: failed\n", __func__);
  583. }
  584. } else {
  585. dprintk( 1, "%s(): HVR3000 - DVB-T Init: can't find frontend 2.\n", __func__);
  586. }
  587. break;
  588. case CX88_BOARD_DVICO_FUSIONHDTV_DVB_T_PLUS:
  589. fe0->dvb.frontend = dvb_attach(mt352_attach,
  590. &dvico_fusionhdtv,
  591. &core->i2c_adap);
  592. if (fe0->dvb.frontend != NULL) {
  593. if (!dvb_attach(dvb_pll_attach, fe0->dvb.frontend,
  594. 0x60, NULL, DVB_PLL_THOMSON_DTT7579))
  595. goto frontend_detach;
  596. break;
  597. }
  598. /* ZL10353 replaces MT352 on later cards */
  599. fe0->dvb.frontend = dvb_attach(zl10353_attach,
  600. &dvico_fusionhdtv_plus_v1_1,
  601. &core->i2c_adap);
  602. if (fe0->dvb.frontend != NULL) {
  603. if (!dvb_attach(dvb_pll_attach, fe0->dvb.frontend,
  604. 0x60, NULL, DVB_PLL_THOMSON_DTT7579))
  605. goto frontend_detach;
  606. }
  607. break;
  608. case CX88_BOARD_DVICO_FUSIONHDTV_DVB_T_DUAL:
  609. /* The tin box says DEE1601, but it seems to be DTT7579
  610. * compatible, with a slightly different MT352 AGC gain. */
  611. fe0->dvb.frontend = dvb_attach(mt352_attach,
  612. &dvico_fusionhdtv_dual,
  613. &core->i2c_adap);
  614. if (fe0->dvb.frontend != NULL) {
  615. if (!dvb_attach(dvb_pll_attach, fe0->dvb.frontend,
  616. 0x61, NULL, DVB_PLL_THOMSON_DTT7579))
  617. goto frontend_detach;
  618. break;
  619. }
  620. /* ZL10353 replaces MT352 on later cards */
  621. fe0->dvb.frontend = dvb_attach(zl10353_attach,
  622. &dvico_fusionhdtv_plus_v1_1,
  623. &core->i2c_adap);
  624. if (fe0->dvb.frontend != NULL) {
  625. if (!dvb_attach(dvb_pll_attach, fe0->dvb.frontend,
  626. 0x61, NULL, DVB_PLL_THOMSON_DTT7579))
  627. goto frontend_detach;
  628. }
  629. break;
  630. case CX88_BOARD_DVICO_FUSIONHDTV_DVB_T1:
  631. fe0->dvb.frontend = dvb_attach(mt352_attach,
  632. &dvico_fusionhdtv,
  633. &core->i2c_adap);
  634. if (fe0->dvb.frontend != NULL) {
  635. if (!dvb_attach(dvb_pll_attach, fe0->dvb.frontend,
  636. 0x61, NULL, DVB_PLL_LG_Z201))
  637. goto frontend_detach;
  638. }
  639. break;
  640. case CX88_BOARD_KWORLD_DVB_T:
  641. case CX88_BOARD_DNTV_LIVE_DVB_T:
  642. case CX88_BOARD_ADSTECH_DVB_T_PCI:
  643. fe0->dvb.frontend = dvb_attach(mt352_attach,
  644. &dntv_live_dvbt_config,
  645. &core->i2c_adap);
  646. if (fe0->dvb.frontend != NULL) {
  647. if (!dvb_attach(dvb_pll_attach, fe0->dvb.frontend,
  648. 0x61, NULL, DVB_PLL_UNKNOWN_1))
  649. goto frontend_detach;
  650. }
  651. break;
  652. case CX88_BOARD_DNTV_LIVE_DVB_T_PRO:
  653. #if defined(CONFIG_VIDEO_CX88_VP3054) || (defined(CONFIG_VIDEO_CX88_VP3054_MODULE) && defined(MODULE))
  654. /* MT352 is on a secondary I2C bus made from some GPIO lines */
  655. fe0->dvb.frontend = dvb_attach(mt352_attach, &dntv_live_dvbt_pro_config,
  656. &dev->vp3054->adap);
  657. if (fe0->dvb.frontend != NULL) {
  658. if (!dvb_attach(simple_tuner_attach, fe0->dvb.frontend,
  659. &core->i2c_adap, 0x61,
  660. TUNER_PHILIPS_FMD1216ME_MK3))
  661. goto frontend_detach;
  662. }
  663. #else
  664. printk(KERN_ERR "%s/2: built without vp3054 support\n",
  665. core->name);
  666. #endif
  667. break;
  668. case CX88_BOARD_DVICO_FUSIONHDTV_DVB_T_HYBRID:
  669. fe0->dvb.frontend = dvb_attach(zl10353_attach,
  670. &dvico_fusionhdtv_hybrid,
  671. &core->i2c_adap);
  672. if (fe0->dvb.frontend != NULL) {
  673. if (!dvb_attach(simple_tuner_attach, fe0->dvb.frontend,
  674. &core->i2c_adap, 0x61,
  675. TUNER_THOMSON_FE6600))
  676. goto frontend_detach;
  677. }
  678. break;
  679. case CX88_BOARD_DVICO_FUSIONHDTV_DVB_T_PRO:
  680. fe0->dvb.frontend = dvb_attach(zl10353_attach,
  681. &dvico_fusionhdtv_xc3028,
  682. &core->i2c_adap);
  683. if (fe0->dvb.frontend == NULL)
  684. fe0->dvb.frontend = dvb_attach(mt352_attach,
  685. &dvico_fusionhdtv_mt352_xc3028,
  686. &core->i2c_adap);
  687. /*
  688. * On this board, the demod provides the I2C bus pullup.
  689. * We must not permit gate_ctrl to be performed, or
  690. * the xc3028 cannot communicate on the bus.
  691. */
  692. if (fe0->dvb.frontend)
  693. fe0->dvb.frontend->ops.i2c_gate_ctrl = NULL;
  694. if (attach_xc3028(0x61, dev) < 0)
  695. goto frontend_detach;
  696. break;
  697. case CX88_BOARD_PCHDTV_HD3000:
  698. fe0->dvb.frontend = dvb_attach(or51132_attach, &pchdtv_hd3000,
  699. &core->i2c_adap);
  700. if (fe0->dvb.frontend != NULL) {
  701. if (!dvb_attach(simple_tuner_attach, fe0->dvb.frontend,
  702. &core->i2c_adap, 0x61,
  703. TUNER_THOMSON_DTT761X))
  704. goto frontend_detach;
  705. }
  706. break;
  707. case CX88_BOARD_DVICO_FUSIONHDTV_3_GOLD_Q:
  708. dev->ts_gen_cntrl = 0x08;
  709. /* Do a hardware reset of chip before using it. */
  710. cx_clear(MO_GP0_IO, 1);
  711. mdelay(100);
  712. cx_set(MO_GP0_IO, 1);
  713. mdelay(200);
  714. /* Select RF connector callback */
  715. fusionhdtv_3_gold.pll_rf_set = lgdt330x_pll_rf_set;
  716. fe0->dvb.frontend = dvb_attach(lgdt330x_attach,
  717. &fusionhdtv_3_gold,
  718. &core->i2c_adap);
  719. if (fe0->dvb.frontend != NULL) {
  720. if (!dvb_attach(simple_tuner_attach, fe0->dvb.frontend,
  721. &core->i2c_adap, 0x61,
  722. TUNER_MICROTUNE_4042FI5))
  723. goto frontend_detach;
  724. }
  725. break;
  726. case CX88_BOARD_DVICO_FUSIONHDTV_3_GOLD_T:
  727. dev->ts_gen_cntrl = 0x08;
  728. /* Do a hardware reset of chip before using it. */
  729. cx_clear(MO_GP0_IO, 1);
  730. mdelay(100);
  731. cx_set(MO_GP0_IO, 9);
  732. mdelay(200);
  733. fe0->dvb.frontend = dvb_attach(lgdt330x_attach,
  734. &fusionhdtv_3_gold,
  735. &core->i2c_adap);
  736. if (fe0->dvb.frontend != NULL) {
  737. if (!dvb_attach(simple_tuner_attach, fe0->dvb.frontend,
  738. &core->i2c_adap, 0x61,
  739. TUNER_THOMSON_DTT761X))
  740. goto frontend_detach;
  741. }
  742. break;
  743. case CX88_BOARD_DVICO_FUSIONHDTV_5_GOLD:
  744. dev->ts_gen_cntrl = 0x08;
  745. /* Do a hardware reset of chip before using it. */
  746. cx_clear(MO_GP0_IO, 1);
  747. mdelay(100);
  748. cx_set(MO_GP0_IO, 1);
  749. mdelay(200);
  750. fe0->dvb.frontend = dvb_attach(lgdt330x_attach,
  751. &fusionhdtv_5_gold,
  752. &core->i2c_adap);
  753. if (fe0->dvb.frontend != NULL) {
  754. if (!dvb_attach(simple_tuner_attach, fe0->dvb.frontend,
  755. &core->i2c_adap, 0x61,
  756. TUNER_LG_TDVS_H06XF))
  757. goto frontend_detach;
  758. if (!dvb_attach(tda9887_attach, fe0->dvb.frontend,
  759. &core->i2c_adap, 0x43))
  760. goto frontend_detach;
  761. }
  762. break;
  763. case CX88_BOARD_PCHDTV_HD5500:
  764. dev->ts_gen_cntrl = 0x08;
  765. /* Do a hardware reset of chip before using it. */
  766. cx_clear(MO_GP0_IO, 1);
  767. mdelay(100);
  768. cx_set(MO_GP0_IO, 1);
  769. mdelay(200);
  770. fe0->dvb.frontend = dvb_attach(lgdt330x_attach,
  771. &pchdtv_hd5500,
  772. &core->i2c_adap);
  773. if (fe0->dvb.frontend != NULL) {
  774. if (!dvb_attach(simple_tuner_attach, fe0->dvb.frontend,
  775. &core->i2c_adap, 0x61,
  776. TUNER_LG_TDVS_H06XF))
  777. goto frontend_detach;
  778. if (!dvb_attach(tda9887_attach, fe0->dvb.frontend,
  779. &core->i2c_adap, 0x43))
  780. goto frontend_detach;
  781. }
  782. break;
  783. case CX88_BOARD_ATI_HDTVWONDER:
  784. fe0->dvb.frontend = dvb_attach(nxt200x_attach,
  785. &ati_hdtvwonder,
  786. &core->i2c_adap);
  787. if (fe0->dvb.frontend != NULL) {
  788. if (!dvb_attach(simple_tuner_attach, fe0->dvb.frontend,
  789. &core->i2c_adap, 0x61,
  790. TUNER_PHILIPS_TUV1236D))
  791. goto frontend_detach;
  792. }
  793. break;
  794. case CX88_BOARD_HAUPPAUGE_NOVASPLUS_S1:
  795. case CX88_BOARD_HAUPPAUGE_NOVASE2_S1:
  796. fe0->dvb.frontend = dvb_attach(cx24123_attach,
  797. &hauppauge_novas_config,
  798. &core->i2c_adap);
  799. if (fe0->dvb.frontend) {
  800. if (!dvb_attach(isl6421_attach, fe0->dvb.frontend,
  801. &core->i2c_adap, 0x08, ISL6421_DCL, 0x00))
  802. goto frontend_detach;
  803. }
  804. break;
  805. case CX88_BOARD_KWORLD_DVBS_100:
  806. fe0->dvb.frontend = dvb_attach(cx24123_attach,
  807. &kworld_dvbs_100_config,
  808. &core->i2c_adap);
  809. if (fe0->dvb.frontend) {
  810. core->prev_set_voltage = fe0->dvb.frontend->ops.set_voltage;
  811. fe0->dvb.frontend->ops.set_voltage = kworld_dvbs_100_set_voltage;
  812. }
  813. break;
  814. case CX88_BOARD_GENIATECH_DVBS:
  815. fe0->dvb.frontend = dvb_attach(cx24123_attach,
  816. &geniatech_dvbs_config,
  817. &core->i2c_adap);
  818. if (fe0->dvb.frontend) {
  819. core->prev_set_voltage = fe0->dvb.frontend->ops.set_voltage;
  820. fe0->dvb.frontend->ops.set_voltage = geniatech_dvbs_set_voltage;
  821. }
  822. break;
  823. case CX88_BOARD_PINNACLE_PCTV_HD_800i:
  824. fe0->dvb.frontend = dvb_attach(s5h1409_attach,
  825. &pinnacle_pctv_hd_800i_config,
  826. &core->i2c_adap);
  827. if (fe0->dvb.frontend != NULL) {
  828. if (!dvb_attach(xc5000_attach, fe0->dvb.frontend,
  829. &core->i2c_adap,
  830. &pinnacle_pctv_hd_800i_tuner_config))
  831. goto frontend_detach;
  832. }
  833. break;
  834. case CX88_BOARD_DVICO_FUSIONHDTV_5_PCI_NANO:
  835. fe0->dvb.frontend = dvb_attach(s5h1409_attach,
  836. &dvico_hdtv5_pci_nano_config,
  837. &core->i2c_adap);
  838. if (fe0->dvb.frontend != NULL) {
  839. struct dvb_frontend *fe;
  840. struct xc2028_config cfg = {
  841. .i2c_adap = &core->i2c_adap,
  842. .i2c_addr = 0x61,
  843. };
  844. static struct xc2028_ctrl ctl = {
  845. .fname = XC2028_DEFAULT_FIRMWARE,
  846. .max_len = 64,
  847. .scode_table = XC3028_FE_OREN538,
  848. };
  849. fe = dvb_attach(xc2028_attach,
  850. fe0->dvb.frontend, &cfg);
  851. if (fe != NULL && fe->ops.tuner_ops.set_config != NULL)
  852. fe->ops.tuner_ops.set_config(fe, &ctl);
  853. }
  854. break;
  855. case CX88_BOARD_PINNACLE_HYBRID_PCTV:
  856. fe0->dvb.frontend = dvb_attach(zl10353_attach,
  857. &cx88_pinnacle_hybrid_pctv,
  858. &core->i2c_adap);
  859. if (fe0->dvb.frontend) {
  860. fe0->dvb.frontend->ops.i2c_gate_ctrl = NULL;
  861. if (attach_xc3028(0x61, dev) < 0)
  862. goto frontend_detach;
  863. }
  864. break;
  865. case CX88_BOARD_GENIATECH_X8000_MT:
  866. dev->ts_gen_cntrl = 0x00;
  867. fe0->dvb.frontend = dvb_attach(zl10353_attach,
  868. &cx88_geniatech_x8000_mt,
  869. &core->i2c_adap);
  870. if (attach_xc3028(0x61, dev) < 0)
  871. goto frontend_detach;
  872. break;
  873. case CX88_BOARD_KWORLD_ATSC_120:
  874. fe0->dvb.frontend = dvb_attach(s5h1409_attach,
  875. &kworld_atsc_120_config,
  876. &core->i2c_adap);
  877. if (attach_xc3028(0x61, dev) < 0)
  878. goto frontend_detach;
  879. break;
  880. case CX88_BOARD_DVICO_FUSIONHDTV_7_GOLD:
  881. fe0->dvb.frontend = dvb_attach(s5h1411_attach,
  882. &dvico_fusionhdtv7_config,
  883. &core->i2c_adap);
  884. if (fe0->dvb.frontend != NULL) {
  885. if (!dvb_attach(xc5000_attach, fe0->dvb.frontend,
  886. &core->i2c_adap,
  887. &dvico_fusionhdtv7_tuner_config))
  888. goto frontend_detach;
  889. }
  890. break;
  891. case CX88_BOARD_HAUPPAUGE_HVR4000:
  892. /* DVB-S/S2 Init */
  893. fe0->dvb.frontend = dvb_attach(cx24116_attach,
  894. &hauppauge_hvr4000_config,
  895. &dev->core->i2c_adap);
  896. if (fe0->dvb.frontend) {
  897. if(!dvb_attach(isl6421_attach, fe0->dvb.frontend,
  898. &dev->core->i2c_adap, 0x08, ISL6421_DCL, 0x00)) {
  899. dprintk( 1, "%s(): HVR4000 - DVB-S LNB Init: failed\n", __func__);
  900. }
  901. } else {
  902. dprintk( 1, "%s(): HVR4000 - DVB-S Init: failed\n", __func__);
  903. }
  904. /* DVB-T Init */
  905. fe1 = videobuf_dvb_get_frontend(&dev->frontends, 2);
  906. if (fe1) {
  907. dev->frontends.gate = 2;
  908. mfe_shared = 1;
  909. fe1->dvb.frontend = dvb_attach(cx22702_attach,
  910. &hauppauge_hvr_config,
  911. &dev->core->i2c_adap);
  912. if (fe1->dvb.frontend) {
  913. fe1->dvb.frontend->id = 1;
  914. if(!dvb_attach(simple_tuner_attach, fe1->dvb.frontend,
  915. &dev->core->i2c_adap, 0x61,
  916. TUNER_PHILIPS_FMD1216ME_MK3)) {
  917. dprintk( 1, "%s(): HVR4000 - DVB-T misc Init: failed\n", __func__);
  918. }
  919. } else {
  920. dprintk( 1, "%s(): HVR4000 - DVB-T Init: failed\n", __func__);
  921. }
  922. } else {
  923. dprintk( 1, "%s(): HVR4000 - DVB-T Init: can't find frontend 2.\n", __func__);
  924. }
  925. break;
  926. case CX88_BOARD_HAUPPAUGE_HVR4000LITE:
  927. fe0->dvb.frontend = dvb_attach(cx24116_attach,
  928. &hauppauge_hvr4000_config,
  929. &dev->core->i2c_adap);
  930. if (fe0->dvb.frontend) {
  931. dvb_attach(isl6421_attach, fe0->dvb.frontend,
  932. &dev->core->i2c_adap,
  933. 0x08, ISL6421_DCL, 0x00);
  934. }
  935. break;
  936. case CX88_BOARD_TEVII_S420:
  937. fe0->dvb.frontend = dvb_attach(stv0299_attach,
  938. &tevii_tuner_sharp_config,
  939. &core->i2c_adap);
  940. if (fe0->dvb.frontend != NULL) {
  941. if (!dvb_attach(dvb_pll_attach, fe0->dvb.frontend, 0x60,
  942. &core->i2c_adap, DVB_PLL_OPERA1))
  943. goto frontend_detach;
  944. core->prev_set_voltage = fe0->dvb.frontend->ops.set_voltage;
  945. fe0->dvb.frontend->ops.set_voltage = tevii_dvbs_set_voltage;
  946. } else {
  947. fe0->dvb.frontend = dvb_attach(stv0288_attach,
  948. &tevii_tuner_earda_config,
  949. &core->i2c_adap);
  950. if (fe0->dvb.frontend != NULL) {
  951. if (!dvb_attach(stb6000_attach, fe0->dvb.frontend, 0x61,
  952. &core->i2c_adap))
  953. goto frontend_detach;
  954. core->prev_set_voltage = fe0->dvb.frontend->ops.set_voltage;
  955. fe0->dvb.frontend->ops.set_voltage = tevii_dvbs_set_voltage;
  956. }
  957. }
  958. break;
  959. case CX88_BOARD_TEVII_S460:
  960. fe0->dvb.frontend = dvb_attach(cx24116_attach,
  961. &tevii_s460_config,
  962. &core->i2c_adap);
  963. if (fe0->dvb.frontend != NULL) {
  964. core->prev_set_voltage = fe0->dvb.frontend->ops.set_voltage;
  965. fe0->dvb.frontend->ops.set_voltage = tevii_dvbs_set_voltage;
  966. }
  967. break;
  968. case CX88_BOARD_OMICOM_SS4_PCI:
  969. case CX88_BOARD_TBS_8920:
  970. case CX88_BOARD_PROF_7300:
  971. fe0->dvb.frontend = dvb_attach(cx24116_attach,
  972. &hauppauge_hvr4000_config,
  973. &core->i2c_adap);
  974. if (fe0->dvb.frontend != NULL) {
  975. core->prev_set_voltage = fe0->dvb.frontend->ops.set_voltage;
  976. fe0->dvb.frontend->ops.set_voltage = tevii_dvbs_set_voltage;
  977. }
  978. break;
  979. default:
  980. printk(KERN_ERR "%s/2: The frontend of your DVB/ATSC card isn't supported yet\n",
  981. core->name);
  982. break;
  983. }
  984. if ( (NULL == fe0->dvb.frontend) || (fe1 && NULL == fe1->dvb.frontend) ) {
  985. printk(KERN_ERR
  986. "%s/2: frontend initialization failed\n",
  987. core->name);
  988. return -EINVAL;
  989. }
  990. /* define general-purpose callback pointer */
  991. fe0->dvb.frontend->callback = cx88_tuner_callback;
  992. /* Ensure all frontends negotiate bus access */
  993. fe0->dvb.frontend->ops.ts_bus_ctrl = cx88_dvb_bus_ctrl;
  994. if (fe1)
  995. fe1->dvb.frontend->ops.ts_bus_ctrl = cx88_dvb_bus_ctrl;
  996. /* Put the analog decoder in standby to keep it quiet */
  997. cx88_call_i2c_clients(core, TUNER_SET_STANDBY, NULL);
  998. /* register everything */
  999. return videobuf_dvb_register_bus(&dev->frontends, THIS_MODULE, dev,
  1000. &dev->pci->dev, adapter_nr, mfe_shared);
  1001. frontend_detach:
  1002. videobuf_dvb_dealloc_frontends(&dev->frontends);
  1003. return -EINVAL;
  1004. }
  1005. /* ----------------------------------------------------------- */
  1006. /* CX8802 MPEG -> mini driver - We have been given the hardware */
  1007. static int cx8802_dvb_advise_acquire(struct cx8802_driver *drv)
  1008. {
  1009. struct cx88_core *core = drv->core;
  1010. int err = 0;
  1011. dprintk( 1, "%s\n", __func__);
  1012. switch (core->boardnr) {
  1013. case CX88_BOARD_HAUPPAUGE_HVR1300:
  1014. /* We arrive here with either the cx23416 or the cx22702
  1015. * on the bus. Take the bus from the cx23416 and enable the
  1016. * cx22702 demod
  1017. */
  1018. cx_set(MO_GP0_IO, 0x00000080); /* cx22702 out of reset and enable */
  1019. cx_clear(MO_GP0_IO, 0x00000004);
  1020. udelay(1000);
  1021. break;
  1022. case CX88_BOARD_HAUPPAUGE_HVR3000:
  1023. case CX88_BOARD_HAUPPAUGE_HVR4000:
  1024. if(core->dvbdev->frontends.active_fe_id == 1) {
  1025. /* DVB-S/S2 Enabled */
  1026. /* Toggle reset on cx22702 leaving i2c active */
  1027. cx_write(MO_GP0_IO, (core->board.input[0].gpio0 & 0x0000ff00) | 0x00000080);
  1028. udelay(1000);
  1029. cx_clear(MO_GP0_IO, 0x00000080);
  1030. udelay(50);
  1031. cx_set(MO_GP0_IO, 0x00000080); /* cx22702 out of reset */
  1032. cx_set(MO_GP0_IO, 0x00000004); /* tri-state the cx22702 pins */
  1033. udelay(1000);
  1034. cx_write(MO_SRST_IO, 1); /* Take the cx24116/cx24123 out of reset */
  1035. core->dvbdev->ts_gen_cntrl = 0x02; /* Parallel IO */
  1036. } else
  1037. if (core->dvbdev->frontends.active_fe_id == 2) {
  1038. /* DVB-T Enabled */
  1039. /* Put the cx24116/cx24123 into reset */
  1040. cx_write(MO_SRST_IO, 0);
  1041. /* cx22702 out of reset and enable it */
  1042. cx_set(MO_GP0_IO, 0x00000080);
  1043. cx_clear(MO_GP0_IO, 0x00000004);
  1044. core->dvbdev->ts_gen_cntrl = 0x0c; /* Serial IO */
  1045. udelay(1000);
  1046. }
  1047. break;
  1048. default:
  1049. err = -ENODEV;
  1050. }
  1051. return err;
  1052. }
  1053. /* CX8802 MPEG -> mini driver - We no longer have the hardware */
  1054. static int cx8802_dvb_advise_release(struct cx8802_driver *drv)
  1055. {
  1056. struct cx88_core *core = drv->core;
  1057. int err = 0;
  1058. dprintk( 1, "%s\n", __func__);
  1059. switch (core->boardnr) {
  1060. case CX88_BOARD_HAUPPAUGE_HVR1300:
  1061. /* Do Nothing, leave the cx22702 on the bus. */
  1062. break;
  1063. case CX88_BOARD_HAUPPAUGE_HVR3000:
  1064. case CX88_BOARD_HAUPPAUGE_HVR4000:
  1065. break;
  1066. default:
  1067. err = -ENODEV;
  1068. }
  1069. return err;
  1070. }
  1071. static int cx8802_dvb_probe(struct cx8802_driver *drv)
  1072. {
  1073. struct cx88_core *core = drv->core;
  1074. struct cx8802_dev *dev = drv->core->dvbdev;
  1075. int err, i;
  1076. struct videobuf_dvb_frontend *fe;
  1077. dprintk( 1, "%s\n", __func__);
  1078. dprintk( 1, " ->being probed by Card=%d Name=%s, PCI %02x:%02x\n",
  1079. core->boardnr,
  1080. core->name,
  1081. core->pci_bus,
  1082. core->pci_slot);
  1083. err = -ENODEV;
  1084. if (!(core->board.mpeg & CX88_MPEG_DVB))
  1085. goto fail_core;
  1086. /* If vp3054 isn't enabled, a stub will just return 0 */
  1087. err = vp3054_i2c_probe(dev);
  1088. if (0 != err)
  1089. goto fail_core;
  1090. /* dvb stuff */
  1091. printk(KERN_INFO "%s/2: cx2388x based DVB/ATSC card\n", core->name);
  1092. dev->ts_gen_cntrl = 0x0c;
  1093. for (i = 1; i <= core->board.num_frontends; i++) {
  1094. fe = videobuf_dvb_get_frontend(&core->dvbdev->frontends, i);
  1095. if (!fe) {
  1096. printk(KERN_ERR "%s() failed to get frontend(%d)\n", __func__, i);
  1097. continue;
  1098. }
  1099. videobuf_queue_sg_init(&fe->dvb.dvbq, &dvb_qops,
  1100. &dev->pci->dev, &dev->slock,
  1101. V4L2_BUF_TYPE_VIDEO_CAPTURE,
  1102. V4L2_FIELD_TOP,
  1103. sizeof(struct cx88_buffer),
  1104. dev);
  1105. /* init struct videobuf_dvb */
  1106. fe->dvb.name = dev->core->name;
  1107. }
  1108. err = dvb_register(dev);
  1109. if (err != 0)
  1110. printk(KERN_ERR "%s/2: dvb_register failed (err = %d)\n",
  1111. core->name, err);
  1112. fail_core:
  1113. return err;
  1114. }
  1115. static int cx8802_dvb_remove(struct cx8802_driver *drv)
  1116. {
  1117. struct cx88_core *core = drv->core;
  1118. struct cx8802_dev *dev = drv->core->dvbdev;
  1119. dprintk( 1, "%s\n", __func__);
  1120. videobuf_dvb_unregister_bus(&dev->frontends);
  1121. vp3054_i2c_remove(dev);
  1122. return 0;
  1123. }
  1124. static struct cx8802_driver cx8802_dvb_driver = {
  1125. .type_id = CX88_MPEG_DVB,
  1126. .hw_access = CX8802_DRVCTL_SHARED,
  1127. .probe = cx8802_dvb_probe,
  1128. .remove = cx8802_dvb_remove,
  1129. .advise_acquire = cx8802_dvb_advise_acquire,
  1130. .advise_release = cx8802_dvb_advise_release,
  1131. };
  1132. static int dvb_init(void)
  1133. {
  1134. printk(KERN_INFO "cx88/2: cx2388x dvb driver version %d.%d.%d loaded\n",
  1135. (CX88_VERSION_CODE >> 16) & 0xff,
  1136. (CX88_VERSION_CODE >> 8) & 0xff,
  1137. CX88_VERSION_CODE & 0xff);
  1138. #ifdef SNAPSHOT
  1139. printk(KERN_INFO "cx2388x: snapshot date %04d-%02d-%02d\n",
  1140. SNAPSHOT/10000, (SNAPSHOT/100)%100, SNAPSHOT%100);
  1141. #endif
  1142. return cx8802_register_driver(&cx8802_dvb_driver);
  1143. }
  1144. static void dvb_fini(void)
  1145. {
  1146. cx8802_unregister_driver(&cx8802_dvb_driver);
  1147. }
  1148. module_init(dvb_init);
  1149. module_exit(dvb_fini);
  1150. /*
  1151. * Local variables:
  1152. * c-basic-offset: 8
  1153. * compile-command: "make DVB=1"
  1154. * End:
  1155. */