tc35815.c 88 KB

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  1. /*
  2. * tc35815.c: A TOSHIBA TC35815CF PCI 10/100Mbps ethernet driver for linux.
  3. *
  4. * Based on skelton.c by Donald Becker.
  5. *
  6. * This driver is a replacement of older and less maintained version.
  7. * This is a header of the older version:
  8. * -----<snip>-----
  9. * Copyright 2001 MontaVista Software Inc.
  10. * Author: MontaVista Software, Inc.
  11. * ahennessy@mvista.com
  12. * Copyright (C) 2000-2001 Toshiba Corporation
  13. * static const char *version =
  14. * "tc35815.c:v0.00 26/07/2000 by Toshiba Corporation\n";
  15. * -----<snip>-----
  16. *
  17. * This file is subject to the terms and conditions of the GNU General Public
  18. * License. See the file "COPYING" in the main directory of this archive
  19. * for more details.
  20. *
  21. * (C) Copyright TOSHIBA CORPORATION 2004-2005
  22. * All Rights Reserved.
  23. */
  24. #ifdef TC35815_NAPI
  25. #define DRV_VERSION "1.36-NAPI"
  26. #else
  27. #define DRV_VERSION "1.36"
  28. #endif
  29. static const char *version = "tc35815.c:v" DRV_VERSION "\n";
  30. #define MODNAME "tc35815"
  31. #include <linux/module.h>
  32. #include <linux/kernel.h>
  33. #include <linux/types.h>
  34. #include <linux/fcntl.h>
  35. #include <linux/interrupt.h>
  36. #include <linux/ioport.h>
  37. #include <linux/in.h>
  38. #include <linux/slab.h>
  39. #include <linux/string.h>
  40. #include <linux/spinlock.h>
  41. #include <linux/errno.h>
  42. #include <linux/init.h>
  43. #include <linux/netdevice.h>
  44. #include <linux/etherdevice.h>
  45. #include <linux/skbuff.h>
  46. #include <linux/delay.h>
  47. #include <linux/pci.h>
  48. #include <linux/mii.h>
  49. #include <linux/ethtool.h>
  50. #include <linux/platform_device.h>
  51. #include <asm/io.h>
  52. #include <asm/byteorder.h>
  53. /* First, a few definitions that the brave might change. */
  54. #define GATHER_TXINT /* On-Demand Tx Interrupt */
  55. #define WORKAROUND_LOSTCAR
  56. #define WORKAROUND_100HALF_PROMISC
  57. /* #define TC35815_USE_PACKEDBUFFER */
  58. typedef enum {
  59. TC35815CF = 0,
  60. TC35815_NWU,
  61. TC35815_TX4939,
  62. } board_t;
  63. /* indexed by board_t, above */
  64. static const struct {
  65. const char *name;
  66. } board_info[] __devinitdata = {
  67. { "TOSHIBA TC35815CF 10/100BaseTX" },
  68. { "TOSHIBA TC35815 with Wake on LAN" },
  69. { "TOSHIBA TC35815/TX4939" },
  70. };
  71. static const struct pci_device_id tc35815_pci_tbl[] = {
  72. {PCI_DEVICE(PCI_VENDOR_ID_TOSHIBA_2, PCI_DEVICE_ID_TOSHIBA_TC35815CF), .driver_data = TC35815CF },
  73. {PCI_DEVICE(PCI_VENDOR_ID_TOSHIBA_2, PCI_DEVICE_ID_TOSHIBA_TC35815_NWU), .driver_data = TC35815_NWU },
  74. {PCI_DEVICE(PCI_VENDOR_ID_TOSHIBA_2, PCI_DEVICE_ID_TOSHIBA_TC35815_TX4939), .driver_data = TC35815_TX4939 },
  75. {0,}
  76. };
  77. MODULE_DEVICE_TABLE (pci, tc35815_pci_tbl);
  78. /* see MODULE_PARM_DESC */
  79. static struct tc35815_options {
  80. int speed;
  81. int duplex;
  82. int doforce;
  83. } options;
  84. /*
  85. * Registers
  86. */
  87. struct tc35815_regs {
  88. volatile __u32 DMA_Ctl; /* 0x00 */
  89. volatile __u32 TxFrmPtr;
  90. volatile __u32 TxThrsh;
  91. volatile __u32 TxPollCtr;
  92. volatile __u32 BLFrmPtr;
  93. volatile __u32 RxFragSize;
  94. volatile __u32 Int_En;
  95. volatile __u32 FDA_Bas;
  96. volatile __u32 FDA_Lim; /* 0x20 */
  97. volatile __u32 Int_Src;
  98. volatile __u32 unused0[2];
  99. volatile __u32 PauseCnt;
  100. volatile __u32 RemPauCnt;
  101. volatile __u32 TxCtlFrmStat;
  102. volatile __u32 unused1;
  103. volatile __u32 MAC_Ctl; /* 0x40 */
  104. volatile __u32 CAM_Ctl;
  105. volatile __u32 Tx_Ctl;
  106. volatile __u32 Tx_Stat;
  107. volatile __u32 Rx_Ctl;
  108. volatile __u32 Rx_Stat;
  109. volatile __u32 MD_Data;
  110. volatile __u32 MD_CA;
  111. volatile __u32 CAM_Adr; /* 0x60 */
  112. volatile __u32 CAM_Data;
  113. volatile __u32 CAM_Ena;
  114. volatile __u32 PROM_Ctl;
  115. volatile __u32 PROM_Data;
  116. volatile __u32 Algn_Cnt;
  117. volatile __u32 CRC_Cnt;
  118. volatile __u32 Miss_Cnt;
  119. };
  120. /*
  121. * Bit assignments
  122. */
  123. /* DMA_Ctl bit asign ------------------------------------------------------- */
  124. #define DMA_RxAlign 0x00c00000 /* 1:Reception Alignment */
  125. #define DMA_RxAlign_1 0x00400000
  126. #define DMA_RxAlign_2 0x00800000
  127. #define DMA_RxAlign_3 0x00c00000
  128. #define DMA_M66EnStat 0x00080000 /* 1:66MHz Enable State */
  129. #define DMA_IntMask 0x00040000 /* 1:Interupt mask */
  130. #define DMA_SWIntReq 0x00020000 /* 1:Software Interrupt request */
  131. #define DMA_TxWakeUp 0x00010000 /* 1:Transmit Wake Up */
  132. #define DMA_RxBigE 0x00008000 /* 1:Receive Big Endian */
  133. #define DMA_TxBigE 0x00004000 /* 1:Transmit Big Endian */
  134. #define DMA_TestMode 0x00002000 /* 1:Test Mode */
  135. #define DMA_PowrMgmnt 0x00001000 /* 1:Power Management */
  136. #define DMA_DmBurst_Mask 0x000001fc /* DMA Burst size */
  137. /* RxFragSize bit asign ---------------------------------------------------- */
  138. #define RxFrag_EnPack 0x00008000 /* 1:Enable Packing */
  139. #define RxFrag_MinFragMask 0x00000ffc /* Minimum Fragment */
  140. /* MAC_Ctl bit asign ------------------------------------------------------- */
  141. #define MAC_Link10 0x00008000 /* 1:Link Status 10Mbits */
  142. #define MAC_EnMissRoll 0x00002000 /* 1:Enable Missed Roll */
  143. #define MAC_MissRoll 0x00000400 /* 1:Missed Roll */
  144. #define MAC_Loop10 0x00000080 /* 1:Loop 10 Mbps */
  145. #define MAC_Conn_Auto 0x00000000 /*00:Connection mode (Automatic) */
  146. #define MAC_Conn_10M 0x00000020 /*01: (10Mbps endec)*/
  147. #define MAC_Conn_Mll 0x00000040 /*10: (Mll clock) */
  148. #define MAC_MacLoop 0x00000010 /* 1:MAC Loopback */
  149. #define MAC_FullDup 0x00000008 /* 1:Full Duplex 0:Half Duplex */
  150. #define MAC_Reset 0x00000004 /* 1:Software Reset */
  151. #define MAC_HaltImm 0x00000002 /* 1:Halt Immediate */
  152. #define MAC_HaltReq 0x00000001 /* 1:Halt request */
  153. /* PROM_Ctl bit asign ------------------------------------------------------ */
  154. #define PROM_Busy 0x00008000 /* 1:Busy (Start Operation) */
  155. #define PROM_Read 0x00004000 /*10:Read operation */
  156. #define PROM_Write 0x00002000 /*01:Write operation */
  157. #define PROM_Erase 0x00006000 /*11:Erase operation */
  158. /*00:Enable or Disable Writting, */
  159. /* as specified in PROM_Addr. */
  160. #define PROM_Addr_Ena 0x00000030 /*11xxxx:PROM Write enable */
  161. /*00xxxx: disable */
  162. /* CAM_Ctl bit asign ------------------------------------------------------- */
  163. #define CAM_CompEn 0x00000010 /* 1:CAM Compare Enable */
  164. #define CAM_NegCAM 0x00000008 /* 1:Reject packets CAM recognizes,*/
  165. /* accept other */
  166. #define CAM_BroadAcc 0x00000004 /* 1:Broadcast assept */
  167. #define CAM_GroupAcc 0x00000002 /* 1:Multicast assept */
  168. #define CAM_StationAcc 0x00000001 /* 1:unicast accept */
  169. /* CAM_Ena bit asign ------------------------------------------------------- */
  170. #define CAM_ENTRY_MAX 21 /* CAM Data entry max count */
  171. #define CAM_Ena_Mask ((1<<CAM_ENTRY_MAX)-1) /* CAM Enable bits (Max 21bits) */
  172. #define CAM_Ena_Bit(index) (1<<(index))
  173. #define CAM_ENTRY_DESTINATION 0
  174. #define CAM_ENTRY_SOURCE 1
  175. #define CAM_ENTRY_MACCTL 20
  176. /* Tx_Ctl bit asign -------------------------------------------------------- */
  177. #define Tx_En 0x00000001 /* 1:Transmit enable */
  178. #define Tx_TxHalt 0x00000002 /* 1:Transmit Halt Request */
  179. #define Tx_NoPad 0x00000004 /* 1:Suppress Padding */
  180. #define Tx_NoCRC 0x00000008 /* 1:Suppress Padding */
  181. #define Tx_FBack 0x00000010 /* 1:Fast Back-off */
  182. #define Tx_EnUnder 0x00000100 /* 1:Enable Underrun */
  183. #define Tx_EnExDefer 0x00000200 /* 1:Enable Excessive Deferral */
  184. #define Tx_EnLCarr 0x00000400 /* 1:Enable Lost Carrier */
  185. #define Tx_EnExColl 0x00000800 /* 1:Enable Excessive Collision */
  186. #define Tx_EnLateColl 0x00001000 /* 1:Enable Late Collision */
  187. #define Tx_EnTxPar 0x00002000 /* 1:Enable Transmit Parity */
  188. #define Tx_EnComp 0x00004000 /* 1:Enable Completion */
  189. /* Tx_Stat bit asign ------------------------------------------------------- */
  190. #define Tx_TxColl_MASK 0x0000000F /* Tx Collision Count */
  191. #define Tx_ExColl 0x00000010 /* Excessive Collision */
  192. #define Tx_TXDefer 0x00000020 /* Transmit Defered */
  193. #define Tx_Paused 0x00000040 /* Transmit Paused */
  194. #define Tx_IntTx 0x00000080 /* Interrupt on Tx */
  195. #define Tx_Under 0x00000100 /* Underrun */
  196. #define Tx_Defer 0x00000200 /* Deferral */
  197. #define Tx_NCarr 0x00000400 /* No Carrier */
  198. #define Tx_10Stat 0x00000800 /* 10Mbps Status */
  199. #define Tx_LateColl 0x00001000 /* Late Collision */
  200. #define Tx_TxPar 0x00002000 /* Tx Parity Error */
  201. #define Tx_Comp 0x00004000 /* Completion */
  202. #define Tx_Halted 0x00008000 /* Tx Halted */
  203. #define Tx_SQErr 0x00010000 /* Signal Quality Error(SQE) */
  204. /* Rx_Ctl bit asign -------------------------------------------------------- */
  205. #define Rx_EnGood 0x00004000 /* 1:Enable Good */
  206. #define Rx_EnRxPar 0x00002000 /* 1:Enable Receive Parity */
  207. #define Rx_EnLongErr 0x00000800 /* 1:Enable Long Error */
  208. #define Rx_EnOver 0x00000400 /* 1:Enable OverFlow */
  209. #define Rx_EnCRCErr 0x00000200 /* 1:Enable CRC Error */
  210. #define Rx_EnAlign 0x00000100 /* 1:Enable Alignment */
  211. #define Rx_IgnoreCRC 0x00000040 /* 1:Ignore CRC Value */
  212. #define Rx_StripCRC 0x00000010 /* 1:Strip CRC Value */
  213. #define Rx_ShortEn 0x00000008 /* 1:Short Enable */
  214. #define Rx_LongEn 0x00000004 /* 1:Long Enable */
  215. #define Rx_RxHalt 0x00000002 /* 1:Receive Halt Request */
  216. #define Rx_RxEn 0x00000001 /* 1:Receive Intrrupt Enable */
  217. /* Rx_Stat bit asign ------------------------------------------------------- */
  218. #define Rx_Halted 0x00008000 /* Rx Halted */
  219. #define Rx_Good 0x00004000 /* Rx Good */
  220. #define Rx_RxPar 0x00002000 /* Rx Parity Error */
  221. /* 0x00001000 not use */
  222. #define Rx_LongErr 0x00000800 /* Rx Long Error */
  223. #define Rx_Over 0x00000400 /* Rx Overflow */
  224. #define Rx_CRCErr 0x00000200 /* Rx CRC Error */
  225. #define Rx_Align 0x00000100 /* Rx Alignment Error */
  226. #define Rx_10Stat 0x00000080 /* Rx 10Mbps Status */
  227. #define Rx_IntRx 0x00000040 /* Rx Interrupt */
  228. #define Rx_CtlRecd 0x00000020 /* Rx Control Receive */
  229. #define Rx_Stat_Mask 0x0000EFC0 /* Rx All Status Mask */
  230. /* Int_En bit asign -------------------------------------------------------- */
  231. #define Int_NRAbtEn 0x00000800 /* 1:Non-recoverable Abort Enable */
  232. #define Int_TxCtlCmpEn 0x00000400 /* 1:Transmit Control Complete Enable */
  233. #define Int_DmParErrEn 0x00000200 /* 1:DMA Parity Error Enable */
  234. #define Int_DParDEn 0x00000100 /* 1:Data Parity Error Enable */
  235. #define Int_EarNotEn 0x00000080 /* 1:Early Notify Enable */
  236. #define Int_DParErrEn 0x00000040 /* 1:Detected Parity Error Enable */
  237. #define Int_SSysErrEn 0x00000020 /* 1:Signalled System Error Enable */
  238. #define Int_RMasAbtEn 0x00000010 /* 1:Received Master Abort Enable */
  239. #define Int_RTargAbtEn 0x00000008 /* 1:Received Target Abort Enable */
  240. #define Int_STargAbtEn 0x00000004 /* 1:Signalled Target Abort Enable */
  241. #define Int_BLExEn 0x00000002 /* 1:Buffer List Exhausted Enable */
  242. #define Int_FDAExEn 0x00000001 /* 1:Free Descriptor Area */
  243. /* Exhausted Enable */
  244. /* Int_Src bit asign ------------------------------------------------------- */
  245. #define Int_NRabt 0x00004000 /* 1:Non Recoverable error */
  246. #define Int_DmParErrStat 0x00002000 /* 1:DMA Parity Error & Clear */
  247. #define Int_BLEx 0x00001000 /* 1:Buffer List Empty & Clear */
  248. #define Int_FDAEx 0x00000800 /* 1:FDA Empty & Clear */
  249. #define Int_IntNRAbt 0x00000400 /* 1:Non Recoverable Abort */
  250. #define Int_IntCmp 0x00000200 /* 1:MAC control packet complete */
  251. #define Int_IntExBD 0x00000100 /* 1:Interrupt Extra BD & Clear */
  252. #define Int_DmParErr 0x00000080 /* 1:DMA Parity Error & Clear */
  253. #define Int_IntEarNot 0x00000040 /* 1:Receive Data write & Clear */
  254. #define Int_SWInt 0x00000020 /* 1:Software request & Clear */
  255. #define Int_IntBLEx 0x00000010 /* 1:Buffer List Empty & Clear */
  256. #define Int_IntFDAEx 0x00000008 /* 1:FDA Empty & Clear */
  257. #define Int_IntPCI 0x00000004 /* 1:PCI controller & Clear */
  258. #define Int_IntMacRx 0x00000002 /* 1:Rx controller & Clear */
  259. #define Int_IntMacTx 0x00000001 /* 1:Tx controller & Clear */
  260. /* MD_CA bit asign --------------------------------------------------------- */
  261. #define MD_CA_PreSup 0x00001000 /* 1:Preamble Supress */
  262. #define MD_CA_Busy 0x00000800 /* 1:Busy (Start Operation) */
  263. #define MD_CA_Wr 0x00000400 /* 1:Write 0:Read */
  264. /*
  265. * Descriptors
  266. */
  267. /* Frame descripter */
  268. struct FDesc {
  269. volatile __u32 FDNext;
  270. volatile __u32 FDSystem;
  271. volatile __u32 FDStat;
  272. volatile __u32 FDCtl;
  273. };
  274. /* Buffer descripter */
  275. struct BDesc {
  276. volatile __u32 BuffData;
  277. volatile __u32 BDCtl;
  278. };
  279. #define FD_ALIGN 16
  280. /* Frame Descripter bit asign ---------------------------------------------- */
  281. #define FD_FDLength_MASK 0x0000FFFF /* Length MASK */
  282. #define FD_BDCnt_MASK 0x001F0000 /* BD count MASK in FD */
  283. #define FD_FrmOpt_MASK 0x7C000000 /* Frame option MASK */
  284. #define FD_FrmOpt_BigEndian 0x40000000 /* Tx/Rx */
  285. #define FD_FrmOpt_IntTx 0x20000000 /* Tx only */
  286. #define FD_FrmOpt_NoCRC 0x10000000 /* Tx only */
  287. #define FD_FrmOpt_NoPadding 0x08000000 /* Tx only */
  288. #define FD_FrmOpt_Packing 0x04000000 /* Rx only */
  289. #define FD_CownsFD 0x80000000 /* FD Controller owner bit */
  290. #define FD_Next_EOL 0x00000001 /* FD EOL indicator */
  291. #define FD_BDCnt_SHIFT 16
  292. /* Buffer Descripter bit asign --------------------------------------------- */
  293. #define BD_BuffLength_MASK 0x0000FFFF /* Recieve Data Size */
  294. #define BD_RxBDID_MASK 0x00FF0000 /* BD ID Number MASK */
  295. #define BD_RxBDSeqN_MASK 0x7F000000 /* Rx BD Sequence Number */
  296. #define BD_CownsBD 0x80000000 /* BD Controller owner bit */
  297. #define BD_RxBDID_SHIFT 16
  298. #define BD_RxBDSeqN_SHIFT 24
  299. /* Some useful constants. */
  300. #undef NO_CHECK_CARRIER /* Does not check No-Carrier with TP */
  301. #ifdef NO_CHECK_CARRIER
  302. #define TX_CTL_CMD (Tx_EnComp | Tx_EnTxPar | Tx_EnLateColl | \
  303. Tx_EnExColl | Tx_EnExDefer | Tx_EnUnder | \
  304. Tx_En) /* maybe 0x7b01 */
  305. #else
  306. #define TX_CTL_CMD (Tx_EnComp | Tx_EnTxPar | Tx_EnLateColl | \
  307. Tx_EnExColl | Tx_EnLCarr | Tx_EnExDefer | Tx_EnUnder | \
  308. Tx_En) /* maybe 0x7b01 */
  309. #endif
  310. #define RX_CTL_CMD (Rx_EnGood | Rx_EnRxPar | Rx_EnLongErr | Rx_EnOver \
  311. | Rx_EnCRCErr | Rx_EnAlign | Rx_RxEn) /* maybe 0x6f01 */
  312. #define INT_EN_CMD (Int_NRAbtEn | \
  313. Int_DmParErrEn | Int_DParDEn | Int_DParErrEn | \
  314. Int_SSysErrEn | Int_RMasAbtEn | Int_RTargAbtEn | \
  315. Int_STargAbtEn | \
  316. Int_BLExEn | Int_FDAExEn) /* maybe 0xb7f*/
  317. #define DMA_CTL_CMD DMA_BURST_SIZE
  318. #define HAVE_DMA_RXALIGN(lp) likely((lp)->boardtype != TC35815CF)
  319. /* Tuning parameters */
  320. #define DMA_BURST_SIZE 32
  321. #define TX_THRESHOLD 1024
  322. #define TX_THRESHOLD_MAX 1536 /* used threshold with packet max byte for low pci transfer ability.*/
  323. #define TX_THRESHOLD_KEEP_LIMIT 10 /* setting threshold max value when overrun error occured this count. */
  324. /* 16 + RX_BUF_NUM * 8 + RX_FD_NUM * 16 + TX_FD_NUM * 32 <= PAGE_SIZE*FD_PAGE_NUM */
  325. #ifdef TC35815_USE_PACKEDBUFFER
  326. #define FD_PAGE_NUM 2
  327. #define RX_BUF_NUM 8 /* >= 2 */
  328. #define RX_FD_NUM 250 /* >= 32 */
  329. #define TX_FD_NUM 128
  330. #define RX_BUF_SIZE PAGE_SIZE
  331. #else /* TC35815_USE_PACKEDBUFFER */
  332. #define FD_PAGE_NUM 4
  333. #define RX_BUF_NUM 128 /* < 256 */
  334. #define RX_FD_NUM 256 /* >= 32 */
  335. #define TX_FD_NUM 128
  336. #if RX_CTL_CMD & Rx_LongEn
  337. #define RX_BUF_SIZE PAGE_SIZE
  338. #elif RX_CTL_CMD & Rx_StripCRC
  339. #define RX_BUF_SIZE ALIGN(ETH_FRAME_LEN + 4 + 2, 32) /* +2: reserve */
  340. #else
  341. #define RX_BUF_SIZE ALIGN(ETH_FRAME_LEN + 2, 32) /* +2: reserve */
  342. #endif
  343. #endif /* TC35815_USE_PACKEDBUFFER */
  344. #define RX_FD_RESERVE (2 / 2) /* max 2 BD per RxFD */
  345. #define NAPI_WEIGHT 16
  346. struct TxFD {
  347. struct FDesc fd;
  348. struct BDesc bd;
  349. struct BDesc unused;
  350. };
  351. struct RxFD {
  352. struct FDesc fd;
  353. struct BDesc bd[0]; /* variable length */
  354. };
  355. struct FrFD {
  356. struct FDesc fd;
  357. struct BDesc bd[RX_BUF_NUM];
  358. };
  359. #define tc_readl(addr) readl(addr)
  360. #define tc_writel(d, addr) writel(d, addr)
  361. #define TC35815_TX_TIMEOUT msecs_to_jiffies(400)
  362. /* Timer state engine. */
  363. enum tc35815_timer_state {
  364. arbwait = 0, /* Waiting for auto negotiation to complete. */
  365. lupwait = 1, /* Auto-neg complete, awaiting link-up status. */
  366. ltrywait = 2, /* Forcing try of all modes, from fastest to slowest. */
  367. asleep = 3, /* Time inactive. */
  368. lcheck = 4, /* Check link status. */
  369. };
  370. /* Information that need to be kept for each board. */
  371. struct tc35815_local {
  372. struct pci_dev *pci_dev;
  373. struct net_device *dev;
  374. struct napi_struct napi;
  375. /* statistics */
  376. struct net_device_stats stats;
  377. struct {
  378. int max_tx_qlen;
  379. int tx_ints;
  380. int rx_ints;
  381. int tx_underrun;
  382. } lstats;
  383. /* Tx control lock. This protects the transmit buffer ring
  384. * state along with the "tx full" state of the driver. This
  385. * means all netif_queue flow control actions are protected
  386. * by this lock as well.
  387. */
  388. spinlock_t lock;
  389. int phy_addr;
  390. int fullduplex;
  391. unsigned short saved_lpa;
  392. struct timer_list timer;
  393. enum tc35815_timer_state timer_state; /* State of auto-neg timer. */
  394. unsigned int timer_ticks; /* Number of clicks at each state */
  395. /*
  396. * Transmitting: Batch Mode.
  397. * 1 BD in 1 TxFD.
  398. * Receiving: Packing Mode. (TC35815_USE_PACKEDBUFFER)
  399. * 1 circular FD for Free Buffer List.
  400. * RX_BUF_NUM BD in Free Buffer FD.
  401. * One Free Buffer BD has PAGE_SIZE data buffer.
  402. * Or Non-Packing Mode.
  403. * 1 circular FD for Free Buffer List.
  404. * RX_BUF_NUM BD in Free Buffer FD.
  405. * One Free Buffer BD has ETH_FRAME_LEN data buffer.
  406. */
  407. void * fd_buf; /* for TxFD, RxFD, FrFD */
  408. dma_addr_t fd_buf_dma;
  409. struct TxFD *tfd_base;
  410. unsigned int tfd_start;
  411. unsigned int tfd_end;
  412. struct RxFD *rfd_base;
  413. struct RxFD *rfd_limit;
  414. struct RxFD *rfd_cur;
  415. struct FrFD *fbl_ptr;
  416. #ifdef TC35815_USE_PACKEDBUFFER
  417. unsigned char fbl_curid;
  418. void * data_buf[RX_BUF_NUM]; /* packing */
  419. dma_addr_t data_buf_dma[RX_BUF_NUM];
  420. struct {
  421. struct sk_buff *skb;
  422. dma_addr_t skb_dma;
  423. } tx_skbs[TX_FD_NUM];
  424. #else
  425. unsigned int fbl_count;
  426. struct {
  427. struct sk_buff *skb;
  428. dma_addr_t skb_dma;
  429. } tx_skbs[TX_FD_NUM], rx_skbs[RX_BUF_NUM];
  430. #endif
  431. struct mii_if_info mii;
  432. unsigned short mii_id[2];
  433. u32 msg_enable;
  434. board_t boardtype;
  435. };
  436. static inline dma_addr_t fd_virt_to_bus(struct tc35815_local *lp, void *virt)
  437. {
  438. return lp->fd_buf_dma + ((u8 *)virt - (u8 *)lp->fd_buf);
  439. }
  440. #ifdef DEBUG
  441. static inline void *fd_bus_to_virt(struct tc35815_local *lp, dma_addr_t bus)
  442. {
  443. return (void *)((u8 *)lp->fd_buf + (bus - lp->fd_buf_dma));
  444. }
  445. #endif
  446. #ifdef TC35815_USE_PACKEDBUFFER
  447. static inline void *rxbuf_bus_to_virt(struct tc35815_local *lp, dma_addr_t bus)
  448. {
  449. int i;
  450. for (i = 0; i < RX_BUF_NUM; i++) {
  451. if (bus >= lp->data_buf_dma[i] &&
  452. bus < lp->data_buf_dma[i] + PAGE_SIZE)
  453. return (void *)((u8 *)lp->data_buf[i] +
  454. (bus - lp->data_buf_dma[i]));
  455. }
  456. return NULL;
  457. }
  458. #define TC35815_DMA_SYNC_ONDEMAND
  459. static void* alloc_rxbuf_page(struct pci_dev *hwdev, dma_addr_t *dma_handle)
  460. {
  461. #ifdef TC35815_DMA_SYNC_ONDEMAND
  462. void *buf;
  463. /* pci_map + pci_dma_sync will be more effective than
  464. * pci_alloc_consistent on some archs. */
  465. if ((buf = (void *)__get_free_page(GFP_ATOMIC)) == NULL)
  466. return NULL;
  467. *dma_handle = pci_map_single(hwdev, buf, PAGE_SIZE,
  468. PCI_DMA_FROMDEVICE);
  469. if (pci_dma_mapping_error(*dma_handle)) {
  470. free_page((unsigned long)buf);
  471. return NULL;
  472. }
  473. return buf;
  474. #else
  475. return pci_alloc_consistent(hwdev, PAGE_SIZE, dma_handle);
  476. #endif
  477. }
  478. static void free_rxbuf_page(struct pci_dev *hwdev, void *buf, dma_addr_t dma_handle)
  479. {
  480. #ifdef TC35815_DMA_SYNC_ONDEMAND
  481. pci_unmap_single(hwdev, dma_handle, PAGE_SIZE, PCI_DMA_FROMDEVICE);
  482. free_page((unsigned long)buf);
  483. #else
  484. pci_free_consistent(hwdev, PAGE_SIZE, buf, dma_handle);
  485. #endif
  486. }
  487. #else /* TC35815_USE_PACKEDBUFFER */
  488. static struct sk_buff *alloc_rxbuf_skb(struct net_device *dev,
  489. struct pci_dev *hwdev,
  490. dma_addr_t *dma_handle)
  491. {
  492. struct sk_buff *skb;
  493. skb = dev_alloc_skb(RX_BUF_SIZE);
  494. if (!skb)
  495. return NULL;
  496. *dma_handle = pci_map_single(hwdev, skb->data, RX_BUF_SIZE,
  497. PCI_DMA_FROMDEVICE);
  498. if (pci_dma_mapping_error(*dma_handle)) {
  499. dev_kfree_skb_any(skb);
  500. return NULL;
  501. }
  502. skb_reserve(skb, 2); /* make IP header 4byte aligned */
  503. return skb;
  504. }
  505. static void free_rxbuf_skb(struct pci_dev *hwdev, struct sk_buff *skb, dma_addr_t dma_handle)
  506. {
  507. pci_unmap_single(hwdev, dma_handle, RX_BUF_SIZE,
  508. PCI_DMA_FROMDEVICE);
  509. dev_kfree_skb_any(skb);
  510. }
  511. #endif /* TC35815_USE_PACKEDBUFFER */
  512. /* Index to functions, as function prototypes. */
  513. static int tc35815_open(struct net_device *dev);
  514. static int tc35815_send_packet(struct sk_buff *skb, struct net_device *dev);
  515. static irqreturn_t tc35815_interrupt(int irq, void *dev_id);
  516. #ifdef TC35815_NAPI
  517. static int tc35815_rx(struct net_device *dev, int limit);
  518. static int tc35815_poll(struct napi_struct *napi, int budget);
  519. #else
  520. static void tc35815_rx(struct net_device *dev);
  521. #endif
  522. static void tc35815_txdone(struct net_device *dev);
  523. static int tc35815_close(struct net_device *dev);
  524. static struct net_device_stats *tc35815_get_stats(struct net_device *dev);
  525. static void tc35815_set_multicast_list(struct net_device *dev);
  526. static void tc35815_tx_timeout(struct net_device *dev);
  527. static int tc35815_ioctl(struct net_device *dev, struct ifreq *rq, int cmd);
  528. #ifdef CONFIG_NET_POLL_CONTROLLER
  529. static void tc35815_poll_controller(struct net_device *dev);
  530. #endif
  531. static const struct ethtool_ops tc35815_ethtool_ops;
  532. /* Example routines you must write ;->. */
  533. static void tc35815_chip_reset(struct net_device *dev);
  534. static void tc35815_chip_init(struct net_device *dev);
  535. static void tc35815_find_phy(struct net_device *dev);
  536. static void tc35815_phy_chip_init(struct net_device *dev);
  537. #ifdef DEBUG
  538. static void panic_queues(struct net_device *dev);
  539. #endif
  540. static void tc35815_timer(unsigned long data);
  541. static void tc35815_start_auto_negotiation(struct net_device *dev,
  542. struct ethtool_cmd *ep);
  543. static int tc_mdio_read(struct net_device *dev, int phy_id, int location);
  544. static void tc_mdio_write(struct net_device *dev, int phy_id, int location,
  545. int val);
  546. #ifdef CONFIG_CPU_TX49XX
  547. /*
  548. * Find a platform_device providing a MAC address. The platform code
  549. * should provide a "tc35815-mac" device with a MAC address in its
  550. * platform_data.
  551. */
  552. static int __devinit tc35815_mac_match(struct device *dev, void *data)
  553. {
  554. struct platform_device *plat_dev = to_platform_device(dev);
  555. struct pci_dev *pci_dev = data;
  556. unsigned int id = (pci_dev->bus->number << 8) | pci_dev->devfn;
  557. return !strcmp(plat_dev->name, "tc35815-mac") && plat_dev->id == id;
  558. }
  559. static int __devinit tc35815_read_plat_dev_addr(struct net_device *dev)
  560. {
  561. struct tc35815_local *lp = dev->priv;
  562. struct device *pd = bus_find_device(&platform_bus_type, NULL,
  563. lp->pci_dev, tc35815_mac_match);
  564. if (pd) {
  565. if (pd->platform_data)
  566. memcpy(dev->dev_addr, pd->platform_data, ETH_ALEN);
  567. put_device(pd);
  568. return is_valid_ether_addr(dev->dev_addr) ? 0 : -ENODEV;
  569. }
  570. return -ENODEV;
  571. }
  572. #else
  573. static int __devinit tc35815_read_plat_dev_addr(struct net_device *dev)
  574. {
  575. return -ENODEV;
  576. }
  577. #endif
  578. static int __devinit tc35815_init_dev_addr (struct net_device *dev)
  579. {
  580. struct tc35815_regs __iomem *tr =
  581. (struct tc35815_regs __iomem *)dev->base_addr;
  582. int i;
  583. while (tc_readl(&tr->PROM_Ctl) & PROM_Busy)
  584. ;
  585. for (i = 0; i < 6; i += 2) {
  586. unsigned short data;
  587. tc_writel(PROM_Busy | PROM_Read | (i / 2 + 2), &tr->PROM_Ctl);
  588. while (tc_readl(&tr->PROM_Ctl) & PROM_Busy)
  589. ;
  590. data = tc_readl(&tr->PROM_Data);
  591. dev->dev_addr[i] = data & 0xff;
  592. dev->dev_addr[i+1] = data >> 8;
  593. }
  594. if (!is_valid_ether_addr(dev->dev_addr))
  595. return tc35815_read_plat_dev_addr(dev);
  596. return 0;
  597. }
  598. static int __devinit tc35815_init_one (struct pci_dev *pdev,
  599. const struct pci_device_id *ent)
  600. {
  601. void __iomem *ioaddr = NULL;
  602. struct net_device *dev;
  603. struct tc35815_local *lp;
  604. int rc;
  605. unsigned long mmio_start, mmio_end, mmio_flags, mmio_len;
  606. static int printed_version;
  607. if (!printed_version++) {
  608. printk(version);
  609. dev_printk(KERN_DEBUG, &pdev->dev,
  610. "speed:%d duplex:%d doforce:%d\n",
  611. options.speed, options.duplex, options.doforce);
  612. }
  613. if (!pdev->irq) {
  614. dev_warn(&pdev->dev, "no IRQ assigned.\n");
  615. return -ENODEV;
  616. }
  617. /* dev zeroed in alloc_etherdev */
  618. dev = alloc_etherdev (sizeof (*lp));
  619. if (dev == NULL) {
  620. dev_err(&pdev->dev, "unable to alloc new ethernet\n");
  621. return -ENOMEM;
  622. }
  623. SET_MODULE_OWNER(dev);
  624. SET_NETDEV_DEV(dev, &pdev->dev);
  625. lp = dev->priv;
  626. lp->dev = dev;
  627. /* enable device (incl. PCI PM wakeup), and bus-mastering */
  628. rc = pci_enable_device (pdev);
  629. if (rc)
  630. goto err_out;
  631. mmio_start = pci_resource_start (pdev, 1);
  632. mmio_end = pci_resource_end (pdev, 1);
  633. mmio_flags = pci_resource_flags (pdev, 1);
  634. mmio_len = pci_resource_len (pdev, 1);
  635. /* set this immediately, we need to know before
  636. * we talk to the chip directly */
  637. /* make sure PCI base addr 1 is MMIO */
  638. if (!(mmio_flags & IORESOURCE_MEM)) {
  639. dev_err(&pdev->dev, "region #1 not an MMIO resource, aborting\n");
  640. rc = -ENODEV;
  641. goto err_out;
  642. }
  643. /* check for weird/broken PCI region reporting */
  644. if ((mmio_len < sizeof(struct tc35815_regs))) {
  645. dev_err(&pdev->dev, "Invalid PCI region size(s), aborting\n");
  646. rc = -ENODEV;
  647. goto err_out;
  648. }
  649. rc = pci_request_regions (pdev, MODNAME);
  650. if (rc)
  651. goto err_out;
  652. pci_set_master (pdev);
  653. /* ioremap MMIO region */
  654. ioaddr = ioremap (mmio_start, mmio_len);
  655. if (ioaddr == NULL) {
  656. dev_err(&pdev->dev, "cannot remap MMIO, aborting\n");
  657. rc = -EIO;
  658. goto err_out_free_res;
  659. }
  660. /* Initialize the device structure. */
  661. dev->open = tc35815_open;
  662. dev->hard_start_xmit = tc35815_send_packet;
  663. dev->stop = tc35815_close;
  664. dev->get_stats = tc35815_get_stats;
  665. dev->set_multicast_list = tc35815_set_multicast_list;
  666. dev->do_ioctl = tc35815_ioctl;
  667. dev->ethtool_ops = &tc35815_ethtool_ops;
  668. dev->tx_timeout = tc35815_tx_timeout;
  669. dev->watchdog_timeo = TC35815_TX_TIMEOUT;
  670. #ifdef TC35815_NAPI
  671. netif_napi_add(dev, &lp->napi, tc35815_poll, NAPI_WEIGHT);
  672. #endif
  673. #ifdef CONFIG_NET_POLL_CONTROLLER
  674. dev->poll_controller = tc35815_poll_controller;
  675. #endif
  676. dev->irq = pdev->irq;
  677. dev->base_addr = (unsigned long) ioaddr;
  678. spin_lock_init(&lp->lock);
  679. lp->pci_dev = pdev;
  680. lp->boardtype = ent->driver_data;
  681. lp->msg_enable = NETIF_MSG_TX_ERR | NETIF_MSG_HW | NETIF_MSG_DRV | NETIF_MSG_LINK;
  682. pci_set_drvdata(pdev, dev);
  683. /* Soft reset the chip. */
  684. tc35815_chip_reset(dev);
  685. /* Retrieve the ethernet address. */
  686. if (tc35815_init_dev_addr(dev)) {
  687. dev_warn(&pdev->dev, "not valid ether addr\n");
  688. random_ether_addr(dev->dev_addr);
  689. }
  690. rc = register_netdev (dev);
  691. if (rc)
  692. goto err_out_unmap;
  693. memcpy(dev->perm_addr, dev->dev_addr, dev->addr_len);
  694. printk(KERN_INFO "%s: %s at 0x%lx, "
  695. "%2.2x:%2.2x:%2.2x:%2.2x:%2.2x:%2.2x, "
  696. "IRQ %d\n",
  697. dev->name,
  698. board_info[ent->driver_data].name,
  699. dev->base_addr,
  700. dev->dev_addr[0], dev->dev_addr[1],
  701. dev->dev_addr[2], dev->dev_addr[3],
  702. dev->dev_addr[4], dev->dev_addr[5],
  703. dev->irq);
  704. setup_timer(&lp->timer, tc35815_timer, (unsigned long) dev);
  705. lp->mii.dev = dev;
  706. lp->mii.mdio_read = tc_mdio_read;
  707. lp->mii.mdio_write = tc_mdio_write;
  708. lp->mii.phy_id_mask = 0x1f;
  709. lp->mii.reg_num_mask = 0x1f;
  710. tc35815_find_phy(dev);
  711. lp->mii.phy_id = lp->phy_addr;
  712. lp->mii.full_duplex = 0;
  713. lp->mii.force_media = 0;
  714. return 0;
  715. err_out_unmap:
  716. iounmap(ioaddr);
  717. err_out_free_res:
  718. pci_release_regions (pdev);
  719. err_out:
  720. free_netdev (dev);
  721. return rc;
  722. }
  723. static void __devexit tc35815_remove_one (struct pci_dev *pdev)
  724. {
  725. struct net_device *dev = pci_get_drvdata (pdev);
  726. unsigned long mmio_addr;
  727. mmio_addr = dev->base_addr;
  728. unregister_netdev (dev);
  729. if (mmio_addr) {
  730. iounmap ((void __iomem *)mmio_addr);
  731. pci_release_regions (pdev);
  732. }
  733. free_netdev (dev);
  734. pci_set_drvdata (pdev, NULL);
  735. }
  736. static int
  737. tc35815_init_queues(struct net_device *dev)
  738. {
  739. struct tc35815_local *lp = dev->priv;
  740. int i;
  741. unsigned long fd_addr;
  742. if (!lp->fd_buf) {
  743. BUG_ON(sizeof(struct FDesc) +
  744. sizeof(struct BDesc) * RX_BUF_NUM +
  745. sizeof(struct FDesc) * RX_FD_NUM +
  746. sizeof(struct TxFD) * TX_FD_NUM >
  747. PAGE_SIZE * FD_PAGE_NUM);
  748. if ((lp->fd_buf = pci_alloc_consistent(lp->pci_dev, PAGE_SIZE * FD_PAGE_NUM, &lp->fd_buf_dma)) == 0)
  749. return -ENOMEM;
  750. for (i = 0; i < RX_BUF_NUM; i++) {
  751. #ifdef TC35815_USE_PACKEDBUFFER
  752. if ((lp->data_buf[i] = alloc_rxbuf_page(lp->pci_dev, &lp->data_buf_dma[i])) == NULL) {
  753. while (--i >= 0) {
  754. free_rxbuf_page(lp->pci_dev,
  755. lp->data_buf[i],
  756. lp->data_buf_dma[i]);
  757. lp->data_buf[i] = NULL;
  758. }
  759. pci_free_consistent(lp->pci_dev,
  760. PAGE_SIZE * FD_PAGE_NUM,
  761. lp->fd_buf,
  762. lp->fd_buf_dma);
  763. lp->fd_buf = NULL;
  764. return -ENOMEM;
  765. }
  766. #else
  767. lp->rx_skbs[i].skb =
  768. alloc_rxbuf_skb(dev, lp->pci_dev,
  769. &lp->rx_skbs[i].skb_dma);
  770. if (!lp->rx_skbs[i].skb) {
  771. while (--i >= 0) {
  772. free_rxbuf_skb(lp->pci_dev,
  773. lp->rx_skbs[i].skb,
  774. lp->rx_skbs[i].skb_dma);
  775. lp->rx_skbs[i].skb = NULL;
  776. }
  777. pci_free_consistent(lp->pci_dev,
  778. PAGE_SIZE * FD_PAGE_NUM,
  779. lp->fd_buf,
  780. lp->fd_buf_dma);
  781. lp->fd_buf = NULL;
  782. return -ENOMEM;
  783. }
  784. #endif
  785. }
  786. printk(KERN_DEBUG "%s: FD buf %p DataBuf",
  787. dev->name, lp->fd_buf);
  788. #ifdef TC35815_USE_PACKEDBUFFER
  789. printk(" DataBuf");
  790. for (i = 0; i < RX_BUF_NUM; i++)
  791. printk(" %p", lp->data_buf[i]);
  792. #endif
  793. printk("\n");
  794. } else {
  795. for (i = 0; i < FD_PAGE_NUM; i++) {
  796. clear_page((void *)((unsigned long)lp->fd_buf + i * PAGE_SIZE));
  797. }
  798. }
  799. fd_addr = (unsigned long)lp->fd_buf;
  800. /* Free Descriptors (for Receive) */
  801. lp->rfd_base = (struct RxFD *)fd_addr;
  802. fd_addr += sizeof(struct RxFD) * RX_FD_NUM;
  803. for (i = 0; i < RX_FD_NUM; i++) {
  804. lp->rfd_base[i].fd.FDCtl = cpu_to_le32(FD_CownsFD);
  805. }
  806. lp->rfd_cur = lp->rfd_base;
  807. lp->rfd_limit = (struct RxFD *)fd_addr - (RX_FD_RESERVE + 1);
  808. /* Transmit Descriptors */
  809. lp->tfd_base = (struct TxFD *)fd_addr;
  810. fd_addr += sizeof(struct TxFD) * TX_FD_NUM;
  811. for (i = 0; i < TX_FD_NUM; i++) {
  812. lp->tfd_base[i].fd.FDNext = cpu_to_le32(fd_virt_to_bus(lp, &lp->tfd_base[i+1]));
  813. lp->tfd_base[i].fd.FDSystem = cpu_to_le32(0xffffffff);
  814. lp->tfd_base[i].fd.FDCtl = cpu_to_le32(0);
  815. }
  816. lp->tfd_base[TX_FD_NUM-1].fd.FDNext = cpu_to_le32(fd_virt_to_bus(lp, &lp->tfd_base[0]));
  817. lp->tfd_start = 0;
  818. lp->tfd_end = 0;
  819. /* Buffer List (for Receive) */
  820. lp->fbl_ptr = (struct FrFD *)fd_addr;
  821. lp->fbl_ptr->fd.FDNext = cpu_to_le32(fd_virt_to_bus(lp, lp->fbl_ptr));
  822. lp->fbl_ptr->fd.FDCtl = cpu_to_le32(RX_BUF_NUM | FD_CownsFD);
  823. #ifndef TC35815_USE_PACKEDBUFFER
  824. /*
  825. * move all allocated skbs to head of rx_skbs[] array.
  826. * fbl_count mighe not be RX_BUF_NUM if alloc_rxbuf_skb() in
  827. * tc35815_rx() had failed.
  828. */
  829. lp->fbl_count = 0;
  830. for (i = 0; i < RX_BUF_NUM; i++) {
  831. if (lp->rx_skbs[i].skb) {
  832. if (i != lp->fbl_count) {
  833. lp->rx_skbs[lp->fbl_count].skb =
  834. lp->rx_skbs[i].skb;
  835. lp->rx_skbs[lp->fbl_count].skb_dma =
  836. lp->rx_skbs[i].skb_dma;
  837. }
  838. lp->fbl_count++;
  839. }
  840. }
  841. #endif
  842. for (i = 0; i < RX_BUF_NUM; i++) {
  843. #ifdef TC35815_USE_PACKEDBUFFER
  844. lp->fbl_ptr->bd[i].BuffData = cpu_to_le32(lp->data_buf_dma[i]);
  845. #else
  846. if (i >= lp->fbl_count) {
  847. lp->fbl_ptr->bd[i].BuffData = 0;
  848. lp->fbl_ptr->bd[i].BDCtl = 0;
  849. continue;
  850. }
  851. lp->fbl_ptr->bd[i].BuffData =
  852. cpu_to_le32(lp->rx_skbs[i].skb_dma);
  853. #endif
  854. /* BDID is index of FrFD.bd[] */
  855. lp->fbl_ptr->bd[i].BDCtl =
  856. cpu_to_le32(BD_CownsBD | (i << BD_RxBDID_SHIFT) |
  857. RX_BUF_SIZE);
  858. }
  859. #ifdef TC35815_USE_PACKEDBUFFER
  860. lp->fbl_curid = 0;
  861. #endif
  862. printk(KERN_DEBUG "%s: TxFD %p RxFD %p FrFD %p\n",
  863. dev->name, lp->tfd_base, lp->rfd_base, lp->fbl_ptr);
  864. return 0;
  865. }
  866. static void
  867. tc35815_clear_queues(struct net_device *dev)
  868. {
  869. struct tc35815_local *lp = dev->priv;
  870. int i;
  871. for (i = 0; i < TX_FD_NUM; i++) {
  872. u32 fdsystem = le32_to_cpu(lp->tfd_base[i].fd.FDSystem);
  873. struct sk_buff *skb =
  874. fdsystem != 0xffffffff ?
  875. lp->tx_skbs[fdsystem].skb : NULL;
  876. #ifdef DEBUG
  877. if (lp->tx_skbs[i].skb != skb) {
  878. printk("%s: tx_skbs mismatch(%d).\n", dev->name, i);
  879. panic_queues(dev);
  880. }
  881. #else
  882. BUG_ON(lp->tx_skbs[i].skb != skb);
  883. #endif
  884. if (skb) {
  885. pci_unmap_single(lp->pci_dev, lp->tx_skbs[i].skb_dma, skb->len, PCI_DMA_TODEVICE);
  886. lp->tx_skbs[i].skb = NULL;
  887. lp->tx_skbs[i].skb_dma = 0;
  888. dev_kfree_skb_any(skb);
  889. }
  890. lp->tfd_base[i].fd.FDSystem = cpu_to_le32(0xffffffff);
  891. }
  892. tc35815_init_queues(dev);
  893. }
  894. static void
  895. tc35815_free_queues(struct net_device *dev)
  896. {
  897. struct tc35815_local *lp = dev->priv;
  898. int i;
  899. if (lp->tfd_base) {
  900. for (i = 0; i < TX_FD_NUM; i++) {
  901. u32 fdsystem = le32_to_cpu(lp->tfd_base[i].fd.FDSystem);
  902. struct sk_buff *skb =
  903. fdsystem != 0xffffffff ?
  904. lp->tx_skbs[fdsystem].skb : NULL;
  905. #ifdef DEBUG
  906. if (lp->tx_skbs[i].skb != skb) {
  907. printk("%s: tx_skbs mismatch(%d).\n", dev->name, i);
  908. panic_queues(dev);
  909. }
  910. #else
  911. BUG_ON(lp->tx_skbs[i].skb != skb);
  912. #endif
  913. if (skb) {
  914. dev_kfree_skb(skb);
  915. pci_unmap_single(lp->pci_dev, lp->tx_skbs[i].skb_dma, skb->len, PCI_DMA_TODEVICE);
  916. lp->tx_skbs[i].skb = NULL;
  917. lp->tx_skbs[i].skb_dma = 0;
  918. }
  919. lp->tfd_base[i].fd.FDSystem = cpu_to_le32(0xffffffff);
  920. }
  921. }
  922. lp->rfd_base = NULL;
  923. lp->rfd_limit = NULL;
  924. lp->rfd_cur = NULL;
  925. lp->fbl_ptr = NULL;
  926. for (i = 0; i < RX_BUF_NUM; i++) {
  927. #ifdef TC35815_USE_PACKEDBUFFER
  928. if (lp->data_buf[i]) {
  929. free_rxbuf_page(lp->pci_dev,
  930. lp->data_buf[i], lp->data_buf_dma[i]);
  931. lp->data_buf[i] = NULL;
  932. }
  933. #else
  934. if (lp->rx_skbs[i].skb) {
  935. free_rxbuf_skb(lp->pci_dev, lp->rx_skbs[i].skb,
  936. lp->rx_skbs[i].skb_dma);
  937. lp->rx_skbs[i].skb = NULL;
  938. }
  939. #endif
  940. }
  941. if (lp->fd_buf) {
  942. pci_free_consistent(lp->pci_dev, PAGE_SIZE * FD_PAGE_NUM,
  943. lp->fd_buf, lp->fd_buf_dma);
  944. lp->fd_buf = NULL;
  945. }
  946. }
  947. static void
  948. dump_txfd(struct TxFD *fd)
  949. {
  950. printk("TxFD(%p): %08x %08x %08x %08x\n", fd,
  951. le32_to_cpu(fd->fd.FDNext),
  952. le32_to_cpu(fd->fd.FDSystem),
  953. le32_to_cpu(fd->fd.FDStat),
  954. le32_to_cpu(fd->fd.FDCtl));
  955. printk("BD: ");
  956. printk(" %08x %08x",
  957. le32_to_cpu(fd->bd.BuffData),
  958. le32_to_cpu(fd->bd.BDCtl));
  959. printk("\n");
  960. }
  961. static int
  962. dump_rxfd(struct RxFD *fd)
  963. {
  964. int i, bd_count = (le32_to_cpu(fd->fd.FDCtl) & FD_BDCnt_MASK) >> FD_BDCnt_SHIFT;
  965. if (bd_count > 8)
  966. bd_count = 8;
  967. printk("RxFD(%p): %08x %08x %08x %08x\n", fd,
  968. le32_to_cpu(fd->fd.FDNext),
  969. le32_to_cpu(fd->fd.FDSystem),
  970. le32_to_cpu(fd->fd.FDStat),
  971. le32_to_cpu(fd->fd.FDCtl));
  972. if (le32_to_cpu(fd->fd.FDCtl) & FD_CownsFD)
  973. return 0;
  974. printk("BD: ");
  975. for (i = 0; i < bd_count; i++)
  976. printk(" %08x %08x",
  977. le32_to_cpu(fd->bd[i].BuffData),
  978. le32_to_cpu(fd->bd[i].BDCtl));
  979. printk("\n");
  980. return bd_count;
  981. }
  982. #if defined(DEBUG) || defined(TC35815_USE_PACKEDBUFFER)
  983. static void
  984. dump_frfd(struct FrFD *fd)
  985. {
  986. int i;
  987. printk("FrFD(%p): %08x %08x %08x %08x\n", fd,
  988. le32_to_cpu(fd->fd.FDNext),
  989. le32_to_cpu(fd->fd.FDSystem),
  990. le32_to_cpu(fd->fd.FDStat),
  991. le32_to_cpu(fd->fd.FDCtl));
  992. printk("BD: ");
  993. for (i = 0; i < RX_BUF_NUM; i++)
  994. printk(" %08x %08x",
  995. le32_to_cpu(fd->bd[i].BuffData),
  996. le32_to_cpu(fd->bd[i].BDCtl));
  997. printk("\n");
  998. }
  999. #endif
  1000. #ifdef DEBUG
  1001. static void
  1002. panic_queues(struct net_device *dev)
  1003. {
  1004. struct tc35815_local *lp = dev->priv;
  1005. int i;
  1006. printk("TxFD base %p, start %u, end %u\n",
  1007. lp->tfd_base, lp->tfd_start, lp->tfd_end);
  1008. printk("RxFD base %p limit %p cur %p\n",
  1009. lp->rfd_base, lp->rfd_limit, lp->rfd_cur);
  1010. printk("FrFD %p\n", lp->fbl_ptr);
  1011. for (i = 0; i < TX_FD_NUM; i++)
  1012. dump_txfd(&lp->tfd_base[i]);
  1013. for (i = 0; i < RX_FD_NUM; i++) {
  1014. int bd_count = dump_rxfd(&lp->rfd_base[i]);
  1015. i += (bd_count + 1) / 2; /* skip BDs */
  1016. }
  1017. dump_frfd(lp->fbl_ptr);
  1018. panic("%s: Illegal queue state.", dev->name);
  1019. }
  1020. #endif
  1021. static void print_eth(char *add)
  1022. {
  1023. int i;
  1024. printk("print_eth(%p)\n", add);
  1025. for (i = 0; i < 6; i++)
  1026. printk(" %2.2X", (unsigned char) add[i + 6]);
  1027. printk(" =>");
  1028. for (i = 0; i < 6; i++)
  1029. printk(" %2.2X", (unsigned char) add[i]);
  1030. printk(" : %2.2X%2.2X\n", (unsigned char) add[12], (unsigned char) add[13]);
  1031. }
  1032. static int tc35815_tx_full(struct net_device *dev)
  1033. {
  1034. struct tc35815_local *lp = dev->priv;
  1035. return ((lp->tfd_start + 1) % TX_FD_NUM == lp->tfd_end);
  1036. }
  1037. static void tc35815_restart(struct net_device *dev)
  1038. {
  1039. struct tc35815_local *lp = dev->priv;
  1040. int pid = lp->phy_addr;
  1041. int do_phy_reset = 1;
  1042. del_timer(&lp->timer); /* Kill if running */
  1043. if (lp->mii_id[0] == 0x0016 && (lp->mii_id[1] & 0xfc00) == 0xf800) {
  1044. /* Resetting PHY cause problem on some chip... (SEEQ 80221) */
  1045. do_phy_reset = 0;
  1046. }
  1047. if (do_phy_reset) {
  1048. int timeout;
  1049. tc_mdio_write(dev, pid, MII_BMCR, BMCR_RESET);
  1050. timeout = 100;
  1051. while (--timeout) {
  1052. if (!(tc_mdio_read(dev, pid, MII_BMCR) & BMCR_RESET))
  1053. break;
  1054. udelay(1);
  1055. }
  1056. if (!timeout)
  1057. printk(KERN_ERR "%s: BMCR reset failed.\n", dev->name);
  1058. }
  1059. tc35815_chip_reset(dev);
  1060. tc35815_clear_queues(dev);
  1061. tc35815_chip_init(dev);
  1062. /* Reconfigure CAM again since tc35815_chip_init() initialize it. */
  1063. tc35815_set_multicast_list(dev);
  1064. }
  1065. static void tc35815_tx_timeout(struct net_device *dev)
  1066. {
  1067. struct tc35815_local *lp = dev->priv;
  1068. struct tc35815_regs __iomem *tr =
  1069. (struct tc35815_regs __iomem *)dev->base_addr;
  1070. printk(KERN_WARNING "%s: transmit timed out, status %#x\n",
  1071. dev->name, tc_readl(&tr->Tx_Stat));
  1072. /* Try to restart the adaptor. */
  1073. spin_lock_irq(&lp->lock);
  1074. tc35815_restart(dev);
  1075. spin_unlock_irq(&lp->lock);
  1076. lp->stats.tx_errors++;
  1077. /* If we have space available to accept new transmit
  1078. * requests, wake up the queueing layer. This would
  1079. * be the case if the chipset_init() call above just
  1080. * flushes out the tx queue and empties it.
  1081. *
  1082. * If instead, the tx queue is retained then the
  1083. * netif_wake_queue() call should be placed in the
  1084. * TX completion interrupt handler of the driver instead
  1085. * of here.
  1086. */
  1087. if (!tc35815_tx_full(dev))
  1088. netif_wake_queue(dev);
  1089. }
  1090. /*
  1091. * Open/initialize the board. This is called (in the current kernel)
  1092. * sometime after booting when the 'ifconfig' program is run.
  1093. *
  1094. * This routine should set everything up anew at each open, even
  1095. * registers that "should" only need to be set once at boot, so that
  1096. * there is non-reboot way to recover if something goes wrong.
  1097. */
  1098. static int
  1099. tc35815_open(struct net_device *dev)
  1100. {
  1101. struct tc35815_local *lp = dev->priv;
  1102. /*
  1103. * This is used if the interrupt line can turned off (shared).
  1104. * See 3c503.c for an example of selecting the IRQ at config-time.
  1105. */
  1106. if (request_irq(dev->irq, &tc35815_interrupt, IRQF_SHARED, dev->name, dev)) {
  1107. return -EAGAIN;
  1108. }
  1109. del_timer(&lp->timer); /* Kill if running */
  1110. tc35815_chip_reset(dev);
  1111. if (tc35815_init_queues(dev) != 0) {
  1112. free_irq(dev->irq, dev);
  1113. return -EAGAIN;
  1114. }
  1115. #ifdef TC35815_NAPI
  1116. napi_enable(&lp->napi);
  1117. #endif
  1118. /* Reset the hardware here. Don't forget to set the station address. */
  1119. spin_lock_irq(&lp->lock);
  1120. tc35815_chip_init(dev);
  1121. spin_unlock_irq(&lp->lock);
  1122. /* We are now ready to accept transmit requeusts from
  1123. * the queueing layer of the networking.
  1124. */
  1125. netif_start_queue(dev);
  1126. return 0;
  1127. }
  1128. /* This will only be invoked if your driver is _not_ in XOFF state.
  1129. * What this means is that you need not check it, and that this
  1130. * invariant will hold if you make sure that the netif_*_queue()
  1131. * calls are done at the proper times.
  1132. */
  1133. static int tc35815_send_packet(struct sk_buff *skb, struct net_device *dev)
  1134. {
  1135. struct tc35815_local *lp = dev->priv;
  1136. struct TxFD *txfd;
  1137. unsigned long flags;
  1138. /* If some error occurs while trying to transmit this
  1139. * packet, you should return '1' from this function.
  1140. * In such a case you _may not_ do anything to the
  1141. * SKB, it is still owned by the network queueing
  1142. * layer when an error is returned. This means you
  1143. * may not modify any SKB fields, you may not free
  1144. * the SKB, etc.
  1145. */
  1146. /* This is the most common case for modern hardware.
  1147. * The spinlock protects this code from the TX complete
  1148. * hardware interrupt handler. Queue flow control is
  1149. * thus managed under this lock as well.
  1150. */
  1151. spin_lock_irqsave(&lp->lock, flags);
  1152. /* failsafe... (handle txdone now if half of FDs are used) */
  1153. if ((lp->tfd_start + TX_FD_NUM - lp->tfd_end) % TX_FD_NUM >
  1154. TX_FD_NUM / 2)
  1155. tc35815_txdone(dev);
  1156. if (netif_msg_pktdata(lp))
  1157. print_eth(skb->data);
  1158. #ifdef DEBUG
  1159. if (lp->tx_skbs[lp->tfd_start].skb) {
  1160. printk("%s: tx_skbs conflict.\n", dev->name);
  1161. panic_queues(dev);
  1162. }
  1163. #else
  1164. BUG_ON(lp->tx_skbs[lp->tfd_start].skb);
  1165. #endif
  1166. lp->tx_skbs[lp->tfd_start].skb = skb;
  1167. lp->tx_skbs[lp->tfd_start].skb_dma = pci_map_single(lp->pci_dev, skb->data, skb->len, PCI_DMA_TODEVICE);
  1168. /*add to ring */
  1169. txfd = &lp->tfd_base[lp->tfd_start];
  1170. txfd->bd.BuffData = cpu_to_le32(lp->tx_skbs[lp->tfd_start].skb_dma);
  1171. txfd->bd.BDCtl = cpu_to_le32(skb->len);
  1172. txfd->fd.FDSystem = cpu_to_le32(lp->tfd_start);
  1173. txfd->fd.FDCtl = cpu_to_le32(FD_CownsFD | (1 << FD_BDCnt_SHIFT));
  1174. if (lp->tfd_start == lp->tfd_end) {
  1175. struct tc35815_regs __iomem *tr =
  1176. (struct tc35815_regs __iomem *)dev->base_addr;
  1177. /* Start DMA Transmitter. */
  1178. txfd->fd.FDNext |= cpu_to_le32(FD_Next_EOL);
  1179. #ifdef GATHER_TXINT
  1180. txfd->fd.FDCtl |= cpu_to_le32(FD_FrmOpt_IntTx);
  1181. #endif
  1182. if (netif_msg_tx_queued(lp)) {
  1183. printk("%s: starting TxFD.\n", dev->name);
  1184. dump_txfd(txfd);
  1185. }
  1186. tc_writel(fd_virt_to_bus(lp, txfd), &tr->TxFrmPtr);
  1187. } else {
  1188. txfd->fd.FDNext &= cpu_to_le32(~FD_Next_EOL);
  1189. if (netif_msg_tx_queued(lp)) {
  1190. printk("%s: queueing TxFD.\n", dev->name);
  1191. dump_txfd(txfd);
  1192. }
  1193. }
  1194. lp->tfd_start = (lp->tfd_start + 1) % TX_FD_NUM;
  1195. dev->trans_start = jiffies;
  1196. /* If we just used up the very last entry in the
  1197. * TX ring on this device, tell the queueing
  1198. * layer to send no more.
  1199. */
  1200. if (tc35815_tx_full(dev)) {
  1201. if (netif_msg_tx_queued(lp))
  1202. printk(KERN_WARNING "%s: TxFD Exhausted.\n", dev->name);
  1203. netif_stop_queue(dev);
  1204. }
  1205. /* When the TX completion hw interrupt arrives, this
  1206. * is when the transmit statistics are updated.
  1207. */
  1208. spin_unlock_irqrestore(&lp->lock, flags);
  1209. return 0;
  1210. }
  1211. #define FATAL_ERROR_INT \
  1212. (Int_IntPCI | Int_DmParErr | Int_IntNRAbt)
  1213. static void tc35815_fatal_error_interrupt(struct net_device *dev, u32 status)
  1214. {
  1215. static int count;
  1216. printk(KERN_WARNING "%s: Fatal Error Intterrupt (%#x):",
  1217. dev->name, status);
  1218. if (status & Int_IntPCI)
  1219. printk(" IntPCI");
  1220. if (status & Int_DmParErr)
  1221. printk(" DmParErr");
  1222. if (status & Int_IntNRAbt)
  1223. printk(" IntNRAbt");
  1224. printk("\n");
  1225. if (count++ > 100)
  1226. panic("%s: Too many fatal errors.", dev->name);
  1227. printk(KERN_WARNING "%s: Resetting ...\n", dev->name);
  1228. /* Try to restart the adaptor. */
  1229. tc35815_restart(dev);
  1230. }
  1231. #ifdef TC35815_NAPI
  1232. static int tc35815_do_interrupt(struct net_device *dev, u32 status, int limit)
  1233. #else
  1234. static int tc35815_do_interrupt(struct net_device *dev, u32 status)
  1235. #endif
  1236. {
  1237. struct tc35815_local *lp = dev->priv;
  1238. struct tc35815_regs __iomem *tr =
  1239. (struct tc35815_regs __iomem *)dev->base_addr;
  1240. int ret = -1;
  1241. /* Fatal errors... */
  1242. if (status & FATAL_ERROR_INT) {
  1243. tc35815_fatal_error_interrupt(dev, status);
  1244. return 0;
  1245. }
  1246. /* recoverable errors */
  1247. if (status & Int_IntFDAEx) {
  1248. /* disable FDAEx int. (until we make rooms...) */
  1249. tc_writel(tc_readl(&tr->Int_En) & ~Int_FDAExEn, &tr->Int_En);
  1250. printk(KERN_WARNING
  1251. "%s: Free Descriptor Area Exhausted (%#x).\n",
  1252. dev->name, status);
  1253. lp->stats.rx_dropped++;
  1254. ret = 0;
  1255. }
  1256. if (status & Int_IntBLEx) {
  1257. /* disable BLEx int. (until we make rooms...) */
  1258. tc_writel(tc_readl(&tr->Int_En) & ~Int_BLExEn, &tr->Int_En);
  1259. printk(KERN_WARNING
  1260. "%s: Buffer List Exhausted (%#x).\n",
  1261. dev->name, status);
  1262. lp->stats.rx_dropped++;
  1263. ret = 0;
  1264. }
  1265. if (status & Int_IntExBD) {
  1266. printk(KERN_WARNING
  1267. "%s: Excessive Buffer Descriptiors (%#x).\n",
  1268. dev->name, status);
  1269. lp->stats.rx_length_errors++;
  1270. ret = 0;
  1271. }
  1272. /* normal notification */
  1273. if (status & Int_IntMacRx) {
  1274. /* Got a packet(s). */
  1275. #ifdef TC35815_NAPI
  1276. ret = tc35815_rx(dev, limit);
  1277. #else
  1278. tc35815_rx(dev);
  1279. ret = 0;
  1280. #endif
  1281. lp->lstats.rx_ints++;
  1282. }
  1283. if (status & Int_IntMacTx) {
  1284. /* Transmit complete. */
  1285. lp->lstats.tx_ints++;
  1286. tc35815_txdone(dev);
  1287. netif_wake_queue(dev);
  1288. ret = 0;
  1289. }
  1290. return ret;
  1291. }
  1292. /*
  1293. * The typical workload of the driver:
  1294. * Handle the network interface interrupts.
  1295. */
  1296. static irqreturn_t tc35815_interrupt(int irq, void *dev_id)
  1297. {
  1298. struct net_device *dev = dev_id;
  1299. struct tc35815_local *lp = netdev_priv(dev);
  1300. struct tc35815_regs __iomem *tr =
  1301. (struct tc35815_regs __iomem *)dev->base_addr;
  1302. #ifdef TC35815_NAPI
  1303. u32 dmactl = tc_readl(&tr->DMA_Ctl);
  1304. if (!(dmactl & DMA_IntMask)) {
  1305. /* disable interrupts */
  1306. tc_writel(dmactl | DMA_IntMask, &tr->DMA_Ctl);
  1307. if (netif_rx_schedule_prep(dev, &lp->napi))
  1308. __netif_rx_schedule(dev, &lp->napi);
  1309. else {
  1310. printk(KERN_ERR "%s: interrupt taken in poll\n",
  1311. dev->name);
  1312. BUG();
  1313. }
  1314. (void)tc_readl(&tr->Int_Src); /* flush */
  1315. return IRQ_HANDLED;
  1316. }
  1317. return IRQ_NONE;
  1318. #else
  1319. struct tc35815_local *lp = dev->priv;
  1320. int handled;
  1321. u32 status;
  1322. spin_lock(&lp->lock);
  1323. status = tc_readl(&tr->Int_Src);
  1324. tc_writel(status, &tr->Int_Src); /* write to clear */
  1325. handled = tc35815_do_interrupt(dev, status);
  1326. (void)tc_readl(&tr->Int_Src); /* flush */
  1327. spin_unlock(&lp->lock);
  1328. return IRQ_RETVAL(handled >= 0);
  1329. #endif /* TC35815_NAPI */
  1330. }
  1331. #ifdef CONFIG_NET_POLL_CONTROLLER
  1332. static void tc35815_poll_controller(struct net_device *dev)
  1333. {
  1334. disable_irq(dev->irq);
  1335. tc35815_interrupt(dev->irq, dev);
  1336. enable_irq(dev->irq);
  1337. }
  1338. #endif
  1339. /* We have a good packet(s), get it/them out of the buffers. */
  1340. #ifdef TC35815_NAPI
  1341. static int
  1342. tc35815_rx(struct net_device *dev, int limit)
  1343. #else
  1344. static void
  1345. tc35815_rx(struct net_device *dev)
  1346. #endif
  1347. {
  1348. struct tc35815_local *lp = dev->priv;
  1349. unsigned int fdctl;
  1350. int i;
  1351. int buf_free_count = 0;
  1352. int fd_free_count = 0;
  1353. #ifdef TC35815_NAPI
  1354. int received = 0;
  1355. #endif
  1356. while (!((fdctl = le32_to_cpu(lp->rfd_cur->fd.FDCtl)) & FD_CownsFD)) {
  1357. int status = le32_to_cpu(lp->rfd_cur->fd.FDStat);
  1358. int pkt_len = fdctl & FD_FDLength_MASK;
  1359. int bd_count = (fdctl & FD_BDCnt_MASK) >> FD_BDCnt_SHIFT;
  1360. #ifdef DEBUG
  1361. struct RxFD *next_rfd;
  1362. #endif
  1363. #if (RX_CTL_CMD & Rx_StripCRC) == 0
  1364. pkt_len -= 4;
  1365. #endif
  1366. if (netif_msg_rx_status(lp))
  1367. dump_rxfd(lp->rfd_cur);
  1368. if (status & Rx_Good) {
  1369. struct sk_buff *skb;
  1370. unsigned char *data;
  1371. int cur_bd;
  1372. #ifdef TC35815_USE_PACKEDBUFFER
  1373. int offset;
  1374. #endif
  1375. #ifdef TC35815_NAPI
  1376. if (--limit < 0)
  1377. break;
  1378. #endif
  1379. #ifdef TC35815_USE_PACKEDBUFFER
  1380. BUG_ON(bd_count > 2);
  1381. skb = dev_alloc_skb(pkt_len + 2); /* +2: for reserve */
  1382. if (skb == NULL) {
  1383. printk(KERN_NOTICE "%s: Memory squeeze, dropping packet.\n",
  1384. dev->name);
  1385. lp->stats.rx_dropped++;
  1386. break;
  1387. }
  1388. skb_reserve(skb, 2); /* 16 bit alignment */
  1389. data = skb_put(skb, pkt_len);
  1390. /* copy from receive buffer */
  1391. cur_bd = 0;
  1392. offset = 0;
  1393. while (offset < pkt_len && cur_bd < bd_count) {
  1394. int len = le32_to_cpu(lp->rfd_cur->bd[cur_bd].BDCtl) &
  1395. BD_BuffLength_MASK;
  1396. dma_addr_t dma = le32_to_cpu(lp->rfd_cur->bd[cur_bd].BuffData);
  1397. void *rxbuf = rxbuf_bus_to_virt(lp, dma);
  1398. if (offset + len > pkt_len)
  1399. len = pkt_len - offset;
  1400. #ifdef TC35815_DMA_SYNC_ONDEMAND
  1401. pci_dma_sync_single_for_cpu(lp->pci_dev,
  1402. dma, len,
  1403. PCI_DMA_FROMDEVICE);
  1404. #endif
  1405. memcpy(data + offset, rxbuf, len);
  1406. #ifdef TC35815_DMA_SYNC_ONDEMAND
  1407. pci_dma_sync_single_for_device(lp->pci_dev,
  1408. dma, len,
  1409. PCI_DMA_FROMDEVICE);
  1410. #endif
  1411. offset += len;
  1412. cur_bd++;
  1413. }
  1414. #else /* TC35815_USE_PACKEDBUFFER */
  1415. BUG_ON(bd_count > 1);
  1416. cur_bd = (le32_to_cpu(lp->rfd_cur->bd[0].BDCtl)
  1417. & BD_RxBDID_MASK) >> BD_RxBDID_SHIFT;
  1418. #ifdef DEBUG
  1419. if (cur_bd >= RX_BUF_NUM) {
  1420. printk("%s: invalid BDID.\n", dev->name);
  1421. panic_queues(dev);
  1422. }
  1423. BUG_ON(lp->rx_skbs[cur_bd].skb_dma !=
  1424. (le32_to_cpu(lp->rfd_cur->bd[0].BuffData) & ~3));
  1425. if (!lp->rx_skbs[cur_bd].skb) {
  1426. printk("%s: NULL skb.\n", dev->name);
  1427. panic_queues(dev);
  1428. }
  1429. #else
  1430. BUG_ON(cur_bd >= RX_BUF_NUM);
  1431. #endif
  1432. skb = lp->rx_skbs[cur_bd].skb;
  1433. prefetch(skb->data);
  1434. lp->rx_skbs[cur_bd].skb = NULL;
  1435. lp->fbl_count--;
  1436. pci_unmap_single(lp->pci_dev,
  1437. lp->rx_skbs[cur_bd].skb_dma,
  1438. RX_BUF_SIZE, PCI_DMA_FROMDEVICE);
  1439. if (!HAVE_DMA_RXALIGN(lp))
  1440. memmove(skb->data, skb->data - 2, pkt_len);
  1441. data = skb_put(skb, pkt_len);
  1442. #endif /* TC35815_USE_PACKEDBUFFER */
  1443. if (netif_msg_pktdata(lp))
  1444. print_eth(data);
  1445. skb->protocol = eth_type_trans(skb, dev);
  1446. #ifdef TC35815_NAPI
  1447. netif_receive_skb(skb);
  1448. received++;
  1449. #else
  1450. netif_rx(skb);
  1451. #endif
  1452. dev->last_rx = jiffies;
  1453. lp->stats.rx_packets++;
  1454. lp->stats.rx_bytes += pkt_len;
  1455. } else {
  1456. lp->stats.rx_errors++;
  1457. printk(KERN_DEBUG "%s: Rx error (status %x)\n",
  1458. dev->name, status & Rx_Stat_Mask);
  1459. /* WORKAROUND: LongErr and CRCErr means Overflow. */
  1460. if ((status & Rx_LongErr) && (status & Rx_CRCErr)) {
  1461. status &= ~(Rx_LongErr|Rx_CRCErr);
  1462. status |= Rx_Over;
  1463. }
  1464. if (status & Rx_LongErr) lp->stats.rx_length_errors++;
  1465. if (status & Rx_Over) lp->stats.rx_fifo_errors++;
  1466. if (status & Rx_CRCErr) lp->stats.rx_crc_errors++;
  1467. if (status & Rx_Align) lp->stats.rx_frame_errors++;
  1468. }
  1469. if (bd_count > 0) {
  1470. /* put Free Buffer back to controller */
  1471. int bdctl = le32_to_cpu(lp->rfd_cur->bd[bd_count - 1].BDCtl);
  1472. unsigned char id =
  1473. (bdctl & BD_RxBDID_MASK) >> BD_RxBDID_SHIFT;
  1474. #ifdef DEBUG
  1475. if (id >= RX_BUF_NUM) {
  1476. printk("%s: invalid BDID.\n", dev->name);
  1477. panic_queues(dev);
  1478. }
  1479. #else
  1480. BUG_ON(id >= RX_BUF_NUM);
  1481. #endif
  1482. /* free old buffers */
  1483. #ifdef TC35815_USE_PACKEDBUFFER
  1484. while (lp->fbl_curid != id)
  1485. #else
  1486. while (lp->fbl_count < RX_BUF_NUM)
  1487. #endif
  1488. {
  1489. #ifdef TC35815_USE_PACKEDBUFFER
  1490. unsigned char curid = lp->fbl_curid;
  1491. #else
  1492. unsigned char curid =
  1493. (id + 1 + lp->fbl_count) % RX_BUF_NUM;
  1494. #endif
  1495. struct BDesc *bd = &lp->fbl_ptr->bd[curid];
  1496. #ifdef DEBUG
  1497. bdctl = le32_to_cpu(bd->BDCtl);
  1498. if (bdctl & BD_CownsBD) {
  1499. printk("%s: Freeing invalid BD.\n",
  1500. dev->name);
  1501. panic_queues(dev);
  1502. }
  1503. #endif
  1504. /* pass BD to controler */
  1505. #ifndef TC35815_USE_PACKEDBUFFER
  1506. if (!lp->rx_skbs[curid].skb) {
  1507. lp->rx_skbs[curid].skb =
  1508. alloc_rxbuf_skb(dev,
  1509. lp->pci_dev,
  1510. &lp->rx_skbs[curid].skb_dma);
  1511. if (!lp->rx_skbs[curid].skb)
  1512. break; /* try on next reception */
  1513. bd->BuffData = cpu_to_le32(lp->rx_skbs[curid].skb_dma);
  1514. }
  1515. #endif /* TC35815_USE_PACKEDBUFFER */
  1516. /* Note: BDLength was modified by chip. */
  1517. bd->BDCtl = cpu_to_le32(BD_CownsBD |
  1518. (curid << BD_RxBDID_SHIFT) |
  1519. RX_BUF_SIZE);
  1520. #ifdef TC35815_USE_PACKEDBUFFER
  1521. lp->fbl_curid = (curid + 1) % RX_BUF_NUM;
  1522. if (netif_msg_rx_status(lp)) {
  1523. printk("%s: Entering new FBD %d\n",
  1524. dev->name, lp->fbl_curid);
  1525. dump_frfd(lp->fbl_ptr);
  1526. }
  1527. #else
  1528. lp->fbl_count++;
  1529. #endif
  1530. buf_free_count++;
  1531. }
  1532. }
  1533. /* put RxFD back to controller */
  1534. #ifdef DEBUG
  1535. next_rfd = fd_bus_to_virt(lp,
  1536. le32_to_cpu(lp->rfd_cur->fd.FDNext));
  1537. if (next_rfd < lp->rfd_base || next_rfd > lp->rfd_limit) {
  1538. printk("%s: RxFD FDNext invalid.\n", dev->name);
  1539. panic_queues(dev);
  1540. }
  1541. #endif
  1542. for (i = 0; i < (bd_count + 1) / 2 + 1; i++) {
  1543. /* pass FD to controler */
  1544. #ifdef DEBUG
  1545. lp->rfd_cur->fd.FDNext = cpu_to_le32(0xdeaddead);
  1546. #else
  1547. lp->rfd_cur->fd.FDNext = cpu_to_le32(FD_Next_EOL);
  1548. #endif
  1549. lp->rfd_cur->fd.FDCtl = cpu_to_le32(FD_CownsFD);
  1550. lp->rfd_cur++;
  1551. fd_free_count++;
  1552. }
  1553. if (lp->rfd_cur > lp->rfd_limit)
  1554. lp->rfd_cur = lp->rfd_base;
  1555. #ifdef DEBUG
  1556. if (lp->rfd_cur != next_rfd)
  1557. printk("rfd_cur = %p, next_rfd %p\n",
  1558. lp->rfd_cur, next_rfd);
  1559. #endif
  1560. }
  1561. /* re-enable BL/FDA Exhaust interrupts. */
  1562. if (fd_free_count) {
  1563. struct tc35815_regs __iomem *tr =
  1564. (struct tc35815_regs __iomem *)dev->base_addr;
  1565. u32 en, en_old = tc_readl(&tr->Int_En);
  1566. en = en_old | Int_FDAExEn;
  1567. if (buf_free_count)
  1568. en |= Int_BLExEn;
  1569. if (en != en_old)
  1570. tc_writel(en, &tr->Int_En);
  1571. }
  1572. #ifdef TC35815_NAPI
  1573. return received;
  1574. #endif
  1575. }
  1576. #ifdef TC35815_NAPI
  1577. static int tc35815_poll(struct napi_struct *napi, int budget)
  1578. {
  1579. struct tc35815_local *lp = container_of(napi, struct tc35815_local, napi);
  1580. struct net_device *dev = lp->dev;
  1581. struct tc35815_regs __iomem *tr =
  1582. (struct tc35815_regs __iomem *)dev->base_addr;
  1583. int received = 0, handled;
  1584. u32 status;
  1585. spin_lock(&lp->lock);
  1586. status = tc_readl(&tr->Int_Src);
  1587. do {
  1588. tc_writel(status, &tr->Int_Src); /* write to clear */
  1589. handled = tc35815_do_interrupt(dev, status, limit);
  1590. if (handled >= 0) {
  1591. received += handled;
  1592. if (received >= budget)
  1593. break;
  1594. }
  1595. status = tc_readl(&tr->Int_Src);
  1596. } while (status);
  1597. spin_unlock(&lp->lock);
  1598. if (received < budget) {
  1599. netif_rx_complete(dev, napi);
  1600. /* enable interrupts */
  1601. tc_writel(tc_readl(&tr->DMA_Ctl) & ~DMA_IntMask, &tr->DMA_Ctl);
  1602. }
  1603. return received;
  1604. }
  1605. #endif
  1606. #ifdef NO_CHECK_CARRIER
  1607. #define TX_STA_ERR (Tx_ExColl|Tx_Under|Tx_Defer|Tx_LateColl|Tx_TxPar|Tx_SQErr)
  1608. #else
  1609. #define TX_STA_ERR (Tx_ExColl|Tx_Under|Tx_Defer|Tx_NCarr|Tx_LateColl|Tx_TxPar|Tx_SQErr)
  1610. #endif
  1611. static void
  1612. tc35815_check_tx_stat(struct net_device *dev, int status)
  1613. {
  1614. struct tc35815_local *lp = dev->priv;
  1615. const char *msg = NULL;
  1616. /* count collisions */
  1617. if (status & Tx_ExColl)
  1618. lp->stats.collisions += 16;
  1619. if (status & Tx_TxColl_MASK)
  1620. lp->stats.collisions += status & Tx_TxColl_MASK;
  1621. #ifndef NO_CHECK_CARRIER
  1622. /* TX4939 does not have NCarr */
  1623. if (lp->boardtype == TC35815_TX4939)
  1624. status &= ~Tx_NCarr;
  1625. #ifdef WORKAROUND_LOSTCAR
  1626. /* WORKAROUND: ignore LostCrS in full duplex operation */
  1627. if ((lp->timer_state != asleep && lp->timer_state != lcheck)
  1628. || lp->fullduplex)
  1629. status &= ~Tx_NCarr;
  1630. #endif
  1631. #endif
  1632. if (!(status & TX_STA_ERR)) {
  1633. /* no error. */
  1634. lp->stats.tx_packets++;
  1635. return;
  1636. }
  1637. lp->stats.tx_errors++;
  1638. if (status & Tx_ExColl) {
  1639. lp->stats.tx_aborted_errors++;
  1640. msg = "Excessive Collision.";
  1641. }
  1642. if (status & Tx_Under) {
  1643. lp->stats.tx_fifo_errors++;
  1644. msg = "Tx FIFO Underrun.";
  1645. if (lp->lstats.tx_underrun < TX_THRESHOLD_KEEP_LIMIT) {
  1646. lp->lstats.tx_underrun++;
  1647. if (lp->lstats.tx_underrun >= TX_THRESHOLD_KEEP_LIMIT) {
  1648. struct tc35815_regs __iomem *tr =
  1649. (struct tc35815_regs __iomem *)dev->base_addr;
  1650. tc_writel(TX_THRESHOLD_MAX, &tr->TxThrsh);
  1651. msg = "Tx FIFO Underrun.Change Tx threshold to max.";
  1652. }
  1653. }
  1654. }
  1655. if (status & Tx_Defer) {
  1656. lp->stats.tx_fifo_errors++;
  1657. msg = "Excessive Deferral.";
  1658. }
  1659. #ifndef NO_CHECK_CARRIER
  1660. if (status & Tx_NCarr) {
  1661. lp->stats.tx_carrier_errors++;
  1662. msg = "Lost Carrier Sense.";
  1663. }
  1664. #endif
  1665. if (status & Tx_LateColl) {
  1666. lp->stats.tx_aborted_errors++;
  1667. msg = "Late Collision.";
  1668. }
  1669. if (status & Tx_TxPar) {
  1670. lp->stats.tx_fifo_errors++;
  1671. msg = "Transmit Parity Error.";
  1672. }
  1673. if (status & Tx_SQErr) {
  1674. lp->stats.tx_heartbeat_errors++;
  1675. msg = "Signal Quality Error.";
  1676. }
  1677. if (msg && netif_msg_tx_err(lp))
  1678. printk(KERN_WARNING "%s: %s (%#x)\n", dev->name, msg, status);
  1679. }
  1680. /* This handles TX complete events posted by the device
  1681. * via interrupts.
  1682. */
  1683. static void
  1684. tc35815_txdone(struct net_device *dev)
  1685. {
  1686. struct tc35815_local *lp = dev->priv;
  1687. struct TxFD *txfd;
  1688. unsigned int fdctl;
  1689. txfd = &lp->tfd_base[lp->tfd_end];
  1690. while (lp->tfd_start != lp->tfd_end &&
  1691. !((fdctl = le32_to_cpu(txfd->fd.FDCtl)) & FD_CownsFD)) {
  1692. int status = le32_to_cpu(txfd->fd.FDStat);
  1693. struct sk_buff *skb;
  1694. unsigned long fdnext = le32_to_cpu(txfd->fd.FDNext);
  1695. u32 fdsystem = le32_to_cpu(txfd->fd.FDSystem);
  1696. if (netif_msg_tx_done(lp)) {
  1697. printk("%s: complete TxFD.\n", dev->name);
  1698. dump_txfd(txfd);
  1699. }
  1700. tc35815_check_tx_stat(dev, status);
  1701. skb = fdsystem != 0xffffffff ?
  1702. lp->tx_skbs[fdsystem].skb : NULL;
  1703. #ifdef DEBUG
  1704. if (lp->tx_skbs[lp->tfd_end].skb != skb) {
  1705. printk("%s: tx_skbs mismatch.\n", dev->name);
  1706. panic_queues(dev);
  1707. }
  1708. #else
  1709. BUG_ON(lp->tx_skbs[lp->tfd_end].skb != skb);
  1710. #endif
  1711. if (skb) {
  1712. lp->stats.tx_bytes += skb->len;
  1713. pci_unmap_single(lp->pci_dev, lp->tx_skbs[lp->tfd_end].skb_dma, skb->len, PCI_DMA_TODEVICE);
  1714. lp->tx_skbs[lp->tfd_end].skb = NULL;
  1715. lp->tx_skbs[lp->tfd_end].skb_dma = 0;
  1716. #ifdef TC35815_NAPI
  1717. dev_kfree_skb_any(skb);
  1718. #else
  1719. dev_kfree_skb_irq(skb);
  1720. #endif
  1721. }
  1722. txfd->fd.FDSystem = cpu_to_le32(0xffffffff);
  1723. lp->tfd_end = (lp->tfd_end + 1) % TX_FD_NUM;
  1724. txfd = &lp->tfd_base[lp->tfd_end];
  1725. #ifdef DEBUG
  1726. if ((fdnext & ~FD_Next_EOL) != fd_virt_to_bus(lp, txfd)) {
  1727. printk("%s: TxFD FDNext invalid.\n", dev->name);
  1728. panic_queues(dev);
  1729. }
  1730. #endif
  1731. if (fdnext & FD_Next_EOL) {
  1732. /* DMA Transmitter has been stopping... */
  1733. if (lp->tfd_end != lp->tfd_start) {
  1734. struct tc35815_regs __iomem *tr =
  1735. (struct tc35815_regs __iomem *)dev->base_addr;
  1736. int head = (lp->tfd_start + TX_FD_NUM - 1) % TX_FD_NUM;
  1737. struct TxFD* txhead = &lp->tfd_base[head];
  1738. int qlen = (lp->tfd_start + TX_FD_NUM
  1739. - lp->tfd_end) % TX_FD_NUM;
  1740. #ifdef DEBUG
  1741. if (!(le32_to_cpu(txfd->fd.FDCtl) & FD_CownsFD)) {
  1742. printk("%s: TxFD FDCtl invalid.\n", dev->name);
  1743. panic_queues(dev);
  1744. }
  1745. #endif
  1746. /* log max queue length */
  1747. if (lp->lstats.max_tx_qlen < qlen)
  1748. lp->lstats.max_tx_qlen = qlen;
  1749. /* start DMA Transmitter again */
  1750. txhead->fd.FDNext |= cpu_to_le32(FD_Next_EOL);
  1751. #ifdef GATHER_TXINT
  1752. txhead->fd.FDCtl |= cpu_to_le32(FD_FrmOpt_IntTx);
  1753. #endif
  1754. if (netif_msg_tx_queued(lp)) {
  1755. printk("%s: start TxFD on queue.\n",
  1756. dev->name);
  1757. dump_txfd(txfd);
  1758. }
  1759. tc_writel(fd_virt_to_bus(lp, txfd), &tr->TxFrmPtr);
  1760. }
  1761. break;
  1762. }
  1763. }
  1764. /* If we had stopped the queue due to a "tx full"
  1765. * condition, and space has now been made available,
  1766. * wake up the queue.
  1767. */
  1768. if (netif_queue_stopped(dev) && ! tc35815_tx_full(dev))
  1769. netif_wake_queue(dev);
  1770. }
  1771. /* The inverse routine to tc35815_open(). */
  1772. static int
  1773. tc35815_close(struct net_device *dev)
  1774. {
  1775. struct tc35815_local *lp = dev->priv;
  1776. netif_stop_queue(dev);
  1777. #ifdef TC35815_NAPI
  1778. napi_disable(&lp->napi);
  1779. #endif
  1780. /* Flush the Tx and disable Rx here. */
  1781. del_timer(&lp->timer); /* Kill if running */
  1782. tc35815_chip_reset(dev);
  1783. free_irq(dev->irq, dev);
  1784. tc35815_free_queues(dev);
  1785. return 0;
  1786. }
  1787. /*
  1788. * Get the current statistics.
  1789. * This may be called with the card open or closed.
  1790. */
  1791. static struct net_device_stats *tc35815_get_stats(struct net_device *dev)
  1792. {
  1793. struct tc35815_local *lp = dev->priv;
  1794. struct tc35815_regs __iomem *tr =
  1795. (struct tc35815_regs __iomem *)dev->base_addr;
  1796. if (netif_running(dev)) {
  1797. /* Update the statistics from the device registers. */
  1798. lp->stats.rx_missed_errors = tc_readl(&tr->Miss_Cnt);
  1799. }
  1800. return &lp->stats;
  1801. }
  1802. static void tc35815_set_cam_entry(struct net_device *dev, int index, unsigned char *addr)
  1803. {
  1804. struct tc35815_local *lp = dev->priv;
  1805. struct tc35815_regs __iomem *tr =
  1806. (struct tc35815_regs __iomem *)dev->base_addr;
  1807. int cam_index = index * 6;
  1808. u32 cam_data;
  1809. u32 saved_addr;
  1810. saved_addr = tc_readl(&tr->CAM_Adr);
  1811. if (netif_msg_hw(lp)) {
  1812. int i;
  1813. printk(KERN_DEBUG "%s: CAM %d:", dev->name, index);
  1814. for (i = 0; i < 6; i++)
  1815. printk(" %02x", addr[i]);
  1816. printk("\n");
  1817. }
  1818. if (index & 1) {
  1819. /* read modify write */
  1820. tc_writel(cam_index - 2, &tr->CAM_Adr);
  1821. cam_data = tc_readl(&tr->CAM_Data) & 0xffff0000;
  1822. cam_data |= addr[0] << 8 | addr[1];
  1823. tc_writel(cam_data, &tr->CAM_Data);
  1824. /* write whole word */
  1825. tc_writel(cam_index + 2, &tr->CAM_Adr);
  1826. cam_data = (addr[2] << 24) | (addr[3] << 16) | (addr[4] << 8) | addr[5];
  1827. tc_writel(cam_data, &tr->CAM_Data);
  1828. } else {
  1829. /* write whole word */
  1830. tc_writel(cam_index, &tr->CAM_Adr);
  1831. cam_data = (addr[0] << 24) | (addr[1] << 16) | (addr[2] << 8) | addr[3];
  1832. tc_writel(cam_data, &tr->CAM_Data);
  1833. /* read modify write */
  1834. tc_writel(cam_index + 4, &tr->CAM_Adr);
  1835. cam_data = tc_readl(&tr->CAM_Data) & 0x0000ffff;
  1836. cam_data |= addr[4] << 24 | (addr[5] << 16);
  1837. tc_writel(cam_data, &tr->CAM_Data);
  1838. }
  1839. tc_writel(saved_addr, &tr->CAM_Adr);
  1840. }
  1841. /*
  1842. * Set or clear the multicast filter for this adaptor.
  1843. * num_addrs == -1 Promiscuous mode, receive all packets
  1844. * num_addrs == 0 Normal mode, clear multicast list
  1845. * num_addrs > 0 Multicast mode, receive normal and MC packets,
  1846. * and do best-effort filtering.
  1847. */
  1848. static void
  1849. tc35815_set_multicast_list(struct net_device *dev)
  1850. {
  1851. struct tc35815_regs __iomem *tr =
  1852. (struct tc35815_regs __iomem *)dev->base_addr;
  1853. if (dev->flags&IFF_PROMISC)
  1854. {
  1855. #ifdef WORKAROUND_100HALF_PROMISC
  1856. /* With some (all?) 100MHalf HUB, controller will hang
  1857. * if we enabled promiscuous mode before linkup... */
  1858. struct tc35815_local *lp = dev->priv;
  1859. int pid = lp->phy_addr;
  1860. if (!(tc_mdio_read(dev, pid, MII_BMSR) & BMSR_LSTATUS))
  1861. return;
  1862. #endif
  1863. /* Enable promiscuous mode */
  1864. tc_writel(CAM_CompEn | CAM_BroadAcc | CAM_GroupAcc | CAM_StationAcc, &tr->CAM_Ctl);
  1865. }
  1866. else if((dev->flags&IFF_ALLMULTI) || dev->mc_count > CAM_ENTRY_MAX - 3)
  1867. {
  1868. /* CAM 0, 1, 20 are reserved. */
  1869. /* Disable promiscuous mode, use normal mode. */
  1870. tc_writel(CAM_CompEn | CAM_BroadAcc | CAM_GroupAcc, &tr->CAM_Ctl);
  1871. }
  1872. else if(dev->mc_count)
  1873. {
  1874. struct dev_mc_list* cur_addr = dev->mc_list;
  1875. int i;
  1876. int ena_bits = CAM_Ena_Bit(CAM_ENTRY_SOURCE);
  1877. tc_writel(0, &tr->CAM_Ctl);
  1878. /* Walk the address list, and load the filter */
  1879. for (i = 0; i < dev->mc_count; i++, cur_addr = cur_addr->next) {
  1880. if (!cur_addr)
  1881. break;
  1882. /* entry 0,1 is reserved. */
  1883. tc35815_set_cam_entry(dev, i + 2, cur_addr->dmi_addr);
  1884. ena_bits |= CAM_Ena_Bit(i + 2);
  1885. }
  1886. tc_writel(ena_bits, &tr->CAM_Ena);
  1887. tc_writel(CAM_CompEn | CAM_BroadAcc, &tr->CAM_Ctl);
  1888. }
  1889. else {
  1890. tc_writel(CAM_Ena_Bit(CAM_ENTRY_SOURCE), &tr->CAM_Ena);
  1891. tc_writel(CAM_CompEn | CAM_BroadAcc, &tr->CAM_Ctl);
  1892. }
  1893. }
  1894. static void tc35815_get_drvinfo(struct net_device *dev, struct ethtool_drvinfo *info)
  1895. {
  1896. struct tc35815_local *lp = dev->priv;
  1897. strcpy(info->driver, MODNAME);
  1898. strcpy(info->version, DRV_VERSION);
  1899. strcpy(info->bus_info, pci_name(lp->pci_dev));
  1900. }
  1901. static int tc35815_get_settings(struct net_device *dev, struct ethtool_cmd *cmd)
  1902. {
  1903. struct tc35815_local *lp = dev->priv;
  1904. spin_lock_irq(&lp->lock);
  1905. mii_ethtool_gset(&lp->mii, cmd);
  1906. spin_unlock_irq(&lp->lock);
  1907. return 0;
  1908. }
  1909. static int tc35815_set_settings(struct net_device *dev, struct ethtool_cmd *cmd)
  1910. {
  1911. struct tc35815_local *lp = dev->priv;
  1912. int rc;
  1913. #if 1 /* use our negotiation method... */
  1914. /* Verify the settings we care about. */
  1915. if (cmd->autoneg != AUTONEG_ENABLE &&
  1916. cmd->autoneg != AUTONEG_DISABLE)
  1917. return -EINVAL;
  1918. if (cmd->autoneg == AUTONEG_DISABLE &&
  1919. ((cmd->speed != SPEED_100 &&
  1920. cmd->speed != SPEED_10) ||
  1921. (cmd->duplex != DUPLEX_HALF &&
  1922. cmd->duplex != DUPLEX_FULL)))
  1923. return -EINVAL;
  1924. /* Ok, do it to it. */
  1925. spin_lock_irq(&lp->lock);
  1926. del_timer(&lp->timer);
  1927. tc35815_start_auto_negotiation(dev, cmd);
  1928. spin_unlock_irq(&lp->lock);
  1929. rc = 0;
  1930. #else
  1931. spin_lock_irq(&lp->lock);
  1932. rc = mii_ethtool_sset(&lp->mii, cmd);
  1933. spin_unlock_irq(&lp->lock);
  1934. #endif
  1935. return rc;
  1936. }
  1937. static int tc35815_nway_reset(struct net_device *dev)
  1938. {
  1939. struct tc35815_local *lp = dev->priv;
  1940. int rc;
  1941. spin_lock_irq(&lp->lock);
  1942. rc = mii_nway_restart(&lp->mii);
  1943. spin_unlock_irq(&lp->lock);
  1944. return rc;
  1945. }
  1946. static u32 tc35815_get_link(struct net_device *dev)
  1947. {
  1948. struct tc35815_local *lp = dev->priv;
  1949. int rc;
  1950. spin_lock_irq(&lp->lock);
  1951. rc = mii_link_ok(&lp->mii);
  1952. spin_unlock_irq(&lp->lock);
  1953. return rc;
  1954. }
  1955. static u32 tc35815_get_msglevel(struct net_device *dev)
  1956. {
  1957. struct tc35815_local *lp = dev->priv;
  1958. return lp->msg_enable;
  1959. }
  1960. static void tc35815_set_msglevel(struct net_device *dev, u32 datum)
  1961. {
  1962. struct tc35815_local *lp = dev->priv;
  1963. lp->msg_enable = datum;
  1964. }
  1965. static int tc35815_get_stats_count(struct net_device *dev)
  1966. {
  1967. struct tc35815_local *lp = dev->priv;
  1968. return sizeof(lp->lstats) / sizeof(int);
  1969. }
  1970. static void tc35815_get_ethtool_stats(struct net_device *dev, struct ethtool_stats *stats, u64 *data)
  1971. {
  1972. struct tc35815_local *lp = dev->priv;
  1973. data[0] = lp->lstats.max_tx_qlen;
  1974. data[1] = lp->lstats.tx_ints;
  1975. data[2] = lp->lstats.rx_ints;
  1976. data[3] = lp->lstats.tx_underrun;
  1977. }
  1978. static struct {
  1979. const char str[ETH_GSTRING_LEN];
  1980. } ethtool_stats_keys[] = {
  1981. { "max_tx_qlen" },
  1982. { "tx_ints" },
  1983. { "rx_ints" },
  1984. { "tx_underrun" },
  1985. };
  1986. static void tc35815_get_strings(struct net_device *dev, u32 stringset, u8 *data)
  1987. {
  1988. memcpy(data, ethtool_stats_keys, sizeof(ethtool_stats_keys));
  1989. }
  1990. static const struct ethtool_ops tc35815_ethtool_ops = {
  1991. .get_drvinfo = tc35815_get_drvinfo,
  1992. .get_settings = tc35815_get_settings,
  1993. .set_settings = tc35815_set_settings,
  1994. .nway_reset = tc35815_nway_reset,
  1995. .get_link = tc35815_get_link,
  1996. .get_msglevel = tc35815_get_msglevel,
  1997. .set_msglevel = tc35815_set_msglevel,
  1998. .get_strings = tc35815_get_strings,
  1999. .get_stats_count = tc35815_get_stats_count,
  2000. .get_ethtool_stats = tc35815_get_ethtool_stats,
  2001. };
  2002. static int tc35815_ioctl(struct net_device *dev, struct ifreq *rq, int cmd)
  2003. {
  2004. struct tc35815_local *lp = dev->priv;
  2005. int rc;
  2006. if (!netif_running(dev))
  2007. return -EINVAL;
  2008. spin_lock_irq(&lp->lock);
  2009. rc = generic_mii_ioctl(&lp->mii, if_mii(rq), cmd, NULL);
  2010. spin_unlock_irq(&lp->lock);
  2011. return rc;
  2012. }
  2013. static int tc_mdio_read(struct net_device *dev, int phy_id, int location)
  2014. {
  2015. struct tc35815_regs __iomem *tr =
  2016. (struct tc35815_regs __iomem *)dev->base_addr;
  2017. u32 data;
  2018. tc_writel(MD_CA_Busy | (phy_id << 5) | location, &tr->MD_CA);
  2019. while (tc_readl(&tr->MD_CA) & MD_CA_Busy)
  2020. ;
  2021. data = tc_readl(&tr->MD_Data);
  2022. return data & 0xffff;
  2023. }
  2024. static void tc_mdio_write(struct net_device *dev, int phy_id, int location,
  2025. int val)
  2026. {
  2027. struct tc35815_regs __iomem *tr =
  2028. (struct tc35815_regs __iomem *)dev->base_addr;
  2029. tc_writel(val, &tr->MD_Data);
  2030. tc_writel(MD_CA_Busy | MD_CA_Wr | (phy_id << 5) | location, &tr->MD_CA);
  2031. while (tc_readl(&tr->MD_CA) & MD_CA_Busy)
  2032. ;
  2033. }
  2034. /* Auto negotiation. The scheme is very simple. We have a timer routine
  2035. * that keeps watching the auto negotiation process as it progresses.
  2036. * The DP83840 is first told to start doing it's thing, we set up the time
  2037. * and place the timer state machine in it's initial state.
  2038. *
  2039. * Here the timer peeks at the DP83840 status registers at each click to see
  2040. * if the auto negotiation has completed, we assume here that the DP83840 PHY
  2041. * will time out at some point and just tell us what (didn't) happen. For
  2042. * complete coverage we only allow so many of the ticks at this level to run,
  2043. * when this has expired we print a warning message and try another strategy.
  2044. * This "other" strategy is to force the interface into various speed/duplex
  2045. * configurations and we stop when we see a link-up condition before the
  2046. * maximum number of "peek" ticks have occurred.
  2047. *
  2048. * Once a valid link status has been detected we configure the BigMAC and
  2049. * the rest of the Happy Meal to speak the most efficient protocol we could
  2050. * get a clean link for. The priority for link configurations, highest first
  2051. * is:
  2052. * 100 Base-T Full Duplex
  2053. * 100 Base-T Half Duplex
  2054. * 10 Base-T Full Duplex
  2055. * 10 Base-T Half Duplex
  2056. *
  2057. * We start a new timer now, after a successful auto negotiation status has
  2058. * been detected. This timer just waits for the link-up bit to get set in
  2059. * the BMCR of the DP83840. When this occurs we print a kernel log message
  2060. * describing the link type in use and the fact that it is up.
  2061. *
  2062. * If a fatal error of some sort is signalled and detected in the interrupt
  2063. * service routine, and the chip is reset, or the link is ifconfig'd down
  2064. * and then back up, this entire process repeats itself all over again.
  2065. */
  2066. /* Note: Above comments are come from sunhme driver. */
  2067. static int tc35815_try_next_permutation(struct net_device *dev)
  2068. {
  2069. struct tc35815_local *lp = dev->priv;
  2070. int pid = lp->phy_addr;
  2071. unsigned short bmcr;
  2072. bmcr = tc_mdio_read(dev, pid, MII_BMCR);
  2073. /* Downgrade from full to half duplex. Only possible via ethtool. */
  2074. if (bmcr & BMCR_FULLDPLX) {
  2075. bmcr &= ~BMCR_FULLDPLX;
  2076. printk(KERN_DEBUG "%s: try next permutation (BMCR %x)\n", dev->name, bmcr);
  2077. tc_mdio_write(dev, pid, MII_BMCR, bmcr);
  2078. return 0;
  2079. }
  2080. /* Downgrade from 100 to 10. */
  2081. if (bmcr & BMCR_SPEED100) {
  2082. bmcr &= ~BMCR_SPEED100;
  2083. printk(KERN_DEBUG "%s: try next permutation (BMCR %x)\n", dev->name, bmcr);
  2084. tc_mdio_write(dev, pid, MII_BMCR, bmcr);
  2085. return 0;
  2086. }
  2087. /* We've tried everything. */
  2088. return -1;
  2089. }
  2090. static void
  2091. tc35815_display_link_mode(struct net_device *dev)
  2092. {
  2093. struct tc35815_local *lp = dev->priv;
  2094. int pid = lp->phy_addr;
  2095. unsigned short lpa, bmcr;
  2096. char *speed = "", *duplex = "";
  2097. lpa = tc_mdio_read(dev, pid, MII_LPA);
  2098. bmcr = tc_mdio_read(dev, pid, MII_BMCR);
  2099. if (options.speed ? (bmcr & BMCR_SPEED100) : (lpa & (LPA_100HALF | LPA_100FULL)))
  2100. speed = "100Mb/s";
  2101. else
  2102. speed = "10Mb/s";
  2103. if (options.duplex ? (bmcr & BMCR_FULLDPLX) : (lpa & (LPA_100FULL | LPA_10FULL)))
  2104. duplex = "Full Duplex";
  2105. else
  2106. duplex = "Half Duplex";
  2107. if (netif_msg_link(lp))
  2108. printk(KERN_INFO "%s: Link is up at %s, %s.\n",
  2109. dev->name, speed, duplex);
  2110. printk(KERN_DEBUG "%s: MII BMCR %04x BMSR %04x LPA %04x\n",
  2111. dev->name,
  2112. bmcr, tc_mdio_read(dev, pid, MII_BMSR), lpa);
  2113. }
  2114. static void tc35815_display_forced_link_mode(struct net_device *dev)
  2115. {
  2116. struct tc35815_local *lp = dev->priv;
  2117. int pid = lp->phy_addr;
  2118. unsigned short bmcr;
  2119. char *speed = "", *duplex = "";
  2120. bmcr = tc_mdio_read(dev, pid, MII_BMCR);
  2121. if (bmcr & BMCR_SPEED100)
  2122. speed = "100Mb/s";
  2123. else
  2124. speed = "10Mb/s";
  2125. if (bmcr & BMCR_FULLDPLX)
  2126. duplex = "Full Duplex.\n";
  2127. else
  2128. duplex = "Half Duplex.\n";
  2129. if (netif_msg_link(lp))
  2130. printk(KERN_INFO "%s: Link has been forced up at %s, %s",
  2131. dev->name, speed, duplex);
  2132. }
  2133. static void tc35815_set_link_modes(struct net_device *dev)
  2134. {
  2135. struct tc35815_local *lp = dev->priv;
  2136. struct tc35815_regs __iomem *tr =
  2137. (struct tc35815_regs __iomem *)dev->base_addr;
  2138. int pid = lp->phy_addr;
  2139. unsigned short bmcr, lpa;
  2140. int speed;
  2141. if (lp->timer_state == arbwait) {
  2142. lpa = tc_mdio_read(dev, pid, MII_LPA);
  2143. bmcr = tc_mdio_read(dev, pid, MII_BMCR);
  2144. printk(KERN_DEBUG "%s: MII BMCR %04x BMSR %04x LPA %04x\n",
  2145. dev->name,
  2146. bmcr, tc_mdio_read(dev, pid, MII_BMSR), lpa);
  2147. if (!(lpa & (LPA_10HALF | LPA_10FULL |
  2148. LPA_100HALF | LPA_100FULL))) {
  2149. /* fall back to 10HALF */
  2150. printk(KERN_INFO "%s: bad ability %04x - falling back to 10HD.\n",
  2151. dev->name, lpa);
  2152. lpa = LPA_10HALF;
  2153. }
  2154. if (options.duplex ? (bmcr & BMCR_FULLDPLX) : (lpa & (LPA_100FULL | LPA_10FULL)))
  2155. lp->fullduplex = 1;
  2156. else
  2157. lp->fullduplex = 0;
  2158. if (options.speed ? (bmcr & BMCR_SPEED100) : (lpa & (LPA_100HALF | LPA_100FULL)))
  2159. speed = 100;
  2160. else
  2161. speed = 10;
  2162. } else {
  2163. /* Forcing a link mode. */
  2164. bmcr = tc_mdio_read(dev, pid, MII_BMCR);
  2165. if (bmcr & BMCR_FULLDPLX)
  2166. lp->fullduplex = 1;
  2167. else
  2168. lp->fullduplex = 0;
  2169. if (bmcr & BMCR_SPEED100)
  2170. speed = 100;
  2171. else
  2172. speed = 10;
  2173. }
  2174. tc_writel(tc_readl(&tr->MAC_Ctl) | MAC_HaltReq, &tr->MAC_Ctl);
  2175. if (lp->fullduplex) {
  2176. tc_writel(tc_readl(&tr->MAC_Ctl) | MAC_FullDup, &tr->MAC_Ctl);
  2177. } else {
  2178. tc_writel(tc_readl(&tr->MAC_Ctl) & ~MAC_FullDup, &tr->MAC_Ctl);
  2179. }
  2180. tc_writel(tc_readl(&tr->MAC_Ctl) & ~MAC_HaltReq, &tr->MAC_Ctl);
  2181. /* TX4939 PCFG.SPEEDn bit will be changed on NETDEV_CHANGE event. */
  2182. #ifndef NO_CHECK_CARRIER
  2183. /* TX4939 does not have EnLCarr */
  2184. if (lp->boardtype != TC35815_TX4939) {
  2185. #ifdef WORKAROUND_LOSTCAR
  2186. /* WORKAROUND: enable LostCrS only if half duplex operation */
  2187. if (!lp->fullduplex && lp->boardtype != TC35815_TX4939)
  2188. tc_writel(tc_readl(&tr->Tx_Ctl) | Tx_EnLCarr, &tr->Tx_Ctl);
  2189. #endif
  2190. }
  2191. #endif
  2192. lp->mii.full_duplex = lp->fullduplex;
  2193. }
  2194. static void tc35815_timer(unsigned long data)
  2195. {
  2196. struct net_device *dev = (struct net_device *)data;
  2197. struct tc35815_local *lp = dev->priv;
  2198. int pid = lp->phy_addr;
  2199. unsigned short bmsr, bmcr, lpa;
  2200. int restart_timer = 0;
  2201. spin_lock_irq(&lp->lock);
  2202. lp->timer_ticks++;
  2203. switch (lp->timer_state) {
  2204. case arbwait:
  2205. /*
  2206. * Only allow for 5 ticks, thats 10 seconds and much too
  2207. * long to wait for arbitration to complete.
  2208. */
  2209. /* TC35815 need more times... */
  2210. if (lp->timer_ticks >= 10) {
  2211. /* Enter force mode. */
  2212. if (!options.doforce) {
  2213. printk(KERN_NOTICE "%s: Auto-Negotiation unsuccessful,"
  2214. " cable probblem?\n", dev->name);
  2215. /* Try to restart the adaptor. */
  2216. tc35815_restart(dev);
  2217. goto out;
  2218. }
  2219. printk(KERN_NOTICE "%s: Auto-Negotiation unsuccessful,"
  2220. " trying force link mode\n", dev->name);
  2221. printk(KERN_DEBUG "%s: BMCR %x BMSR %x\n", dev->name,
  2222. tc_mdio_read(dev, pid, MII_BMCR),
  2223. tc_mdio_read(dev, pid, MII_BMSR));
  2224. bmcr = BMCR_SPEED100;
  2225. tc_mdio_write(dev, pid, MII_BMCR, bmcr);
  2226. /*
  2227. * OK, seems we need do disable the transceiver
  2228. * for the first tick to make sure we get an
  2229. * accurate link state at the second tick.
  2230. */
  2231. lp->timer_state = ltrywait;
  2232. lp->timer_ticks = 0;
  2233. restart_timer = 1;
  2234. } else {
  2235. /* Anything interesting happen? */
  2236. bmsr = tc_mdio_read(dev, pid, MII_BMSR);
  2237. if (bmsr & BMSR_ANEGCOMPLETE) {
  2238. /* Just what we've been waiting for... */
  2239. tc35815_set_link_modes(dev);
  2240. /*
  2241. * Success, at least so far, advance our state
  2242. * engine.
  2243. */
  2244. lp->timer_state = lupwait;
  2245. restart_timer = 1;
  2246. } else {
  2247. restart_timer = 1;
  2248. }
  2249. }
  2250. break;
  2251. case lupwait:
  2252. /*
  2253. * Auto negotiation was successful and we are awaiting a
  2254. * link up status. I have decided to let this timer run
  2255. * forever until some sort of error is signalled, reporting
  2256. * a message to the user at 10 second intervals.
  2257. */
  2258. bmsr = tc_mdio_read(dev, pid, MII_BMSR);
  2259. if (bmsr & BMSR_LSTATUS) {
  2260. /*
  2261. * Wheee, it's up, display the link mode in use and put
  2262. * the timer to sleep.
  2263. */
  2264. tc35815_display_link_mode(dev);
  2265. netif_carrier_on(dev);
  2266. #ifdef WORKAROUND_100HALF_PROMISC
  2267. /* delayed promiscuous enabling */
  2268. if (dev->flags & IFF_PROMISC)
  2269. tc35815_set_multicast_list(dev);
  2270. #endif
  2271. #if 1
  2272. lp->saved_lpa = tc_mdio_read(dev, pid, MII_LPA);
  2273. lp->timer_state = lcheck;
  2274. restart_timer = 1;
  2275. #else
  2276. lp->timer_state = asleep;
  2277. restart_timer = 0;
  2278. #endif
  2279. } else {
  2280. if (lp->timer_ticks >= 10) {
  2281. printk(KERN_NOTICE "%s: Auto negotiation successful, link still "
  2282. "not completely up.\n", dev->name);
  2283. lp->timer_ticks = 0;
  2284. restart_timer = 1;
  2285. } else {
  2286. restart_timer = 1;
  2287. }
  2288. }
  2289. break;
  2290. case ltrywait:
  2291. /*
  2292. * Making the timeout here too long can make it take
  2293. * annoyingly long to attempt all of the link mode
  2294. * permutations, but then again this is essentially
  2295. * error recovery code for the most part.
  2296. */
  2297. bmsr = tc_mdio_read(dev, pid, MII_BMSR);
  2298. bmcr = tc_mdio_read(dev, pid, MII_BMCR);
  2299. if (lp->timer_ticks == 1) {
  2300. /*
  2301. * Re-enable transceiver, we'll re-enable the
  2302. * transceiver next tick, then check link state
  2303. * on the following tick.
  2304. */
  2305. restart_timer = 1;
  2306. break;
  2307. }
  2308. if (lp->timer_ticks == 2) {
  2309. restart_timer = 1;
  2310. break;
  2311. }
  2312. if (bmsr & BMSR_LSTATUS) {
  2313. /* Force mode selection success. */
  2314. tc35815_display_forced_link_mode(dev);
  2315. netif_carrier_on(dev);
  2316. tc35815_set_link_modes(dev);
  2317. #ifdef WORKAROUND_100HALF_PROMISC
  2318. /* delayed promiscuous enabling */
  2319. if (dev->flags & IFF_PROMISC)
  2320. tc35815_set_multicast_list(dev);
  2321. #endif
  2322. #if 1
  2323. lp->saved_lpa = tc_mdio_read(dev, pid, MII_LPA);
  2324. lp->timer_state = lcheck;
  2325. restart_timer = 1;
  2326. #else
  2327. lp->timer_state = asleep;
  2328. restart_timer = 0;
  2329. #endif
  2330. } else {
  2331. if (lp->timer_ticks >= 4) { /* 6 seconds or so... */
  2332. int ret;
  2333. ret = tc35815_try_next_permutation(dev);
  2334. if (ret == -1) {
  2335. /*
  2336. * Aieee, tried them all, reset the
  2337. * chip and try all over again.
  2338. */
  2339. printk(KERN_NOTICE "%s: Link down, "
  2340. "cable problem?\n",
  2341. dev->name);
  2342. /* Try to restart the adaptor. */
  2343. tc35815_restart(dev);
  2344. goto out;
  2345. }
  2346. lp->timer_ticks = 0;
  2347. restart_timer = 1;
  2348. } else {
  2349. restart_timer = 1;
  2350. }
  2351. }
  2352. break;
  2353. case lcheck:
  2354. bmcr = tc_mdio_read(dev, pid, MII_BMCR);
  2355. lpa = tc_mdio_read(dev, pid, MII_LPA);
  2356. if (bmcr & (BMCR_PDOWN | BMCR_ISOLATE | BMCR_RESET)) {
  2357. printk(KERN_ERR "%s: PHY down? (BMCR %x)\n", dev->name,
  2358. bmcr);
  2359. } else if ((lp->saved_lpa ^ lpa) &
  2360. (LPA_100FULL|LPA_100HALF|LPA_10FULL|LPA_10HALF)) {
  2361. printk(KERN_NOTICE "%s: link status changed"
  2362. " (BMCR %x LPA %x->%x)\n", dev->name,
  2363. bmcr, lp->saved_lpa, lpa);
  2364. } else {
  2365. /* go on */
  2366. restart_timer = 1;
  2367. break;
  2368. }
  2369. /* Try to restart the adaptor. */
  2370. tc35815_restart(dev);
  2371. goto out;
  2372. case asleep:
  2373. default:
  2374. /* Can't happens.... */
  2375. printk(KERN_ERR "%s: Aieee, link timer is asleep but we got "
  2376. "one anyways!\n", dev->name);
  2377. restart_timer = 0;
  2378. lp->timer_ticks = 0;
  2379. lp->timer_state = asleep; /* foo on you */
  2380. break;
  2381. }
  2382. if (restart_timer) {
  2383. lp->timer.expires = jiffies + msecs_to_jiffies(1200);
  2384. add_timer(&lp->timer);
  2385. }
  2386. out:
  2387. spin_unlock_irq(&lp->lock);
  2388. }
  2389. static void tc35815_start_auto_negotiation(struct net_device *dev,
  2390. struct ethtool_cmd *ep)
  2391. {
  2392. struct tc35815_local *lp = dev->priv;
  2393. int pid = lp->phy_addr;
  2394. unsigned short bmsr, bmcr, advertize;
  2395. int timeout;
  2396. netif_carrier_off(dev);
  2397. bmsr = tc_mdio_read(dev, pid, MII_BMSR);
  2398. bmcr = tc_mdio_read(dev, pid, MII_BMCR);
  2399. advertize = tc_mdio_read(dev, pid, MII_ADVERTISE);
  2400. if (ep == NULL || ep->autoneg == AUTONEG_ENABLE) {
  2401. if (options.speed || options.duplex) {
  2402. /* Advertise only specified configuration. */
  2403. advertize &= ~(ADVERTISE_10HALF |
  2404. ADVERTISE_10FULL |
  2405. ADVERTISE_100HALF |
  2406. ADVERTISE_100FULL);
  2407. if (options.speed != 10) {
  2408. if (options.duplex != 1)
  2409. advertize |= ADVERTISE_100FULL;
  2410. if (options.duplex != 2)
  2411. advertize |= ADVERTISE_100HALF;
  2412. }
  2413. if (options.speed != 100) {
  2414. if (options.duplex != 1)
  2415. advertize |= ADVERTISE_10FULL;
  2416. if (options.duplex != 2)
  2417. advertize |= ADVERTISE_10HALF;
  2418. }
  2419. if (options.speed == 100)
  2420. bmcr |= BMCR_SPEED100;
  2421. else if (options.speed == 10)
  2422. bmcr &= ~BMCR_SPEED100;
  2423. if (options.duplex == 2)
  2424. bmcr |= BMCR_FULLDPLX;
  2425. else if (options.duplex == 1)
  2426. bmcr &= ~BMCR_FULLDPLX;
  2427. } else {
  2428. /* Advertise everything we can support. */
  2429. if (bmsr & BMSR_10HALF)
  2430. advertize |= ADVERTISE_10HALF;
  2431. else
  2432. advertize &= ~ADVERTISE_10HALF;
  2433. if (bmsr & BMSR_10FULL)
  2434. advertize |= ADVERTISE_10FULL;
  2435. else
  2436. advertize &= ~ADVERTISE_10FULL;
  2437. if (bmsr & BMSR_100HALF)
  2438. advertize |= ADVERTISE_100HALF;
  2439. else
  2440. advertize &= ~ADVERTISE_100HALF;
  2441. if (bmsr & BMSR_100FULL)
  2442. advertize |= ADVERTISE_100FULL;
  2443. else
  2444. advertize &= ~ADVERTISE_100FULL;
  2445. }
  2446. tc_mdio_write(dev, pid, MII_ADVERTISE, advertize);
  2447. /* Enable Auto-Negotiation, this is usually on already... */
  2448. bmcr |= BMCR_ANENABLE;
  2449. tc_mdio_write(dev, pid, MII_BMCR, bmcr);
  2450. /* Restart it to make sure it is going. */
  2451. bmcr |= BMCR_ANRESTART;
  2452. tc_mdio_write(dev, pid, MII_BMCR, bmcr);
  2453. printk(KERN_DEBUG "%s: ADVERTISE %x BMCR %x\n", dev->name, advertize, bmcr);
  2454. /* BMCR_ANRESTART self clears when the process has begun. */
  2455. timeout = 64; /* More than enough. */
  2456. while (--timeout) {
  2457. bmcr = tc_mdio_read(dev, pid, MII_BMCR);
  2458. if (!(bmcr & BMCR_ANRESTART))
  2459. break; /* got it. */
  2460. udelay(10);
  2461. }
  2462. if (!timeout) {
  2463. printk(KERN_ERR "%s: TC35815 would not start auto "
  2464. "negotiation BMCR=0x%04x\n",
  2465. dev->name, bmcr);
  2466. printk(KERN_NOTICE "%s: Performing force link "
  2467. "detection.\n", dev->name);
  2468. goto force_link;
  2469. } else {
  2470. printk(KERN_DEBUG "%s: auto negotiation started.\n", dev->name);
  2471. lp->timer_state = arbwait;
  2472. }
  2473. } else {
  2474. force_link:
  2475. /* Force the link up, trying first a particular mode.
  2476. * Either we are here at the request of ethtool or
  2477. * because the Happy Meal would not start to autoneg.
  2478. */
  2479. /* Disable auto-negotiation in BMCR, enable the duplex and
  2480. * speed setting, init the timer state machine, and fire it off.
  2481. */
  2482. if (ep == NULL || ep->autoneg == AUTONEG_ENABLE) {
  2483. bmcr = BMCR_SPEED100;
  2484. } else {
  2485. if (ep->speed == SPEED_100)
  2486. bmcr = BMCR_SPEED100;
  2487. else
  2488. bmcr = 0;
  2489. if (ep->duplex == DUPLEX_FULL)
  2490. bmcr |= BMCR_FULLDPLX;
  2491. }
  2492. tc_mdio_write(dev, pid, MII_BMCR, bmcr);
  2493. /* OK, seems we need do disable the transceiver for the first
  2494. * tick to make sure we get an accurate link state at the
  2495. * second tick.
  2496. */
  2497. lp->timer_state = ltrywait;
  2498. }
  2499. del_timer(&lp->timer);
  2500. lp->timer_ticks = 0;
  2501. lp->timer.expires = jiffies + msecs_to_jiffies(1200);
  2502. add_timer(&lp->timer);
  2503. }
  2504. static void tc35815_find_phy(struct net_device *dev)
  2505. {
  2506. struct tc35815_local *lp = dev->priv;
  2507. int pid = lp->phy_addr;
  2508. unsigned short id0;
  2509. /* find MII phy */
  2510. for (pid = 31; pid >= 0; pid--) {
  2511. id0 = tc_mdio_read(dev, pid, MII_BMSR);
  2512. if (id0 != 0xffff && id0 != 0x0000 &&
  2513. (id0 & BMSR_RESV) != (0xffff & BMSR_RESV) /* paranoia? */
  2514. ) {
  2515. lp->phy_addr = pid;
  2516. break;
  2517. }
  2518. }
  2519. if (pid < 0) {
  2520. printk(KERN_ERR "%s: No MII Phy found.\n",
  2521. dev->name);
  2522. lp->phy_addr = pid = 0;
  2523. }
  2524. lp->mii_id[0] = tc_mdio_read(dev, pid, MII_PHYSID1);
  2525. lp->mii_id[1] = tc_mdio_read(dev, pid, MII_PHYSID2);
  2526. if (netif_msg_hw(lp))
  2527. printk(KERN_INFO "%s: PHY(%02x) ID %04x %04x\n", dev->name,
  2528. pid, lp->mii_id[0], lp->mii_id[1]);
  2529. }
  2530. static void tc35815_phy_chip_init(struct net_device *dev)
  2531. {
  2532. struct tc35815_local *lp = dev->priv;
  2533. int pid = lp->phy_addr;
  2534. unsigned short bmcr;
  2535. struct ethtool_cmd ecmd, *ep;
  2536. /* dis-isolate if needed. */
  2537. bmcr = tc_mdio_read(dev, pid, MII_BMCR);
  2538. if (bmcr & BMCR_ISOLATE) {
  2539. int count = 32;
  2540. printk(KERN_DEBUG "%s: unisolating...", dev->name);
  2541. tc_mdio_write(dev, pid, MII_BMCR, bmcr & ~BMCR_ISOLATE);
  2542. while (--count) {
  2543. if (!(tc_mdio_read(dev, pid, MII_BMCR) & BMCR_ISOLATE))
  2544. break;
  2545. udelay(20);
  2546. }
  2547. printk(" %s.\n", count ? "done" : "failed");
  2548. }
  2549. if (options.speed && options.duplex) {
  2550. ecmd.autoneg = AUTONEG_DISABLE;
  2551. ecmd.speed = options.speed == 10 ? SPEED_10 : SPEED_100;
  2552. ecmd.duplex = options.duplex == 1 ? DUPLEX_HALF : DUPLEX_FULL;
  2553. ep = &ecmd;
  2554. } else {
  2555. ep = NULL;
  2556. }
  2557. tc35815_start_auto_negotiation(dev, ep);
  2558. }
  2559. static void tc35815_chip_reset(struct net_device *dev)
  2560. {
  2561. struct tc35815_regs __iomem *tr =
  2562. (struct tc35815_regs __iomem *)dev->base_addr;
  2563. int i;
  2564. /* reset the controller */
  2565. tc_writel(MAC_Reset, &tr->MAC_Ctl);
  2566. udelay(4); /* 3200ns */
  2567. i = 0;
  2568. while (tc_readl(&tr->MAC_Ctl) & MAC_Reset) {
  2569. if (i++ > 100) {
  2570. printk(KERN_ERR "%s: MAC reset failed.\n", dev->name);
  2571. break;
  2572. }
  2573. mdelay(1);
  2574. }
  2575. tc_writel(0, &tr->MAC_Ctl);
  2576. /* initialize registers to default value */
  2577. tc_writel(0, &tr->DMA_Ctl);
  2578. tc_writel(0, &tr->TxThrsh);
  2579. tc_writel(0, &tr->TxPollCtr);
  2580. tc_writel(0, &tr->RxFragSize);
  2581. tc_writel(0, &tr->Int_En);
  2582. tc_writel(0, &tr->FDA_Bas);
  2583. tc_writel(0, &tr->FDA_Lim);
  2584. tc_writel(0xffffffff, &tr->Int_Src); /* Write 1 to clear */
  2585. tc_writel(0, &tr->CAM_Ctl);
  2586. tc_writel(0, &tr->Tx_Ctl);
  2587. tc_writel(0, &tr->Rx_Ctl);
  2588. tc_writel(0, &tr->CAM_Ena);
  2589. (void)tc_readl(&tr->Miss_Cnt); /* Read to clear */
  2590. /* initialize internal SRAM */
  2591. tc_writel(DMA_TestMode, &tr->DMA_Ctl);
  2592. for (i = 0; i < 0x1000; i += 4) {
  2593. tc_writel(i, &tr->CAM_Adr);
  2594. tc_writel(0, &tr->CAM_Data);
  2595. }
  2596. tc_writel(0, &tr->DMA_Ctl);
  2597. }
  2598. static void tc35815_chip_init(struct net_device *dev)
  2599. {
  2600. struct tc35815_local *lp = dev->priv;
  2601. struct tc35815_regs __iomem *tr =
  2602. (struct tc35815_regs __iomem *)dev->base_addr;
  2603. unsigned long txctl = TX_CTL_CMD;
  2604. tc35815_phy_chip_init(dev);
  2605. /* load station address to CAM */
  2606. tc35815_set_cam_entry(dev, CAM_ENTRY_SOURCE, dev->dev_addr);
  2607. /* Enable CAM (broadcast and unicast) */
  2608. tc_writel(CAM_Ena_Bit(CAM_ENTRY_SOURCE), &tr->CAM_Ena);
  2609. tc_writel(CAM_CompEn | CAM_BroadAcc, &tr->CAM_Ctl);
  2610. /* Use DMA_RxAlign_2 to make IP header 4-byte aligned. */
  2611. if (HAVE_DMA_RXALIGN(lp))
  2612. tc_writel(DMA_BURST_SIZE | DMA_RxAlign_2, &tr->DMA_Ctl);
  2613. else
  2614. tc_writel(DMA_BURST_SIZE, &tr->DMA_Ctl);
  2615. #ifdef TC35815_USE_PACKEDBUFFER
  2616. tc_writel(RxFrag_EnPack | ETH_ZLEN, &tr->RxFragSize); /* Packing */
  2617. #else
  2618. tc_writel(ETH_ZLEN, &tr->RxFragSize);
  2619. #endif
  2620. tc_writel(0, &tr->TxPollCtr); /* Batch mode */
  2621. tc_writel(TX_THRESHOLD, &tr->TxThrsh);
  2622. tc_writel(INT_EN_CMD, &tr->Int_En);
  2623. /* set queues */
  2624. tc_writel(fd_virt_to_bus(lp, lp->rfd_base), &tr->FDA_Bas);
  2625. tc_writel((unsigned long)lp->rfd_limit - (unsigned long)lp->rfd_base,
  2626. &tr->FDA_Lim);
  2627. /*
  2628. * Activation method:
  2629. * First, enable the MAC Transmitter and the DMA Receive circuits.
  2630. * Then enable the DMA Transmitter and the MAC Receive circuits.
  2631. */
  2632. tc_writel(fd_virt_to_bus(lp, lp->fbl_ptr), &tr->BLFrmPtr); /* start DMA receiver */
  2633. tc_writel(RX_CTL_CMD, &tr->Rx_Ctl); /* start MAC receiver */
  2634. /* start MAC transmitter */
  2635. #ifndef NO_CHECK_CARRIER
  2636. /* TX4939 does not have EnLCarr */
  2637. if (lp->boardtype == TC35815_TX4939)
  2638. txctl &= ~Tx_EnLCarr;
  2639. #ifdef WORKAROUND_LOSTCAR
  2640. /* WORKAROUND: ignore LostCrS in full duplex operation */
  2641. if ((lp->timer_state != asleep && lp->timer_state != lcheck) ||
  2642. lp->fullduplex)
  2643. txctl &= ~Tx_EnLCarr;
  2644. #endif
  2645. #endif /* !NO_CHECK_CARRIER */
  2646. #ifdef GATHER_TXINT
  2647. txctl &= ~Tx_EnComp; /* disable global tx completion int. */
  2648. #endif
  2649. tc_writel(txctl, &tr->Tx_Ctl);
  2650. }
  2651. #ifdef CONFIG_PM
  2652. static int tc35815_suspend(struct pci_dev *pdev, pm_message_t state)
  2653. {
  2654. struct net_device *dev = pci_get_drvdata(pdev);
  2655. struct tc35815_local *lp = dev->priv;
  2656. unsigned long flags;
  2657. pci_save_state(pdev);
  2658. if (!netif_running(dev))
  2659. return 0;
  2660. netif_device_detach(dev);
  2661. spin_lock_irqsave(&lp->lock, flags);
  2662. del_timer(&lp->timer); /* Kill if running */
  2663. tc35815_chip_reset(dev);
  2664. spin_unlock_irqrestore(&lp->lock, flags);
  2665. pci_set_power_state(pdev, PCI_D3hot);
  2666. return 0;
  2667. }
  2668. static int tc35815_resume(struct pci_dev *pdev)
  2669. {
  2670. struct net_device *dev = pci_get_drvdata(pdev);
  2671. struct tc35815_local *lp = dev->priv;
  2672. unsigned long flags;
  2673. pci_restore_state(pdev);
  2674. if (!netif_running(dev))
  2675. return 0;
  2676. pci_set_power_state(pdev, PCI_D0);
  2677. spin_lock_irqsave(&lp->lock, flags);
  2678. tc35815_restart(dev);
  2679. spin_unlock_irqrestore(&lp->lock, flags);
  2680. netif_device_attach(dev);
  2681. return 0;
  2682. }
  2683. #endif /* CONFIG_PM */
  2684. static struct pci_driver tc35815_pci_driver = {
  2685. .name = MODNAME,
  2686. .id_table = tc35815_pci_tbl,
  2687. .probe = tc35815_init_one,
  2688. .remove = __devexit_p(tc35815_remove_one),
  2689. #ifdef CONFIG_PM
  2690. .suspend = tc35815_suspend,
  2691. .resume = tc35815_resume,
  2692. #endif
  2693. };
  2694. module_param_named(speed, options.speed, int, 0);
  2695. MODULE_PARM_DESC(speed, "0:auto, 10:10Mbps, 100:100Mbps");
  2696. module_param_named(duplex, options.duplex, int, 0);
  2697. MODULE_PARM_DESC(duplex, "0:auto, 1:half, 2:full");
  2698. module_param_named(doforce, options.doforce, int, 0);
  2699. MODULE_PARM_DESC(doforce, "try force link mode if auto-negotiation failed");
  2700. static int __init tc35815_init_module(void)
  2701. {
  2702. return pci_register_driver(&tc35815_pci_driver);
  2703. }
  2704. static void __exit tc35815_cleanup_module(void)
  2705. {
  2706. pci_unregister_driver(&tc35815_pci_driver);
  2707. }
  2708. module_init(tc35815_init_module);
  2709. module_exit(tc35815_cleanup_module);
  2710. MODULE_DESCRIPTION("TOSHIBA TC35815 PCI 10M/100M Ethernet driver");
  2711. MODULE_LICENSE("GPL");