mpt2sas_base.c 99 KB

1234567891011121314151617181920212223242526272829303132333435363738394041424344454647484950515253545556575859606162636465666768697071727374757677787980818283848586878889909192939495969798991001011021031041051061071081091101111121131141151161171181191201211221231241251261271281291301311321331341351361371381391401411421431441451461471481491501511521531541551561571581591601611621631641651661671681691701711721731741751761771781791801811821831841851861871881891901911921931941951961971981992002012022032042052062072082092102112122132142152162172182192202212222232242252262272282292302312322332342352362372382392402412422432442452462472482492502512522532542552562572582592602612622632642652662672682692702712722732742752762772782792802812822832842852862872882892902912922932942952962972982993003013023033043053063073083093103113123133143153163173183193203213223233243253263273283293303313323333343353363373383393403413423433443453463473483493503513523533543553563573583593603613623633643653663673683693703713723733743753763773783793803813823833843853863873883893903913923933943953963973983994004014024034044054064074084094104114124134144154164174184194204214224234244254264274284294304314324334344354364374384394404414424434444454464474484494504514524534544554564574584594604614624634644654664674684694704714724734744754764774784794804814824834844854864874884894904914924934944954964974984995005015025035045055065075085095105115125135145155165175185195205215225235245255265275285295305315325335345355365375385395405415425435445455465475485495505515525535545555565575585595605615625635645655665675685695705715725735745755765775785795805815825835845855865875885895905915925935945955965975985996006016026036046056066076086096106116126136146156166176186196206216226236246256266276286296306316326336346356366376386396406416426436446456466476486496506516526536546556566576586596606616626636646656666676686696706716726736746756766776786796806816826836846856866876886896906916926936946956966976986997007017027037047057067077087097107117127137147157167177187197207217227237247257267277287297307317327337347357367377387397407417427437447457467477487497507517527537547557567577587597607617627637647657667677687697707717727737747757767777787797807817827837847857867877887897907917927937947957967977987998008018028038048058068078088098108118128138148158168178188198208218228238248258268278288298308318328338348358368378388398408418428438448458468478488498508518528538548558568578588598608618628638648658668678688698708718728738748758768778788798808818828838848858868878888898908918928938948958968978988999009019029039049059069079089099109119129139149159169179189199209219229239249259269279289299309319329339349359369379389399409419429439449459469479489499509519529539549559569579589599609619629639649659669679689699709719729739749759769779789799809819829839849859869879889899909919929939949959969979989991000100110021003100410051006100710081009101010111012101310141015101610171018101910201021102210231024102510261027102810291030103110321033103410351036103710381039104010411042104310441045104610471048104910501051105210531054105510561057105810591060106110621063106410651066106710681069107010711072107310741075107610771078107910801081108210831084108510861087108810891090109110921093109410951096109710981099110011011102110311041105110611071108110911101111111211131114111511161117111811191120112111221123112411251126112711281129113011311132113311341135113611371138113911401141114211431144114511461147114811491150115111521153115411551156115711581159116011611162116311641165116611671168116911701171117211731174117511761177117811791180118111821183118411851186118711881189119011911192119311941195119611971198119912001201120212031204120512061207120812091210121112121213121412151216121712181219122012211222122312241225122612271228122912301231123212331234123512361237123812391240124112421243124412451246124712481249125012511252125312541255125612571258125912601261126212631264126512661267126812691270127112721273127412751276127712781279128012811282128312841285128612871288128912901291129212931294129512961297129812991300130113021303130413051306130713081309131013111312131313141315131613171318131913201321132213231324132513261327132813291330133113321333133413351336133713381339134013411342134313441345134613471348134913501351135213531354135513561357135813591360136113621363136413651366136713681369137013711372137313741375137613771378137913801381138213831384138513861387138813891390139113921393139413951396139713981399140014011402140314041405140614071408140914101411141214131414141514161417141814191420142114221423142414251426142714281429143014311432143314341435143614371438143914401441144214431444144514461447144814491450145114521453145414551456145714581459146014611462146314641465146614671468146914701471147214731474147514761477147814791480148114821483148414851486148714881489149014911492149314941495149614971498149915001501150215031504150515061507150815091510151115121513151415151516151715181519152015211522152315241525152615271528152915301531153215331534153515361537153815391540154115421543154415451546154715481549155015511552155315541555155615571558155915601561156215631564156515661567156815691570157115721573157415751576157715781579158015811582158315841585158615871588158915901591159215931594159515961597159815991600160116021603160416051606160716081609161016111612161316141615161616171618161916201621162216231624162516261627162816291630163116321633163416351636163716381639164016411642164316441645164616471648164916501651165216531654165516561657165816591660166116621663166416651666166716681669167016711672167316741675167616771678167916801681168216831684168516861687168816891690169116921693169416951696169716981699170017011702170317041705170617071708170917101711171217131714171517161717171817191720172117221723172417251726172717281729173017311732173317341735173617371738173917401741174217431744174517461747174817491750175117521753175417551756175717581759176017611762176317641765176617671768176917701771177217731774177517761777177817791780178117821783178417851786178717881789179017911792179317941795179617971798179918001801180218031804180518061807180818091810181118121813181418151816181718181819182018211822182318241825182618271828182918301831183218331834183518361837183818391840184118421843184418451846184718481849185018511852185318541855185618571858185918601861186218631864186518661867186818691870187118721873187418751876187718781879188018811882188318841885188618871888188918901891189218931894189518961897189818991900190119021903190419051906190719081909191019111912191319141915191619171918191919201921192219231924192519261927192819291930193119321933193419351936193719381939194019411942194319441945194619471948194919501951195219531954195519561957195819591960196119621963196419651966196719681969197019711972197319741975197619771978197919801981198219831984198519861987198819891990199119921993199419951996199719981999200020012002200320042005200620072008200920102011201220132014201520162017201820192020202120222023202420252026202720282029203020312032203320342035203620372038203920402041204220432044204520462047204820492050205120522053205420552056205720582059206020612062206320642065206620672068206920702071207220732074207520762077207820792080208120822083208420852086208720882089209020912092209320942095209620972098209921002101210221032104210521062107210821092110211121122113211421152116211721182119212021212122212321242125212621272128212921302131213221332134213521362137213821392140214121422143214421452146214721482149215021512152215321542155215621572158215921602161216221632164216521662167216821692170217121722173217421752176217721782179218021812182218321842185218621872188218921902191219221932194219521962197219821992200220122022203220422052206220722082209221022112212221322142215221622172218221922202221222222232224222522262227222822292230223122322233223422352236223722382239224022412242224322442245224622472248224922502251225222532254225522562257225822592260226122622263226422652266226722682269227022712272227322742275227622772278227922802281228222832284228522862287228822892290229122922293229422952296229722982299230023012302230323042305230623072308230923102311231223132314231523162317231823192320232123222323232423252326232723282329233023312332233323342335233623372338233923402341234223432344234523462347234823492350235123522353235423552356235723582359236023612362236323642365236623672368236923702371237223732374237523762377237823792380238123822383238423852386238723882389239023912392239323942395239623972398239924002401240224032404240524062407240824092410241124122413241424152416241724182419242024212422242324242425242624272428242924302431243224332434243524362437243824392440244124422443244424452446244724482449245024512452245324542455245624572458245924602461246224632464246524662467246824692470247124722473247424752476247724782479248024812482248324842485248624872488248924902491249224932494249524962497249824992500250125022503250425052506250725082509251025112512251325142515251625172518251925202521252225232524252525262527252825292530253125322533253425352536253725382539254025412542254325442545254625472548254925502551255225532554255525562557255825592560256125622563256425652566256725682569257025712572257325742575257625772578257925802581258225832584258525862587258825892590259125922593259425952596259725982599260026012602260326042605260626072608260926102611261226132614261526162617261826192620262126222623262426252626262726282629263026312632263326342635263626372638263926402641264226432644264526462647264826492650265126522653265426552656265726582659266026612662266326642665266626672668266926702671267226732674267526762677267826792680268126822683268426852686268726882689269026912692269326942695269626972698269927002701270227032704270527062707270827092710271127122713271427152716271727182719272027212722272327242725272627272728272927302731273227332734273527362737273827392740274127422743274427452746274727482749275027512752275327542755275627572758275927602761276227632764276527662767276827692770277127722773277427752776277727782779278027812782278327842785278627872788278927902791279227932794279527962797279827992800280128022803280428052806280728082809281028112812281328142815281628172818281928202821282228232824282528262827282828292830283128322833283428352836283728382839284028412842284328442845284628472848284928502851285228532854285528562857285828592860286128622863286428652866286728682869287028712872287328742875287628772878287928802881288228832884288528862887288828892890289128922893289428952896289728982899290029012902290329042905290629072908290929102911291229132914291529162917291829192920292129222923292429252926292729282929293029312932293329342935293629372938293929402941294229432944294529462947294829492950295129522953295429552956295729582959296029612962296329642965296629672968296929702971297229732974297529762977297829792980298129822983298429852986298729882989299029912992299329942995299629972998299930003001300230033004300530063007300830093010301130123013301430153016301730183019302030213022302330243025302630273028302930303031303230333034303530363037303830393040304130423043304430453046304730483049305030513052305330543055305630573058305930603061306230633064306530663067306830693070307130723073307430753076307730783079308030813082308330843085308630873088308930903091309230933094309530963097309830993100310131023103310431053106310731083109311031113112311331143115311631173118311931203121312231233124312531263127312831293130313131323133313431353136313731383139314031413142314331443145314631473148314931503151315231533154315531563157315831593160316131623163316431653166316731683169317031713172317331743175317631773178317931803181318231833184318531863187318831893190319131923193319431953196319731983199320032013202320332043205320632073208320932103211321232133214321532163217321832193220322132223223322432253226322732283229323032313232323332343235323632373238323932403241324232433244324532463247324832493250325132523253325432553256325732583259326032613262326332643265326632673268326932703271327232733274327532763277327832793280328132823283328432853286328732883289329032913292329332943295329632973298329933003301330233033304330533063307330833093310331133123313331433153316331733183319332033213322332333243325332633273328332933303331333233333334333533363337333833393340334133423343334433453346334733483349335033513352335333543355335633573358335933603361336233633364336533663367336833693370337133723373337433753376337733783379338033813382338333843385338633873388338933903391339233933394339533963397339833993400340134023403340434053406340734083409341034113412341334143415341634173418341934203421342234233424342534263427342834293430343134323433343434353436343734383439344034413442344334443445344634473448344934503451345234533454345534563457345834593460346134623463346434653466346734683469347034713472347334743475347634773478347934803481348234833484348534863487348834893490349134923493349434953496349734983499350035013502350335043505350635073508
  1. /*
  2. * This is the Fusion MPT base driver providing common API layer interface
  3. * for access to MPT (Message Passing Technology) firmware.
  4. *
  5. * This code is based on drivers/scsi/mpt2sas/mpt2_base.c
  6. * Copyright (C) 2007-2008 LSI Corporation
  7. * (mailto:DL-MPTFusionLinux@lsi.com)
  8. *
  9. * This program is free software; you can redistribute it and/or
  10. * modify it under the terms of the GNU General Public License
  11. * as published by the Free Software Foundation; either version 2
  12. * of the License, or (at your option) any later version.
  13. *
  14. * This program is distributed in the hope that it will be useful,
  15. * but WITHOUT ANY WARRANTY; without even the implied warranty of
  16. * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
  17. * GNU General Public License for more details.
  18. *
  19. * NO WARRANTY
  20. * THE PROGRAM IS PROVIDED ON AN "AS IS" BASIS, WITHOUT WARRANTIES OR
  21. * CONDITIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED INCLUDING, WITHOUT
  22. * LIMITATION, ANY WARRANTIES OR CONDITIONS OF TITLE, NON-INFRINGEMENT,
  23. * MERCHANTABILITY OR FITNESS FOR A PARTICULAR PURPOSE. Each Recipient is
  24. * solely responsible for determining the appropriateness of using and
  25. * distributing the Program and assumes all risks associated with its
  26. * exercise of rights under this Agreement, including but not limited to
  27. * the risks and costs of program errors, damage to or loss of data,
  28. * programs or equipment, and unavailability or interruption of operations.
  29. * DISCLAIMER OF LIABILITY
  30. * NEITHER RECIPIENT NOR ANY CONTRIBUTORS SHALL HAVE ANY LIABILITY FOR ANY
  31. * DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
  32. * DAMAGES (INCLUDING WITHOUT LIMITATION LOST PROFITS), HOWEVER CAUSED AND
  33. * ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR
  34. * TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE
  35. * USE OR DISTRIBUTION OF THE PROGRAM OR THE EXERCISE OF ANY RIGHTS GRANTED
  36. * HEREUNDER, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGES
  37. * You should have received a copy of the GNU General Public License
  38. * along with this program; if not, write to the Free Software
  39. * Foundation, Inc., 51 Franklin Street, Fifth Floor, Boston, MA 02110-1301,
  40. * USA.
  41. */
  42. #include <linux/version.h>
  43. #include <linux/kernel.h>
  44. #include <linux/module.h>
  45. #include <linux/errno.h>
  46. #include <linux/init.h>
  47. #include <linux/slab.h>
  48. #include <linux/types.h>
  49. #include <linux/pci.h>
  50. #include <linux/kdev_t.h>
  51. #include <linux/blkdev.h>
  52. #include <linux/delay.h>
  53. #include <linux/interrupt.h>
  54. #include <linux/dma-mapping.h>
  55. #include <linux/sort.h>
  56. #include <linux/io.h>
  57. #include "mpt2sas_base.h"
  58. static MPT_CALLBACK mpt_callbacks[MPT_MAX_CALLBACKS];
  59. #define FAULT_POLLING_INTERVAL 1000 /* in milliseconds */
  60. #define MPT2SAS_MAX_REQUEST_QUEUE 500 /* maximum controller queue depth */
  61. static int max_queue_depth = -1;
  62. module_param(max_queue_depth, int, 0);
  63. MODULE_PARM_DESC(max_queue_depth, " max controller queue depth ");
  64. static int max_sgl_entries = -1;
  65. module_param(max_sgl_entries, int, 0);
  66. MODULE_PARM_DESC(max_sgl_entries, " max sg entries ");
  67. static int msix_disable = -1;
  68. module_param(msix_disable, int, 0);
  69. MODULE_PARM_DESC(msix_disable, " disable msix routed interrupts (default=0)");
  70. /**
  71. * _base_fault_reset_work - workq handling ioc fault conditions
  72. * @work: input argument, used to derive ioc
  73. * Context: sleep.
  74. *
  75. * Return nothing.
  76. */
  77. static void
  78. _base_fault_reset_work(struct work_struct *work)
  79. {
  80. struct MPT2SAS_ADAPTER *ioc =
  81. container_of(work, struct MPT2SAS_ADAPTER, fault_reset_work.work);
  82. unsigned long flags;
  83. u32 doorbell;
  84. int rc;
  85. spin_lock_irqsave(&ioc->ioc_reset_in_progress_lock, flags);
  86. if (ioc->ioc_reset_in_progress)
  87. goto rearm_timer;
  88. spin_unlock_irqrestore(&ioc->ioc_reset_in_progress_lock, flags);
  89. doorbell = mpt2sas_base_get_iocstate(ioc, 0);
  90. if ((doorbell & MPI2_IOC_STATE_MASK) == MPI2_IOC_STATE_FAULT) {
  91. rc = mpt2sas_base_hard_reset_handler(ioc, CAN_SLEEP,
  92. FORCE_BIG_HAMMER);
  93. printk(MPT2SAS_WARN_FMT "%s: hard reset: %s\n", ioc->name,
  94. __func__, (rc == 0) ? "success" : "failed");
  95. doorbell = mpt2sas_base_get_iocstate(ioc, 0);
  96. if ((doorbell & MPI2_IOC_STATE_MASK) == MPI2_IOC_STATE_FAULT)
  97. mpt2sas_base_fault_info(ioc, doorbell &
  98. MPI2_DOORBELL_DATA_MASK);
  99. }
  100. spin_lock_irqsave(&ioc->ioc_reset_in_progress_lock, flags);
  101. rearm_timer:
  102. if (ioc->fault_reset_work_q)
  103. queue_delayed_work(ioc->fault_reset_work_q,
  104. &ioc->fault_reset_work,
  105. msecs_to_jiffies(FAULT_POLLING_INTERVAL));
  106. spin_unlock_irqrestore(&ioc->ioc_reset_in_progress_lock, flags);
  107. }
  108. #ifdef CONFIG_SCSI_MPT2SAS_LOGGING
  109. /**
  110. * _base_sas_ioc_info - verbose translation of the ioc status
  111. * @ioc: pointer to scsi command object
  112. * @mpi_reply: reply mf payload returned from firmware
  113. * @request_hdr: request mf
  114. *
  115. * Return nothing.
  116. */
  117. static void
  118. _base_sas_ioc_info(struct MPT2SAS_ADAPTER *ioc, MPI2DefaultReply_t *mpi_reply,
  119. MPI2RequestHeader_t *request_hdr)
  120. {
  121. u16 ioc_status = le16_to_cpu(mpi_reply->IOCStatus) &
  122. MPI2_IOCSTATUS_MASK;
  123. char *desc = NULL;
  124. u16 frame_sz;
  125. char *func_str = NULL;
  126. /* SCSI_IO, RAID_PASS are handled from _scsih_scsi_ioc_info */
  127. if (request_hdr->Function == MPI2_FUNCTION_SCSI_IO_REQUEST ||
  128. request_hdr->Function == MPI2_FUNCTION_RAID_SCSI_IO_PASSTHROUGH ||
  129. request_hdr->Function == MPI2_FUNCTION_EVENT_NOTIFICATION)
  130. return;
  131. switch (ioc_status) {
  132. /****************************************************************************
  133. * Common IOCStatus values for all replies
  134. ****************************************************************************/
  135. case MPI2_IOCSTATUS_INVALID_FUNCTION:
  136. desc = "invalid function";
  137. break;
  138. case MPI2_IOCSTATUS_BUSY:
  139. desc = "busy";
  140. break;
  141. case MPI2_IOCSTATUS_INVALID_SGL:
  142. desc = "invalid sgl";
  143. break;
  144. case MPI2_IOCSTATUS_INTERNAL_ERROR:
  145. desc = "internal error";
  146. break;
  147. case MPI2_IOCSTATUS_INVALID_VPID:
  148. desc = "invalid vpid";
  149. break;
  150. case MPI2_IOCSTATUS_INSUFFICIENT_RESOURCES:
  151. desc = "insufficient resources";
  152. break;
  153. case MPI2_IOCSTATUS_INVALID_FIELD:
  154. desc = "invalid field";
  155. break;
  156. case MPI2_IOCSTATUS_INVALID_STATE:
  157. desc = "invalid state";
  158. break;
  159. case MPI2_IOCSTATUS_OP_STATE_NOT_SUPPORTED:
  160. desc = "op state not supported";
  161. break;
  162. /****************************************************************************
  163. * Config IOCStatus values
  164. ****************************************************************************/
  165. case MPI2_IOCSTATUS_CONFIG_INVALID_ACTION:
  166. desc = "config invalid action";
  167. break;
  168. case MPI2_IOCSTATUS_CONFIG_INVALID_TYPE:
  169. desc = "config invalid type";
  170. break;
  171. case MPI2_IOCSTATUS_CONFIG_INVALID_PAGE:
  172. desc = "config invalid page";
  173. break;
  174. case MPI2_IOCSTATUS_CONFIG_INVALID_DATA:
  175. desc = "config invalid data";
  176. break;
  177. case MPI2_IOCSTATUS_CONFIG_NO_DEFAULTS:
  178. desc = "config no defaults";
  179. break;
  180. case MPI2_IOCSTATUS_CONFIG_CANT_COMMIT:
  181. desc = "config cant commit";
  182. break;
  183. /****************************************************************************
  184. * SCSI IO Reply
  185. ****************************************************************************/
  186. case MPI2_IOCSTATUS_SCSI_RECOVERED_ERROR:
  187. case MPI2_IOCSTATUS_SCSI_INVALID_DEVHANDLE:
  188. case MPI2_IOCSTATUS_SCSI_DEVICE_NOT_THERE:
  189. case MPI2_IOCSTATUS_SCSI_DATA_OVERRUN:
  190. case MPI2_IOCSTATUS_SCSI_DATA_UNDERRUN:
  191. case MPI2_IOCSTATUS_SCSI_IO_DATA_ERROR:
  192. case MPI2_IOCSTATUS_SCSI_PROTOCOL_ERROR:
  193. case MPI2_IOCSTATUS_SCSI_TASK_TERMINATED:
  194. case MPI2_IOCSTATUS_SCSI_RESIDUAL_MISMATCH:
  195. case MPI2_IOCSTATUS_SCSI_TASK_MGMT_FAILED:
  196. case MPI2_IOCSTATUS_SCSI_IOC_TERMINATED:
  197. case MPI2_IOCSTATUS_SCSI_EXT_TERMINATED:
  198. break;
  199. /****************************************************************************
  200. * For use by SCSI Initiator and SCSI Target end-to-end data protection
  201. ****************************************************************************/
  202. case MPI2_IOCSTATUS_EEDP_GUARD_ERROR:
  203. desc = "eedp guard error";
  204. break;
  205. case MPI2_IOCSTATUS_EEDP_REF_TAG_ERROR:
  206. desc = "eedp ref tag error";
  207. break;
  208. case MPI2_IOCSTATUS_EEDP_APP_TAG_ERROR:
  209. desc = "eedp app tag error";
  210. break;
  211. /****************************************************************************
  212. * SCSI Target values
  213. ****************************************************************************/
  214. case MPI2_IOCSTATUS_TARGET_INVALID_IO_INDEX:
  215. desc = "target invalid io index";
  216. break;
  217. case MPI2_IOCSTATUS_TARGET_ABORTED:
  218. desc = "target aborted";
  219. break;
  220. case MPI2_IOCSTATUS_TARGET_NO_CONN_RETRYABLE:
  221. desc = "target no conn retryable";
  222. break;
  223. case MPI2_IOCSTATUS_TARGET_NO_CONNECTION:
  224. desc = "target no connection";
  225. break;
  226. case MPI2_IOCSTATUS_TARGET_XFER_COUNT_MISMATCH:
  227. desc = "target xfer count mismatch";
  228. break;
  229. case MPI2_IOCSTATUS_TARGET_DATA_OFFSET_ERROR:
  230. desc = "target data offset error";
  231. break;
  232. case MPI2_IOCSTATUS_TARGET_TOO_MUCH_WRITE_DATA:
  233. desc = "target too much write data";
  234. break;
  235. case MPI2_IOCSTATUS_TARGET_IU_TOO_SHORT:
  236. desc = "target iu too short";
  237. break;
  238. case MPI2_IOCSTATUS_TARGET_ACK_NAK_TIMEOUT:
  239. desc = "target ack nak timeout";
  240. break;
  241. case MPI2_IOCSTATUS_TARGET_NAK_RECEIVED:
  242. desc = "target nak received";
  243. break;
  244. /****************************************************************************
  245. * Serial Attached SCSI values
  246. ****************************************************************************/
  247. case MPI2_IOCSTATUS_SAS_SMP_REQUEST_FAILED:
  248. desc = "smp request failed";
  249. break;
  250. case MPI2_IOCSTATUS_SAS_SMP_DATA_OVERRUN:
  251. desc = "smp data overrun";
  252. break;
  253. /****************************************************************************
  254. * Diagnostic Buffer Post / Diagnostic Release values
  255. ****************************************************************************/
  256. case MPI2_IOCSTATUS_DIAGNOSTIC_RELEASED:
  257. desc = "diagnostic released";
  258. break;
  259. default:
  260. break;
  261. }
  262. if (!desc)
  263. return;
  264. switch (request_hdr->Function) {
  265. case MPI2_FUNCTION_CONFIG:
  266. frame_sz = sizeof(Mpi2ConfigRequest_t) + ioc->sge_size;
  267. func_str = "config_page";
  268. break;
  269. case MPI2_FUNCTION_SCSI_TASK_MGMT:
  270. frame_sz = sizeof(Mpi2SCSITaskManagementRequest_t);
  271. func_str = "task_mgmt";
  272. break;
  273. case MPI2_FUNCTION_SAS_IO_UNIT_CONTROL:
  274. frame_sz = sizeof(Mpi2SasIoUnitControlRequest_t);
  275. func_str = "sas_iounit_ctl";
  276. break;
  277. case MPI2_FUNCTION_SCSI_ENCLOSURE_PROCESSOR:
  278. frame_sz = sizeof(Mpi2SepRequest_t);
  279. func_str = "enclosure";
  280. break;
  281. case MPI2_FUNCTION_IOC_INIT:
  282. frame_sz = sizeof(Mpi2IOCInitRequest_t);
  283. func_str = "ioc_init";
  284. break;
  285. case MPI2_FUNCTION_PORT_ENABLE:
  286. frame_sz = sizeof(Mpi2PortEnableRequest_t);
  287. func_str = "port_enable";
  288. break;
  289. case MPI2_FUNCTION_SMP_PASSTHROUGH:
  290. frame_sz = sizeof(Mpi2SmpPassthroughRequest_t) + ioc->sge_size;
  291. func_str = "smp_passthru";
  292. break;
  293. default:
  294. frame_sz = 32;
  295. func_str = "unknown";
  296. break;
  297. }
  298. printk(MPT2SAS_WARN_FMT "ioc_status: %s(0x%04x), request(0x%p),"
  299. " (%s)\n", ioc->name, desc, ioc_status, request_hdr, func_str);
  300. _debug_dump_mf(request_hdr, frame_sz/4);
  301. }
  302. /**
  303. * _base_display_event_data - verbose translation of firmware asyn events
  304. * @ioc: pointer to scsi command object
  305. * @mpi_reply: reply mf payload returned from firmware
  306. *
  307. * Return nothing.
  308. */
  309. static void
  310. _base_display_event_data(struct MPT2SAS_ADAPTER *ioc,
  311. Mpi2EventNotificationReply_t *mpi_reply)
  312. {
  313. char *desc = NULL;
  314. u16 event;
  315. if (!(ioc->logging_level & MPT_DEBUG_EVENTS))
  316. return;
  317. event = le16_to_cpu(mpi_reply->Event);
  318. switch (event) {
  319. case MPI2_EVENT_LOG_DATA:
  320. desc = "Log Data";
  321. break;
  322. case MPI2_EVENT_STATE_CHANGE:
  323. desc = "Status Change";
  324. break;
  325. case MPI2_EVENT_HARD_RESET_RECEIVED:
  326. desc = "Hard Reset Received";
  327. break;
  328. case MPI2_EVENT_EVENT_CHANGE:
  329. desc = "Event Change";
  330. break;
  331. case MPI2_EVENT_TASK_SET_FULL:
  332. desc = "Task Set Full";
  333. break;
  334. case MPI2_EVENT_SAS_DEVICE_STATUS_CHANGE:
  335. desc = "Device Status Change";
  336. break;
  337. case MPI2_EVENT_IR_OPERATION_STATUS:
  338. desc = "IR Operation Status";
  339. break;
  340. case MPI2_EVENT_SAS_DISCOVERY:
  341. desc = "Discovery";
  342. break;
  343. case MPI2_EVENT_SAS_BROADCAST_PRIMITIVE:
  344. desc = "SAS Broadcast Primitive";
  345. break;
  346. case MPI2_EVENT_SAS_INIT_DEVICE_STATUS_CHANGE:
  347. desc = "SAS Init Device Status Change";
  348. break;
  349. case MPI2_EVENT_SAS_INIT_TABLE_OVERFLOW:
  350. desc = "SAS Init Table Overflow";
  351. break;
  352. case MPI2_EVENT_SAS_TOPOLOGY_CHANGE_LIST:
  353. desc = "SAS Topology Change List";
  354. break;
  355. case MPI2_EVENT_SAS_ENCL_DEVICE_STATUS_CHANGE:
  356. desc = "SAS Enclosure Device Status Change";
  357. break;
  358. case MPI2_EVENT_IR_VOLUME:
  359. desc = "IR Volume";
  360. break;
  361. case MPI2_EVENT_IR_PHYSICAL_DISK:
  362. desc = "IR Physical Disk";
  363. break;
  364. case MPI2_EVENT_IR_CONFIGURATION_CHANGE_LIST:
  365. desc = "IR Configuration Change List";
  366. break;
  367. case MPI2_EVENT_LOG_ENTRY_ADDED:
  368. desc = "Log Entry Added";
  369. break;
  370. }
  371. if (!desc)
  372. return;
  373. printk(MPT2SAS_INFO_FMT "%s\n", ioc->name, desc);
  374. }
  375. #endif
  376. /**
  377. * _base_sas_log_info - verbose translation of firmware log info
  378. * @ioc: pointer to scsi command object
  379. * @log_info: log info
  380. *
  381. * Return nothing.
  382. */
  383. static void
  384. _base_sas_log_info(struct MPT2SAS_ADAPTER *ioc , u32 log_info)
  385. {
  386. union loginfo_type {
  387. u32 loginfo;
  388. struct {
  389. u32 subcode:16;
  390. u32 code:8;
  391. u32 originator:4;
  392. u32 bus_type:4;
  393. } dw;
  394. };
  395. union loginfo_type sas_loginfo;
  396. char *originator_str = NULL;
  397. sas_loginfo.loginfo = log_info;
  398. if (sas_loginfo.dw.bus_type != 3 /*SAS*/)
  399. return;
  400. /* each nexus loss loginfo */
  401. if (log_info == 0x31170000)
  402. return;
  403. /* eat the loginfos associated with task aborts */
  404. if (ioc->ignore_loginfos && (log_info == 30050000 || log_info ==
  405. 0x31140000 || log_info == 0x31130000))
  406. return;
  407. switch (sas_loginfo.dw.originator) {
  408. case 0:
  409. originator_str = "IOP";
  410. break;
  411. case 1:
  412. originator_str = "PL";
  413. break;
  414. case 2:
  415. originator_str = "IR";
  416. break;
  417. }
  418. printk(MPT2SAS_WARN_FMT "log_info(0x%08x): originator(%s), "
  419. "code(0x%02x), sub_code(0x%04x)\n", ioc->name, log_info,
  420. originator_str, sas_loginfo.dw.code,
  421. sas_loginfo.dw.subcode);
  422. }
  423. /**
  424. * mpt2sas_base_fault_info - verbose translation of firmware FAULT code
  425. * @ioc: pointer to scsi command object
  426. * @fault_code: fault code
  427. *
  428. * Return nothing.
  429. */
  430. void
  431. mpt2sas_base_fault_info(struct MPT2SAS_ADAPTER *ioc , u16 fault_code)
  432. {
  433. printk(MPT2SAS_ERR_FMT "fault_state(0x%04x)!\n",
  434. ioc->name, fault_code);
  435. }
  436. /**
  437. * _base_display_reply_info -
  438. * @ioc: pointer to scsi command object
  439. * @smid: system request message index
  440. * @VF_ID: virtual function id
  441. * @reply: reply message frame(lower 32bit addr)
  442. *
  443. * Return nothing.
  444. */
  445. static void
  446. _base_display_reply_info(struct MPT2SAS_ADAPTER *ioc, u16 smid, u8 VF_ID,
  447. u32 reply)
  448. {
  449. MPI2DefaultReply_t *mpi_reply;
  450. u16 ioc_status;
  451. mpi_reply = mpt2sas_base_get_reply_virt_addr(ioc, reply);
  452. ioc_status = le16_to_cpu(mpi_reply->IOCStatus);
  453. #ifdef CONFIG_SCSI_MPT2SAS_LOGGING
  454. if ((ioc_status & MPI2_IOCSTATUS_MASK) &&
  455. (ioc->logging_level & MPT_DEBUG_REPLY)) {
  456. _base_sas_ioc_info(ioc , mpi_reply,
  457. mpt2sas_base_get_msg_frame(ioc, smid));
  458. }
  459. #endif
  460. if (ioc_status & MPI2_IOCSTATUS_FLAG_LOG_INFO_AVAILABLE)
  461. _base_sas_log_info(ioc, le32_to_cpu(mpi_reply->IOCLogInfo));
  462. }
  463. /**
  464. * mpt2sas_base_done - base internal command completion routine
  465. * @ioc: pointer to scsi command object
  466. * @smid: system request message index
  467. * @VF_ID: virtual function id
  468. * @reply: reply message frame(lower 32bit addr)
  469. *
  470. * Return nothing.
  471. */
  472. void
  473. mpt2sas_base_done(struct MPT2SAS_ADAPTER *ioc, u16 smid, u8 VF_ID, u32 reply)
  474. {
  475. MPI2DefaultReply_t *mpi_reply;
  476. mpi_reply = mpt2sas_base_get_reply_virt_addr(ioc, reply);
  477. if (mpi_reply && mpi_reply->Function == MPI2_FUNCTION_EVENT_ACK)
  478. return;
  479. if (ioc->base_cmds.status == MPT2_CMD_NOT_USED)
  480. return;
  481. ioc->base_cmds.status |= MPT2_CMD_COMPLETE;
  482. if (mpi_reply) {
  483. ioc->base_cmds.status |= MPT2_CMD_REPLY_VALID;
  484. memcpy(ioc->base_cmds.reply, mpi_reply, mpi_reply->MsgLength*4);
  485. }
  486. ioc->base_cmds.status &= ~MPT2_CMD_PENDING;
  487. complete(&ioc->base_cmds.done);
  488. }
  489. /**
  490. * _base_async_event - main callback handler for firmware asyn events
  491. * @ioc: pointer to scsi command object
  492. * @VF_ID: virtual function id
  493. * @reply: reply message frame(lower 32bit addr)
  494. *
  495. * Return nothing.
  496. */
  497. static void
  498. _base_async_event(struct MPT2SAS_ADAPTER *ioc, u8 VF_ID, u32 reply)
  499. {
  500. Mpi2EventNotificationReply_t *mpi_reply;
  501. Mpi2EventAckRequest_t *ack_request;
  502. u16 smid;
  503. mpi_reply = mpt2sas_base_get_reply_virt_addr(ioc, reply);
  504. if (!mpi_reply)
  505. return;
  506. if (mpi_reply->Function != MPI2_FUNCTION_EVENT_NOTIFICATION)
  507. return;
  508. #ifdef CONFIG_SCSI_MPT2SAS_LOGGING
  509. _base_display_event_data(ioc, mpi_reply);
  510. #endif
  511. if (!(mpi_reply->AckRequired & MPI2_EVENT_NOTIFICATION_ACK_REQUIRED))
  512. goto out;
  513. smid = mpt2sas_base_get_smid(ioc, ioc->base_cb_idx);
  514. if (!smid) {
  515. printk(MPT2SAS_ERR_FMT "%s: failed obtaining a smid\n",
  516. ioc->name, __func__);
  517. goto out;
  518. }
  519. ack_request = mpt2sas_base_get_msg_frame(ioc, smid);
  520. memset(ack_request, 0, sizeof(Mpi2EventAckRequest_t));
  521. ack_request->Function = MPI2_FUNCTION_EVENT_ACK;
  522. ack_request->Event = mpi_reply->Event;
  523. ack_request->EventContext = mpi_reply->EventContext;
  524. ack_request->VF_ID = VF_ID;
  525. mpt2sas_base_put_smid_default(ioc, smid, VF_ID);
  526. out:
  527. /* scsih callback handler */
  528. mpt2sas_scsih_event_callback(ioc, VF_ID, reply);
  529. /* ctl callback handler */
  530. mpt2sas_ctl_event_callback(ioc, VF_ID, reply);
  531. }
  532. /**
  533. * _base_mask_interrupts - disable interrupts
  534. * @ioc: pointer to scsi command object
  535. *
  536. * Disabling ResetIRQ, Reply and Doorbell Interrupts
  537. *
  538. * Return nothing.
  539. */
  540. static void
  541. _base_mask_interrupts(struct MPT2SAS_ADAPTER *ioc)
  542. {
  543. u32 him_register;
  544. ioc->mask_interrupts = 1;
  545. him_register = readl(&ioc->chip->HostInterruptMask);
  546. him_register |= MPI2_HIM_DIM + MPI2_HIM_RIM + MPI2_HIM_RESET_IRQ_MASK;
  547. writel(him_register, &ioc->chip->HostInterruptMask);
  548. readl(&ioc->chip->HostInterruptMask);
  549. }
  550. /**
  551. * _base_unmask_interrupts - enable interrupts
  552. * @ioc: pointer to scsi command object
  553. *
  554. * Enabling only Reply Interrupts
  555. *
  556. * Return nothing.
  557. */
  558. static void
  559. _base_unmask_interrupts(struct MPT2SAS_ADAPTER *ioc)
  560. {
  561. u32 him_register;
  562. writel(0, &ioc->chip->HostInterruptStatus);
  563. him_register = readl(&ioc->chip->HostInterruptMask);
  564. him_register &= ~MPI2_HIM_RIM;
  565. writel(him_register, &ioc->chip->HostInterruptMask);
  566. ioc->mask_interrupts = 0;
  567. }
  568. /**
  569. * _base_interrupt - MPT adapter (IOC) specific interrupt handler.
  570. * @irq: irq number (not used)
  571. * @bus_id: bus identifier cookie == pointer to MPT_ADAPTER structure
  572. * @r: pt_regs pointer (not used)
  573. *
  574. * Return IRQ_HANDLE if processed, else IRQ_NONE.
  575. */
  576. static irqreturn_t
  577. _base_interrupt(int irq, void *bus_id)
  578. {
  579. union reply_descriptor {
  580. u64 word;
  581. struct {
  582. u32 low;
  583. u32 high;
  584. } u;
  585. };
  586. union reply_descriptor rd;
  587. u32 post_index, post_index_next, completed_cmds;
  588. u8 request_desript_type;
  589. u16 smid;
  590. u8 cb_idx;
  591. u32 reply;
  592. u8 VF_ID;
  593. int i;
  594. struct MPT2SAS_ADAPTER *ioc = bus_id;
  595. if (ioc->mask_interrupts)
  596. return IRQ_NONE;
  597. post_index = ioc->reply_post_host_index;
  598. request_desript_type = ioc->reply_post_free[post_index].
  599. Default.ReplyFlags & MPI2_RPY_DESCRIPT_FLAGS_TYPE_MASK;
  600. if (request_desript_type == MPI2_RPY_DESCRIPT_FLAGS_UNUSED)
  601. return IRQ_NONE;
  602. completed_cmds = 0;
  603. do {
  604. rd.word = ioc->reply_post_free[post_index].Words;
  605. if (rd.u.low == UINT_MAX || rd.u.high == UINT_MAX)
  606. goto out;
  607. reply = 0;
  608. cb_idx = 0xFF;
  609. smid = le16_to_cpu(ioc->reply_post_free[post_index].
  610. Default.DescriptorTypeDependent1);
  611. VF_ID = ioc->reply_post_free[post_index].
  612. Default.VF_ID;
  613. if (request_desript_type ==
  614. MPI2_RPY_DESCRIPT_FLAGS_ADDRESS_REPLY) {
  615. reply = le32_to_cpu(ioc->reply_post_free[post_index].
  616. AddressReply.ReplyFrameAddress);
  617. } else if (request_desript_type ==
  618. MPI2_RPY_DESCRIPT_FLAGS_TARGET_COMMAND_BUFFER)
  619. goto next;
  620. else if (request_desript_type ==
  621. MPI2_RPY_DESCRIPT_FLAGS_TARGETASSIST_SUCCESS)
  622. goto next;
  623. if (smid)
  624. cb_idx = ioc->scsi_lookup[smid - 1].cb_idx;
  625. if (smid && cb_idx != 0xFF) {
  626. mpt_callbacks[cb_idx](ioc, smid, VF_ID, reply);
  627. if (reply)
  628. _base_display_reply_info(ioc, smid, VF_ID,
  629. reply);
  630. mpt2sas_base_free_smid(ioc, smid);
  631. }
  632. if (!smid)
  633. _base_async_event(ioc, VF_ID, reply);
  634. /* reply free queue handling */
  635. if (reply) {
  636. ioc->reply_free_host_index =
  637. (ioc->reply_free_host_index ==
  638. (ioc->reply_free_queue_depth - 1)) ?
  639. 0 : ioc->reply_free_host_index + 1;
  640. ioc->reply_free[ioc->reply_free_host_index] =
  641. cpu_to_le32(reply);
  642. writel(ioc->reply_free_host_index,
  643. &ioc->chip->ReplyFreeHostIndex);
  644. wmb();
  645. }
  646. next:
  647. post_index_next = (post_index == (ioc->reply_post_queue_depth -
  648. 1)) ? 0 : post_index + 1;
  649. request_desript_type =
  650. ioc->reply_post_free[post_index_next].Default.ReplyFlags
  651. & MPI2_RPY_DESCRIPT_FLAGS_TYPE_MASK;
  652. completed_cmds++;
  653. if (request_desript_type == MPI2_RPY_DESCRIPT_FLAGS_UNUSED)
  654. goto out;
  655. post_index = post_index_next;
  656. } while (1);
  657. out:
  658. if (!completed_cmds)
  659. return IRQ_NONE;
  660. /* reply post descriptor handling */
  661. post_index_next = ioc->reply_post_host_index;
  662. for (i = 0 ; i < completed_cmds; i++) {
  663. post_index = post_index_next;
  664. /* poison the reply post descriptor */
  665. ioc->reply_post_free[post_index_next].Words = ULLONG_MAX;
  666. post_index_next = (post_index ==
  667. (ioc->reply_post_queue_depth - 1))
  668. ? 0 : post_index + 1;
  669. }
  670. ioc->reply_post_host_index = post_index_next;
  671. writel(post_index_next, &ioc->chip->ReplyPostHostIndex);
  672. wmb();
  673. return IRQ_HANDLED;
  674. }
  675. /**
  676. * mpt2sas_base_release_callback_handler - clear interupt callback handler
  677. * @cb_idx: callback index
  678. *
  679. * Return nothing.
  680. */
  681. void
  682. mpt2sas_base_release_callback_handler(u8 cb_idx)
  683. {
  684. mpt_callbacks[cb_idx] = NULL;
  685. }
  686. /**
  687. * mpt2sas_base_register_callback_handler - obtain index for the interrupt callback handler
  688. * @cb_func: callback function
  689. *
  690. * Returns cb_func.
  691. */
  692. u8
  693. mpt2sas_base_register_callback_handler(MPT_CALLBACK cb_func)
  694. {
  695. u8 cb_idx;
  696. for (cb_idx = MPT_MAX_CALLBACKS-1; cb_idx; cb_idx--)
  697. if (mpt_callbacks[cb_idx] == NULL)
  698. break;
  699. mpt_callbacks[cb_idx] = cb_func;
  700. return cb_idx;
  701. }
  702. /**
  703. * mpt2sas_base_initialize_callback_handler - initialize the interrupt callback handler
  704. *
  705. * Return nothing.
  706. */
  707. void
  708. mpt2sas_base_initialize_callback_handler(void)
  709. {
  710. u8 cb_idx;
  711. for (cb_idx = 0; cb_idx < MPT_MAX_CALLBACKS; cb_idx++)
  712. mpt2sas_base_release_callback_handler(cb_idx);
  713. }
  714. /**
  715. * mpt2sas_base_build_zero_len_sge - build zero length sg entry
  716. * @ioc: per adapter object
  717. * @paddr: virtual address for SGE
  718. *
  719. * Create a zero length scatter gather entry to insure the IOCs hardware has
  720. * something to use if the target device goes brain dead and tries
  721. * to send data even when none is asked for.
  722. *
  723. * Return nothing.
  724. */
  725. void
  726. mpt2sas_base_build_zero_len_sge(struct MPT2SAS_ADAPTER *ioc, void *paddr)
  727. {
  728. u32 flags_length = (u32)((MPI2_SGE_FLAGS_LAST_ELEMENT |
  729. MPI2_SGE_FLAGS_END_OF_BUFFER | MPI2_SGE_FLAGS_END_OF_LIST |
  730. MPI2_SGE_FLAGS_SIMPLE_ELEMENT) <<
  731. MPI2_SGE_FLAGS_SHIFT);
  732. ioc->base_add_sg_single(paddr, flags_length, -1);
  733. }
  734. /**
  735. * _base_add_sg_single_32 - Place a simple 32 bit SGE at address pAddr.
  736. * @paddr: virtual address for SGE
  737. * @flags_length: SGE flags and data transfer length
  738. * @dma_addr: Physical address
  739. *
  740. * Return nothing.
  741. */
  742. static void
  743. _base_add_sg_single_32(void *paddr, u32 flags_length, dma_addr_t dma_addr)
  744. {
  745. Mpi2SGESimple32_t *sgel = paddr;
  746. flags_length |= (MPI2_SGE_FLAGS_32_BIT_ADDRESSING |
  747. MPI2_SGE_FLAGS_SYSTEM_ADDRESS) << MPI2_SGE_FLAGS_SHIFT;
  748. sgel->FlagsLength = cpu_to_le32(flags_length);
  749. sgel->Address = cpu_to_le32(dma_addr);
  750. }
  751. /**
  752. * _base_add_sg_single_64 - Place a simple 64 bit SGE at address pAddr.
  753. * @paddr: virtual address for SGE
  754. * @flags_length: SGE flags and data transfer length
  755. * @dma_addr: Physical address
  756. *
  757. * Return nothing.
  758. */
  759. static void
  760. _base_add_sg_single_64(void *paddr, u32 flags_length, dma_addr_t dma_addr)
  761. {
  762. Mpi2SGESimple64_t *sgel = paddr;
  763. flags_length |= (MPI2_SGE_FLAGS_64_BIT_ADDRESSING |
  764. MPI2_SGE_FLAGS_SYSTEM_ADDRESS) << MPI2_SGE_FLAGS_SHIFT;
  765. sgel->FlagsLength = cpu_to_le32(flags_length);
  766. sgel->Address = cpu_to_le64(dma_addr);
  767. }
  768. #define convert_to_kb(x) ((x) << (PAGE_SHIFT - 10))
  769. /**
  770. * _base_config_dma_addressing - set dma addressing
  771. * @ioc: per adapter object
  772. * @pdev: PCI device struct
  773. *
  774. * Returns 0 for success, non-zero for failure.
  775. */
  776. static int
  777. _base_config_dma_addressing(struct MPT2SAS_ADAPTER *ioc, struct pci_dev *pdev)
  778. {
  779. struct sysinfo s;
  780. char *desc = NULL;
  781. if (sizeof(dma_addr_t) > 4) {
  782. const uint64_t required_mask =
  783. dma_get_required_mask(&pdev->dev);
  784. if ((required_mask > DMA_BIT_MASK(32)) && !pci_set_dma_mask(pdev,
  785. DMA_BIT_MASK(64)) && !pci_set_consistent_dma_mask(pdev,
  786. DMA_BIT_MASK(64))) {
  787. ioc->base_add_sg_single = &_base_add_sg_single_64;
  788. ioc->sge_size = sizeof(Mpi2SGESimple64_t);
  789. desc = "64";
  790. goto out;
  791. }
  792. }
  793. if (!pci_set_dma_mask(pdev, DMA_BIT_MASK(32))
  794. && !pci_set_consistent_dma_mask(pdev, DMA_BIT_MASK(32))) {
  795. ioc->base_add_sg_single = &_base_add_sg_single_32;
  796. ioc->sge_size = sizeof(Mpi2SGESimple32_t);
  797. desc = "32";
  798. } else
  799. return -ENODEV;
  800. out:
  801. si_meminfo(&s);
  802. printk(MPT2SAS_INFO_FMT "%s BIT PCI BUS DMA ADDRESSING SUPPORTED, "
  803. "total mem (%ld kB)\n", ioc->name, desc, convert_to_kb(s.totalram));
  804. return 0;
  805. }
  806. /**
  807. * _base_save_msix_table - backup msix vector table
  808. * @ioc: per adapter object
  809. *
  810. * This address an errata where diag reset clears out the table
  811. */
  812. static void
  813. _base_save_msix_table(struct MPT2SAS_ADAPTER *ioc)
  814. {
  815. int i;
  816. if (!ioc->msix_enable || ioc->msix_table_backup == NULL)
  817. return;
  818. for (i = 0; i < ioc->msix_vector_count; i++)
  819. ioc->msix_table_backup[i] = ioc->msix_table[i];
  820. }
  821. /**
  822. * _base_restore_msix_table - this restores the msix vector table
  823. * @ioc: per adapter object
  824. *
  825. */
  826. static void
  827. _base_restore_msix_table(struct MPT2SAS_ADAPTER *ioc)
  828. {
  829. int i;
  830. if (!ioc->msix_enable || ioc->msix_table_backup == NULL)
  831. return;
  832. for (i = 0; i < ioc->msix_vector_count; i++)
  833. ioc->msix_table[i] = ioc->msix_table_backup[i];
  834. }
  835. /**
  836. * _base_check_enable_msix - checks MSIX capabable.
  837. * @ioc: per adapter object
  838. *
  839. * Check to see if card is capable of MSIX, and set number
  840. * of avaliable msix vectors
  841. */
  842. static int
  843. _base_check_enable_msix(struct MPT2SAS_ADAPTER *ioc)
  844. {
  845. int base;
  846. u16 message_control;
  847. u32 msix_table_offset;
  848. base = pci_find_capability(ioc->pdev, PCI_CAP_ID_MSIX);
  849. if (!base) {
  850. dfailprintk(ioc, printk(MPT2SAS_INFO_FMT "msix not "
  851. "supported\n", ioc->name));
  852. return -EINVAL;
  853. }
  854. /* get msix vector count */
  855. pci_read_config_word(ioc->pdev, base + 2, &message_control);
  856. ioc->msix_vector_count = (message_control & 0x3FF) + 1;
  857. /* get msix table */
  858. pci_read_config_dword(ioc->pdev, base + 4, &msix_table_offset);
  859. msix_table_offset &= 0xFFFFFFF8;
  860. ioc->msix_table = (u32 *)((void *)ioc->chip + msix_table_offset);
  861. dinitprintk(ioc, printk(MPT2SAS_INFO_FMT "msix is supported, "
  862. "vector_count(%d), table_offset(0x%08x), table(%p)\n", ioc->name,
  863. ioc->msix_vector_count, msix_table_offset, ioc->msix_table));
  864. return 0;
  865. }
  866. /**
  867. * _base_disable_msix - disables msix
  868. * @ioc: per adapter object
  869. *
  870. */
  871. static void
  872. _base_disable_msix(struct MPT2SAS_ADAPTER *ioc)
  873. {
  874. if (ioc->msix_enable) {
  875. pci_disable_msix(ioc->pdev);
  876. kfree(ioc->msix_table_backup);
  877. ioc->msix_table_backup = NULL;
  878. ioc->msix_enable = 0;
  879. }
  880. }
  881. /**
  882. * _base_enable_msix - enables msix, failback to io_apic
  883. * @ioc: per adapter object
  884. *
  885. */
  886. static int
  887. _base_enable_msix(struct MPT2SAS_ADAPTER *ioc)
  888. {
  889. struct msix_entry entries;
  890. int r;
  891. u8 try_msix = 0;
  892. if (msix_disable == -1 || msix_disable == 0)
  893. try_msix = 1;
  894. if (!try_msix)
  895. goto try_ioapic;
  896. if (_base_check_enable_msix(ioc) != 0)
  897. goto try_ioapic;
  898. ioc->msix_table_backup = kcalloc(ioc->msix_vector_count,
  899. sizeof(u32), GFP_KERNEL);
  900. if (!ioc->msix_table_backup) {
  901. dfailprintk(ioc, printk(MPT2SAS_INFO_FMT "allocation for "
  902. "msix_table_backup failed!!!\n", ioc->name));
  903. goto try_ioapic;
  904. }
  905. memset(&entries, 0, sizeof(struct msix_entry));
  906. r = pci_enable_msix(ioc->pdev, &entries, 1);
  907. if (r) {
  908. dfailprintk(ioc, printk(MPT2SAS_INFO_FMT "pci_enable_msix "
  909. "failed (r=%d) !!!\n", ioc->name, r));
  910. goto try_ioapic;
  911. }
  912. r = request_irq(entries.vector, _base_interrupt, IRQF_SHARED,
  913. ioc->name, ioc);
  914. if (r) {
  915. dfailprintk(ioc, printk(MPT2SAS_INFO_FMT "unable to allocate "
  916. "interrupt %d !!!\n", ioc->name, entries.vector));
  917. pci_disable_msix(ioc->pdev);
  918. goto try_ioapic;
  919. }
  920. ioc->pci_irq = entries.vector;
  921. ioc->msix_enable = 1;
  922. return 0;
  923. /* failback to io_apic interrupt routing */
  924. try_ioapic:
  925. r = request_irq(ioc->pdev->irq, _base_interrupt, IRQF_SHARED,
  926. ioc->name, ioc);
  927. if (r) {
  928. printk(MPT2SAS_ERR_FMT "unable to allocate interrupt %d!\n",
  929. ioc->name, ioc->pdev->irq);
  930. r = -EBUSY;
  931. goto out_fail;
  932. }
  933. ioc->pci_irq = ioc->pdev->irq;
  934. return 0;
  935. out_fail:
  936. return r;
  937. }
  938. /**
  939. * mpt2sas_base_map_resources - map in controller resources (io/irq/memap)
  940. * @ioc: per adapter object
  941. *
  942. * Returns 0 for success, non-zero for failure.
  943. */
  944. int
  945. mpt2sas_base_map_resources(struct MPT2SAS_ADAPTER *ioc)
  946. {
  947. struct pci_dev *pdev = ioc->pdev;
  948. u32 memap_sz;
  949. u32 pio_sz;
  950. int i, r = 0;
  951. dinitprintk(ioc, printk(MPT2SAS_DEBUG_FMT "%s\n",
  952. ioc->name, __func__));
  953. ioc->bars = pci_select_bars(pdev, IORESOURCE_MEM);
  954. if (pci_enable_device_mem(pdev)) {
  955. printk(MPT2SAS_WARN_FMT "pci_enable_device_mem: "
  956. "failed\n", ioc->name);
  957. return -ENODEV;
  958. }
  959. if (pci_request_selected_regions(pdev, ioc->bars,
  960. MPT2SAS_DRIVER_NAME)) {
  961. printk(MPT2SAS_WARN_FMT "pci_request_selected_regions: "
  962. "failed\n", ioc->name);
  963. r = -ENODEV;
  964. goto out_fail;
  965. }
  966. pci_set_master(pdev);
  967. if (_base_config_dma_addressing(ioc, pdev) != 0) {
  968. printk(MPT2SAS_WARN_FMT "no suitable DMA mask for %s\n",
  969. ioc->name, pci_name(pdev));
  970. r = -ENODEV;
  971. goto out_fail;
  972. }
  973. for (i = 0, memap_sz = 0, pio_sz = 0 ; i < DEVICE_COUNT_RESOURCE; i++) {
  974. if (pci_resource_flags(pdev, i) & PCI_BASE_ADDRESS_SPACE_IO) {
  975. if (pio_sz)
  976. continue;
  977. ioc->pio_chip = pci_resource_start(pdev, i);
  978. pio_sz = pci_resource_len(pdev, i);
  979. } else {
  980. if (memap_sz)
  981. continue;
  982. ioc->chip_phys = pci_resource_start(pdev, i);
  983. memap_sz = pci_resource_len(pdev, i);
  984. ioc->chip = ioremap(ioc->chip_phys, memap_sz);
  985. if (ioc->chip == NULL) {
  986. printk(MPT2SAS_ERR_FMT "unable to map adapter "
  987. "memory!\n", ioc->name);
  988. r = -EINVAL;
  989. goto out_fail;
  990. }
  991. }
  992. }
  993. pci_set_drvdata(pdev, ioc->shost);
  994. _base_mask_interrupts(ioc);
  995. r = _base_enable_msix(ioc);
  996. if (r)
  997. goto out_fail;
  998. printk(MPT2SAS_INFO_FMT "%s: IRQ %d\n",
  999. ioc->name, ((ioc->msix_enable) ? "PCI-MSI-X enabled" :
  1000. "IO-APIC enabled"), ioc->pci_irq);
  1001. printk(MPT2SAS_INFO_FMT "iomem(0x%lx), mapped(0x%p), size(%d)\n",
  1002. ioc->name, ioc->chip_phys, ioc->chip, memap_sz);
  1003. printk(MPT2SAS_INFO_FMT "ioport(0x%lx), size(%d)\n",
  1004. ioc->name, ioc->pio_chip, pio_sz);
  1005. return 0;
  1006. out_fail:
  1007. if (ioc->chip_phys)
  1008. iounmap(ioc->chip);
  1009. ioc->chip_phys = 0;
  1010. ioc->pci_irq = -1;
  1011. pci_release_selected_regions(ioc->pdev, ioc->bars);
  1012. pci_disable_device(pdev);
  1013. pci_set_drvdata(pdev, NULL);
  1014. return r;
  1015. }
  1016. /**
  1017. * mpt2sas_base_get_msg_frame_dma - obtain request mf pointer phys addr
  1018. * @ioc: per adapter object
  1019. * @smid: system request message index(smid zero is invalid)
  1020. *
  1021. * Returns phys pointer to message frame.
  1022. */
  1023. dma_addr_t
  1024. mpt2sas_base_get_msg_frame_dma(struct MPT2SAS_ADAPTER *ioc, u16 smid)
  1025. {
  1026. return ioc->request_dma + (smid * ioc->request_sz);
  1027. }
  1028. /**
  1029. * mpt2sas_base_get_msg_frame - obtain request mf pointer
  1030. * @ioc: per adapter object
  1031. * @smid: system request message index(smid zero is invalid)
  1032. *
  1033. * Returns virt pointer to message frame.
  1034. */
  1035. void *
  1036. mpt2sas_base_get_msg_frame(struct MPT2SAS_ADAPTER *ioc, u16 smid)
  1037. {
  1038. return (void *)(ioc->request + (smid * ioc->request_sz));
  1039. }
  1040. /**
  1041. * mpt2sas_base_get_sense_buffer - obtain a sense buffer assigned to a mf request
  1042. * @ioc: per adapter object
  1043. * @smid: system request message index
  1044. *
  1045. * Returns virt pointer to sense buffer.
  1046. */
  1047. void *
  1048. mpt2sas_base_get_sense_buffer(struct MPT2SAS_ADAPTER *ioc, u16 smid)
  1049. {
  1050. return (void *)(ioc->sense + ((smid - 1) * SCSI_SENSE_BUFFERSIZE));
  1051. }
  1052. /**
  1053. * mpt2sas_base_get_sense_buffer_dma - obtain a sense buffer assigned to a mf request
  1054. * @ioc: per adapter object
  1055. * @smid: system request message index
  1056. *
  1057. * Returns phys pointer to sense buffer.
  1058. */
  1059. dma_addr_t
  1060. mpt2sas_base_get_sense_buffer_dma(struct MPT2SAS_ADAPTER *ioc, u16 smid)
  1061. {
  1062. return ioc->sense_dma + ((smid - 1) * SCSI_SENSE_BUFFERSIZE);
  1063. }
  1064. /**
  1065. * mpt2sas_base_get_reply_virt_addr - obtain reply frames virt address
  1066. * @ioc: per adapter object
  1067. * @phys_addr: lower 32 physical addr of the reply
  1068. *
  1069. * Converts 32bit lower physical addr into a virt address.
  1070. */
  1071. void *
  1072. mpt2sas_base_get_reply_virt_addr(struct MPT2SAS_ADAPTER *ioc, u32 phys_addr)
  1073. {
  1074. if (!phys_addr)
  1075. return NULL;
  1076. return ioc->reply + (phys_addr - (u32)ioc->reply_dma);
  1077. }
  1078. /**
  1079. * mpt2sas_base_get_smid - obtain a free smid
  1080. * @ioc: per adapter object
  1081. * @cb_idx: callback index
  1082. *
  1083. * Returns smid (zero is invalid)
  1084. */
  1085. u16
  1086. mpt2sas_base_get_smid(struct MPT2SAS_ADAPTER *ioc, u8 cb_idx)
  1087. {
  1088. unsigned long flags;
  1089. struct request_tracker *request;
  1090. u16 smid;
  1091. spin_lock_irqsave(&ioc->scsi_lookup_lock, flags);
  1092. if (list_empty(&ioc->free_list)) {
  1093. spin_unlock_irqrestore(&ioc->scsi_lookup_lock, flags);
  1094. printk(MPT2SAS_ERR_FMT "%s: smid not available\n",
  1095. ioc->name, __func__);
  1096. return 0;
  1097. }
  1098. request = list_entry(ioc->free_list.next,
  1099. struct request_tracker, tracker_list);
  1100. request->cb_idx = cb_idx;
  1101. smid = request->smid;
  1102. list_del(&request->tracker_list);
  1103. spin_unlock_irqrestore(&ioc->scsi_lookup_lock, flags);
  1104. return smid;
  1105. }
  1106. /**
  1107. * mpt2sas_base_free_smid - put smid back on free_list
  1108. * @ioc: per adapter object
  1109. * @smid: system request message index
  1110. *
  1111. * Return nothing.
  1112. */
  1113. void
  1114. mpt2sas_base_free_smid(struct MPT2SAS_ADAPTER *ioc, u16 smid)
  1115. {
  1116. unsigned long flags;
  1117. spin_lock_irqsave(&ioc->scsi_lookup_lock, flags);
  1118. ioc->scsi_lookup[smid - 1].cb_idx = 0xFF;
  1119. list_add_tail(&ioc->scsi_lookup[smid - 1].tracker_list,
  1120. &ioc->free_list);
  1121. spin_unlock_irqrestore(&ioc->scsi_lookup_lock, flags);
  1122. /*
  1123. * See _wait_for_commands_to_complete() call with regards to this code.
  1124. */
  1125. if (ioc->shost_recovery && ioc->pending_io_count) {
  1126. if (ioc->pending_io_count == 1)
  1127. wake_up(&ioc->reset_wq);
  1128. ioc->pending_io_count--;
  1129. }
  1130. }
  1131. /**
  1132. * _base_writeq - 64 bit write to MMIO
  1133. * @ioc: per adapter object
  1134. * @b: data payload
  1135. * @addr: address in MMIO space
  1136. * @writeq_lock: spin lock
  1137. *
  1138. * Glue for handling an atomic 64 bit word to MMIO. This special handling takes
  1139. * care of 32 bit environment where its not quarenteed to send the entire word
  1140. * in one transfer.
  1141. */
  1142. #ifndef writeq
  1143. static inline void _base_writeq(__u64 b, volatile void __iomem *addr,
  1144. spinlock_t *writeq_lock)
  1145. {
  1146. unsigned long flags;
  1147. __u64 data_out = cpu_to_le64(b);
  1148. spin_lock_irqsave(writeq_lock, flags);
  1149. writel((u32)(data_out), addr);
  1150. writel((u32)(data_out >> 32), (addr + 4));
  1151. spin_unlock_irqrestore(writeq_lock, flags);
  1152. }
  1153. #else
  1154. static inline void _base_writeq(__u64 b, volatile void __iomem *addr,
  1155. spinlock_t *writeq_lock)
  1156. {
  1157. writeq(cpu_to_le64(b), addr);
  1158. }
  1159. #endif
  1160. /**
  1161. * mpt2sas_base_put_smid_scsi_io - send SCSI_IO request to firmware
  1162. * @ioc: per adapter object
  1163. * @smid: system request message index
  1164. * @vf_id: virtual function id
  1165. * @handle: device handle
  1166. *
  1167. * Return nothing.
  1168. */
  1169. void
  1170. mpt2sas_base_put_smid_scsi_io(struct MPT2SAS_ADAPTER *ioc, u16 smid, u8 vf_id,
  1171. u16 handle)
  1172. {
  1173. Mpi2RequestDescriptorUnion_t descriptor;
  1174. u64 *request = (u64 *)&descriptor;
  1175. descriptor.SCSIIO.RequestFlags = MPI2_REQ_DESCRIPT_FLAGS_SCSI_IO;
  1176. descriptor.SCSIIO.VF_ID = vf_id;
  1177. descriptor.SCSIIO.SMID = cpu_to_le16(smid);
  1178. descriptor.SCSIIO.DevHandle = cpu_to_le16(handle);
  1179. descriptor.SCSIIO.LMID = 0;
  1180. _base_writeq(*request, &ioc->chip->RequestDescriptorPostLow,
  1181. &ioc->scsi_lookup_lock);
  1182. }
  1183. /**
  1184. * mpt2sas_base_put_smid_hi_priority - send Task Managment request to firmware
  1185. * @ioc: per adapter object
  1186. * @smid: system request message index
  1187. * @vf_id: virtual function id
  1188. *
  1189. * Return nothing.
  1190. */
  1191. void
  1192. mpt2sas_base_put_smid_hi_priority(struct MPT2SAS_ADAPTER *ioc, u16 smid,
  1193. u8 vf_id)
  1194. {
  1195. Mpi2RequestDescriptorUnion_t descriptor;
  1196. u64 *request = (u64 *)&descriptor;
  1197. descriptor.HighPriority.RequestFlags =
  1198. MPI2_REQ_DESCRIPT_FLAGS_HIGH_PRIORITY;
  1199. descriptor.HighPriority.VF_ID = vf_id;
  1200. descriptor.HighPriority.SMID = cpu_to_le16(smid);
  1201. descriptor.HighPriority.LMID = 0;
  1202. descriptor.HighPriority.Reserved1 = 0;
  1203. _base_writeq(*request, &ioc->chip->RequestDescriptorPostLow,
  1204. &ioc->scsi_lookup_lock);
  1205. }
  1206. /**
  1207. * mpt2sas_base_put_smid_default - Default, primarily used for config pages
  1208. * @ioc: per adapter object
  1209. * @smid: system request message index
  1210. * @vf_id: virtual function id
  1211. *
  1212. * Return nothing.
  1213. */
  1214. void
  1215. mpt2sas_base_put_smid_default(struct MPT2SAS_ADAPTER *ioc, u16 smid, u8 vf_id)
  1216. {
  1217. Mpi2RequestDescriptorUnion_t descriptor;
  1218. u64 *request = (u64 *)&descriptor;
  1219. descriptor.Default.RequestFlags = MPI2_REQ_DESCRIPT_FLAGS_DEFAULT_TYPE;
  1220. descriptor.Default.VF_ID = vf_id;
  1221. descriptor.Default.SMID = cpu_to_le16(smid);
  1222. descriptor.Default.LMID = 0;
  1223. descriptor.Default.DescriptorTypeDependent = 0;
  1224. _base_writeq(*request, &ioc->chip->RequestDescriptorPostLow,
  1225. &ioc->scsi_lookup_lock);
  1226. }
  1227. /**
  1228. * mpt2sas_base_put_smid_target_assist - send Target Assist/Status to firmware
  1229. * @ioc: per adapter object
  1230. * @smid: system request message index
  1231. * @vf_id: virtual function id
  1232. * @io_index: value used to track the IO
  1233. *
  1234. * Return nothing.
  1235. */
  1236. void
  1237. mpt2sas_base_put_smid_target_assist(struct MPT2SAS_ADAPTER *ioc, u16 smid,
  1238. u8 vf_id, u16 io_index)
  1239. {
  1240. Mpi2RequestDescriptorUnion_t descriptor;
  1241. u64 *request = (u64 *)&descriptor;
  1242. descriptor.SCSITarget.RequestFlags =
  1243. MPI2_REQ_DESCRIPT_FLAGS_SCSI_TARGET;
  1244. descriptor.SCSITarget.VF_ID = vf_id;
  1245. descriptor.SCSITarget.SMID = cpu_to_le16(smid);
  1246. descriptor.SCSITarget.LMID = 0;
  1247. descriptor.SCSITarget.IoIndex = cpu_to_le16(io_index);
  1248. _base_writeq(*request, &ioc->chip->RequestDescriptorPostLow,
  1249. &ioc->scsi_lookup_lock);
  1250. }
  1251. /**
  1252. * _base_display_dell_branding - Disply branding string
  1253. * @ioc: per adapter object
  1254. *
  1255. * Return nothing.
  1256. */
  1257. static void
  1258. _base_display_dell_branding(struct MPT2SAS_ADAPTER *ioc)
  1259. {
  1260. char dell_branding[MPT2SAS_DELL_BRANDING_SIZE];
  1261. if (ioc->pdev->subsystem_vendor != PCI_VENDOR_ID_DELL)
  1262. return;
  1263. memset(dell_branding, 0, MPT2SAS_DELL_BRANDING_SIZE);
  1264. switch (ioc->pdev->subsystem_device) {
  1265. case MPT2SAS_DELL_6GBPS_SAS_HBA_SSDID:
  1266. strncpy(dell_branding, MPT2SAS_DELL_6GBPS_SAS_HBA_BRANDING,
  1267. MPT2SAS_DELL_BRANDING_SIZE - 1);
  1268. break;
  1269. case MPT2SAS_DELL_PERC_H200_ADAPTER_SSDID:
  1270. strncpy(dell_branding, MPT2SAS_DELL_PERC_H200_ADAPTER_BRANDING,
  1271. MPT2SAS_DELL_BRANDING_SIZE - 1);
  1272. break;
  1273. case MPT2SAS_DELL_PERC_H200_INTEGRATED_SSDID:
  1274. strncpy(dell_branding,
  1275. MPT2SAS_DELL_PERC_H200_INTEGRATED_BRANDING,
  1276. MPT2SAS_DELL_BRANDING_SIZE - 1);
  1277. break;
  1278. case MPT2SAS_DELL_PERC_H200_MODULAR_SSDID:
  1279. strncpy(dell_branding,
  1280. MPT2SAS_DELL_PERC_H200_MODULAR_BRANDING,
  1281. MPT2SAS_DELL_BRANDING_SIZE - 1);
  1282. break;
  1283. case MPT2SAS_DELL_PERC_H200_EMBEDDED_SSDID:
  1284. strncpy(dell_branding,
  1285. MPT2SAS_DELL_PERC_H200_EMBEDDED_BRANDING,
  1286. MPT2SAS_DELL_BRANDING_SIZE - 1);
  1287. break;
  1288. case MPT2SAS_DELL_PERC_H200_SSDID:
  1289. strncpy(dell_branding, MPT2SAS_DELL_PERC_H200_BRANDING,
  1290. MPT2SAS_DELL_BRANDING_SIZE - 1);
  1291. break;
  1292. case MPT2SAS_DELL_6GBPS_SAS_SSDID:
  1293. strncpy(dell_branding, MPT2SAS_DELL_6GBPS_SAS_BRANDING,
  1294. MPT2SAS_DELL_BRANDING_SIZE - 1);
  1295. break;
  1296. default:
  1297. sprintf(dell_branding, "0x%4X", ioc->pdev->subsystem_device);
  1298. break;
  1299. }
  1300. printk(MPT2SAS_INFO_FMT "%s: Vendor(0x%04X), Device(0x%04X),"
  1301. " SSVID(0x%04X), SSDID(0x%04X)\n", ioc->name, dell_branding,
  1302. ioc->pdev->vendor, ioc->pdev->device, ioc->pdev->subsystem_vendor,
  1303. ioc->pdev->subsystem_device);
  1304. }
  1305. /**
  1306. * _base_display_ioc_capabilities - Disply IOC's capabilities.
  1307. * @ioc: per adapter object
  1308. *
  1309. * Return nothing.
  1310. */
  1311. static void
  1312. _base_display_ioc_capabilities(struct MPT2SAS_ADAPTER *ioc)
  1313. {
  1314. int i = 0;
  1315. char desc[16];
  1316. u8 revision;
  1317. u32 iounit_pg1_flags;
  1318. pci_read_config_byte(ioc->pdev, PCI_CLASS_REVISION, &revision);
  1319. strncpy(desc, ioc->manu_pg0.ChipName, 16);
  1320. printk(MPT2SAS_INFO_FMT "%s: FWVersion(%02d.%02d.%02d.%02d), "
  1321. "ChipRevision(0x%02x), BiosVersion(%02d.%02d.%02d.%02d)\n",
  1322. ioc->name, desc,
  1323. (ioc->facts.FWVersion.Word & 0xFF000000) >> 24,
  1324. (ioc->facts.FWVersion.Word & 0x00FF0000) >> 16,
  1325. (ioc->facts.FWVersion.Word & 0x0000FF00) >> 8,
  1326. ioc->facts.FWVersion.Word & 0x000000FF,
  1327. revision,
  1328. (ioc->bios_pg3.BiosVersion & 0xFF000000) >> 24,
  1329. (ioc->bios_pg3.BiosVersion & 0x00FF0000) >> 16,
  1330. (ioc->bios_pg3.BiosVersion & 0x0000FF00) >> 8,
  1331. ioc->bios_pg3.BiosVersion & 0x000000FF);
  1332. printk(MPT2SAS_INFO_FMT "Protocol=(", ioc->name);
  1333. if (ioc->facts.ProtocolFlags & MPI2_IOCFACTS_PROTOCOL_SCSI_INITIATOR) {
  1334. printk("Initiator");
  1335. i++;
  1336. }
  1337. if (ioc->facts.ProtocolFlags & MPI2_IOCFACTS_PROTOCOL_SCSI_TARGET) {
  1338. printk("%sTarget", i ? "," : "");
  1339. i++;
  1340. }
  1341. _base_display_dell_branding(ioc);
  1342. i = 0;
  1343. printk("), ");
  1344. printk("Capabilities=(");
  1345. if (ioc->facts.IOCCapabilities &
  1346. MPI2_IOCFACTS_CAPABILITY_INTEGRATED_RAID) {
  1347. printk("Raid");
  1348. i++;
  1349. }
  1350. if (ioc->facts.IOCCapabilities & MPI2_IOCFACTS_CAPABILITY_TLR) {
  1351. printk("%sTLR", i ? "," : "");
  1352. i++;
  1353. }
  1354. if (ioc->facts.IOCCapabilities & MPI2_IOCFACTS_CAPABILITY_MULTICAST) {
  1355. printk("%sMulticast", i ? "," : "");
  1356. i++;
  1357. }
  1358. if (ioc->facts.IOCCapabilities &
  1359. MPI2_IOCFACTS_CAPABILITY_BIDIRECTIONAL_TARGET) {
  1360. printk("%sBIDI Target", i ? "," : "");
  1361. i++;
  1362. }
  1363. if (ioc->facts.IOCCapabilities & MPI2_IOCFACTS_CAPABILITY_EEDP) {
  1364. printk("%sEEDP", i ? "," : "");
  1365. i++;
  1366. }
  1367. if (ioc->facts.IOCCapabilities &
  1368. MPI2_IOCFACTS_CAPABILITY_SNAPSHOT_BUFFER) {
  1369. printk("%sSnapshot Buffer", i ? "," : "");
  1370. i++;
  1371. }
  1372. if (ioc->facts.IOCCapabilities &
  1373. MPI2_IOCFACTS_CAPABILITY_DIAG_TRACE_BUFFER) {
  1374. printk("%sDiag Trace Buffer", i ? "," : "");
  1375. i++;
  1376. }
  1377. if (ioc->facts.IOCCapabilities &
  1378. MPI2_IOCFACTS_CAPABILITY_TASK_SET_FULL_HANDLING) {
  1379. printk("%sTask Set Full", i ? "," : "");
  1380. i++;
  1381. }
  1382. iounit_pg1_flags = le32_to_cpu(ioc->iounit_pg1.Flags);
  1383. if (!(iounit_pg1_flags & MPI2_IOUNITPAGE1_NATIVE_COMMAND_Q_DISABLE)) {
  1384. printk("%sNCQ", i ? "," : "");
  1385. i++;
  1386. }
  1387. printk(")\n");
  1388. }
  1389. /**
  1390. * _base_static_config_pages - static start of day config pages
  1391. * @ioc: per adapter object
  1392. *
  1393. * Return nothing.
  1394. */
  1395. static void
  1396. _base_static_config_pages(struct MPT2SAS_ADAPTER *ioc)
  1397. {
  1398. Mpi2ConfigReply_t mpi_reply;
  1399. u32 iounit_pg1_flags;
  1400. mpt2sas_config_get_manufacturing_pg0(ioc, &mpi_reply, &ioc->manu_pg0);
  1401. mpt2sas_config_get_bios_pg2(ioc, &mpi_reply, &ioc->bios_pg2);
  1402. mpt2sas_config_get_bios_pg3(ioc, &mpi_reply, &ioc->bios_pg3);
  1403. mpt2sas_config_get_ioc_pg8(ioc, &mpi_reply, &ioc->ioc_pg8);
  1404. mpt2sas_config_get_iounit_pg0(ioc, &mpi_reply, &ioc->iounit_pg0);
  1405. mpt2sas_config_get_iounit_pg1(ioc, &mpi_reply, &ioc->iounit_pg1);
  1406. _base_display_ioc_capabilities(ioc);
  1407. /*
  1408. * Enable task_set_full handling in iounit_pg1 when the
  1409. * facts capabilities indicate that its supported.
  1410. */
  1411. iounit_pg1_flags = le32_to_cpu(ioc->iounit_pg1.Flags);
  1412. if ((ioc->facts.IOCCapabilities &
  1413. MPI2_IOCFACTS_CAPABILITY_TASK_SET_FULL_HANDLING))
  1414. iounit_pg1_flags &=
  1415. ~MPI2_IOUNITPAGE1_DISABLE_TASK_SET_FULL_HANDLING;
  1416. else
  1417. iounit_pg1_flags |=
  1418. MPI2_IOUNITPAGE1_DISABLE_TASK_SET_FULL_HANDLING;
  1419. ioc->iounit_pg1.Flags = cpu_to_le32(iounit_pg1_flags);
  1420. mpt2sas_config_set_iounit_pg1(ioc, &mpi_reply, ioc->iounit_pg1);
  1421. }
  1422. /**
  1423. * _base_release_memory_pools - release memory
  1424. * @ioc: per adapter object
  1425. *
  1426. * Free memory allocated from _base_allocate_memory_pools.
  1427. *
  1428. * Return nothing.
  1429. */
  1430. static void
  1431. _base_release_memory_pools(struct MPT2SAS_ADAPTER *ioc)
  1432. {
  1433. dexitprintk(ioc, printk(MPT2SAS_DEBUG_FMT "%s\n", ioc->name,
  1434. __func__));
  1435. if (ioc->request) {
  1436. pci_free_consistent(ioc->pdev, ioc->request_dma_sz,
  1437. ioc->request, ioc->request_dma);
  1438. dexitprintk(ioc, printk(MPT2SAS_INFO_FMT "request_pool(0x%p)"
  1439. ": free\n", ioc->name, ioc->request));
  1440. ioc->request = NULL;
  1441. }
  1442. if (ioc->sense) {
  1443. pci_pool_free(ioc->sense_dma_pool, ioc->sense, ioc->sense_dma);
  1444. if (ioc->sense_dma_pool)
  1445. pci_pool_destroy(ioc->sense_dma_pool);
  1446. dexitprintk(ioc, printk(MPT2SAS_INFO_FMT "sense_pool(0x%p)"
  1447. ": free\n", ioc->name, ioc->sense));
  1448. ioc->sense = NULL;
  1449. }
  1450. if (ioc->reply) {
  1451. pci_pool_free(ioc->reply_dma_pool, ioc->reply, ioc->reply_dma);
  1452. if (ioc->reply_dma_pool)
  1453. pci_pool_destroy(ioc->reply_dma_pool);
  1454. dexitprintk(ioc, printk(MPT2SAS_INFO_FMT "reply_pool(0x%p)"
  1455. ": free\n", ioc->name, ioc->reply));
  1456. ioc->reply = NULL;
  1457. }
  1458. if (ioc->reply_free) {
  1459. pci_pool_free(ioc->reply_free_dma_pool, ioc->reply_free,
  1460. ioc->reply_free_dma);
  1461. if (ioc->reply_free_dma_pool)
  1462. pci_pool_destroy(ioc->reply_free_dma_pool);
  1463. dexitprintk(ioc, printk(MPT2SAS_INFO_FMT "reply_free_pool"
  1464. "(0x%p): free\n", ioc->name, ioc->reply_free));
  1465. ioc->reply_free = NULL;
  1466. }
  1467. if (ioc->reply_post_free) {
  1468. pci_pool_free(ioc->reply_post_free_dma_pool,
  1469. ioc->reply_post_free, ioc->reply_post_free_dma);
  1470. if (ioc->reply_post_free_dma_pool)
  1471. pci_pool_destroy(ioc->reply_post_free_dma_pool);
  1472. dexitprintk(ioc, printk(MPT2SAS_INFO_FMT
  1473. "reply_post_free_pool(0x%p): free\n", ioc->name,
  1474. ioc->reply_post_free));
  1475. ioc->reply_post_free = NULL;
  1476. }
  1477. if (ioc->config_page) {
  1478. dexitprintk(ioc, printk(MPT2SAS_INFO_FMT
  1479. "config_page(0x%p): free\n", ioc->name,
  1480. ioc->config_page));
  1481. pci_free_consistent(ioc->pdev, ioc->config_page_sz,
  1482. ioc->config_page, ioc->config_page_dma);
  1483. }
  1484. kfree(ioc->scsi_lookup);
  1485. }
  1486. /**
  1487. * _base_allocate_memory_pools - allocate start of day memory pools
  1488. * @ioc: per adapter object
  1489. * @sleep_flag: CAN_SLEEP or NO_SLEEP
  1490. *
  1491. * Returns 0 success, anything else error
  1492. */
  1493. static int
  1494. _base_allocate_memory_pools(struct MPT2SAS_ADAPTER *ioc, int sleep_flag)
  1495. {
  1496. Mpi2IOCFactsReply_t *facts;
  1497. u32 queue_size, queue_diff;
  1498. u16 max_sge_elements;
  1499. u16 num_of_reply_frames;
  1500. u16 chains_needed_per_io;
  1501. u32 sz, total_sz;
  1502. u16 i;
  1503. u32 retry_sz;
  1504. u16 max_request_credit;
  1505. dinitprintk(ioc, printk(MPT2SAS_DEBUG_FMT "%s\n", ioc->name,
  1506. __func__));
  1507. retry_sz = 0;
  1508. facts = &ioc->facts;
  1509. /* command line tunables for max sgl entries */
  1510. if (max_sgl_entries != -1) {
  1511. ioc->shost->sg_tablesize = (max_sgl_entries <
  1512. MPT2SAS_SG_DEPTH) ? max_sgl_entries :
  1513. MPT2SAS_SG_DEPTH;
  1514. } else {
  1515. ioc->shost->sg_tablesize = MPT2SAS_SG_DEPTH;
  1516. }
  1517. /* command line tunables for max controller queue depth */
  1518. if (max_queue_depth != -1) {
  1519. max_request_credit = (max_queue_depth < facts->RequestCredit)
  1520. ? max_queue_depth : facts->RequestCredit;
  1521. } else {
  1522. max_request_credit = (facts->RequestCredit >
  1523. MPT2SAS_MAX_REQUEST_QUEUE) ? MPT2SAS_MAX_REQUEST_QUEUE :
  1524. facts->RequestCredit;
  1525. }
  1526. ioc->request_depth = max_request_credit;
  1527. /* request frame size */
  1528. ioc->request_sz = facts->IOCRequestFrameSize * 4;
  1529. /* reply frame size */
  1530. ioc->reply_sz = facts->ReplyFrameSize * 4;
  1531. retry_allocation:
  1532. total_sz = 0;
  1533. /* calculate number of sg elements left over in the 1st frame */
  1534. max_sge_elements = ioc->request_sz - ((sizeof(Mpi2SCSIIORequest_t) -
  1535. sizeof(Mpi2SGEIOUnion_t)) + ioc->sge_size);
  1536. ioc->max_sges_in_main_message = max_sge_elements/ioc->sge_size;
  1537. /* now do the same for a chain buffer */
  1538. max_sge_elements = ioc->request_sz - ioc->sge_size;
  1539. ioc->max_sges_in_chain_message = max_sge_elements/ioc->sge_size;
  1540. ioc->chain_offset_value_for_main_message =
  1541. ((sizeof(Mpi2SCSIIORequest_t) - sizeof(Mpi2SGEIOUnion_t)) +
  1542. (ioc->max_sges_in_chain_message * ioc->sge_size)) / 4;
  1543. /*
  1544. * MPT2SAS_SG_DEPTH = CONFIG_FUSION_MAX_SGE
  1545. */
  1546. chains_needed_per_io = ((ioc->shost->sg_tablesize -
  1547. ioc->max_sges_in_main_message)/ioc->max_sges_in_chain_message)
  1548. + 1;
  1549. if (chains_needed_per_io > facts->MaxChainDepth) {
  1550. chains_needed_per_io = facts->MaxChainDepth;
  1551. ioc->shost->sg_tablesize = min_t(u16,
  1552. ioc->max_sges_in_main_message + (ioc->max_sges_in_chain_message
  1553. * chains_needed_per_io), ioc->shost->sg_tablesize);
  1554. }
  1555. ioc->chains_needed_per_io = chains_needed_per_io;
  1556. /* reply free queue sizing - taking into account for events */
  1557. num_of_reply_frames = ioc->request_depth + 32;
  1558. /* number of replies frames can't be a multiple of 16 */
  1559. /* decrease number of reply frames by 1 */
  1560. if (!(num_of_reply_frames % 16))
  1561. num_of_reply_frames--;
  1562. /* calculate number of reply free queue entries
  1563. * (must be multiple of 16)
  1564. */
  1565. /* (we know reply_free_queue_depth is not a multiple of 16) */
  1566. queue_size = num_of_reply_frames;
  1567. queue_size += 16 - (queue_size % 16);
  1568. ioc->reply_free_queue_depth = queue_size;
  1569. /* reply descriptor post queue sizing */
  1570. /* this size should be the number of request frames + number of reply
  1571. * frames
  1572. */
  1573. queue_size = ioc->request_depth + num_of_reply_frames + 1;
  1574. /* round up to 16 byte boundary */
  1575. if (queue_size % 16)
  1576. queue_size += 16 - (queue_size % 16);
  1577. /* check against IOC maximum reply post queue depth */
  1578. if (queue_size > facts->MaxReplyDescriptorPostQueueDepth) {
  1579. queue_diff = queue_size -
  1580. facts->MaxReplyDescriptorPostQueueDepth;
  1581. /* round queue_diff up to multiple of 16 */
  1582. if (queue_diff % 16)
  1583. queue_diff += 16 - (queue_diff % 16);
  1584. /* adjust request_depth, reply_free_queue_depth,
  1585. * and queue_size
  1586. */
  1587. ioc->request_depth -= queue_diff;
  1588. ioc->reply_free_queue_depth -= queue_diff;
  1589. queue_size -= queue_diff;
  1590. }
  1591. ioc->reply_post_queue_depth = queue_size;
  1592. /* max scsi host queue depth */
  1593. ioc->shost->can_queue = ioc->request_depth - INTERNAL_CMDS_COUNT;
  1594. dinitprintk(ioc, printk(MPT2SAS_INFO_FMT "scsi host queue: depth"
  1595. "(%d)\n", ioc->name, ioc->shost->can_queue));
  1596. dinitprintk(ioc, printk(MPT2SAS_INFO_FMT "scatter gather: "
  1597. "sge_in_main_msg(%d), sge_per_chain(%d), sge_per_io(%d), "
  1598. "chains_per_io(%d)\n", ioc->name, ioc->max_sges_in_main_message,
  1599. ioc->max_sges_in_chain_message, ioc->shost->sg_tablesize,
  1600. ioc->chains_needed_per_io));
  1601. /* contiguous pool for request and chains, 16 byte align, one extra "
  1602. * "frame for smid=0
  1603. */
  1604. ioc->chain_depth = ioc->chains_needed_per_io * ioc->request_depth;
  1605. sz = ((ioc->request_depth + 1 + ioc->chain_depth) * ioc->request_sz);
  1606. ioc->request_dma_sz = sz;
  1607. ioc->request = pci_alloc_consistent(ioc->pdev, sz, &ioc->request_dma);
  1608. if (!ioc->request) {
  1609. printk(MPT2SAS_ERR_FMT "request pool: pci_alloc_consistent "
  1610. "failed: req_depth(%d), chains_per_io(%d), frame_sz(%d), "
  1611. "total(%d kB)\n", ioc->name, ioc->request_depth,
  1612. ioc->chains_needed_per_io, ioc->request_sz, sz/1024);
  1613. if (ioc->request_depth < MPT2SAS_SAS_QUEUE_DEPTH)
  1614. goto out;
  1615. retry_sz += 64;
  1616. ioc->request_depth = max_request_credit - retry_sz;
  1617. goto retry_allocation;
  1618. }
  1619. if (retry_sz)
  1620. printk(MPT2SAS_ERR_FMT "request pool: pci_alloc_consistent "
  1621. "succeed: req_depth(%d), chains_per_io(%d), frame_sz(%d), "
  1622. "total(%d kb)\n", ioc->name, ioc->request_depth,
  1623. ioc->chains_needed_per_io, ioc->request_sz, sz/1024);
  1624. ioc->chain = ioc->request + ((ioc->request_depth + 1) *
  1625. ioc->request_sz);
  1626. ioc->chain_dma = ioc->request_dma + ((ioc->request_depth + 1) *
  1627. ioc->request_sz);
  1628. dinitprintk(ioc, printk(MPT2SAS_INFO_FMT "request pool(0x%p): "
  1629. "depth(%d), frame_size(%d), pool_size(%d kB)\n", ioc->name,
  1630. ioc->request, ioc->request_depth, ioc->request_sz,
  1631. ((ioc->request_depth + 1) * ioc->request_sz)/1024));
  1632. dinitprintk(ioc, printk(MPT2SAS_INFO_FMT "chain pool(0x%p): depth"
  1633. "(%d), frame_size(%d), pool_size(%d kB)\n", ioc->name, ioc->chain,
  1634. ioc->chain_depth, ioc->request_sz, ((ioc->chain_depth *
  1635. ioc->request_sz))/1024));
  1636. dinitprintk(ioc, printk(MPT2SAS_INFO_FMT "request pool: dma(0x%llx)\n",
  1637. ioc->name, (unsigned long long) ioc->request_dma));
  1638. total_sz += sz;
  1639. ioc->scsi_lookup = kcalloc(ioc->request_depth,
  1640. sizeof(struct request_tracker), GFP_KERNEL);
  1641. if (!ioc->scsi_lookup) {
  1642. printk(MPT2SAS_ERR_FMT "scsi_lookup: kcalloc failed\n",
  1643. ioc->name);
  1644. goto out;
  1645. }
  1646. /* initialize some bits */
  1647. for (i = 0; i < ioc->request_depth; i++)
  1648. ioc->scsi_lookup[i].smid = i + 1;
  1649. /* sense buffers, 4 byte align */
  1650. sz = ioc->request_depth * SCSI_SENSE_BUFFERSIZE;
  1651. ioc->sense_dma_pool = pci_pool_create("sense pool", ioc->pdev, sz, 4,
  1652. 0);
  1653. if (!ioc->sense_dma_pool) {
  1654. printk(MPT2SAS_ERR_FMT "sense pool: pci_pool_create failed\n",
  1655. ioc->name);
  1656. goto out;
  1657. }
  1658. ioc->sense = pci_pool_alloc(ioc->sense_dma_pool , GFP_KERNEL,
  1659. &ioc->sense_dma);
  1660. if (!ioc->sense) {
  1661. printk(MPT2SAS_ERR_FMT "sense pool: pci_pool_alloc failed\n",
  1662. ioc->name);
  1663. goto out;
  1664. }
  1665. dinitprintk(ioc, printk(MPT2SAS_INFO_FMT
  1666. "sense pool(0x%p): depth(%d), element_size(%d), pool_size"
  1667. "(%d kB)\n", ioc->name, ioc->sense, ioc->request_depth,
  1668. SCSI_SENSE_BUFFERSIZE, sz/1024));
  1669. dinitprintk(ioc, printk(MPT2SAS_INFO_FMT "sense_dma(0x%llx)\n",
  1670. ioc->name, (unsigned long long)ioc->sense_dma));
  1671. total_sz += sz;
  1672. /* reply pool, 4 byte align */
  1673. sz = ioc->reply_free_queue_depth * ioc->reply_sz;
  1674. ioc->reply_dma_pool = pci_pool_create("reply pool", ioc->pdev, sz, 4,
  1675. 0);
  1676. if (!ioc->reply_dma_pool) {
  1677. printk(MPT2SAS_ERR_FMT "reply pool: pci_pool_create failed\n",
  1678. ioc->name);
  1679. goto out;
  1680. }
  1681. ioc->reply = pci_pool_alloc(ioc->reply_dma_pool , GFP_KERNEL,
  1682. &ioc->reply_dma);
  1683. if (!ioc->reply) {
  1684. printk(MPT2SAS_ERR_FMT "reply pool: pci_pool_alloc failed\n",
  1685. ioc->name);
  1686. goto out;
  1687. }
  1688. dinitprintk(ioc, printk(MPT2SAS_INFO_FMT "reply pool(0x%p): depth"
  1689. "(%d), frame_size(%d), pool_size(%d kB)\n", ioc->name, ioc->reply,
  1690. ioc->reply_free_queue_depth, ioc->reply_sz, sz/1024));
  1691. dinitprintk(ioc, printk(MPT2SAS_INFO_FMT "reply_dma(0x%llx)\n",
  1692. ioc->name, (unsigned long long)ioc->reply_dma));
  1693. total_sz += sz;
  1694. /* reply free queue, 16 byte align */
  1695. sz = ioc->reply_free_queue_depth * 4;
  1696. ioc->reply_free_dma_pool = pci_pool_create("reply_free pool",
  1697. ioc->pdev, sz, 16, 0);
  1698. if (!ioc->reply_free_dma_pool) {
  1699. printk(MPT2SAS_ERR_FMT "reply_free pool: pci_pool_create "
  1700. "failed\n", ioc->name);
  1701. goto out;
  1702. }
  1703. ioc->reply_free = pci_pool_alloc(ioc->reply_free_dma_pool , GFP_KERNEL,
  1704. &ioc->reply_free_dma);
  1705. if (!ioc->reply_free) {
  1706. printk(MPT2SAS_ERR_FMT "reply_free pool: pci_pool_alloc "
  1707. "failed\n", ioc->name);
  1708. goto out;
  1709. }
  1710. memset(ioc->reply_free, 0, sz);
  1711. dinitprintk(ioc, printk(MPT2SAS_INFO_FMT "reply_free pool(0x%p): "
  1712. "depth(%d), element_size(%d), pool_size(%d kB)\n", ioc->name,
  1713. ioc->reply_free, ioc->reply_free_queue_depth, 4, sz/1024));
  1714. dinitprintk(ioc, printk(MPT2SAS_INFO_FMT "reply_free_dma"
  1715. "(0x%llx)\n", ioc->name, (unsigned long long)ioc->reply_free_dma));
  1716. total_sz += sz;
  1717. /* reply post queue, 16 byte align */
  1718. sz = ioc->reply_post_queue_depth * sizeof(Mpi2DefaultReplyDescriptor_t);
  1719. ioc->reply_post_free_dma_pool = pci_pool_create("reply_post_free pool",
  1720. ioc->pdev, sz, 16, 0);
  1721. if (!ioc->reply_post_free_dma_pool) {
  1722. printk(MPT2SAS_ERR_FMT "reply_post_free pool: pci_pool_create "
  1723. "failed\n", ioc->name);
  1724. goto out;
  1725. }
  1726. ioc->reply_post_free = pci_pool_alloc(ioc->reply_post_free_dma_pool ,
  1727. GFP_KERNEL, &ioc->reply_post_free_dma);
  1728. if (!ioc->reply_post_free) {
  1729. printk(MPT2SAS_ERR_FMT "reply_post_free pool: pci_pool_alloc "
  1730. "failed\n", ioc->name);
  1731. goto out;
  1732. }
  1733. memset(ioc->reply_post_free, 0, sz);
  1734. dinitprintk(ioc, printk(MPT2SAS_INFO_FMT "reply post free pool"
  1735. "(0x%p): depth(%d), element_size(%d), pool_size(%d kB)\n",
  1736. ioc->name, ioc->reply_post_free, ioc->reply_post_queue_depth, 8,
  1737. sz/1024));
  1738. dinitprintk(ioc, printk(MPT2SAS_INFO_FMT "reply_post_free_dma = "
  1739. "(0x%llx)\n", ioc->name, (unsigned long long)
  1740. ioc->reply_post_free_dma));
  1741. total_sz += sz;
  1742. ioc->config_page_sz = 512;
  1743. ioc->config_page = pci_alloc_consistent(ioc->pdev,
  1744. ioc->config_page_sz, &ioc->config_page_dma);
  1745. if (!ioc->config_page) {
  1746. printk(MPT2SAS_ERR_FMT "config page: pci_pool_alloc "
  1747. "failed\n", ioc->name);
  1748. goto out;
  1749. }
  1750. dinitprintk(ioc, printk(MPT2SAS_INFO_FMT "config page(0x%p): size"
  1751. "(%d)\n", ioc->name, ioc->config_page, ioc->config_page_sz));
  1752. dinitprintk(ioc, printk(MPT2SAS_INFO_FMT "config_page_dma"
  1753. "(0x%llx)\n", ioc->name, (unsigned long long)ioc->config_page_dma));
  1754. total_sz += ioc->config_page_sz;
  1755. printk(MPT2SAS_INFO_FMT "Allocated physical memory: size(%d kB)\n",
  1756. ioc->name, total_sz/1024);
  1757. printk(MPT2SAS_INFO_FMT "Current Controller Queue Depth(%d), "
  1758. "Max Controller Queue Depth(%d)\n",
  1759. ioc->name, ioc->shost->can_queue, facts->RequestCredit);
  1760. printk(MPT2SAS_INFO_FMT "Scatter Gather Elements per IO(%d)\n",
  1761. ioc->name, ioc->shost->sg_tablesize);
  1762. return 0;
  1763. out:
  1764. _base_release_memory_pools(ioc);
  1765. return -ENOMEM;
  1766. }
  1767. /**
  1768. * mpt2sas_base_get_iocstate - Get the current state of a MPT adapter.
  1769. * @ioc: Pointer to MPT_ADAPTER structure
  1770. * @cooked: Request raw or cooked IOC state
  1771. *
  1772. * Returns all IOC Doorbell register bits if cooked==0, else just the
  1773. * Doorbell bits in MPI_IOC_STATE_MASK.
  1774. */
  1775. u32
  1776. mpt2sas_base_get_iocstate(struct MPT2SAS_ADAPTER *ioc, int cooked)
  1777. {
  1778. u32 s, sc;
  1779. s = readl(&ioc->chip->Doorbell);
  1780. sc = s & MPI2_IOC_STATE_MASK;
  1781. return cooked ? sc : s;
  1782. }
  1783. /**
  1784. * _base_wait_on_iocstate - waiting on a particular ioc state
  1785. * @ioc_state: controller state { READY, OPERATIONAL, or RESET }
  1786. * @timeout: timeout in second
  1787. * @sleep_flag: CAN_SLEEP or NO_SLEEP
  1788. *
  1789. * Returns 0 for success, non-zero for failure.
  1790. */
  1791. static int
  1792. _base_wait_on_iocstate(struct MPT2SAS_ADAPTER *ioc, u32 ioc_state, int timeout,
  1793. int sleep_flag)
  1794. {
  1795. u32 count, cntdn;
  1796. u32 current_state;
  1797. count = 0;
  1798. cntdn = (sleep_flag == CAN_SLEEP) ? 1000*timeout : 2000*timeout;
  1799. do {
  1800. current_state = mpt2sas_base_get_iocstate(ioc, 1);
  1801. if (current_state == ioc_state)
  1802. return 0;
  1803. if (count && current_state == MPI2_IOC_STATE_FAULT)
  1804. break;
  1805. if (sleep_flag == CAN_SLEEP)
  1806. msleep(1);
  1807. else
  1808. udelay(500);
  1809. count++;
  1810. } while (--cntdn);
  1811. return current_state;
  1812. }
  1813. /**
  1814. * _base_wait_for_doorbell_int - waiting for controller interrupt(generated by
  1815. * a write to the doorbell)
  1816. * @ioc: per adapter object
  1817. * @timeout: timeout in second
  1818. * @sleep_flag: CAN_SLEEP or NO_SLEEP
  1819. *
  1820. * Returns 0 for success, non-zero for failure.
  1821. *
  1822. * Notes: MPI2_HIS_IOC2SYS_DB_STATUS - set to one when IOC writes to doorbell.
  1823. */
  1824. static int
  1825. _base_wait_for_doorbell_int(struct MPT2SAS_ADAPTER *ioc, int timeout,
  1826. int sleep_flag)
  1827. {
  1828. u32 cntdn, count;
  1829. u32 int_status;
  1830. count = 0;
  1831. cntdn = (sleep_flag == CAN_SLEEP) ? 1000*timeout : 2000*timeout;
  1832. do {
  1833. int_status = readl(&ioc->chip->HostInterruptStatus);
  1834. if (int_status & MPI2_HIS_IOC2SYS_DB_STATUS) {
  1835. dhsprintk(ioc, printk(MPT2SAS_DEBUG_FMT "%s: "
  1836. "successfull count(%d), timeout(%d)\n", ioc->name,
  1837. __func__, count, timeout));
  1838. return 0;
  1839. }
  1840. if (sleep_flag == CAN_SLEEP)
  1841. msleep(1);
  1842. else
  1843. udelay(500);
  1844. count++;
  1845. } while (--cntdn);
  1846. printk(MPT2SAS_ERR_FMT "%s: failed due to timeout count(%d), "
  1847. "int_status(%x)!\n", ioc->name, __func__, count, int_status);
  1848. return -EFAULT;
  1849. }
  1850. /**
  1851. * _base_wait_for_doorbell_ack - waiting for controller to read the doorbell.
  1852. * @ioc: per adapter object
  1853. * @timeout: timeout in second
  1854. * @sleep_flag: CAN_SLEEP or NO_SLEEP
  1855. *
  1856. * Returns 0 for success, non-zero for failure.
  1857. *
  1858. * Notes: MPI2_HIS_SYS2IOC_DB_STATUS - set to one when host writes to
  1859. * doorbell.
  1860. */
  1861. static int
  1862. _base_wait_for_doorbell_ack(struct MPT2SAS_ADAPTER *ioc, int timeout,
  1863. int sleep_flag)
  1864. {
  1865. u32 cntdn, count;
  1866. u32 int_status;
  1867. u32 doorbell;
  1868. count = 0;
  1869. cntdn = (sleep_flag == CAN_SLEEP) ? 1000*timeout : 2000*timeout;
  1870. do {
  1871. int_status = readl(&ioc->chip->HostInterruptStatus);
  1872. if (!(int_status & MPI2_HIS_SYS2IOC_DB_STATUS)) {
  1873. dhsprintk(ioc, printk(MPT2SAS_DEBUG_FMT "%s: "
  1874. "successfull count(%d), timeout(%d)\n", ioc->name,
  1875. __func__, count, timeout));
  1876. return 0;
  1877. } else if (int_status & MPI2_HIS_IOC2SYS_DB_STATUS) {
  1878. doorbell = readl(&ioc->chip->Doorbell);
  1879. if ((doorbell & MPI2_IOC_STATE_MASK) ==
  1880. MPI2_IOC_STATE_FAULT) {
  1881. mpt2sas_base_fault_info(ioc , doorbell);
  1882. return -EFAULT;
  1883. }
  1884. } else if (int_status == 0xFFFFFFFF)
  1885. goto out;
  1886. if (sleep_flag == CAN_SLEEP)
  1887. msleep(1);
  1888. else
  1889. udelay(500);
  1890. count++;
  1891. } while (--cntdn);
  1892. out:
  1893. printk(MPT2SAS_ERR_FMT "%s: failed due to timeout count(%d), "
  1894. "int_status(%x)!\n", ioc->name, __func__, count, int_status);
  1895. return -EFAULT;
  1896. }
  1897. /**
  1898. * _base_wait_for_doorbell_not_used - waiting for doorbell to not be in use
  1899. * @ioc: per adapter object
  1900. * @timeout: timeout in second
  1901. * @sleep_flag: CAN_SLEEP or NO_SLEEP
  1902. *
  1903. * Returns 0 for success, non-zero for failure.
  1904. *
  1905. */
  1906. static int
  1907. _base_wait_for_doorbell_not_used(struct MPT2SAS_ADAPTER *ioc, int timeout,
  1908. int sleep_flag)
  1909. {
  1910. u32 cntdn, count;
  1911. u32 doorbell_reg;
  1912. count = 0;
  1913. cntdn = (sleep_flag == CAN_SLEEP) ? 1000*timeout : 2000*timeout;
  1914. do {
  1915. doorbell_reg = readl(&ioc->chip->Doorbell);
  1916. if (!(doorbell_reg & MPI2_DOORBELL_USED)) {
  1917. dhsprintk(ioc, printk(MPT2SAS_DEBUG_FMT "%s: "
  1918. "successfull count(%d), timeout(%d)\n", ioc->name,
  1919. __func__, count, timeout));
  1920. return 0;
  1921. }
  1922. if (sleep_flag == CAN_SLEEP)
  1923. msleep(1);
  1924. else
  1925. udelay(500);
  1926. count++;
  1927. } while (--cntdn);
  1928. printk(MPT2SAS_ERR_FMT "%s: failed due to timeout count(%d), "
  1929. "doorbell_reg(%x)!\n", ioc->name, __func__, count, doorbell_reg);
  1930. return -EFAULT;
  1931. }
  1932. /**
  1933. * _base_send_ioc_reset - send doorbell reset
  1934. * @ioc: per adapter object
  1935. * @reset_type: currently only supports: MPI2_FUNCTION_IOC_MESSAGE_UNIT_RESET
  1936. * @timeout: timeout in second
  1937. * @sleep_flag: CAN_SLEEP or NO_SLEEP
  1938. *
  1939. * Returns 0 for success, non-zero for failure.
  1940. */
  1941. static int
  1942. _base_send_ioc_reset(struct MPT2SAS_ADAPTER *ioc, u8 reset_type, int timeout,
  1943. int sleep_flag)
  1944. {
  1945. u32 ioc_state;
  1946. int r = 0;
  1947. if (reset_type != MPI2_FUNCTION_IOC_MESSAGE_UNIT_RESET) {
  1948. printk(MPT2SAS_ERR_FMT "%s: unknown reset_type\n",
  1949. ioc->name, __func__);
  1950. return -EFAULT;
  1951. }
  1952. if (!(ioc->facts.IOCCapabilities &
  1953. MPI2_IOCFACTS_CAPABILITY_EVENT_REPLAY))
  1954. return -EFAULT;
  1955. printk(MPT2SAS_INFO_FMT "sending message unit reset !!\n", ioc->name);
  1956. writel(reset_type << MPI2_DOORBELL_FUNCTION_SHIFT,
  1957. &ioc->chip->Doorbell);
  1958. if ((_base_wait_for_doorbell_ack(ioc, 15, sleep_flag))) {
  1959. r = -EFAULT;
  1960. goto out;
  1961. }
  1962. ioc_state = _base_wait_on_iocstate(ioc, MPI2_IOC_STATE_READY,
  1963. timeout, sleep_flag);
  1964. if (ioc_state) {
  1965. printk(MPT2SAS_ERR_FMT "%s: failed going to ready state "
  1966. " (ioc_state=0x%x)\n", ioc->name, __func__, ioc_state);
  1967. r = -EFAULT;
  1968. goto out;
  1969. }
  1970. out:
  1971. printk(MPT2SAS_INFO_FMT "message unit reset: %s\n",
  1972. ioc->name, ((r == 0) ? "SUCCESS" : "FAILED"));
  1973. return r;
  1974. }
  1975. /**
  1976. * _base_handshake_req_reply_wait - send request thru doorbell interface
  1977. * @ioc: per adapter object
  1978. * @request_bytes: request length
  1979. * @request: pointer having request payload
  1980. * @reply_bytes: reply length
  1981. * @reply: pointer to reply payload
  1982. * @timeout: timeout in second
  1983. * @sleep_flag: CAN_SLEEP or NO_SLEEP
  1984. *
  1985. * Returns 0 for success, non-zero for failure.
  1986. */
  1987. static int
  1988. _base_handshake_req_reply_wait(struct MPT2SAS_ADAPTER *ioc, int request_bytes,
  1989. u32 *request, int reply_bytes, u16 *reply, int timeout, int sleep_flag)
  1990. {
  1991. MPI2DefaultReply_t *default_reply = (MPI2DefaultReply_t *)reply;
  1992. int i;
  1993. u8 failed;
  1994. u16 dummy;
  1995. u32 *mfp;
  1996. /* make sure doorbell is not in use */
  1997. if ((readl(&ioc->chip->Doorbell) & MPI2_DOORBELL_USED)) {
  1998. printk(MPT2SAS_ERR_FMT "doorbell is in use "
  1999. " (line=%d)\n", ioc->name, __LINE__);
  2000. return -EFAULT;
  2001. }
  2002. /* clear pending doorbell interrupts from previous state changes */
  2003. if (readl(&ioc->chip->HostInterruptStatus) &
  2004. MPI2_HIS_IOC2SYS_DB_STATUS)
  2005. writel(0, &ioc->chip->HostInterruptStatus);
  2006. /* send message to ioc */
  2007. writel(((MPI2_FUNCTION_HANDSHAKE<<MPI2_DOORBELL_FUNCTION_SHIFT) |
  2008. ((request_bytes/4)<<MPI2_DOORBELL_ADD_DWORDS_SHIFT)),
  2009. &ioc->chip->Doorbell);
  2010. if ((_base_wait_for_doorbell_int(ioc, 5, sleep_flag))) {
  2011. printk(MPT2SAS_ERR_FMT "doorbell handshake "
  2012. "int failed (line=%d)\n", ioc->name, __LINE__);
  2013. return -EFAULT;
  2014. }
  2015. writel(0, &ioc->chip->HostInterruptStatus);
  2016. if ((_base_wait_for_doorbell_ack(ioc, 5, sleep_flag))) {
  2017. printk(MPT2SAS_ERR_FMT "doorbell handshake "
  2018. "ack failed (line=%d)\n", ioc->name, __LINE__);
  2019. return -EFAULT;
  2020. }
  2021. /* send message 32-bits at a time */
  2022. for (i = 0, failed = 0; i < request_bytes/4 && !failed; i++) {
  2023. writel(cpu_to_le32(request[i]), &ioc->chip->Doorbell);
  2024. if ((_base_wait_for_doorbell_ack(ioc, 5, sleep_flag)))
  2025. failed = 1;
  2026. }
  2027. if (failed) {
  2028. printk(MPT2SAS_ERR_FMT "doorbell handshake "
  2029. "sending request failed (line=%d)\n", ioc->name, __LINE__);
  2030. return -EFAULT;
  2031. }
  2032. /* now wait for the reply */
  2033. if ((_base_wait_for_doorbell_int(ioc, timeout, sleep_flag))) {
  2034. printk(MPT2SAS_ERR_FMT "doorbell handshake "
  2035. "int failed (line=%d)\n", ioc->name, __LINE__);
  2036. return -EFAULT;
  2037. }
  2038. /* read the first two 16-bits, it gives the total length of the reply */
  2039. reply[0] = le16_to_cpu(readl(&ioc->chip->Doorbell)
  2040. & MPI2_DOORBELL_DATA_MASK);
  2041. writel(0, &ioc->chip->HostInterruptStatus);
  2042. if ((_base_wait_for_doorbell_int(ioc, 5, sleep_flag))) {
  2043. printk(MPT2SAS_ERR_FMT "doorbell handshake "
  2044. "int failed (line=%d)\n", ioc->name, __LINE__);
  2045. return -EFAULT;
  2046. }
  2047. reply[1] = le16_to_cpu(readl(&ioc->chip->Doorbell)
  2048. & MPI2_DOORBELL_DATA_MASK);
  2049. writel(0, &ioc->chip->HostInterruptStatus);
  2050. for (i = 2; i < default_reply->MsgLength * 2; i++) {
  2051. if ((_base_wait_for_doorbell_int(ioc, 5, sleep_flag))) {
  2052. printk(MPT2SAS_ERR_FMT "doorbell "
  2053. "handshake int failed (line=%d)\n", ioc->name,
  2054. __LINE__);
  2055. return -EFAULT;
  2056. }
  2057. if (i >= reply_bytes/2) /* overflow case */
  2058. dummy = readl(&ioc->chip->Doorbell);
  2059. else
  2060. reply[i] = le16_to_cpu(readl(&ioc->chip->Doorbell)
  2061. & MPI2_DOORBELL_DATA_MASK);
  2062. writel(0, &ioc->chip->HostInterruptStatus);
  2063. }
  2064. _base_wait_for_doorbell_int(ioc, 5, sleep_flag);
  2065. if (_base_wait_for_doorbell_not_used(ioc, 5, sleep_flag) != 0) {
  2066. dhsprintk(ioc, printk(MPT2SAS_INFO_FMT "doorbell is in use "
  2067. " (line=%d)\n", ioc->name, __LINE__));
  2068. }
  2069. writel(0, &ioc->chip->HostInterruptStatus);
  2070. if (ioc->logging_level & MPT_DEBUG_INIT) {
  2071. mfp = (u32 *)reply;
  2072. printk(KERN_DEBUG "\toffset:data\n");
  2073. for (i = 0; i < reply_bytes/4; i++)
  2074. printk(KERN_DEBUG "\t[0x%02x]:%08x\n", i*4,
  2075. le32_to_cpu(mfp[i]));
  2076. }
  2077. return 0;
  2078. }
  2079. /**
  2080. * mpt2sas_base_sas_iounit_control - send sas iounit control to FW
  2081. * @ioc: per adapter object
  2082. * @mpi_reply: the reply payload from FW
  2083. * @mpi_request: the request payload sent to FW
  2084. *
  2085. * The SAS IO Unit Control Request message allows the host to perform low-level
  2086. * operations, such as resets on the PHYs of the IO Unit, also allows the host
  2087. * to obtain the IOC assigned device handles for a device if it has other
  2088. * identifying information about the device, in addition allows the host to
  2089. * remove IOC resources associated with the device.
  2090. *
  2091. * Returns 0 for success, non-zero for failure.
  2092. */
  2093. int
  2094. mpt2sas_base_sas_iounit_control(struct MPT2SAS_ADAPTER *ioc,
  2095. Mpi2SasIoUnitControlReply_t *mpi_reply,
  2096. Mpi2SasIoUnitControlRequest_t *mpi_request)
  2097. {
  2098. u16 smid;
  2099. u32 ioc_state;
  2100. unsigned long timeleft;
  2101. u8 issue_reset;
  2102. int rc;
  2103. void *request;
  2104. u16 wait_state_count;
  2105. dinitprintk(ioc, printk(MPT2SAS_DEBUG_FMT "%s\n", ioc->name,
  2106. __func__));
  2107. mutex_lock(&ioc->base_cmds.mutex);
  2108. if (ioc->base_cmds.status != MPT2_CMD_NOT_USED) {
  2109. printk(MPT2SAS_ERR_FMT "%s: base_cmd in use\n",
  2110. ioc->name, __func__);
  2111. rc = -EAGAIN;
  2112. goto out;
  2113. }
  2114. wait_state_count = 0;
  2115. ioc_state = mpt2sas_base_get_iocstate(ioc, 1);
  2116. while (ioc_state != MPI2_IOC_STATE_OPERATIONAL) {
  2117. if (wait_state_count++ == 10) {
  2118. printk(MPT2SAS_ERR_FMT
  2119. "%s: failed due to ioc not operational\n",
  2120. ioc->name, __func__);
  2121. rc = -EFAULT;
  2122. goto out;
  2123. }
  2124. ssleep(1);
  2125. ioc_state = mpt2sas_base_get_iocstate(ioc, 1);
  2126. printk(MPT2SAS_INFO_FMT "%s: waiting for "
  2127. "operational state(count=%d)\n", ioc->name,
  2128. __func__, wait_state_count);
  2129. }
  2130. smid = mpt2sas_base_get_smid(ioc, ioc->base_cb_idx);
  2131. if (!smid) {
  2132. printk(MPT2SAS_ERR_FMT "%s: failed obtaining a smid\n",
  2133. ioc->name, __func__);
  2134. rc = -EAGAIN;
  2135. goto out;
  2136. }
  2137. rc = 0;
  2138. ioc->base_cmds.status = MPT2_CMD_PENDING;
  2139. request = mpt2sas_base_get_msg_frame(ioc, smid);
  2140. ioc->base_cmds.smid = smid;
  2141. memcpy(request, mpi_request, sizeof(Mpi2SasIoUnitControlRequest_t));
  2142. if (mpi_request->Operation == MPI2_SAS_OP_PHY_HARD_RESET ||
  2143. mpi_request->Operation == MPI2_SAS_OP_PHY_LINK_RESET)
  2144. ioc->ioc_link_reset_in_progress = 1;
  2145. mpt2sas_base_put_smid_default(ioc, smid, mpi_request->VF_ID);
  2146. timeleft = wait_for_completion_timeout(&ioc->base_cmds.done,
  2147. msecs_to_jiffies(10000));
  2148. if ((mpi_request->Operation == MPI2_SAS_OP_PHY_HARD_RESET ||
  2149. mpi_request->Operation == MPI2_SAS_OP_PHY_LINK_RESET) &&
  2150. ioc->ioc_link_reset_in_progress)
  2151. ioc->ioc_link_reset_in_progress = 0;
  2152. if (!(ioc->base_cmds.status & MPT2_CMD_COMPLETE)) {
  2153. printk(MPT2SAS_ERR_FMT "%s: timeout\n",
  2154. ioc->name, __func__);
  2155. _debug_dump_mf(mpi_request,
  2156. sizeof(Mpi2SasIoUnitControlRequest_t)/4);
  2157. if (!(ioc->base_cmds.status & MPT2_CMD_RESET))
  2158. issue_reset = 1;
  2159. goto issue_host_reset;
  2160. }
  2161. if (ioc->base_cmds.status & MPT2_CMD_REPLY_VALID)
  2162. memcpy(mpi_reply, ioc->base_cmds.reply,
  2163. sizeof(Mpi2SasIoUnitControlReply_t));
  2164. else
  2165. memset(mpi_reply, 0, sizeof(Mpi2SasIoUnitControlReply_t));
  2166. ioc->base_cmds.status = MPT2_CMD_NOT_USED;
  2167. goto out;
  2168. issue_host_reset:
  2169. if (issue_reset)
  2170. mpt2sas_base_hard_reset_handler(ioc, CAN_SLEEP,
  2171. FORCE_BIG_HAMMER);
  2172. ioc->base_cmds.status = MPT2_CMD_NOT_USED;
  2173. rc = -EFAULT;
  2174. out:
  2175. mutex_unlock(&ioc->base_cmds.mutex);
  2176. return rc;
  2177. }
  2178. /**
  2179. * mpt2sas_base_scsi_enclosure_processor - sending request to sep device
  2180. * @ioc: per adapter object
  2181. * @mpi_reply: the reply payload from FW
  2182. * @mpi_request: the request payload sent to FW
  2183. *
  2184. * The SCSI Enclosure Processor request message causes the IOC to
  2185. * communicate with SES devices to control LED status signals.
  2186. *
  2187. * Returns 0 for success, non-zero for failure.
  2188. */
  2189. int
  2190. mpt2sas_base_scsi_enclosure_processor(struct MPT2SAS_ADAPTER *ioc,
  2191. Mpi2SepReply_t *mpi_reply, Mpi2SepRequest_t *mpi_request)
  2192. {
  2193. u16 smid;
  2194. u32 ioc_state;
  2195. unsigned long timeleft;
  2196. u8 issue_reset;
  2197. int rc;
  2198. void *request;
  2199. u16 wait_state_count;
  2200. dinitprintk(ioc, printk(MPT2SAS_DEBUG_FMT "%s\n", ioc->name,
  2201. __func__));
  2202. mutex_lock(&ioc->base_cmds.mutex);
  2203. if (ioc->base_cmds.status != MPT2_CMD_NOT_USED) {
  2204. printk(MPT2SAS_ERR_FMT "%s: base_cmd in use\n",
  2205. ioc->name, __func__);
  2206. rc = -EAGAIN;
  2207. goto out;
  2208. }
  2209. wait_state_count = 0;
  2210. ioc_state = mpt2sas_base_get_iocstate(ioc, 1);
  2211. while (ioc_state != MPI2_IOC_STATE_OPERATIONAL) {
  2212. if (wait_state_count++ == 10) {
  2213. printk(MPT2SAS_ERR_FMT
  2214. "%s: failed due to ioc not operational\n",
  2215. ioc->name, __func__);
  2216. rc = -EFAULT;
  2217. goto out;
  2218. }
  2219. ssleep(1);
  2220. ioc_state = mpt2sas_base_get_iocstate(ioc, 1);
  2221. printk(MPT2SAS_INFO_FMT "%s: waiting for "
  2222. "operational state(count=%d)\n", ioc->name,
  2223. __func__, wait_state_count);
  2224. }
  2225. smid = mpt2sas_base_get_smid(ioc, ioc->base_cb_idx);
  2226. if (!smid) {
  2227. printk(MPT2SAS_ERR_FMT "%s: failed obtaining a smid\n",
  2228. ioc->name, __func__);
  2229. rc = -EAGAIN;
  2230. goto out;
  2231. }
  2232. rc = 0;
  2233. ioc->base_cmds.status = MPT2_CMD_PENDING;
  2234. request = mpt2sas_base_get_msg_frame(ioc, smid);
  2235. ioc->base_cmds.smid = smid;
  2236. memcpy(request, mpi_request, sizeof(Mpi2SepReply_t));
  2237. mpt2sas_base_put_smid_default(ioc, smid, mpi_request->VF_ID);
  2238. timeleft = wait_for_completion_timeout(&ioc->base_cmds.done,
  2239. msecs_to_jiffies(10000));
  2240. if (!(ioc->base_cmds.status & MPT2_CMD_COMPLETE)) {
  2241. printk(MPT2SAS_ERR_FMT "%s: timeout\n",
  2242. ioc->name, __func__);
  2243. _debug_dump_mf(mpi_request,
  2244. sizeof(Mpi2SepRequest_t)/4);
  2245. if (!(ioc->base_cmds.status & MPT2_CMD_RESET))
  2246. issue_reset = 1;
  2247. goto issue_host_reset;
  2248. }
  2249. if (ioc->base_cmds.status & MPT2_CMD_REPLY_VALID)
  2250. memcpy(mpi_reply, ioc->base_cmds.reply,
  2251. sizeof(Mpi2SepReply_t));
  2252. else
  2253. memset(mpi_reply, 0, sizeof(Mpi2SepReply_t));
  2254. ioc->base_cmds.status = MPT2_CMD_NOT_USED;
  2255. goto out;
  2256. issue_host_reset:
  2257. if (issue_reset)
  2258. mpt2sas_base_hard_reset_handler(ioc, CAN_SLEEP,
  2259. FORCE_BIG_HAMMER);
  2260. ioc->base_cmds.status = MPT2_CMD_NOT_USED;
  2261. rc = -EFAULT;
  2262. out:
  2263. mutex_unlock(&ioc->base_cmds.mutex);
  2264. return rc;
  2265. }
  2266. /**
  2267. * _base_get_port_facts - obtain port facts reply and save in ioc
  2268. * @ioc: per adapter object
  2269. * @sleep_flag: CAN_SLEEP or NO_SLEEP
  2270. *
  2271. * Returns 0 for success, non-zero for failure.
  2272. */
  2273. static int
  2274. _base_get_port_facts(struct MPT2SAS_ADAPTER *ioc, int port, int sleep_flag)
  2275. {
  2276. Mpi2PortFactsRequest_t mpi_request;
  2277. Mpi2PortFactsReply_t mpi_reply, *pfacts;
  2278. int mpi_reply_sz, mpi_request_sz, r;
  2279. dinitprintk(ioc, printk(MPT2SAS_DEBUG_FMT "%s\n", ioc->name,
  2280. __func__));
  2281. mpi_reply_sz = sizeof(Mpi2PortFactsReply_t);
  2282. mpi_request_sz = sizeof(Mpi2PortFactsRequest_t);
  2283. memset(&mpi_request, 0, mpi_request_sz);
  2284. mpi_request.Function = MPI2_FUNCTION_PORT_FACTS;
  2285. mpi_request.PortNumber = port;
  2286. r = _base_handshake_req_reply_wait(ioc, mpi_request_sz,
  2287. (u32 *)&mpi_request, mpi_reply_sz, (u16 *)&mpi_reply, 5, CAN_SLEEP);
  2288. if (r != 0) {
  2289. printk(MPT2SAS_ERR_FMT "%s: handshake failed (r=%d)\n",
  2290. ioc->name, __func__, r);
  2291. return r;
  2292. }
  2293. pfacts = &ioc->pfacts[port];
  2294. memset(pfacts, 0, sizeof(Mpi2PortFactsReply_t));
  2295. pfacts->PortNumber = mpi_reply.PortNumber;
  2296. pfacts->VP_ID = mpi_reply.VP_ID;
  2297. pfacts->VF_ID = mpi_reply.VF_ID;
  2298. pfacts->MaxPostedCmdBuffers =
  2299. le16_to_cpu(mpi_reply.MaxPostedCmdBuffers);
  2300. return 0;
  2301. }
  2302. /**
  2303. * _base_get_ioc_facts - obtain ioc facts reply and save in ioc
  2304. * @ioc: per adapter object
  2305. * @sleep_flag: CAN_SLEEP or NO_SLEEP
  2306. *
  2307. * Returns 0 for success, non-zero for failure.
  2308. */
  2309. static int
  2310. _base_get_ioc_facts(struct MPT2SAS_ADAPTER *ioc, int sleep_flag)
  2311. {
  2312. Mpi2IOCFactsRequest_t mpi_request;
  2313. Mpi2IOCFactsReply_t mpi_reply, *facts;
  2314. int mpi_reply_sz, mpi_request_sz, r;
  2315. dinitprintk(ioc, printk(MPT2SAS_DEBUG_FMT "%s\n", ioc->name,
  2316. __func__));
  2317. mpi_reply_sz = sizeof(Mpi2IOCFactsReply_t);
  2318. mpi_request_sz = sizeof(Mpi2IOCFactsRequest_t);
  2319. memset(&mpi_request, 0, mpi_request_sz);
  2320. mpi_request.Function = MPI2_FUNCTION_IOC_FACTS;
  2321. r = _base_handshake_req_reply_wait(ioc, mpi_request_sz,
  2322. (u32 *)&mpi_request, mpi_reply_sz, (u16 *)&mpi_reply, 5, CAN_SLEEP);
  2323. if (r != 0) {
  2324. printk(MPT2SAS_ERR_FMT "%s: handshake failed (r=%d)\n",
  2325. ioc->name, __func__, r);
  2326. return r;
  2327. }
  2328. facts = &ioc->facts;
  2329. memset(facts, 0, sizeof(Mpi2IOCFactsReply_t));
  2330. facts->MsgVersion = le16_to_cpu(mpi_reply.MsgVersion);
  2331. facts->HeaderVersion = le16_to_cpu(mpi_reply.HeaderVersion);
  2332. facts->VP_ID = mpi_reply.VP_ID;
  2333. facts->VF_ID = mpi_reply.VF_ID;
  2334. facts->IOCExceptions = le16_to_cpu(mpi_reply.IOCExceptions);
  2335. facts->MaxChainDepth = mpi_reply.MaxChainDepth;
  2336. facts->WhoInit = mpi_reply.WhoInit;
  2337. facts->NumberOfPorts = mpi_reply.NumberOfPorts;
  2338. facts->RequestCredit = le16_to_cpu(mpi_reply.RequestCredit);
  2339. facts->MaxReplyDescriptorPostQueueDepth =
  2340. le16_to_cpu(mpi_reply.MaxReplyDescriptorPostQueueDepth);
  2341. facts->ProductID = le16_to_cpu(mpi_reply.ProductID);
  2342. facts->IOCCapabilities = le32_to_cpu(mpi_reply.IOCCapabilities);
  2343. if ((facts->IOCCapabilities & MPI2_IOCFACTS_CAPABILITY_INTEGRATED_RAID))
  2344. ioc->ir_firmware = 1;
  2345. facts->FWVersion.Word = le32_to_cpu(mpi_reply.FWVersion.Word);
  2346. facts->IOCRequestFrameSize =
  2347. le16_to_cpu(mpi_reply.IOCRequestFrameSize);
  2348. facts->MaxInitiators = le16_to_cpu(mpi_reply.MaxInitiators);
  2349. facts->MaxTargets = le16_to_cpu(mpi_reply.MaxTargets);
  2350. ioc->shost->max_id = -1;
  2351. facts->MaxSasExpanders = le16_to_cpu(mpi_reply.MaxSasExpanders);
  2352. facts->MaxEnclosures = le16_to_cpu(mpi_reply.MaxEnclosures);
  2353. facts->ProtocolFlags = le16_to_cpu(mpi_reply.ProtocolFlags);
  2354. facts->HighPriorityCredit =
  2355. le16_to_cpu(mpi_reply.HighPriorityCredit);
  2356. facts->ReplyFrameSize = mpi_reply.ReplyFrameSize;
  2357. facts->MaxDevHandle = le16_to_cpu(mpi_reply.MaxDevHandle);
  2358. dinitprintk(ioc, printk(MPT2SAS_INFO_FMT "hba queue depth(%d), "
  2359. "max chains per io(%d)\n", ioc->name, facts->RequestCredit,
  2360. facts->MaxChainDepth));
  2361. dinitprintk(ioc, printk(MPT2SAS_INFO_FMT "request frame size(%d), "
  2362. "reply frame size(%d)\n", ioc->name,
  2363. facts->IOCRequestFrameSize * 4, facts->ReplyFrameSize * 4));
  2364. return 0;
  2365. }
  2366. /**
  2367. * _base_send_ioc_init - send ioc_init to firmware
  2368. * @ioc: per adapter object
  2369. * @VF_ID: virtual function id
  2370. * @sleep_flag: CAN_SLEEP or NO_SLEEP
  2371. *
  2372. * Returns 0 for success, non-zero for failure.
  2373. */
  2374. static int
  2375. _base_send_ioc_init(struct MPT2SAS_ADAPTER *ioc, u8 VF_ID, int sleep_flag)
  2376. {
  2377. Mpi2IOCInitRequest_t mpi_request;
  2378. Mpi2IOCInitReply_t mpi_reply;
  2379. int r;
  2380. dinitprintk(ioc, printk(MPT2SAS_DEBUG_FMT "%s\n", ioc->name,
  2381. __func__));
  2382. memset(&mpi_request, 0, sizeof(Mpi2IOCInitRequest_t));
  2383. mpi_request.Function = MPI2_FUNCTION_IOC_INIT;
  2384. mpi_request.WhoInit = MPI2_WHOINIT_HOST_DRIVER;
  2385. mpi_request.VF_ID = VF_ID;
  2386. mpi_request.MsgVersion = cpu_to_le16(MPI2_VERSION);
  2387. mpi_request.HeaderVersion = cpu_to_le16(MPI2_HEADER_VERSION);
  2388. /* In MPI Revision I (0xA), the SystemReplyFrameSize(offset 0x18) was
  2389. * removed and made reserved. For those with older firmware will need
  2390. * this fix. It was decided that the Reply and Request frame sizes are
  2391. * the same.
  2392. */
  2393. if ((ioc->facts.HeaderVersion >> 8) < 0xA) {
  2394. mpi_request.Reserved7 = cpu_to_le16(ioc->reply_sz);
  2395. /* mpi_request.SystemReplyFrameSize =
  2396. * cpu_to_le16(ioc->reply_sz);
  2397. */
  2398. }
  2399. mpi_request.SystemRequestFrameSize = cpu_to_le16(ioc->request_sz/4);
  2400. mpi_request.ReplyDescriptorPostQueueDepth =
  2401. cpu_to_le16(ioc->reply_post_queue_depth);
  2402. mpi_request.ReplyFreeQueueDepth =
  2403. cpu_to_le16(ioc->reply_free_queue_depth);
  2404. #if BITS_PER_LONG > 32
  2405. mpi_request.SenseBufferAddressHigh =
  2406. cpu_to_le32(ioc->sense_dma >> 32);
  2407. mpi_request.SystemReplyAddressHigh =
  2408. cpu_to_le32(ioc->reply_dma >> 32);
  2409. mpi_request.SystemRequestFrameBaseAddress =
  2410. cpu_to_le64(ioc->request_dma);
  2411. mpi_request.ReplyFreeQueueAddress =
  2412. cpu_to_le64(ioc->reply_free_dma);
  2413. mpi_request.ReplyDescriptorPostQueueAddress =
  2414. cpu_to_le64(ioc->reply_post_free_dma);
  2415. #else
  2416. mpi_request.SystemRequestFrameBaseAddress =
  2417. cpu_to_le32(ioc->request_dma);
  2418. mpi_request.ReplyFreeQueueAddress =
  2419. cpu_to_le32(ioc->reply_free_dma);
  2420. mpi_request.ReplyDescriptorPostQueueAddress =
  2421. cpu_to_le32(ioc->reply_post_free_dma);
  2422. #endif
  2423. if (ioc->logging_level & MPT_DEBUG_INIT) {
  2424. u32 *mfp;
  2425. int i;
  2426. mfp = (u32 *)&mpi_request;
  2427. printk(KERN_DEBUG "\toffset:data\n");
  2428. for (i = 0; i < sizeof(Mpi2IOCInitRequest_t)/4; i++)
  2429. printk(KERN_DEBUG "\t[0x%02x]:%08x\n", i*4,
  2430. le32_to_cpu(mfp[i]));
  2431. }
  2432. r = _base_handshake_req_reply_wait(ioc,
  2433. sizeof(Mpi2IOCInitRequest_t), (u32 *)&mpi_request,
  2434. sizeof(Mpi2IOCInitReply_t), (u16 *)&mpi_reply, 10,
  2435. sleep_flag);
  2436. if (r != 0) {
  2437. printk(MPT2SAS_ERR_FMT "%s: handshake failed (r=%d)\n",
  2438. ioc->name, __func__, r);
  2439. return r;
  2440. }
  2441. if (mpi_reply.IOCStatus != MPI2_IOCSTATUS_SUCCESS ||
  2442. mpi_reply.IOCLogInfo) {
  2443. printk(MPT2SAS_ERR_FMT "%s: failed\n", ioc->name, __func__);
  2444. r = -EIO;
  2445. }
  2446. return 0;
  2447. }
  2448. /**
  2449. * _base_send_port_enable - send port_enable(discovery stuff) to firmware
  2450. * @ioc: per adapter object
  2451. * @VF_ID: virtual function id
  2452. * @sleep_flag: CAN_SLEEP or NO_SLEEP
  2453. *
  2454. * Returns 0 for success, non-zero for failure.
  2455. */
  2456. static int
  2457. _base_send_port_enable(struct MPT2SAS_ADAPTER *ioc, u8 VF_ID, int sleep_flag)
  2458. {
  2459. Mpi2PortEnableRequest_t *mpi_request;
  2460. u32 ioc_state;
  2461. unsigned long timeleft;
  2462. int r = 0;
  2463. u16 smid;
  2464. printk(MPT2SAS_INFO_FMT "sending port enable !!\n", ioc->name);
  2465. if (ioc->base_cmds.status & MPT2_CMD_PENDING) {
  2466. printk(MPT2SAS_ERR_FMT "%s: internal command already in use\n",
  2467. ioc->name, __func__);
  2468. return -EAGAIN;
  2469. }
  2470. smid = mpt2sas_base_get_smid(ioc, ioc->base_cb_idx);
  2471. if (!smid) {
  2472. printk(MPT2SAS_ERR_FMT "%s: failed obtaining a smid\n",
  2473. ioc->name, __func__);
  2474. return -EAGAIN;
  2475. }
  2476. ioc->base_cmds.status = MPT2_CMD_PENDING;
  2477. mpi_request = mpt2sas_base_get_msg_frame(ioc, smid);
  2478. ioc->base_cmds.smid = smid;
  2479. memset(mpi_request, 0, sizeof(Mpi2PortEnableRequest_t));
  2480. mpi_request->Function = MPI2_FUNCTION_PORT_ENABLE;
  2481. mpi_request->VF_ID = VF_ID;
  2482. mpt2sas_base_put_smid_default(ioc, smid, VF_ID);
  2483. timeleft = wait_for_completion_timeout(&ioc->base_cmds.done,
  2484. 300*HZ);
  2485. if (!(ioc->base_cmds.status & MPT2_CMD_COMPLETE)) {
  2486. printk(MPT2SAS_ERR_FMT "%s: timeout\n",
  2487. ioc->name, __func__);
  2488. _debug_dump_mf(mpi_request,
  2489. sizeof(Mpi2PortEnableRequest_t)/4);
  2490. if (ioc->base_cmds.status & MPT2_CMD_RESET)
  2491. r = -EFAULT;
  2492. else
  2493. r = -ETIME;
  2494. goto out;
  2495. } else
  2496. dinitprintk(ioc, printk(MPT2SAS_DEBUG_FMT "%s: complete\n",
  2497. ioc->name, __func__));
  2498. ioc_state = _base_wait_on_iocstate(ioc, MPI2_IOC_STATE_OPERATIONAL,
  2499. 60, sleep_flag);
  2500. if (ioc_state) {
  2501. printk(MPT2SAS_ERR_FMT "%s: failed going to operational state "
  2502. " (ioc_state=0x%x)\n", ioc->name, __func__, ioc_state);
  2503. r = -EFAULT;
  2504. }
  2505. out:
  2506. ioc->base_cmds.status = MPT2_CMD_NOT_USED;
  2507. printk(MPT2SAS_INFO_FMT "port enable: %s\n",
  2508. ioc->name, ((r == 0) ? "SUCCESS" : "FAILED"));
  2509. return r;
  2510. }
  2511. /**
  2512. * _base_unmask_events - turn on notification for this event
  2513. * @ioc: per adapter object
  2514. * @event: firmware event
  2515. *
  2516. * The mask is stored in ioc->event_masks.
  2517. */
  2518. static void
  2519. _base_unmask_events(struct MPT2SAS_ADAPTER *ioc, u16 event)
  2520. {
  2521. u32 desired_event;
  2522. if (event >= 128)
  2523. return;
  2524. desired_event = (1 << (event % 32));
  2525. if (event < 32)
  2526. ioc->event_masks[0] &= ~desired_event;
  2527. else if (event < 64)
  2528. ioc->event_masks[1] &= ~desired_event;
  2529. else if (event < 96)
  2530. ioc->event_masks[2] &= ~desired_event;
  2531. else if (event < 128)
  2532. ioc->event_masks[3] &= ~desired_event;
  2533. }
  2534. /**
  2535. * _base_event_notification - send event notification
  2536. * @ioc: per adapter object
  2537. * @VF_ID: virtual function id
  2538. * @sleep_flag: CAN_SLEEP or NO_SLEEP
  2539. *
  2540. * Returns 0 for success, non-zero for failure.
  2541. */
  2542. static int
  2543. _base_event_notification(struct MPT2SAS_ADAPTER *ioc, u8 VF_ID, int sleep_flag)
  2544. {
  2545. Mpi2EventNotificationRequest_t *mpi_request;
  2546. unsigned long timeleft;
  2547. u16 smid;
  2548. int r = 0;
  2549. int i;
  2550. dinitprintk(ioc, printk(MPT2SAS_DEBUG_FMT "%s\n", ioc->name,
  2551. __func__));
  2552. if (ioc->base_cmds.status & MPT2_CMD_PENDING) {
  2553. printk(MPT2SAS_ERR_FMT "%s: internal command already in use\n",
  2554. ioc->name, __func__);
  2555. return -EAGAIN;
  2556. }
  2557. smid = mpt2sas_base_get_smid(ioc, ioc->base_cb_idx);
  2558. if (!smid) {
  2559. printk(MPT2SAS_ERR_FMT "%s: failed obtaining a smid\n",
  2560. ioc->name, __func__);
  2561. return -EAGAIN;
  2562. }
  2563. ioc->base_cmds.status = MPT2_CMD_PENDING;
  2564. mpi_request = mpt2sas_base_get_msg_frame(ioc, smid);
  2565. ioc->base_cmds.smid = smid;
  2566. memset(mpi_request, 0, sizeof(Mpi2EventNotificationRequest_t));
  2567. mpi_request->Function = MPI2_FUNCTION_EVENT_NOTIFICATION;
  2568. mpi_request->VF_ID = VF_ID;
  2569. for (i = 0; i < MPI2_EVENT_NOTIFY_EVENTMASK_WORDS; i++)
  2570. mpi_request->EventMasks[i] =
  2571. le32_to_cpu(ioc->event_masks[i]);
  2572. mpt2sas_base_put_smid_default(ioc, smid, VF_ID);
  2573. timeleft = wait_for_completion_timeout(&ioc->base_cmds.done, 30*HZ);
  2574. if (!(ioc->base_cmds.status & MPT2_CMD_COMPLETE)) {
  2575. printk(MPT2SAS_ERR_FMT "%s: timeout\n",
  2576. ioc->name, __func__);
  2577. _debug_dump_mf(mpi_request,
  2578. sizeof(Mpi2EventNotificationRequest_t)/4);
  2579. if (ioc->base_cmds.status & MPT2_CMD_RESET)
  2580. r = -EFAULT;
  2581. else
  2582. r = -ETIME;
  2583. } else
  2584. dinitprintk(ioc, printk(MPT2SAS_DEBUG_FMT "%s: complete\n",
  2585. ioc->name, __func__));
  2586. ioc->base_cmds.status = MPT2_CMD_NOT_USED;
  2587. return r;
  2588. }
  2589. /**
  2590. * mpt2sas_base_validate_event_type - validating event types
  2591. * @ioc: per adapter object
  2592. * @event: firmware event
  2593. *
  2594. * This will turn on firmware event notification when application
  2595. * ask for that event. We don't mask events that are already enabled.
  2596. */
  2597. void
  2598. mpt2sas_base_validate_event_type(struct MPT2SAS_ADAPTER *ioc, u32 *event_type)
  2599. {
  2600. int i, j;
  2601. u32 event_mask, desired_event;
  2602. u8 send_update_to_fw;
  2603. for (i = 0, send_update_to_fw = 0; i <
  2604. MPI2_EVENT_NOTIFY_EVENTMASK_WORDS; i++) {
  2605. event_mask = ~event_type[i];
  2606. desired_event = 1;
  2607. for (j = 0; j < 32; j++) {
  2608. if (!(event_mask & desired_event) &&
  2609. (ioc->event_masks[i] & desired_event)) {
  2610. ioc->event_masks[i] &= ~desired_event;
  2611. send_update_to_fw = 1;
  2612. }
  2613. desired_event = (desired_event << 1);
  2614. }
  2615. }
  2616. if (!send_update_to_fw)
  2617. return;
  2618. mutex_lock(&ioc->base_cmds.mutex);
  2619. _base_event_notification(ioc, 0, CAN_SLEEP);
  2620. mutex_unlock(&ioc->base_cmds.mutex);
  2621. }
  2622. /**
  2623. * _base_diag_reset - the "big hammer" start of day reset
  2624. * @ioc: per adapter object
  2625. * @sleep_flag: CAN_SLEEP or NO_SLEEP
  2626. *
  2627. * Returns 0 for success, non-zero for failure.
  2628. */
  2629. static int
  2630. _base_diag_reset(struct MPT2SAS_ADAPTER *ioc, int sleep_flag)
  2631. {
  2632. u32 host_diagnostic;
  2633. u32 ioc_state;
  2634. u32 count;
  2635. u32 hcb_size;
  2636. printk(MPT2SAS_INFO_FMT "sending diag reset !!\n", ioc->name);
  2637. _base_save_msix_table(ioc);
  2638. drsprintk(ioc, printk(MPT2SAS_DEBUG_FMT "clear interrupts\n",
  2639. ioc->name));
  2640. writel(0, &ioc->chip->HostInterruptStatus);
  2641. count = 0;
  2642. do {
  2643. /* Write magic sequence to WriteSequence register
  2644. * Loop until in diagnostic mode
  2645. */
  2646. drsprintk(ioc, printk(MPT2SAS_DEBUG_FMT "write magic "
  2647. "sequence\n", ioc->name));
  2648. writel(MPI2_WRSEQ_FLUSH_KEY_VALUE, &ioc->chip->WriteSequence);
  2649. writel(MPI2_WRSEQ_1ST_KEY_VALUE, &ioc->chip->WriteSequence);
  2650. writel(MPI2_WRSEQ_2ND_KEY_VALUE, &ioc->chip->WriteSequence);
  2651. writel(MPI2_WRSEQ_3RD_KEY_VALUE, &ioc->chip->WriteSequence);
  2652. writel(MPI2_WRSEQ_4TH_KEY_VALUE, &ioc->chip->WriteSequence);
  2653. writel(MPI2_WRSEQ_5TH_KEY_VALUE, &ioc->chip->WriteSequence);
  2654. writel(MPI2_WRSEQ_6TH_KEY_VALUE, &ioc->chip->WriteSequence);
  2655. /* wait 100 msec */
  2656. if (sleep_flag == CAN_SLEEP)
  2657. msleep(100);
  2658. else
  2659. mdelay(100);
  2660. if (count++ > 20)
  2661. goto out;
  2662. host_diagnostic = readl(&ioc->chip->HostDiagnostic);
  2663. drsprintk(ioc, printk(MPT2SAS_DEBUG_FMT "wrote magic "
  2664. "sequence: count(%d), host_diagnostic(0x%08x)\n",
  2665. ioc->name, count, host_diagnostic));
  2666. } while ((host_diagnostic & MPI2_DIAG_DIAG_WRITE_ENABLE) == 0);
  2667. hcb_size = readl(&ioc->chip->HCBSize);
  2668. drsprintk(ioc, printk(MPT2SAS_DEBUG_FMT "diag reset: issued\n",
  2669. ioc->name));
  2670. writel(host_diagnostic | MPI2_DIAG_RESET_ADAPTER,
  2671. &ioc->chip->HostDiagnostic);
  2672. /* don't access any registers for 50 milliseconds */
  2673. msleep(50);
  2674. /* 300 second max wait */
  2675. for (count = 0; count < 3000000 ; count++) {
  2676. host_diagnostic = readl(&ioc->chip->HostDiagnostic);
  2677. if (host_diagnostic == 0xFFFFFFFF)
  2678. goto out;
  2679. if (!(host_diagnostic & MPI2_DIAG_RESET_ADAPTER))
  2680. break;
  2681. /* wait 100 msec */
  2682. if (sleep_flag == CAN_SLEEP)
  2683. msleep(1);
  2684. else
  2685. mdelay(1);
  2686. }
  2687. if (host_diagnostic & MPI2_DIAG_HCB_MODE) {
  2688. drsprintk(ioc, printk(MPT2SAS_DEBUG_FMT "restart the adapter "
  2689. "assuming the HCB Address points to good F/W\n",
  2690. ioc->name));
  2691. host_diagnostic &= ~MPI2_DIAG_BOOT_DEVICE_SELECT_MASK;
  2692. host_diagnostic |= MPI2_DIAG_BOOT_DEVICE_SELECT_HCDW;
  2693. writel(host_diagnostic, &ioc->chip->HostDiagnostic);
  2694. drsprintk(ioc, printk(MPT2SAS_DEBUG_FMT
  2695. "re-enable the HCDW\n", ioc->name));
  2696. writel(hcb_size | MPI2_HCB_SIZE_HCB_ENABLE,
  2697. &ioc->chip->HCBSize);
  2698. }
  2699. drsprintk(ioc, printk(MPT2SAS_DEBUG_FMT "restart the adapter\n",
  2700. ioc->name));
  2701. writel(host_diagnostic & ~MPI2_DIAG_HOLD_IOC_RESET,
  2702. &ioc->chip->HostDiagnostic);
  2703. drsprintk(ioc, printk(MPT2SAS_DEBUG_FMT "disable writes to the "
  2704. "diagnostic register\n", ioc->name));
  2705. writel(MPI2_WRSEQ_FLUSH_KEY_VALUE, &ioc->chip->WriteSequence);
  2706. drsprintk(ioc, printk(MPT2SAS_DEBUG_FMT "Wait for FW to go to the "
  2707. "READY state\n", ioc->name));
  2708. ioc_state = _base_wait_on_iocstate(ioc, MPI2_IOC_STATE_READY, 20,
  2709. sleep_flag);
  2710. if (ioc_state) {
  2711. printk(MPT2SAS_ERR_FMT "%s: failed going to ready state "
  2712. " (ioc_state=0x%x)\n", ioc->name, __func__, ioc_state);
  2713. goto out;
  2714. }
  2715. _base_restore_msix_table(ioc);
  2716. printk(MPT2SAS_INFO_FMT "diag reset: SUCCESS\n", ioc->name);
  2717. return 0;
  2718. out:
  2719. printk(MPT2SAS_ERR_FMT "diag reset: FAILED\n", ioc->name);
  2720. return -EFAULT;
  2721. }
  2722. /**
  2723. * _base_make_ioc_ready - put controller in READY state
  2724. * @ioc: per adapter object
  2725. * @sleep_flag: CAN_SLEEP or NO_SLEEP
  2726. * @type: FORCE_BIG_HAMMER or SOFT_RESET
  2727. *
  2728. * Returns 0 for success, non-zero for failure.
  2729. */
  2730. static int
  2731. _base_make_ioc_ready(struct MPT2SAS_ADAPTER *ioc, int sleep_flag,
  2732. enum reset_type type)
  2733. {
  2734. u32 ioc_state;
  2735. dinitprintk(ioc, printk(MPT2SAS_DEBUG_FMT "%s\n", ioc->name,
  2736. __func__));
  2737. ioc_state = mpt2sas_base_get_iocstate(ioc, 0);
  2738. dhsprintk(ioc, printk(MPT2SAS_DEBUG_FMT "%s: ioc_state(0x%08x)\n",
  2739. ioc->name, __func__, ioc_state));
  2740. if ((ioc_state & MPI2_IOC_STATE_MASK) == MPI2_IOC_STATE_READY)
  2741. return 0;
  2742. if (ioc_state & MPI2_DOORBELL_USED) {
  2743. dhsprintk(ioc, printk(MPT2SAS_DEBUG_FMT "unexpected doorbell "
  2744. "active!\n", ioc->name));
  2745. goto issue_diag_reset;
  2746. }
  2747. if ((ioc_state & MPI2_IOC_STATE_MASK) == MPI2_IOC_STATE_FAULT) {
  2748. mpt2sas_base_fault_info(ioc, ioc_state &
  2749. MPI2_DOORBELL_DATA_MASK);
  2750. goto issue_diag_reset;
  2751. }
  2752. if (type == FORCE_BIG_HAMMER)
  2753. goto issue_diag_reset;
  2754. if ((ioc_state & MPI2_IOC_STATE_MASK) == MPI2_IOC_STATE_OPERATIONAL)
  2755. if (!(_base_send_ioc_reset(ioc,
  2756. MPI2_FUNCTION_IOC_MESSAGE_UNIT_RESET, 15, CAN_SLEEP)))
  2757. return 0;
  2758. issue_diag_reset:
  2759. return _base_diag_reset(ioc, CAN_SLEEP);
  2760. }
  2761. /**
  2762. * _base_make_ioc_operational - put controller in OPERATIONAL state
  2763. * @ioc: per adapter object
  2764. * @VF_ID: virtual function id
  2765. * @sleep_flag: CAN_SLEEP or NO_SLEEP
  2766. *
  2767. * Returns 0 for success, non-zero for failure.
  2768. */
  2769. static int
  2770. _base_make_ioc_operational(struct MPT2SAS_ADAPTER *ioc, u8 VF_ID,
  2771. int sleep_flag)
  2772. {
  2773. int r, i;
  2774. unsigned long flags;
  2775. u32 reply_address;
  2776. dinitprintk(ioc, printk(MPT2SAS_DEBUG_FMT "%s\n", ioc->name,
  2777. __func__));
  2778. /* initialize the scsi lookup free list */
  2779. spin_lock_irqsave(&ioc->scsi_lookup_lock, flags);
  2780. INIT_LIST_HEAD(&ioc->free_list);
  2781. for (i = 0; i < ioc->request_depth; i++) {
  2782. ioc->scsi_lookup[i].cb_idx = 0xFF;
  2783. list_add_tail(&ioc->scsi_lookup[i].tracker_list,
  2784. &ioc->free_list);
  2785. }
  2786. spin_unlock_irqrestore(&ioc->scsi_lookup_lock, flags);
  2787. /* initialize Reply Free Queue */
  2788. for (i = 0, reply_address = (u32)ioc->reply_dma ;
  2789. i < ioc->reply_free_queue_depth ; i++, reply_address +=
  2790. ioc->reply_sz)
  2791. ioc->reply_free[i] = cpu_to_le32(reply_address);
  2792. /* initialize Reply Post Free Queue */
  2793. for (i = 0; i < ioc->reply_post_queue_depth; i++)
  2794. ioc->reply_post_free[i].Words = ULLONG_MAX;
  2795. r = _base_send_ioc_init(ioc, VF_ID, sleep_flag);
  2796. if (r)
  2797. return r;
  2798. /* initialize the index's */
  2799. ioc->reply_free_host_index = ioc->reply_free_queue_depth - 1;
  2800. ioc->reply_post_host_index = 0;
  2801. writel(ioc->reply_free_host_index, &ioc->chip->ReplyFreeHostIndex);
  2802. writel(0, &ioc->chip->ReplyPostHostIndex);
  2803. _base_unmask_interrupts(ioc);
  2804. r = _base_event_notification(ioc, VF_ID, sleep_flag);
  2805. if (r)
  2806. return r;
  2807. if (sleep_flag == CAN_SLEEP)
  2808. _base_static_config_pages(ioc);
  2809. r = _base_send_port_enable(ioc, VF_ID, sleep_flag);
  2810. if (r)
  2811. return r;
  2812. return r;
  2813. }
  2814. /**
  2815. * mpt2sas_base_free_resources - free resources controller resources (io/irq/memap)
  2816. * @ioc: per adapter object
  2817. *
  2818. * Return nothing.
  2819. */
  2820. void
  2821. mpt2sas_base_free_resources(struct MPT2SAS_ADAPTER *ioc)
  2822. {
  2823. struct pci_dev *pdev = ioc->pdev;
  2824. dexitprintk(ioc, printk(MPT2SAS_DEBUG_FMT "%s\n", ioc->name,
  2825. __func__));
  2826. _base_mask_interrupts(ioc);
  2827. _base_make_ioc_ready(ioc, CAN_SLEEP, SOFT_RESET);
  2828. if (ioc->pci_irq) {
  2829. synchronize_irq(pdev->irq);
  2830. free_irq(ioc->pci_irq, ioc);
  2831. }
  2832. _base_disable_msix(ioc);
  2833. if (ioc->chip_phys)
  2834. iounmap(ioc->chip);
  2835. ioc->pci_irq = -1;
  2836. ioc->chip_phys = 0;
  2837. pci_release_selected_regions(ioc->pdev, ioc->bars);
  2838. pci_disable_device(pdev);
  2839. pci_set_drvdata(pdev, NULL);
  2840. return;
  2841. }
  2842. /**
  2843. * mpt2sas_base_attach - attach controller instance
  2844. * @ioc: per adapter object
  2845. *
  2846. * Returns 0 for success, non-zero for failure.
  2847. */
  2848. int
  2849. mpt2sas_base_attach(struct MPT2SAS_ADAPTER *ioc)
  2850. {
  2851. int r, i;
  2852. unsigned long flags;
  2853. dinitprintk(ioc, printk(MPT2SAS_DEBUG_FMT "%s\n", ioc->name,
  2854. __func__));
  2855. r = mpt2sas_base_map_resources(ioc);
  2856. if (r)
  2857. return r;
  2858. r = _base_make_ioc_ready(ioc, CAN_SLEEP, SOFT_RESET);
  2859. if (r)
  2860. goto out_free_resources;
  2861. r = _base_get_ioc_facts(ioc, CAN_SLEEP);
  2862. if (r)
  2863. goto out_free_resources;
  2864. r = _base_allocate_memory_pools(ioc, CAN_SLEEP);
  2865. if (r)
  2866. goto out_free_resources;
  2867. init_waitqueue_head(&ioc->reset_wq);
  2868. /* base internal command bits */
  2869. mutex_init(&ioc->base_cmds.mutex);
  2870. init_completion(&ioc->base_cmds.done);
  2871. ioc->base_cmds.reply = kzalloc(ioc->reply_sz, GFP_KERNEL);
  2872. ioc->base_cmds.status = MPT2_CMD_NOT_USED;
  2873. /* transport internal command bits */
  2874. ioc->transport_cmds.reply = kzalloc(ioc->reply_sz, GFP_KERNEL);
  2875. ioc->transport_cmds.status = MPT2_CMD_NOT_USED;
  2876. mutex_init(&ioc->transport_cmds.mutex);
  2877. init_completion(&ioc->transport_cmds.done);
  2878. /* task management internal command bits */
  2879. ioc->tm_cmds.reply = kzalloc(ioc->reply_sz, GFP_KERNEL);
  2880. ioc->tm_cmds.status = MPT2_CMD_NOT_USED;
  2881. mutex_init(&ioc->tm_cmds.mutex);
  2882. init_completion(&ioc->tm_cmds.done);
  2883. /* config page internal command bits */
  2884. ioc->config_cmds.reply = kzalloc(ioc->reply_sz, GFP_KERNEL);
  2885. ioc->config_cmds.status = MPT2_CMD_NOT_USED;
  2886. mutex_init(&ioc->config_cmds.mutex);
  2887. init_completion(&ioc->config_cmds.done);
  2888. /* ctl module internal command bits */
  2889. ioc->ctl_cmds.reply = kzalloc(ioc->reply_sz, GFP_KERNEL);
  2890. ioc->ctl_cmds.status = MPT2_CMD_NOT_USED;
  2891. mutex_init(&ioc->ctl_cmds.mutex);
  2892. init_completion(&ioc->ctl_cmds.done);
  2893. for (i = 0; i < MPI2_EVENT_NOTIFY_EVENTMASK_WORDS; i++)
  2894. ioc->event_masks[i] = -1;
  2895. /* here we enable the events we care about */
  2896. _base_unmask_events(ioc, MPI2_EVENT_SAS_DISCOVERY);
  2897. _base_unmask_events(ioc, MPI2_EVENT_SAS_BROADCAST_PRIMITIVE);
  2898. _base_unmask_events(ioc, MPI2_EVENT_SAS_TOPOLOGY_CHANGE_LIST);
  2899. _base_unmask_events(ioc, MPI2_EVENT_SAS_DEVICE_STATUS_CHANGE);
  2900. _base_unmask_events(ioc, MPI2_EVENT_SAS_ENCL_DEVICE_STATUS_CHANGE);
  2901. _base_unmask_events(ioc, MPI2_EVENT_IR_CONFIGURATION_CHANGE_LIST);
  2902. _base_unmask_events(ioc, MPI2_EVENT_IR_VOLUME);
  2903. _base_unmask_events(ioc, MPI2_EVENT_IR_PHYSICAL_DISK);
  2904. _base_unmask_events(ioc, MPI2_EVENT_IR_OPERATION_STATUS);
  2905. _base_unmask_events(ioc, MPI2_EVENT_TASK_SET_FULL);
  2906. _base_unmask_events(ioc, MPI2_EVENT_LOG_ENTRY_ADDED);
  2907. ioc->pfacts = kcalloc(ioc->facts.NumberOfPorts,
  2908. sizeof(Mpi2PortFactsReply_t), GFP_KERNEL);
  2909. if (!ioc->pfacts)
  2910. goto out_free_resources;
  2911. for (i = 0 ; i < ioc->facts.NumberOfPorts; i++) {
  2912. r = _base_get_port_facts(ioc, i, CAN_SLEEP);
  2913. if (r)
  2914. goto out_free_resources;
  2915. }
  2916. r = _base_make_ioc_operational(ioc, 0, CAN_SLEEP);
  2917. if (r)
  2918. goto out_free_resources;
  2919. /* initialize fault polling */
  2920. INIT_DELAYED_WORK(&ioc->fault_reset_work, _base_fault_reset_work);
  2921. snprintf(ioc->fault_reset_work_q_name,
  2922. sizeof(ioc->fault_reset_work_q_name), "poll_%d_status", ioc->id);
  2923. ioc->fault_reset_work_q =
  2924. create_singlethread_workqueue(ioc->fault_reset_work_q_name);
  2925. if (!ioc->fault_reset_work_q) {
  2926. printk(MPT2SAS_ERR_FMT "%s: failed (line=%d)\n",
  2927. ioc->name, __func__, __LINE__);
  2928. goto out_free_resources;
  2929. }
  2930. spin_lock_irqsave(&ioc->ioc_reset_in_progress_lock, flags);
  2931. if (ioc->fault_reset_work_q)
  2932. queue_delayed_work(ioc->fault_reset_work_q,
  2933. &ioc->fault_reset_work,
  2934. msecs_to_jiffies(FAULT_POLLING_INTERVAL));
  2935. spin_unlock_irqrestore(&ioc->ioc_reset_in_progress_lock, flags);
  2936. return 0;
  2937. out_free_resources:
  2938. ioc->remove_host = 1;
  2939. mpt2sas_base_free_resources(ioc);
  2940. _base_release_memory_pools(ioc);
  2941. kfree(ioc->tm_cmds.reply);
  2942. kfree(ioc->transport_cmds.reply);
  2943. kfree(ioc->config_cmds.reply);
  2944. kfree(ioc->base_cmds.reply);
  2945. kfree(ioc->ctl_cmds.reply);
  2946. kfree(ioc->pfacts);
  2947. ioc->ctl_cmds.reply = NULL;
  2948. ioc->base_cmds.reply = NULL;
  2949. ioc->tm_cmds.reply = NULL;
  2950. ioc->transport_cmds.reply = NULL;
  2951. ioc->config_cmds.reply = NULL;
  2952. ioc->pfacts = NULL;
  2953. return r;
  2954. }
  2955. /**
  2956. * mpt2sas_base_detach - remove controller instance
  2957. * @ioc: per adapter object
  2958. *
  2959. * Return nothing.
  2960. */
  2961. void
  2962. mpt2sas_base_detach(struct MPT2SAS_ADAPTER *ioc)
  2963. {
  2964. unsigned long flags;
  2965. struct workqueue_struct *wq;
  2966. dexitprintk(ioc, printk(MPT2SAS_DEBUG_FMT "%s\n", ioc->name,
  2967. __func__));
  2968. spin_lock_irqsave(&ioc->ioc_reset_in_progress_lock, flags);
  2969. wq = ioc->fault_reset_work_q;
  2970. ioc->fault_reset_work_q = NULL;
  2971. spin_unlock_irqrestore(&ioc->ioc_reset_in_progress_lock, flags);
  2972. if (!cancel_delayed_work(&ioc->fault_reset_work))
  2973. flush_workqueue(wq);
  2974. destroy_workqueue(wq);
  2975. mpt2sas_base_free_resources(ioc);
  2976. _base_release_memory_pools(ioc);
  2977. kfree(ioc->pfacts);
  2978. kfree(ioc->ctl_cmds.reply);
  2979. kfree(ioc->base_cmds.reply);
  2980. kfree(ioc->tm_cmds.reply);
  2981. kfree(ioc->transport_cmds.reply);
  2982. kfree(ioc->config_cmds.reply);
  2983. }
  2984. /**
  2985. * _base_reset_handler - reset callback handler (for base)
  2986. * @ioc: per adapter object
  2987. * @reset_phase: phase
  2988. *
  2989. * The handler for doing any required cleanup or initialization.
  2990. *
  2991. * The reset phase can be MPT2_IOC_PRE_RESET, MPT2_IOC_AFTER_RESET,
  2992. * MPT2_IOC_DONE_RESET
  2993. *
  2994. * Return nothing.
  2995. */
  2996. static void
  2997. _base_reset_handler(struct MPT2SAS_ADAPTER *ioc, int reset_phase)
  2998. {
  2999. switch (reset_phase) {
  3000. case MPT2_IOC_PRE_RESET:
  3001. dtmprintk(ioc, printk(MPT2SAS_DEBUG_FMT "%s: "
  3002. "MPT2_IOC_PRE_RESET\n", ioc->name, __func__));
  3003. break;
  3004. case MPT2_IOC_AFTER_RESET:
  3005. dtmprintk(ioc, printk(MPT2SAS_DEBUG_FMT "%s: "
  3006. "MPT2_IOC_AFTER_RESET\n", ioc->name, __func__));
  3007. if (ioc->transport_cmds.status & MPT2_CMD_PENDING) {
  3008. ioc->transport_cmds.status |= MPT2_CMD_RESET;
  3009. mpt2sas_base_free_smid(ioc, ioc->transport_cmds.smid);
  3010. complete(&ioc->transport_cmds.done);
  3011. }
  3012. if (ioc->base_cmds.status & MPT2_CMD_PENDING) {
  3013. ioc->base_cmds.status |= MPT2_CMD_RESET;
  3014. mpt2sas_base_free_smid(ioc, ioc->base_cmds.smid);
  3015. complete(&ioc->base_cmds.done);
  3016. }
  3017. if (ioc->config_cmds.status & MPT2_CMD_PENDING) {
  3018. ioc->config_cmds.status |= MPT2_CMD_RESET;
  3019. mpt2sas_base_free_smid(ioc, ioc->config_cmds.smid);
  3020. complete(&ioc->config_cmds.done);
  3021. }
  3022. break;
  3023. case MPT2_IOC_DONE_RESET:
  3024. dtmprintk(ioc, printk(MPT2SAS_DEBUG_FMT "%s: "
  3025. "MPT2_IOC_DONE_RESET\n", ioc->name, __func__));
  3026. break;
  3027. }
  3028. mpt2sas_scsih_reset_handler(ioc, reset_phase);
  3029. mpt2sas_ctl_reset_handler(ioc, reset_phase);
  3030. }
  3031. /**
  3032. * _wait_for_commands_to_complete - reset controller
  3033. * @ioc: Pointer to MPT_ADAPTER structure
  3034. * @sleep_flag: CAN_SLEEP or NO_SLEEP
  3035. *
  3036. * This function waiting(3s) for all pending commands to complete
  3037. * prior to putting controller in reset.
  3038. */
  3039. static void
  3040. _wait_for_commands_to_complete(struct MPT2SAS_ADAPTER *ioc, int sleep_flag)
  3041. {
  3042. u32 ioc_state;
  3043. unsigned long flags;
  3044. u16 i;
  3045. ioc->pending_io_count = 0;
  3046. if (sleep_flag != CAN_SLEEP)
  3047. return;
  3048. ioc_state = mpt2sas_base_get_iocstate(ioc, 0);
  3049. if ((ioc_state & MPI2_IOC_STATE_MASK) != MPI2_IOC_STATE_OPERATIONAL)
  3050. return;
  3051. /* pending command count */
  3052. spin_lock_irqsave(&ioc->scsi_lookup_lock, flags);
  3053. for (i = 0; i < ioc->request_depth; i++)
  3054. if (ioc->scsi_lookup[i].cb_idx != 0xFF)
  3055. ioc->pending_io_count++;
  3056. spin_unlock_irqrestore(&ioc->scsi_lookup_lock, flags);
  3057. if (!ioc->pending_io_count)
  3058. return;
  3059. /* wait for pending commands to complete */
  3060. wait_event_timeout(ioc->reset_wq, ioc->pending_io_count == 0, 3 * HZ);
  3061. }
  3062. /**
  3063. * mpt2sas_base_hard_reset_handler - reset controller
  3064. * @ioc: Pointer to MPT_ADAPTER structure
  3065. * @sleep_flag: CAN_SLEEP or NO_SLEEP
  3066. * @type: FORCE_BIG_HAMMER or SOFT_RESET
  3067. *
  3068. * Returns 0 for success, non-zero for failure.
  3069. */
  3070. int
  3071. mpt2sas_base_hard_reset_handler(struct MPT2SAS_ADAPTER *ioc, int sleep_flag,
  3072. enum reset_type type)
  3073. {
  3074. int r, i;
  3075. unsigned long flags;
  3076. dtmprintk(ioc, printk(MPT2SAS_DEBUG_FMT "%s: enter\n", ioc->name,
  3077. __func__));
  3078. spin_lock_irqsave(&ioc->ioc_reset_in_progress_lock, flags);
  3079. if (ioc->ioc_reset_in_progress) {
  3080. spin_unlock_irqrestore(&ioc->ioc_reset_in_progress_lock, flags);
  3081. printk(MPT2SAS_ERR_FMT "%s: busy\n",
  3082. ioc->name, __func__);
  3083. return -EBUSY;
  3084. }
  3085. ioc->ioc_reset_in_progress = 1;
  3086. ioc->shost_recovery = 1;
  3087. if (ioc->shost->shost_state == SHOST_RUNNING) {
  3088. /* set back to SHOST_RUNNING in mpt2sas_scsih.c */
  3089. scsi_host_set_state(ioc->shost, SHOST_RECOVERY);
  3090. printk(MPT2SAS_INFO_FMT "putting controller into "
  3091. "SHOST_RECOVERY\n", ioc->name);
  3092. }
  3093. spin_unlock_irqrestore(&ioc->ioc_reset_in_progress_lock, flags);
  3094. _base_reset_handler(ioc, MPT2_IOC_PRE_RESET);
  3095. _wait_for_commands_to_complete(ioc, sleep_flag);
  3096. _base_mask_interrupts(ioc);
  3097. r = _base_make_ioc_ready(ioc, sleep_flag, type);
  3098. if (r)
  3099. goto out;
  3100. _base_reset_handler(ioc, MPT2_IOC_AFTER_RESET);
  3101. for (i = 0 ; i < ioc->facts.NumberOfPorts; i++)
  3102. r = _base_make_ioc_operational(ioc, ioc->pfacts[i].VF_ID,
  3103. sleep_flag);
  3104. if (!r)
  3105. _base_reset_handler(ioc, MPT2_IOC_DONE_RESET);
  3106. out:
  3107. dtmprintk(ioc, printk(MPT2SAS_DEBUG_FMT "%s: %s\n",
  3108. ioc->name, __func__, ((r == 0) ? "SUCCESS" : "FAILED")));
  3109. spin_lock_irqsave(&ioc->ioc_reset_in_progress_lock, flags);
  3110. ioc->ioc_reset_in_progress = 0;
  3111. spin_unlock_irqrestore(&ioc->ioc_reset_in_progress_lock, flags);
  3112. return r;
  3113. }