isp.c 58 KB

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  1. /*
  2. * isp.c
  3. *
  4. * TI OMAP3 ISP - Core
  5. *
  6. * Copyright (C) 2006-2010 Nokia Corporation
  7. * Copyright (C) 2007-2009 Texas Instruments, Inc.
  8. *
  9. * Contacts: Laurent Pinchart <laurent.pinchart@ideasonboard.com>
  10. * Sakari Ailus <sakari.ailus@iki.fi>
  11. *
  12. * Contributors:
  13. * Laurent Pinchart <laurent.pinchart@ideasonboard.com>
  14. * Sakari Ailus <sakari.ailus@iki.fi>
  15. * David Cohen <dacohen@gmail.com>
  16. * Stanimir Varbanov <svarbanov@mm-sol.com>
  17. * Vimarsh Zutshi <vimarsh.zutshi@gmail.com>
  18. * Tuukka Toivonen <tuukkat76@gmail.com>
  19. * Sergio Aguirre <saaguirre@ti.com>
  20. * Antti Koskipaa <akoskipa@gmail.com>
  21. * Ivan T. Ivanov <iivanov@mm-sol.com>
  22. * RaniSuneela <r-m@ti.com>
  23. * Atanas Filipov <afilipov@mm-sol.com>
  24. * Gjorgji Rosikopulos <grosikopulos@mm-sol.com>
  25. * Hiroshi DOYU <hiroshi.doyu@nokia.com>
  26. * Nayden Kanchev <nkanchev@mm-sol.com>
  27. * Phil Carmody <ext-phil.2.carmody@nokia.com>
  28. * Artem Bityutskiy <artem.bityutskiy@nokia.com>
  29. * Dominic Curran <dcurran@ti.com>
  30. * Ilkka Myllyperkio <ilkka.myllyperkio@sofica.fi>
  31. * Pallavi Kulkarni <p-kulkarni@ti.com>
  32. * Vaibhav Hiremath <hvaibhav@ti.com>
  33. * Mohit Jalori <mjalori@ti.com>
  34. * Sameer Venkatraman <sameerv@ti.com>
  35. * Senthilvadivu Guruswamy <svadivu@ti.com>
  36. * Thara Gopinath <thara@ti.com>
  37. * Toni Leinonen <toni.leinonen@nokia.com>
  38. * Troy Laramy <t-laramy@ti.com>
  39. *
  40. * This program is free software; you can redistribute it and/or modify
  41. * it under the terms of the GNU General Public License version 2 as
  42. * published by the Free Software Foundation.
  43. *
  44. * This program is distributed in the hope that it will be useful, but
  45. * WITHOUT ANY WARRANTY; without even the implied warranty of
  46. * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU
  47. * General Public License for more details.
  48. *
  49. * You should have received a copy of the GNU General Public License
  50. * along with this program; if not, write to the Free Software
  51. * Foundation, Inc., 51 Franklin St, Fifth Floor, Boston, MA
  52. * 02110-1301 USA
  53. */
  54. #include <asm/cacheflush.h>
  55. #include <linux/clk.h>
  56. #include <linux/delay.h>
  57. #include <linux/device.h>
  58. #include <linux/dma-mapping.h>
  59. #include <linux/i2c.h>
  60. #include <linux/interrupt.h>
  61. #include <linux/module.h>
  62. #include <linux/platform_device.h>
  63. #include <linux/regulator/consumer.h>
  64. #include <linux/slab.h>
  65. #include <linux/sched.h>
  66. #include <linux/vmalloc.h>
  67. #include <media/v4l2-common.h>
  68. #include <media/v4l2-device.h>
  69. #include "isp.h"
  70. #include "ispreg.h"
  71. #include "ispccdc.h"
  72. #include "isppreview.h"
  73. #include "ispresizer.h"
  74. #include "ispcsi2.h"
  75. #include "ispccp2.h"
  76. #include "isph3a.h"
  77. #include "isphist.h"
  78. static unsigned int autoidle;
  79. module_param(autoidle, int, 0444);
  80. MODULE_PARM_DESC(autoidle, "Enable OMAP3ISP AUTOIDLE support");
  81. static void isp_save_ctx(struct isp_device *isp);
  82. static void isp_restore_ctx(struct isp_device *isp);
  83. static const struct isp_res_mapping isp_res_maps[] = {
  84. {
  85. .isp_rev = ISP_REVISION_2_0,
  86. .map = 1 << OMAP3_ISP_IOMEM_MAIN |
  87. 1 << OMAP3_ISP_IOMEM_CCP2 |
  88. 1 << OMAP3_ISP_IOMEM_CCDC |
  89. 1 << OMAP3_ISP_IOMEM_HIST |
  90. 1 << OMAP3_ISP_IOMEM_H3A |
  91. 1 << OMAP3_ISP_IOMEM_PREV |
  92. 1 << OMAP3_ISP_IOMEM_RESZ |
  93. 1 << OMAP3_ISP_IOMEM_SBL |
  94. 1 << OMAP3_ISP_IOMEM_CSI2A_REGS1 |
  95. 1 << OMAP3_ISP_IOMEM_CSIPHY2,
  96. },
  97. {
  98. .isp_rev = ISP_REVISION_15_0,
  99. .map = 1 << OMAP3_ISP_IOMEM_MAIN |
  100. 1 << OMAP3_ISP_IOMEM_CCP2 |
  101. 1 << OMAP3_ISP_IOMEM_CCDC |
  102. 1 << OMAP3_ISP_IOMEM_HIST |
  103. 1 << OMAP3_ISP_IOMEM_H3A |
  104. 1 << OMAP3_ISP_IOMEM_PREV |
  105. 1 << OMAP3_ISP_IOMEM_RESZ |
  106. 1 << OMAP3_ISP_IOMEM_SBL |
  107. 1 << OMAP3_ISP_IOMEM_CSI2A_REGS1 |
  108. 1 << OMAP3_ISP_IOMEM_CSIPHY2 |
  109. 1 << OMAP3_ISP_IOMEM_CSI2A_REGS2 |
  110. 1 << OMAP3_ISP_IOMEM_CSI2C_REGS1 |
  111. 1 << OMAP3_ISP_IOMEM_CSIPHY1 |
  112. 1 << OMAP3_ISP_IOMEM_CSI2C_REGS2,
  113. },
  114. };
  115. /* Structure for saving/restoring ISP module registers */
  116. static struct isp_reg isp_reg_list[] = {
  117. {OMAP3_ISP_IOMEM_MAIN, ISP_SYSCONFIG, 0},
  118. {OMAP3_ISP_IOMEM_MAIN, ISP_CTRL, 0},
  119. {OMAP3_ISP_IOMEM_MAIN, ISP_TCTRL_CTRL, 0},
  120. {0, ISP_TOK_TERM, 0}
  121. };
  122. /*
  123. * omap3isp_flush - Post pending L3 bus writes by doing a register readback
  124. * @isp: OMAP3 ISP device
  125. *
  126. * In order to force posting of pending writes, we need to write and
  127. * readback the same register, in this case the revision register.
  128. *
  129. * See this link for reference:
  130. * http://www.mail-archive.com/linux-omap@vger.kernel.org/msg08149.html
  131. */
  132. void omap3isp_flush(struct isp_device *isp)
  133. {
  134. isp_reg_writel(isp, 0, OMAP3_ISP_IOMEM_MAIN, ISP_REVISION);
  135. isp_reg_readl(isp, OMAP3_ISP_IOMEM_MAIN, ISP_REVISION);
  136. }
  137. /*
  138. * isp_enable_interrupts - Enable ISP interrupts.
  139. * @isp: OMAP3 ISP device
  140. */
  141. static void isp_enable_interrupts(struct isp_device *isp)
  142. {
  143. static const u32 irq = IRQ0ENABLE_CSIA_IRQ
  144. | IRQ0ENABLE_CSIB_IRQ
  145. | IRQ0ENABLE_CCDC_LSC_PREF_ERR_IRQ
  146. | IRQ0ENABLE_CCDC_LSC_DONE_IRQ
  147. | IRQ0ENABLE_CCDC_VD0_IRQ
  148. | IRQ0ENABLE_CCDC_VD1_IRQ
  149. | IRQ0ENABLE_HS_VS_IRQ
  150. | IRQ0ENABLE_HIST_DONE_IRQ
  151. | IRQ0ENABLE_H3A_AWB_DONE_IRQ
  152. | IRQ0ENABLE_H3A_AF_DONE_IRQ
  153. | IRQ0ENABLE_PRV_DONE_IRQ
  154. | IRQ0ENABLE_RSZ_DONE_IRQ;
  155. isp_reg_writel(isp, irq, OMAP3_ISP_IOMEM_MAIN, ISP_IRQ0STATUS);
  156. isp_reg_writel(isp, irq, OMAP3_ISP_IOMEM_MAIN, ISP_IRQ0ENABLE);
  157. }
  158. /*
  159. * isp_disable_interrupts - Disable ISP interrupts.
  160. * @isp: OMAP3 ISP device
  161. */
  162. static void isp_disable_interrupts(struct isp_device *isp)
  163. {
  164. isp_reg_writel(isp, 0, OMAP3_ISP_IOMEM_MAIN, ISP_IRQ0ENABLE);
  165. }
  166. /**
  167. * isp_set_xclk - Configures the specified cam_xclk to the desired frequency.
  168. * @isp: OMAP3 ISP device
  169. * @xclk: Desired frequency of the clock in Hz. 0 = stable low, 1 is stable high
  170. * @xclksel: XCLK to configure (0 = A, 1 = B).
  171. *
  172. * Configures the specified MCLK divisor in the ISP timing control register
  173. * (TCTRL_CTRL) to generate the desired xclk clock value.
  174. *
  175. * Divisor = cam_mclk_hz / xclk
  176. *
  177. * Returns the final frequency that is actually being generated
  178. **/
  179. static u32 isp_set_xclk(struct isp_device *isp, u32 xclk, u8 xclksel)
  180. {
  181. u32 divisor;
  182. u32 currentxclk;
  183. unsigned long mclk_hz;
  184. if (!omap3isp_get(isp))
  185. return 0;
  186. mclk_hz = clk_get_rate(isp->clock[ISP_CLK_CAM_MCLK]);
  187. if (xclk >= mclk_hz) {
  188. divisor = ISPTCTRL_CTRL_DIV_BYPASS;
  189. currentxclk = mclk_hz;
  190. } else if (xclk >= 2) {
  191. divisor = mclk_hz / xclk;
  192. if (divisor >= ISPTCTRL_CTRL_DIV_BYPASS)
  193. divisor = ISPTCTRL_CTRL_DIV_BYPASS - 1;
  194. currentxclk = mclk_hz / divisor;
  195. } else {
  196. divisor = xclk;
  197. currentxclk = 0;
  198. }
  199. switch (xclksel) {
  200. case ISP_XCLK_A:
  201. isp_reg_clr_set(isp, OMAP3_ISP_IOMEM_MAIN, ISP_TCTRL_CTRL,
  202. ISPTCTRL_CTRL_DIVA_MASK,
  203. divisor << ISPTCTRL_CTRL_DIVA_SHIFT);
  204. dev_dbg(isp->dev, "isp_set_xclk(): cam_xclka set to %d Hz\n",
  205. currentxclk);
  206. break;
  207. case ISP_XCLK_B:
  208. isp_reg_clr_set(isp, OMAP3_ISP_IOMEM_MAIN, ISP_TCTRL_CTRL,
  209. ISPTCTRL_CTRL_DIVB_MASK,
  210. divisor << ISPTCTRL_CTRL_DIVB_SHIFT);
  211. dev_dbg(isp->dev, "isp_set_xclk(): cam_xclkb set to %d Hz\n",
  212. currentxclk);
  213. break;
  214. case ISP_XCLK_NONE:
  215. default:
  216. omap3isp_put(isp);
  217. dev_dbg(isp->dev, "ISP_ERR: isp_set_xclk(): Invalid requested "
  218. "xclk. Must be 0 (A) or 1 (B).\n");
  219. return -EINVAL;
  220. }
  221. /* Do we go from stable whatever to clock? */
  222. if (divisor >= 2 && isp->xclk_divisor[xclksel - 1] < 2)
  223. omap3isp_get(isp);
  224. /* Stopping the clock. */
  225. else if (divisor < 2 && isp->xclk_divisor[xclksel - 1] >= 2)
  226. omap3isp_put(isp);
  227. isp->xclk_divisor[xclksel - 1] = divisor;
  228. omap3isp_put(isp);
  229. return currentxclk;
  230. }
  231. /*
  232. * isp_power_settings - Sysconfig settings, for Power Management.
  233. * @isp: OMAP3 ISP device
  234. * @idle: Consider idle state.
  235. *
  236. * Sets the power settings for the ISP, and SBL bus.
  237. */
  238. static void isp_power_settings(struct isp_device *isp, int idle)
  239. {
  240. isp_reg_writel(isp,
  241. ((idle ? ISP_SYSCONFIG_MIDLEMODE_SMARTSTANDBY :
  242. ISP_SYSCONFIG_MIDLEMODE_FORCESTANDBY) <<
  243. ISP_SYSCONFIG_MIDLEMODE_SHIFT) |
  244. ((isp->revision == ISP_REVISION_15_0) ?
  245. ISP_SYSCONFIG_AUTOIDLE : 0),
  246. OMAP3_ISP_IOMEM_MAIN, ISP_SYSCONFIG);
  247. if (isp->autoidle)
  248. isp_reg_writel(isp, ISPCTRL_SBL_AUTOIDLE, OMAP3_ISP_IOMEM_MAIN,
  249. ISP_CTRL);
  250. }
  251. /*
  252. * Configure the bridge and lane shifter. Valid inputs are
  253. *
  254. * CCDC_INPUT_PARALLEL: Parallel interface
  255. * CCDC_INPUT_CSI2A: CSI2a receiver
  256. * CCDC_INPUT_CCP2B: CCP2b receiver
  257. * CCDC_INPUT_CSI2C: CSI2c receiver
  258. *
  259. * The bridge and lane shifter are configured according to the selected input
  260. * and the ISP platform data.
  261. */
  262. void omap3isp_configure_bridge(struct isp_device *isp,
  263. enum ccdc_input_entity input,
  264. const struct isp_parallel_platform_data *pdata,
  265. unsigned int shift)
  266. {
  267. u32 ispctrl_val;
  268. ispctrl_val = isp_reg_readl(isp, OMAP3_ISP_IOMEM_MAIN, ISP_CTRL);
  269. ispctrl_val &= ~ISPCTRL_SHIFT_MASK;
  270. ispctrl_val &= ~ISPCTRL_PAR_CLK_POL_INV;
  271. ispctrl_val &= ~ISPCTRL_PAR_SER_CLK_SEL_MASK;
  272. ispctrl_val &= ~ISPCTRL_PAR_BRIDGE_MASK;
  273. switch (input) {
  274. case CCDC_INPUT_PARALLEL:
  275. ispctrl_val |= ISPCTRL_PAR_SER_CLK_SEL_PARALLEL;
  276. ispctrl_val |= pdata->clk_pol << ISPCTRL_PAR_CLK_POL_SHIFT;
  277. ispctrl_val |= pdata->bridge << ISPCTRL_PAR_BRIDGE_SHIFT;
  278. shift += pdata->data_lane_shift * 2;
  279. break;
  280. case CCDC_INPUT_CSI2A:
  281. ispctrl_val |= ISPCTRL_PAR_SER_CLK_SEL_CSIA;
  282. break;
  283. case CCDC_INPUT_CCP2B:
  284. ispctrl_val |= ISPCTRL_PAR_SER_CLK_SEL_CSIB;
  285. break;
  286. case CCDC_INPUT_CSI2C:
  287. ispctrl_val |= ISPCTRL_PAR_SER_CLK_SEL_CSIC;
  288. break;
  289. default:
  290. return;
  291. }
  292. ispctrl_val |= ((shift/2) << ISPCTRL_SHIFT_SHIFT) & ISPCTRL_SHIFT_MASK;
  293. ispctrl_val &= ~ISPCTRL_SYNC_DETECT_MASK;
  294. ispctrl_val |= ISPCTRL_SYNC_DETECT_VSRISE;
  295. isp_reg_writel(isp, ispctrl_val, OMAP3_ISP_IOMEM_MAIN, ISP_CTRL);
  296. }
  297. void omap3isp_hist_dma_done(struct isp_device *isp)
  298. {
  299. if (omap3isp_ccdc_busy(&isp->isp_ccdc) ||
  300. omap3isp_stat_pcr_busy(&isp->isp_hist)) {
  301. /* Histogram cannot be enabled in this frame anymore */
  302. atomic_set(&isp->isp_hist.buf_err, 1);
  303. dev_dbg(isp->dev, "hist: Out of synchronization with "
  304. "CCDC. Ignoring next buffer.\n");
  305. }
  306. }
  307. static inline void isp_isr_dbg(struct isp_device *isp, u32 irqstatus)
  308. {
  309. static const char *name[] = {
  310. "CSIA_IRQ",
  311. "res1",
  312. "res2",
  313. "CSIB_LCM_IRQ",
  314. "CSIB_IRQ",
  315. "res5",
  316. "res6",
  317. "res7",
  318. "CCDC_VD0_IRQ",
  319. "CCDC_VD1_IRQ",
  320. "CCDC_VD2_IRQ",
  321. "CCDC_ERR_IRQ",
  322. "H3A_AF_DONE_IRQ",
  323. "H3A_AWB_DONE_IRQ",
  324. "res14",
  325. "res15",
  326. "HIST_DONE_IRQ",
  327. "CCDC_LSC_DONE",
  328. "CCDC_LSC_PREFETCH_COMPLETED",
  329. "CCDC_LSC_PREFETCH_ERROR",
  330. "PRV_DONE_IRQ",
  331. "CBUFF_IRQ",
  332. "res22",
  333. "res23",
  334. "RSZ_DONE_IRQ",
  335. "OVF_IRQ",
  336. "res26",
  337. "res27",
  338. "MMU_ERR_IRQ",
  339. "OCP_ERR_IRQ",
  340. "SEC_ERR_IRQ",
  341. "HS_VS_IRQ",
  342. };
  343. int i;
  344. dev_dbg(isp->dev, "ISP IRQ: ");
  345. for (i = 0; i < ARRAY_SIZE(name); i++) {
  346. if ((1 << i) & irqstatus)
  347. printk(KERN_CONT "%s ", name[i]);
  348. }
  349. printk(KERN_CONT "\n");
  350. }
  351. static void isp_isr_sbl(struct isp_device *isp)
  352. {
  353. struct device *dev = isp->dev;
  354. struct isp_pipeline *pipe;
  355. u32 sbl_pcr;
  356. /*
  357. * Handle shared buffer logic overflows for video buffers.
  358. * ISPSBL_PCR_CCDCPRV_2_RSZ_OVF can be safely ignored.
  359. */
  360. sbl_pcr = isp_reg_readl(isp, OMAP3_ISP_IOMEM_SBL, ISPSBL_PCR);
  361. isp_reg_writel(isp, sbl_pcr, OMAP3_ISP_IOMEM_SBL, ISPSBL_PCR);
  362. sbl_pcr &= ~ISPSBL_PCR_CCDCPRV_2_RSZ_OVF;
  363. if (sbl_pcr)
  364. dev_dbg(dev, "SBL overflow (PCR = 0x%08x)\n", sbl_pcr);
  365. if (sbl_pcr & ISPSBL_PCR_CSIB_WBL_OVF) {
  366. pipe = to_isp_pipeline(&isp->isp_ccp2.subdev.entity);
  367. if (pipe != NULL)
  368. pipe->error = true;
  369. }
  370. if (sbl_pcr & ISPSBL_PCR_CSIA_WBL_OVF) {
  371. pipe = to_isp_pipeline(&isp->isp_csi2a.subdev.entity);
  372. if (pipe != NULL)
  373. pipe->error = true;
  374. }
  375. if (sbl_pcr & ISPSBL_PCR_CCDC_WBL_OVF) {
  376. pipe = to_isp_pipeline(&isp->isp_ccdc.subdev.entity);
  377. if (pipe != NULL)
  378. pipe->error = true;
  379. }
  380. if (sbl_pcr & ISPSBL_PCR_PRV_WBL_OVF) {
  381. pipe = to_isp_pipeline(&isp->isp_prev.subdev.entity);
  382. if (pipe != NULL)
  383. pipe->error = true;
  384. }
  385. if (sbl_pcr & (ISPSBL_PCR_RSZ1_WBL_OVF
  386. | ISPSBL_PCR_RSZ2_WBL_OVF
  387. | ISPSBL_PCR_RSZ3_WBL_OVF
  388. | ISPSBL_PCR_RSZ4_WBL_OVF)) {
  389. pipe = to_isp_pipeline(&isp->isp_res.subdev.entity);
  390. if (pipe != NULL)
  391. pipe->error = true;
  392. }
  393. if (sbl_pcr & ISPSBL_PCR_H3A_AF_WBL_OVF)
  394. omap3isp_stat_sbl_overflow(&isp->isp_af);
  395. if (sbl_pcr & ISPSBL_PCR_H3A_AEAWB_WBL_OVF)
  396. omap3isp_stat_sbl_overflow(&isp->isp_aewb);
  397. }
  398. /*
  399. * isp_isr - Interrupt Service Routine for Camera ISP module.
  400. * @irq: Not used currently.
  401. * @_isp: Pointer to the OMAP3 ISP device
  402. *
  403. * Handles the corresponding callback if plugged in.
  404. *
  405. * Returns IRQ_HANDLED when IRQ was correctly handled, or IRQ_NONE when the
  406. * IRQ wasn't handled.
  407. */
  408. static irqreturn_t isp_isr(int irq, void *_isp)
  409. {
  410. static const u32 ccdc_events = IRQ0STATUS_CCDC_LSC_PREF_ERR_IRQ |
  411. IRQ0STATUS_CCDC_LSC_DONE_IRQ |
  412. IRQ0STATUS_CCDC_VD0_IRQ |
  413. IRQ0STATUS_CCDC_VD1_IRQ |
  414. IRQ0STATUS_HS_VS_IRQ;
  415. struct isp_device *isp = _isp;
  416. u32 irqstatus;
  417. irqstatus = isp_reg_readl(isp, OMAP3_ISP_IOMEM_MAIN, ISP_IRQ0STATUS);
  418. isp_reg_writel(isp, irqstatus, OMAP3_ISP_IOMEM_MAIN, ISP_IRQ0STATUS);
  419. isp_isr_sbl(isp);
  420. if (irqstatus & IRQ0STATUS_CSIA_IRQ)
  421. omap3isp_csi2_isr(&isp->isp_csi2a);
  422. if (irqstatus & IRQ0STATUS_CSIB_IRQ)
  423. omap3isp_ccp2_isr(&isp->isp_ccp2);
  424. if (irqstatus & IRQ0STATUS_CCDC_VD0_IRQ) {
  425. if (isp->isp_ccdc.output & CCDC_OUTPUT_PREVIEW)
  426. omap3isp_preview_isr_frame_sync(&isp->isp_prev);
  427. if (isp->isp_ccdc.output & CCDC_OUTPUT_RESIZER)
  428. omap3isp_resizer_isr_frame_sync(&isp->isp_res);
  429. omap3isp_stat_isr_frame_sync(&isp->isp_aewb);
  430. omap3isp_stat_isr_frame_sync(&isp->isp_af);
  431. omap3isp_stat_isr_frame_sync(&isp->isp_hist);
  432. }
  433. if (irqstatus & ccdc_events)
  434. omap3isp_ccdc_isr(&isp->isp_ccdc, irqstatus & ccdc_events);
  435. if (irqstatus & IRQ0STATUS_PRV_DONE_IRQ) {
  436. if (isp->isp_prev.output & PREVIEW_OUTPUT_RESIZER)
  437. omap3isp_resizer_isr_frame_sync(&isp->isp_res);
  438. omap3isp_preview_isr(&isp->isp_prev);
  439. }
  440. if (irqstatus & IRQ0STATUS_RSZ_DONE_IRQ)
  441. omap3isp_resizer_isr(&isp->isp_res);
  442. if (irqstatus & IRQ0STATUS_H3A_AWB_DONE_IRQ)
  443. omap3isp_stat_isr(&isp->isp_aewb);
  444. if (irqstatus & IRQ0STATUS_H3A_AF_DONE_IRQ)
  445. omap3isp_stat_isr(&isp->isp_af);
  446. if (irqstatus & IRQ0STATUS_HIST_DONE_IRQ)
  447. omap3isp_stat_isr(&isp->isp_hist);
  448. omap3isp_flush(isp);
  449. #if defined(DEBUG) && defined(ISP_ISR_DEBUG)
  450. isp_isr_dbg(isp, irqstatus);
  451. #endif
  452. return IRQ_HANDLED;
  453. }
  454. /* -----------------------------------------------------------------------------
  455. * Pipeline power management
  456. *
  457. * Entities must be powered up when part of a pipeline that contains at least
  458. * one open video device node.
  459. *
  460. * To achieve this use the entity use_count field to track the number of users.
  461. * For entities corresponding to video device nodes the use_count field stores
  462. * the users count of the node. For entities corresponding to subdevs the
  463. * use_count field stores the total number of users of all video device nodes
  464. * in the pipeline.
  465. *
  466. * The omap3isp_pipeline_pm_use() function must be called in the open() and
  467. * close() handlers of video device nodes. It increments or decrements the use
  468. * count of all subdev entities in the pipeline.
  469. *
  470. * To react to link management on powered pipelines, the link setup notification
  471. * callback updates the use count of all entities in the source and sink sides
  472. * of the link.
  473. */
  474. /*
  475. * isp_pipeline_pm_use_count - Count the number of users of a pipeline
  476. * @entity: The entity
  477. *
  478. * Return the total number of users of all video device nodes in the pipeline.
  479. */
  480. static int isp_pipeline_pm_use_count(struct media_entity *entity)
  481. {
  482. struct media_entity_graph graph;
  483. int use = 0;
  484. media_entity_graph_walk_start(&graph, entity);
  485. while ((entity = media_entity_graph_walk_next(&graph))) {
  486. if (media_entity_type(entity) == MEDIA_ENT_T_DEVNODE)
  487. use += entity->use_count;
  488. }
  489. return use;
  490. }
  491. /*
  492. * isp_pipeline_pm_power_one - Apply power change to an entity
  493. * @entity: The entity
  494. * @change: Use count change
  495. *
  496. * Change the entity use count by @change. If the entity is a subdev update its
  497. * power state by calling the core::s_power operation when the use count goes
  498. * from 0 to != 0 or from != 0 to 0.
  499. *
  500. * Return 0 on success or a negative error code on failure.
  501. */
  502. static int isp_pipeline_pm_power_one(struct media_entity *entity, int change)
  503. {
  504. struct v4l2_subdev *subdev;
  505. int ret;
  506. subdev = media_entity_type(entity) == MEDIA_ENT_T_V4L2_SUBDEV
  507. ? media_entity_to_v4l2_subdev(entity) : NULL;
  508. if (entity->use_count == 0 && change > 0 && subdev != NULL) {
  509. ret = v4l2_subdev_call(subdev, core, s_power, 1);
  510. if (ret < 0 && ret != -ENOIOCTLCMD)
  511. return ret;
  512. }
  513. entity->use_count += change;
  514. WARN_ON(entity->use_count < 0);
  515. if (entity->use_count == 0 && change < 0 && subdev != NULL)
  516. v4l2_subdev_call(subdev, core, s_power, 0);
  517. return 0;
  518. }
  519. /*
  520. * isp_pipeline_pm_power - Apply power change to all entities in a pipeline
  521. * @entity: The entity
  522. * @change: Use count change
  523. *
  524. * Walk the pipeline to update the use count and the power state of all non-node
  525. * entities.
  526. *
  527. * Return 0 on success or a negative error code on failure.
  528. */
  529. static int isp_pipeline_pm_power(struct media_entity *entity, int change)
  530. {
  531. struct media_entity_graph graph;
  532. struct media_entity *first = entity;
  533. int ret = 0;
  534. if (!change)
  535. return 0;
  536. media_entity_graph_walk_start(&graph, entity);
  537. while (!ret && (entity = media_entity_graph_walk_next(&graph)))
  538. if (media_entity_type(entity) != MEDIA_ENT_T_DEVNODE)
  539. ret = isp_pipeline_pm_power_one(entity, change);
  540. if (!ret)
  541. return 0;
  542. media_entity_graph_walk_start(&graph, first);
  543. while ((first = media_entity_graph_walk_next(&graph))
  544. && first != entity)
  545. if (media_entity_type(first) != MEDIA_ENT_T_DEVNODE)
  546. isp_pipeline_pm_power_one(first, -change);
  547. return ret;
  548. }
  549. /*
  550. * omap3isp_pipeline_pm_use - Update the use count of an entity
  551. * @entity: The entity
  552. * @use: Use (1) or stop using (0) the entity
  553. *
  554. * Update the use count of all entities in the pipeline and power entities on or
  555. * off accordingly.
  556. *
  557. * Return 0 on success or a negative error code on failure. Powering entities
  558. * off is assumed to never fail. No failure can occur when the use parameter is
  559. * set to 0.
  560. */
  561. int omap3isp_pipeline_pm_use(struct media_entity *entity, int use)
  562. {
  563. int change = use ? 1 : -1;
  564. int ret;
  565. mutex_lock(&entity->parent->graph_mutex);
  566. /* Apply use count to node. */
  567. entity->use_count += change;
  568. WARN_ON(entity->use_count < 0);
  569. /* Apply power change to connected non-nodes. */
  570. ret = isp_pipeline_pm_power(entity, change);
  571. if (ret < 0)
  572. entity->use_count -= change;
  573. mutex_unlock(&entity->parent->graph_mutex);
  574. return ret;
  575. }
  576. /*
  577. * isp_pipeline_link_notify - Link management notification callback
  578. * @source: Pad at the start of the link
  579. * @sink: Pad at the end of the link
  580. * @flags: New link flags that will be applied
  581. *
  582. * React to link management on powered pipelines by updating the use count of
  583. * all entities in the source and sink sides of the link. Entities are powered
  584. * on or off accordingly.
  585. *
  586. * Return 0 on success or a negative error code on failure. Powering entities
  587. * off is assumed to never fail. This function will not fail for disconnection
  588. * events.
  589. */
  590. static int isp_pipeline_link_notify(struct media_pad *source,
  591. struct media_pad *sink, u32 flags)
  592. {
  593. int source_use = isp_pipeline_pm_use_count(source->entity);
  594. int sink_use = isp_pipeline_pm_use_count(sink->entity);
  595. int ret;
  596. if (!(flags & MEDIA_LNK_FL_ENABLED)) {
  597. /* Powering off entities is assumed to never fail. */
  598. isp_pipeline_pm_power(source->entity, -sink_use);
  599. isp_pipeline_pm_power(sink->entity, -source_use);
  600. return 0;
  601. }
  602. ret = isp_pipeline_pm_power(source->entity, sink_use);
  603. if (ret < 0)
  604. return ret;
  605. ret = isp_pipeline_pm_power(sink->entity, source_use);
  606. if (ret < 0)
  607. isp_pipeline_pm_power(source->entity, -sink_use);
  608. return ret;
  609. }
  610. /* -----------------------------------------------------------------------------
  611. * Pipeline stream management
  612. */
  613. /*
  614. * isp_pipeline_enable - Enable streaming on a pipeline
  615. * @pipe: ISP pipeline
  616. * @mode: Stream mode (single shot or continuous)
  617. *
  618. * Walk the entities chain starting at the pipeline output video node and start
  619. * all modules in the chain in the given mode.
  620. *
  621. * Return 0 if successful, or the return value of the failed video::s_stream
  622. * operation otherwise.
  623. */
  624. static int isp_pipeline_enable(struct isp_pipeline *pipe,
  625. enum isp_pipeline_stream_state mode)
  626. {
  627. struct isp_device *isp = pipe->output->isp;
  628. struct media_entity *entity;
  629. struct media_pad *pad;
  630. struct v4l2_subdev *subdev;
  631. unsigned long flags;
  632. int ret;
  633. /* If the preview engine crashed it might not respond to read/write
  634. * operations on the L4 bus. This would result in a bus fault and a
  635. * kernel oops. Refuse to start streaming in that case. This check must
  636. * be performed before the loop below to avoid starting entities if the
  637. * pipeline won't start anyway (those entities would then likely fail to
  638. * stop, making the problem worse).
  639. */
  640. if ((pipe->entities & isp->crashed) &
  641. (1U << isp->isp_prev.subdev.entity.id))
  642. return -EIO;
  643. spin_lock_irqsave(&pipe->lock, flags);
  644. pipe->state &= ~(ISP_PIPELINE_IDLE_INPUT | ISP_PIPELINE_IDLE_OUTPUT);
  645. spin_unlock_irqrestore(&pipe->lock, flags);
  646. pipe->do_propagation = false;
  647. entity = &pipe->output->video.entity;
  648. while (1) {
  649. pad = &entity->pads[0];
  650. if (!(pad->flags & MEDIA_PAD_FL_SINK))
  651. break;
  652. pad = media_entity_remote_source(pad);
  653. if (pad == NULL ||
  654. media_entity_type(pad->entity) != MEDIA_ENT_T_V4L2_SUBDEV)
  655. break;
  656. entity = pad->entity;
  657. subdev = media_entity_to_v4l2_subdev(entity);
  658. ret = v4l2_subdev_call(subdev, video, s_stream, mode);
  659. if (ret < 0 && ret != -ENOIOCTLCMD)
  660. return ret;
  661. if (subdev == &isp->isp_ccdc.subdev) {
  662. v4l2_subdev_call(&isp->isp_aewb.subdev, video,
  663. s_stream, mode);
  664. v4l2_subdev_call(&isp->isp_af.subdev, video,
  665. s_stream, mode);
  666. v4l2_subdev_call(&isp->isp_hist.subdev, video,
  667. s_stream, mode);
  668. pipe->do_propagation = true;
  669. }
  670. }
  671. return 0;
  672. }
  673. static int isp_pipeline_wait_resizer(struct isp_device *isp)
  674. {
  675. return omap3isp_resizer_busy(&isp->isp_res);
  676. }
  677. static int isp_pipeline_wait_preview(struct isp_device *isp)
  678. {
  679. return omap3isp_preview_busy(&isp->isp_prev);
  680. }
  681. static int isp_pipeline_wait_ccdc(struct isp_device *isp)
  682. {
  683. return omap3isp_stat_busy(&isp->isp_af)
  684. || omap3isp_stat_busy(&isp->isp_aewb)
  685. || omap3isp_stat_busy(&isp->isp_hist)
  686. || omap3isp_ccdc_busy(&isp->isp_ccdc);
  687. }
  688. #define ISP_STOP_TIMEOUT msecs_to_jiffies(1000)
  689. static int isp_pipeline_wait(struct isp_device *isp,
  690. int(*busy)(struct isp_device *isp))
  691. {
  692. unsigned long timeout = jiffies + ISP_STOP_TIMEOUT;
  693. while (!time_after(jiffies, timeout)) {
  694. if (!busy(isp))
  695. return 0;
  696. }
  697. return 1;
  698. }
  699. /*
  700. * isp_pipeline_disable - Disable streaming on a pipeline
  701. * @pipe: ISP pipeline
  702. *
  703. * Walk the entities chain starting at the pipeline output video node and stop
  704. * all modules in the chain. Wait synchronously for the modules to be stopped if
  705. * necessary.
  706. *
  707. * Return 0 if all modules have been properly stopped, or -ETIMEDOUT if a module
  708. * can't be stopped (in which case a software reset of the ISP is probably
  709. * necessary).
  710. */
  711. static int isp_pipeline_disable(struct isp_pipeline *pipe)
  712. {
  713. struct isp_device *isp = pipe->output->isp;
  714. struct media_entity *entity;
  715. struct media_pad *pad;
  716. struct v4l2_subdev *subdev;
  717. int failure = 0;
  718. int ret;
  719. /*
  720. * We need to stop all the modules after CCDC first or they'll
  721. * never stop since they may not get a full frame from CCDC.
  722. */
  723. entity = &pipe->output->video.entity;
  724. while (1) {
  725. pad = &entity->pads[0];
  726. if (!(pad->flags & MEDIA_PAD_FL_SINK))
  727. break;
  728. pad = media_entity_remote_source(pad);
  729. if (pad == NULL ||
  730. media_entity_type(pad->entity) != MEDIA_ENT_T_V4L2_SUBDEV)
  731. break;
  732. entity = pad->entity;
  733. subdev = media_entity_to_v4l2_subdev(entity);
  734. if (subdev == &isp->isp_ccdc.subdev) {
  735. v4l2_subdev_call(&isp->isp_aewb.subdev,
  736. video, s_stream, 0);
  737. v4l2_subdev_call(&isp->isp_af.subdev,
  738. video, s_stream, 0);
  739. v4l2_subdev_call(&isp->isp_hist.subdev,
  740. video, s_stream, 0);
  741. }
  742. v4l2_subdev_call(subdev, video, s_stream, 0);
  743. if (subdev == &isp->isp_res.subdev)
  744. ret = isp_pipeline_wait(isp, isp_pipeline_wait_resizer);
  745. else if (subdev == &isp->isp_prev.subdev)
  746. ret = isp_pipeline_wait(isp, isp_pipeline_wait_preview);
  747. else if (subdev == &isp->isp_ccdc.subdev)
  748. ret = isp_pipeline_wait(isp, isp_pipeline_wait_ccdc);
  749. else
  750. ret = 0;
  751. if (ret) {
  752. dev_info(isp->dev, "Unable to stop %s\n", subdev->name);
  753. /* If the entity failed to stopped, assume it has
  754. * crashed. Mark it as such, the ISP will be reset when
  755. * applications will release it.
  756. */
  757. isp->crashed |= 1U << subdev->entity.id;
  758. failure = -ETIMEDOUT;
  759. }
  760. }
  761. return failure;
  762. }
  763. /*
  764. * omap3isp_pipeline_set_stream - Enable/disable streaming on a pipeline
  765. * @pipe: ISP pipeline
  766. * @state: Stream state (stopped, single shot or continuous)
  767. *
  768. * Set the pipeline to the given stream state. Pipelines can be started in
  769. * single-shot or continuous mode.
  770. *
  771. * Return 0 if successful, or the return value of the failed video::s_stream
  772. * operation otherwise. The pipeline state is not updated when the operation
  773. * fails, except when stopping the pipeline.
  774. */
  775. int omap3isp_pipeline_set_stream(struct isp_pipeline *pipe,
  776. enum isp_pipeline_stream_state state)
  777. {
  778. int ret;
  779. if (state == ISP_PIPELINE_STREAM_STOPPED)
  780. ret = isp_pipeline_disable(pipe);
  781. else
  782. ret = isp_pipeline_enable(pipe, state);
  783. if (ret == 0 || state == ISP_PIPELINE_STREAM_STOPPED)
  784. pipe->stream_state = state;
  785. return ret;
  786. }
  787. /*
  788. * isp_pipeline_resume - Resume streaming on a pipeline
  789. * @pipe: ISP pipeline
  790. *
  791. * Resume video output and input and re-enable pipeline.
  792. */
  793. static void isp_pipeline_resume(struct isp_pipeline *pipe)
  794. {
  795. int singleshot = pipe->stream_state == ISP_PIPELINE_STREAM_SINGLESHOT;
  796. omap3isp_video_resume(pipe->output, !singleshot);
  797. if (singleshot)
  798. omap3isp_video_resume(pipe->input, 0);
  799. isp_pipeline_enable(pipe, pipe->stream_state);
  800. }
  801. /*
  802. * isp_pipeline_suspend - Suspend streaming on a pipeline
  803. * @pipe: ISP pipeline
  804. *
  805. * Suspend pipeline.
  806. */
  807. static void isp_pipeline_suspend(struct isp_pipeline *pipe)
  808. {
  809. isp_pipeline_disable(pipe);
  810. }
  811. /*
  812. * isp_pipeline_is_last - Verify if entity has an enabled link to the output
  813. * video node
  814. * @me: ISP module's media entity
  815. *
  816. * Returns 1 if the entity has an enabled link to the output video node or 0
  817. * otherwise. It's true only while pipeline can have no more than one output
  818. * node.
  819. */
  820. static int isp_pipeline_is_last(struct media_entity *me)
  821. {
  822. struct isp_pipeline *pipe;
  823. struct media_pad *pad;
  824. if (!me->pipe)
  825. return 0;
  826. pipe = to_isp_pipeline(me);
  827. if (pipe->stream_state == ISP_PIPELINE_STREAM_STOPPED)
  828. return 0;
  829. pad = media_entity_remote_source(&pipe->output->pad);
  830. return pad->entity == me;
  831. }
  832. /*
  833. * isp_suspend_module_pipeline - Suspend pipeline to which belongs the module
  834. * @me: ISP module's media entity
  835. *
  836. * Suspend the whole pipeline if module's entity has an enabled link to the
  837. * output video node. It works only while pipeline can have no more than one
  838. * output node.
  839. */
  840. static void isp_suspend_module_pipeline(struct media_entity *me)
  841. {
  842. if (isp_pipeline_is_last(me))
  843. isp_pipeline_suspend(to_isp_pipeline(me));
  844. }
  845. /*
  846. * isp_resume_module_pipeline - Resume pipeline to which belongs the module
  847. * @me: ISP module's media entity
  848. *
  849. * Resume the whole pipeline if module's entity has an enabled link to the
  850. * output video node. It works only while pipeline can have no more than one
  851. * output node.
  852. */
  853. static void isp_resume_module_pipeline(struct media_entity *me)
  854. {
  855. if (isp_pipeline_is_last(me))
  856. isp_pipeline_resume(to_isp_pipeline(me));
  857. }
  858. /*
  859. * isp_suspend_modules - Suspend ISP submodules.
  860. * @isp: OMAP3 ISP device
  861. *
  862. * Returns 0 if suspend left in idle state all the submodules properly,
  863. * or returns 1 if a general Reset is required to suspend the submodules.
  864. */
  865. static int isp_suspend_modules(struct isp_device *isp)
  866. {
  867. unsigned long timeout;
  868. omap3isp_stat_suspend(&isp->isp_aewb);
  869. omap3isp_stat_suspend(&isp->isp_af);
  870. omap3isp_stat_suspend(&isp->isp_hist);
  871. isp_suspend_module_pipeline(&isp->isp_res.subdev.entity);
  872. isp_suspend_module_pipeline(&isp->isp_prev.subdev.entity);
  873. isp_suspend_module_pipeline(&isp->isp_ccdc.subdev.entity);
  874. isp_suspend_module_pipeline(&isp->isp_csi2a.subdev.entity);
  875. isp_suspend_module_pipeline(&isp->isp_ccp2.subdev.entity);
  876. timeout = jiffies + ISP_STOP_TIMEOUT;
  877. while (omap3isp_stat_busy(&isp->isp_af)
  878. || omap3isp_stat_busy(&isp->isp_aewb)
  879. || omap3isp_stat_busy(&isp->isp_hist)
  880. || omap3isp_preview_busy(&isp->isp_prev)
  881. || omap3isp_resizer_busy(&isp->isp_res)
  882. || omap3isp_ccdc_busy(&isp->isp_ccdc)) {
  883. if (time_after(jiffies, timeout)) {
  884. dev_info(isp->dev, "can't stop modules.\n");
  885. return 1;
  886. }
  887. msleep(1);
  888. }
  889. return 0;
  890. }
  891. /*
  892. * isp_resume_modules - Resume ISP submodules.
  893. * @isp: OMAP3 ISP device
  894. */
  895. static void isp_resume_modules(struct isp_device *isp)
  896. {
  897. omap3isp_stat_resume(&isp->isp_aewb);
  898. omap3isp_stat_resume(&isp->isp_af);
  899. omap3isp_stat_resume(&isp->isp_hist);
  900. isp_resume_module_pipeline(&isp->isp_res.subdev.entity);
  901. isp_resume_module_pipeline(&isp->isp_prev.subdev.entity);
  902. isp_resume_module_pipeline(&isp->isp_ccdc.subdev.entity);
  903. isp_resume_module_pipeline(&isp->isp_csi2a.subdev.entity);
  904. isp_resume_module_pipeline(&isp->isp_ccp2.subdev.entity);
  905. }
  906. /*
  907. * isp_reset - Reset ISP with a timeout wait for idle.
  908. * @isp: OMAP3 ISP device
  909. */
  910. static int isp_reset(struct isp_device *isp)
  911. {
  912. unsigned long timeout = 0;
  913. isp_reg_writel(isp,
  914. isp_reg_readl(isp, OMAP3_ISP_IOMEM_MAIN, ISP_SYSCONFIG)
  915. | ISP_SYSCONFIG_SOFTRESET,
  916. OMAP3_ISP_IOMEM_MAIN, ISP_SYSCONFIG);
  917. while (!(isp_reg_readl(isp, OMAP3_ISP_IOMEM_MAIN,
  918. ISP_SYSSTATUS) & 0x1)) {
  919. if (timeout++ > 10000) {
  920. dev_alert(isp->dev, "cannot reset ISP\n");
  921. return -ETIMEDOUT;
  922. }
  923. udelay(1);
  924. }
  925. isp->crashed = 0;
  926. return 0;
  927. }
  928. /*
  929. * isp_save_context - Saves the values of the ISP module registers.
  930. * @isp: OMAP3 ISP device
  931. * @reg_list: Structure containing pairs of register address and value to
  932. * modify on OMAP.
  933. */
  934. static void
  935. isp_save_context(struct isp_device *isp, struct isp_reg *reg_list)
  936. {
  937. struct isp_reg *next = reg_list;
  938. for (; next->reg != ISP_TOK_TERM; next++)
  939. next->val = isp_reg_readl(isp, next->mmio_range, next->reg);
  940. }
  941. /*
  942. * isp_restore_context - Restores the values of the ISP module registers.
  943. * @isp: OMAP3 ISP device
  944. * @reg_list: Structure containing pairs of register address and value to
  945. * modify on OMAP.
  946. */
  947. static void
  948. isp_restore_context(struct isp_device *isp, struct isp_reg *reg_list)
  949. {
  950. struct isp_reg *next = reg_list;
  951. for (; next->reg != ISP_TOK_TERM; next++)
  952. isp_reg_writel(isp, next->val, next->mmio_range, next->reg);
  953. }
  954. /*
  955. * isp_save_ctx - Saves ISP, CCDC, HIST, H3A, PREV, RESZ & MMU context.
  956. * @isp: OMAP3 ISP device
  957. *
  958. * Routine for saving the context of each module in the ISP.
  959. * CCDC, HIST, H3A, PREV, RESZ and MMU.
  960. */
  961. static void isp_save_ctx(struct isp_device *isp)
  962. {
  963. isp_save_context(isp, isp_reg_list);
  964. omap_iommu_save_ctx(isp->dev);
  965. }
  966. /*
  967. * isp_restore_ctx - Restores ISP, CCDC, HIST, H3A, PREV, RESZ & MMU context.
  968. * @isp: OMAP3 ISP device
  969. *
  970. * Routine for restoring the context of each module in the ISP.
  971. * CCDC, HIST, H3A, PREV, RESZ and MMU.
  972. */
  973. static void isp_restore_ctx(struct isp_device *isp)
  974. {
  975. isp_restore_context(isp, isp_reg_list);
  976. omap_iommu_restore_ctx(isp->dev);
  977. omap3isp_ccdc_restore_context(isp);
  978. omap3isp_preview_restore_context(isp);
  979. }
  980. /* -----------------------------------------------------------------------------
  981. * SBL resources management
  982. */
  983. #define OMAP3_ISP_SBL_READ (OMAP3_ISP_SBL_CSI1_READ | \
  984. OMAP3_ISP_SBL_CCDC_LSC_READ | \
  985. OMAP3_ISP_SBL_PREVIEW_READ | \
  986. OMAP3_ISP_SBL_RESIZER_READ)
  987. #define OMAP3_ISP_SBL_WRITE (OMAP3_ISP_SBL_CSI1_WRITE | \
  988. OMAP3_ISP_SBL_CSI2A_WRITE | \
  989. OMAP3_ISP_SBL_CSI2C_WRITE | \
  990. OMAP3_ISP_SBL_CCDC_WRITE | \
  991. OMAP3_ISP_SBL_PREVIEW_WRITE)
  992. void omap3isp_sbl_enable(struct isp_device *isp, enum isp_sbl_resource res)
  993. {
  994. u32 sbl = 0;
  995. isp->sbl_resources |= res;
  996. if (isp->sbl_resources & OMAP3_ISP_SBL_CSI1_READ)
  997. sbl |= ISPCTRL_SBL_SHARED_RPORTA;
  998. if (isp->sbl_resources & OMAP3_ISP_SBL_CCDC_LSC_READ)
  999. sbl |= ISPCTRL_SBL_SHARED_RPORTB;
  1000. if (isp->sbl_resources & OMAP3_ISP_SBL_CSI2C_WRITE)
  1001. sbl |= ISPCTRL_SBL_SHARED_WPORTC;
  1002. if (isp->sbl_resources & OMAP3_ISP_SBL_RESIZER_WRITE)
  1003. sbl |= ISPCTRL_SBL_WR0_RAM_EN;
  1004. if (isp->sbl_resources & OMAP3_ISP_SBL_WRITE)
  1005. sbl |= ISPCTRL_SBL_WR1_RAM_EN;
  1006. if (isp->sbl_resources & OMAP3_ISP_SBL_READ)
  1007. sbl |= ISPCTRL_SBL_RD_RAM_EN;
  1008. isp_reg_set(isp, OMAP3_ISP_IOMEM_MAIN, ISP_CTRL, sbl);
  1009. }
  1010. void omap3isp_sbl_disable(struct isp_device *isp, enum isp_sbl_resource res)
  1011. {
  1012. u32 sbl = 0;
  1013. isp->sbl_resources &= ~res;
  1014. if (!(isp->sbl_resources & OMAP3_ISP_SBL_CSI1_READ))
  1015. sbl |= ISPCTRL_SBL_SHARED_RPORTA;
  1016. if (!(isp->sbl_resources & OMAP3_ISP_SBL_CCDC_LSC_READ))
  1017. sbl |= ISPCTRL_SBL_SHARED_RPORTB;
  1018. if (!(isp->sbl_resources & OMAP3_ISP_SBL_CSI2C_WRITE))
  1019. sbl |= ISPCTRL_SBL_SHARED_WPORTC;
  1020. if (!(isp->sbl_resources & OMAP3_ISP_SBL_RESIZER_WRITE))
  1021. sbl |= ISPCTRL_SBL_WR0_RAM_EN;
  1022. if (!(isp->sbl_resources & OMAP3_ISP_SBL_WRITE))
  1023. sbl |= ISPCTRL_SBL_WR1_RAM_EN;
  1024. if (!(isp->sbl_resources & OMAP3_ISP_SBL_READ))
  1025. sbl |= ISPCTRL_SBL_RD_RAM_EN;
  1026. isp_reg_clr(isp, OMAP3_ISP_IOMEM_MAIN, ISP_CTRL, sbl);
  1027. }
  1028. /*
  1029. * isp_module_sync_idle - Helper to sync module with its idle state
  1030. * @me: ISP submodule's media entity
  1031. * @wait: ISP submodule's wait queue for streamoff/interrupt synchronization
  1032. * @stopping: flag which tells module wants to stop
  1033. *
  1034. * This function checks if ISP submodule needs to wait for next interrupt. If
  1035. * yes, makes the caller to sleep while waiting for such event.
  1036. */
  1037. int omap3isp_module_sync_idle(struct media_entity *me, wait_queue_head_t *wait,
  1038. atomic_t *stopping)
  1039. {
  1040. struct isp_pipeline *pipe = to_isp_pipeline(me);
  1041. if (pipe->stream_state == ISP_PIPELINE_STREAM_STOPPED ||
  1042. (pipe->stream_state == ISP_PIPELINE_STREAM_SINGLESHOT &&
  1043. !isp_pipeline_ready(pipe)))
  1044. return 0;
  1045. /*
  1046. * atomic_set() doesn't include memory barrier on ARM platform for SMP
  1047. * scenario. We'll call it here to avoid race conditions.
  1048. */
  1049. atomic_set(stopping, 1);
  1050. smp_mb();
  1051. /*
  1052. * If module is the last one, it's writing to memory. In this case,
  1053. * it's necessary to check if the module is already paused due to
  1054. * DMA queue underrun or if it has to wait for next interrupt to be
  1055. * idle.
  1056. * If it isn't the last one, the function won't sleep but *stopping
  1057. * will still be set to warn next submodule caller's interrupt the
  1058. * module wants to be idle.
  1059. */
  1060. if (isp_pipeline_is_last(me)) {
  1061. struct isp_video *video = pipe->output;
  1062. unsigned long flags;
  1063. spin_lock_irqsave(&video->queue->irqlock, flags);
  1064. if (video->dmaqueue_flags & ISP_VIDEO_DMAQUEUE_UNDERRUN) {
  1065. spin_unlock_irqrestore(&video->queue->irqlock, flags);
  1066. atomic_set(stopping, 0);
  1067. smp_mb();
  1068. return 0;
  1069. }
  1070. spin_unlock_irqrestore(&video->queue->irqlock, flags);
  1071. if (!wait_event_timeout(*wait, !atomic_read(stopping),
  1072. msecs_to_jiffies(1000))) {
  1073. atomic_set(stopping, 0);
  1074. smp_mb();
  1075. return -ETIMEDOUT;
  1076. }
  1077. }
  1078. return 0;
  1079. }
  1080. /*
  1081. * omap3isp_module_sync_is_stopped - Helper to verify if module was stopping
  1082. * @wait: ISP submodule's wait queue for streamoff/interrupt synchronization
  1083. * @stopping: flag which tells module wants to stop
  1084. *
  1085. * This function checks if ISP submodule was stopping. In case of yes, it
  1086. * notices the caller by setting stopping to 0 and waking up the wait queue.
  1087. * Returns 1 if it was stopping or 0 otherwise.
  1088. */
  1089. int omap3isp_module_sync_is_stopping(wait_queue_head_t *wait,
  1090. atomic_t *stopping)
  1091. {
  1092. if (atomic_cmpxchg(stopping, 1, 0)) {
  1093. wake_up(wait);
  1094. return 1;
  1095. }
  1096. return 0;
  1097. }
  1098. /* --------------------------------------------------------------------------
  1099. * Clock management
  1100. */
  1101. #define ISPCTRL_CLKS_MASK (ISPCTRL_H3A_CLK_EN | \
  1102. ISPCTRL_HIST_CLK_EN | \
  1103. ISPCTRL_RSZ_CLK_EN | \
  1104. (ISPCTRL_CCDC_CLK_EN | ISPCTRL_CCDC_RAM_EN) | \
  1105. (ISPCTRL_PREV_CLK_EN | ISPCTRL_PREV_RAM_EN))
  1106. static void __isp_subclk_update(struct isp_device *isp)
  1107. {
  1108. u32 clk = 0;
  1109. /* AEWB and AF share the same clock. */
  1110. if (isp->subclk_resources &
  1111. (OMAP3_ISP_SUBCLK_AEWB | OMAP3_ISP_SUBCLK_AF))
  1112. clk |= ISPCTRL_H3A_CLK_EN;
  1113. if (isp->subclk_resources & OMAP3_ISP_SUBCLK_HIST)
  1114. clk |= ISPCTRL_HIST_CLK_EN;
  1115. if (isp->subclk_resources & OMAP3_ISP_SUBCLK_RESIZER)
  1116. clk |= ISPCTRL_RSZ_CLK_EN;
  1117. /* NOTE: For CCDC & Preview submodules, we need to affect internal
  1118. * RAM as well.
  1119. */
  1120. if (isp->subclk_resources & OMAP3_ISP_SUBCLK_CCDC)
  1121. clk |= ISPCTRL_CCDC_CLK_EN | ISPCTRL_CCDC_RAM_EN;
  1122. if (isp->subclk_resources & OMAP3_ISP_SUBCLK_PREVIEW)
  1123. clk |= ISPCTRL_PREV_CLK_EN | ISPCTRL_PREV_RAM_EN;
  1124. isp_reg_clr_set(isp, OMAP3_ISP_IOMEM_MAIN, ISP_CTRL,
  1125. ISPCTRL_CLKS_MASK, clk);
  1126. }
  1127. void omap3isp_subclk_enable(struct isp_device *isp,
  1128. enum isp_subclk_resource res)
  1129. {
  1130. isp->subclk_resources |= res;
  1131. __isp_subclk_update(isp);
  1132. }
  1133. void omap3isp_subclk_disable(struct isp_device *isp,
  1134. enum isp_subclk_resource res)
  1135. {
  1136. isp->subclk_resources &= ~res;
  1137. __isp_subclk_update(isp);
  1138. }
  1139. /*
  1140. * isp_enable_clocks - Enable ISP clocks
  1141. * @isp: OMAP3 ISP device
  1142. *
  1143. * Return 0 if successful, or clk_enable return value if any of tthem fails.
  1144. */
  1145. static int isp_enable_clocks(struct isp_device *isp)
  1146. {
  1147. int r;
  1148. unsigned long rate;
  1149. int divisor;
  1150. /*
  1151. * cam_mclk clock chain:
  1152. * dpll4 -> dpll4_m5 -> dpll4_m5x2 -> cam_mclk
  1153. *
  1154. * In OMAP3630 dpll4_m5x2 != 2 x dpll4_m5 but both are
  1155. * set to the same value. Hence the rate set for dpll4_m5
  1156. * has to be twice of what is set on OMAP3430 to get
  1157. * the required value for cam_mclk
  1158. */
  1159. if (cpu_is_omap3630())
  1160. divisor = 1;
  1161. else
  1162. divisor = 2;
  1163. r = clk_enable(isp->clock[ISP_CLK_CAM_ICK]);
  1164. if (r) {
  1165. dev_err(isp->dev, "clk_enable cam_ick failed\n");
  1166. goto out_clk_enable_ick;
  1167. }
  1168. r = clk_set_rate(isp->clock[ISP_CLK_DPLL4_M5_CK],
  1169. CM_CAM_MCLK_HZ/divisor);
  1170. if (r) {
  1171. dev_err(isp->dev, "clk_set_rate for dpll4_m5_ck failed\n");
  1172. goto out_clk_enable_mclk;
  1173. }
  1174. r = clk_enable(isp->clock[ISP_CLK_CAM_MCLK]);
  1175. if (r) {
  1176. dev_err(isp->dev, "clk_enable cam_mclk failed\n");
  1177. goto out_clk_enable_mclk;
  1178. }
  1179. rate = clk_get_rate(isp->clock[ISP_CLK_CAM_MCLK]);
  1180. if (rate != CM_CAM_MCLK_HZ)
  1181. dev_warn(isp->dev, "unexpected cam_mclk rate:\n"
  1182. " expected : %d\n"
  1183. " actual : %ld\n", CM_CAM_MCLK_HZ, rate);
  1184. r = clk_enable(isp->clock[ISP_CLK_CSI2_FCK]);
  1185. if (r) {
  1186. dev_err(isp->dev, "clk_enable csi2_fck failed\n");
  1187. goto out_clk_enable_csi2_fclk;
  1188. }
  1189. return 0;
  1190. out_clk_enable_csi2_fclk:
  1191. clk_disable(isp->clock[ISP_CLK_CAM_MCLK]);
  1192. out_clk_enable_mclk:
  1193. clk_disable(isp->clock[ISP_CLK_CAM_ICK]);
  1194. out_clk_enable_ick:
  1195. return r;
  1196. }
  1197. /*
  1198. * isp_disable_clocks - Disable ISP clocks
  1199. * @isp: OMAP3 ISP device
  1200. */
  1201. static void isp_disable_clocks(struct isp_device *isp)
  1202. {
  1203. clk_disable(isp->clock[ISP_CLK_CAM_ICK]);
  1204. clk_disable(isp->clock[ISP_CLK_CAM_MCLK]);
  1205. clk_disable(isp->clock[ISP_CLK_CSI2_FCK]);
  1206. }
  1207. static const char *isp_clocks[] = {
  1208. "cam_ick",
  1209. "cam_mclk",
  1210. "dpll4_m5_ck",
  1211. "csi2_96m_fck",
  1212. "l3_ick",
  1213. };
  1214. static void isp_put_clocks(struct isp_device *isp)
  1215. {
  1216. unsigned int i;
  1217. for (i = 0; i < ARRAY_SIZE(isp_clocks); ++i) {
  1218. if (isp->clock[i]) {
  1219. clk_put(isp->clock[i]);
  1220. isp->clock[i] = NULL;
  1221. }
  1222. }
  1223. }
  1224. static int isp_get_clocks(struct isp_device *isp)
  1225. {
  1226. struct clk *clk;
  1227. unsigned int i;
  1228. for (i = 0; i < ARRAY_SIZE(isp_clocks); ++i) {
  1229. clk = clk_get(isp->dev, isp_clocks[i]);
  1230. if (IS_ERR(clk)) {
  1231. dev_err(isp->dev, "clk_get %s failed\n", isp_clocks[i]);
  1232. isp_put_clocks(isp);
  1233. return PTR_ERR(clk);
  1234. }
  1235. isp->clock[i] = clk;
  1236. }
  1237. return 0;
  1238. }
  1239. /*
  1240. * omap3isp_get - Acquire the ISP resource.
  1241. *
  1242. * Initializes the clocks for the first acquire.
  1243. *
  1244. * Increment the reference count on the ISP. If the first reference is taken,
  1245. * enable clocks and power-up all submodules.
  1246. *
  1247. * Return a pointer to the ISP device structure, or NULL if an error occurred.
  1248. */
  1249. struct isp_device *omap3isp_get(struct isp_device *isp)
  1250. {
  1251. struct isp_device *__isp = isp;
  1252. if (isp == NULL)
  1253. return NULL;
  1254. mutex_lock(&isp->isp_mutex);
  1255. if (isp->ref_count > 0)
  1256. goto out;
  1257. if (isp_enable_clocks(isp) < 0) {
  1258. __isp = NULL;
  1259. goto out;
  1260. }
  1261. /* We don't want to restore context before saving it! */
  1262. if (isp->has_context)
  1263. isp_restore_ctx(isp);
  1264. else
  1265. isp->has_context = 1;
  1266. isp_enable_interrupts(isp);
  1267. out:
  1268. if (__isp != NULL)
  1269. isp->ref_count++;
  1270. mutex_unlock(&isp->isp_mutex);
  1271. return __isp;
  1272. }
  1273. /*
  1274. * omap3isp_put - Release the ISP
  1275. *
  1276. * Decrement the reference count on the ISP. If the last reference is released,
  1277. * power-down all submodules, disable clocks and free temporary buffers.
  1278. */
  1279. void omap3isp_put(struct isp_device *isp)
  1280. {
  1281. if (isp == NULL)
  1282. return;
  1283. mutex_lock(&isp->isp_mutex);
  1284. BUG_ON(isp->ref_count == 0);
  1285. if (--isp->ref_count == 0) {
  1286. isp_disable_interrupts(isp);
  1287. if (isp->domain)
  1288. isp_save_ctx(isp);
  1289. /* Reset the ISP if an entity has failed to stop. This is the
  1290. * only way to recover from such conditions.
  1291. */
  1292. if (isp->crashed)
  1293. isp_reset(isp);
  1294. isp_disable_clocks(isp);
  1295. }
  1296. mutex_unlock(&isp->isp_mutex);
  1297. }
  1298. /* --------------------------------------------------------------------------
  1299. * Platform device driver
  1300. */
  1301. /*
  1302. * omap3isp_print_status - Prints the values of the ISP Control Module registers
  1303. * @isp: OMAP3 ISP device
  1304. */
  1305. #define ISP_PRINT_REGISTER(isp, name)\
  1306. dev_dbg(isp->dev, "###ISP " #name "=0x%08x\n", \
  1307. isp_reg_readl(isp, OMAP3_ISP_IOMEM_MAIN, ISP_##name))
  1308. #define SBL_PRINT_REGISTER(isp, name)\
  1309. dev_dbg(isp->dev, "###SBL " #name "=0x%08x\n", \
  1310. isp_reg_readl(isp, OMAP3_ISP_IOMEM_SBL, ISPSBL_##name))
  1311. void omap3isp_print_status(struct isp_device *isp)
  1312. {
  1313. dev_dbg(isp->dev, "-------------ISP Register dump--------------\n");
  1314. ISP_PRINT_REGISTER(isp, SYSCONFIG);
  1315. ISP_PRINT_REGISTER(isp, SYSSTATUS);
  1316. ISP_PRINT_REGISTER(isp, IRQ0ENABLE);
  1317. ISP_PRINT_REGISTER(isp, IRQ0STATUS);
  1318. ISP_PRINT_REGISTER(isp, TCTRL_GRESET_LENGTH);
  1319. ISP_PRINT_REGISTER(isp, TCTRL_PSTRB_REPLAY);
  1320. ISP_PRINT_REGISTER(isp, CTRL);
  1321. ISP_PRINT_REGISTER(isp, TCTRL_CTRL);
  1322. ISP_PRINT_REGISTER(isp, TCTRL_FRAME);
  1323. ISP_PRINT_REGISTER(isp, TCTRL_PSTRB_DELAY);
  1324. ISP_PRINT_REGISTER(isp, TCTRL_STRB_DELAY);
  1325. ISP_PRINT_REGISTER(isp, TCTRL_SHUT_DELAY);
  1326. ISP_PRINT_REGISTER(isp, TCTRL_PSTRB_LENGTH);
  1327. ISP_PRINT_REGISTER(isp, TCTRL_STRB_LENGTH);
  1328. ISP_PRINT_REGISTER(isp, TCTRL_SHUT_LENGTH);
  1329. SBL_PRINT_REGISTER(isp, PCR);
  1330. SBL_PRINT_REGISTER(isp, SDR_REQ_EXP);
  1331. dev_dbg(isp->dev, "--------------------------------------------\n");
  1332. }
  1333. #ifdef CONFIG_PM
  1334. /*
  1335. * Power management support.
  1336. *
  1337. * As the ISP can't properly handle an input video stream interruption on a non
  1338. * frame boundary, the ISP pipelines need to be stopped before sensors get
  1339. * suspended. However, as suspending the sensors can require a running clock,
  1340. * which can be provided by the ISP, the ISP can't be completely suspended
  1341. * before the sensor.
  1342. *
  1343. * To solve this problem power management support is split into prepare/complete
  1344. * and suspend/resume operations. The pipelines are stopped in prepare() and the
  1345. * ISP clocks get disabled in suspend(). Similarly, the clocks are reenabled in
  1346. * resume(), and the the pipelines are restarted in complete().
  1347. *
  1348. * TODO: PM dependencies between the ISP and sensors are not modeled explicitly
  1349. * yet.
  1350. */
  1351. static int isp_pm_prepare(struct device *dev)
  1352. {
  1353. struct isp_device *isp = dev_get_drvdata(dev);
  1354. int reset;
  1355. WARN_ON(mutex_is_locked(&isp->isp_mutex));
  1356. if (isp->ref_count == 0)
  1357. return 0;
  1358. reset = isp_suspend_modules(isp);
  1359. isp_disable_interrupts(isp);
  1360. isp_save_ctx(isp);
  1361. if (reset)
  1362. isp_reset(isp);
  1363. return 0;
  1364. }
  1365. static int isp_pm_suspend(struct device *dev)
  1366. {
  1367. struct isp_device *isp = dev_get_drvdata(dev);
  1368. WARN_ON(mutex_is_locked(&isp->isp_mutex));
  1369. if (isp->ref_count)
  1370. isp_disable_clocks(isp);
  1371. return 0;
  1372. }
  1373. static int isp_pm_resume(struct device *dev)
  1374. {
  1375. struct isp_device *isp = dev_get_drvdata(dev);
  1376. if (isp->ref_count == 0)
  1377. return 0;
  1378. return isp_enable_clocks(isp);
  1379. }
  1380. static void isp_pm_complete(struct device *dev)
  1381. {
  1382. struct isp_device *isp = dev_get_drvdata(dev);
  1383. if (isp->ref_count == 0)
  1384. return;
  1385. isp_restore_ctx(isp);
  1386. isp_enable_interrupts(isp);
  1387. isp_resume_modules(isp);
  1388. }
  1389. #else
  1390. #define isp_pm_prepare NULL
  1391. #define isp_pm_suspend NULL
  1392. #define isp_pm_resume NULL
  1393. #define isp_pm_complete NULL
  1394. #endif /* CONFIG_PM */
  1395. static void isp_unregister_entities(struct isp_device *isp)
  1396. {
  1397. omap3isp_csi2_unregister_entities(&isp->isp_csi2a);
  1398. omap3isp_ccp2_unregister_entities(&isp->isp_ccp2);
  1399. omap3isp_ccdc_unregister_entities(&isp->isp_ccdc);
  1400. omap3isp_preview_unregister_entities(&isp->isp_prev);
  1401. omap3isp_resizer_unregister_entities(&isp->isp_res);
  1402. omap3isp_stat_unregister_entities(&isp->isp_aewb);
  1403. omap3isp_stat_unregister_entities(&isp->isp_af);
  1404. omap3isp_stat_unregister_entities(&isp->isp_hist);
  1405. v4l2_device_unregister(&isp->v4l2_dev);
  1406. media_device_unregister(&isp->media_dev);
  1407. }
  1408. /*
  1409. * isp_register_subdev_group - Register a group of subdevices
  1410. * @isp: OMAP3 ISP device
  1411. * @board_info: I2C subdevs board information array
  1412. *
  1413. * Register all I2C subdevices in the board_info array. The array must be
  1414. * terminated by a NULL entry, and the first entry must be the sensor.
  1415. *
  1416. * Return a pointer to the sensor media entity if it has been successfully
  1417. * registered, or NULL otherwise.
  1418. */
  1419. static struct v4l2_subdev *
  1420. isp_register_subdev_group(struct isp_device *isp,
  1421. struct isp_subdev_i2c_board_info *board_info)
  1422. {
  1423. struct v4l2_subdev *sensor = NULL;
  1424. unsigned int first;
  1425. if (board_info->board_info == NULL)
  1426. return NULL;
  1427. for (first = 1; board_info->board_info; ++board_info, first = 0) {
  1428. struct v4l2_subdev *subdev;
  1429. struct i2c_adapter *adapter;
  1430. adapter = i2c_get_adapter(board_info->i2c_adapter_id);
  1431. if (adapter == NULL) {
  1432. printk(KERN_ERR "%s: Unable to get I2C adapter %d for "
  1433. "device %s\n", __func__,
  1434. board_info->i2c_adapter_id,
  1435. board_info->board_info->type);
  1436. continue;
  1437. }
  1438. subdev = v4l2_i2c_new_subdev_board(&isp->v4l2_dev, adapter,
  1439. board_info->board_info, NULL);
  1440. if (subdev == NULL) {
  1441. printk(KERN_ERR "%s: Unable to register subdev %s\n",
  1442. __func__, board_info->board_info->type);
  1443. continue;
  1444. }
  1445. if (first)
  1446. sensor = subdev;
  1447. }
  1448. return sensor;
  1449. }
  1450. static int isp_register_entities(struct isp_device *isp)
  1451. {
  1452. struct isp_platform_data *pdata = isp->pdata;
  1453. struct isp_v4l2_subdevs_group *subdevs;
  1454. int ret;
  1455. isp->media_dev.dev = isp->dev;
  1456. strlcpy(isp->media_dev.model, "TI OMAP3 ISP",
  1457. sizeof(isp->media_dev.model));
  1458. isp->media_dev.hw_revision = isp->revision;
  1459. isp->media_dev.link_notify = isp_pipeline_link_notify;
  1460. ret = media_device_register(&isp->media_dev);
  1461. if (ret < 0) {
  1462. printk(KERN_ERR "%s: Media device registration failed (%d)\n",
  1463. __func__, ret);
  1464. return ret;
  1465. }
  1466. isp->v4l2_dev.mdev = &isp->media_dev;
  1467. ret = v4l2_device_register(isp->dev, &isp->v4l2_dev);
  1468. if (ret < 0) {
  1469. printk(KERN_ERR "%s: V4L2 device registration failed (%d)\n",
  1470. __func__, ret);
  1471. goto done;
  1472. }
  1473. /* Register internal entities */
  1474. ret = omap3isp_ccp2_register_entities(&isp->isp_ccp2, &isp->v4l2_dev);
  1475. if (ret < 0)
  1476. goto done;
  1477. ret = omap3isp_csi2_register_entities(&isp->isp_csi2a, &isp->v4l2_dev);
  1478. if (ret < 0)
  1479. goto done;
  1480. ret = omap3isp_ccdc_register_entities(&isp->isp_ccdc, &isp->v4l2_dev);
  1481. if (ret < 0)
  1482. goto done;
  1483. ret = omap3isp_preview_register_entities(&isp->isp_prev,
  1484. &isp->v4l2_dev);
  1485. if (ret < 0)
  1486. goto done;
  1487. ret = omap3isp_resizer_register_entities(&isp->isp_res, &isp->v4l2_dev);
  1488. if (ret < 0)
  1489. goto done;
  1490. ret = omap3isp_stat_register_entities(&isp->isp_aewb, &isp->v4l2_dev);
  1491. if (ret < 0)
  1492. goto done;
  1493. ret = omap3isp_stat_register_entities(&isp->isp_af, &isp->v4l2_dev);
  1494. if (ret < 0)
  1495. goto done;
  1496. ret = omap3isp_stat_register_entities(&isp->isp_hist, &isp->v4l2_dev);
  1497. if (ret < 0)
  1498. goto done;
  1499. /* Register external entities */
  1500. for (subdevs = pdata->subdevs; subdevs && subdevs->subdevs; ++subdevs) {
  1501. struct v4l2_subdev *sensor;
  1502. struct media_entity *input;
  1503. unsigned int flags;
  1504. unsigned int pad;
  1505. sensor = isp_register_subdev_group(isp, subdevs->subdevs);
  1506. if (sensor == NULL)
  1507. continue;
  1508. sensor->host_priv = subdevs;
  1509. /* Connect the sensor to the correct interface module. Parallel
  1510. * sensors are connected directly to the CCDC, while serial
  1511. * sensors are connected to the CSI2a, CCP2b or CSI2c receiver
  1512. * through CSIPHY1 or CSIPHY2.
  1513. */
  1514. switch (subdevs->interface) {
  1515. case ISP_INTERFACE_PARALLEL:
  1516. input = &isp->isp_ccdc.subdev.entity;
  1517. pad = CCDC_PAD_SINK;
  1518. flags = 0;
  1519. break;
  1520. case ISP_INTERFACE_CSI2A_PHY2:
  1521. input = &isp->isp_csi2a.subdev.entity;
  1522. pad = CSI2_PAD_SINK;
  1523. flags = MEDIA_LNK_FL_IMMUTABLE
  1524. | MEDIA_LNK_FL_ENABLED;
  1525. break;
  1526. case ISP_INTERFACE_CCP2B_PHY1:
  1527. case ISP_INTERFACE_CCP2B_PHY2:
  1528. input = &isp->isp_ccp2.subdev.entity;
  1529. pad = CCP2_PAD_SINK;
  1530. flags = 0;
  1531. break;
  1532. case ISP_INTERFACE_CSI2C_PHY1:
  1533. input = &isp->isp_csi2c.subdev.entity;
  1534. pad = CSI2_PAD_SINK;
  1535. flags = MEDIA_LNK_FL_IMMUTABLE
  1536. | MEDIA_LNK_FL_ENABLED;
  1537. break;
  1538. default:
  1539. printk(KERN_ERR "%s: invalid interface type %u\n",
  1540. __func__, subdevs->interface);
  1541. ret = -EINVAL;
  1542. goto done;
  1543. }
  1544. ret = media_entity_create_link(&sensor->entity, 0, input, pad,
  1545. flags);
  1546. if (ret < 0)
  1547. goto done;
  1548. }
  1549. ret = v4l2_device_register_subdev_nodes(&isp->v4l2_dev);
  1550. done:
  1551. if (ret < 0)
  1552. isp_unregister_entities(isp);
  1553. return ret;
  1554. }
  1555. static void isp_cleanup_modules(struct isp_device *isp)
  1556. {
  1557. omap3isp_h3a_aewb_cleanup(isp);
  1558. omap3isp_h3a_af_cleanup(isp);
  1559. omap3isp_hist_cleanup(isp);
  1560. omap3isp_resizer_cleanup(isp);
  1561. omap3isp_preview_cleanup(isp);
  1562. omap3isp_ccdc_cleanup(isp);
  1563. omap3isp_ccp2_cleanup(isp);
  1564. omap3isp_csi2_cleanup(isp);
  1565. }
  1566. static int isp_initialize_modules(struct isp_device *isp)
  1567. {
  1568. int ret;
  1569. ret = omap3isp_csiphy_init(isp);
  1570. if (ret < 0) {
  1571. dev_err(isp->dev, "CSI PHY initialization failed\n");
  1572. goto error_csiphy;
  1573. }
  1574. ret = omap3isp_csi2_init(isp);
  1575. if (ret < 0) {
  1576. dev_err(isp->dev, "CSI2 initialization failed\n");
  1577. goto error_csi2;
  1578. }
  1579. ret = omap3isp_ccp2_init(isp);
  1580. if (ret < 0) {
  1581. dev_err(isp->dev, "CCP2 initialization failed\n");
  1582. goto error_ccp2;
  1583. }
  1584. ret = omap3isp_ccdc_init(isp);
  1585. if (ret < 0) {
  1586. dev_err(isp->dev, "CCDC initialization failed\n");
  1587. goto error_ccdc;
  1588. }
  1589. ret = omap3isp_preview_init(isp);
  1590. if (ret < 0) {
  1591. dev_err(isp->dev, "Preview initialization failed\n");
  1592. goto error_preview;
  1593. }
  1594. ret = omap3isp_resizer_init(isp);
  1595. if (ret < 0) {
  1596. dev_err(isp->dev, "Resizer initialization failed\n");
  1597. goto error_resizer;
  1598. }
  1599. ret = omap3isp_hist_init(isp);
  1600. if (ret < 0) {
  1601. dev_err(isp->dev, "Histogram initialization failed\n");
  1602. goto error_hist;
  1603. }
  1604. ret = omap3isp_h3a_aewb_init(isp);
  1605. if (ret < 0) {
  1606. dev_err(isp->dev, "H3A AEWB initialization failed\n");
  1607. goto error_h3a_aewb;
  1608. }
  1609. ret = omap3isp_h3a_af_init(isp);
  1610. if (ret < 0) {
  1611. dev_err(isp->dev, "H3A AF initialization failed\n");
  1612. goto error_h3a_af;
  1613. }
  1614. /* Connect the submodules. */
  1615. ret = media_entity_create_link(
  1616. &isp->isp_csi2a.subdev.entity, CSI2_PAD_SOURCE,
  1617. &isp->isp_ccdc.subdev.entity, CCDC_PAD_SINK, 0);
  1618. if (ret < 0)
  1619. goto error_link;
  1620. ret = media_entity_create_link(
  1621. &isp->isp_ccp2.subdev.entity, CCP2_PAD_SOURCE,
  1622. &isp->isp_ccdc.subdev.entity, CCDC_PAD_SINK, 0);
  1623. if (ret < 0)
  1624. goto error_link;
  1625. ret = media_entity_create_link(
  1626. &isp->isp_ccdc.subdev.entity, CCDC_PAD_SOURCE_VP,
  1627. &isp->isp_prev.subdev.entity, PREV_PAD_SINK, 0);
  1628. if (ret < 0)
  1629. goto error_link;
  1630. ret = media_entity_create_link(
  1631. &isp->isp_ccdc.subdev.entity, CCDC_PAD_SOURCE_OF,
  1632. &isp->isp_res.subdev.entity, RESZ_PAD_SINK, 0);
  1633. if (ret < 0)
  1634. goto error_link;
  1635. ret = media_entity_create_link(
  1636. &isp->isp_prev.subdev.entity, PREV_PAD_SOURCE,
  1637. &isp->isp_res.subdev.entity, RESZ_PAD_SINK, 0);
  1638. if (ret < 0)
  1639. goto error_link;
  1640. ret = media_entity_create_link(
  1641. &isp->isp_ccdc.subdev.entity, CCDC_PAD_SOURCE_VP,
  1642. &isp->isp_aewb.subdev.entity, 0,
  1643. MEDIA_LNK_FL_ENABLED | MEDIA_LNK_FL_IMMUTABLE);
  1644. if (ret < 0)
  1645. goto error_link;
  1646. ret = media_entity_create_link(
  1647. &isp->isp_ccdc.subdev.entity, CCDC_PAD_SOURCE_VP,
  1648. &isp->isp_af.subdev.entity, 0,
  1649. MEDIA_LNK_FL_ENABLED | MEDIA_LNK_FL_IMMUTABLE);
  1650. if (ret < 0)
  1651. goto error_link;
  1652. ret = media_entity_create_link(
  1653. &isp->isp_ccdc.subdev.entity, CCDC_PAD_SOURCE_VP,
  1654. &isp->isp_hist.subdev.entity, 0,
  1655. MEDIA_LNK_FL_ENABLED | MEDIA_LNK_FL_IMMUTABLE);
  1656. if (ret < 0)
  1657. goto error_link;
  1658. return 0;
  1659. error_link:
  1660. omap3isp_h3a_af_cleanup(isp);
  1661. error_h3a_af:
  1662. omap3isp_h3a_aewb_cleanup(isp);
  1663. error_h3a_aewb:
  1664. omap3isp_hist_cleanup(isp);
  1665. error_hist:
  1666. omap3isp_resizer_cleanup(isp);
  1667. error_resizer:
  1668. omap3isp_preview_cleanup(isp);
  1669. error_preview:
  1670. omap3isp_ccdc_cleanup(isp);
  1671. error_ccdc:
  1672. omap3isp_ccp2_cleanup(isp);
  1673. error_ccp2:
  1674. omap3isp_csi2_cleanup(isp);
  1675. error_csi2:
  1676. error_csiphy:
  1677. return ret;
  1678. }
  1679. /*
  1680. * isp_remove - Remove ISP platform device
  1681. * @pdev: Pointer to ISP platform device
  1682. *
  1683. * Always returns 0.
  1684. */
  1685. static int __devexit isp_remove(struct platform_device *pdev)
  1686. {
  1687. struct isp_device *isp = platform_get_drvdata(pdev);
  1688. int i;
  1689. isp_unregister_entities(isp);
  1690. isp_cleanup_modules(isp);
  1691. omap3isp_get(isp);
  1692. iommu_detach_device(isp->domain, &pdev->dev);
  1693. iommu_domain_free(isp->domain);
  1694. isp->domain = NULL;
  1695. omap3isp_put(isp);
  1696. free_irq(isp->irq_num, isp);
  1697. isp_put_clocks(isp);
  1698. for (i = 0; i < OMAP3_ISP_IOMEM_LAST; i++) {
  1699. if (isp->mmio_base[i]) {
  1700. iounmap(isp->mmio_base[i]);
  1701. isp->mmio_base[i] = NULL;
  1702. }
  1703. if (isp->mmio_base_phys[i]) {
  1704. release_mem_region(isp->mmio_base_phys[i],
  1705. isp->mmio_size[i]);
  1706. isp->mmio_base_phys[i] = 0;
  1707. }
  1708. }
  1709. regulator_put(isp->isp_csiphy1.vdd);
  1710. regulator_put(isp->isp_csiphy2.vdd);
  1711. kfree(isp);
  1712. return 0;
  1713. }
  1714. static int isp_map_mem_resource(struct platform_device *pdev,
  1715. struct isp_device *isp,
  1716. enum isp_mem_resources res)
  1717. {
  1718. struct resource *mem;
  1719. /* request the mem region for the camera registers */
  1720. mem = platform_get_resource(pdev, IORESOURCE_MEM, res);
  1721. if (!mem) {
  1722. dev_err(isp->dev, "no mem resource?\n");
  1723. return -ENODEV;
  1724. }
  1725. if (!request_mem_region(mem->start, resource_size(mem), pdev->name)) {
  1726. dev_err(isp->dev,
  1727. "cannot reserve camera register I/O region\n");
  1728. return -ENODEV;
  1729. }
  1730. isp->mmio_base_phys[res] = mem->start;
  1731. isp->mmio_size[res] = resource_size(mem);
  1732. /* map the region */
  1733. isp->mmio_base[res] = ioremap_nocache(isp->mmio_base_phys[res],
  1734. isp->mmio_size[res]);
  1735. if (!isp->mmio_base[res]) {
  1736. dev_err(isp->dev, "cannot map camera register I/O region\n");
  1737. return -ENODEV;
  1738. }
  1739. return 0;
  1740. }
  1741. /*
  1742. * isp_probe - Probe ISP platform device
  1743. * @pdev: Pointer to ISP platform device
  1744. *
  1745. * Returns 0 if successful,
  1746. * -ENOMEM if no memory available,
  1747. * -ENODEV if no platform device resources found
  1748. * or no space for remapping registers,
  1749. * -EINVAL if couldn't install ISR,
  1750. * or clk_get return error value.
  1751. */
  1752. static int __devinit isp_probe(struct platform_device *pdev)
  1753. {
  1754. struct isp_platform_data *pdata = pdev->dev.platform_data;
  1755. struct isp_device *isp;
  1756. int ret;
  1757. int i, m;
  1758. if (pdata == NULL)
  1759. return -EINVAL;
  1760. isp = kzalloc(sizeof(*isp), GFP_KERNEL);
  1761. if (!isp) {
  1762. dev_err(&pdev->dev, "could not allocate memory\n");
  1763. return -ENOMEM;
  1764. }
  1765. isp->autoidle = autoidle;
  1766. isp->platform_cb.set_xclk = isp_set_xclk;
  1767. mutex_init(&isp->isp_mutex);
  1768. spin_lock_init(&isp->stat_lock);
  1769. isp->dev = &pdev->dev;
  1770. isp->pdata = pdata;
  1771. isp->ref_count = 0;
  1772. isp->raw_dmamask = DMA_BIT_MASK(32);
  1773. isp->dev->dma_mask = &isp->raw_dmamask;
  1774. isp->dev->coherent_dma_mask = DMA_BIT_MASK(32);
  1775. platform_set_drvdata(pdev, isp);
  1776. /* Regulators */
  1777. isp->isp_csiphy1.vdd = regulator_get(&pdev->dev, "VDD_CSIPHY1");
  1778. isp->isp_csiphy2.vdd = regulator_get(&pdev->dev, "VDD_CSIPHY2");
  1779. /* Clocks */
  1780. ret = isp_map_mem_resource(pdev, isp, OMAP3_ISP_IOMEM_MAIN);
  1781. if (ret < 0)
  1782. goto error;
  1783. ret = isp_get_clocks(isp);
  1784. if (ret < 0)
  1785. goto error;
  1786. if (omap3isp_get(isp) == NULL)
  1787. goto error;
  1788. ret = isp_reset(isp);
  1789. if (ret < 0)
  1790. goto error_isp;
  1791. /* Memory resources */
  1792. isp->revision = isp_reg_readl(isp, OMAP3_ISP_IOMEM_MAIN, ISP_REVISION);
  1793. dev_info(isp->dev, "Revision %d.%d found\n",
  1794. (isp->revision & 0xf0) >> 4, isp->revision & 0x0f);
  1795. for (m = 0; m < ARRAY_SIZE(isp_res_maps); m++)
  1796. if (isp->revision == isp_res_maps[m].isp_rev)
  1797. break;
  1798. if (m == ARRAY_SIZE(isp_res_maps)) {
  1799. dev_err(isp->dev, "No resource map found for ISP rev %d.%d\n",
  1800. (isp->revision & 0xf0) >> 4, isp->revision & 0xf);
  1801. ret = -ENODEV;
  1802. goto error_isp;
  1803. }
  1804. for (i = 1; i < OMAP3_ISP_IOMEM_LAST; i++) {
  1805. if (isp_res_maps[m].map & 1 << i) {
  1806. ret = isp_map_mem_resource(pdev, isp, i);
  1807. if (ret)
  1808. goto error_isp;
  1809. }
  1810. }
  1811. isp->domain = iommu_domain_alloc(pdev->dev.bus);
  1812. if (!isp->domain) {
  1813. dev_err(isp->dev, "can't alloc iommu domain\n");
  1814. ret = -ENOMEM;
  1815. goto error_isp;
  1816. }
  1817. ret = iommu_attach_device(isp->domain, &pdev->dev);
  1818. if (ret) {
  1819. dev_err(&pdev->dev, "can't attach iommu device: %d\n", ret);
  1820. goto free_domain;
  1821. }
  1822. /* Interrupt */
  1823. isp->irq_num = platform_get_irq(pdev, 0);
  1824. if (isp->irq_num <= 0) {
  1825. dev_err(isp->dev, "No IRQ resource\n");
  1826. ret = -ENODEV;
  1827. goto detach_dev;
  1828. }
  1829. if (request_irq(isp->irq_num, isp_isr, IRQF_SHARED, "OMAP3 ISP", isp)) {
  1830. dev_err(isp->dev, "Unable to request IRQ\n");
  1831. ret = -EINVAL;
  1832. goto detach_dev;
  1833. }
  1834. /* Entities */
  1835. ret = isp_initialize_modules(isp);
  1836. if (ret < 0)
  1837. goto error_irq;
  1838. ret = isp_register_entities(isp);
  1839. if (ret < 0)
  1840. goto error_modules;
  1841. isp_power_settings(isp, 1);
  1842. omap3isp_put(isp);
  1843. return 0;
  1844. error_modules:
  1845. isp_cleanup_modules(isp);
  1846. error_irq:
  1847. free_irq(isp->irq_num, isp);
  1848. detach_dev:
  1849. iommu_detach_device(isp->domain, &pdev->dev);
  1850. free_domain:
  1851. iommu_domain_free(isp->domain);
  1852. error_isp:
  1853. omap3isp_put(isp);
  1854. error:
  1855. isp_put_clocks(isp);
  1856. for (i = 0; i < OMAP3_ISP_IOMEM_LAST; i++) {
  1857. if (isp->mmio_base[i]) {
  1858. iounmap(isp->mmio_base[i]);
  1859. isp->mmio_base[i] = NULL;
  1860. }
  1861. if (isp->mmio_base_phys[i]) {
  1862. release_mem_region(isp->mmio_base_phys[i],
  1863. isp->mmio_size[i]);
  1864. isp->mmio_base_phys[i] = 0;
  1865. }
  1866. }
  1867. regulator_put(isp->isp_csiphy2.vdd);
  1868. regulator_put(isp->isp_csiphy1.vdd);
  1869. platform_set_drvdata(pdev, NULL);
  1870. mutex_destroy(&isp->isp_mutex);
  1871. kfree(isp);
  1872. return ret;
  1873. }
  1874. static const struct dev_pm_ops omap3isp_pm_ops = {
  1875. .prepare = isp_pm_prepare,
  1876. .suspend = isp_pm_suspend,
  1877. .resume = isp_pm_resume,
  1878. .complete = isp_pm_complete,
  1879. };
  1880. static struct platform_device_id omap3isp_id_table[] = {
  1881. { "omap3isp", 0 },
  1882. { },
  1883. };
  1884. MODULE_DEVICE_TABLE(platform, omap3isp_id_table);
  1885. static struct platform_driver omap3isp_driver = {
  1886. .probe = isp_probe,
  1887. .remove = __devexit_p(isp_remove),
  1888. .id_table = omap3isp_id_table,
  1889. .driver = {
  1890. .owner = THIS_MODULE,
  1891. .name = "omap3isp",
  1892. .pm = &omap3isp_pm_ops,
  1893. },
  1894. };
  1895. module_platform_driver(omap3isp_driver);
  1896. MODULE_AUTHOR("Nokia Corporation");
  1897. MODULE_DESCRIPTION("TI OMAP3 ISP driver");
  1898. MODULE_LICENSE("GPL");
  1899. MODULE_VERSION(ISP_VIDEO_DRIVER_VERSION);