Kconfig 67 KB

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  1. config ARM
  2. bool
  3. default y
  4. select ARCH_HAVE_CUSTOM_GPIO_H
  5. select HAVE_AOUT
  6. select HAVE_DMA_API_DEBUG
  7. select HAVE_IDE if PCI || ISA || PCMCIA
  8. select HAVE_DMA_ATTRS
  9. select HAVE_DMA_CONTIGUOUS if (CPU_V6 || CPU_V6K || CPU_V7)
  10. select HAVE_MEMBLOCK
  11. select RTC_LIB
  12. select SYS_SUPPORTS_APM_EMULATION
  13. select GENERIC_ATOMIC64 if (CPU_V6 || !CPU_32v6K || !AEABI)
  14. select ARCH_HAS_ATOMIC64_DEC_IF_POSITIVE
  15. select HAVE_OPROFILE if (HAVE_PERF_EVENTS)
  16. select HAVE_ARCH_JUMP_LABEL if !XIP_KERNEL
  17. select HAVE_ARCH_KGDB
  18. select HAVE_ARCH_TRACEHOOK
  19. select HAVE_KPROBES if !XIP_KERNEL
  20. select HAVE_KRETPROBES if (HAVE_KPROBES)
  21. select HAVE_FUNCTION_TRACER if (!XIP_KERNEL)
  22. select HAVE_FTRACE_MCOUNT_RECORD if (!XIP_KERNEL)
  23. select HAVE_DYNAMIC_FTRACE if (!XIP_KERNEL)
  24. select HAVE_FUNCTION_GRAPH_TRACER if (!THUMB2_KERNEL)
  25. select ARCH_BINFMT_ELF_RANDOMIZE_PIE
  26. select HAVE_GENERIC_DMA_COHERENT
  27. select HAVE_KERNEL_GZIP
  28. select HAVE_KERNEL_LZO
  29. select HAVE_KERNEL_LZMA
  30. select HAVE_KERNEL_XZ
  31. select HAVE_IRQ_WORK
  32. select HAVE_PERF_EVENTS
  33. select PERF_USE_VMALLOC
  34. select HAVE_REGS_AND_STACK_ACCESS_API
  35. select HAVE_HW_BREAKPOINT if (PERF_EVENTS && (CPU_V6 || CPU_V6K || CPU_V7))
  36. select HAVE_C_RECORDMCOUNT
  37. select HAVE_GENERIC_HARDIRQS
  38. select HARDIRQS_SW_RESEND
  39. select GENERIC_IRQ_PROBE
  40. select GENERIC_IRQ_SHOW
  41. select GENERIC_IRQ_PROBE
  42. select ARCH_WANT_IPC_PARSE_VERSION
  43. select HARDIRQS_SW_RESEND
  44. select CPU_PM if (SUSPEND || CPU_IDLE)
  45. select GENERIC_PCI_IOMAP
  46. select HAVE_BPF_JIT
  47. select GENERIC_SMP_IDLE_THREAD
  48. select KTIME_SCALAR
  49. select GENERIC_CLOCKEVENTS_BROADCAST if SMP
  50. select GENERIC_STRNCPY_FROM_USER
  51. select GENERIC_STRNLEN_USER
  52. select DCACHE_WORD_ACCESS if (CPU_V6 || CPU_V6K || CPU_V7) && !CPU_BIG_ENDIAN
  53. help
  54. The ARM series is a line of low-power-consumption RISC chip designs
  55. licensed by ARM Ltd and targeted at embedded applications and
  56. handhelds such as the Compaq IPAQ. ARM-based PCs are no longer
  57. manufactured, but legacy ARM-based PC hardware remains popular in
  58. Europe. There is an ARM Linux project with a web page at
  59. <http://www.arm.linux.org.uk/>.
  60. config ARM_HAS_SG_CHAIN
  61. bool
  62. config NEED_SG_DMA_LENGTH
  63. bool
  64. config ARM_DMA_USE_IOMMU
  65. select NEED_SG_DMA_LENGTH
  66. select ARM_HAS_SG_CHAIN
  67. bool
  68. config HAVE_PWM
  69. bool
  70. config MIGHT_HAVE_PCI
  71. bool
  72. config SYS_SUPPORTS_APM_EMULATION
  73. bool
  74. config GENERIC_GPIO
  75. bool
  76. config HAVE_TCM
  77. bool
  78. select GENERIC_ALLOCATOR
  79. config HAVE_PROC_CPU
  80. bool
  81. config NO_IOPORT
  82. bool
  83. config EISA
  84. bool
  85. ---help---
  86. The Extended Industry Standard Architecture (EISA) bus was
  87. developed as an open alternative to the IBM MicroChannel bus.
  88. The EISA bus provided some of the features of the IBM MicroChannel
  89. bus while maintaining backward compatibility with cards made for
  90. the older ISA bus. The EISA bus saw limited use between 1988 and
  91. 1995 when it was made obsolete by the PCI bus.
  92. Say Y here if you are building a kernel for an EISA-based machine.
  93. Otherwise, say N.
  94. config SBUS
  95. bool
  96. config STACKTRACE_SUPPORT
  97. bool
  98. default y
  99. config HAVE_LATENCYTOP_SUPPORT
  100. bool
  101. depends on !SMP
  102. default y
  103. config LOCKDEP_SUPPORT
  104. bool
  105. default y
  106. config TRACE_IRQFLAGS_SUPPORT
  107. bool
  108. default y
  109. config GENERIC_LOCKBREAK
  110. bool
  111. default y
  112. depends on SMP && PREEMPT
  113. config RWSEM_GENERIC_SPINLOCK
  114. bool
  115. default y
  116. config RWSEM_XCHGADD_ALGORITHM
  117. bool
  118. config ARCH_HAS_ILOG2_U32
  119. bool
  120. config ARCH_HAS_ILOG2_U64
  121. bool
  122. config ARCH_HAS_CPUFREQ
  123. bool
  124. help
  125. Internal node to signify that the ARCH has CPUFREQ support
  126. and that the relevant menu configurations are displayed for
  127. it.
  128. config GENERIC_HWEIGHT
  129. bool
  130. default y
  131. config GENERIC_CALIBRATE_DELAY
  132. bool
  133. default y
  134. config ARCH_MAY_HAVE_PC_FDC
  135. bool
  136. config ZONE_DMA
  137. bool
  138. config NEED_DMA_MAP_STATE
  139. def_bool y
  140. config ARCH_HAS_DMA_SET_COHERENT_MASK
  141. bool
  142. config GENERIC_ISA_DMA
  143. bool
  144. config FIQ
  145. bool
  146. config NEED_RET_TO_USER
  147. bool
  148. config ARCH_MTD_XIP
  149. bool
  150. config VECTORS_BASE
  151. hex
  152. default 0xffff0000 if MMU || CPU_HIGH_VECTOR
  153. default DRAM_BASE if REMAP_VECTORS_TO_RAM
  154. default 0x00000000
  155. help
  156. The base address of exception vectors.
  157. config ARM_PATCH_PHYS_VIRT
  158. bool "Patch physical to virtual translations at runtime" if EMBEDDED
  159. default y
  160. depends on !XIP_KERNEL && MMU
  161. depends on !ARCH_REALVIEW || !SPARSEMEM
  162. help
  163. Patch phys-to-virt and virt-to-phys translation functions at
  164. boot and module load time according to the position of the
  165. kernel in system memory.
  166. This can only be used with non-XIP MMU kernels where the base
  167. of physical memory is at a 16MB boundary.
  168. Only disable this option if you know that you do not require
  169. this feature (eg, building a kernel for a single machine) and
  170. you need to shrink the kernel to the minimal size.
  171. config NEED_MACH_IO_H
  172. bool
  173. help
  174. Select this when mach/io.h is required to provide special
  175. definitions for this platform. The need for mach/io.h should
  176. be avoided when possible.
  177. config NEED_MACH_MEMORY_H
  178. bool
  179. help
  180. Select this when mach/memory.h is required to provide special
  181. definitions for this platform. The need for mach/memory.h should
  182. be avoided when possible.
  183. config PHYS_OFFSET
  184. hex "Physical address of main memory" if MMU
  185. depends on !ARM_PATCH_PHYS_VIRT && !NEED_MACH_MEMORY_H
  186. default DRAM_BASE if !MMU
  187. help
  188. Please provide the physical address corresponding to the
  189. location of main memory in your system.
  190. config GENERIC_BUG
  191. def_bool y
  192. depends on BUG
  193. source "init/Kconfig"
  194. source "kernel/Kconfig.freezer"
  195. menu "System Type"
  196. config MMU
  197. bool "MMU-based Paged Memory Management Support"
  198. default y
  199. help
  200. Select if you want MMU-based virtualised addressing space
  201. support by paged memory management. If unsure, say 'Y'.
  202. #
  203. # The "ARM system type" choice list is ordered alphabetically by option
  204. # text. Please add new entries in the option alphabetic order.
  205. #
  206. choice
  207. prompt "ARM system type"
  208. default ARCH_VERSATILE
  209. config ARCH_SOCFPGA
  210. bool "Altera SOCFPGA family"
  211. select ARCH_WANT_OPTIONAL_GPIOLIB
  212. select ARM_AMBA
  213. select ARM_GIC
  214. select CACHE_L2X0
  215. select CLKDEV_LOOKUP
  216. select COMMON_CLK
  217. select CPU_V7
  218. select DW_APB_TIMER
  219. select DW_APB_TIMER_OF
  220. select GENERIC_CLOCKEVENTS
  221. select GPIO_PL061 if GPIOLIB
  222. select HAVE_ARM_SCU
  223. select SPARSE_IRQ
  224. select USE_OF
  225. help
  226. This enables support for Altera SOCFPGA Cyclone V platform
  227. config ARCH_INTEGRATOR
  228. bool "ARM Ltd. Integrator family"
  229. select ARM_AMBA
  230. select ARCH_HAS_CPUFREQ
  231. select COMMON_CLK
  232. select CLK_VERSATILE
  233. select HAVE_TCM
  234. select ICST
  235. select GENERIC_CLOCKEVENTS
  236. select PLAT_VERSATILE
  237. select PLAT_VERSATILE_FPGA_IRQ
  238. select NEED_MACH_IO_H
  239. select NEED_MACH_MEMORY_H
  240. select SPARSE_IRQ
  241. select MULTI_IRQ_HANDLER
  242. help
  243. Support for ARM's Integrator platform.
  244. config ARCH_REALVIEW
  245. bool "ARM Ltd. RealView family"
  246. select ARM_AMBA
  247. select CLKDEV_LOOKUP
  248. select HAVE_MACH_CLKDEV
  249. select ICST
  250. select GENERIC_CLOCKEVENTS
  251. select ARCH_WANT_OPTIONAL_GPIOLIB
  252. select PLAT_VERSATILE
  253. select PLAT_VERSATILE_CLOCK
  254. select PLAT_VERSATILE_CLCD
  255. select ARM_TIMER_SP804
  256. select GPIO_PL061 if GPIOLIB
  257. select NEED_MACH_MEMORY_H
  258. help
  259. This enables support for ARM Ltd RealView boards.
  260. config ARCH_VERSATILE
  261. bool "ARM Ltd. Versatile family"
  262. select ARM_AMBA
  263. select ARM_VIC
  264. select CLKDEV_LOOKUP
  265. select HAVE_MACH_CLKDEV
  266. select ICST
  267. select GENERIC_CLOCKEVENTS
  268. select ARCH_WANT_OPTIONAL_GPIOLIB
  269. select NEED_MACH_IO_H if PCI
  270. select PLAT_VERSATILE
  271. select PLAT_VERSATILE_CLOCK
  272. select PLAT_VERSATILE_CLCD
  273. select PLAT_VERSATILE_FPGA_IRQ
  274. select ARM_TIMER_SP804
  275. help
  276. This enables support for ARM Ltd Versatile board.
  277. config ARCH_VEXPRESS
  278. bool "ARM Ltd. Versatile Express family"
  279. select ARCH_WANT_OPTIONAL_GPIOLIB
  280. select ARM_AMBA
  281. select ARM_TIMER_SP804
  282. select CLKDEV_LOOKUP
  283. select COMMON_CLK
  284. select GENERIC_CLOCKEVENTS
  285. select HAVE_CLK
  286. select HAVE_PATA_PLATFORM
  287. select ICST
  288. select NO_IOPORT
  289. select PLAT_VERSATILE
  290. select PLAT_VERSATILE_CLCD
  291. select REGULATOR_FIXED_VOLTAGE if REGULATOR
  292. help
  293. This enables support for the ARM Ltd Versatile Express boards.
  294. config ARCH_AT91
  295. bool "Atmel AT91"
  296. select ARCH_REQUIRE_GPIOLIB
  297. select HAVE_CLK
  298. select CLKDEV_LOOKUP
  299. select IRQ_DOMAIN
  300. select NEED_MACH_IO_H if PCCARD
  301. help
  302. This enables support for systems based on Atmel
  303. AT91RM9200 and AT91SAM9* processors.
  304. config ARCH_BCMRING
  305. bool "Broadcom BCMRING"
  306. depends on MMU
  307. select CPU_V6
  308. select ARM_AMBA
  309. select ARM_TIMER_SP804
  310. select CLKDEV_LOOKUP
  311. select GENERIC_CLOCKEVENTS
  312. select ARCH_WANT_OPTIONAL_GPIOLIB
  313. help
  314. Support for Broadcom's BCMRing platform.
  315. config ARCH_HIGHBANK
  316. bool "Calxeda Highbank-based"
  317. select ARCH_WANT_OPTIONAL_GPIOLIB
  318. select ARM_AMBA
  319. select ARM_GIC
  320. select ARM_TIMER_SP804
  321. select CACHE_L2X0
  322. select CLKDEV_LOOKUP
  323. select COMMON_CLK
  324. select CPU_V7
  325. select GENERIC_CLOCKEVENTS
  326. select HAVE_ARM_SCU
  327. select HAVE_SMP
  328. select SPARSE_IRQ
  329. select USE_OF
  330. help
  331. Support for the Calxeda Highbank SoC based boards.
  332. config ARCH_CLPS711X
  333. bool "Cirrus Logic CLPS711x/EP721x/EP731x-based"
  334. select CPU_ARM720T
  335. select ARCH_USES_GETTIMEOFFSET
  336. select NEED_MACH_MEMORY_H
  337. help
  338. Support for Cirrus Logic 711x/721x/731x based boards.
  339. config ARCH_CNS3XXX
  340. bool "Cavium Networks CNS3XXX family"
  341. select CPU_V6K
  342. select GENERIC_CLOCKEVENTS
  343. select ARM_GIC
  344. select MIGHT_HAVE_CACHE_L2X0
  345. select MIGHT_HAVE_PCI
  346. select PCI_DOMAINS if PCI
  347. help
  348. Support for Cavium Networks CNS3XXX platform.
  349. config ARCH_GEMINI
  350. bool "Cortina Systems Gemini"
  351. select CPU_FA526
  352. select ARCH_REQUIRE_GPIOLIB
  353. select ARCH_USES_GETTIMEOFFSET
  354. help
  355. Support for the Cortina Systems Gemini family SoCs
  356. config ARCH_PRIMA2
  357. bool "CSR SiRFSoC PRIMA2 ARM Cortex A9 Platform"
  358. select CPU_V7
  359. select NO_IOPORT
  360. select ARCH_REQUIRE_GPIOLIB
  361. select GENERIC_CLOCKEVENTS
  362. select CLKDEV_LOOKUP
  363. select GENERIC_IRQ_CHIP
  364. select MIGHT_HAVE_CACHE_L2X0
  365. select PINCTRL
  366. select PINCTRL_SIRF
  367. select USE_OF
  368. select ZONE_DMA
  369. help
  370. Support for CSR SiRFSoC ARM Cortex A9 Platform
  371. config ARCH_EBSA110
  372. bool "EBSA-110"
  373. select CPU_SA110
  374. select ISA
  375. select NO_IOPORT
  376. select ARCH_USES_GETTIMEOFFSET
  377. select NEED_MACH_IO_H
  378. select NEED_MACH_MEMORY_H
  379. help
  380. This is an evaluation board for the StrongARM processor available
  381. from Digital. It has limited hardware on-board, including an
  382. Ethernet interface, two PCMCIA sockets, two serial ports and a
  383. parallel port.
  384. config ARCH_EP93XX
  385. bool "EP93xx-based"
  386. select CPU_ARM920T
  387. select ARM_AMBA
  388. select ARM_VIC
  389. select CLKDEV_LOOKUP
  390. select ARCH_REQUIRE_GPIOLIB
  391. select ARCH_HAS_HOLES_MEMORYMODEL
  392. select ARCH_USES_GETTIMEOFFSET
  393. select NEED_MACH_MEMORY_H
  394. help
  395. This enables support for the Cirrus EP93xx series of CPUs.
  396. config ARCH_FOOTBRIDGE
  397. bool "FootBridge"
  398. select CPU_SA110
  399. select FOOTBRIDGE
  400. select GENERIC_CLOCKEVENTS
  401. select HAVE_IDE
  402. select NEED_MACH_IO_H
  403. select NEED_MACH_MEMORY_H
  404. help
  405. Support for systems based on the DC21285 companion chip
  406. ("FootBridge"), such as the Simtec CATS and the Rebel NetWinder.
  407. config ARCH_MXC
  408. bool "Freescale MXC/iMX-based"
  409. select GENERIC_CLOCKEVENTS
  410. select ARCH_REQUIRE_GPIOLIB
  411. select CLKDEV_LOOKUP
  412. select CLKSRC_MMIO
  413. select GENERIC_IRQ_CHIP
  414. select MULTI_IRQ_HANDLER
  415. select SPARSE_IRQ
  416. select USE_OF
  417. help
  418. Support for Freescale MXC/iMX-based family of processors
  419. config ARCH_MXS
  420. bool "Freescale MXS-based"
  421. select GENERIC_CLOCKEVENTS
  422. select ARCH_REQUIRE_GPIOLIB
  423. select CLKDEV_LOOKUP
  424. select CLKSRC_MMIO
  425. select COMMON_CLK
  426. select HAVE_CLK_PREPARE
  427. select PINCTRL
  428. select USE_OF
  429. help
  430. Support for Freescale MXS-based family of processors
  431. config ARCH_NETX
  432. bool "Hilscher NetX based"
  433. select CLKSRC_MMIO
  434. select CPU_ARM926T
  435. select ARM_VIC
  436. select GENERIC_CLOCKEVENTS
  437. help
  438. This enables support for systems based on the Hilscher NetX Soc
  439. config ARCH_H720X
  440. bool "Hynix HMS720x-based"
  441. select CPU_ARM720T
  442. select ISA_DMA_API
  443. select ARCH_USES_GETTIMEOFFSET
  444. help
  445. This enables support for systems based on the Hynix HMS720x
  446. config ARCH_IOP13XX
  447. bool "IOP13xx-based"
  448. depends on MMU
  449. select CPU_XSC3
  450. select PLAT_IOP
  451. select PCI
  452. select ARCH_SUPPORTS_MSI
  453. select VMSPLIT_1G
  454. select NEED_MACH_IO_H
  455. select NEED_MACH_MEMORY_H
  456. select NEED_RET_TO_USER
  457. help
  458. Support for Intel's IOP13XX (XScale) family of processors.
  459. config ARCH_IOP32X
  460. bool "IOP32x-based"
  461. depends on MMU
  462. select CPU_XSCALE
  463. select NEED_MACH_IO_H
  464. select NEED_RET_TO_USER
  465. select PLAT_IOP
  466. select PCI
  467. select ARCH_REQUIRE_GPIOLIB
  468. help
  469. Support for Intel's 80219 and IOP32X (XScale) family of
  470. processors.
  471. config ARCH_IOP33X
  472. bool "IOP33x-based"
  473. depends on MMU
  474. select CPU_XSCALE
  475. select NEED_MACH_IO_H
  476. select NEED_RET_TO_USER
  477. select PLAT_IOP
  478. select PCI
  479. select ARCH_REQUIRE_GPIOLIB
  480. help
  481. Support for Intel's IOP33X (XScale) family of processors.
  482. config ARCH_IXP4XX
  483. bool "IXP4xx-based"
  484. depends on MMU
  485. select ARCH_HAS_DMA_SET_COHERENT_MASK
  486. select CLKSRC_MMIO
  487. select CPU_XSCALE
  488. select ARCH_REQUIRE_GPIOLIB
  489. select GENERIC_CLOCKEVENTS
  490. select MIGHT_HAVE_PCI
  491. select NEED_MACH_IO_H
  492. select DMABOUNCE if PCI
  493. help
  494. Support for Intel's IXP4XX (XScale) family of processors.
  495. config ARCH_MVEBU
  496. bool "Marvell SOCs with Device Tree support"
  497. select GENERIC_CLOCKEVENTS
  498. select MULTI_IRQ_HANDLER
  499. select SPARSE_IRQ
  500. select CLKSRC_MMIO
  501. select GENERIC_IRQ_CHIP
  502. select IRQ_DOMAIN
  503. select COMMON_CLK
  504. help
  505. Support for the Marvell SoC Family with device tree support
  506. config ARCH_DOVE
  507. bool "Marvell Dove"
  508. select CPU_V7
  509. select PCI
  510. select ARCH_REQUIRE_GPIOLIB
  511. select GENERIC_CLOCKEVENTS
  512. select NEED_MACH_IO_H
  513. select PLAT_ORION
  514. help
  515. Support for the Marvell Dove SoC 88AP510
  516. config ARCH_KIRKWOOD
  517. bool "Marvell Kirkwood"
  518. select CPU_FEROCEON
  519. select PCI
  520. select ARCH_REQUIRE_GPIOLIB
  521. select GENERIC_CLOCKEVENTS
  522. select NEED_MACH_IO_H
  523. select PLAT_ORION
  524. help
  525. Support for the following Marvell Kirkwood series SoCs:
  526. 88F6180, 88F6192 and 88F6281.
  527. config ARCH_LPC32XX
  528. bool "NXP LPC32XX"
  529. select CLKSRC_MMIO
  530. select CPU_ARM926T
  531. select ARCH_REQUIRE_GPIOLIB
  532. select HAVE_IDE
  533. select ARM_AMBA
  534. select USB_ARCH_HAS_OHCI
  535. select CLKDEV_LOOKUP
  536. select GENERIC_CLOCKEVENTS
  537. select USE_OF
  538. select HAVE_PWM
  539. help
  540. Support for the NXP LPC32XX family of processors
  541. config ARCH_MV78XX0
  542. bool "Marvell MV78xx0"
  543. select CPU_FEROCEON
  544. select PCI
  545. select ARCH_REQUIRE_GPIOLIB
  546. select GENERIC_CLOCKEVENTS
  547. select NEED_MACH_IO_H
  548. select PLAT_ORION
  549. help
  550. Support for the following Marvell MV78xx0 series SoCs:
  551. MV781x0, MV782x0.
  552. config ARCH_ORION5X
  553. bool "Marvell Orion"
  554. depends on MMU
  555. select CPU_FEROCEON
  556. select PCI
  557. select ARCH_REQUIRE_GPIOLIB
  558. select GENERIC_CLOCKEVENTS
  559. select NEED_MACH_IO_H
  560. select PLAT_ORION
  561. help
  562. Support for the following Marvell Orion 5x series SoCs:
  563. Orion-1 (5181), Orion-VoIP (5181L), Orion-NAS (5182),
  564. Orion-2 (5281), Orion-1-90 (6183).
  565. config ARCH_MMP
  566. bool "Marvell PXA168/910/MMP2"
  567. depends on MMU
  568. select ARCH_REQUIRE_GPIOLIB
  569. select CLKDEV_LOOKUP
  570. select GENERIC_CLOCKEVENTS
  571. select GPIO_PXA
  572. select IRQ_DOMAIN
  573. select PLAT_PXA
  574. select SPARSE_IRQ
  575. select GENERIC_ALLOCATOR
  576. help
  577. Support for Marvell's PXA168/PXA910(MMP) and MMP2 processor line.
  578. config ARCH_KS8695
  579. bool "Micrel/Kendin KS8695"
  580. select CPU_ARM922T
  581. select ARCH_REQUIRE_GPIOLIB
  582. select ARCH_USES_GETTIMEOFFSET
  583. select NEED_MACH_MEMORY_H
  584. help
  585. Support for Micrel/Kendin KS8695 "Centaur" (ARM922T) based
  586. System-on-Chip devices.
  587. config ARCH_W90X900
  588. bool "Nuvoton W90X900 CPU"
  589. select CPU_ARM926T
  590. select ARCH_REQUIRE_GPIOLIB
  591. select CLKDEV_LOOKUP
  592. select CLKSRC_MMIO
  593. select GENERIC_CLOCKEVENTS
  594. help
  595. Support for Nuvoton (Winbond logic dept.) ARM9 processor,
  596. At present, the w90x900 has been renamed nuc900, regarding
  597. the ARM series product line, you can login the following
  598. link address to know more.
  599. <http://www.nuvoton.com/hq/enu/ProductAndSales/ProductLines/
  600. ConsumerElectronicsIC/ARMMicrocontroller/ARMMicrocontroller>
  601. config ARCH_TEGRA
  602. bool "NVIDIA Tegra"
  603. select CLKDEV_LOOKUP
  604. select CLKSRC_MMIO
  605. select GENERIC_CLOCKEVENTS
  606. select GENERIC_GPIO
  607. select HAVE_CLK
  608. select HAVE_SMP
  609. select MIGHT_HAVE_CACHE_L2X0
  610. select NEED_MACH_IO_H if PCI
  611. select ARCH_HAS_CPUFREQ
  612. select USE_OF
  613. help
  614. This enables support for NVIDIA Tegra based systems (Tegra APX,
  615. Tegra 6xx and Tegra 2 series).
  616. config ARCH_PICOXCELL
  617. bool "Picochip picoXcell"
  618. select ARCH_REQUIRE_GPIOLIB
  619. select ARM_PATCH_PHYS_VIRT
  620. select ARM_VIC
  621. select CPU_V6K
  622. select DW_APB_TIMER
  623. select DW_APB_TIMER_OF
  624. select GENERIC_CLOCKEVENTS
  625. select GENERIC_GPIO
  626. select HAVE_TCM
  627. select NO_IOPORT
  628. select SPARSE_IRQ
  629. select USE_OF
  630. help
  631. This enables support for systems based on the Picochip picoXcell
  632. family of Femtocell devices. The picoxcell support requires device tree
  633. for all boards.
  634. config ARCH_PNX4008
  635. bool "Philips Nexperia PNX4008 Mobile"
  636. select CPU_ARM926T
  637. select CLKDEV_LOOKUP
  638. select ARCH_USES_GETTIMEOFFSET
  639. help
  640. This enables support for Philips PNX4008 mobile platform.
  641. config ARCH_PXA
  642. bool "PXA2xx/PXA3xx-based"
  643. depends on MMU
  644. select ARCH_MTD_XIP
  645. select ARCH_HAS_CPUFREQ
  646. select CLKDEV_LOOKUP
  647. select CLKSRC_MMIO
  648. select ARCH_REQUIRE_GPIOLIB
  649. select GENERIC_CLOCKEVENTS
  650. select GPIO_PXA
  651. select PLAT_PXA
  652. select SPARSE_IRQ
  653. select AUTO_ZRELADDR
  654. select MULTI_IRQ_HANDLER
  655. select ARM_CPU_SUSPEND if PM
  656. select HAVE_IDE
  657. help
  658. Support for Intel/Marvell's PXA2xx/PXA3xx processor line.
  659. config ARCH_MSM
  660. bool "Qualcomm MSM"
  661. select HAVE_CLK
  662. select GENERIC_CLOCKEVENTS
  663. select ARCH_REQUIRE_GPIOLIB
  664. select CLKDEV_LOOKUP
  665. help
  666. Support for Qualcomm MSM/QSD based systems. This runs on the
  667. apps processor of the MSM/QSD and depends on a shared memory
  668. interface to the modem processor which runs the baseband
  669. stack and controls some vital subsystems
  670. (clock and power control, etc).
  671. config ARCH_SHMOBILE
  672. bool "Renesas SH-Mobile / R-Mobile"
  673. select HAVE_CLK
  674. select CLKDEV_LOOKUP
  675. select HAVE_MACH_CLKDEV
  676. select HAVE_SMP
  677. select GENERIC_CLOCKEVENTS
  678. select MIGHT_HAVE_CACHE_L2X0
  679. select NO_IOPORT
  680. select SPARSE_IRQ
  681. select MULTI_IRQ_HANDLER
  682. select PM_GENERIC_DOMAINS if PM
  683. select NEED_MACH_MEMORY_H
  684. help
  685. Support for Renesas's SH-Mobile and R-Mobile ARM platforms.
  686. config ARCH_RPC
  687. bool "RiscPC"
  688. select ARCH_ACORN
  689. select FIQ
  690. select ARCH_MAY_HAVE_PC_FDC
  691. select HAVE_PATA_PLATFORM
  692. select ISA_DMA_API
  693. select NO_IOPORT
  694. select ARCH_SPARSEMEM_ENABLE
  695. select ARCH_USES_GETTIMEOFFSET
  696. select HAVE_IDE
  697. select NEED_MACH_IO_H
  698. select NEED_MACH_MEMORY_H
  699. help
  700. On the Acorn Risc-PC, Linux can support the internal IDE disk and
  701. CD-ROM interface, serial and parallel port, and the floppy drive.
  702. config ARCH_SA1100
  703. bool "SA1100-based"
  704. select CLKSRC_MMIO
  705. select CPU_SA1100
  706. select ISA
  707. select ARCH_SPARSEMEM_ENABLE
  708. select ARCH_MTD_XIP
  709. select ARCH_HAS_CPUFREQ
  710. select CPU_FREQ
  711. select GENERIC_CLOCKEVENTS
  712. select CLKDEV_LOOKUP
  713. select ARCH_REQUIRE_GPIOLIB
  714. select HAVE_IDE
  715. select NEED_MACH_MEMORY_H
  716. select SPARSE_IRQ
  717. help
  718. Support for StrongARM 11x0 based boards.
  719. config ARCH_S3C24XX
  720. bool "Samsung S3C24XX SoCs"
  721. select GENERIC_GPIO
  722. select ARCH_HAS_CPUFREQ
  723. select HAVE_CLK
  724. select CLKDEV_LOOKUP
  725. select ARCH_USES_GETTIMEOFFSET
  726. select HAVE_S3C2410_I2C if I2C
  727. select HAVE_S3C_RTC if RTC_CLASS
  728. select HAVE_S3C2410_WATCHDOG if WATCHDOG
  729. select NEED_MACH_IO_H
  730. help
  731. Samsung S3C2410, S3C2412, S3C2413, S3C2416, S3C2440, S3C2442, S3C2443
  732. and S3C2450 SoCs based systems, such as the Simtec Electronics BAST
  733. (<http://www.simtec.co.uk/products/EB110ITX/>), the IPAQ 1940 or the
  734. Samsung SMDK2410 development board (and derivatives).
  735. config ARCH_S3C64XX
  736. bool "Samsung S3C64XX"
  737. select PLAT_SAMSUNG
  738. select CPU_V6
  739. select ARM_VIC
  740. select HAVE_CLK
  741. select HAVE_TCM
  742. select CLKDEV_LOOKUP
  743. select NO_IOPORT
  744. select ARCH_USES_GETTIMEOFFSET
  745. select ARCH_HAS_CPUFREQ
  746. select ARCH_REQUIRE_GPIOLIB
  747. select SAMSUNG_CLKSRC
  748. select SAMSUNG_IRQ_VIC_TIMER
  749. select S3C_GPIO_TRACK
  750. select S3C_DEV_NAND
  751. select USB_ARCH_HAS_OHCI
  752. select SAMSUNG_GPIOLIB_4BIT
  753. select HAVE_S3C2410_I2C if I2C
  754. select HAVE_S3C2410_WATCHDOG if WATCHDOG
  755. help
  756. Samsung S3C64XX series based systems
  757. config ARCH_S5P64X0
  758. bool "Samsung S5P6440 S5P6450"
  759. select CPU_V6
  760. select GENERIC_GPIO
  761. select HAVE_CLK
  762. select CLKDEV_LOOKUP
  763. select CLKSRC_MMIO
  764. select HAVE_S3C2410_WATCHDOG if WATCHDOG
  765. select GENERIC_CLOCKEVENTS
  766. select HAVE_S3C2410_I2C if I2C
  767. select HAVE_S3C_RTC if RTC_CLASS
  768. help
  769. Samsung S5P64X0 CPU based systems, such as the Samsung SMDK6440,
  770. SMDK6450.
  771. config ARCH_S5PC100
  772. bool "Samsung S5PC100"
  773. select GENERIC_GPIO
  774. select HAVE_CLK
  775. select CLKDEV_LOOKUP
  776. select CPU_V7
  777. select ARCH_USES_GETTIMEOFFSET
  778. select HAVE_S3C2410_I2C if I2C
  779. select HAVE_S3C_RTC if RTC_CLASS
  780. select HAVE_S3C2410_WATCHDOG if WATCHDOG
  781. help
  782. Samsung S5PC100 series based systems
  783. config ARCH_S5PV210
  784. bool "Samsung S5PV210/S5PC110"
  785. select CPU_V7
  786. select ARCH_SPARSEMEM_ENABLE
  787. select ARCH_HAS_HOLES_MEMORYMODEL
  788. select GENERIC_GPIO
  789. select HAVE_CLK
  790. select CLKDEV_LOOKUP
  791. select CLKSRC_MMIO
  792. select ARCH_HAS_CPUFREQ
  793. select GENERIC_CLOCKEVENTS
  794. select HAVE_S3C2410_I2C if I2C
  795. select HAVE_S3C_RTC if RTC_CLASS
  796. select HAVE_S3C2410_WATCHDOG if WATCHDOG
  797. select NEED_MACH_MEMORY_H
  798. help
  799. Samsung S5PV210/S5PC110 series based systems
  800. config ARCH_EXYNOS
  801. bool "SAMSUNG EXYNOS"
  802. select CPU_V7
  803. select ARCH_SPARSEMEM_ENABLE
  804. select ARCH_HAS_HOLES_MEMORYMODEL
  805. select GENERIC_GPIO
  806. select HAVE_CLK
  807. select CLKDEV_LOOKUP
  808. select ARCH_HAS_CPUFREQ
  809. select GENERIC_CLOCKEVENTS
  810. select HAVE_S3C_RTC if RTC_CLASS
  811. select HAVE_S3C2410_I2C if I2C
  812. select HAVE_S3C2410_WATCHDOG if WATCHDOG
  813. select NEED_MACH_MEMORY_H
  814. help
  815. Support for SAMSUNG's EXYNOS SoCs (EXYNOS4/5)
  816. config ARCH_SHARK
  817. bool "Shark"
  818. select CPU_SA110
  819. select ISA
  820. select ISA_DMA
  821. select ZONE_DMA
  822. select PCI
  823. select ARCH_USES_GETTIMEOFFSET
  824. select NEED_MACH_MEMORY_H
  825. select NEED_MACH_IO_H
  826. help
  827. Support for the StrongARM based Digital DNARD machine, also known
  828. as "Shark" (<http://www.shark-linux.de/shark.html>).
  829. config ARCH_U300
  830. bool "ST-Ericsson U300 Series"
  831. depends on MMU
  832. select CLKSRC_MMIO
  833. select CPU_ARM926T
  834. select HAVE_TCM
  835. select ARM_AMBA
  836. select ARM_PATCH_PHYS_VIRT
  837. select ARM_VIC
  838. select GENERIC_CLOCKEVENTS
  839. select CLKDEV_LOOKUP
  840. select COMMON_CLK
  841. select GENERIC_GPIO
  842. select ARCH_REQUIRE_GPIOLIB
  843. help
  844. Support for ST-Ericsson U300 series mobile platforms.
  845. config ARCH_U8500
  846. bool "ST-Ericsson U8500 Series"
  847. depends on MMU
  848. select CPU_V7
  849. select ARM_AMBA
  850. select GENERIC_CLOCKEVENTS
  851. select CLKDEV_LOOKUP
  852. select ARCH_REQUIRE_GPIOLIB
  853. select ARCH_HAS_CPUFREQ
  854. select HAVE_SMP
  855. select MIGHT_HAVE_CACHE_L2X0
  856. help
  857. Support for ST-Ericsson's Ux500 architecture
  858. config ARCH_NOMADIK
  859. bool "STMicroelectronics Nomadik"
  860. select ARM_AMBA
  861. select ARM_VIC
  862. select CPU_ARM926T
  863. select COMMON_CLK
  864. select GENERIC_CLOCKEVENTS
  865. select PINCTRL
  866. select MIGHT_HAVE_CACHE_L2X0
  867. select ARCH_REQUIRE_GPIOLIB
  868. help
  869. Support for the Nomadik platform by ST-Ericsson
  870. config ARCH_DAVINCI
  871. bool "TI DaVinci"
  872. select GENERIC_CLOCKEVENTS
  873. select ARCH_REQUIRE_GPIOLIB
  874. select ZONE_DMA
  875. select HAVE_IDE
  876. select CLKDEV_LOOKUP
  877. select GENERIC_ALLOCATOR
  878. select GENERIC_IRQ_CHIP
  879. select ARCH_HAS_HOLES_MEMORYMODEL
  880. help
  881. Support for TI's DaVinci platform.
  882. config ARCH_OMAP
  883. bool "TI OMAP"
  884. depends on MMU
  885. select HAVE_CLK
  886. select ARCH_REQUIRE_GPIOLIB
  887. select ARCH_HAS_CPUFREQ
  888. select CLKSRC_MMIO
  889. select GENERIC_CLOCKEVENTS
  890. select ARCH_HAS_HOLES_MEMORYMODEL
  891. help
  892. Support for TI's OMAP platform (OMAP1/2/3/4).
  893. config PLAT_SPEAR
  894. bool "ST SPEAr"
  895. select ARM_AMBA
  896. select ARCH_REQUIRE_GPIOLIB
  897. select CLKDEV_LOOKUP
  898. select COMMON_CLK
  899. select CLKSRC_MMIO
  900. select GENERIC_CLOCKEVENTS
  901. select HAVE_CLK
  902. help
  903. Support for ST's SPEAr platform (SPEAr3xx, SPEAr6xx and SPEAr13xx).
  904. config ARCH_VT8500
  905. bool "VIA/WonderMedia 85xx"
  906. select CPU_ARM926T
  907. select GENERIC_GPIO
  908. select ARCH_HAS_CPUFREQ
  909. select GENERIC_CLOCKEVENTS
  910. select ARCH_REQUIRE_GPIOLIB
  911. help
  912. Support for VIA/WonderMedia VT8500/WM85xx System-on-Chip.
  913. config ARCH_ZYNQ
  914. bool "Xilinx Zynq ARM Cortex A9 Platform"
  915. select CPU_V7
  916. select GENERIC_CLOCKEVENTS
  917. select CLKDEV_LOOKUP
  918. select ARM_GIC
  919. select ARM_AMBA
  920. select ICST
  921. select MIGHT_HAVE_CACHE_L2X0
  922. select USE_OF
  923. help
  924. Support for Xilinx Zynq ARM Cortex A9 Platform
  925. endchoice
  926. #
  927. # This is sorted alphabetically by mach-* pathname. However, plat-*
  928. # Kconfigs may be included either alphabetically (according to the
  929. # plat- suffix) or along side the corresponding mach-* source.
  930. #
  931. source "arch/arm/mach-mvebu/Kconfig"
  932. source "arch/arm/mach-at91/Kconfig"
  933. source "arch/arm/mach-bcmring/Kconfig"
  934. source "arch/arm/mach-clps711x/Kconfig"
  935. source "arch/arm/mach-cns3xxx/Kconfig"
  936. source "arch/arm/mach-davinci/Kconfig"
  937. source "arch/arm/mach-dove/Kconfig"
  938. source "arch/arm/mach-ep93xx/Kconfig"
  939. source "arch/arm/mach-footbridge/Kconfig"
  940. source "arch/arm/mach-gemini/Kconfig"
  941. source "arch/arm/mach-h720x/Kconfig"
  942. source "arch/arm/mach-integrator/Kconfig"
  943. source "arch/arm/mach-iop32x/Kconfig"
  944. source "arch/arm/mach-iop33x/Kconfig"
  945. source "arch/arm/mach-iop13xx/Kconfig"
  946. source "arch/arm/mach-ixp4xx/Kconfig"
  947. source "arch/arm/mach-kirkwood/Kconfig"
  948. source "arch/arm/mach-ks8695/Kconfig"
  949. source "arch/arm/mach-msm/Kconfig"
  950. source "arch/arm/mach-mv78xx0/Kconfig"
  951. source "arch/arm/plat-mxc/Kconfig"
  952. source "arch/arm/mach-mxs/Kconfig"
  953. source "arch/arm/mach-netx/Kconfig"
  954. source "arch/arm/mach-nomadik/Kconfig"
  955. source "arch/arm/plat-nomadik/Kconfig"
  956. source "arch/arm/plat-omap/Kconfig"
  957. source "arch/arm/mach-omap1/Kconfig"
  958. source "arch/arm/mach-omap2/Kconfig"
  959. source "arch/arm/mach-orion5x/Kconfig"
  960. source "arch/arm/mach-pxa/Kconfig"
  961. source "arch/arm/plat-pxa/Kconfig"
  962. source "arch/arm/mach-mmp/Kconfig"
  963. source "arch/arm/mach-realview/Kconfig"
  964. source "arch/arm/mach-sa1100/Kconfig"
  965. source "arch/arm/plat-samsung/Kconfig"
  966. source "arch/arm/plat-s3c24xx/Kconfig"
  967. source "arch/arm/plat-spear/Kconfig"
  968. source "arch/arm/mach-s3c24xx/Kconfig"
  969. if ARCH_S3C24XX
  970. source "arch/arm/mach-s3c2412/Kconfig"
  971. source "arch/arm/mach-s3c2440/Kconfig"
  972. endif
  973. if ARCH_S3C64XX
  974. source "arch/arm/mach-s3c64xx/Kconfig"
  975. endif
  976. source "arch/arm/mach-s5p64x0/Kconfig"
  977. source "arch/arm/mach-s5pc100/Kconfig"
  978. source "arch/arm/mach-s5pv210/Kconfig"
  979. source "arch/arm/mach-exynos/Kconfig"
  980. source "arch/arm/mach-shmobile/Kconfig"
  981. source "arch/arm/mach-tegra/Kconfig"
  982. source "arch/arm/mach-u300/Kconfig"
  983. source "arch/arm/mach-ux500/Kconfig"
  984. source "arch/arm/mach-versatile/Kconfig"
  985. source "arch/arm/mach-vexpress/Kconfig"
  986. source "arch/arm/plat-versatile/Kconfig"
  987. source "arch/arm/mach-vt8500/Kconfig"
  988. source "arch/arm/mach-w90x900/Kconfig"
  989. # Definitions to make life easier
  990. config ARCH_ACORN
  991. bool
  992. config PLAT_IOP
  993. bool
  994. select GENERIC_CLOCKEVENTS
  995. config PLAT_ORION
  996. bool
  997. select CLKSRC_MMIO
  998. select GENERIC_IRQ_CHIP
  999. select IRQ_DOMAIN
  1000. select COMMON_CLK
  1001. config PLAT_PXA
  1002. bool
  1003. config PLAT_VERSATILE
  1004. bool
  1005. config ARM_TIMER_SP804
  1006. bool
  1007. select CLKSRC_MMIO
  1008. select HAVE_SCHED_CLOCK
  1009. source arch/arm/mm/Kconfig
  1010. config ARM_NR_BANKS
  1011. int
  1012. default 16 if ARCH_EP93XX
  1013. default 8
  1014. config IWMMXT
  1015. bool "Enable iWMMXt support"
  1016. depends on CPU_XSCALE || CPU_XSC3 || CPU_MOHAWK || CPU_PJ4
  1017. default y if PXA27x || PXA3xx || PXA95x || ARCH_MMP
  1018. help
  1019. Enable support for iWMMXt context switching at run time if
  1020. running on a CPU that supports it.
  1021. config XSCALE_PMU
  1022. bool
  1023. depends on CPU_XSCALE
  1024. default y
  1025. config CPU_HAS_PMU
  1026. depends on (CPU_V6 || CPU_V6K || CPU_V7 || XSCALE_PMU) && \
  1027. (!ARCH_OMAP3 || OMAP3_EMU)
  1028. default y
  1029. bool
  1030. config MULTI_IRQ_HANDLER
  1031. bool
  1032. help
  1033. Allow each machine to specify it's own IRQ handler at run time.
  1034. if !MMU
  1035. source "arch/arm/Kconfig-nommu"
  1036. endif
  1037. config ARM_ERRATA_326103
  1038. bool "ARM errata: FSR write bit incorrect on a SWP to read-only memory"
  1039. depends on CPU_V6
  1040. help
  1041. Executing a SWP instruction to read-only memory does not set bit 11
  1042. of the FSR on the ARM 1136 prior to r1p0. This causes the kernel to
  1043. treat the access as a read, preventing a COW from occurring and
  1044. causing the faulting task to livelock.
  1045. config ARM_ERRATA_411920
  1046. bool "ARM errata: Invalidation of the Instruction Cache operation can fail"
  1047. depends on CPU_V6 || CPU_V6K
  1048. help
  1049. Invalidation of the Instruction Cache operation can
  1050. fail. This erratum is present in 1136 (before r1p4), 1156 and 1176.
  1051. It does not affect the MPCore. This option enables the ARM Ltd.
  1052. recommended workaround.
  1053. config ARM_ERRATA_430973
  1054. bool "ARM errata: Stale prediction on replaced interworking branch"
  1055. depends on CPU_V7
  1056. help
  1057. This option enables the workaround for the 430973 Cortex-A8
  1058. (r1p0..r1p2) erratum. If a code sequence containing an ARM/Thumb
  1059. interworking branch is replaced with another code sequence at the
  1060. same virtual address, whether due to self-modifying code or virtual
  1061. to physical address re-mapping, Cortex-A8 does not recover from the
  1062. stale interworking branch prediction. This results in Cortex-A8
  1063. executing the new code sequence in the incorrect ARM or Thumb state.
  1064. The workaround enables the BTB/BTAC operations by setting ACTLR.IBE
  1065. and also flushes the branch target cache at every context switch.
  1066. Note that setting specific bits in the ACTLR register may not be
  1067. available in non-secure mode.
  1068. config ARM_ERRATA_458693
  1069. bool "ARM errata: Processor deadlock when a false hazard is created"
  1070. depends on CPU_V7
  1071. help
  1072. This option enables the workaround for the 458693 Cortex-A8 (r2p0)
  1073. erratum. For very specific sequences of memory operations, it is
  1074. possible for a hazard condition intended for a cache line to instead
  1075. be incorrectly associated with a different cache line. This false
  1076. hazard might then cause a processor deadlock. The workaround enables
  1077. the L1 caching of the NEON accesses and disables the PLD instruction
  1078. in the ACTLR register. Note that setting specific bits in the ACTLR
  1079. register may not be available in non-secure mode.
  1080. config ARM_ERRATA_460075
  1081. bool "ARM errata: Data written to the L2 cache can be overwritten with stale data"
  1082. depends on CPU_V7
  1083. help
  1084. This option enables the workaround for the 460075 Cortex-A8 (r2p0)
  1085. erratum. Any asynchronous access to the L2 cache may encounter a
  1086. situation in which recent store transactions to the L2 cache are lost
  1087. and overwritten with stale memory contents from external memory. The
  1088. workaround disables the write-allocate mode for the L2 cache via the
  1089. ACTLR register. Note that setting specific bits in the ACTLR register
  1090. may not be available in non-secure mode.
  1091. config ARM_ERRATA_742230
  1092. bool "ARM errata: DMB operation may be faulty"
  1093. depends on CPU_V7 && SMP
  1094. help
  1095. This option enables the workaround for the 742230 Cortex-A9
  1096. (r1p0..r2p2) erratum. Under rare circumstances, a DMB instruction
  1097. between two write operations may not ensure the correct visibility
  1098. ordering of the two writes. This workaround sets a specific bit in
  1099. the diagnostic register of the Cortex-A9 which causes the DMB
  1100. instruction to behave as a DSB, ensuring the correct behaviour of
  1101. the two writes.
  1102. config ARM_ERRATA_742231
  1103. bool "ARM errata: Incorrect hazard handling in the SCU may lead to data corruption"
  1104. depends on CPU_V7 && SMP
  1105. help
  1106. This option enables the workaround for the 742231 Cortex-A9
  1107. (r2p0..r2p2) erratum. Under certain conditions, specific to the
  1108. Cortex-A9 MPCore micro-architecture, two CPUs working in SMP mode,
  1109. accessing some data located in the same cache line, may get corrupted
  1110. data due to bad handling of the address hazard when the line gets
  1111. replaced from one of the CPUs at the same time as another CPU is
  1112. accessing it. This workaround sets specific bits in the diagnostic
  1113. register of the Cortex-A9 which reduces the linefill issuing
  1114. capabilities of the processor.
  1115. config PL310_ERRATA_588369
  1116. bool "PL310 errata: Clean & Invalidate maintenance operations do not invalidate clean lines"
  1117. depends on CACHE_L2X0
  1118. help
  1119. The PL310 L2 cache controller implements three types of Clean &
  1120. Invalidate maintenance operations: by Physical Address
  1121. (offset 0x7F0), by Index/Way (0x7F8) and by Way (0x7FC).
  1122. They are architecturally defined to behave as the execution of a
  1123. clean operation followed immediately by an invalidate operation,
  1124. both performing to the same memory location. This functionality
  1125. is not correctly implemented in PL310 as clean lines are not
  1126. invalidated as a result of these operations.
  1127. config ARM_ERRATA_720789
  1128. bool "ARM errata: TLBIASIDIS and TLBIMVAIS operations can broadcast a faulty ASID"
  1129. depends on CPU_V7
  1130. help
  1131. This option enables the workaround for the 720789 Cortex-A9 (prior to
  1132. r2p0) erratum. A faulty ASID can be sent to the other CPUs for the
  1133. broadcasted CP15 TLB maintenance operations TLBIASIDIS and TLBIMVAIS.
  1134. As a consequence of this erratum, some TLB entries which should be
  1135. invalidated are not, resulting in an incoherency in the system page
  1136. tables. The workaround changes the TLB flushing routines to invalidate
  1137. entries regardless of the ASID.
  1138. config PL310_ERRATA_727915
  1139. bool "PL310 errata: Background Clean & Invalidate by Way operation can cause data corruption"
  1140. depends on CACHE_L2X0
  1141. help
  1142. PL310 implements the Clean & Invalidate by Way L2 cache maintenance
  1143. operation (offset 0x7FC). This operation runs in background so that
  1144. PL310 can handle normal accesses while it is in progress. Under very
  1145. rare circumstances, due to this erratum, write data can be lost when
  1146. PL310 treats a cacheable write transaction during a Clean &
  1147. Invalidate by Way operation.
  1148. config ARM_ERRATA_743622
  1149. bool "ARM errata: Faulty hazard checking in the Store Buffer may lead to data corruption"
  1150. depends on CPU_V7
  1151. help
  1152. This option enables the workaround for the 743622 Cortex-A9
  1153. (r2p*) erratum. Under very rare conditions, a faulty
  1154. optimisation in the Cortex-A9 Store Buffer may lead to data
  1155. corruption. This workaround sets a specific bit in the diagnostic
  1156. register of the Cortex-A9 which disables the Store Buffer
  1157. optimisation, preventing the defect from occurring. This has no
  1158. visible impact on the overall performance or power consumption of the
  1159. processor.
  1160. config ARM_ERRATA_751472
  1161. bool "ARM errata: Interrupted ICIALLUIS may prevent completion of broadcasted operation"
  1162. depends on CPU_V7
  1163. help
  1164. This option enables the workaround for the 751472 Cortex-A9 (prior
  1165. to r3p0) erratum. An interrupted ICIALLUIS operation may prevent the
  1166. completion of a following broadcasted operation if the second
  1167. operation is received by a CPU before the ICIALLUIS has completed,
  1168. potentially leading to corrupted entries in the cache or TLB.
  1169. config PL310_ERRATA_753970
  1170. bool "PL310 errata: cache sync operation may be faulty"
  1171. depends on CACHE_PL310
  1172. help
  1173. This option enables the workaround for the 753970 PL310 (r3p0) erratum.
  1174. Under some condition the effect of cache sync operation on
  1175. the store buffer still remains when the operation completes.
  1176. This means that the store buffer is always asked to drain and
  1177. this prevents it from merging any further writes. The workaround
  1178. is to replace the normal offset of cache sync operation (0x730)
  1179. by another offset targeting an unmapped PL310 register 0x740.
  1180. This has the same effect as the cache sync operation: store buffer
  1181. drain and waiting for all buffers empty.
  1182. config ARM_ERRATA_754322
  1183. bool "ARM errata: possible faulty MMU translations following an ASID switch"
  1184. depends on CPU_V7
  1185. help
  1186. This option enables the workaround for the 754322 Cortex-A9 (r2p*,
  1187. r3p*) erratum. A speculative memory access may cause a page table walk
  1188. which starts prior to an ASID switch but completes afterwards. This
  1189. can populate the micro-TLB with a stale entry which may be hit with
  1190. the new ASID. This workaround places two dsb instructions in the mm
  1191. switching code so that no page table walks can cross the ASID switch.
  1192. config ARM_ERRATA_754327
  1193. bool "ARM errata: no automatic Store Buffer drain"
  1194. depends on CPU_V7 && SMP
  1195. help
  1196. This option enables the workaround for the 754327 Cortex-A9 (prior to
  1197. r2p0) erratum. The Store Buffer does not have any automatic draining
  1198. mechanism and therefore a livelock may occur if an external agent
  1199. continuously polls a memory location waiting to observe an update.
  1200. This workaround defines cpu_relax() as smp_mb(), preventing correctly
  1201. written polling loops from denying visibility of updates to memory.
  1202. config ARM_ERRATA_364296
  1203. bool "ARM errata: Possible cache data corruption with hit-under-miss enabled"
  1204. depends on CPU_V6 && !SMP
  1205. help
  1206. This options enables the workaround for the 364296 ARM1136
  1207. r0p2 erratum (possible cache data corruption with
  1208. hit-under-miss enabled). It sets the undocumented bit 31 in
  1209. the auxiliary control register and the FI bit in the control
  1210. register, thus disabling hit-under-miss without putting the
  1211. processor into full low interrupt latency mode. ARM11MPCore
  1212. is not affected.
  1213. config ARM_ERRATA_764369
  1214. bool "ARM errata: Data cache line maintenance operation by MVA may not succeed"
  1215. depends on CPU_V7 && SMP
  1216. help
  1217. This option enables the workaround for erratum 764369
  1218. affecting Cortex-A9 MPCore with two or more processors (all
  1219. current revisions). Under certain timing circumstances, a data
  1220. cache line maintenance operation by MVA targeting an Inner
  1221. Shareable memory region may fail to proceed up to either the
  1222. Point of Coherency or to the Point of Unification of the
  1223. system. This workaround adds a DSB instruction before the
  1224. relevant cache maintenance functions and sets a specific bit
  1225. in the diagnostic control register of the SCU.
  1226. config PL310_ERRATA_769419
  1227. bool "PL310 errata: no automatic Store Buffer drain"
  1228. depends on CACHE_L2X0
  1229. help
  1230. On revisions of the PL310 prior to r3p2, the Store Buffer does
  1231. not automatically drain. This can cause normal, non-cacheable
  1232. writes to be retained when the memory system is idle, leading
  1233. to suboptimal I/O performance for drivers using coherent DMA.
  1234. This option adds a write barrier to the cpu_idle loop so that,
  1235. on systems with an outer cache, the store buffer is drained
  1236. explicitly.
  1237. endmenu
  1238. source "arch/arm/common/Kconfig"
  1239. menu "Bus support"
  1240. config ARM_AMBA
  1241. bool
  1242. config ISA
  1243. bool
  1244. help
  1245. Find out whether you have ISA slots on your motherboard. ISA is the
  1246. name of a bus system, i.e. the way the CPU talks to the other stuff
  1247. inside your box. Other bus systems are PCI, EISA, MicroChannel
  1248. (MCA) or VESA. ISA is an older system, now being displaced by PCI;
  1249. newer boards don't support it. If you have ISA, say Y, otherwise N.
  1250. # Select ISA DMA controller support
  1251. config ISA_DMA
  1252. bool
  1253. select ISA_DMA_API
  1254. # Select ISA DMA interface
  1255. config ISA_DMA_API
  1256. bool
  1257. config PCI
  1258. bool "PCI support" if MIGHT_HAVE_PCI
  1259. help
  1260. Find out whether you have a PCI motherboard. PCI is the name of a
  1261. bus system, i.e. the way the CPU talks to the other stuff inside
  1262. your box. Other bus systems are ISA, EISA, MicroChannel (MCA) or
  1263. VESA. If you have PCI, say Y, otherwise N.
  1264. config PCI_DOMAINS
  1265. bool
  1266. depends on PCI
  1267. config PCI_NANOENGINE
  1268. bool "BSE nanoEngine PCI support"
  1269. depends on SA1100_NANOENGINE
  1270. help
  1271. Enable PCI on the BSE nanoEngine board.
  1272. config PCI_SYSCALL
  1273. def_bool PCI
  1274. # Select the host bridge type
  1275. config PCI_HOST_VIA82C505
  1276. bool
  1277. depends on PCI && ARCH_SHARK
  1278. default y
  1279. config PCI_HOST_ITE8152
  1280. bool
  1281. depends on PCI && MACH_ARMCORE
  1282. default y
  1283. select DMABOUNCE
  1284. source "drivers/pci/Kconfig"
  1285. source "drivers/pcmcia/Kconfig"
  1286. endmenu
  1287. menu "Kernel Features"
  1288. config HAVE_SMP
  1289. bool
  1290. help
  1291. This option should be selected by machines which have an SMP-
  1292. capable CPU.
  1293. The only effect of this option is to make the SMP-related
  1294. options available to the user for configuration.
  1295. config SMP
  1296. bool "Symmetric Multi-Processing"
  1297. depends on CPU_V6K || CPU_V7
  1298. depends on GENERIC_CLOCKEVENTS
  1299. depends on HAVE_SMP
  1300. depends on MMU
  1301. select USE_GENERIC_SMP_HELPERS
  1302. select HAVE_ARM_SCU if !ARCH_MSM_SCORPIONMP
  1303. help
  1304. This enables support for systems with more than one CPU. If you have
  1305. a system with only one CPU, like most personal computers, say N. If
  1306. you have a system with more than one CPU, say Y.
  1307. If you say N here, the kernel will run on single and multiprocessor
  1308. machines, but will use only one CPU of a multiprocessor machine. If
  1309. you say Y here, the kernel will run on many, but not all, single
  1310. processor machines. On a single processor machine, the kernel will
  1311. run faster if you say N here.
  1312. See also <file:Documentation/x86/i386/IO-APIC.txt>,
  1313. <file:Documentation/nmi_watchdog.txt> and the SMP-HOWTO available at
  1314. <http://tldp.org/HOWTO/SMP-HOWTO.html>.
  1315. If you don't know what to do here, say N.
  1316. config SMP_ON_UP
  1317. bool "Allow booting SMP kernel on uniprocessor systems (EXPERIMENTAL)"
  1318. depends on EXPERIMENTAL
  1319. depends on SMP && !XIP_KERNEL
  1320. default y
  1321. help
  1322. SMP kernels contain instructions which fail on non-SMP processors.
  1323. Enabling this option allows the kernel to modify itself to make
  1324. these instructions safe. Disabling it allows about 1K of space
  1325. savings.
  1326. If you don't know what to do here, say Y.
  1327. config ARM_CPU_TOPOLOGY
  1328. bool "Support cpu topology definition"
  1329. depends on SMP && CPU_V7
  1330. default y
  1331. help
  1332. Support ARM cpu topology definition. The MPIDR register defines
  1333. affinity between processors which is then used to describe the cpu
  1334. topology of an ARM System.
  1335. config SCHED_MC
  1336. bool "Multi-core scheduler support"
  1337. depends on ARM_CPU_TOPOLOGY
  1338. help
  1339. Multi-core scheduler support improves the CPU scheduler's decision
  1340. making when dealing with multi-core CPU chips at a cost of slightly
  1341. increased overhead in some places. If unsure say N here.
  1342. config SCHED_SMT
  1343. bool "SMT scheduler support"
  1344. depends on ARM_CPU_TOPOLOGY
  1345. help
  1346. Improves the CPU scheduler's decision making when dealing with
  1347. MultiThreading at a cost of slightly increased overhead in some
  1348. places. If unsure say N here.
  1349. config HAVE_ARM_SCU
  1350. bool
  1351. help
  1352. This option enables support for the ARM system coherency unit
  1353. config ARM_ARCH_TIMER
  1354. bool "Architected timer support"
  1355. depends on CPU_V7
  1356. help
  1357. This option enables support for the ARM architected timer
  1358. config HAVE_ARM_TWD
  1359. bool
  1360. depends on SMP
  1361. help
  1362. This options enables support for the ARM timer and watchdog unit
  1363. choice
  1364. prompt "Memory split"
  1365. default VMSPLIT_3G
  1366. help
  1367. Select the desired split between kernel and user memory.
  1368. If you are not absolutely sure what you are doing, leave this
  1369. option alone!
  1370. config VMSPLIT_3G
  1371. bool "3G/1G user/kernel split"
  1372. config VMSPLIT_2G
  1373. bool "2G/2G user/kernel split"
  1374. config VMSPLIT_1G
  1375. bool "1G/3G user/kernel split"
  1376. endchoice
  1377. config PAGE_OFFSET
  1378. hex
  1379. default 0x40000000 if VMSPLIT_1G
  1380. default 0x80000000 if VMSPLIT_2G
  1381. default 0xC0000000
  1382. config NR_CPUS
  1383. int "Maximum number of CPUs (2-32)"
  1384. range 2 32
  1385. depends on SMP
  1386. default "4"
  1387. config HOTPLUG_CPU
  1388. bool "Support for hot-pluggable CPUs (EXPERIMENTAL)"
  1389. depends on SMP && HOTPLUG && EXPERIMENTAL
  1390. help
  1391. Say Y here to experiment with turning CPUs off and on. CPUs
  1392. can be controlled through /sys/devices/system/cpu.
  1393. config LOCAL_TIMERS
  1394. bool "Use local timer interrupts"
  1395. depends on SMP
  1396. default y
  1397. select HAVE_ARM_TWD if (!ARCH_MSM_SCORPIONMP && !EXYNOS4_MCT)
  1398. help
  1399. Enable support for local timers on SMP platforms, rather then the
  1400. legacy IPI broadcast method. Local timers allows the system
  1401. accounting to be spread across the timer interval, preventing a
  1402. "thundering herd" at every timer tick.
  1403. config ARCH_NR_GPIO
  1404. int
  1405. default 1024 if ARCH_SHMOBILE || ARCH_TEGRA
  1406. default 355 if ARCH_U8500
  1407. default 264 if MACH_H4700
  1408. default 512 if SOC_OMAP5
  1409. default 0
  1410. help
  1411. Maximum number of GPIOs in the system.
  1412. If unsure, leave the default value.
  1413. source kernel/Kconfig.preempt
  1414. config HZ
  1415. int
  1416. default 200 if ARCH_EBSA110 || ARCH_S3C24XX || ARCH_S5P64X0 || \
  1417. ARCH_S5PV210 || ARCH_EXYNOS4
  1418. default OMAP_32K_TIMER_HZ if ARCH_OMAP && OMAP_32K_TIMER
  1419. default AT91_TIMER_HZ if ARCH_AT91
  1420. default SHMOBILE_TIMER_HZ if ARCH_SHMOBILE
  1421. default 100
  1422. config THUMB2_KERNEL
  1423. bool "Compile the kernel in Thumb-2 mode (EXPERIMENTAL)"
  1424. depends on CPU_V7 && !CPU_V6 && !CPU_V6K && EXPERIMENTAL
  1425. select AEABI
  1426. select ARM_ASM_UNIFIED
  1427. select ARM_UNWIND
  1428. help
  1429. By enabling this option, the kernel will be compiled in
  1430. Thumb-2 mode. A compiler/assembler that understand the unified
  1431. ARM-Thumb syntax is needed.
  1432. If unsure, say N.
  1433. config THUMB2_AVOID_R_ARM_THM_JUMP11
  1434. bool "Work around buggy Thumb-2 short branch relocations in gas"
  1435. depends on THUMB2_KERNEL && MODULES
  1436. default y
  1437. help
  1438. Various binutils versions can resolve Thumb-2 branches to
  1439. locally-defined, preemptible global symbols as short-range "b.n"
  1440. branch instructions.
  1441. This is a problem, because there's no guarantee the final
  1442. destination of the symbol, or any candidate locations for a
  1443. trampoline, are within range of the branch. For this reason, the
  1444. kernel does not support fixing up the R_ARM_THM_JUMP11 (102)
  1445. relocation in modules at all, and it makes little sense to add
  1446. support.
  1447. The symptom is that the kernel fails with an "unsupported
  1448. relocation" error when loading some modules.
  1449. Until fixed tools are available, passing
  1450. -fno-optimize-sibling-calls to gcc should prevent gcc generating
  1451. code which hits this problem, at the cost of a bit of extra runtime
  1452. stack usage in some cases.
  1453. The problem is described in more detail at:
  1454. https://bugs.launchpad.net/binutils-linaro/+bug/725126
  1455. Only Thumb-2 kernels are affected.
  1456. Unless you are sure your tools don't have this problem, say Y.
  1457. config ARM_ASM_UNIFIED
  1458. bool
  1459. config AEABI
  1460. bool "Use the ARM EABI to compile the kernel"
  1461. help
  1462. This option allows for the kernel to be compiled using the latest
  1463. ARM ABI (aka EABI). This is only useful if you are using a user
  1464. space environment that is also compiled with EABI.
  1465. Since there are major incompatibilities between the legacy ABI and
  1466. EABI, especially with regard to structure member alignment, this
  1467. option also changes the kernel syscall calling convention to
  1468. disambiguate both ABIs and allow for backward compatibility support
  1469. (selected with CONFIG_OABI_COMPAT).
  1470. To use this you need GCC version 4.0.0 or later.
  1471. config OABI_COMPAT
  1472. bool "Allow old ABI binaries to run with this kernel (EXPERIMENTAL)"
  1473. depends on AEABI && EXPERIMENTAL && !THUMB2_KERNEL
  1474. default y
  1475. help
  1476. This option preserves the old syscall interface along with the
  1477. new (ARM EABI) one. It also provides a compatibility layer to
  1478. intercept syscalls that have structure arguments which layout
  1479. in memory differs between the legacy ABI and the new ARM EABI
  1480. (only for non "thumb" binaries). This option adds a tiny
  1481. overhead to all syscalls and produces a slightly larger kernel.
  1482. If you know you'll be using only pure EABI user space then you
  1483. can say N here. If this option is not selected and you attempt
  1484. to execute a legacy ABI binary then the result will be
  1485. UNPREDICTABLE (in fact it can be predicted that it won't work
  1486. at all). If in doubt say Y.
  1487. config ARCH_HAS_HOLES_MEMORYMODEL
  1488. bool
  1489. config ARCH_SPARSEMEM_ENABLE
  1490. bool
  1491. config ARCH_SPARSEMEM_DEFAULT
  1492. def_bool ARCH_SPARSEMEM_ENABLE
  1493. config ARCH_SELECT_MEMORY_MODEL
  1494. def_bool ARCH_SPARSEMEM_ENABLE
  1495. config HAVE_ARCH_PFN_VALID
  1496. def_bool ARCH_HAS_HOLES_MEMORYMODEL || !SPARSEMEM
  1497. config HIGHMEM
  1498. bool "High Memory Support"
  1499. depends on MMU
  1500. help
  1501. The address space of ARM processors is only 4 Gigabytes large
  1502. and it has to accommodate user address space, kernel address
  1503. space as well as some memory mapped IO. That means that, if you
  1504. have a large amount of physical memory and/or IO, not all of the
  1505. memory can be "permanently mapped" by the kernel. The physical
  1506. memory that is not permanently mapped is called "high memory".
  1507. Depending on the selected kernel/user memory split, minimum
  1508. vmalloc space and actual amount of RAM, you may not need this
  1509. option which should result in a slightly faster kernel.
  1510. If unsure, say n.
  1511. config HIGHPTE
  1512. bool "Allocate 2nd-level pagetables from highmem"
  1513. depends on HIGHMEM
  1514. config HW_PERF_EVENTS
  1515. bool "Enable hardware performance counter support for perf events"
  1516. depends on PERF_EVENTS && CPU_HAS_PMU
  1517. default y
  1518. help
  1519. Enable hardware performance counter support for perf events. If
  1520. disabled, perf events will use software events only.
  1521. source "mm/Kconfig"
  1522. config FORCE_MAX_ZONEORDER
  1523. int "Maximum zone order" if ARCH_SHMOBILE
  1524. range 11 64 if ARCH_SHMOBILE
  1525. default "9" if SA1111
  1526. default "11"
  1527. help
  1528. The kernel memory allocator divides physically contiguous memory
  1529. blocks into "zones", where each zone is a power of two number of
  1530. pages. This option selects the largest power of two that the kernel
  1531. keeps in the memory allocator. If you need to allocate very large
  1532. blocks of physically contiguous memory, then you may need to
  1533. increase this value.
  1534. This config option is actually maximum order plus one. For example,
  1535. a value of 11 means that the largest free memory block is 2^10 pages.
  1536. config LEDS
  1537. bool "Timer and CPU usage LEDs"
  1538. depends on ARCH_CDB89712 || ARCH_EBSA110 || \
  1539. ARCH_EBSA285 || ARCH_INTEGRATOR || \
  1540. ARCH_LUBBOCK || MACH_MAINSTONE || ARCH_NETWINDER || \
  1541. ARCH_OMAP || ARCH_P720T || ARCH_PXA_IDP || \
  1542. ARCH_SA1100 || ARCH_SHARK || ARCH_VERSATILE || \
  1543. ARCH_AT91 || ARCH_DAVINCI || \
  1544. ARCH_KS8695 || MACH_RD88F5182 || ARCH_REALVIEW
  1545. help
  1546. If you say Y here, the LEDs on your machine will be used
  1547. to provide useful information about your current system status.
  1548. If you are compiling a kernel for a NetWinder or EBSA-285, you will
  1549. be able to select which LEDs are active using the options below. If
  1550. you are compiling a kernel for the EBSA-110 or the LART however, the
  1551. red LED will simply flash regularly to indicate that the system is
  1552. still functional. It is safe to say Y here if you have a CATS
  1553. system, but the driver will do nothing.
  1554. config LEDS_TIMER
  1555. bool "Timer LED" if (!ARCH_CDB89712 && !ARCH_OMAP) || \
  1556. OMAP_OSK_MISTRAL || MACH_OMAP_H2 \
  1557. || MACH_OMAP_PERSEUS2
  1558. depends on LEDS
  1559. depends on !GENERIC_CLOCKEVENTS
  1560. default y if ARCH_EBSA110
  1561. help
  1562. If you say Y here, one of the system LEDs (the green one on the
  1563. NetWinder, the amber one on the EBSA285, or the red one on the LART)
  1564. will flash regularly to indicate that the system is still
  1565. operational. This is mainly useful to kernel hackers who are
  1566. debugging unstable kernels.
  1567. The LART uses the same LED for both Timer LED and CPU usage LED
  1568. functions. You may choose to use both, but the Timer LED function
  1569. will overrule the CPU usage LED.
  1570. config LEDS_CPU
  1571. bool "CPU usage LED" if (!ARCH_CDB89712 && !ARCH_EBSA110 && \
  1572. !ARCH_OMAP) \
  1573. || OMAP_OSK_MISTRAL || MACH_OMAP_H2 \
  1574. || MACH_OMAP_PERSEUS2
  1575. depends on LEDS
  1576. help
  1577. If you say Y here, the red LED will be used to give a good real
  1578. time indication of CPU usage, by lighting whenever the idle task
  1579. is not currently executing.
  1580. The LART uses the same LED for both Timer LED and CPU usage LED
  1581. functions. You may choose to use both, but the Timer LED function
  1582. will overrule the CPU usage LED.
  1583. config ALIGNMENT_TRAP
  1584. bool
  1585. depends on CPU_CP15_MMU
  1586. default y if !ARCH_EBSA110
  1587. select HAVE_PROC_CPU if PROC_FS
  1588. help
  1589. ARM processors cannot fetch/store information which is not
  1590. naturally aligned on the bus, i.e., a 4 byte fetch must start at an
  1591. address divisible by 4. On 32-bit ARM processors, these non-aligned
  1592. fetch/store instructions will be emulated in software if you say
  1593. here, which has a severe performance impact. This is necessary for
  1594. correct operation of some network protocols. With an IP-only
  1595. configuration it is safe to say N, otherwise say Y.
  1596. config UACCESS_WITH_MEMCPY
  1597. bool "Use kernel mem{cpy,set}() for {copy_to,clear}_user() (EXPERIMENTAL)"
  1598. depends on MMU && EXPERIMENTAL
  1599. default y if CPU_FEROCEON
  1600. help
  1601. Implement faster copy_to_user and clear_user methods for CPU
  1602. cores where a 8-word STM instruction give significantly higher
  1603. memory write throughput than a sequence of individual 32bit stores.
  1604. A possible side effect is a slight increase in scheduling latency
  1605. between threads sharing the same address space if they invoke
  1606. such copy operations with large buffers.
  1607. However, if the CPU data cache is using a write-allocate mode,
  1608. this option is unlikely to provide any performance gain.
  1609. config SECCOMP
  1610. bool
  1611. prompt "Enable seccomp to safely compute untrusted bytecode"
  1612. ---help---
  1613. This kernel feature is useful for number crunching applications
  1614. that may need to compute untrusted bytecode during their
  1615. execution. By using pipes or other transports made available to
  1616. the process as file descriptors supporting the read/write
  1617. syscalls, it's possible to isolate those applications in
  1618. their own address space using seccomp. Once seccomp is
  1619. enabled via prctl(PR_SET_SECCOMP), it cannot be disabled
  1620. and the task is only allowed to execute a few safe syscalls
  1621. defined by each seccomp mode.
  1622. config CC_STACKPROTECTOR
  1623. bool "Enable -fstack-protector buffer overflow detection (EXPERIMENTAL)"
  1624. depends on EXPERIMENTAL
  1625. help
  1626. This option turns on the -fstack-protector GCC feature. This
  1627. feature puts, at the beginning of functions, a canary value on
  1628. the stack just before the return address, and validates
  1629. the value just before actually returning. Stack based buffer
  1630. overflows (that need to overwrite this return address) now also
  1631. overwrite the canary, which gets detected and the attack is then
  1632. neutralized via a kernel panic.
  1633. This feature requires gcc version 4.2 or above.
  1634. config DEPRECATED_PARAM_STRUCT
  1635. bool "Provide old way to pass kernel parameters"
  1636. help
  1637. This was deprecated in 2001 and announced to live on for 5 years.
  1638. Some old boot loaders still use this way.
  1639. endmenu
  1640. menu "Boot options"
  1641. config USE_OF
  1642. bool "Flattened Device Tree support"
  1643. select OF
  1644. select OF_EARLY_FLATTREE
  1645. select IRQ_DOMAIN
  1646. help
  1647. Include support for flattened device tree machine descriptions.
  1648. # Compressed boot loader in ROM. Yes, we really want to ask about
  1649. # TEXT and BSS so we preserve their values in the config files.
  1650. config ZBOOT_ROM_TEXT
  1651. hex "Compressed ROM boot loader base address"
  1652. default "0"
  1653. help
  1654. The physical address at which the ROM-able zImage is to be
  1655. placed in the target. Platforms which normally make use of
  1656. ROM-able zImage formats normally set this to a suitable
  1657. value in their defconfig file.
  1658. If ZBOOT_ROM is not enabled, this has no effect.
  1659. config ZBOOT_ROM_BSS
  1660. hex "Compressed ROM boot loader BSS address"
  1661. default "0"
  1662. help
  1663. The base address of an area of read/write memory in the target
  1664. for the ROM-able zImage which must be available while the
  1665. decompressor is running. It must be large enough to hold the
  1666. entire decompressed kernel plus an additional 128 KiB.
  1667. Platforms which normally make use of ROM-able zImage formats
  1668. normally set this to a suitable value in their defconfig file.
  1669. If ZBOOT_ROM is not enabled, this has no effect.
  1670. config ZBOOT_ROM
  1671. bool "Compressed boot loader in ROM/flash"
  1672. depends on ZBOOT_ROM_TEXT != ZBOOT_ROM_BSS
  1673. help
  1674. Say Y here if you intend to execute your compressed kernel image
  1675. (zImage) directly from ROM or flash. If unsure, say N.
  1676. choice
  1677. prompt "Include SD/MMC loader in zImage (EXPERIMENTAL)"
  1678. depends on ZBOOT_ROM && ARCH_SH7372 && EXPERIMENTAL
  1679. default ZBOOT_ROM_NONE
  1680. help
  1681. Include experimental SD/MMC loading code in the ROM-able zImage.
  1682. With this enabled it is possible to write the ROM-able zImage
  1683. kernel image to an MMC or SD card and boot the kernel straight
  1684. from the reset vector. At reset the processor Mask ROM will load
  1685. the first part of the ROM-able zImage which in turn loads the
  1686. rest the kernel image to RAM.
  1687. config ZBOOT_ROM_NONE
  1688. bool "No SD/MMC loader in zImage (EXPERIMENTAL)"
  1689. help
  1690. Do not load image from SD or MMC
  1691. config ZBOOT_ROM_MMCIF
  1692. bool "Include MMCIF loader in zImage (EXPERIMENTAL)"
  1693. help
  1694. Load image from MMCIF hardware block.
  1695. config ZBOOT_ROM_SH_MOBILE_SDHI
  1696. bool "Include SuperH Mobile SDHI loader in zImage (EXPERIMENTAL)"
  1697. help
  1698. Load image from SDHI hardware block
  1699. endchoice
  1700. config ARM_APPENDED_DTB
  1701. bool "Use appended device tree blob to zImage (EXPERIMENTAL)"
  1702. depends on OF && !ZBOOT_ROM && EXPERIMENTAL
  1703. help
  1704. With this option, the boot code will look for a device tree binary
  1705. (DTB) appended to zImage
  1706. (e.g. cat zImage <filename>.dtb > zImage_w_dtb).
  1707. This is meant as a backward compatibility convenience for those
  1708. systems with a bootloader that can't be upgraded to accommodate
  1709. the documented boot protocol using a device tree.
  1710. Beware that there is very little in terms of protection against
  1711. this option being confused by leftover garbage in memory that might
  1712. look like a DTB header after a reboot if no actual DTB is appended
  1713. to zImage. Do not leave this option active in a production kernel
  1714. if you don't intend to always append a DTB. Proper passing of the
  1715. location into r2 of a bootloader provided DTB is always preferable
  1716. to this option.
  1717. config ARM_ATAG_DTB_COMPAT
  1718. bool "Supplement the appended DTB with traditional ATAG information"
  1719. depends on ARM_APPENDED_DTB
  1720. help
  1721. Some old bootloaders can't be updated to a DTB capable one, yet
  1722. they provide ATAGs with memory configuration, the ramdisk address,
  1723. the kernel cmdline string, etc. Such information is dynamically
  1724. provided by the bootloader and can't always be stored in a static
  1725. DTB. To allow a device tree enabled kernel to be used with such
  1726. bootloaders, this option allows zImage to extract the information
  1727. from the ATAG list and store it at run time into the appended DTB.
  1728. choice
  1729. prompt "Kernel command line type" if ARM_ATAG_DTB_COMPAT
  1730. default ARM_ATAG_DTB_COMPAT_CMDLINE_FROM_BOOTLOADER
  1731. config ARM_ATAG_DTB_COMPAT_CMDLINE_FROM_BOOTLOADER
  1732. bool "Use bootloader kernel arguments if available"
  1733. help
  1734. Uses the command-line options passed by the boot loader instead of
  1735. the device tree bootargs property. If the boot loader doesn't provide
  1736. any, the device tree bootargs property will be used.
  1737. config ARM_ATAG_DTB_COMPAT_CMDLINE_EXTEND
  1738. bool "Extend with bootloader kernel arguments"
  1739. help
  1740. The command-line arguments provided by the boot loader will be
  1741. appended to the the device tree bootargs property.
  1742. endchoice
  1743. config CMDLINE
  1744. string "Default kernel command string"
  1745. default ""
  1746. help
  1747. On some architectures (EBSA110 and CATS), there is currently no way
  1748. for the boot loader to pass arguments to the kernel. For these
  1749. architectures, you should supply some command-line options at build
  1750. time by entering them here. As a minimum, you should specify the
  1751. memory size and the root device (e.g., mem=64M root=/dev/nfs).
  1752. choice
  1753. prompt "Kernel command line type" if CMDLINE != ""
  1754. default CMDLINE_FROM_BOOTLOADER
  1755. config CMDLINE_FROM_BOOTLOADER
  1756. bool "Use bootloader kernel arguments if available"
  1757. help
  1758. Uses the command-line options passed by the boot loader. If
  1759. the boot loader doesn't provide any, the default kernel command
  1760. string provided in CMDLINE will be used.
  1761. config CMDLINE_EXTEND
  1762. bool "Extend bootloader kernel arguments"
  1763. help
  1764. The command-line arguments provided by the boot loader will be
  1765. appended to the default kernel command string.
  1766. config CMDLINE_FORCE
  1767. bool "Always use the default kernel command string"
  1768. help
  1769. Always use the default kernel command string, even if the boot
  1770. loader passes other arguments to the kernel.
  1771. This is useful if you cannot or don't want to change the
  1772. command-line options your boot loader passes to the kernel.
  1773. endchoice
  1774. config XIP_KERNEL
  1775. bool "Kernel Execute-In-Place from ROM"
  1776. depends on !ZBOOT_ROM && !ARM_LPAE
  1777. help
  1778. Execute-In-Place allows the kernel to run from non-volatile storage
  1779. directly addressable by the CPU, such as NOR flash. This saves RAM
  1780. space since the text section of the kernel is not loaded from flash
  1781. to RAM. Read-write sections, such as the data section and stack,
  1782. are still copied to RAM. The XIP kernel is not compressed since
  1783. it has to run directly from flash, so it will take more space to
  1784. store it. The flash address used to link the kernel object files,
  1785. and for storing it, is configuration dependent. Therefore, if you
  1786. say Y here, you must know the proper physical address where to
  1787. store the kernel image depending on your own flash memory usage.
  1788. Also note that the make target becomes "make xipImage" rather than
  1789. "make zImage" or "make Image". The final kernel binary to put in
  1790. ROM memory will be arch/arm/boot/xipImage.
  1791. If unsure, say N.
  1792. config XIP_PHYS_ADDR
  1793. hex "XIP Kernel Physical Location"
  1794. depends on XIP_KERNEL
  1795. default "0x00080000"
  1796. help
  1797. This is the physical address in your flash memory the kernel will
  1798. be linked for and stored to. This address is dependent on your
  1799. own flash usage.
  1800. config KEXEC
  1801. bool "Kexec system call (EXPERIMENTAL)"
  1802. depends on EXPERIMENTAL && (!SMP || HOTPLUG_CPU)
  1803. help
  1804. kexec is a system call that implements the ability to shutdown your
  1805. current kernel, and to start another kernel. It is like a reboot
  1806. but it is independent of the system firmware. And like a reboot
  1807. you can start any kernel with it, not just Linux.
  1808. It is an ongoing process to be certain the hardware in a machine
  1809. is properly shutdown, so do not be surprised if this code does not
  1810. initially work for you. It may help to enable device hotplugging
  1811. support.
  1812. config ATAGS_PROC
  1813. bool "Export atags in procfs"
  1814. depends on KEXEC
  1815. default y
  1816. help
  1817. Should the atags used to boot the kernel be exported in an "atags"
  1818. file in procfs. Useful with kexec.
  1819. config CRASH_DUMP
  1820. bool "Build kdump crash kernel (EXPERIMENTAL)"
  1821. depends on EXPERIMENTAL
  1822. help
  1823. Generate crash dump after being started by kexec. This should
  1824. be normally only set in special crash dump kernels which are
  1825. loaded in the main kernel with kexec-tools into a specially
  1826. reserved region and then later executed after a crash by
  1827. kdump/kexec. The crash dump kernel must be compiled to a
  1828. memory address not used by the main kernel
  1829. For more details see Documentation/kdump/kdump.txt
  1830. config AUTO_ZRELADDR
  1831. bool "Auto calculation of the decompressed kernel image address"
  1832. depends on !ZBOOT_ROM && !ARCH_U300
  1833. help
  1834. ZRELADDR is the physical address where the decompressed kernel
  1835. image will be placed. If AUTO_ZRELADDR is selected, the address
  1836. will be determined at run-time by masking the current IP with
  1837. 0xf8000000. This assumes the zImage being placed in the first 128MB
  1838. from start of memory.
  1839. endmenu
  1840. menu "CPU Power Management"
  1841. if ARCH_HAS_CPUFREQ
  1842. source "drivers/cpufreq/Kconfig"
  1843. config CPU_FREQ_IMX
  1844. tristate "CPUfreq driver for i.MX CPUs"
  1845. depends on ARCH_MXC && CPU_FREQ
  1846. help
  1847. This enables the CPUfreq driver for i.MX CPUs.
  1848. config CPU_FREQ_SA1100
  1849. bool
  1850. config CPU_FREQ_SA1110
  1851. bool
  1852. config CPU_FREQ_INTEGRATOR
  1853. tristate "CPUfreq driver for ARM Integrator CPUs"
  1854. depends on ARCH_INTEGRATOR && CPU_FREQ
  1855. default y
  1856. help
  1857. This enables the CPUfreq driver for ARM Integrator CPUs.
  1858. For details, take a look at <file:Documentation/cpu-freq>.
  1859. If in doubt, say Y.
  1860. config CPU_FREQ_PXA
  1861. bool
  1862. depends on CPU_FREQ && ARCH_PXA && PXA25x
  1863. default y
  1864. select CPU_FREQ_TABLE
  1865. select CPU_FREQ_DEFAULT_GOV_USERSPACE
  1866. config CPU_FREQ_S3C
  1867. bool
  1868. help
  1869. Internal configuration node for common cpufreq on Samsung SoC
  1870. config CPU_FREQ_S3C24XX
  1871. bool "CPUfreq driver for Samsung S3C24XX series CPUs (EXPERIMENTAL)"
  1872. depends on ARCH_S3C24XX && CPU_FREQ && EXPERIMENTAL
  1873. select CPU_FREQ_S3C
  1874. help
  1875. This enables the CPUfreq driver for the Samsung S3C24XX family
  1876. of CPUs.
  1877. For details, take a look at <file:Documentation/cpu-freq>.
  1878. If in doubt, say N.
  1879. config CPU_FREQ_S3C24XX_PLL
  1880. bool "Support CPUfreq changing of PLL frequency (EXPERIMENTAL)"
  1881. depends on CPU_FREQ_S3C24XX && EXPERIMENTAL
  1882. help
  1883. Compile in support for changing the PLL frequency from the
  1884. S3C24XX series CPUfreq driver. The PLL takes time to settle
  1885. after a frequency change, so by default it is not enabled.
  1886. This also means that the PLL tables for the selected CPU(s) will
  1887. be built which may increase the size of the kernel image.
  1888. config CPU_FREQ_S3C24XX_DEBUG
  1889. bool "Debug CPUfreq Samsung driver core"
  1890. depends on CPU_FREQ_S3C24XX
  1891. help
  1892. Enable s3c_freq_dbg for the Samsung S3C CPUfreq core
  1893. config CPU_FREQ_S3C24XX_IODEBUG
  1894. bool "Debug CPUfreq Samsung driver IO timing"
  1895. depends on CPU_FREQ_S3C24XX
  1896. help
  1897. Enable s3c_freq_iodbg for the Samsung S3C CPUfreq core
  1898. config CPU_FREQ_S3C24XX_DEBUGFS
  1899. bool "Export debugfs for CPUFreq"
  1900. depends on CPU_FREQ_S3C24XX && DEBUG_FS
  1901. help
  1902. Export status information via debugfs.
  1903. endif
  1904. source "drivers/cpuidle/Kconfig"
  1905. endmenu
  1906. menu "Floating point emulation"
  1907. comment "At least one emulation must be selected"
  1908. config FPE_NWFPE
  1909. bool "NWFPE math emulation"
  1910. depends on (!AEABI || OABI_COMPAT) && !THUMB2_KERNEL
  1911. ---help---
  1912. Say Y to include the NWFPE floating point emulator in the kernel.
  1913. This is necessary to run most binaries. Linux does not currently
  1914. support floating point hardware so you need to say Y here even if
  1915. your machine has an FPA or floating point co-processor podule.
  1916. You may say N here if you are going to load the Acorn FPEmulator
  1917. early in the bootup.
  1918. config FPE_NWFPE_XP
  1919. bool "Support extended precision"
  1920. depends on FPE_NWFPE
  1921. help
  1922. Say Y to include 80-bit support in the kernel floating-point
  1923. emulator. Otherwise, only 32 and 64-bit support is compiled in.
  1924. Note that gcc does not generate 80-bit operations by default,
  1925. so in most cases this option only enlarges the size of the
  1926. floating point emulator without any good reason.
  1927. You almost surely want to say N here.
  1928. config FPE_FASTFPE
  1929. bool "FastFPE math emulation (EXPERIMENTAL)"
  1930. depends on (!AEABI || OABI_COMPAT) && !CPU_32v3 && EXPERIMENTAL
  1931. ---help---
  1932. Say Y here to include the FAST floating point emulator in the kernel.
  1933. This is an experimental much faster emulator which now also has full
  1934. precision for the mantissa. It does not support any exceptions.
  1935. It is very simple, and approximately 3-6 times faster than NWFPE.
  1936. It should be sufficient for most programs. It may be not suitable
  1937. for scientific calculations, but you have to check this for yourself.
  1938. If you do not feel you need a faster FP emulation you should better
  1939. choose NWFPE.
  1940. config VFP
  1941. bool "VFP-format floating point maths"
  1942. depends on CPU_V6 || CPU_V6K || CPU_ARM926T || CPU_V7 || CPU_FEROCEON
  1943. help
  1944. Say Y to include VFP support code in the kernel. This is needed
  1945. if your hardware includes a VFP unit.
  1946. Please see <file:Documentation/arm/VFP/release-notes.txt> for
  1947. release notes and additional status information.
  1948. Say N if your target does not have VFP hardware.
  1949. config VFPv3
  1950. bool
  1951. depends on VFP
  1952. default y if CPU_V7
  1953. config NEON
  1954. bool "Advanced SIMD (NEON) Extension support"
  1955. depends on VFPv3 && CPU_V7
  1956. help
  1957. Say Y to include support code for NEON, the ARMv7 Advanced SIMD
  1958. Extension.
  1959. endmenu
  1960. menu "Userspace binary formats"
  1961. source "fs/Kconfig.binfmt"
  1962. config ARTHUR
  1963. tristate "RISC OS personality"
  1964. depends on !AEABI
  1965. help
  1966. Say Y here to include the kernel code necessary if you want to run
  1967. Acorn RISC OS/Arthur binaries under Linux. This code is still very
  1968. experimental; if this sounds frightening, say N and sleep in peace.
  1969. You can also say M here to compile this support as a module (which
  1970. will be called arthur).
  1971. endmenu
  1972. menu "Power management options"
  1973. source "kernel/power/Kconfig"
  1974. config ARCH_SUSPEND_POSSIBLE
  1975. depends on !ARCH_S5PC100 && !ARCH_TEGRA
  1976. depends on CPU_ARM920T || CPU_ARM926T || CPU_SA1100 || \
  1977. CPU_V6 || CPU_V6K || CPU_V7 || CPU_XSC3 || CPU_XSCALE || CPU_MOHAWK
  1978. def_bool y
  1979. config ARM_CPU_SUSPEND
  1980. def_bool PM_SLEEP
  1981. endmenu
  1982. source "net/Kconfig"
  1983. source "drivers/Kconfig"
  1984. source "fs/Kconfig"
  1985. source "arch/arm/Kconfig.debug"
  1986. source "security/Kconfig"
  1987. source "crypto/Kconfig"
  1988. source "lib/Kconfig"