emu10k1x.c 48 KB

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  1. /*
  2. * Copyright (c) by Francisco Moraes <fmoraes@nc.rr.com>
  3. * Driver EMU10K1X chips
  4. *
  5. * Parts of this code were adapted from audigyls.c driver which is
  6. * Copyright (c) by James Courtier-Dutton <James@superbug.demon.co.uk>
  7. *
  8. * BUGS:
  9. * --
  10. *
  11. * TODO:
  12. *
  13. * Chips (SB0200 model):
  14. * - EMU10K1X-DBQ
  15. * - STAC 9708T
  16. *
  17. * This program is free software; you can redistribute it and/or modify
  18. * it under the terms of the GNU General Public License as published by
  19. * the Free Software Foundation; either version 2 of the License, or
  20. * (at your option) any later version.
  21. *
  22. * This program is distributed in the hope that it will be useful,
  23. * but WITHOUT ANY WARRANTY; without even the implied warranty of
  24. * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
  25. * GNU General Public License for more details.
  26. *
  27. * You should have received a copy of the GNU General Public License
  28. * along with this program; if not, write to the Free Software
  29. * Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA
  30. *
  31. */
  32. #include <sound/driver.h>
  33. #include <linux/init.h>
  34. #include <linux/interrupt.h>
  35. #include <linux/pci.h>
  36. #include <linux/slab.h>
  37. #include <linux/moduleparam.h>
  38. #include <sound/core.h>
  39. #include <sound/initval.h>
  40. #include <sound/pcm.h>
  41. #include <sound/ac97_codec.h>
  42. #include <sound/info.h>
  43. #include <sound/rawmidi.h>
  44. MODULE_AUTHOR("Francisco Moraes <fmoraes@nc.rr.com>");
  45. MODULE_DESCRIPTION("EMU10K1X");
  46. MODULE_LICENSE("GPL");
  47. MODULE_SUPPORTED_DEVICE("{{Dell Creative Labs,SB Live!}");
  48. // module parameters (see "Module Parameters")
  49. static int index[SNDRV_CARDS] = SNDRV_DEFAULT_IDX;
  50. static char *id[SNDRV_CARDS] = SNDRV_DEFAULT_STR;
  51. static int enable[SNDRV_CARDS] = SNDRV_DEFAULT_ENABLE_PNP;
  52. module_param_array(index, int, NULL, 0444);
  53. MODULE_PARM_DESC(index, "Index value for the EMU10K1X soundcard.");
  54. module_param_array(id, charp, NULL, 0444);
  55. MODULE_PARM_DESC(id, "ID string for the EMU10K1X soundcard.");
  56. module_param_array(enable, bool, NULL, 0444);
  57. MODULE_PARM_DESC(enable, "Enable the EMU10K1X soundcard.");
  58. // some definitions were borrowed from emu10k1 driver as they seem to be the same
  59. /************************************************************************************************/
  60. /* PCI function 0 registers, address = <val> + PCIBASE0 */
  61. /************************************************************************************************/
  62. #define PTR 0x00 /* Indexed register set pointer register */
  63. /* NOTE: The CHANNELNUM and ADDRESS words can */
  64. /* be modified independently of each other. */
  65. #define DATA 0x04 /* Indexed register set data register */
  66. #define IPR 0x08 /* Global interrupt pending register */
  67. /* Clear pending interrupts by writing a 1 to */
  68. /* the relevant bits and zero to the other bits */
  69. #define IPR_MIDITRANSBUFEMPTY 0x00000001 /* MIDI UART transmit buffer empty */
  70. #define IPR_MIDIRECVBUFEMPTY 0x00000002 /* MIDI UART receive buffer empty */
  71. #define IPR_CH_0_LOOP 0x00000800 /* Channel 0 loop */
  72. #define IPR_CH_0_HALF_LOOP 0x00000100 /* Channel 0 half loop */
  73. #define IPR_CAP_0_LOOP 0x00080000 /* Channel capture loop */
  74. #define IPR_CAP_0_HALF_LOOP 0x00010000 /* Channel capture half loop */
  75. #define INTE 0x0c /* Interrupt enable register */
  76. #define INTE_MIDITXENABLE 0x00000001 /* Enable MIDI transmit-buffer-empty interrupts */
  77. #define INTE_MIDIRXENABLE 0x00000002 /* Enable MIDI receive-buffer-empty interrupts */
  78. #define INTE_CH_0_LOOP 0x00000800 /* Channel 0 loop */
  79. #define INTE_CH_0_HALF_LOOP 0x00000100 /* Channel 0 half loop */
  80. #define INTE_CAP_0_LOOP 0x00080000 /* Channel capture loop */
  81. #define INTE_CAP_0_HALF_LOOP 0x00010000 /* Channel capture half loop */
  82. #define HCFG 0x14 /* Hardware config register */
  83. #define HCFG_LOCKSOUNDCACHE 0x00000008 /* 1 = Cancel bustmaster accesses to soundcache */
  84. /* NOTE: This should generally never be used. */
  85. #define HCFG_AUDIOENABLE 0x00000001 /* 0 = CODECs transmit zero-valued samples */
  86. /* Should be set to 1 when the EMU10K1 is */
  87. /* completely initialized. */
  88. #define GPIO 0x18 /* Defaults: 00001080-Analog, 00001000-SPDIF. */
  89. #define AC97DATA 0x1c /* AC97 register set data register (16 bit) */
  90. #define AC97ADDRESS 0x1e /* AC97 register set address register (8 bit) */
  91. /********************************************************************************************************/
  92. /* Emu10k1x pointer-offset register set, accessed through the PTR and DATA registers */
  93. /********************************************************************************************************/
  94. #define PLAYBACK_LIST_ADDR 0x00 /* Base DMA address of a list of pointers to each period/size */
  95. /* One list entry: 4 bytes for DMA address,
  96. * 4 bytes for period_size << 16.
  97. * One list entry is 8 bytes long.
  98. * One list entry for each period in the buffer.
  99. */
  100. #define PLAYBACK_LIST_SIZE 0x01 /* Size of list in bytes << 16. E.g. 8 periods -> 0x00380000 */
  101. #define PLAYBACK_LIST_PTR 0x02 /* Pointer to the current period being played */
  102. #define PLAYBACK_DMA_ADDR 0x04 /* Playback DMA addresss */
  103. #define PLAYBACK_PERIOD_SIZE 0x05 /* Playback period size */
  104. #define PLAYBACK_POINTER 0x06 /* Playback period pointer. Sample currently in DAC */
  105. #define PLAYBACK_UNKNOWN1 0x07
  106. #define PLAYBACK_UNKNOWN2 0x08
  107. /* Only one capture channel supported */
  108. #define CAPTURE_DMA_ADDR 0x10 /* Capture DMA address */
  109. #define CAPTURE_BUFFER_SIZE 0x11 /* Capture buffer size */
  110. #define CAPTURE_POINTER 0x12 /* Capture buffer pointer. Sample currently in ADC */
  111. #define CAPTURE_UNKNOWN 0x13
  112. /* From 0x20 - 0x3f, last samples played on each channel */
  113. #define TRIGGER_CHANNEL 0x40 /* Trigger channel playback */
  114. #define TRIGGER_CHANNEL_0 0x00000001 /* Trigger channel 0 */
  115. #define TRIGGER_CHANNEL_1 0x00000002 /* Trigger channel 1 */
  116. #define TRIGGER_CHANNEL_2 0x00000004 /* Trigger channel 2 */
  117. #define TRIGGER_CAPTURE 0x00000100 /* Trigger capture channel */
  118. #define ROUTING 0x41 /* Setup sound routing ? */
  119. #define ROUTING_FRONT_LEFT 0x00000001
  120. #define ROUTING_FRONT_RIGHT 0x00000002
  121. #define ROUTING_REAR_LEFT 0x00000004
  122. #define ROUTING_REAR_RIGHT 0x00000008
  123. #define ROUTING_CENTER_LFE 0x00010000
  124. #define SPCS0 0x42 /* SPDIF output Channel Status 0 register */
  125. #define SPCS1 0x43 /* SPDIF output Channel Status 1 register */
  126. #define SPCS2 0x44 /* SPDIF output Channel Status 2 register */
  127. #define SPCS_CLKACCYMASK 0x30000000 /* Clock accuracy */
  128. #define SPCS_CLKACCY_1000PPM 0x00000000 /* 1000 parts per million */
  129. #define SPCS_CLKACCY_50PPM 0x10000000 /* 50 parts per million */
  130. #define SPCS_CLKACCY_VARIABLE 0x20000000 /* Variable accuracy */
  131. #define SPCS_SAMPLERATEMASK 0x0f000000 /* Sample rate */
  132. #define SPCS_SAMPLERATE_44 0x00000000 /* 44.1kHz sample rate */
  133. #define SPCS_SAMPLERATE_48 0x02000000 /* 48kHz sample rate */
  134. #define SPCS_SAMPLERATE_32 0x03000000 /* 32kHz sample rate */
  135. #define SPCS_CHANNELNUMMASK 0x00f00000 /* Channel number */
  136. #define SPCS_CHANNELNUM_UNSPEC 0x00000000 /* Unspecified channel number */
  137. #define SPCS_CHANNELNUM_LEFT 0x00100000 /* Left channel */
  138. #define SPCS_CHANNELNUM_RIGHT 0x00200000 /* Right channel */
  139. #define SPCS_SOURCENUMMASK 0x000f0000 /* Source number */
  140. #define SPCS_SOURCENUM_UNSPEC 0x00000000 /* Unspecified source number */
  141. #define SPCS_GENERATIONSTATUS 0x00008000 /* Originality flag (see IEC-958 spec) */
  142. #define SPCS_CATEGORYCODEMASK 0x00007f00 /* Category code (see IEC-958 spec) */
  143. #define SPCS_MODEMASK 0x000000c0 /* Mode (see IEC-958 spec) */
  144. #define SPCS_EMPHASISMASK 0x00000038 /* Emphasis */
  145. #define SPCS_EMPHASIS_NONE 0x00000000 /* No emphasis */
  146. #define SPCS_EMPHASIS_50_15 0x00000008 /* 50/15 usec 2 channel */
  147. #define SPCS_COPYRIGHT 0x00000004 /* Copyright asserted flag -- do not modify */
  148. #define SPCS_NOTAUDIODATA 0x00000002 /* 0 = Digital audio, 1 = not audio */
  149. #define SPCS_PROFESSIONAL 0x00000001 /* 0 = Consumer (IEC-958), 1 = pro (AES3-1992) */
  150. #define SPDIF_SELECT 0x45 /* Enables SPDIF or Analogue outputs 0-Analogue, 0x700-SPDIF */
  151. /* This is the MPU port on the card */
  152. #define MUDATA 0x47
  153. #define MUCMD 0x48
  154. #define MUSTAT MUCMD
  155. /* From 0x50 - 0x5f, last samples captured */
  156. /**
  157. * The hardware has 3 channels for playback and 1 for capture.
  158. * - channel 0 is the front channel
  159. * - channel 1 is the rear channel
  160. * - channel 2 is the center/lfe chanel
  161. * Volume is controlled by the AC97 for the front and rear channels by
  162. * the PCM Playback Volume, Sigmatel Surround Playback Volume and
  163. * Surround Playback Volume. The Sigmatel 4-Speaker Stereo switch affects
  164. * the front/rear channel mixing in the REAR OUT jack. When using the
  165. * 4-Speaker Stereo, both front and rear channels will be mixed in the
  166. * REAR OUT.
  167. * The center/lfe channel has no volume control and cannot be muted during
  168. * playback.
  169. */
  170. typedef struct snd_emu10k1x_voice emu10k1x_voice_t;
  171. typedef struct snd_emu10k1x emu10k1x_t;
  172. typedef struct snd_emu10k1x_pcm emu10k1x_pcm_t;
  173. struct snd_emu10k1x_voice {
  174. emu10k1x_t *emu;
  175. int number;
  176. int use;
  177. emu10k1x_pcm_t *epcm;
  178. };
  179. struct snd_emu10k1x_pcm {
  180. emu10k1x_t *emu;
  181. snd_pcm_substream_t *substream;
  182. emu10k1x_voice_t *voice;
  183. unsigned short running;
  184. };
  185. typedef struct {
  186. struct snd_emu10k1x *emu;
  187. snd_rawmidi_t *rmidi;
  188. snd_rawmidi_substream_t *substream_input;
  189. snd_rawmidi_substream_t *substream_output;
  190. unsigned int midi_mode;
  191. spinlock_t input_lock;
  192. spinlock_t output_lock;
  193. spinlock_t open_lock;
  194. int tx_enable, rx_enable;
  195. int port;
  196. int ipr_tx, ipr_rx;
  197. void (*interrupt)(emu10k1x_t *emu, unsigned int status);
  198. } emu10k1x_midi_t;
  199. // definition of the chip-specific record
  200. struct snd_emu10k1x {
  201. snd_card_t *card;
  202. struct pci_dev *pci;
  203. unsigned long port;
  204. struct resource *res_port;
  205. int irq;
  206. unsigned int revision; /* chip revision */
  207. unsigned int serial; /* serial number */
  208. unsigned short model; /* subsystem id */
  209. spinlock_t emu_lock;
  210. spinlock_t voice_lock;
  211. ac97_t *ac97;
  212. snd_pcm_t *pcm;
  213. emu10k1x_voice_t voices[3];
  214. emu10k1x_voice_t capture_voice;
  215. u32 spdif_bits[3]; // SPDIF out setup
  216. struct snd_dma_buffer dma_buffer;
  217. emu10k1x_midi_t midi;
  218. };
  219. /* hardware definition */
  220. static snd_pcm_hardware_t snd_emu10k1x_playback_hw = {
  221. .info = (SNDRV_PCM_INFO_MMAP |
  222. SNDRV_PCM_INFO_INTERLEAVED |
  223. SNDRV_PCM_INFO_BLOCK_TRANSFER |
  224. SNDRV_PCM_INFO_MMAP_VALID),
  225. .formats = SNDRV_PCM_FMTBIT_S16_LE,
  226. .rates = SNDRV_PCM_RATE_48000,
  227. .rate_min = 48000,
  228. .rate_max = 48000,
  229. .channels_min = 2,
  230. .channels_max = 2,
  231. .buffer_bytes_max = (32*1024),
  232. .period_bytes_min = 64,
  233. .period_bytes_max = (16*1024),
  234. .periods_min = 2,
  235. .periods_max = 8,
  236. .fifo_size = 0,
  237. };
  238. static snd_pcm_hardware_t snd_emu10k1x_capture_hw = {
  239. .info = (SNDRV_PCM_INFO_MMAP |
  240. SNDRV_PCM_INFO_INTERLEAVED |
  241. SNDRV_PCM_INFO_BLOCK_TRANSFER |
  242. SNDRV_PCM_INFO_MMAP_VALID),
  243. .formats = SNDRV_PCM_FMTBIT_S16_LE,
  244. .rates = SNDRV_PCM_RATE_48000,
  245. .rate_min = 48000,
  246. .rate_max = 48000,
  247. .channels_min = 2,
  248. .channels_max = 2,
  249. .buffer_bytes_max = (32*1024),
  250. .period_bytes_min = 64,
  251. .period_bytes_max = (16*1024),
  252. .periods_min = 2,
  253. .periods_max = 2,
  254. .fifo_size = 0,
  255. };
  256. static unsigned int snd_emu10k1x_ptr_read(emu10k1x_t * emu,
  257. unsigned int reg,
  258. unsigned int chn)
  259. {
  260. unsigned long flags;
  261. unsigned int regptr, val;
  262. regptr = (reg << 16) | chn;
  263. spin_lock_irqsave(&emu->emu_lock, flags);
  264. outl(regptr, emu->port + PTR);
  265. val = inl(emu->port + DATA);
  266. spin_unlock_irqrestore(&emu->emu_lock, flags);
  267. return val;
  268. }
  269. static void snd_emu10k1x_ptr_write(emu10k1x_t *emu,
  270. unsigned int reg,
  271. unsigned int chn,
  272. unsigned int data)
  273. {
  274. unsigned int regptr;
  275. unsigned long flags;
  276. regptr = (reg << 16) | chn;
  277. spin_lock_irqsave(&emu->emu_lock, flags);
  278. outl(regptr, emu->port + PTR);
  279. outl(data, emu->port + DATA);
  280. spin_unlock_irqrestore(&emu->emu_lock, flags);
  281. }
  282. static void snd_emu10k1x_intr_enable(emu10k1x_t *emu, unsigned int intrenb)
  283. {
  284. unsigned long flags;
  285. unsigned int enable;
  286. spin_lock_irqsave(&emu->emu_lock, flags);
  287. enable = inl(emu->port + INTE) | intrenb;
  288. outl(enable, emu->port + INTE);
  289. spin_unlock_irqrestore(&emu->emu_lock, flags);
  290. }
  291. static void snd_emu10k1x_intr_disable(emu10k1x_t *emu, unsigned int intrenb)
  292. {
  293. unsigned long flags;
  294. unsigned int enable;
  295. spin_lock_irqsave(&emu->emu_lock, flags);
  296. enable = inl(emu->port + INTE) & ~intrenb;
  297. outl(enable, emu->port + INTE);
  298. spin_unlock_irqrestore(&emu->emu_lock, flags);
  299. }
  300. static void snd_emu10k1x_gpio_write(emu10k1x_t *emu, unsigned int value)
  301. {
  302. unsigned long flags;
  303. spin_lock_irqsave(&emu->emu_lock, flags);
  304. outl(value, emu->port + GPIO);
  305. spin_unlock_irqrestore(&emu->emu_lock, flags);
  306. }
  307. static void snd_emu10k1x_pcm_free_substream(snd_pcm_runtime_t *runtime)
  308. {
  309. emu10k1x_pcm_t *epcm = runtime->private_data;
  310. if (epcm)
  311. kfree(epcm);
  312. }
  313. static void snd_emu10k1x_pcm_interrupt(emu10k1x_t *emu, emu10k1x_voice_t *voice)
  314. {
  315. emu10k1x_pcm_t *epcm;
  316. if ((epcm = voice->epcm) == NULL)
  317. return;
  318. if (epcm->substream == NULL)
  319. return;
  320. #if 0
  321. snd_printk(KERN_INFO "IRQ: position = 0x%x, period = 0x%x, size = 0x%x\n",
  322. epcm->substream->ops->pointer(epcm->substream),
  323. snd_pcm_lib_period_bytes(epcm->substream),
  324. snd_pcm_lib_buffer_bytes(epcm->substream));
  325. #endif
  326. snd_pcm_period_elapsed(epcm->substream);
  327. }
  328. /* open callback */
  329. static int snd_emu10k1x_playback_open(snd_pcm_substream_t *substream)
  330. {
  331. emu10k1x_t *chip = snd_pcm_substream_chip(substream);
  332. emu10k1x_pcm_t *epcm;
  333. snd_pcm_runtime_t *runtime = substream->runtime;
  334. int err;
  335. if ((err = snd_pcm_hw_constraint_integer(runtime, SNDRV_PCM_HW_PARAM_PERIODS)) < 0) {
  336. return err;
  337. }
  338. if ((err = snd_pcm_hw_constraint_step(runtime, 0, SNDRV_PCM_HW_PARAM_PERIOD_BYTES, 64)) < 0)
  339. return err;
  340. epcm = kcalloc(1, sizeof(*epcm), GFP_KERNEL);
  341. if (epcm == NULL)
  342. return -ENOMEM;
  343. epcm->emu = chip;
  344. epcm->substream = substream;
  345. runtime->private_data = epcm;
  346. runtime->private_free = snd_emu10k1x_pcm_free_substream;
  347. runtime->hw = snd_emu10k1x_playback_hw;
  348. return 0;
  349. }
  350. /* close callback */
  351. static int snd_emu10k1x_playback_close(snd_pcm_substream_t *substream)
  352. {
  353. return 0;
  354. }
  355. /* hw_params callback */
  356. static int snd_emu10k1x_pcm_hw_params(snd_pcm_substream_t *substream,
  357. snd_pcm_hw_params_t * hw_params)
  358. {
  359. snd_pcm_runtime_t *runtime = substream->runtime;
  360. emu10k1x_pcm_t *epcm = runtime->private_data;
  361. if (! epcm->voice) {
  362. epcm->voice = &epcm->emu->voices[substream->pcm->device];
  363. epcm->voice->use = 1;
  364. epcm->voice->epcm = epcm;
  365. }
  366. return snd_pcm_lib_malloc_pages(substream,
  367. params_buffer_bytes(hw_params));
  368. }
  369. /* hw_free callback */
  370. static int snd_emu10k1x_pcm_hw_free(snd_pcm_substream_t *substream)
  371. {
  372. snd_pcm_runtime_t *runtime = substream->runtime;
  373. emu10k1x_pcm_t *epcm;
  374. if (runtime->private_data == NULL)
  375. return 0;
  376. epcm = runtime->private_data;
  377. if (epcm->voice) {
  378. epcm->voice->use = 0;
  379. epcm->voice->epcm = NULL;
  380. epcm->voice = NULL;
  381. }
  382. return snd_pcm_lib_free_pages(substream);
  383. }
  384. /* prepare callback */
  385. static int snd_emu10k1x_pcm_prepare(snd_pcm_substream_t *substream)
  386. {
  387. emu10k1x_t *emu = snd_pcm_substream_chip(substream);
  388. snd_pcm_runtime_t *runtime = substream->runtime;
  389. emu10k1x_pcm_t *epcm = runtime->private_data;
  390. int voice = epcm->voice->number;
  391. u32 *table_base = (u32 *)(emu->dma_buffer.area+1024*voice);
  392. u32 period_size_bytes = frames_to_bytes(runtime, runtime->period_size);
  393. int i;
  394. for(i=0; i < runtime->periods; i++) {
  395. *table_base++=runtime->dma_addr+(i*period_size_bytes);
  396. *table_base++=period_size_bytes<<16;
  397. }
  398. snd_emu10k1x_ptr_write(emu, PLAYBACK_LIST_ADDR, voice, emu->dma_buffer.addr+1024*voice);
  399. snd_emu10k1x_ptr_write(emu, PLAYBACK_LIST_SIZE, voice, (runtime->periods - 1) << 19);
  400. snd_emu10k1x_ptr_write(emu, PLAYBACK_LIST_PTR, voice, 0);
  401. snd_emu10k1x_ptr_write(emu, PLAYBACK_POINTER, voice, 0);
  402. snd_emu10k1x_ptr_write(emu, PLAYBACK_UNKNOWN1, voice, 0);
  403. snd_emu10k1x_ptr_write(emu, PLAYBACK_UNKNOWN2, voice, 0);
  404. snd_emu10k1x_ptr_write(emu, PLAYBACK_DMA_ADDR, voice, runtime->dma_addr);
  405. snd_emu10k1x_ptr_write(emu, PLAYBACK_PERIOD_SIZE, voice, frames_to_bytes(runtime, runtime->period_size)<<16);
  406. return 0;
  407. }
  408. /* trigger callback */
  409. static int snd_emu10k1x_pcm_trigger(snd_pcm_substream_t *substream,
  410. int cmd)
  411. {
  412. emu10k1x_t *emu = snd_pcm_substream_chip(substream);
  413. snd_pcm_runtime_t *runtime = substream->runtime;
  414. emu10k1x_pcm_t *epcm = runtime->private_data;
  415. int channel = epcm->voice->number;
  416. int result = 0;
  417. // snd_printk(KERN_INFO "trigger - emu10k1x = 0x%x, cmd = %i, pointer = %d\n", (int)emu, cmd, (int)substream->ops->pointer(substream));
  418. switch (cmd) {
  419. case SNDRV_PCM_TRIGGER_START:
  420. if(runtime->periods == 2)
  421. snd_emu10k1x_intr_enable(emu, (INTE_CH_0_LOOP | INTE_CH_0_HALF_LOOP) << channel);
  422. else
  423. snd_emu10k1x_intr_enable(emu, INTE_CH_0_LOOP << channel);
  424. epcm->running = 1;
  425. snd_emu10k1x_ptr_write(emu, TRIGGER_CHANNEL, 0, snd_emu10k1x_ptr_read(emu, TRIGGER_CHANNEL, 0)|(TRIGGER_CHANNEL_0<<channel));
  426. break;
  427. case SNDRV_PCM_TRIGGER_STOP:
  428. epcm->running = 0;
  429. snd_emu10k1x_intr_disable(emu, (INTE_CH_0_LOOP | INTE_CH_0_HALF_LOOP) << channel);
  430. snd_emu10k1x_ptr_write(emu, TRIGGER_CHANNEL, 0, snd_emu10k1x_ptr_read(emu, TRIGGER_CHANNEL, 0) & ~(TRIGGER_CHANNEL_0<<channel));
  431. break;
  432. default:
  433. result = -EINVAL;
  434. break;
  435. }
  436. return result;
  437. }
  438. /* pointer callback */
  439. static snd_pcm_uframes_t
  440. snd_emu10k1x_pcm_pointer(snd_pcm_substream_t *substream)
  441. {
  442. emu10k1x_t *emu = snd_pcm_substream_chip(substream);
  443. snd_pcm_runtime_t *runtime = substream->runtime;
  444. emu10k1x_pcm_t *epcm = runtime->private_data;
  445. int channel = epcm->voice->number;
  446. snd_pcm_uframes_t ptr = 0, ptr1 = 0, ptr2= 0,ptr3 = 0,ptr4 = 0;
  447. if (!epcm->running)
  448. return 0;
  449. ptr3 = snd_emu10k1x_ptr_read(emu, PLAYBACK_LIST_PTR, channel);
  450. ptr1 = snd_emu10k1x_ptr_read(emu, PLAYBACK_POINTER, channel);
  451. ptr4 = snd_emu10k1x_ptr_read(emu, PLAYBACK_LIST_PTR, channel);
  452. if(ptr4 == 0 && ptr1 == frames_to_bytes(runtime, runtime->buffer_size))
  453. return 0;
  454. if (ptr3 != ptr4)
  455. ptr1 = snd_emu10k1x_ptr_read(emu, PLAYBACK_POINTER, channel);
  456. ptr2 = bytes_to_frames(runtime, ptr1);
  457. ptr2 += (ptr4 >> 3) * runtime->period_size;
  458. ptr = ptr2;
  459. if (ptr >= runtime->buffer_size)
  460. ptr -= runtime->buffer_size;
  461. return ptr;
  462. }
  463. /* operators */
  464. static snd_pcm_ops_t snd_emu10k1x_playback_ops = {
  465. .open = snd_emu10k1x_playback_open,
  466. .close = snd_emu10k1x_playback_close,
  467. .ioctl = snd_pcm_lib_ioctl,
  468. .hw_params = snd_emu10k1x_pcm_hw_params,
  469. .hw_free = snd_emu10k1x_pcm_hw_free,
  470. .prepare = snd_emu10k1x_pcm_prepare,
  471. .trigger = snd_emu10k1x_pcm_trigger,
  472. .pointer = snd_emu10k1x_pcm_pointer,
  473. };
  474. /* open_capture callback */
  475. static int snd_emu10k1x_pcm_open_capture(snd_pcm_substream_t *substream)
  476. {
  477. emu10k1x_t *chip = snd_pcm_substream_chip(substream);
  478. emu10k1x_pcm_t *epcm;
  479. snd_pcm_runtime_t *runtime = substream->runtime;
  480. int err;
  481. if ((err = snd_pcm_hw_constraint_integer(runtime, SNDRV_PCM_HW_PARAM_PERIODS)) < 0)
  482. return err;
  483. if ((err = snd_pcm_hw_constraint_step(runtime, 0, SNDRV_PCM_HW_PARAM_PERIOD_BYTES, 64)) < 0)
  484. return err;
  485. epcm = kcalloc(1, sizeof(*epcm), GFP_KERNEL);
  486. if (epcm == NULL)
  487. return -ENOMEM;
  488. epcm->emu = chip;
  489. epcm->substream = substream;
  490. runtime->private_data = epcm;
  491. runtime->private_free = snd_emu10k1x_pcm_free_substream;
  492. runtime->hw = snd_emu10k1x_capture_hw;
  493. return 0;
  494. }
  495. /* close callback */
  496. static int snd_emu10k1x_pcm_close_capture(snd_pcm_substream_t *substream)
  497. {
  498. return 0;
  499. }
  500. /* hw_params callback */
  501. static int snd_emu10k1x_pcm_hw_params_capture(snd_pcm_substream_t *substream,
  502. snd_pcm_hw_params_t * hw_params)
  503. {
  504. snd_pcm_runtime_t *runtime = substream->runtime;
  505. emu10k1x_pcm_t *epcm = runtime->private_data;
  506. if (! epcm->voice) {
  507. if (epcm->emu->capture_voice.use)
  508. return -EBUSY;
  509. epcm->voice = &epcm->emu->capture_voice;
  510. epcm->voice->epcm = epcm;
  511. epcm->voice->use = 1;
  512. }
  513. return snd_pcm_lib_malloc_pages(substream,
  514. params_buffer_bytes(hw_params));
  515. }
  516. /* hw_free callback */
  517. static int snd_emu10k1x_pcm_hw_free_capture(snd_pcm_substream_t *substream)
  518. {
  519. snd_pcm_runtime_t *runtime = substream->runtime;
  520. emu10k1x_pcm_t *epcm;
  521. if (runtime->private_data == NULL)
  522. return 0;
  523. epcm = runtime->private_data;
  524. if (epcm->voice) {
  525. epcm->voice->use = 0;
  526. epcm->voice->epcm = NULL;
  527. epcm->voice = NULL;
  528. }
  529. return snd_pcm_lib_free_pages(substream);
  530. }
  531. /* prepare capture callback */
  532. static int snd_emu10k1x_pcm_prepare_capture(snd_pcm_substream_t *substream)
  533. {
  534. emu10k1x_t *emu = snd_pcm_substream_chip(substream);
  535. snd_pcm_runtime_t *runtime = substream->runtime;
  536. snd_emu10k1x_ptr_write(emu, CAPTURE_DMA_ADDR, 0, runtime->dma_addr);
  537. snd_emu10k1x_ptr_write(emu, CAPTURE_BUFFER_SIZE, 0, frames_to_bytes(runtime, runtime->buffer_size)<<16); // buffer size in bytes
  538. snd_emu10k1x_ptr_write(emu, CAPTURE_POINTER, 0, 0);
  539. snd_emu10k1x_ptr_write(emu, CAPTURE_UNKNOWN, 0, 0);
  540. return 0;
  541. }
  542. /* trigger_capture callback */
  543. static int snd_emu10k1x_pcm_trigger_capture(snd_pcm_substream_t *substream,
  544. int cmd)
  545. {
  546. emu10k1x_t *emu = snd_pcm_substream_chip(substream);
  547. snd_pcm_runtime_t *runtime = substream->runtime;
  548. emu10k1x_pcm_t *epcm = runtime->private_data;
  549. int result = 0;
  550. switch (cmd) {
  551. case SNDRV_PCM_TRIGGER_START:
  552. snd_emu10k1x_intr_enable(emu, INTE_CAP_0_LOOP |
  553. INTE_CAP_0_HALF_LOOP);
  554. snd_emu10k1x_ptr_write(emu, TRIGGER_CHANNEL, 0, snd_emu10k1x_ptr_read(emu, TRIGGER_CHANNEL, 0)|TRIGGER_CAPTURE);
  555. epcm->running = 1;
  556. break;
  557. case SNDRV_PCM_TRIGGER_STOP:
  558. epcm->running = 0;
  559. snd_emu10k1x_intr_disable(emu, INTE_CAP_0_LOOP |
  560. INTE_CAP_0_HALF_LOOP);
  561. snd_emu10k1x_ptr_write(emu, TRIGGER_CHANNEL, 0, snd_emu10k1x_ptr_read(emu, TRIGGER_CHANNEL, 0) & ~(TRIGGER_CAPTURE));
  562. break;
  563. default:
  564. result = -EINVAL;
  565. break;
  566. }
  567. return result;
  568. }
  569. /* pointer_capture callback */
  570. static snd_pcm_uframes_t
  571. snd_emu10k1x_pcm_pointer_capture(snd_pcm_substream_t *substream)
  572. {
  573. emu10k1x_t *emu = snd_pcm_substream_chip(substream);
  574. snd_pcm_runtime_t *runtime = substream->runtime;
  575. emu10k1x_pcm_t *epcm = runtime->private_data;
  576. snd_pcm_uframes_t ptr;
  577. if (!epcm->running)
  578. return 0;
  579. ptr = bytes_to_frames(runtime, snd_emu10k1x_ptr_read(emu, CAPTURE_POINTER, 0));
  580. if (ptr >= runtime->buffer_size)
  581. ptr -= runtime->buffer_size;
  582. return ptr;
  583. }
  584. static snd_pcm_ops_t snd_emu10k1x_capture_ops = {
  585. .open = snd_emu10k1x_pcm_open_capture,
  586. .close = snd_emu10k1x_pcm_close_capture,
  587. .ioctl = snd_pcm_lib_ioctl,
  588. .hw_params = snd_emu10k1x_pcm_hw_params_capture,
  589. .hw_free = snd_emu10k1x_pcm_hw_free_capture,
  590. .prepare = snd_emu10k1x_pcm_prepare_capture,
  591. .trigger = snd_emu10k1x_pcm_trigger_capture,
  592. .pointer = snd_emu10k1x_pcm_pointer_capture,
  593. };
  594. static unsigned short snd_emu10k1x_ac97_read(ac97_t *ac97,
  595. unsigned short reg)
  596. {
  597. emu10k1x_t *emu = ac97->private_data;
  598. unsigned long flags;
  599. unsigned short val;
  600. spin_lock_irqsave(&emu->emu_lock, flags);
  601. outb(reg, emu->port + AC97ADDRESS);
  602. val = inw(emu->port + AC97DATA);
  603. spin_unlock_irqrestore(&emu->emu_lock, flags);
  604. return val;
  605. }
  606. static void snd_emu10k1x_ac97_write(ac97_t *ac97,
  607. unsigned short reg, unsigned short val)
  608. {
  609. emu10k1x_t *emu = ac97->private_data;
  610. unsigned long flags;
  611. spin_lock_irqsave(&emu->emu_lock, flags);
  612. outb(reg, emu->port + AC97ADDRESS);
  613. outw(val, emu->port + AC97DATA);
  614. spin_unlock_irqrestore(&emu->emu_lock, flags);
  615. }
  616. static int snd_emu10k1x_ac97(emu10k1x_t *chip)
  617. {
  618. ac97_bus_t *pbus;
  619. ac97_template_t ac97;
  620. int err;
  621. static ac97_bus_ops_t ops = {
  622. .write = snd_emu10k1x_ac97_write,
  623. .read = snd_emu10k1x_ac97_read,
  624. };
  625. if ((err = snd_ac97_bus(chip->card, 0, &ops, NULL, &pbus)) < 0)
  626. return err;
  627. pbus->no_vra = 1; /* we don't need VRA */
  628. memset(&ac97, 0, sizeof(ac97));
  629. ac97.private_data = chip;
  630. ac97.scaps = AC97_SCAP_NO_SPDIF;
  631. return snd_ac97_mixer(pbus, &ac97, &chip->ac97);
  632. }
  633. static int snd_emu10k1x_free(emu10k1x_t *chip)
  634. {
  635. snd_emu10k1x_ptr_write(chip, TRIGGER_CHANNEL, 0, 0);
  636. // disable interrupts
  637. outl(0, chip->port + INTE);
  638. // disable audio
  639. outl(HCFG_LOCKSOUNDCACHE, chip->port + HCFG);
  640. // release the i/o port
  641. if (chip->res_port) {
  642. release_resource(chip->res_port);
  643. kfree_nocheck(chip->res_port);
  644. }
  645. // release the irq
  646. if (chip->irq >= 0)
  647. free_irq(chip->irq, (void *)chip);
  648. // release the DMA
  649. if (chip->dma_buffer.area) {
  650. snd_dma_free_pages(&chip->dma_buffer);
  651. }
  652. pci_disable_device(chip->pci);
  653. // release the data
  654. kfree(chip);
  655. return 0;
  656. }
  657. static int snd_emu10k1x_dev_free(snd_device_t *device)
  658. {
  659. emu10k1x_t *chip = device->device_data;
  660. return snd_emu10k1x_free(chip);
  661. }
  662. static irqreturn_t snd_emu10k1x_interrupt(int irq, void *dev_id,
  663. struct pt_regs *regs)
  664. {
  665. unsigned int status;
  666. emu10k1x_t *chip = dev_id;
  667. emu10k1x_voice_t *pvoice = chip->voices;
  668. int i;
  669. int mask;
  670. status = inl(chip->port + IPR);
  671. if(status) {
  672. // capture interrupt
  673. if(status & (IPR_CAP_0_LOOP | IPR_CAP_0_HALF_LOOP)) {
  674. emu10k1x_voice_t *pvoice = &chip->capture_voice;
  675. if(pvoice->use)
  676. snd_emu10k1x_pcm_interrupt(chip, pvoice);
  677. else
  678. snd_emu10k1x_intr_disable(chip,
  679. INTE_CAP_0_LOOP |
  680. INTE_CAP_0_HALF_LOOP);
  681. }
  682. mask = IPR_CH_0_LOOP|IPR_CH_0_HALF_LOOP;
  683. for(i = 0; i < 3; i++) {
  684. if(status & mask) {
  685. if(pvoice->use)
  686. snd_emu10k1x_pcm_interrupt(chip, pvoice);
  687. else
  688. snd_emu10k1x_intr_disable(chip, mask);
  689. }
  690. pvoice++;
  691. mask <<= 1;
  692. }
  693. if (status & (IPR_MIDITRANSBUFEMPTY|IPR_MIDIRECVBUFEMPTY)) {
  694. if (chip->midi.interrupt)
  695. chip->midi.interrupt(chip, status);
  696. else
  697. snd_emu10k1x_intr_disable(chip, INTE_MIDITXENABLE|INTE_MIDIRXENABLE);
  698. }
  699. // acknowledge the interrupt if necessary
  700. if(status)
  701. outl(status, chip->port+IPR);
  702. // snd_printk(KERN_INFO "interrupt %08x\n", status);
  703. }
  704. return IRQ_HANDLED;
  705. }
  706. static void snd_emu10k1x_pcm_free(snd_pcm_t *pcm)
  707. {
  708. emu10k1x_t *emu = pcm->private_data;
  709. emu->pcm = NULL;
  710. snd_pcm_lib_preallocate_free_for_all(pcm);
  711. }
  712. static int __devinit snd_emu10k1x_pcm(emu10k1x_t *emu, int device, snd_pcm_t **rpcm)
  713. {
  714. snd_pcm_t *pcm;
  715. int err;
  716. int capture = 0;
  717. if (rpcm)
  718. *rpcm = NULL;
  719. if (device == 0)
  720. capture = 1;
  721. if ((err = snd_pcm_new(emu->card, "emu10k1x", device, 1, capture, &pcm)) < 0)
  722. return err;
  723. pcm->private_data = emu;
  724. pcm->private_free = snd_emu10k1x_pcm_free;
  725. switch(device) {
  726. case 0:
  727. snd_pcm_set_ops(pcm, SNDRV_PCM_STREAM_PLAYBACK, &snd_emu10k1x_playback_ops);
  728. snd_pcm_set_ops(pcm, SNDRV_PCM_STREAM_CAPTURE, &snd_emu10k1x_capture_ops);
  729. break;
  730. case 1:
  731. case 2:
  732. snd_pcm_set_ops(pcm, SNDRV_PCM_STREAM_PLAYBACK, &snd_emu10k1x_playback_ops);
  733. break;
  734. }
  735. pcm->info_flags = 0;
  736. pcm->dev_subclass = SNDRV_PCM_SUBCLASS_GENERIC_MIX;
  737. switch(device) {
  738. case 0:
  739. strcpy(pcm->name, "EMU10K1X Front");
  740. break;
  741. case 1:
  742. strcpy(pcm->name, "EMU10K1X Rear");
  743. break;
  744. case 2:
  745. strcpy(pcm->name, "EMU10K1X Center/LFE");
  746. break;
  747. }
  748. emu->pcm = pcm;
  749. snd_pcm_lib_preallocate_pages_for_all(pcm, SNDRV_DMA_TYPE_DEV,
  750. snd_dma_pci_data(emu->pci),
  751. 32*1024, 32*1024);
  752. if (rpcm)
  753. *rpcm = pcm;
  754. return 0;
  755. }
  756. static int __devinit snd_emu10k1x_create(snd_card_t *card,
  757. struct pci_dev *pci,
  758. emu10k1x_t **rchip)
  759. {
  760. emu10k1x_t *chip;
  761. int err;
  762. int ch;
  763. static snd_device_ops_t ops = {
  764. .dev_free = snd_emu10k1x_dev_free,
  765. };
  766. *rchip = NULL;
  767. if ((err = pci_enable_device(pci)) < 0)
  768. return err;
  769. if (pci_set_dma_mask(pci, 0x0fffffff) < 0 ||
  770. pci_set_consistent_dma_mask(pci, 0x0fffffff) < 0) {
  771. snd_printk(KERN_ERR "error to set 28bit mask DMA\n");
  772. pci_disable_device(pci);
  773. return -ENXIO;
  774. }
  775. chip = kcalloc(1, sizeof(*chip), GFP_KERNEL);
  776. if (chip == NULL) {
  777. pci_disable_device(pci);
  778. return -ENOMEM;
  779. }
  780. chip->card = card;
  781. chip->pci = pci;
  782. chip->irq = -1;
  783. spin_lock_init(&chip->emu_lock);
  784. spin_lock_init(&chip->voice_lock);
  785. chip->port = pci_resource_start(pci, 0);
  786. if ((chip->res_port = request_region(chip->port, 8,
  787. "EMU10K1X")) == NULL) {
  788. snd_printk(KERN_ERR "emu10k1x: cannot allocate the port 0x%lx\n", chip->port);
  789. snd_emu10k1x_free(chip);
  790. return -EBUSY;
  791. }
  792. if (request_irq(pci->irq, snd_emu10k1x_interrupt,
  793. SA_INTERRUPT|SA_SHIRQ, "EMU10K1X",
  794. (void *)chip)) {
  795. snd_printk(KERN_ERR "emu10k1x: cannot grab irq %d\n", pci->irq);
  796. snd_emu10k1x_free(chip);
  797. return -EBUSY;
  798. }
  799. chip->irq = pci->irq;
  800. if(snd_dma_alloc_pages(SNDRV_DMA_TYPE_DEV, snd_dma_pci_data(pci),
  801. 4 * 1024, &chip->dma_buffer) < 0) {
  802. snd_emu10k1x_free(chip);
  803. return -ENOMEM;
  804. }
  805. pci_set_master(pci);
  806. /* read revision & serial */
  807. pci_read_config_byte(pci, PCI_REVISION_ID, (char *)&chip->revision);
  808. pci_read_config_dword(pci, PCI_SUBSYSTEM_VENDOR_ID, &chip->serial);
  809. pci_read_config_word(pci, PCI_SUBSYSTEM_ID, &chip->model);
  810. snd_printk(KERN_INFO "Model %04x Rev %08x Serial %08x\n", chip->model,
  811. chip->revision, chip->serial);
  812. outl(0, chip->port + INTE);
  813. for(ch = 0; ch < 3; ch++) {
  814. chip->voices[ch].emu = chip;
  815. chip->voices[ch].number = ch;
  816. }
  817. /*
  818. * Init to 0x02109204 :
  819. * Clock accuracy = 0 (1000ppm)
  820. * Sample Rate = 2 (48kHz)
  821. * Audio Channel = 1 (Left of 2)
  822. * Source Number = 0 (Unspecified)
  823. * Generation Status = 1 (Original for Cat Code 12)
  824. * Cat Code = 12 (Digital Signal Mixer)
  825. * Mode = 0 (Mode 0)
  826. * Emphasis = 0 (None)
  827. * CP = 1 (Copyright unasserted)
  828. * AN = 0 (Audio data)
  829. * P = 0 (Consumer)
  830. */
  831. snd_emu10k1x_ptr_write(chip, SPCS0, 0,
  832. chip->spdif_bits[0] =
  833. SPCS_CLKACCY_1000PPM | SPCS_SAMPLERATE_48 |
  834. SPCS_CHANNELNUM_LEFT | SPCS_SOURCENUM_UNSPEC |
  835. SPCS_GENERATIONSTATUS | 0x00001200 |
  836. 0x00000000 | SPCS_EMPHASIS_NONE | SPCS_COPYRIGHT);
  837. snd_emu10k1x_ptr_write(chip, SPCS1, 0,
  838. chip->spdif_bits[1] =
  839. SPCS_CLKACCY_1000PPM | SPCS_SAMPLERATE_48 |
  840. SPCS_CHANNELNUM_LEFT | SPCS_SOURCENUM_UNSPEC |
  841. SPCS_GENERATIONSTATUS | 0x00001200 |
  842. 0x00000000 | SPCS_EMPHASIS_NONE | SPCS_COPYRIGHT);
  843. snd_emu10k1x_ptr_write(chip, SPCS2, 0,
  844. chip->spdif_bits[2] =
  845. SPCS_CLKACCY_1000PPM | SPCS_SAMPLERATE_48 |
  846. SPCS_CHANNELNUM_LEFT | SPCS_SOURCENUM_UNSPEC |
  847. SPCS_GENERATIONSTATUS | 0x00001200 |
  848. 0x00000000 | SPCS_EMPHASIS_NONE | SPCS_COPYRIGHT);
  849. snd_emu10k1x_ptr_write(chip, SPDIF_SELECT, 0, 0x700); // disable SPDIF
  850. snd_emu10k1x_ptr_write(chip, ROUTING, 0, 0x1003F); // routing
  851. snd_emu10k1x_gpio_write(chip, 0x1080); // analog mode
  852. outl(HCFG_LOCKSOUNDCACHE|HCFG_AUDIOENABLE, chip->port+HCFG);
  853. if ((err = snd_device_new(card, SNDRV_DEV_LOWLEVEL,
  854. chip, &ops)) < 0) {
  855. snd_emu10k1x_free(chip);
  856. return err;
  857. }
  858. *rchip = chip;
  859. return 0;
  860. }
  861. static void snd_emu10k1x_proc_reg_read(snd_info_entry_t *entry,
  862. snd_info_buffer_t * buffer)
  863. {
  864. emu10k1x_t *emu = entry->private_data;
  865. unsigned long value,value1,value2;
  866. unsigned long flags;
  867. int i;
  868. snd_iprintf(buffer, "Registers:\n\n");
  869. for(i = 0; i < 0x20; i+=4) {
  870. spin_lock_irqsave(&emu->emu_lock, flags);
  871. value = inl(emu->port + i);
  872. spin_unlock_irqrestore(&emu->emu_lock, flags);
  873. snd_iprintf(buffer, "Register %02X: %08lX\n", i, value);
  874. }
  875. snd_iprintf(buffer, "\nRegisters\n\n");
  876. for(i = 0; i <= 0x48; i++) {
  877. value = snd_emu10k1x_ptr_read(emu, i, 0);
  878. if(i < 0x10 || (i >= 0x20 && i < 0x40)) {
  879. value1 = snd_emu10k1x_ptr_read(emu, i, 1);
  880. value2 = snd_emu10k1x_ptr_read(emu, i, 2);
  881. snd_iprintf(buffer, "%02X: %08lX %08lX %08lX\n", i, value, value1, value2);
  882. } else {
  883. snd_iprintf(buffer, "%02X: %08lX\n", i, value);
  884. }
  885. }
  886. }
  887. static void snd_emu10k1x_proc_reg_write(snd_info_entry_t *entry,
  888. snd_info_buffer_t *buffer)
  889. {
  890. emu10k1x_t *emu = entry->private_data;
  891. char line[64];
  892. unsigned int reg, channel_id , val;
  893. while (!snd_info_get_line(buffer, line, sizeof(line))) {
  894. if (sscanf(line, "%x %x %x", &reg, &channel_id, &val) != 3)
  895. continue;
  896. if ((reg < 0x49) && (reg >=0) && (val <= 0xffffffff)
  897. && (channel_id >=0) && (channel_id <= 2) )
  898. snd_emu10k1x_ptr_write(emu, reg, channel_id, val);
  899. }
  900. }
  901. static int __devinit snd_emu10k1x_proc_init(emu10k1x_t * emu)
  902. {
  903. snd_info_entry_t *entry;
  904. if(! snd_card_proc_new(emu->card, "emu10k1x_regs", &entry)) {
  905. snd_info_set_text_ops(entry, emu, 1024, snd_emu10k1x_proc_reg_read);
  906. entry->c.text.write_size = 64;
  907. entry->c.text.write = snd_emu10k1x_proc_reg_write;
  908. entry->private_data = emu;
  909. }
  910. return 0;
  911. }
  912. static int snd_emu10k1x_shared_spdif_info(snd_kcontrol_t *kcontrol, snd_ctl_elem_info_t * uinfo)
  913. {
  914. uinfo->type = SNDRV_CTL_ELEM_TYPE_BOOLEAN;
  915. uinfo->count = 1;
  916. uinfo->value.integer.min = 0;
  917. uinfo->value.integer.max = 1;
  918. return 0;
  919. }
  920. static int snd_emu10k1x_shared_spdif_get(snd_kcontrol_t * kcontrol,
  921. snd_ctl_elem_value_t * ucontrol)
  922. {
  923. emu10k1x_t *emu = snd_kcontrol_chip(kcontrol);
  924. ucontrol->value.integer.value[0] = (snd_emu10k1x_ptr_read(emu, SPDIF_SELECT, 0) == 0x700) ? 0 : 1;
  925. return 0;
  926. }
  927. static int snd_emu10k1x_shared_spdif_put(snd_kcontrol_t * kcontrol,
  928. snd_ctl_elem_value_t * ucontrol)
  929. {
  930. emu10k1x_t *emu = snd_kcontrol_chip(kcontrol);
  931. unsigned int val;
  932. int change = 0;
  933. val = ucontrol->value.integer.value[0] ;
  934. if (val) {
  935. // enable spdif output
  936. snd_emu10k1x_ptr_write(emu, SPDIF_SELECT, 0, 0x000);
  937. snd_emu10k1x_ptr_write(emu, ROUTING, 0, 0x700);
  938. snd_emu10k1x_gpio_write(emu, 0x1000);
  939. } else {
  940. // disable spdif output
  941. snd_emu10k1x_ptr_write(emu, SPDIF_SELECT, 0, 0x700);
  942. snd_emu10k1x_ptr_write(emu, ROUTING, 0, 0x1003F);
  943. snd_emu10k1x_gpio_write(emu, 0x1080);
  944. }
  945. return change;
  946. }
  947. static snd_kcontrol_new_t snd_emu10k1x_shared_spdif __devinitdata =
  948. {
  949. .iface = SNDRV_CTL_ELEM_IFACE_MIXER,
  950. .name = "Analog/Digital Output Jack",
  951. .info = snd_emu10k1x_shared_spdif_info,
  952. .get = snd_emu10k1x_shared_spdif_get,
  953. .put = snd_emu10k1x_shared_spdif_put
  954. };
  955. static int snd_emu10k1x_spdif_info(snd_kcontrol_t *kcontrol, snd_ctl_elem_info_t * uinfo)
  956. {
  957. uinfo->type = SNDRV_CTL_ELEM_TYPE_IEC958;
  958. uinfo->count = 1;
  959. return 0;
  960. }
  961. static int snd_emu10k1x_spdif_get(snd_kcontrol_t * kcontrol,
  962. snd_ctl_elem_value_t * ucontrol)
  963. {
  964. emu10k1x_t *emu = snd_kcontrol_chip(kcontrol);
  965. unsigned int idx = snd_ctl_get_ioffidx(kcontrol, &ucontrol->id);
  966. ucontrol->value.iec958.status[0] = (emu->spdif_bits[idx] >> 0) & 0xff;
  967. ucontrol->value.iec958.status[1] = (emu->spdif_bits[idx] >> 8) & 0xff;
  968. ucontrol->value.iec958.status[2] = (emu->spdif_bits[idx] >> 16) & 0xff;
  969. ucontrol->value.iec958.status[3] = (emu->spdif_bits[idx] >> 24) & 0xff;
  970. return 0;
  971. }
  972. static int snd_emu10k1x_spdif_get_mask(snd_kcontrol_t * kcontrol,
  973. snd_ctl_elem_value_t * ucontrol)
  974. {
  975. ucontrol->value.iec958.status[0] = 0xff;
  976. ucontrol->value.iec958.status[1] = 0xff;
  977. ucontrol->value.iec958.status[2] = 0xff;
  978. ucontrol->value.iec958.status[3] = 0xff;
  979. return 0;
  980. }
  981. static int snd_emu10k1x_spdif_put(snd_kcontrol_t * kcontrol,
  982. snd_ctl_elem_value_t * ucontrol)
  983. {
  984. emu10k1x_t *emu = snd_kcontrol_chip(kcontrol);
  985. unsigned int idx = snd_ctl_get_ioffidx(kcontrol, &ucontrol->id);
  986. int change;
  987. unsigned int val;
  988. val = (ucontrol->value.iec958.status[0] << 0) |
  989. (ucontrol->value.iec958.status[1] << 8) |
  990. (ucontrol->value.iec958.status[2] << 16) |
  991. (ucontrol->value.iec958.status[3] << 24);
  992. change = val != emu->spdif_bits[idx];
  993. if (change) {
  994. snd_emu10k1x_ptr_write(emu, SPCS0 + idx, 0, val);
  995. emu->spdif_bits[idx] = val;
  996. }
  997. return change;
  998. }
  999. static snd_kcontrol_new_t snd_emu10k1x_spdif_mask_control =
  1000. {
  1001. .access = SNDRV_CTL_ELEM_ACCESS_READ,
  1002. .iface = SNDRV_CTL_ELEM_IFACE_MIXER,
  1003. .name = SNDRV_CTL_NAME_IEC958("",PLAYBACK,MASK),
  1004. .count = 3,
  1005. .info = snd_emu10k1x_spdif_info,
  1006. .get = snd_emu10k1x_spdif_get_mask
  1007. };
  1008. static snd_kcontrol_new_t snd_emu10k1x_spdif_control =
  1009. {
  1010. .iface = SNDRV_CTL_ELEM_IFACE_MIXER,
  1011. .name = SNDRV_CTL_NAME_IEC958("",PLAYBACK,DEFAULT),
  1012. .count = 3,
  1013. .info = snd_emu10k1x_spdif_info,
  1014. .get = snd_emu10k1x_spdif_get,
  1015. .put = snd_emu10k1x_spdif_put
  1016. };
  1017. static int __devinit snd_emu10k1x_mixer(emu10k1x_t *emu)
  1018. {
  1019. int err;
  1020. snd_kcontrol_t *kctl;
  1021. snd_card_t *card = emu->card;
  1022. if ((kctl = snd_ctl_new1(&snd_emu10k1x_spdif_mask_control, emu)) == NULL)
  1023. return -ENOMEM;
  1024. if ((err = snd_ctl_add(card, kctl)))
  1025. return err;
  1026. if ((kctl = snd_ctl_new1(&snd_emu10k1x_shared_spdif, emu)) == NULL)
  1027. return -ENOMEM;
  1028. if ((err = snd_ctl_add(card, kctl)))
  1029. return err;
  1030. if ((kctl = snd_ctl_new1(&snd_emu10k1x_spdif_control, emu)) == NULL)
  1031. return -ENOMEM;
  1032. if ((err = snd_ctl_add(card, kctl)))
  1033. return err;
  1034. return 0;
  1035. }
  1036. #define EMU10K1X_MIDI_MODE_INPUT (1<<0)
  1037. #define EMU10K1X_MIDI_MODE_OUTPUT (1<<1)
  1038. static inline unsigned char mpu401_read(emu10k1x_t *emu, emu10k1x_midi_t *mpu, int idx)
  1039. {
  1040. return (unsigned char)snd_emu10k1x_ptr_read(emu, mpu->port + idx, 0);
  1041. }
  1042. static inline void mpu401_write(emu10k1x_t *emu, emu10k1x_midi_t *mpu, int data, int idx)
  1043. {
  1044. snd_emu10k1x_ptr_write(emu, mpu->port + idx, 0, data);
  1045. }
  1046. #define mpu401_write_data(emu, mpu, data) mpu401_write(emu, mpu, data, 0)
  1047. #define mpu401_write_cmd(emu, mpu, data) mpu401_write(emu, mpu, data, 1)
  1048. #define mpu401_read_data(emu, mpu) mpu401_read(emu, mpu, 0)
  1049. #define mpu401_read_stat(emu, mpu) mpu401_read(emu, mpu, 1)
  1050. #define mpu401_input_avail(emu,mpu) (!(mpu401_read_stat(emu,mpu) & 0x80))
  1051. #define mpu401_output_ready(emu,mpu) (!(mpu401_read_stat(emu,mpu) & 0x40))
  1052. #define MPU401_RESET 0xff
  1053. #define MPU401_ENTER_UART 0x3f
  1054. #define MPU401_ACK 0xfe
  1055. static void mpu401_clear_rx(emu10k1x_t *emu, emu10k1x_midi_t *mpu)
  1056. {
  1057. int timeout = 100000;
  1058. for (; timeout > 0 && mpu401_input_avail(emu, mpu); timeout--)
  1059. mpu401_read_data(emu, mpu);
  1060. #ifdef CONFIG_SND_DEBUG
  1061. if (timeout <= 0)
  1062. snd_printk(KERN_ERR "cmd: clear rx timeout (status = 0x%x)\n", mpu401_read_stat(emu, mpu));
  1063. #endif
  1064. }
  1065. /*
  1066. */
  1067. static void do_emu10k1x_midi_interrupt(emu10k1x_t *emu, emu10k1x_midi_t *midi, unsigned int status)
  1068. {
  1069. unsigned char byte;
  1070. if (midi->rmidi == NULL) {
  1071. snd_emu10k1x_intr_disable(emu, midi->tx_enable | midi->rx_enable);
  1072. return;
  1073. }
  1074. spin_lock(&midi->input_lock);
  1075. if ((status & midi->ipr_rx) && mpu401_input_avail(emu, midi)) {
  1076. if (!(midi->midi_mode & EMU10K1X_MIDI_MODE_INPUT)) {
  1077. mpu401_clear_rx(emu, midi);
  1078. } else {
  1079. byte = mpu401_read_data(emu, midi);
  1080. if (midi->substream_input)
  1081. snd_rawmidi_receive(midi->substream_input, &byte, 1);
  1082. }
  1083. }
  1084. spin_unlock(&midi->input_lock);
  1085. spin_lock(&midi->output_lock);
  1086. if ((status & midi->ipr_tx) && mpu401_output_ready(emu, midi)) {
  1087. if (midi->substream_output &&
  1088. snd_rawmidi_transmit(midi->substream_output, &byte, 1) == 1) {
  1089. mpu401_write_data(emu, midi, byte);
  1090. } else {
  1091. snd_emu10k1x_intr_disable(emu, midi->tx_enable);
  1092. }
  1093. }
  1094. spin_unlock(&midi->output_lock);
  1095. }
  1096. static void snd_emu10k1x_midi_interrupt(emu10k1x_t *emu, unsigned int status)
  1097. {
  1098. do_emu10k1x_midi_interrupt(emu, &emu->midi, status);
  1099. }
  1100. static void snd_emu10k1x_midi_cmd(emu10k1x_t * emu, emu10k1x_midi_t *midi, unsigned char cmd, int ack)
  1101. {
  1102. unsigned long flags;
  1103. int timeout, ok;
  1104. spin_lock_irqsave(&midi->input_lock, flags);
  1105. mpu401_write_data(emu, midi, 0x00);
  1106. /* mpu401_clear_rx(emu, midi); */
  1107. mpu401_write_cmd(emu, midi, cmd);
  1108. if (ack) {
  1109. ok = 0;
  1110. timeout = 10000;
  1111. while (!ok && timeout-- > 0) {
  1112. if (mpu401_input_avail(emu, midi)) {
  1113. if (mpu401_read_data(emu, midi) == MPU401_ACK)
  1114. ok = 1;
  1115. }
  1116. }
  1117. if (!ok && mpu401_read_data(emu, midi) == MPU401_ACK)
  1118. ok = 1;
  1119. } else {
  1120. ok = 1;
  1121. }
  1122. spin_unlock_irqrestore(&midi->input_lock, flags);
  1123. if (!ok)
  1124. snd_printk(KERN_ERR "midi_cmd: 0x%x failed at 0x%lx (status = 0x%x, data = 0x%x)!!!\n",
  1125. cmd, emu->port,
  1126. mpu401_read_stat(emu, midi),
  1127. mpu401_read_data(emu, midi));
  1128. }
  1129. static int snd_emu10k1x_midi_input_open(snd_rawmidi_substream_t * substream)
  1130. {
  1131. emu10k1x_t *emu;
  1132. emu10k1x_midi_t *midi = (emu10k1x_midi_t *)substream->rmidi->private_data;
  1133. unsigned long flags;
  1134. emu = midi->emu;
  1135. snd_assert(emu, return -ENXIO);
  1136. spin_lock_irqsave(&midi->open_lock, flags);
  1137. midi->midi_mode |= EMU10K1X_MIDI_MODE_INPUT;
  1138. midi->substream_input = substream;
  1139. if (!(midi->midi_mode & EMU10K1X_MIDI_MODE_OUTPUT)) {
  1140. spin_unlock_irqrestore(&midi->open_lock, flags);
  1141. snd_emu10k1x_midi_cmd(emu, midi, MPU401_RESET, 1);
  1142. snd_emu10k1x_midi_cmd(emu, midi, MPU401_ENTER_UART, 1);
  1143. } else {
  1144. spin_unlock_irqrestore(&midi->open_lock, flags);
  1145. }
  1146. return 0;
  1147. }
  1148. static int snd_emu10k1x_midi_output_open(snd_rawmidi_substream_t * substream)
  1149. {
  1150. emu10k1x_t *emu;
  1151. emu10k1x_midi_t *midi = (emu10k1x_midi_t *)substream->rmidi->private_data;
  1152. unsigned long flags;
  1153. emu = midi->emu;
  1154. snd_assert(emu, return -ENXIO);
  1155. spin_lock_irqsave(&midi->open_lock, flags);
  1156. midi->midi_mode |= EMU10K1X_MIDI_MODE_OUTPUT;
  1157. midi->substream_output = substream;
  1158. if (!(midi->midi_mode & EMU10K1X_MIDI_MODE_INPUT)) {
  1159. spin_unlock_irqrestore(&midi->open_lock, flags);
  1160. snd_emu10k1x_midi_cmd(emu, midi, MPU401_RESET, 1);
  1161. snd_emu10k1x_midi_cmd(emu, midi, MPU401_ENTER_UART, 1);
  1162. } else {
  1163. spin_unlock_irqrestore(&midi->open_lock, flags);
  1164. }
  1165. return 0;
  1166. }
  1167. static int snd_emu10k1x_midi_input_close(snd_rawmidi_substream_t * substream)
  1168. {
  1169. emu10k1x_t *emu;
  1170. emu10k1x_midi_t *midi = (emu10k1x_midi_t *)substream->rmidi->private_data;
  1171. unsigned long flags;
  1172. emu = midi->emu;
  1173. snd_assert(emu, return -ENXIO);
  1174. spin_lock_irqsave(&midi->open_lock, flags);
  1175. snd_emu10k1x_intr_disable(emu, midi->rx_enable);
  1176. midi->midi_mode &= ~EMU10K1X_MIDI_MODE_INPUT;
  1177. midi->substream_input = NULL;
  1178. if (!(midi->midi_mode & EMU10K1X_MIDI_MODE_OUTPUT)) {
  1179. spin_unlock_irqrestore(&midi->open_lock, flags);
  1180. snd_emu10k1x_midi_cmd(emu, midi, MPU401_RESET, 0);
  1181. } else {
  1182. spin_unlock_irqrestore(&midi->open_lock, flags);
  1183. }
  1184. return 0;
  1185. }
  1186. static int snd_emu10k1x_midi_output_close(snd_rawmidi_substream_t * substream)
  1187. {
  1188. emu10k1x_t *emu;
  1189. emu10k1x_midi_t *midi = (emu10k1x_midi_t *)substream->rmidi->private_data;
  1190. unsigned long flags;
  1191. emu = midi->emu;
  1192. snd_assert(emu, return -ENXIO);
  1193. spin_lock_irqsave(&midi->open_lock, flags);
  1194. snd_emu10k1x_intr_disable(emu, midi->tx_enable);
  1195. midi->midi_mode &= ~EMU10K1X_MIDI_MODE_OUTPUT;
  1196. midi->substream_output = NULL;
  1197. if (!(midi->midi_mode & EMU10K1X_MIDI_MODE_INPUT)) {
  1198. spin_unlock_irqrestore(&midi->open_lock, flags);
  1199. snd_emu10k1x_midi_cmd(emu, midi, MPU401_RESET, 0);
  1200. } else {
  1201. spin_unlock_irqrestore(&midi->open_lock, flags);
  1202. }
  1203. return 0;
  1204. }
  1205. static void snd_emu10k1x_midi_input_trigger(snd_rawmidi_substream_t * substream, int up)
  1206. {
  1207. emu10k1x_t *emu;
  1208. emu10k1x_midi_t *midi = (emu10k1x_midi_t *)substream->rmidi->private_data;
  1209. emu = midi->emu;
  1210. snd_assert(emu, return);
  1211. if (up)
  1212. snd_emu10k1x_intr_enable(emu, midi->rx_enable);
  1213. else
  1214. snd_emu10k1x_intr_disable(emu, midi->rx_enable);
  1215. }
  1216. static void snd_emu10k1x_midi_output_trigger(snd_rawmidi_substream_t * substream, int up)
  1217. {
  1218. emu10k1x_t *emu;
  1219. emu10k1x_midi_t *midi = (emu10k1x_midi_t *)substream->rmidi->private_data;
  1220. unsigned long flags;
  1221. emu = midi->emu;
  1222. snd_assert(emu, return);
  1223. if (up) {
  1224. int max = 4;
  1225. unsigned char byte;
  1226. /* try to send some amount of bytes here before interrupts */
  1227. spin_lock_irqsave(&midi->output_lock, flags);
  1228. while (max > 0) {
  1229. if (mpu401_output_ready(emu, midi)) {
  1230. if (!(midi->midi_mode & EMU10K1X_MIDI_MODE_OUTPUT) ||
  1231. snd_rawmidi_transmit(substream, &byte, 1) != 1) {
  1232. /* no more data */
  1233. spin_unlock_irqrestore(&midi->output_lock, flags);
  1234. return;
  1235. }
  1236. mpu401_write_data(emu, midi, byte);
  1237. max--;
  1238. } else {
  1239. break;
  1240. }
  1241. }
  1242. spin_unlock_irqrestore(&midi->output_lock, flags);
  1243. snd_emu10k1x_intr_enable(emu, midi->tx_enable);
  1244. } else {
  1245. snd_emu10k1x_intr_disable(emu, midi->tx_enable);
  1246. }
  1247. }
  1248. /*
  1249. */
  1250. static snd_rawmidi_ops_t snd_emu10k1x_midi_output =
  1251. {
  1252. .open = snd_emu10k1x_midi_output_open,
  1253. .close = snd_emu10k1x_midi_output_close,
  1254. .trigger = snd_emu10k1x_midi_output_trigger,
  1255. };
  1256. static snd_rawmidi_ops_t snd_emu10k1x_midi_input =
  1257. {
  1258. .open = snd_emu10k1x_midi_input_open,
  1259. .close = snd_emu10k1x_midi_input_close,
  1260. .trigger = snd_emu10k1x_midi_input_trigger,
  1261. };
  1262. static void snd_emu10k1x_midi_free(snd_rawmidi_t *rmidi)
  1263. {
  1264. emu10k1x_midi_t *midi = (emu10k1x_midi_t *)rmidi->private_data;
  1265. midi->interrupt = NULL;
  1266. midi->rmidi = NULL;
  1267. }
  1268. static int __devinit emu10k1x_midi_init(emu10k1x_t *emu, emu10k1x_midi_t *midi, int device, char *name)
  1269. {
  1270. snd_rawmidi_t *rmidi;
  1271. int err;
  1272. if ((err = snd_rawmidi_new(emu->card, name, device, 1, 1, &rmidi)) < 0)
  1273. return err;
  1274. midi->emu = emu;
  1275. spin_lock_init(&midi->open_lock);
  1276. spin_lock_init(&midi->input_lock);
  1277. spin_lock_init(&midi->output_lock);
  1278. strcpy(rmidi->name, name);
  1279. snd_rawmidi_set_ops(rmidi, SNDRV_RAWMIDI_STREAM_OUTPUT, &snd_emu10k1x_midi_output);
  1280. snd_rawmidi_set_ops(rmidi, SNDRV_RAWMIDI_STREAM_INPUT, &snd_emu10k1x_midi_input);
  1281. rmidi->info_flags |= SNDRV_RAWMIDI_INFO_OUTPUT |
  1282. SNDRV_RAWMIDI_INFO_INPUT |
  1283. SNDRV_RAWMIDI_INFO_DUPLEX;
  1284. rmidi->private_data = midi;
  1285. rmidi->private_free = snd_emu10k1x_midi_free;
  1286. midi->rmidi = rmidi;
  1287. return 0;
  1288. }
  1289. static int __devinit snd_emu10k1x_midi(emu10k1x_t *emu)
  1290. {
  1291. emu10k1x_midi_t *midi = &emu->midi;
  1292. int err;
  1293. if ((err = emu10k1x_midi_init(emu, midi, 0, "EMU10K1X MPU-401 (UART)")) < 0)
  1294. return err;
  1295. midi->tx_enable = INTE_MIDITXENABLE;
  1296. midi->rx_enable = INTE_MIDIRXENABLE;
  1297. midi->port = MUDATA;
  1298. midi->ipr_tx = IPR_MIDITRANSBUFEMPTY;
  1299. midi->ipr_rx = IPR_MIDIRECVBUFEMPTY;
  1300. midi->interrupt = snd_emu10k1x_midi_interrupt;
  1301. return 0;
  1302. }
  1303. static int __devinit snd_emu10k1x_probe(struct pci_dev *pci,
  1304. const struct pci_device_id *pci_id)
  1305. {
  1306. static int dev;
  1307. snd_card_t *card;
  1308. emu10k1x_t *chip;
  1309. int err;
  1310. if (dev >= SNDRV_CARDS)
  1311. return -ENODEV;
  1312. if (!enable[dev]) {
  1313. dev++;
  1314. return -ENOENT;
  1315. }
  1316. card = snd_card_new(index[dev], id[dev], THIS_MODULE, 0);
  1317. if (card == NULL)
  1318. return -ENOMEM;
  1319. if ((err = snd_emu10k1x_create(card, pci, &chip)) < 0) {
  1320. snd_card_free(card);
  1321. return err;
  1322. }
  1323. if ((err = snd_emu10k1x_pcm(chip, 0, NULL)) < 0) {
  1324. snd_card_free(card);
  1325. return err;
  1326. }
  1327. if ((err = snd_emu10k1x_pcm(chip, 1, NULL)) < 0) {
  1328. snd_card_free(card);
  1329. return err;
  1330. }
  1331. if ((err = snd_emu10k1x_pcm(chip, 2, NULL)) < 0) {
  1332. snd_card_free(card);
  1333. return err;
  1334. }
  1335. if ((err = snd_emu10k1x_ac97(chip)) < 0) {
  1336. snd_card_free(card);
  1337. return err;
  1338. }
  1339. if ((err = snd_emu10k1x_mixer(chip)) < 0) {
  1340. snd_card_free(card);
  1341. return err;
  1342. }
  1343. if ((err = snd_emu10k1x_midi(chip)) < 0) {
  1344. snd_card_free(card);
  1345. return err;
  1346. }
  1347. snd_emu10k1x_proc_init(chip);
  1348. strcpy(card->driver, "EMU10K1X");
  1349. strcpy(card->shortname, "Dell Sound Blaster Live!");
  1350. sprintf(card->longname, "%s at 0x%lx irq %i",
  1351. card->shortname, chip->port, chip->irq);
  1352. if ((err = snd_card_register(card)) < 0) {
  1353. snd_card_free(card);
  1354. return err;
  1355. }
  1356. pci_set_drvdata(pci, card);
  1357. dev++;
  1358. return 0;
  1359. }
  1360. static void __devexit snd_emu10k1x_remove(struct pci_dev *pci)
  1361. {
  1362. snd_card_free(pci_get_drvdata(pci));
  1363. pci_set_drvdata(pci, NULL);
  1364. }
  1365. // PCI IDs
  1366. static struct pci_device_id snd_emu10k1x_ids[] = {
  1367. { 0x1102, 0x0006, PCI_ANY_ID, PCI_ANY_ID, 0, 0, 0 }, /* Dell OEM version (EMU10K1) */
  1368. { 0, }
  1369. };
  1370. MODULE_DEVICE_TABLE(pci, snd_emu10k1x_ids);
  1371. // pci_driver definition
  1372. static struct pci_driver driver = {
  1373. .name = "EMU10K1X",
  1374. .id_table = snd_emu10k1x_ids,
  1375. .probe = snd_emu10k1x_probe,
  1376. .remove = __devexit_p(snd_emu10k1x_remove),
  1377. };
  1378. // initialization of the module
  1379. static int __init alsa_card_emu10k1x_init(void)
  1380. {
  1381. int err;
  1382. if ((err = pci_module_init(&driver)) > 0)
  1383. return err;
  1384. return 0;
  1385. }
  1386. // clean up the module
  1387. static void __exit alsa_card_emu10k1x_exit(void)
  1388. {
  1389. pci_unregister_driver(&driver);
  1390. }
  1391. module_init(alsa_card_emu10k1x_init)
  1392. module_exit(alsa_card_emu10k1x_exit)