sfe4001.c 8.6 KB

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  1. /****************************************************************************
  2. * Driver for Solarflare Solarstorm network controllers and boards
  3. * Copyright 2007 Solarflare Communications Inc.
  4. *
  5. * This program is free software; you can redistribute it and/or modify it
  6. * under the terms of the GNU General Public License version 2 as published
  7. * by the Free Software Foundation, incorporated herein by reference.
  8. */
  9. /*****************************************************************************
  10. * Support for the SFE4001 NIC: driver code for the PCA9539 I/O expander that
  11. * controls the PHY power rails, and for the MAX6647 temp. sensor used to check
  12. * the PHY
  13. */
  14. #include <linux/delay.h>
  15. #include "net_driver.h"
  16. #include "efx.h"
  17. #include "phy.h"
  18. #include "boards.h"
  19. #include "falcon.h"
  20. #include "falcon_hwdefs.h"
  21. #include "falcon_io.h"
  22. #include "mac.h"
  23. #include "workarounds.h"
  24. /**************************************************************************
  25. *
  26. * I2C IO Expander device
  27. *
  28. **************************************************************************/
  29. #define PCA9539 0x74
  30. #define P0_IN 0x00
  31. #define P0_OUT 0x02
  32. #define P0_INVERT 0x04
  33. #define P0_CONFIG 0x06
  34. #define P0_EN_1V0X_LBN 0
  35. #define P0_EN_1V0X_WIDTH 1
  36. #define P0_EN_1V2_LBN 1
  37. #define P0_EN_1V2_WIDTH 1
  38. #define P0_EN_2V5_LBN 2
  39. #define P0_EN_2V5_WIDTH 1
  40. #define P0_EN_3V3X_LBN 3
  41. #define P0_EN_3V3X_WIDTH 1
  42. #define P0_EN_5V_LBN 4
  43. #define P0_EN_5V_WIDTH 1
  44. #define P0_SHORTEN_JTAG_LBN 5
  45. #define P0_SHORTEN_JTAG_WIDTH 1
  46. #define P0_X_TRST_LBN 6
  47. #define P0_X_TRST_WIDTH 1
  48. #define P0_DSP_RESET_LBN 7
  49. #define P0_DSP_RESET_WIDTH 1
  50. #define P1_IN 0x01
  51. #define P1_OUT 0x03
  52. #define P1_INVERT 0x05
  53. #define P1_CONFIG 0x07
  54. #define P1_AFE_PWD_LBN 0
  55. #define P1_AFE_PWD_WIDTH 1
  56. #define P1_DSP_PWD25_LBN 1
  57. #define P1_DSP_PWD25_WIDTH 1
  58. #define P1_RESERVED_LBN 2
  59. #define P1_RESERVED_WIDTH 2
  60. #define P1_SPARE_LBN 4
  61. #define P1_SPARE_WIDTH 4
  62. /* Temperature Sensor */
  63. #define MAX664X_REG_RSL 0x02
  64. #define MAX664X_REG_WLHO 0x0B
  65. static void sfe4001_poweroff(struct efx_nic *efx)
  66. {
  67. struct i2c_client *ioexp_client = efx->board_info.ioexp_client;
  68. struct i2c_client *hwmon_client = efx->board_info.hwmon_client;
  69. /* Turn off all power rails and disable outputs */
  70. i2c_smbus_write_byte_data(ioexp_client, P0_OUT, 0xff);
  71. i2c_smbus_write_byte_data(ioexp_client, P1_CONFIG, 0xff);
  72. i2c_smbus_write_byte_data(ioexp_client, P0_CONFIG, 0xff);
  73. /* Clear any over-temperature alert */
  74. i2c_smbus_read_byte_data(hwmon_client, MAX664X_REG_RSL);
  75. }
  76. static int sfe4001_poweron(struct efx_nic *efx)
  77. {
  78. struct i2c_client *hwmon_client = efx->board_info.hwmon_client;
  79. struct i2c_client *ioexp_client = efx->board_info.ioexp_client;
  80. unsigned int i, j;
  81. int rc;
  82. u8 out;
  83. /* Clear any previous over-temperature alert */
  84. rc = i2c_smbus_read_byte_data(hwmon_client, MAX664X_REG_RSL);
  85. if (rc < 0)
  86. return rc;
  87. /* Enable port 0 and port 1 outputs on IO expander */
  88. rc = i2c_smbus_write_byte_data(ioexp_client, P0_CONFIG, 0x00);
  89. if (rc)
  90. return rc;
  91. rc = i2c_smbus_write_byte_data(ioexp_client, P1_CONFIG,
  92. 0xff & ~(1 << P1_SPARE_LBN));
  93. if (rc)
  94. goto fail_on;
  95. /* If PHY power is on, turn it all off and wait 1 second to
  96. * ensure a full reset.
  97. */
  98. rc = i2c_smbus_read_byte_data(ioexp_client, P0_OUT);
  99. if (rc < 0)
  100. goto fail_on;
  101. out = 0xff & ~((0 << P0_EN_1V2_LBN) | (0 << P0_EN_2V5_LBN) |
  102. (0 << P0_EN_3V3X_LBN) | (0 << P0_EN_5V_LBN) |
  103. (0 << P0_EN_1V0X_LBN));
  104. if (rc != out) {
  105. EFX_INFO(efx, "power-cycling PHY\n");
  106. rc = i2c_smbus_write_byte_data(ioexp_client, P0_OUT, out);
  107. if (rc)
  108. goto fail_on;
  109. schedule_timeout_uninterruptible(HZ);
  110. }
  111. for (i = 0; i < 20; ++i) {
  112. /* Turn on 1.2V, 2.5V, 3.3V and 5V power rails */
  113. out = 0xff & ~((1 << P0_EN_1V2_LBN) | (1 << P0_EN_2V5_LBN) |
  114. (1 << P0_EN_3V3X_LBN) | (1 << P0_EN_5V_LBN) |
  115. (1 << P0_X_TRST_LBN));
  116. if (efx->phy_mode & PHY_MODE_SPECIAL)
  117. out |= 1 << P0_EN_3V3X_LBN;
  118. rc = i2c_smbus_write_byte_data(ioexp_client, P0_OUT, out);
  119. if (rc)
  120. goto fail_on;
  121. msleep(10);
  122. /* Turn on 1V power rail */
  123. out &= ~(1 << P0_EN_1V0X_LBN);
  124. rc = i2c_smbus_write_byte_data(ioexp_client, P0_OUT, out);
  125. if (rc)
  126. goto fail_on;
  127. EFX_INFO(efx, "waiting for DSP boot (attempt %d)...\n", i);
  128. /* In flash config mode, DSP does not turn on AFE, so
  129. * just wait 1 second.
  130. */
  131. if (efx->phy_mode & PHY_MODE_SPECIAL) {
  132. schedule_timeout_uninterruptible(HZ);
  133. return 0;
  134. }
  135. for (j = 0; j < 10; ++j) {
  136. msleep(100);
  137. /* Check DSP has asserted AFE power line */
  138. rc = i2c_smbus_read_byte_data(ioexp_client, P1_IN);
  139. if (rc < 0)
  140. goto fail_on;
  141. if (rc & (1 << P1_AFE_PWD_LBN))
  142. return 0;
  143. }
  144. }
  145. EFX_INFO(efx, "timed out waiting for DSP boot\n");
  146. rc = -ETIMEDOUT;
  147. fail_on:
  148. sfe4001_poweroff(efx);
  149. return rc;
  150. }
  151. static int sfe4001_check_hw(struct efx_nic *efx)
  152. {
  153. s32 status;
  154. /* If XAUI link is up then do not monitor */
  155. if (EFX_WORKAROUND_7884(efx) && falcon_xaui_link_ok(efx))
  156. return 0;
  157. /* Check the powered status of the PHY. Lack of power implies that
  158. * the MAX6647 has shut down power to it, probably due to a temp.
  159. * alarm. Reading the power status rather than the MAX6647 status
  160. * directly because the later is read-to-clear and would thus
  161. * start to power up the PHY again when polled, causing us to blip
  162. * the power undesirably.
  163. * We know we can read from the IO expander because we did
  164. * it during power-on. Assume failure now is bad news. */
  165. status = i2c_smbus_read_byte_data(efx->board_info.ioexp_client, P1_IN);
  166. if (status >= 0 &&
  167. (status & ((1 << P1_AFE_PWD_LBN) | (1 << P1_DSP_PWD25_LBN))) != 0)
  168. return 0;
  169. /* Use board power control, not PHY power control */
  170. sfe4001_poweroff(efx);
  171. efx->phy_mode = PHY_MODE_OFF;
  172. return (status < 0) ? -EIO : -ERANGE;
  173. }
  174. /* On SFE4001 rev A2 and later, we can control the FLASH_CFG_1 pin
  175. * using the 3V3X output of the IO-expander. Allow the user to set
  176. * this when the device is stopped, and keep it stopped then.
  177. */
  178. static ssize_t show_phy_flash_cfg(struct device *dev,
  179. struct device_attribute *attr, char *buf)
  180. {
  181. struct efx_nic *efx = pci_get_drvdata(to_pci_dev(dev));
  182. return sprintf(buf, "%d\n", !!(efx->phy_mode & PHY_MODE_SPECIAL));
  183. }
  184. static ssize_t set_phy_flash_cfg(struct device *dev,
  185. struct device_attribute *attr,
  186. const char *buf, size_t count)
  187. {
  188. struct efx_nic *efx = pci_get_drvdata(to_pci_dev(dev));
  189. enum efx_phy_mode old_mode, new_mode;
  190. int err;
  191. rtnl_lock();
  192. old_mode = efx->phy_mode;
  193. if (count == 0 || *buf == '0')
  194. new_mode = old_mode & ~PHY_MODE_SPECIAL;
  195. else
  196. new_mode = PHY_MODE_SPECIAL;
  197. if (old_mode == new_mode) {
  198. err = 0;
  199. } else if (efx->state != STATE_RUNNING || netif_running(efx->net_dev)) {
  200. err = -EBUSY;
  201. } else {
  202. efx->phy_mode = new_mode;
  203. err = sfe4001_poweron(efx);
  204. efx_reconfigure_port(efx);
  205. }
  206. rtnl_unlock();
  207. return err ? err : count;
  208. }
  209. static DEVICE_ATTR(phy_flash_cfg, 0644, show_phy_flash_cfg, set_phy_flash_cfg);
  210. static void sfe4001_fini(struct efx_nic *efx)
  211. {
  212. EFX_INFO(efx, "%s\n", __func__);
  213. device_remove_file(&efx->pci_dev->dev, &dev_attr_phy_flash_cfg);
  214. sfe4001_poweroff(efx);
  215. i2c_unregister_device(efx->board_info.ioexp_client);
  216. i2c_unregister_device(efx->board_info.hwmon_client);
  217. }
  218. static struct i2c_board_info sfe4001_hwmon_info = {
  219. I2C_BOARD_INFO("max6647", 0x4e),
  220. .irq = -1,
  221. };
  222. /* This board uses an I2C expander to provider power to the PHY, which needs to
  223. * be turned on before the PHY can be used.
  224. * Context: Process context, rtnl lock held
  225. */
  226. int sfe4001_init(struct efx_nic *efx)
  227. {
  228. int rc;
  229. #if defined(CONFIG_SENSORS_LM90) || defined(CONFIG_SENSORS_LM90_MODULE)
  230. efx->board_info.hwmon_client =
  231. i2c_new_device(&efx->i2c_adap, &sfe4001_hwmon_info);
  232. #else
  233. efx->board_info.hwmon_client =
  234. i2c_new_dummy(&efx->i2c_adap, sfe4001_hwmon_info.addr);
  235. #endif
  236. if (!efx->board_info.hwmon_client)
  237. return -EIO;
  238. /* Raise board/PHY high limit from 85 to 90 degrees Celsius */
  239. rc = i2c_smbus_write_byte_data(efx->board_info.hwmon_client,
  240. MAX664X_REG_WLHO, 90);
  241. if (rc)
  242. goto fail_hwmon;
  243. efx->board_info.ioexp_client = i2c_new_dummy(&efx->i2c_adap, PCA9539);
  244. if (!efx->board_info.ioexp_client) {
  245. rc = -EIO;
  246. goto fail_hwmon;
  247. }
  248. /* 10Xpress has fixed-function LED pins, so there is no board-specific
  249. * blink code. */
  250. efx->board_info.blink = tenxpress_phy_blink;
  251. efx->board_info.monitor = sfe4001_check_hw;
  252. efx->board_info.fini = sfe4001_fini;
  253. rc = sfe4001_poweron(efx);
  254. if (rc)
  255. goto fail_ioexp;
  256. rc = device_create_file(&efx->pci_dev->dev, &dev_attr_phy_flash_cfg);
  257. if (rc)
  258. goto fail_on;
  259. EFX_INFO(efx, "PHY is powered on\n");
  260. return 0;
  261. fail_on:
  262. sfe4001_poweroff(efx);
  263. fail_ioexp:
  264. i2c_unregister_device(efx->board_info.ioexp_client);
  265. fail_hwmon:
  266. i2c_unregister_device(efx->board_info.hwmon_client);
  267. return rc;
  268. }