bf5xx-ac97.c 11 KB

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  1. /*
  2. * bf5xx-ac97.c -- AC97 support for the ADI blackfin chip.
  3. *
  4. * Author: Roy Huang
  5. * Created: 11th. June 2007
  6. * Copyright: Analog Device Inc.
  7. *
  8. * This program is free software; you can redistribute it and/or modify
  9. * it under the terms of the GNU General Public License version 2 as
  10. * published by the Free Software Foundation.
  11. */
  12. #include <linux/init.h>
  13. #include <linux/module.h>
  14. #include <linux/platform_device.h>
  15. #include <linux/interrupt.h>
  16. #include <linux/wait.h>
  17. #include <linux/delay.h>
  18. #include <sound/core.h>
  19. #include <sound/pcm.h>
  20. #include <sound/ac97_codec.h>
  21. #include <sound/initval.h>
  22. #include <sound/soc.h>
  23. #include <asm/irq.h>
  24. #include <asm/portmux.h>
  25. #include <linux/mutex.h>
  26. #include <linux/gpio.h>
  27. #include "bf5xx-sport.h"
  28. #include "bf5xx-ac97.h"
  29. #if defined(CONFIG_BF54x)
  30. #define PIN_REQ_SPORT_0 {P_SPORT0_TFS, P_SPORT0_DTPRI, P_SPORT0_TSCLK, \
  31. P_SPORT0_RFS, P_SPORT0_DRPRI, P_SPORT0_RSCLK, 0}
  32. #define PIN_REQ_SPORT_1 {P_SPORT1_TFS, P_SPORT1_DTPRI, P_SPORT1_TSCLK, \
  33. P_SPORT1_RFS, P_SPORT1_DRPRI, P_SPORT1_RSCLK, 0}
  34. #define PIN_REQ_SPORT_2 {P_SPORT2_TFS, P_SPORT2_DTPRI, P_SPORT2_TSCLK, \
  35. P_SPORT2_RFS, P_SPORT2_DRPRI, P_SPORT2_RSCLK, 0}
  36. #define PIN_REQ_SPORT_3 {P_SPORT3_TFS, P_SPORT3_DTPRI, P_SPORT3_TSCLK, \
  37. P_SPORT3_RFS, P_SPORT3_DRPRI, P_SPORT3_RSCLK, 0}
  38. #else
  39. #define PIN_REQ_SPORT_0 {P_SPORT0_DTPRI, P_SPORT0_TSCLK, P_SPORT0_RFS, \
  40. P_SPORT0_DRPRI, P_SPORT0_RSCLK, 0}
  41. #define PIN_REQ_SPORT_1 {P_SPORT1_DTPRI, P_SPORT1_TSCLK, P_SPORT1_RFS, \
  42. P_SPORT1_DRPRI, P_SPORT1_RSCLK, 0}
  43. #endif
  44. static int *cmd_count;
  45. static int sport_num = CONFIG_SND_BF5XX_SPORT_NUM;
  46. #if defined(CONFIG_BF54x)
  47. static struct sport_param sport_params[4] = {
  48. {
  49. .dma_rx_chan = CH_SPORT0_RX,
  50. .dma_tx_chan = CH_SPORT0_TX,
  51. .err_irq = IRQ_SPORT0_ERR,
  52. .regs = (struct sport_register *)SPORT0_TCR1,
  53. },
  54. {
  55. .dma_rx_chan = CH_SPORT1_RX,
  56. .dma_tx_chan = CH_SPORT1_TX,
  57. .err_irq = IRQ_SPORT1_ERR,
  58. .regs = (struct sport_register *)SPORT1_TCR1,
  59. },
  60. {
  61. .dma_rx_chan = CH_SPORT2_RX,
  62. .dma_tx_chan = CH_SPORT2_TX,
  63. .err_irq = IRQ_SPORT2_ERR,
  64. .regs = (struct sport_register *)SPORT2_TCR1,
  65. },
  66. {
  67. .dma_rx_chan = CH_SPORT3_RX,
  68. .dma_tx_chan = CH_SPORT3_TX,
  69. .err_irq = IRQ_SPORT3_ERR,
  70. .regs = (struct sport_register *)SPORT3_TCR1,
  71. }
  72. };
  73. #else
  74. static struct sport_param sport_params[2] = {
  75. {
  76. .dma_rx_chan = CH_SPORT0_RX,
  77. .dma_tx_chan = CH_SPORT0_TX,
  78. .err_irq = IRQ_SPORT0_ERROR,
  79. .regs = (struct sport_register *)SPORT0_TCR1,
  80. },
  81. {
  82. .dma_rx_chan = CH_SPORT1_RX,
  83. .dma_tx_chan = CH_SPORT1_TX,
  84. .err_irq = IRQ_SPORT1_ERROR,
  85. .regs = (struct sport_register *)SPORT1_TCR1,
  86. }
  87. };
  88. #endif
  89. void bf5xx_pcm_to_ac97(struct ac97_frame *dst, const __u32 *src, \
  90. size_t count)
  91. {
  92. while (count--) {
  93. dst->ac97_tag = TAG_VALID | TAG_PCM;
  94. (dst++)->ac97_pcm = *src++;
  95. }
  96. }
  97. EXPORT_SYMBOL(bf5xx_pcm_to_ac97);
  98. void bf5xx_ac97_to_pcm(const struct ac97_frame *src, __u32 *dst, \
  99. size_t count)
  100. {
  101. while (count--)
  102. *(dst++) = (src++)->ac97_pcm;
  103. }
  104. EXPORT_SYMBOL(bf5xx_ac97_to_pcm);
  105. static unsigned int sport_tx_curr_frag(struct sport_device *sport)
  106. {
  107. return sport->tx_curr_frag = sport_curr_offset_tx(sport) / \
  108. sport->tx_fragsize;
  109. }
  110. static void enqueue_cmd(struct snd_ac97 *ac97, __u16 addr, __u16 data)
  111. {
  112. struct sport_device *sport = sport_handle;
  113. int nextfrag = sport_tx_curr_frag(sport);
  114. struct ac97_frame *nextwrite;
  115. sport_incfrag(sport, &nextfrag, 1);
  116. nextwrite = (struct ac97_frame *)(sport->tx_buf + \
  117. nextfrag * sport->tx_fragsize);
  118. pr_debug("sport->tx_buf:%p, nextfrag:0x%x nextwrite:%p, cmd_count:%d\n",
  119. sport->tx_buf, nextfrag, nextwrite, cmd_count[nextfrag]);
  120. nextwrite[cmd_count[nextfrag]].ac97_tag |= TAG_CMD;
  121. nextwrite[cmd_count[nextfrag]].ac97_addr = addr;
  122. nextwrite[cmd_count[nextfrag]].ac97_data = data;
  123. ++cmd_count[nextfrag];
  124. pr_debug("ac97_sport: Inserting %02x/%04x into fragment %d\n",
  125. addr >> 8, data, nextfrag);
  126. }
  127. static unsigned short bf5xx_ac97_read(struct snd_ac97 *ac97,
  128. unsigned short reg)
  129. {
  130. struct ac97_frame out_frame[2], in_frame[2];
  131. pr_debug("%s enter 0x%x\n", __func__, reg);
  132. /* When dma descriptor is enabled, the register should not be read */
  133. if (sport_handle->tx_run || sport_handle->rx_run) {
  134. pr_err("Could you send a mail to cliff.cai@analog.com "
  135. "to report this?\n");
  136. return -EFAULT;
  137. }
  138. memset(&out_frame, 0, 2 * sizeof(struct ac97_frame));
  139. memset(&in_frame, 0, 2 * sizeof(struct ac97_frame));
  140. out_frame[0].ac97_tag = TAG_VALID | TAG_CMD;
  141. out_frame[0].ac97_addr = ((reg << 8) | 0x8000);
  142. sport_send_and_recv(sport_handle, (unsigned char *)&out_frame,
  143. (unsigned char *)&in_frame,
  144. 2 * sizeof(struct ac97_frame));
  145. return in_frame[1].ac97_data;
  146. }
  147. void bf5xx_ac97_write(struct snd_ac97 *ac97, unsigned short reg,
  148. unsigned short val)
  149. {
  150. pr_debug("%s enter 0x%x:0x%04x\n", __func__, reg, val);
  151. if (sport_handle->tx_run) {
  152. enqueue_cmd(ac97, (reg << 8), val); /* write */
  153. enqueue_cmd(ac97, (reg << 8) | 0x8000, 0); /* read back */
  154. } else {
  155. struct ac97_frame frame;
  156. memset(&frame, 0, sizeof(struct ac97_frame));
  157. frame.ac97_tag = TAG_VALID | TAG_CMD;
  158. frame.ac97_addr = (reg << 8);
  159. frame.ac97_data = val;
  160. sport_send_and_recv(sport_handle, (unsigned char *)&frame, \
  161. NULL, sizeof(struct ac97_frame));
  162. }
  163. }
  164. static void bf5xx_ac97_warm_reset(struct snd_ac97 *ac97)
  165. {
  166. #if defined(CONFIG_BF54x) || defined(CONFIG_BF561) || \
  167. (defined(BF537_FAMILY) && (CONFIG_SND_BF5XX_SPORT_NUM == 1))
  168. #define CONCAT(a, b, c) a ## b ## c
  169. #define BFIN_SPORT_RFS(x) CONCAT(P_SPORT, x, _RFS)
  170. u16 per = BFIN_SPORT_RFS(CONFIG_SND_BF5XX_SPORT_NUM);
  171. u16 gpio = P_IDENT(BFIN_SPORT_RFS(CONFIG_SND_BF5XX_SPORT_NUM));
  172. pr_debug("%s enter\n", __func__);
  173. peripheral_free(per);
  174. gpio_request(gpio, "bf5xx-ac97");
  175. gpio_direction_output(gpio, 1);
  176. udelay(2);
  177. gpio_set_value(gpio, 0);
  178. udelay(1);
  179. gpio_free(gpio);
  180. peripheral_request(per, "soc-audio");
  181. #else
  182. pr_info("%s: Not implemented\n", __func__);
  183. #endif
  184. }
  185. static void bf5xx_ac97_cold_reset(struct snd_ac97 *ac97)
  186. {
  187. #ifdef CONFIG_SND_BF5XX_HAVE_COLD_RESET
  188. pr_debug("%s enter\n", __func__);
  189. /* It is specified for bf548-ezkit */
  190. gpio_set_value(CONFIG_SND_BF5XX_RESET_GPIO_NUM, 0);
  191. /* Keep reset pin low for 1 ms */
  192. mdelay(1);
  193. gpio_set_value(CONFIG_SND_BF5XX_RESET_GPIO_NUM, 1);
  194. /* Wait for bit clock recover */
  195. mdelay(1);
  196. #else
  197. pr_info("%s: Not implemented\n", __func__);
  198. #endif
  199. }
  200. struct snd_ac97_bus_ops soc_ac97_ops = {
  201. .read = bf5xx_ac97_read,
  202. .write = bf5xx_ac97_write,
  203. .warm_reset = bf5xx_ac97_warm_reset,
  204. .reset = bf5xx_ac97_cold_reset,
  205. };
  206. EXPORT_SYMBOL_GPL(soc_ac97_ops);
  207. #ifdef CONFIG_PM
  208. static int bf5xx_ac97_suspend(struct platform_device *pdev,
  209. struct snd_soc_dai *dai)
  210. {
  211. struct sport_device *sport =
  212. (struct sport_device *)dai->private_data;
  213. pr_debug("%s : sport %d\n", __func__, dai->id);
  214. if (!dai->active)
  215. return 0;
  216. if (dai->capture.active)
  217. sport_rx_stop(sport);
  218. if (dai->playback.active)
  219. sport_tx_stop(sport);
  220. return 0;
  221. }
  222. static int bf5xx_ac97_resume(struct platform_device *pdev,
  223. struct snd_soc_dai *dai)
  224. {
  225. int ret;
  226. struct sport_device *sport =
  227. (struct sport_device *)dai->private_data;
  228. pr_debug("%s : sport %d\n", __func__, dai->id);
  229. if (!dai->active)
  230. return 0;
  231. ret = sport_set_multichannel(sport_handle, 16, 0x1F, 1);
  232. if (ret) {
  233. pr_err("SPORT is busy!\n");
  234. return -EBUSY;
  235. }
  236. ret = sport_config_rx(sport_handle, IRFS, 0xF, 0, (16*16-1));
  237. if (ret) {
  238. pr_err("SPORT is busy!\n");
  239. return -EBUSY;
  240. }
  241. ret = sport_config_tx(sport_handle, ITFS, 0xF, 0, (16*16-1));
  242. if (ret) {
  243. pr_err("SPORT is busy!\n");
  244. return -EBUSY;
  245. }
  246. if (dai->capture.active)
  247. sport_rx_start(sport);
  248. if (dai->playback.active)
  249. sport_tx_start(sport);
  250. return 0;
  251. }
  252. #else
  253. #define bf5xx_ac97_suspend NULL
  254. #define bf5xx_ac97_resume NULL
  255. #endif
  256. static int bf5xx_ac97_probe(struct platform_device *pdev,
  257. struct snd_soc_dai *dai)
  258. {
  259. int ret;
  260. #if defined(CONFIG_BF54x)
  261. u16 sport_req[][7] = {PIN_REQ_SPORT_0, PIN_REQ_SPORT_1,
  262. PIN_REQ_SPORT_2, PIN_REQ_SPORT_3};
  263. #else
  264. u16 sport_req[][7] = {PIN_REQ_SPORT_0, PIN_REQ_SPORT_1};
  265. #endif
  266. cmd_count = (int *)get_zeroed_page(GFP_KERNEL);
  267. if (cmd_count == NULL)
  268. return -ENOMEM;
  269. if (peripheral_request_list(&sport_req[sport_num][0], "soc-audio")) {
  270. pr_err("Requesting Peripherals failed\n");
  271. return -EFAULT;
  272. }
  273. #ifdef CONFIG_SND_BF5XX_HAVE_COLD_RESET
  274. /* Request PB3 as reset pin */
  275. if (gpio_request(CONFIG_SND_BF5XX_RESET_GPIO_NUM, "SND_AD198x RESET")) {
  276. pr_err("Failed to request GPIO_%d for reset\n",
  277. CONFIG_SND_BF5XX_RESET_GPIO_NUM);
  278. peripheral_free_list(&sport_req[sport_num][0]);
  279. return -1;
  280. }
  281. gpio_direction_output(CONFIG_SND_BF5XX_RESET_GPIO_NUM, 1);
  282. #endif
  283. sport_handle = sport_init(&sport_params[sport_num], 2, \
  284. sizeof(struct ac97_frame), NULL);
  285. if (!sport_handle) {
  286. peripheral_free_list(&sport_req[sport_num][0]);
  287. #ifdef CONFIG_SND_BF5XX_HAVE_COLD_RESET
  288. gpio_free(CONFIG_SND_BF5XX_RESET_GPIO_NUM);
  289. #endif
  290. return -ENODEV;
  291. }
  292. /*SPORT works in TDM mode to simulate AC97 transfers*/
  293. ret = sport_set_multichannel(sport_handle, 16, 0x1F, 1);
  294. if (ret) {
  295. pr_err("SPORT is busy!\n");
  296. kfree(sport_handle);
  297. peripheral_free_list(&sport_req[sport_num][0]);
  298. #ifdef CONFIG_SND_BF5XX_HAVE_COLD_RESET
  299. gpio_free(CONFIG_SND_BF5XX_RESET_GPIO_NUM);
  300. #endif
  301. return -EBUSY;
  302. }
  303. ret = sport_config_rx(sport_handle, IRFS, 0xF, 0, (16*16-1));
  304. if (ret) {
  305. pr_err("SPORT is busy!\n");
  306. kfree(sport_handle);
  307. peripheral_free_list(&sport_req[sport_num][0]);
  308. #ifdef CONFIG_SND_BF5XX_HAVE_COLD_RESET
  309. gpio_free(CONFIG_SND_BF5XX_RESET_GPIO_NUM);
  310. #endif
  311. return -EBUSY;
  312. }
  313. ret = sport_config_tx(sport_handle, ITFS, 0xF, 0, (16*16-1));
  314. if (ret) {
  315. pr_err("SPORT is busy!\n");
  316. kfree(sport_handle);
  317. peripheral_free_list(&sport_req[sport_num][0]);
  318. #ifdef CONFIG_SND_BF5XX_HAVE_COLD_RESET
  319. gpio_free(CONFIG_SND_BF5XX_RESET_GPIO_NUM);
  320. #endif
  321. return -EBUSY;
  322. }
  323. return 0;
  324. }
  325. static void bf5xx_ac97_remove(struct platform_device *pdev,
  326. struct snd_soc_dai *dai)
  327. {
  328. free_page((unsigned long)cmd_count);
  329. cmd_count = NULL;
  330. #ifdef CONFIG_SND_BF5XX_HAVE_COLD_RESET
  331. gpio_free(CONFIG_SND_BF5XX_RESET_GPIO_NUM);
  332. #endif
  333. }
  334. struct snd_soc_dai bfin_ac97_dai = {
  335. .name = "bf5xx-ac97",
  336. .id = 0,
  337. .type = SND_SOC_DAI_AC97,
  338. .probe = bf5xx_ac97_probe,
  339. .remove = bf5xx_ac97_remove,
  340. .suspend = bf5xx_ac97_suspend,
  341. .resume = bf5xx_ac97_resume,
  342. .playback = {
  343. .stream_name = "AC97 Playback",
  344. .channels_min = 2,
  345. .channels_max = 2,
  346. .rates = SNDRV_PCM_RATE_48000,
  347. .formats = SNDRV_PCM_FMTBIT_S16_LE, },
  348. .capture = {
  349. .stream_name = "AC97 Capture",
  350. .channels_min = 2,
  351. .channels_max = 2,
  352. .rates = SNDRV_PCM_RATE_48000,
  353. .formats = SNDRV_PCM_FMTBIT_S16_LE, },
  354. };
  355. EXPORT_SYMBOL_GPL(bfin_ac97_dai);
  356. MODULE_AUTHOR("Roy Huang");
  357. MODULE_DESCRIPTION("AC97 driver for ADI Blackfin");
  358. MODULE_LICENSE("GPL");