genx2apic_phys.c 5.2 KB

123456789101112131415161718192021222324252627282930313233343536373839404142434445464748495051525354555657585960616263646566676869707172737475767778798081828384858687888990919293949596979899100101102103104105106107108109110111112113114115116117118119120121122123124125126127128129130131132133134135136137138139140141142143144145146147148149150151152153154155156157158159160161162163164165166167168169170171172173174175176177178179180181182183184185186187188189190191192193194195196197198199200201202203204205206207208209210211212213214215216217218219220221222223224225226227228229
  1. #include <linux/threads.h>
  2. #include <linux/cpumask.h>
  3. #include <linux/string.h>
  4. #include <linux/kernel.h>
  5. #include <linux/ctype.h>
  6. #include <linux/init.h>
  7. #include <linux/dmar.h>
  8. #include <asm/smp.h>
  9. #include <asm/apic.h>
  10. #include <asm/ipi.h>
  11. static int x2apic_phys;
  12. static int set_x2apic_phys_mode(char *arg)
  13. {
  14. x2apic_phys = 1;
  15. return 0;
  16. }
  17. early_param("x2apic_phys", set_x2apic_phys_mode);
  18. static int x2apic_acpi_madt_oem_check(char *oem_id, char *oem_table_id)
  19. {
  20. if (cpu_has_x2apic && x2apic_phys)
  21. return 1;
  22. return 0;
  23. }
  24. /* Start with all IRQs pointing to boot CPU. IRQ balancing will shift them. */
  25. static const struct cpumask *x2apic_target_cpus(void)
  26. {
  27. return cpumask_of(0);
  28. }
  29. static void x2apic_vector_allocation_domain(int cpu, struct cpumask *retmask)
  30. {
  31. cpumask_clear(retmask);
  32. cpumask_set_cpu(cpu, retmask);
  33. }
  34. static void __x2apic_send_IPI_dest(unsigned int apicid, int vector,
  35. unsigned int dest)
  36. {
  37. unsigned long cfg;
  38. cfg = __prepare_ICR(0, vector, dest);
  39. /*
  40. * send the IPI.
  41. */
  42. native_x2apic_icr_write(cfg, apicid);
  43. }
  44. static void x2apic_send_IPI_mask(const struct cpumask *mask, int vector)
  45. {
  46. unsigned long query_cpu;
  47. unsigned long flags;
  48. local_irq_save(flags);
  49. for_each_cpu(query_cpu, mask) {
  50. __x2apic_send_IPI_dest(per_cpu(x86_cpu_to_apicid, query_cpu),
  51. vector, APIC_DEST_PHYSICAL);
  52. }
  53. local_irq_restore(flags);
  54. }
  55. static void
  56. x2apic_send_IPI_mask_allbutself(const struct cpumask *mask, int vector)
  57. {
  58. unsigned long this_cpu = smp_processor_id();
  59. unsigned long query_cpu;
  60. unsigned long flags;
  61. local_irq_save(flags);
  62. for_each_cpu(query_cpu, mask) {
  63. if (query_cpu != this_cpu)
  64. __x2apic_send_IPI_dest(
  65. per_cpu(x86_cpu_to_apicid, query_cpu),
  66. vector, APIC_DEST_PHYSICAL);
  67. }
  68. local_irq_restore(flags);
  69. }
  70. static void x2apic_send_IPI_allbutself(int vector)
  71. {
  72. unsigned long this_cpu = smp_processor_id();
  73. unsigned long query_cpu;
  74. unsigned long flags;
  75. local_irq_save(flags);
  76. for_each_online_cpu(query_cpu) {
  77. if (query_cpu == this_cpu)
  78. continue;
  79. __x2apic_send_IPI_dest(per_cpu(x86_cpu_to_apicid, query_cpu),
  80. vector, APIC_DEST_PHYSICAL);
  81. }
  82. local_irq_restore(flags);
  83. }
  84. static void x2apic_send_IPI_all(int vector)
  85. {
  86. x2apic_send_IPI_mask(cpu_online_mask, vector);
  87. }
  88. static int x2apic_apic_id_registered(void)
  89. {
  90. return 1;
  91. }
  92. static unsigned int x2apic_cpu_mask_to_apicid(const struct cpumask *cpumask)
  93. {
  94. /*
  95. * We're using fixed IRQ delivery, can only return one phys APIC ID.
  96. * May as well be the first.
  97. */
  98. int cpu = cpumask_first(cpumask);
  99. if ((unsigned)cpu < nr_cpu_ids)
  100. return per_cpu(x86_cpu_to_apicid, cpu);
  101. else
  102. return BAD_APICID;
  103. }
  104. static unsigned int
  105. x2apic_cpu_mask_to_apicid_and(const struct cpumask *cpumask,
  106. const struct cpumask *andmask)
  107. {
  108. int cpu;
  109. /*
  110. * We're using fixed IRQ delivery, can only return one phys APIC ID.
  111. * May as well be the first.
  112. */
  113. for_each_cpu_and(cpu, cpumask, andmask) {
  114. if (cpumask_test_cpu(cpu, cpu_online_mask))
  115. break;
  116. }
  117. if (cpu < nr_cpu_ids)
  118. return per_cpu(x86_cpu_to_apicid, cpu);
  119. return BAD_APICID;
  120. }
  121. static unsigned int x2apic_phys_get_apic_id(unsigned long x)
  122. {
  123. return x;
  124. }
  125. static unsigned long set_apic_id(unsigned int id)
  126. {
  127. return id;
  128. }
  129. static int x2apic_phys_pkg_id(int initial_apicid, int index_msb)
  130. {
  131. return current_cpu_data.initial_apicid >> index_msb;
  132. }
  133. static void x2apic_send_IPI_self(int vector)
  134. {
  135. apic_write(APIC_SELF_IPI, vector);
  136. }
  137. static void init_x2apic_ldr(void)
  138. {
  139. }
  140. struct apic apic_x2apic_phys = {
  141. .name = "physical x2apic",
  142. .probe = NULL,
  143. .acpi_madt_oem_check = x2apic_acpi_madt_oem_check,
  144. .apic_id_registered = x2apic_apic_id_registered,
  145. .irq_delivery_mode = dest_Fixed,
  146. .irq_dest_mode = 0, /* physical */
  147. .target_cpus = x2apic_target_cpus,
  148. .disable_esr = 0,
  149. .dest_logical = 0,
  150. .check_apicid_used = NULL,
  151. .check_apicid_present = NULL,
  152. .vector_allocation_domain = x2apic_vector_allocation_domain,
  153. .init_apic_ldr = init_x2apic_ldr,
  154. .ioapic_phys_id_map = NULL,
  155. .setup_apic_routing = NULL,
  156. .multi_timer_check = NULL,
  157. .apicid_to_node = NULL,
  158. .cpu_to_logical_apicid = NULL,
  159. .cpu_present_to_apicid = default_cpu_present_to_apicid,
  160. .apicid_to_cpu_present = NULL,
  161. .setup_portio_remap = NULL,
  162. .check_phys_apicid_present = default_check_phys_apicid_present,
  163. .enable_apic_mode = NULL,
  164. .phys_pkg_id = x2apic_phys_pkg_id,
  165. .mps_oem_check = NULL,
  166. .get_apic_id = x2apic_phys_get_apic_id,
  167. .set_apic_id = set_apic_id,
  168. .apic_id_mask = 0xFFFFFFFFu,
  169. .cpu_mask_to_apicid = x2apic_cpu_mask_to_apicid,
  170. .cpu_mask_to_apicid_and = x2apic_cpu_mask_to_apicid_and,
  171. .send_IPI_mask = x2apic_send_IPI_mask,
  172. .send_IPI_mask_allbutself = x2apic_send_IPI_mask_allbutself,
  173. .send_IPI_allbutself = x2apic_send_IPI_allbutself,
  174. .send_IPI_all = x2apic_send_IPI_all,
  175. .send_IPI_self = x2apic_send_IPI_self,
  176. .wakeup_cpu = NULL,
  177. .trampoline_phys_low = DEFAULT_TRAMPOLINE_PHYS_LOW,
  178. .trampoline_phys_high = DEFAULT_TRAMPOLINE_PHYS_HIGH,
  179. .wait_for_init_deassert = NULL,
  180. .smp_callin_clear_local_apic = NULL,
  181. .inquire_remote_apic = NULL,
  182. .read = native_apic_msr_read,
  183. .write = native_apic_msr_write,
  184. .icr_read = native_x2apic_icr_read,
  185. .icr_write = native_x2apic_icr_write,
  186. .wait_icr_idle = native_x2apic_wait_icr_idle,
  187. .safe_wait_icr_idle = native_safe_x2apic_wait_icr_idle,
  188. };