patch_sigmatel.c 118 KB

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  1. /*
  2. * Universal Interface for Intel High Definition Audio Codec
  3. *
  4. * HD audio interface patch for SigmaTel STAC92xx
  5. *
  6. * Copyright (c) 2005 Embedded Alley Solutions, Inc.
  7. * Matt Porter <mporter@embeddedalley.com>
  8. *
  9. * Based on patch_cmedia.c and patch_realtek.c
  10. * Copyright (c) 2004 Takashi Iwai <tiwai@suse.de>
  11. *
  12. * This driver is free software; you can redistribute it and/or modify
  13. * it under the terms of the GNU General Public License as published by
  14. * the Free Software Foundation; either version 2 of the License, or
  15. * (at your option) any later version.
  16. *
  17. * This driver is distributed in the hope that it will be useful,
  18. * but WITHOUT ANY WARRANTY; without even the implied warranty of
  19. * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
  20. * GNU General Public License for more details.
  21. *
  22. * You should have received a copy of the GNU General Public License
  23. * along with this program; if not, write to the Free Software
  24. * Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA
  25. */
  26. #include <linux/init.h>
  27. #include <linux/delay.h>
  28. #include <linux/slab.h>
  29. #include <linux/pci.h>
  30. #include <linux/dmi.h>
  31. #include <linux/module.h>
  32. #include <sound/core.h>
  33. #include <sound/jack.h>
  34. #include <sound/tlv.h>
  35. #include "hda_codec.h"
  36. #include "hda_local.h"
  37. #include "hda_auto_parser.h"
  38. #include "hda_beep.h"
  39. #include "hda_jack.h"
  40. #include "hda_generic.h"
  41. enum {
  42. STAC_VREF_EVENT = 8,
  43. STAC_PWR_EVENT,
  44. };
  45. enum {
  46. STAC_REF,
  47. STAC_9200_OQO,
  48. STAC_9200_DELL_D21,
  49. STAC_9200_DELL_D22,
  50. STAC_9200_DELL_D23,
  51. STAC_9200_DELL_M21,
  52. STAC_9200_DELL_M22,
  53. STAC_9200_DELL_M23,
  54. STAC_9200_DELL_M24,
  55. STAC_9200_DELL_M25,
  56. STAC_9200_DELL_M26,
  57. STAC_9200_DELL_M27,
  58. STAC_9200_M4,
  59. STAC_9200_M4_2,
  60. STAC_9200_PANASONIC,
  61. STAC_9200_EAPD_INIT,
  62. STAC_9200_MODELS
  63. };
  64. enum {
  65. STAC_9205_REF,
  66. STAC_9205_DELL_M42,
  67. STAC_9205_DELL_M43,
  68. STAC_9205_DELL_M44,
  69. STAC_9205_EAPD,
  70. STAC_9205_MODELS
  71. };
  72. enum {
  73. STAC_92HD73XX_NO_JD, /* no jack-detection */
  74. STAC_92HD73XX_REF,
  75. STAC_92HD73XX_INTEL,
  76. STAC_DELL_M6_AMIC,
  77. STAC_DELL_M6_DMIC,
  78. STAC_DELL_M6_BOTH,
  79. STAC_DELL_EQ,
  80. STAC_ALIENWARE_M17X,
  81. STAC_92HD73XX_MODELS
  82. };
  83. enum {
  84. STAC_92HD83XXX_REF,
  85. STAC_92HD83XXX_PWR_REF,
  86. STAC_DELL_S14,
  87. STAC_DELL_VOSTRO_3500,
  88. STAC_92HD83XXX_HP_cNB11_INTQUAD,
  89. STAC_HP_DV7_4000,
  90. STAC_HP_ZEPHYR,
  91. STAC_92HD83XXX_HP_LED,
  92. STAC_92HD83XXX_HP_INV_LED,
  93. STAC_92HD83XXX_HP_MIC_LED,
  94. STAC_92HD83XXX_HEADSET_JACK,
  95. STAC_92HD83XXX_HP,
  96. STAC_HP_ENVY_BASS,
  97. STAC_92HD83XXX_MODELS
  98. };
  99. enum {
  100. STAC_92HD71BXX_REF,
  101. STAC_DELL_M4_1,
  102. STAC_DELL_M4_2,
  103. STAC_DELL_M4_3,
  104. STAC_HP_M4,
  105. STAC_HP_DV4,
  106. STAC_HP_DV5,
  107. STAC_HP_HDX,
  108. STAC_92HD71BXX_HP,
  109. STAC_92HD71BXX_NO_DMIC,
  110. STAC_92HD71BXX_NO_SMUX,
  111. STAC_92HD71BXX_MODELS
  112. };
  113. enum {
  114. STAC_925x_REF,
  115. STAC_M1,
  116. STAC_M1_2,
  117. STAC_M2,
  118. STAC_M2_2,
  119. STAC_M3,
  120. STAC_M5,
  121. STAC_M6,
  122. STAC_925x_MODELS
  123. };
  124. enum {
  125. STAC_D945_REF,
  126. STAC_D945GTP3,
  127. STAC_D945GTP5,
  128. STAC_INTEL_MAC_V1,
  129. STAC_INTEL_MAC_V2,
  130. STAC_INTEL_MAC_V3,
  131. STAC_INTEL_MAC_V4,
  132. STAC_INTEL_MAC_V5,
  133. STAC_INTEL_MAC_AUTO,
  134. STAC_ECS_202,
  135. STAC_922X_DELL_D81,
  136. STAC_922X_DELL_D82,
  137. STAC_922X_DELL_M81,
  138. STAC_922X_DELL_M82,
  139. STAC_922X_INTEL_MAC_GPIO,
  140. STAC_922X_MODELS
  141. };
  142. enum {
  143. STAC_D965_REF_NO_JD, /* no jack-detection */
  144. STAC_D965_REF,
  145. STAC_D965_3ST,
  146. STAC_D965_5ST,
  147. STAC_D965_5ST_NO_FP,
  148. STAC_D965_VERBS,
  149. STAC_DELL_3ST,
  150. STAC_DELL_BIOS,
  151. STAC_DELL_BIOS_SPDIF,
  152. STAC_927X_DELL_DMIC,
  153. STAC_927X_VOLKNOB,
  154. STAC_927X_MODELS
  155. };
  156. enum {
  157. STAC_9872_VAIO,
  158. STAC_9872_MODELS
  159. };
  160. struct sigmatel_spec {
  161. struct hda_gen_spec gen;
  162. unsigned int eapd_switch: 1;
  163. unsigned int linear_tone_beep:1;
  164. unsigned int headset_jack:1; /* 4-pin headset jack (hp + mono mic) */
  165. unsigned int volknob_init:1; /* special volume-knob initialization */
  166. unsigned int powerdown_adcs:1;
  167. unsigned int have_spdif_mux:1;
  168. /* gpio lines */
  169. unsigned int eapd_mask;
  170. unsigned int gpio_mask;
  171. unsigned int gpio_dir;
  172. unsigned int gpio_data;
  173. unsigned int gpio_mute;
  174. unsigned int gpio_led;
  175. unsigned int gpio_led_polarity;
  176. unsigned int vref_mute_led_nid; /* pin NID for mute-LED vref control */
  177. unsigned int vref_led;
  178. int default_polarity;
  179. unsigned int mic_mute_led_gpio; /* capture mute LED GPIO */
  180. bool mic_mute_led_on; /* current mic mute state */
  181. /* stream */
  182. unsigned int stream_delay;
  183. /* analog loopback */
  184. const struct snd_kcontrol_new *aloopback_ctl;
  185. unsigned int aloopback;
  186. unsigned char aloopback_mask;
  187. unsigned char aloopback_shift;
  188. /* power management */
  189. unsigned int power_map_bits;
  190. unsigned int num_pwrs;
  191. const hda_nid_t *pwr_nids;
  192. unsigned int active_adcs;
  193. /* beep widgets */
  194. hda_nid_t anabeep_nid;
  195. hda_nid_t digbeep_nid;
  196. /* SPDIF-out mux */
  197. const char * const *spdif_labels;
  198. struct hda_input_mux spdif_mux;
  199. unsigned int cur_smux[2];
  200. };
  201. #define AC_VERB_IDT_SET_POWER_MAP 0x7ec
  202. #define AC_VERB_IDT_GET_POWER_MAP 0xfec
  203. static const hda_nid_t stac92hd73xx_pwr_nids[8] = {
  204. 0x0a, 0x0b, 0x0c, 0xd, 0x0e,
  205. 0x0f, 0x10, 0x11
  206. };
  207. static const hda_nid_t stac92hd83xxx_pwr_nids[7] = {
  208. 0x0a, 0x0b, 0x0c, 0xd, 0x0e,
  209. 0x0f, 0x10
  210. };
  211. static const hda_nid_t stac92hd71bxx_pwr_nids[3] = {
  212. 0x0a, 0x0d, 0x0f
  213. };
  214. /*
  215. * PCM hooks
  216. */
  217. static void stac_playback_pcm_hook(struct hda_pcm_stream *hinfo,
  218. struct hda_codec *codec,
  219. struct snd_pcm_substream *substream,
  220. int action)
  221. {
  222. struct sigmatel_spec *spec = codec->spec;
  223. if (action == HDA_GEN_PCM_ACT_OPEN && spec->stream_delay)
  224. msleep(spec->stream_delay);
  225. }
  226. static void stac_capture_pcm_hook(struct hda_pcm_stream *hinfo,
  227. struct hda_codec *codec,
  228. struct snd_pcm_substream *substream,
  229. int action)
  230. {
  231. struct sigmatel_spec *spec = codec->spec;
  232. int i, idx = 0;
  233. if (!spec->powerdown_adcs)
  234. return;
  235. for (i = 0; i < spec->gen.num_all_adcs; i++) {
  236. if (spec->gen.all_adcs[i] == hinfo->nid) {
  237. idx = i;
  238. break;
  239. }
  240. }
  241. switch (action) {
  242. case HDA_GEN_PCM_ACT_OPEN:
  243. msleep(40);
  244. snd_hda_codec_write(codec, hinfo->nid, 0,
  245. AC_VERB_SET_POWER_STATE, AC_PWRST_D0);
  246. spec->active_adcs |= (1 << idx);
  247. break;
  248. case HDA_GEN_PCM_ACT_CLOSE:
  249. snd_hda_codec_write(codec, hinfo->nid, 0,
  250. AC_VERB_SET_POWER_STATE, AC_PWRST_D3);
  251. spec->active_adcs &= ~(1 << idx);
  252. break;
  253. }
  254. }
  255. /*
  256. * Early 2006 Intel Macintoshes with STAC9220X5 codecs seem to have a
  257. * funky external mute control using GPIO pins.
  258. */
  259. static void stac_gpio_set(struct hda_codec *codec, unsigned int mask,
  260. unsigned int dir_mask, unsigned int data)
  261. {
  262. unsigned int gpiostate, gpiomask, gpiodir;
  263. snd_printdd("%s msk %x dir %x gpio %x\n", __func__, mask, dir_mask, data);
  264. gpiostate = snd_hda_codec_read(codec, codec->afg, 0,
  265. AC_VERB_GET_GPIO_DATA, 0);
  266. gpiostate = (gpiostate & ~dir_mask) | (data & dir_mask);
  267. gpiomask = snd_hda_codec_read(codec, codec->afg, 0,
  268. AC_VERB_GET_GPIO_MASK, 0);
  269. gpiomask |= mask;
  270. gpiodir = snd_hda_codec_read(codec, codec->afg, 0,
  271. AC_VERB_GET_GPIO_DIRECTION, 0);
  272. gpiodir |= dir_mask;
  273. /* Configure GPIOx as CMOS */
  274. snd_hda_codec_write(codec, codec->afg, 0, 0x7e7, 0);
  275. snd_hda_codec_write(codec, codec->afg, 0,
  276. AC_VERB_SET_GPIO_MASK, gpiomask);
  277. snd_hda_codec_read(codec, codec->afg, 0,
  278. AC_VERB_SET_GPIO_DIRECTION, gpiodir); /* sync */
  279. msleep(1);
  280. snd_hda_codec_read(codec, codec->afg, 0,
  281. AC_VERB_SET_GPIO_DATA, gpiostate); /* sync */
  282. }
  283. /* hook for controlling mic-mute LED GPIO */
  284. static void stac_capture_led_hook(struct hda_codec *codec,
  285. struct snd_ctl_elem_value *ucontrol)
  286. {
  287. struct sigmatel_spec *spec = codec->spec;
  288. bool mute;
  289. if (!ucontrol)
  290. return;
  291. mute = !(ucontrol->value.integer.value[0] ||
  292. ucontrol->value.integer.value[1]);
  293. if (spec->mic_mute_led_on != mute) {
  294. spec->mic_mute_led_on = mute;
  295. if (mute)
  296. spec->gpio_data |= spec->mic_mute_led_gpio;
  297. else
  298. spec->gpio_data &= ~spec->mic_mute_led_gpio;
  299. stac_gpio_set(codec, spec->gpio_mask,
  300. spec->gpio_dir, spec->gpio_data);
  301. }
  302. }
  303. static int stac_vrefout_set(struct hda_codec *codec,
  304. hda_nid_t nid, unsigned int new_vref)
  305. {
  306. int error, pinctl;
  307. snd_printdd("%s, nid %x ctl %x\n", __func__, nid, new_vref);
  308. pinctl = snd_hda_codec_read(codec, nid, 0,
  309. AC_VERB_GET_PIN_WIDGET_CONTROL, 0);
  310. if (pinctl < 0)
  311. return pinctl;
  312. pinctl &= 0xff;
  313. pinctl &= ~AC_PINCTL_VREFEN;
  314. pinctl |= (new_vref & AC_PINCTL_VREFEN);
  315. error = snd_hda_set_pin_ctl_cache(codec, nid, pinctl);
  316. if (error < 0)
  317. return error;
  318. return 1;
  319. }
  320. /* update mute-LED accoring to the master switch */
  321. static void stac_update_led_status(struct hda_codec *codec, int enabled)
  322. {
  323. struct sigmatel_spec *spec = codec->spec;
  324. int muted = !enabled;
  325. if (!spec->gpio_led)
  326. return;
  327. /* LED state is inverted on these systems */
  328. if (spec->gpio_led_polarity)
  329. muted = !muted;
  330. if (!spec->vref_mute_led_nid) {
  331. if (muted)
  332. spec->gpio_data |= spec->gpio_led;
  333. else
  334. spec->gpio_data &= ~spec->gpio_led;
  335. stac_gpio_set(codec, spec->gpio_mask,
  336. spec->gpio_dir, spec->gpio_data);
  337. } else {
  338. spec->vref_led = muted ? AC_PINCTL_VREF_50 : AC_PINCTL_VREF_GRD;
  339. stac_vrefout_set(codec, spec->vref_mute_led_nid,
  340. spec->vref_led);
  341. }
  342. }
  343. /* vmaster hook to update mute LED */
  344. static void stac_vmaster_hook(void *private_data, int val)
  345. {
  346. stac_update_led_status(private_data, val);
  347. }
  348. /* automute hook to handle GPIO mute and EAPD updates */
  349. static void stac_update_outputs(struct hda_codec *codec)
  350. {
  351. struct sigmatel_spec *spec = codec->spec;
  352. if (spec->gpio_mute)
  353. spec->gen.master_mute =
  354. !(snd_hda_codec_read(codec, codec->afg, 0,
  355. AC_VERB_GET_GPIO_DATA, 0) & spec->gpio_mute);
  356. snd_hda_gen_update_outputs(codec);
  357. if (spec->eapd_mask && spec->eapd_switch) {
  358. unsigned int val = spec->gpio_data;
  359. if (spec->gen.speaker_muted)
  360. val &= ~spec->eapd_mask;
  361. else
  362. val |= spec->eapd_mask;
  363. if (spec->gpio_data != val)
  364. stac_gpio_set(codec, spec->gpio_mask, spec->gpio_dir,
  365. val);
  366. }
  367. }
  368. static void stac_toggle_power_map(struct hda_codec *codec, hda_nid_t nid,
  369. bool enable, bool do_write)
  370. {
  371. struct sigmatel_spec *spec = codec->spec;
  372. unsigned int idx, val;
  373. for (idx = 0; idx < spec->num_pwrs; idx++) {
  374. if (spec->pwr_nids[idx] == nid)
  375. break;
  376. }
  377. if (idx >= spec->num_pwrs)
  378. return;
  379. idx = 1 << idx;
  380. val = spec->power_map_bits;
  381. if (enable)
  382. val &= ~idx;
  383. else
  384. val |= idx;
  385. /* power down unused output ports */
  386. if (val != spec->power_map_bits) {
  387. spec->power_map_bits = val;
  388. if (do_write)
  389. snd_hda_codec_write(codec, codec->afg, 0,
  390. AC_VERB_IDT_SET_POWER_MAP, val);
  391. }
  392. }
  393. /* update power bit per jack plug/unplug */
  394. static void jack_update_power(struct hda_codec *codec,
  395. struct hda_jack_tbl *jack)
  396. {
  397. struct sigmatel_spec *spec = codec->spec;
  398. int i;
  399. if (!spec->num_pwrs)
  400. return;
  401. if (jack && jack->nid) {
  402. stac_toggle_power_map(codec, jack->nid,
  403. snd_hda_jack_detect(codec, jack->nid),
  404. true);
  405. return;
  406. }
  407. /* update all jacks */
  408. for (i = 0; i < spec->num_pwrs; i++) {
  409. hda_nid_t nid = spec->pwr_nids[i];
  410. jack = snd_hda_jack_tbl_get(codec, nid);
  411. if (!jack || !jack->action)
  412. continue;
  413. if (jack->action == STAC_PWR_EVENT ||
  414. jack->action <= HDA_GEN_LAST_EVENT)
  415. stac_toggle_power_map(codec, nid,
  416. snd_hda_jack_detect(codec, nid),
  417. false);
  418. }
  419. snd_hda_codec_write(codec, codec->afg, 0, AC_VERB_IDT_SET_POWER_MAP,
  420. spec->power_map_bits);
  421. }
  422. static void stac_hp_automute(struct hda_codec *codec,
  423. struct hda_jack_tbl *jack)
  424. {
  425. snd_hda_gen_hp_automute(codec, jack);
  426. jack_update_power(codec, jack);
  427. }
  428. static void stac_line_automute(struct hda_codec *codec,
  429. struct hda_jack_tbl *jack)
  430. {
  431. snd_hda_gen_line_automute(codec, jack);
  432. jack_update_power(codec, jack);
  433. }
  434. static void stac_mic_autoswitch(struct hda_codec *codec,
  435. struct hda_jack_tbl *jack)
  436. {
  437. snd_hda_gen_mic_autoswitch(codec, jack);
  438. jack_update_power(codec, jack);
  439. }
  440. static void stac_vref_event(struct hda_codec *codec, struct hda_jack_tbl *event)
  441. {
  442. unsigned int data;
  443. data = snd_hda_codec_read(codec, codec->afg, 0,
  444. AC_VERB_GET_GPIO_DATA, 0);
  445. /* toggle VREF state based on GPIOx status */
  446. snd_hda_codec_write(codec, codec->afg, 0, 0x7e0,
  447. !!(data & (1 << event->private_data)));
  448. }
  449. /* initialize the power map and enable the power event to jacks that
  450. * haven't been assigned to automute
  451. */
  452. static void stac_init_power_map(struct hda_codec *codec)
  453. {
  454. struct sigmatel_spec *spec = codec->spec;
  455. int i;
  456. for (i = 0; i < spec->num_pwrs; i++) {
  457. hda_nid_t nid = spec->pwr_nids[i];
  458. unsigned int def_conf = snd_hda_codec_get_pincfg(codec, nid);
  459. def_conf = get_defcfg_connect(def_conf);
  460. if (snd_hda_jack_tbl_get(codec, nid))
  461. continue;
  462. if (def_conf == AC_JACK_PORT_COMPLEX &&
  463. !(spec->vref_mute_led_nid == nid ||
  464. is_jack_detectable(codec, nid))) {
  465. snd_hda_jack_detect_enable_callback(codec, nid,
  466. STAC_PWR_EVENT,
  467. jack_update_power);
  468. } else {
  469. if (def_conf == AC_JACK_PORT_NONE)
  470. stac_toggle_power_map(codec, nid, false, false);
  471. else
  472. stac_toggle_power_map(codec, nid, true, false);
  473. }
  474. }
  475. }
  476. /*
  477. */
  478. static inline bool get_int_hint(struct hda_codec *codec, const char *key,
  479. int *valp)
  480. {
  481. return !snd_hda_get_int_hint(codec, key, valp);
  482. }
  483. /* override some hints from the hwdep entry */
  484. static void stac_store_hints(struct hda_codec *codec)
  485. {
  486. struct sigmatel_spec *spec = codec->spec;
  487. int val;
  488. if (get_int_hint(codec, "gpio_mask", &spec->gpio_mask)) {
  489. spec->eapd_mask = spec->gpio_dir = spec->gpio_data =
  490. spec->gpio_mask;
  491. }
  492. if (get_int_hint(codec, "gpio_dir", &spec->gpio_dir))
  493. spec->gpio_mask &= spec->gpio_mask;
  494. if (get_int_hint(codec, "gpio_data", &spec->gpio_data))
  495. spec->gpio_dir &= spec->gpio_mask;
  496. if (get_int_hint(codec, "eapd_mask", &spec->eapd_mask))
  497. spec->eapd_mask &= spec->gpio_mask;
  498. if (get_int_hint(codec, "gpio_mute", &spec->gpio_mute))
  499. spec->gpio_mute &= spec->gpio_mask;
  500. val = snd_hda_get_bool_hint(codec, "eapd_switch");
  501. if (val >= 0)
  502. spec->eapd_switch = val;
  503. }
  504. /*
  505. * loopback controls
  506. */
  507. #define stac_aloopback_info snd_ctl_boolean_mono_info
  508. static int stac_aloopback_get(struct snd_kcontrol *kcontrol,
  509. struct snd_ctl_elem_value *ucontrol)
  510. {
  511. struct hda_codec *codec = snd_kcontrol_chip(kcontrol);
  512. unsigned int idx = snd_ctl_get_ioffidx(kcontrol, &ucontrol->id);
  513. struct sigmatel_spec *spec = codec->spec;
  514. ucontrol->value.integer.value[0] = !!(spec->aloopback &
  515. (spec->aloopback_mask << idx));
  516. return 0;
  517. }
  518. static int stac_aloopback_put(struct snd_kcontrol *kcontrol,
  519. struct snd_ctl_elem_value *ucontrol)
  520. {
  521. struct hda_codec *codec = snd_kcontrol_chip(kcontrol);
  522. struct sigmatel_spec *spec = codec->spec;
  523. unsigned int idx = snd_ctl_get_ioffidx(kcontrol, &ucontrol->id);
  524. unsigned int dac_mode;
  525. unsigned int val, idx_val;
  526. idx_val = spec->aloopback_mask << idx;
  527. if (ucontrol->value.integer.value[0])
  528. val = spec->aloopback | idx_val;
  529. else
  530. val = spec->aloopback & ~idx_val;
  531. if (spec->aloopback == val)
  532. return 0;
  533. spec->aloopback = val;
  534. /* Only return the bits defined by the shift value of the
  535. * first two bytes of the mask
  536. */
  537. dac_mode = snd_hda_codec_read(codec, codec->afg, 0,
  538. kcontrol->private_value & 0xFFFF, 0x0);
  539. dac_mode >>= spec->aloopback_shift;
  540. if (spec->aloopback & idx_val) {
  541. snd_hda_power_up(codec);
  542. dac_mode |= idx_val;
  543. } else {
  544. snd_hda_power_down(codec);
  545. dac_mode &= ~idx_val;
  546. }
  547. snd_hda_codec_write_cache(codec, codec->afg, 0,
  548. kcontrol->private_value >> 16, dac_mode);
  549. return 1;
  550. }
  551. #define STAC_ANALOG_LOOPBACK(verb_read, verb_write, cnt) \
  552. { \
  553. .iface = SNDRV_CTL_ELEM_IFACE_MIXER, \
  554. .name = "Analog Loopback", \
  555. .count = cnt, \
  556. .info = stac_aloopback_info, \
  557. .get = stac_aloopback_get, \
  558. .put = stac_aloopback_put, \
  559. .private_value = verb_read | (verb_write << 16), \
  560. }
  561. /*
  562. * Mute LED handling on HP laptops
  563. */
  564. /* check whether it's a HP laptop with a docking port */
  565. static bool hp_bnb2011_with_dock(struct hda_codec *codec)
  566. {
  567. if (codec->vendor_id != 0x111d7605 &&
  568. codec->vendor_id != 0x111d76d1)
  569. return false;
  570. switch (codec->subsystem_id) {
  571. case 0x103c1618:
  572. case 0x103c1619:
  573. case 0x103c161a:
  574. case 0x103c161b:
  575. case 0x103c161c:
  576. case 0x103c161d:
  577. case 0x103c161e:
  578. case 0x103c161f:
  579. case 0x103c162a:
  580. case 0x103c162b:
  581. case 0x103c1630:
  582. case 0x103c1631:
  583. case 0x103c1633:
  584. case 0x103c1634:
  585. case 0x103c1635:
  586. case 0x103c3587:
  587. case 0x103c3588:
  588. case 0x103c3589:
  589. case 0x103c358a:
  590. case 0x103c3667:
  591. case 0x103c3668:
  592. case 0x103c3669:
  593. return true;
  594. }
  595. return false;
  596. }
  597. static bool hp_blike_system(u32 subsystem_id)
  598. {
  599. switch (subsystem_id) {
  600. case 0x103c1520:
  601. case 0x103c1521:
  602. case 0x103c1523:
  603. case 0x103c1524:
  604. case 0x103c1525:
  605. case 0x103c1722:
  606. case 0x103c1723:
  607. case 0x103c1724:
  608. case 0x103c1725:
  609. case 0x103c1726:
  610. case 0x103c1727:
  611. case 0x103c1728:
  612. case 0x103c1729:
  613. case 0x103c172a:
  614. case 0x103c172b:
  615. case 0x103c307e:
  616. case 0x103c307f:
  617. case 0x103c3080:
  618. case 0x103c3081:
  619. case 0x103c7007:
  620. case 0x103c7008:
  621. return true;
  622. }
  623. return false;
  624. }
  625. static void set_hp_led_gpio(struct hda_codec *codec)
  626. {
  627. struct sigmatel_spec *spec = codec->spec;
  628. unsigned int gpio;
  629. if (spec->gpio_led)
  630. return;
  631. gpio = snd_hda_param_read(codec, codec->afg, AC_PAR_GPIO_CAP);
  632. gpio &= AC_GPIO_IO_COUNT;
  633. if (gpio > 3)
  634. spec->gpio_led = 0x08; /* GPIO 3 */
  635. else
  636. spec->gpio_led = 0x01; /* GPIO 0 */
  637. }
  638. /*
  639. * This method searches for the mute LED GPIO configuration
  640. * provided as OEM string in SMBIOS. The format of that string
  641. * is HP_Mute_LED_P_G or HP_Mute_LED_P
  642. * where P can be 0 or 1 and defines mute LED GPIO control state (low/high)
  643. * that corresponds to the NOT muted state of the master volume
  644. * and G is the index of the GPIO to use as the mute LED control (0..9)
  645. * If _G portion is missing it is assigned based on the codec ID
  646. *
  647. * So, HP B-series like systems may have HP_Mute_LED_0 (current models)
  648. * or HP_Mute_LED_0_3 (future models) OEM SMBIOS strings
  649. *
  650. *
  651. * The dv-series laptops don't seem to have the HP_Mute_LED* strings in
  652. * SMBIOS - at least the ones I have seen do not have them - which include
  653. * my own system (HP Pavilion dv6-1110ax) and my cousin's
  654. * HP Pavilion dv9500t CTO.
  655. * Need more information on whether it is true across the entire series.
  656. * -- kunal
  657. */
  658. static int find_mute_led_cfg(struct hda_codec *codec, int default_polarity)
  659. {
  660. struct sigmatel_spec *spec = codec->spec;
  661. const struct dmi_device *dev = NULL;
  662. if (get_int_hint(codec, "gpio_led", &spec->gpio_led)) {
  663. get_int_hint(codec, "gpio_led_polarity",
  664. &spec->gpio_led_polarity);
  665. return 1;
  666. }
  667. while ((dev = dmi_find_device(DMI_DEV_TYPE_OEM_STRING, NULL, dev))) {
  668. if (sscanf(dev->name, "HP_Mute_LED_%d_%x",
  669. &spec->gpio_led_polarity,
  670. &spec->gpio_led) == 2) {
  671. unsigned int max_gpio;
  672. max_gpio = snd_hda_param_read(codec, codec->afg,
  673. AC_PAR_GPIO_CAP);
  674. max_gpio &= AC_GPIO_IO_COUNT;
  675. if (spec->gpio_led < max_gpio)
  676. spec->gpio_led = 1 << spec->gpio_led;
  677. else
  678. spec->vref_mute_led_nid = spec->gpio_led;
  679. return 1;
  680. }
  681. if (sscanf(dev->name, "HP_Mute_LED_%d",
  682. &spec->gpio_led_polarity) == 1) {
  683. set_hp_led_gpio(codec);
  684. return 1;
  685. }
  686. /* BIOS bug: unfilled OEM string */
  687. if (strstr(dev->name, "HP_Mute_LED_P_G")) {
  688. set_hp_led_gpio(codec);
  689. if (default_polarity >= 0)
  690. spec->gpio_led_polarity = default_polarity;
  691. else
  692. spec->gpio_led_polarity = 1;
  693. return 1;
  694. }
  695. }
  696. /*
  697. * Fallback case - if we don't find the DMI strings,
  698. * we statically set the GPIO - if not a B-series system
  699. * and default polarity is provided
  700. */
  701. if (!hp_blike_system(codec->subsystem_id) &&
  702. (default_polarity == 0 || default_polarity == 1)) {
  703. set_hp_led_gpio(codec);
  704. spec->gpio_led_polarity = default_polarity;
  705. return 1;
  706. }
  707. return 0;
  708. }
  709. /*
  710. * PC beep controls
  711. */
  712. /* create PC beep volume controls */
  713. static int stac_auto_create_beep_ctls(struct hda_codec *codec,
  714. hda_nid_t nid)
  715. {
  716. struct sigmatel_spec *spec = codec->spec;
  717. u32 caps = query_amp_caps(codec, nid, HDA_OUTPUT);
  718. struct snd_kcontrol_new *knew;
  719. static struct snd_kcontrol_new abeep_mute_ctl =
  720. HDA_CODEC_MUTE(NULL, 0, 0, 0);
  721. static struct snd_kcontrol_new dbeep_mute_ctl =
  722. HDA_CODEC_MUTE_BEEP(NULL, 0, 0, 0);
  723. static struct snd_kcontrol_new beep_vol_ctl =
  724. HDA_CODEC_VOLUME(NULL, 0, 0, 0);
  725. /* check for mute support for the the amp */
  726. if ((caps & AC_AMPCAP_MUTE) >> AC_AMPCAP_MUTE_SHIFT) {
  727. const struct snd_kcontrol_new *temp;
  728. if (spec->anabeep_nid == nid)
  729. temp = &abeep_mute_ctl;
  730. else
  731. temp = &dbeep_mute_ctl;
  732. knew = snd_hda_gen_add_kctl(&spec->gen,
  733. "Beep Playback Switch", temp);
  734. if (!knew)
  735. return -ENOMEM;
  736. knew->private_value =
  737. HDA_COMPOSE_AMP_VAL(nid, 1, 0, HDA_OUTPUT);
  738. }
  739. /* check to see if there is volume support for the amp */
  740. if ((caps & AC_AMPCAP_NUM_STEPS) >> AC_AMPCAP_NUM_STEPS_SHIFT) {
  741. knew = snd_hda_gen_add_kctl(&spec->gen,
  742. "Beep Playback Volume",
  743. &beep_vol_ctl);
  744. if (!knew)
  745. return -ENOMEM;
  746. knew->private_value =
  747. HDA_COMPOSE_AMP_VAL(nid, 1, 0, HDA_OUTPUT);
  748. }
  749. return 0;
  750. }
  751. #ifdef CONFIG_SND_HDA_INPUT_BEEP
  752. #define stac_dig_beep_switch_info snd_ctl_boolean_mono_info
  753. static int stac_dig_beep_switch_get(struct snd_kcontrol *kcontrol,
  754. struct snd_ctl_elem_value *ucontrol)
  755. {
  756. struct hda_codec *codec = snd_kcontrol_chip(kcontrol);
  757. ucontrol->value.integer.value[0] = codec->beep->enabled;
  758. return 0;
  759. }
  760. static int stac_dig_beep_switch_put(struct snd_kcontrol *kcontrol,
  761. struct snd_ctl_elem_value *ucontrol)
  762. {
  763. struct hda_codec *codec = snd_kcontrol_chip(kcontrol);
  764. return snd_hda_enable_beep_device(codec, ucontrol->value.integer.value[0]);
  765. }
  766. static const struct snd_kcontrol_new stac_dig_beep_ctrl = {
  767. .iface = SNDRV_CTL_ELEM_IFACE_MIXER,
  768. .name = "Beep Playback Switch",
  769. .info = stac_dig_beep_switch_info,
  770. .get = stac_dig_beep_switch_get,
  771. .put = stac_dig_beep_switch_put,
  772. };
  773. static int stac_beep_switch_ctl(struct hda_codec *codec)
  774. {
  775. struct sigmatel_spec *spec = codec->spec;
  776. if (!snd_hda_gen_add_kctl(&spec->gen, NULL, &stac_dig_beep_ctrl))
  777. return -ENOMEM;
  778. return 0;
  779. }
  780. #endif
  781. /*
  782. * SPDIF-out mux controls
  783. */
  784. static int stac_smux_enum_info(struct snd_kcontrol *kcontrol,
  785. struct snd_ctl_elem_info *uinfo)
  786. {
  787. struct hda_codec *codec = snd_kcontrol_chip(kcontrol);
  788. struct sigmatel_spec *spec = codec->spec;
  789. return snd_hda_input_mux_info(&spec->spdif_mux, uinfo);
  790. }
  791. static int stac_smux_enum_get(struct snd_kcontrol *kcontrol,
  792. struct snd_ctl_elem_value *ucontrol)
  793. {
  794. struct hda_codec *codec = snd_kcontrol_chip(kcontrol);
  795. struct sigmatel_spec *spec = codec->spec;
  796. unsigned int smux_idx = snd_ctl_get_ioffidx(kcontrol, &ucontrol->id);
  797. ucontrol->value.enumerated.item[0] = spec->cur_smux[smux_idx];
  798. return 0;
  799. }
  800. static int stac_smux_enum_put(struct snd_kcontrol *kcontrol,
  801. struct snd_ctl_elem_value *ucontrol)
  802. {
  803. struct hda_codec *codec = snd_kcontrol_chip(kcontrol);
  804. struct sigmatel_spec *spec = codec->spec;
  805. unsigned int smux_idx = snd_ctl_get_ioffidx(kcontrol, &ucontrol->id);
  806. return snd_hda_input_mux_put(codec, &spec->spdif_mux, ucontrol,
  807. spec->gen.autocfg.dig_out_pins[smux_idx],
  808. &spec->cur_smux[smux_idx]);
  809. }
  810. static struct snd_kcontrol_new stac_smux_mixer = {
  811. .iface = SNDRV_CTL_ELEM_IFACE_MIXER,
  812. .name = "IEC958 Playback Source",
  813. /* count set later */
  814. .info = stac_smux_enum_info,
  815. .get = stac_smux_enum_get,
  816. .put = stac_smux_enum_put,
  817. };
  818. static const char * const stac_spdif_labels[] = {
  819. "Digital Playback", "Analog Mux 1", "Analog Mux 2", NULL
  820. };
  821. static int stac_create_spdif_mux_ctls(struct hda_codec *codec)
  822. {
  823. struct sigmatel_spec *spec = codec->spec;
  824. struct auto_pin_cfg *cfg = &spec->gen.autocfg;
  825. const char * const *labels = spec->spdif_labels;
  826. struct snd_kcontrol_new *kctl;
  827. int i, num_cons;
  828. if (cfg->dig_outs < 1)
  829. return 0;
  830. num_cons = snd_hda_get_num_conns(codec, cfg->dig_out_pins[0]);
  831. if (num_cons <= 1)
  832. return 0;
  833. if (!labels)
  834. labels = stac_spdif_labels;
  835. for (i = 0; i < num_cons; i++) {
  836. if (snd_BUG_ON(!labels[i]))
  837. return -EINVAL;
  838. snd_hda_add_imux_item(&spec->spdif_mux, labels[i], i, NULL);
  839. }
  840. kctl = snd_hda_gen_add_kctl(&spec->gen, NULL, &stac_smux_mixer);
  841. if (!kctl)
  842. return -ENOMEM;
  843. kctl->count = cfg->dig_outs;
  844. return 0;
  845. }
  846. /*
  847. */
  848. static const struct hda_verb stac9200_core_init[] = {
  849. /* set dac0mux for dac converter */
  850. { 0x07, AC_VERB_SET_CONNECT_SEL, 0x00},
  851. {}
  852. };
  853. static const struct hda_verb stac9200_eapd_init[] = {
  854. /* set dac0mux for dac converter */
  855. {0x07, AC_VERB_SET_CONNECT_SEL, 0x00},
  856. {0x08, AC_VERB_SET_EAPD_BTLENABLE, 0x02},
  857. {}
  858. };
  859. static const struct hda_verb dell_eq_core_init[] = {
  860. /* set master volume to max value without distortion
  861. * and direct control */
  862. { 0x1f, AC_VERB_SET_VOLUME_KNOB_CONTROL, 0xec},
  863. {}
  864. };
  865. static const struct hda_verb stac92hd73xx_core_init[] = {
  866. /* set master volume and direct control */
  867. { 0x1f, AC_VERB_SET_VOLUME_KNOB_CONTROL, 0xff},
  868. {}
  869. };
  870. static const struct hda_verb stac92hd83xxx_core_init[] = {
  871. /* power state controls amps */
  872. { 0x01, AC_VERB_SET_EAPD, 1 << 2},
  873. {}
  874. };
  875. static const struct hda_verb stac92hd83xxx_hp_zephyr_init[] = {
  876. { 0x22, 0x785, 0x43 },
  877. { 0x22, 0x782, 0xe0 },
  878. { 0x22, 0x795, 0x00 },
  879. {}
  880. };
  881. static const struct hda_verb stac92hd71bxx_core_init[] = {
  882. /* set master volume and direct control */
  883. { 0x28, AC_VERB_SET_VOLUME_KNOB_CONTROL, 0xff},
  884. {}
  885. };
  886. static const struct hda_verb stac92hd71bxx_unmute_core_init[] = {
  887. /* unmute right and left channels for nodes 0x0f, 0xa, 0x0d */
  888. { 0x0f, AC_VERB_SET_AMP_GAIN_MUTE, AMP_IN_UNMUTE(0)},
  889. { 0x0a, AC_VERB_SET_AMP_GAIN_MUTE, AMP_IN_UNMUTE(0)},
  890. { 0x0d, AC_VERB_SET_AMP_GAIN_MUTE, AMP_IN_UNMUTE(0)},
  891. {}
  892. };
  893. static const struct hda_verb stac925x_core_init[] = {
  894. /* set dac0mux for dac converter */
  895. { 0x06, AC_VERB_SET_CONNECT_SEL, 0x00},
  896. /* mute the master volume */
  897. { 0x0e, AC_VERB_SET_AMP_GAIN_MUTE, AMP_OUT_MUTE },
  898. {}
  899. };
  900. static const struct hda_verb stac922x_core_init[] = {
  901. /* set master volume and direct control */
  902. { 0x16, AC_VERB_SET_VOLUME_KNOB_CONTROL, 0xff},
  903. {}
  904. };
  905. static const struct hda_verb d965_core_init[] = {
  906. /* unmute node 0x1b */
  907. { 0x1b, AC_VERB_SET_AMP_GAIN_MUTE, 0xb000},
  908. /* select node 0x03 as DAC */
  909. { 0x0b, AC_VERB_SET_CONNECT_SEL, 0x01},
  910. {}
  911. };
  912. static const struct hda_verb dell_3st_core_init[] = {
  913. /* don't set delta bit */
  914. {0x24, AC_VERB_SET_VOLUME_KNOB_CONTROL, 0x7f},
  915. /* unmute node 0x1b */
  916. {0x1b, AC_VERB_SET_AMP_GAIN_MUTE, 0xb000},
  917. /* select node 0x03 as DAC */
  918. {0x0b, AC_VERB_SET_CONNECT_SEL, 0x01},
  919. {}
  920. };
  921. static const struct hda_verb stac927x_core_init[] = {
  922. /* set master volume and direct control */
  923. { 0x24, AC_VERB_SET_VOLUME_KNOB_CONTROL, 0xff},
  924. /* enable analog pc beep path */
  925. { 0x01, AC_VERB_SET_DIGI_CONVERT_2, 1 << 5},
  926. {}
  927. };
  928. static const struct hda_verb stac927x_volknob_core_init[] = {
  929. /* don't set delta bit */
  930. {0x24, AC_VERB_SET_VOLUME_KNOB_CONTROL, 0x7f},
  931. /* enable analog pc beep path */
  932. {0x01, AC_VERB_SET_DIGI_CONVERT_2, 1 << 5},
  933. {}
  934. };
  935. static const struct hda_verb stac9205_core_init[] = {
  936. /* set master volume and direct control */
  937. { 0x24, AC_VERB_SET_VOLUME_KNOB_CONTROL, 0xff},
  938. /* enable analog pc beep path */
  939. { 0x01, AC_VERB_SET_DIGI_CONVERT_2, 1 << 5},
  940. {}
  941. };
  942. static const struct snd_kcontrol_new stac92hd73xx_6ch_loopback =
  943. STAC_ANALOG_LOOPBACK(0xFA0, 0x7A1, 3);
  944. static const struct snd_kcontrol_new stac92hd73xx_8ch_loopback =
  945. STAC_ANALOG_LOOPBACK(0xFA0, 0x7A1, 4);
  946. static const struct snd_kcontrol_new stac92hd73xx_10ch_loopback =
  947. STAC_ANALOG_LOOPBACK(0xFA0, 0x7A1, 5);
  948. static const struct snd_kcontrol_new stac92hd71bxx_loopback =
  949. STAC_ANALOG_LOOPBACK(0xFA0, 0x7A0, 2);
  950. static const struct snd_kcontrol_new stac9205_loopback =
  951. STAC_ANALOG_LOOPBACK(0xFE0, 0x7E0, 1);
  952. static const struct snd_kcontrol_new stac927x_loopback =
  953. STAC_ANALOG_LOOPBACK(0xFEB, 0x7EB, 1);
  954. static const struct hda_pintbl ref9200_pin_configs[] = {
  955. { 0x08, 0x01c47010 },
  956. { 0x09, 0x01447010 },
  957. { 0x0d, 0x0221401f },
  958. { 0x0e, 0x01114010 },
  959. { 0x0f, 0x02a19020 },
  960. { 0x10, 0x01a19021 },
  961. { 0x11, 0x90100140 },
  962. { 0x12, 0x01813122 },
  963. {}
  964. };
  965. static const struct hda_pintbl gateway9200_m4_pin_configs[] = {
  966. { 0x08, 0x400000fe },
  967. { 0x09, 0x404500f4 },
  968. { 0x0d, 0x400100f0 },
  969. { 0x0e, 0x90110010 },
  970. { 0x0f, 0x400100f1 },
  971. { 0x10, 0x02a1902e },
  972. { 0x11, 0x500000f2 },
  973. { 0x12, 0x500000f3 },
  974. {}
  975. };
  976. static const struct hda_pintbl gateway9200_m4_2_pin_configs[] = {
  977. { 0x08, 0x400000fe },
  978. { 0x09, 0x404500f4 },
  979. { 0x0d, 0x400100f0 },
  980. { 0x0e, 0x90110010 },
  981. { 0x0f, 0x400100f1 },
  982. { 0x10, 0x02a1902e },
  983. { 0x11, 0x500000f2 },
  984. { 0x12, 0x500000f3 },
  985. {}
  986. };
  987. /*
  988. STAC 9200 pin configs for
  989. 102801A8
  990. 102801DE
  991. 102801E8
  992. */
  993. static const struct hda_pintbl dell9200_d21_pin_configs[] = {
  994. { 0x08, 0x400001f0 },
  995. { 0x09, 0x400001f1 },
  996. { 0x0d, 0x02214030 },
  997. { 0x0e, 0x01014010 },
  998. { 0x0f, 0x02a19020 },
  999. { 0x10, 0x01a19021 },
  1000. { 0x11, 0x90100140 },
  1001. { 0x12, 0x01813122 },
  1002. {}
  1003. };
  1004. /*
  1005. STAC 9200 pin configs for
  1006. 102801C0
  1007. 102801C1
  1008. */
  1009. static const struct hda_pintbl dell9200_d22_pin_configs[] = {
  1010. { 0x08, 0x400001f0 },
  1011. { 0x09, 0x400001f1 },
  1012. { 0x0d, 0x0221401f },
  1013. { 0x0e, 0x01014010 },
  1014. { 0x0f, 0x01813020 },
  1015. { 0x10, 0x02a19021 },
  1016. { 0x11, 0x90100140 },
  1017. { 0x12, 0x400001f2 },
  1018. {}
  1019. };
  1020. /*
  1021. STAC 9200 pin configs for
  1022. 102801C4 (Dell Dimension E310)
  1023. 102801C5
  1024. 102801C7
  1025. 102801D9
  1026. 102801DA
  1027. 102801E3
  1028. */
  1029. static const struct hda_pintbl dell9200_d23_pin_configs[] = {
  1030. { 0x08, 0x400001f0 },
  1031. { 0x09, 0x400001f1 },
  1032. { 0x0d, 0x0221401f },
  1033. { 0x0e, 0x01014010 },
  1034. { 0x0f, 0x01813020 },
  1035. { 0x10, 0x01a19021 },
  1036. { 0x11, 0x90100140 },
  1037. { 0x12, 0x400001f2 },
  1038. {}
  1039. };
  1040. /*
  1041. STAC 9200-32 pin configs for
  1042. 102801B5 (Dell Inspiron 630m)
  1043. 102801D8 (Dell Inspiron 640m)
  1044. */
  1045. static const struct hda_pintbl dell9200_m21_pin_configs[] = {
  1046. { 0x08, 0x40c003fa },
  1047. { 0x09, 0x03441340 },
  1048. { 0x0d, 0x0321121f },
  1049. { 0x0e, 0x90170310 },
  1050. { 0x0f, 0x408003fb },
  1051. { 0x10, 0x03a11020 },
  1052. { 0x11, 0x401003fc },
  1053. { 0x12, 0x403003fd },
  1054. {}
  1055. };
  1056. /*
  1057. STAC 9200-32 pin configs for
  1058. 102801C2 (Dell Latitude D620)
  1059. 102801C8
  1060. 102801CC (Dell Latitude D820)
  1061. 102801D4
  1062. 102801D6
  1063. */
  1064. static const struct hda_pintbl dell9200_m22_pin_configs[] = {
  1065. { 0x08, 0x40c003fa },
  1066. { 0x09, 0x0144131f },
  1067. { 0x0d, 0x0321121f },
  1068. { 0x0e, 0x90170310 },
  1069. { 0x0f, 0x90a70321 },
  1070. { 0x10, 0x03a11020 },
  1071. { 0x11, 0x401003fb },
  1072. { 0x12, 0x40f000fc },
  1073. {}
  1074. };
  1075. /*
  1076. STAC 9200-32 pin configs for
  1077. 102801CE (Dell XPS M1710)
  1078. 102801CF (Dell Precision M90)
  1079. */
  1080. static const struct hda_pintbl dell9200_m23_pin_configs[] = {
  1081. { 0x08, 0x40c003fa },
  1082. { 0x09, 0x01441340 },
  1083. { 0x0d, 0x0421421f },
  1084. { 0x0e, 0x90170310 },
  1085. { 0x0f, 0x408003fb },
  1086. { 0x10, 0x04a1102e },
  1087. { 0x11, 0x90170311 },
  1088. { 0x12, 0x403003fc },
  1089. {}
  1090. };
  1091. /*
  1092. STAC 9200-32 pin configs for
  1093. 102801C9
  1094. 102801CA
  1095. 102801CB (Dell Latitude 120L)
  1096. 102801D3
  1097. */
  1098. static const struct hda_pintbl dell9200_m24_pin_configs[] = {
  1099. { 0x08, 0x40c003fa },
  1100. { 0x09, 0x404003fb },
  1101. { 0x0d, 0x0321121f },
  1102. { 0x0e, 0x90170310 },
  1103. { 0x0f, 0x408003fc },
  1104. { 0x10, 0x03a11020 },
  1105. { 0x11, 0x401003fd },
  1106. { 0x12, 0x403003fe },
  1107. {}
  1108. };
  1109. /*
  1110. STAC 9200-32 pin configs for
  1111. 102801BD (Dell Inspiron E1505n)
  1112. 102801EE
  1113. 102801EF
  1114. */
  1115. static const struct hda_pintbl dell9200_m25_pin_configs[] = {
  1116. { 0x08, 0x40c003fa },
  1117. { 0x09, 0x01441340 },
  1118. { 0x0d, 0x0421121f },
  1119. { 0x0e, 0x90170310 },
  1120. { 0x0f, 0x408003fb },
  1121. { 0x10, 0x04a11020 },
  1122. { 0x11, 0x401003fc },
  1123. { 0x12, 0x403003fd },
  1124. {}
  1125. };
  1126. /*
  1127. STAC 9200-32 pin configs for
  1128. 102801F5 (Dell Inspiron 1501)
  1129. 102801F6
  1130. */
  1131. static const struct hda_pintbl dell9200_m26_pin_configs[] = {
  1132. { 0x08, 0x40c003fa },
  1133. { 0x09, 0x404003fb },
  1134. { 0x0d, 0x0421121f },
  1135. { 0x0e, 0x90170310 },
  1136. { 0x0f, 0x408003fc },
  1137. { 0x10, 0x04a11020 },
  1138. { 0x11, 0x401003fd },
  1139. { 0x12, 0x403003fe },
  1140. {}
  1141. };
  1142. /*
  1143. STAC 9200-32
  1144. 102801CD (Dell Inspiron E1705/9400)
  1145. */
  1146. static const struct hda_pintbl dell9200_m27_pin_configs[] = {
  1147. { 0x08, 0x40c003fa },
  1148. { 0x09, 0x01441340 },
  1149. { 0x0d, 0x0421121f },
  1150. { 0x0e, 0x90170310 },
  1151. { 0x0f, 0x90170310 },
  1152. { 0x10, 0x04a11020 },
  1153. { 0x11, 0x90170310 },
  1154. { 0x12, 0x40f003fc },
  1155. {}
  1156. };
  1157. static const struct hda_pintbl oqo9200_pin_configs[] = {
  1158. { 0x08, 0x40c000f0 },
  1159. { 0x09, 0x404000f1 },
  1160. { 0x0d, 0x0221121f },
  1161. { 0x0e, 0x02211210 },
  1162. { 0x0f, 0x90170111 },
  1163. { 0x10, 0x90a70120 },
  1164. { 0x11, 0x400000f2 },
  1165. { 0x12, 0x400000f3 },
  1166. {}
  1167. };
  1168. static void stac9200_fixup_panasonic(struct hda_codec *codec,
  1169. const struct hda_fixup *fix, int action)
  1170. {
  1171. struct sigmatel_spec *spec = codec->spec;
  1172. if (action == HDA_FIXUP_ACT_PRE_PROBE) {
  1173. spec->gpio_mask = spec->gpio_dir = 0x09;
  1174. spec->gpio_data = 0x00;
  1175. /* CF-74 has no headphone detection, and the driver should *NOT*
  1176. * do detection and HP/speaker toggle because the hardware does it.
  1177. */
  1178. spec->gen.suppress_auto_mute = 1;
  1179. }
  1180. }
  1181. static const struct hda_fixup stac9200_fixups[] = {
  1182. [STAC_REF] = {
  1183. .type = HDA_FIXUP_PINS,
  1184. .v.pins = ref9200_pin_configs,
  1185. },
  1186. [STAC_9200_OQO] = {
  1187. .type = HDA_FIXUP_PINS,
  1188. .v.pins = oqo9200_pin_configs,
  1189. .chained = true,
  1190. .chain_id = STAC_9200_EAPD_INIT,
  1191. },
  1192. [STAC_9200_DELL_D21] = {
  1193. .type = HDA_FIXUP_PINS,
  1194. .v.pins = dell9200_d21_pin_configs,
  1195. },
  1196. [STAC_9200_DELL_D22] = {
  1197. .type = HDA_FIXUP_PINS,
  1198. .v.pins = dell9200_d22_pin_configs,
  1199. },
  1200. [STAC_9200_DELL_D23] = {
  1201. .type = HDA_FIXUP_PINS,
  1202. .v.pins = dell9200_d23_pin_configs,
  1203. },
  1204. [STAC_9200_DELL_M21] = {
  1205. .type = HDA_FIXUP_PINS,
  1206. .v.pins = dell9200_m21_pin_configs,
  1207. },
  1208. [STAC_9200_DELL_M22] = {
  1209. .type = HDA_FIXUP_PINS,
  1210. .v.pins = dell9200_m22_pin_configs,
  1211. },
  1212. [STAC_9200_DELL_M23] = {
  1213. .type = HDA_FIXUP_PINS,
  1214. .v.pins = dell9200_m23_pin_configs,
  1215. },
  1216. [STAC_9200_DELL_M24] = {
  1217. .type = HDA_FIXUP_PINS,
  1218. .v.pins = dell9200_m24_pin_configs,
  1219. },
  1220. [STAC_9200_DELL_M25] = {
  1221. .type = HDA_FIXUP_PINS,
  1222. .v.pins = dell9200_m25_pin_configs,
  1223. },
  1224. [STAC_9200_DELL_M26] = {
  1225. .type = HDA_FIXUP_PINS,
  1226. .v.pins = dell9200_m26_pin_configs,
  1227. },
  1228. [STAC_9200_DELL_M27] = {
  1229. .type = HDA_FIXUP_PINS,
  1230. .v.pins = dell9200_m27_pin_configs,
  1231. },
  1232. [STAC_9200_M4] = {
  1233. .type = HDA_FIXUP_PINS,
  1234. .v.pins = gateway9200_m4_pin_configs,
  1235. .chained = true,
  1236. .chain_id = STAC_9200_EAPD_INIT,
  1237. },
  1238. [STAC_9200_M4_2] = {
  1239. .type = HDA_FIXUP_PINS,
  1240. .v.pins = gateway9200_m4_2_pin_configs,
  1241. .chained = true,
  1242. .chain_id = STAC_9200_EAPD_INIT,
  1243. },
  1244. [STAC_9200_PANASONIC] = {
  1245. .type = HDA_FIXUP_FUNC,
  1246. .v.func = stac9200_fixup_panasonic,
  1247. },
  1248. [STAC_9200_EAPD_INIT] = {
  1249. .type = HDA_FIXUP_VERBS,
  1250. .v.verbs = (const struct hda_verb[]) {
  1251. {0x08, AC_VERB_SET_EAPD_BTLENABLE, 0x02},
  1252. {}
  1253. },
  1254. },
  1255. };
  1256. static const struct hda_model_fixup stac9200_models[] = {
  1257. { .id = STAC_REF, .name = "ref" },
  1258. { .id = STAC_9200_OQO, .name = "oqo" },
  1259. { .id = STAC_9200_DELL_D21, .name = "dell-d21" },
  1260. { .id = STAC_9200_DELL_D22, .name = "dell-d22" },
  1261. { .id = STAC_9200_DELL_D23, .name = "dell-d23" },
  1262. { .id = STAC_9200_DELL_M21, .name = "dell-m21" },
  1263. { .id = STAC_9200_DELL_M22, .name = "dell-m22" },
  1264. { .id = STAC_9200_DELL_M23, .name = "dell-m23" },
  1265. { .id = STAC_9200_DELL_M24, .name = "dell-m24" },
  1266. { .id = STAC_9200_DELL_M25, .name = "dell-m25" },
  1267. { .id = STAC_9200_DELL_M26, .name = "dell-m26" },
  1268. { .id = STAC_9200_DELL_M27, .name = "dell-m27" },
  1269. { .id = STAC_9200_M4, .name = "gateway-m4" },
  1270. { .id = STAC_9200_M4_2, .name = "gateway-m4-2" },
  1271. { .id = STAC_9200_PANASONIC, .name = "panasonic" },
  1272. {}
  1273. };
  1274. static const struct snd_pci_quirk stac9200_fixup_tbl[] = {
  1275. /* SigmaTel reference board */
  1276. SND_PCI_QUIRK(PCI_VENDOR_ID_INTEL, 0x2668,
  1277. "DFI LanParty", STAC_REF),
  1278. SND_PCI_QUIRK(PCI_VENDOR_ID_DFI, 0x3101,
  1279. "DFI LanParty", STAC_REF),
  1280. /* Dell laptops have BIOS problem */
  1281. SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x01a8,
  1282. "unknown Dell", STAC_9200_DELL_D21),
  1283. SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x01b5,
  1284. "Dell Inspiron 630m", STAC_9200_DELL_M21),
  1285. SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x01bd,
  1286. "Dell Inspiron E1505n", STAC_9200_DELL_M25),
  1287. SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x01c0,
  1288. "unknown Dell", STAC_9200_DELL_D22),
  1289. SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x01c1,
  1290. "unknown Dell", STAC_9200_DELL_D22),
  1291. SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x01c2,
  1292. "Dell Latitude D620", STAC_9200_DELL_M22),
  1293. SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x01c5,
  1294. "unknown Dell", STAC_9200_DELL_D23),
  1295. SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x01c7,
  1296. "unknown Dell", STAC_9200_DELL_D23),
  1297. SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x01c8,
  1298. "unknown Dell", STAC_9200_DELL_M22),
  1299. SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x01c9,
  1300. "unknown Dell", STAC_9200_DELL_M24),
  1301. SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x01ca,
  1302. "unknown Dell", STAC_9200_DELL_M24),
  1303. SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x01cb,
  1304. "Dell Latitude 120L", STAC_9200_DELL_M24),
  1305. SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x01cc,
  1306. "Dell Latitude D820", STAC_9200_DELL_M22),
  1307. SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x01cd,
  1308. "Dell Inspiron E1705/9400", STAC_9200_DELL_M27),
  1309. SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x01ce,
  1310. "Dell XPS M1710", STAC_9200_DELL_M23),
  1311. SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x01cf,
  1312. "Dell Precision M90", STAC_9200_DELL_M23),
  1313. SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x01d3,
  1314. "unknown Dell", STAC_9200_DELL_M22),
  1315. SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x01d4,
  1316. "unknown Dell", STAC_9200_DELL_M22),
  1317. SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x01d6,
  1318. "unknown Dell", STAC_9200_DELL_M22),
  1319. SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x01d8,
  1320. "Dell Inspiron 640m", STAC_9200_DELL_M21),
  1321. SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x01d9,
  1322. "unknown Dell", STAC_9200_DELL_D23),
  1323. SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x01da,
  1324. "unknown Dell", STAC_9200_DELL_D23),
  1325. SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x01de,
  1326. "unknown Dell", STAC_9200_DELL_D21),
  1327. SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x01e3,
  1328. "unknown Dell", STAC_9200_DELL_D23),
  1329. SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x01e8,
  1330. "unknown Dell", STAC_9200_DELL_D21),
  1331. SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x01ee,
  1332. "unknown Dell", STAC_9200_DELL_M25),
  1333. SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x01ef,
  1334. "unknown Dell", STAC_9200_DELL_M25),
  1335. SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x01f5,
  1336. "Dell Inspiron 1501", STAC_9200_DELL_M26),
  1337. SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x01f6,
  1338. "unknown Dell", STAC_9200_DELL_M26),
  1339. /* Panasonic */
  1340. SND_PCI_QUIRK(0x10f7, 0x8338, "Panasonic CF-74", STAC_9200_PANASONIC),
  1341. /* Gateway machines needs EAPD to be set on resume */
  1342. SND_PCI_QUIRK(0x107b, 0x0205, "Gateway S-7110M", STAC_9200_M4),
  1343. SND_PCI_QUIRK(0x107b, 0x0317, "Gateway MT3423, MX341*", STAC_9200_M4_2),
  1344. SND_PCI_QUIRK(0x107b, 0x0318, "Gateway ML3019, MT3707", STAC_9200_M4_2),
  1345. /* OQO Mobile */
  1346. SND_PCI_QUIRK(0x1106, 0x3288, "OQO Model 2", STAC_9200_OQO),
  1347. {} /* terminator */
  1348. };
  1349. static const struct hda_pintbl ref925x_pin_configs[] = {
  1350. { 0x07, 0x40c003f0 },
  1351. { 0x08, 0x424503f2 },
  1352. { 0x0a, 0x01813022 },
  1353. { 0x0b, 0x02a19021 },
  1354. { 0x0c, 0x90a70320 },
  1355. { 0x0d, 0x02214210 },
  1356. { 0x10, 0x01019020 },
  1357. { 0x11, 0x9033032e },
  1358. {}
  1359. };
  1360. static const struct hda_pintbl stac925xM1_pin_configs[] = {
  1361. { 0x07, 0x40c003f4 },
  1362. { 0x08, 0x424503f2 },
  1363. { 0x0a, 0x400000f3 },
  1364. { 0x0b, 0x02a19020 },
  1365. { 0x0c, 0x40a000f0 },
  1366. { 0x0d, 0x90100210 },
  1367. { 0x10, 0x400003f1 },
  1368. { 0x11, 0x9033032e },
  1369. {}
  1370. };
  1371. static const struct hda_pintbl stac925xM1_2_pin_configs[] = {
  1372. { 0x07, 0x40c003f4 },
  1373. { 0x08, 0x424503f2 },
  1374. { 0x0a, 0x400000f3 },
  1375. { 0x0b, 0x02a19020 },
  1376. { 0x0c, 0x40a000f0 },
  1377. { 0x0d, 0x90100210 },
  1378. { 0x10, 0x400003f1 },
  1379. { 0x11, 0x9033032e },
  1380. {}
  1381. };
  1382. static const struct hda_pintbl stac925xM2_pin_configs[] = {
  1383. { 0x07, 0x40c003f4 },
  1384. { 0x08, 0x424503f2 },
  1385. { 0x0a, 0x400000f3 },
  1386. { 0x0b, 0x02a19020 },
  1387. { 0x0c, 0x40a000f0 },
  1388. { 0x0d, 0x90100210 },
  1389. { 0x10, 0x400003f1 },
  1390. { 0x11, 0x9033032e },
  1391. {}
  1392. };
  1393. static const struct hda_pintbl stac925xM2_2_pin_configs[] = {
  1394. { 0x07, 0x40c003f4 },
  1395. { 0x08, 0x424503f2 },
  1396. { 0x0a, 0x400000f3 },
  1397. { 0x0b, 0x02a19020 },
  1398. { 0x0c, 0x40a000f0 },
  1399. { 0x0d, 0x90100210 },
  1400. { 0x10, 0x400003f1 },
  1401. { 0x11, 0x9033032e },
  1402. {}
  1403. };
  1404. static const struct hda_pintbl stac925xM3_pin_configs[] = {
  1405. { 0x07, 0x40c003f4 },
  1406. { 0x08, 0x424503f2 },
  1407. { 0x0a, 0x400000f3 },
  1408. { 0x0b, 0x02a19020 },
  1409. { 0x0c, 0x40a000f0 },
  1410. { 0x0d, 0x90100210 },
  1411. { 0x10, 0x400003f1 },
  1412. { 0x11, 0x503303f3 },
  1413. {}
  1414. };
  1415. static const struct hda_pintbl stac925xM5_pin_configs[] = {
  1416. { 0x07, 0x40c003f4 },
  1417. { 0x08, 0x424503f2 },
  1418. { 0x0a, 0x400000f3 },
  1419. { 0x0b, 0x02a19020 },
  1420. { 0x0c, 0x40a000f0 },
  1421. { 0x0d, 0x90100210 },
  1422. { 0x10, 0x400003f1 },
  1423. { 0x11, 0x9033032e },
  1424. {}
  1425. };
  1426. static const struct hda_pintbl stac925xM6_pin_configs[] = {
  1427. { 0x07, 0x40c003f4 },
  1428. { 0x08, 0x424503f2 },
  1429. { 0x0a, 0x400000f3 },
  1430. { 0x0b, 0x02a19020 },
  1431. { 0x0c, 0x40a000f0 },
  1432. { 0x0d, 0x90100210 },
  1433. { 0x10, 0x400003f1 },
  1434. { 0x11, 0x90330320 },
  1435. {}
  1436. };
  1437. static const struct hda_fixup stac925x_fixups[] = {
  1438. [STAC_REF] = {
  1439. .type = HDA_FIXUP_PINS,
  1440. .v.pins = ref925x_pin_configs,
  1441. },
  1442. [STAC_M1] = {
  1443. .type = HDA_FIXUP_PINS,
  1444. .v.pins = stac925xM1_pin_configs,
  1445. },
  1446. [STAC_M1_2] = {
  1447. .type = HDA_FIXUP_PINS,
  1448. .v.pins = stac925xM1_2_pin_configs,
  1449. },
  1450. [STAC_M2] = {
  1451. .type = HDA_FIXUP_PINS,
  1452. .v.pins = stac925xM2_pin_configs,
  1453. },
  1454. [STAC_M2_2] = {
  1455. .type = HDA_FIXUP_PINS,
  1456. .v.pins = stac925xM2_2_pin_configs,
  1457. },
  1458. [STAC_M3] = {
  1459. .type = HDA_FIXUP_PINS,
  1460. .v.pins = stac925xM3_pin_configs,
  1461. },
  1462. [STAC_M5] = {
  1463. .type = HDA_FIXUP_PINS,
  1464. .v.pins = stac925xM5_pin_configs,
  1465. },
  1466. [STAC_M6] = {
  1467. .type = HDA_FIXUP_PINS,
  1468. .v.pins = stac925xM6_pin_configs,
  1469. },
  1470. };
  1471. static const struct hda_model_fixup stac925x_models[] = {
  1472. { .id = STAC_REF, .name = "ref" },
  1473. { .id = STAC_M1, .name = "m1" },
  1474. { .id = STAC_M1_2, .name = "m1-2" },
  1475. { .id = STAC_M2, .name = "m2" },
  1476. { .id = STAC_M2_2, .name = "m2-2" },
  1477. { .id = STAC_M3, .name = "m3" },
  1478. { .id = STAC_M5, .name = "m5" },
  1479. { .id = STAC_M6, .name = "m6" },
  1480. {}
  1481. };
  1482. static const struct snd_pci_quirk stac925x_fixup_tbl[] = {
  1483. /* SigmaTel reference board */
  1484. SND_PCI_QUIRK(PCI_VENDOR_ID_INTEL, 0x2668, "DFI LanParty", STAC_REF),
  1485. SND_PCI_QUIRK(PCI_VENDOR_ID_DFI, 0x3101, "DFI LanParty", STAC_REF),
  1486. SND_PCI_QUIRK(0x8384, 0x7632, "Stac9202 Reference Board", STAC_REF),
  1487. /* Default table for unknown ID */
  1488. SND_PCI_QUIRK(0x1002, 0x437b, "Gateway mobile", STAC_M2_2),
  1489. /* gateway machines are checked via codec ssid */
  1490. SND_PCI_QUIRK(0x107b, 0x0316, "Gateway M255", STAC_M2),
  1491. SND_PCI_QUIRK(0x107b, 0x0366, "Gateway MP6954", STAC_M5),
  1492. SND_PCI_QUIRK(0x107b, 0x0461, "Gateway NX560XL", STAC_M1),
  1493. SND_PCI_QUIRK(0x107b, 0x0681, "Gateway NX860", STAC_M2),
  1494. SND_PCI_QUIRK(0x107b, 0x0367, "Gateway MX6453", STAC_M1_2),
  1495. /* Not sure about the brand name for those */
  1496. SND_PCI_QUIRK(0x107b, 0x0281, "Gateway mobile", STAC_M1),
  1497. SND_PCI_QUIRK(0x107b, 0x0507, "Gateway mobile", STAC_M3),
  1498. SND_PCI_QUIRK(0x107b, 0x0281, "Gateway mobile", STAC_M6),
  1499. SND_PCI_QUIRK(0x107b, 0x0685, "Gateway mobile", STAC_M2_2),
  1500. {} /* terminator */
  1501. };
  1502. static const struct hda_pintbl ref92hd73xx_pin_configs[] = {
  1503. { 0x0a, 0x02214030 },
  1504. { 0x0b, 0x02a19040 },
  1505. { 0x0c, 0x01a19020 },
  1506. { 0x0d, 0x02214030 },
  1507. { 0x0e, 0x0181302e },
  1508. { 0x0f, 0x01014010 },
  1509. { 0x10, 0x01014020 },
  1510. { 0x11, 0x01014030 },
  1511. { 0x12, 0x02319040 },
  1512. { 0x13, 0x90a000f0 },
  1513. { 0x14, 0x90a000f0 },
  1514. { 0x22, 0x01452050 },
  1515. { 0x23, 0x01452050 },
  1516. {}
  1517. };
  1518. static const struct hda_pintbl dell_m6_pin_configs[] = {
  1519. { 0x0a, 0x0321101f },
  1520. { 0x0b, 0x4f00000f },
  1521. { 0x0c, 0x4f0000f0 },
  1522. { 0x0d, 0x90170110 },
  1523. { 0x0e, 0x03a11020 },
  1524. { 0x0f, 0x0321101f },
  1525. { 0x10, 0x4f0000f0 },
  1526. { 0x11, 0x4f0000f0 },
  1527. { 0x12, 0x4f0000f0 },
  1528. { 0x13, 0x90a60160 },
  1529. { 0x14, 0x4f0000f0 },
  1530. { 0x22, 0x4f0000f0 },
  1531. { 0x23, 0x4f0000f0 },
  1532. {}
  1533. };
  1534. static const struct hda_pintbl alienware_m17x_pin_configs[] = {
  1535. { 0x0a, 0x0321101f },
  1536. { 0x0b, 0x0321101f },
  1537. { 0x0c, 0x03a11020 },
  1538. { 0x0d, 0x03014020 },
  1539. { 0x0e, 0x90170110 },
  1540. { 0x0f, 0x4f0000f0 },
  1541. { 0x10, 0x4f0000f0 },
  1542. { 0x11, 0x4f0000f0 },
  1543. { 0x12, 0x4f0000f0 },
  1544. { 0x13, 0x90a60160 },
  1545. { 0x14, 0x4f0000f0 },
  1546. { 0x22, 0x4f0000f0 },
  1547. { 0x23, 0x904601b0 },
  1548. {}
  1549. };
  1550. static const struct hda_pintbl intel_dg45id_pin_configs[] = {
  1551. { 0x0a, 0x02214230 },
  1552. { 0x0b, 0x02A19240 },
  1553. { 0x0c, 0x01013214 },
  1554. { 0x0d, 0x01014210 },
  1555. { 0x0e, 0x01A19250 },
  1556. { 0x0f, 0x01011212 },
  1557. { 0x10, 0x01016211 },
  1558. {}
  1559. };
  1560. static void stac92hd73xx_fixup_ref(struct hda_codec *codec,
  1561. const struct hda_fixup *fix, int action)
  1562. {
  1563. struct sigmatel_spec *spec = codec->spec;
  1564. if (action != HDA_FIXUP_ACT_PRE_PROBE)
  1565. return;
  1566. snd_hda_apply_pincfgs(codec, ref92hd73xx_pin_configs);
  1567. spec->gpio_mask = spec->gpio_dir = spec->gpio_data = 0;
  1568. }
  1569. static void stac92hd73xx_fixup_dell(struct hda_codec *codec)
  1570. {
  1571. struct sigmatel_spec *spec = codec->spec;
  1572. snd_hda_apply_pincfgs(codec, dell_m6_pin_configs);
  1573. spec->eapd_switch = 0;
  1574. }
  1575. static void stac92hd73xx_fixup_dell_eq(struct hda_codec *codec,
  1576. const struct hda_fixup *fix, int action)
  1577. {
  1578. struct sigmatel_spec *spec = codec->spec;
  1579. if (action != HDA_FIXUP_ACT_PRE_PROBE)
  1580. return;
  1581. stac92hd73xx_fixup_dell(codec);
  1582. snd_hda_add_verbs(codec, dell_eq_core_init);
  1583. spec->volknob_init = 1;
  1584. }
  1585. /* Analog Mics */
  1586. static void stac92hd73xx_fixup_dell_m6_amic(struct hda_codec *codec,
  1587. const struct hda_fixup *fix, int action)
  1588. {
  1589. if (action != HDA_FIXUP_ACT_PRE_PROBE)
  1590. return;
  1591. stac92hd73xx_fixup_dell(codec);
  1592. snd_hda_codec_set_pincfg(codec, 0x0b, 0x90A70170);
  1593. }
  1594. /* Digital Mics */
  1595. static void stac92hd73xx_fixup_dell_m6_dmic(struct hda_codec *codec,
  1596. const struct hda_fixup *fix, int action)
  1597. {
  1598. if (action != HDA_FIXUP_ACT_PRE_PROBE)
  1599. return;
  1600. stac92hd73xx_fixup_dell(codec);
  1601. snd_hda_codec_set_pincfg(codec, 0x13, 0x90A60160);
  1602. }
  1603. /* Both */
  1604. static void stac92hd73xx_fixup_dell_m6_both(struct hda_codec *codec,
  1605. const struct hda_fixup *fix, int action)
  1606. {
  1607. if (action != HDA_FIXUP_ACT_PRE_PROBE)
  1608. return;
  1609. stac92hd73xx_fixup_dell(codec);
  1610. snd_hda_codec_set_pincfg(codec, 0x0b, 0x90A70170);
  1611. snd_hda_codec_set_pincfg(codec, 0x13, 0x90A60160);
  1612. }
  1613. static void stac92hd73xx_fixup_alienware_m17x(struct hda_codec *codec,
  1614. const struct hda_fixup *fix, int action)
  1615. {
  1616. struct sigmatel_spec *spec = codec->spec;
  1617. if (action != HDA_FIXUP_ACT_PRE_PROBE)
  1618. return;
  1619. snd_hda_apply_pincfgs(codec, alienware_m17x_pin_configs);
  1620. spec->eapd_switch = 0;
  1621. }
  1622. static void stac92hd73xx_fixup_no_jd(struct hda_codec *codec,
  1623. const struct hda_fixup *fix, int action)
  1624. {
  1625. if (action == HDA_FIXUP_ACT_PRE_PROBE)
  1626. codec->no_jack_detect = 1;
  1627. }
  1628. static const struct hda_fixup stac92hd73xx_fixups[] = {
  1629. [STAC_92HD73XX_REF] = {
  1630. .type = HDA_FIXUP_FUNC,
  1631. .v.func = stac92hd73xx_fixup_ref,
  1632. },
  1633. [STAC_DELL_M6_AMIC] = {
  1634. .type = HDA_FIXUP_FUNC,
  1635. .v.func = stac92hd73xx_fixup_dell_m6_amic,
  1636. },
  1637. [STAC_DELL_M6_DMIC] = {
  1638. .type = HDA_FIXUP_FUNC,
  1639. .v.func = stac92hd73xx_fixup_dell_m6_dmic,
  1640. },
  1641. [STAC_DELL_M6_BOTH] = {
  1642. .type = HDA_FIXUP_FUNC,
  1643. .v.func = stac92hd73xx_fixup_dell_m6_both,
  1644. },
  1645. [STAC_DELL_EQ] = {
  1646. .type = HDA_FIXUP_FUNC,
  1647. .v.func = stac92hd73xx_fixup_dell_eq,
  1648. },
  1649. [STAC_ALIENWARE_M17X] = {
  1650. .type = HDA_FIXUP_FUNC,
  1651. .v.func = stac92hd73xx_fixup_alienware_m17x,
  1652. },
  1653. [STAC_92HD73XX_INTEL] = {
  1654. .type = HDA_FIXUP_PINS,
  1655. .v.pins = intel_dg45id_pin_configs,
  1656. },
  1657. [STAC_92HD73XX_NO_JD] = {
  1658. .type = HDA_FIXUP_FUNC,
  1659. .v.func = stac92hd73xx_fixup_no_jd,
  1660. }
  1661. };
  1662. static const struct hda_model_fixup stac92hd73xx_models[] = {
  1663. { .id = STAC_92HD73XX_NO_JD, .name = "no-jd" },
  1664. { .id = STAC_92HD73XX_REF, .name = "ref" },
  1665. { .id = STAC_92HD73XX_INTEL, .name = "intel" },
  1666. { .id = STAC_DELL_M6_AMIC, .name = "dell-m6-amic" },
  1667. { .id = STAC_DELL_M6_DMIC, .name = "dell-m6-dmic" },
  1668. { .id = STAC_DELL_M6_BOTH, .name = "dell-m6" },
  1669. { .id = STAC_DELL_EQ, .name = "dell-eq" },
  1670. { .id = STAC_ALIENWARE_M17X, .name = "alienware" },
  1671. {}
  1672. };
  1673. static const struct snd_pci_quirk stac92hd73xx_fixup_tbl[] = {
  1674. /* SigmaTel reference board */
  1675. SND_PCI_QUIRK(PCI_VENDOR_ID_INTEL, 0x2668,
  1676. "DFI LanParty", STAC_92HD73XX_REF),
  1677. SND_PCI_QUIRK(PCI_VENDOR_ID_DFI, 0x3101,
  1678. "DFI LanParty", STAC_92HD73XX_REF),
  1679. SND_PCI_QUIRK(PCI_VENDOR_ID_INTEL, 0x5002,
  1680. "Intel DG45ID", STAC_92HD73XX_INTEL),
  1681. SND_PCI_QUIRK(PCI_VENDOR_ID_INTEL, 0x5003,
  1682. "Intel DG45FC", STAC_92HD73XX_INTEL),
  1683. SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x0254,
  1684. "Dell Studio 1535", STAC_DELL_M6_DMIC),
  1685. SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x0255,
  1686. "unknown Dell", STAC_DELL_M6_DMIC),
  1687. SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x0256,
  1688. "unknown Dell", STAC_DELL_M6_BOTH),
  1689. SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x0257,
  1690. "unknown Dell", STAC_DELL_M6_BOTH),
  1691. SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x025e,
  1692. "unknown Dell", STAC_DELL_M6_AMIC),
  1693. SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x025f,
  1694. "unknown Dell", STAC_DELL_M6_AMIC),
  1695. SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x0271,
  1696. "unknown Dell", STAC_DELL_M6_DMIC),
  1697. SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x0272,
  1698. "unknown Dell", STAC_DELL_M6_DMIC),
  1699. SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x029f,
  1700. "Dell Studio 1537", STAC_DELL_M6_DMIC),
  1701. SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x02a0,
  1702. "Dell Studio 17", STAC_DELL_M6_DMIC),
  1703. SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x02be,
  1704. "Dell Studio 1555", STAC_DELL_M6_DMIC),
  1705. SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x02bd,
  1706. "Dell Studio 1557", STAC_DELL_M6_DMIC),
  1707. SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x02fe,
  1708. "Dell Studio XPS 1645", STAC_DELL_M6_DMIC),
  1709. SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x0413,
  1710. "Dell Studio 1558", STAC_DELL_M6_DMIC),
  1711. /* codec SSID matching */
  1712. SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x02a1,
  1713. "Alienware M17x", STAC_ALIENWARE_M17X),
  1714. SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x043a,
  1715. "Alienware M17x", STAC_ALIENWARE_M17X),
  1716. SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x0490,
  1717. "Alienware M17x R3", STAC_DELL_EQ),
  1718. {} /* terminator */
  1719. };
  1720. static const struct hda_pintbl ref92hd83xxx_pin_configs[] = {
  1721. { 0x0a, 0x02214030 },
  1722. { 0x0b, 0x02211010 },
  1723. { 0x0c, 0x02a19020 },
  1724. { 0x0d, 0x02170130 },
  1725. { 0x0e, 0x01014050 },
  1726. { 0x0f, 0x01819040 },
  1727. { 0x10, 0x01014020 },
  1728. { 0x11, 0x90a3014e },
  1729. { 0x1f, 0x01451160 },
  1730. { 0x20, 0x98560170 },
  1731. {}
  1732. };
  1733. static const struct hda_pintbl dell_s14_pin_configs[] = {
  1734. { 0x0a, 0x0221403f },
  1735. { 0x0b, 0x0221101f },
  1736. { 0x0c, 0x02a19020 },
  1737. { 0x0d, 0x90170110 },
  1738. { 0x0e, 0x40f000f0 },
  1739. { 0x0f, 0x40f000f0 },
  1740. { 0x10, 0x40f000f0 },
  1741. { 0x11, 0x90a60160 },
  1742. { 0x1f, 0x40f000f0 },
  1743. { 0x20, 0x40f000f0 },
  1744. {}
  1745. };
  1746. static const struct hda_pintbl dell_vostro_3500_pin_configs[] = {
  1747. { 0x0a, 0x02a11020 },
  1748. { 0x0b, 0x0221101f },
  1749. { 0x0c, 0x400000f0 },
  1750. { 0x0d, 0x90170110 },
  1751. { 0x0e, 0x400000f1 },
  1752. { 0x0f, 0x400000f2 },
  1753. { 0x10, 0x400000f3 },
  1754. { 0x11, 0x90a60160 },
  1755. { 0x1f, 0x400000f4 },
  1756. { 0x20, 0x400000f5 },
  1757. {}
  1758. };
  1759. static const struct hda_pintbl hp_dv7_4000_pin_configs[] = {
  1760. { 0x0a, 0x03a12050 },
  1761. { 0x0b, 0x0321201f },
  1762. { 0x0c, 0x40f000f0 },
  1763. { 0x0d, 0x90170110 },
  1764. { 0x0e, 0x40f000f0 },
  1765. { 0x0f, 0x40f000f0 },
  1766. { 0x10, 0x90170110 },
  1767. { 0x11, 0xd5a30140 },
  1768. { 0x1f, 0x40f000f0 },
  1769. { 0x20, 0x40f000f0 },
  1770. {}
  1771. };
  1772. static const struct hda_pintbl hp_zephyr_pin_configs[] = {
  1773. { 0x0a, 0x01813050 },
  1774. { 0x0b, 0x0421201f },
  1775. { 0x0c, 0x04a1205e },
  1776. { 0x0d, 0x96130310 },
  1777. { 0x0e, 0x96130310 },
  1778. { 0x0f, 0x0101401f },
  1779. { 0x10, 0x1111611f },
  1780. { 0x11, 0xd5a30130 },
  1781. {}
  1782. };
  1783. static const struct hda_pintbl hp_cNB11_intquad_pin_configs[] = {
  1784. { 0x0a, 0x40f000f0 },
  1785. { 0x0b, 0x0221101f },
  1786. { 0x0c, 0x02a11020 },
  1787. { 0x0d, 0x92170110 },
  1788. { 0x0e, 0x40f000f0 },
  1789. { 0x0f, 0x92170110 },
  1790. { 0x10, 0x40f000f0 },
  1791. { 0x11, 0xd5a30130 },
  1792. { 0x1f, 0x40f000f0 },
  1793. { 0x20, 0x40f000f0 },
  1794. {}
  1795. };
  1796. static void stac92hd83xxx_fixup_hp(struct hda_codec *codec,
  1797. const struct hda_fixup *fix, int action)
  1798. {
  1799. struct sigmatel_spec *spec = codec->spec;
  1800. if (action != HDA_FIXUP_ACT_PRE_PROBE)
  1801. return;
  1802. if (hp_bnb2011_with_dock(codec)) {
  1803. snd_hda_codec_set_pincfg(codec, 0xa, 0x2101201f);
  1804. snd_hda_codec_set_pincfg(codec, 0xf, 0x2181205e);
  1805. }
  1806. if (find_mute_led_cfg(codec, spec->default_polarity))
  1807. snd_printd("mute LED gpio %d polarity %d\n",
  1808. spec->gpio_led,
  1809. spec->gpio_led_polarity);
  1810. }
  1811. static void stac92hd83xxx_fixup_hp_zephyr(struct hda_codec *codec,
  1812. const struct hda_fixup *fix, int action)
  1813. {
  1814. if (action != HDA_FIXUP_ACT_PRE_PROBE)
  1815. return;
  1816. snd_hda_apply_pincfgs(codec, hp_zephyr_pin_configs);
  1817. snd_hda_add_verbs(codec, stac92hd83xxx_hp_zephyr_init);
  1818. }
  1819. static void stac92hd83xxx_fixup_hp_led(struct hda_codec *codec,
  1820. const struct hda_fixup *fix, int action)
  1821. {
  1822. struct sigmatel_spec *spec = codec->spec;
  1823. if (action == HDA_FIXUP_ACT_PRE_PROBE)
  1824. spec->default_polarity = 0;
  1825. }
  1826. static void stac92hd83xxx_fixup_hp_inv_led(struct hda_codec *codec,
  1827. const struct hda_fixup *fix, int action)
  1828. {
  1829. struct sigmatel_spec *spec = codec->spec;
  1830. if (action == HDA_FIXUP_ACT_PRE_PROBE)
  1831. spec->default_polarity = 1;
  1832. }
  1833. static void stac92hd83xxx_fixup_hp_mic_led(struct hda_codec *codec,
  1834. const struct hda_fixup *fix, int action)
  1835. {
  1836. struct sigmatel_spec *spec = codec->spec;
  1837. if (action == HDA_FIXUP_ACT_PRE_PROBE)
  1838. spec->mic_mute_led_gpio = 0x08; /* GPIO3 */
  1839. }
  1840. static void stac92hd83xxx_fixup_headset_jack(struct hda_codec *codec,
  1841. const struct hda_fixup *fix, int action)
  1842. {
  1843. struct sigmatel_spec *spec = codec->spec;
  1844. if (action == HDA_FIXUP_ACT_PRE_PROBE)
  1845. spec->headset_jack = 1;
  1846. }
  1847. static const struct hda_fixup stac92hd83xxx_fixups[] = {
  1848. [STAC_92HD83XXX_REF] = {
  1849. .type = HDA_FIXUP_PINS,
  1850. .v.pins = ref92hd83xxx_pin_configs,
  1851. },
  1852. [STAC_92HD83XXX_PWR_REF] = {
  1853. .type = HDA_FIXUP_PINS,
  1854. .v.pins = ref92hd83xxx_pin_configs,
  1855. },
  1856. [STAC_DELL_S14] = {
  1857. .type = HDA_FIXUP_PINS,
  1858. .v.pins = dell_s14_pin_configs,
  1859. },
  1860. [STAC_DELL_VOSTRO_3500] = {
  1861. .type = HDA_FIXUP_PINS,
  1862. .v.pins = dell_vostro_3500_pin_configs,
  1863. },
  1864. [STAC_92HD83XXX_HP_cNB11_INTQUAD] = {
  1865. .type = HDA_FIXUP_PINS,
  1866. .v.pins = hp_cNB11_intquad_pin_configs,
  1867. .chained = true,
  1868. .chain_id = STAC_92HD83XXX_HP,
  1869. },
  1870. [STAC_92HD83XXX_HP] = {
  1871. .type = HDA_FIXUP_FUNC,
  1872. .v.func = stac92hd83xxx_fixup_hp,
  1873. },
  1874. [STAC_HP_DV7_4000] = {
  1875. .type = HDA_FIXUP_PINS,
  1876. .v.pins = hp_dv7_4000_pin_configs,
  1877. .chained = true,
  1878. .chain_id = STAC_92HD83XXX_HP,
  1879. },
  1880. [STAC_HP_ZEPHYR] = {
  1881. .type = HDA_FIXUP_FUNC,
  1882. .v.func = stac92hd83xxx_fixup_hp_zephyr,
  1883. .chained = true,
  1884. .chain_id = STAC_92HD83XXX_HP,
  1885. },
  1886. [STAC_92HD83XXX_HP_LED] = {
  1887. .type = HDA_FIXUP_FUNC,
  1888. .v.func = stac92hd83xxx_fixup_hp_led,
  1889. .chained = true,
  1890. .chain_id = STAC_92HD83XXX_HP,
  1891. },
  1892. [STAC_92HD83XXX_HP_INV_LED] = {
  1893. .type = HDA_FIXUP_FUNC,
  1894. .v.func = stac92hd83xxx_fixup_hp_inv_led,
  1895. .chained = true,
  1896. .chain_id = STAC_92HD83XXX_HP,
  1897. },
  1898. [STAC_92HD83XXX_HP_MIC_LED] = {
  1899. .type = HDA_FIXUP_FUNC,
  1900. .v.func = stac92hd83xxx_fixup_hp_mic_led,
  1901. .chained = true,
  1902. .chain_id = STAC_92HD83XXX_HP,
  1903. },
  1904. [STAC_92HD83XXX_HEADSET_JACK] = {
  1905. .type = HDA_FIXUP_FUNC,
  1906. .v.func = stac92hd83xxx_fixup_headset_jack,
  1907. },
  1908. [STAC_HP_ENVY_BASS] = {
  1909. .type = HDA_FIXUP_PINS,
  1910. .v.pins = (const struct hda_pintbl[]) {
  1911. { 0x0f, 0x90170111 },
  1912. {}
  1913. },
  1914. },
  1915. };
  1916. static const struct hda_model_fixup stac92hd83xxx_models[] = {
  1917. { .id = STAC_92HD83XXX_REF, .name = "ref" },
  1918. { .id = STAC_92HD83XXX_PWR_REF, .name = "mic-ref" },
  1919. { .id = STAC_DELL_S14, .name = "dell-s14" },
  1920. { .id = STAC_DELL_VOSTRO_3500, .name = "dell-vostro-3500" },
  1921. { .id = STAC_92HD83XXX_HP_cNB11_INTQUAD, .name = "hp_cNB11_intquad" },
  1922. { .id = STAC_HP_DV7_4000, .name = "hp-dv7-4000" },
  1923. { .id = STAC_HP_ZEPHYR, .name = "hp-zephyr" },
  1924. { .id = STAC_92HD83XXX_HP_LED, .name = "hp-led" },
  1925. { .id = STAC_92HD83XXX_HP_INV_LED, .name = "hp-inv-led" },
  1926. { .id = STAC_92HD83XXX_HP_MIC_LED, .name = "hp-mic-led" },
  1927. { .id = STAC_92HD83XXX_HEADSET_JACK, .name = "headset-jack" },
  1928. { .id = STAC_HP_ENVY_BASS, .name = "hp-envy-bass" },
  1929. {}
  1930. };
  1931. static const struct snd_pci_quirk stac92hd83xxx_fixup_tbl[] = {
  1932. /* SigmaTel reference board */
  1933. SND_PCI_QUIRK(PCI_VENDOR_ID_INTEL, 0x2668,
  1934. "DFI LanParty", STAC_92HD83XXX_REF),
  1935. SND_PCI_QUIRK(PCI_VENDOR_ID_DFI, 0x3101,
  1936. "DFI LanParty", STAC_92HD83XXX_REF),
  1937. SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x02ba,
  1938. "unknown Dell", STAC_DELL_S14),
  1939. SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x0532,
  1940. "Dell Latitude E6230", STAC_92HD83XXX_HEADSET_JACK),
  1941. SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x0533,
  1942. "Dell Latitude E6330", STAC_92HD83XXX_HEADSET_JACK),
  1943. SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x0534,
  1944. "Dell Latitude E6430", STAC_92HD83XXX_HEADSET_JACK),
  1945. SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x0535,
  1946. "Dell Latitude E6530", STAC_92HD83XXX_HEADSET_JACK),
  1947. SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x053c,
  1948. "Dell Latitude E5430", STAC_92HD83XXX_HEADSET_JACK),
  1949. SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x053d,
  1950. "Dell Latitude E5530", STAC_92HD83XXX_HEADSET_JACK),
  1951. SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x0549,
  1952. "Dell Latitude E5430", STAC_92HD83XXX_HEADSET_JACK),
  1953. SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x057d,
  1954. "Dell Latitude E6430s", STAC_92HD83XXX_HEADSET_JACK),
  1955. SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x0584,
  1956. "Dell Latitude E6430U", STAC_92HD83XXX_HEADSET_JACK),
  1957. SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x1028,
  1958. "Dell Vostro 3500", STAC_DELL_VOSTRO_3500),
  1959. SND_PCI_QUIRK(PCI_VENDOR_ID_HP, 0x1656,
  1960. "HP", STAC_92HD83XXX_HP_cNB11_INTQUAD),
  1961. SND_PCI_QUIRK(PCI_VENDOR_ID_HP, 0x1657,
  1962. "HP", STAC_92HD83XXX_HP_cNB11_INTQUAD),
  1963. SND_PCI_QUIRK(PCI_VENDOR_ID_HP, 0x1658,
  1964. "HP", STAC_92HD83XXX_HP_cNB11_INTQUAD),
  1965. SND_PCI_QUIRK(PCI_VENDOR_ID_HP, 0x1659,
  1966. "HP Pavilion dv7", STAC_HP_DV7_4000),
  1967. SND_PCI_QUIRK(PCI_VENDOR_ID_HP, 0x165A,
  1968. "HP", STAC_92HD83XXX_HP_cNB11_INTQUAD),
  1969. SND_PCI_QUIRK(PCI_VENDOR_ID_HP, 0x165B,
  1970. "HP", STAC_92HD83XXX_HP_cNB11_INTQUAD),
  1971. SND_PCI_QUIRK(PCI_VENDOR_ID_HP, 0x1888,
  1972. "HP Envy Spectre", STAC_HP_ENVY_BASS),
  1973. SND_PCI_QUIRK(PCI_VENDOR_ID_HP, 0x18df,
  1974. "HP Folio", STAC_92HD83XXX_HP_MIC_LED),
  1975. SND_PCI_QUIRK_MASK(PCI_VENDOR_ID_HP, 0xff00, 0x1900,
  1976. "HP", STAC_92HD83XXX_HP_MIC_LED),
  1977. SND_PCI_QUIRK(PCI_VENDOR_ID_HP, 0x3388,
  1978. "HP", STAC_92HD83XXX_HP_cNB11_INTQUAD),
  1979. SND_PCI_QUIRK(PCI_VENDOR_ID_HP, 0x3389,
  1980. "HP", STAC_92HD83XXX_HP_cNB11_INTQUAD),
  1981. SND_PCI_QUIRK(PCI_VENDOR_ID_HP, 0x355B,
  1982. "HP", STAC_92HD83XXX_HP_cNB11_INTQUAD),
  1983. SND_PCI_QUIRK(PCI_VENDOR_ID_HP, 0x355C,
  1984. "HP", STAC_92HD83XXX_HP_cNB11_INTQUAD),
  1985. SND_PCI_QUIRK(PCI_VENDOR_ID_HP, 0x355D,
  1986. "HP", STAC_92HD83XXX_HP_cNB11_INTQUAD),
  1987. SND_PCI_QUIRK(PCI_VENDOR_ID_HP, 0x355E,
  1988. "HP", STAC_92HD83XXX_HP_cNB11_INTQUAD),
  1989. SND_PCI_QUIRK(PCI_VENDOR_ID_HP, 0x355F,
  1990. "HP", STAC_92HD83XXX_HP_cNB11_INTQUAD),
  1991. SND_PCI_QUIRK(PCI_VENDOR_ID_HP, 0x3560,
  1992. "HP", STAC_92HD83XXX_HP_cNB11_INTQUAD),
  1993. SND_PCI_QUIRK(PCI_VENDOR_ID_HP, 0x358B,
  1994. "HP", STAC_92HD83XXX_HP_cNB11_INTQUAD),
  1995. SND_PCI_QUIRK(PCI_VENDOR_ID_HP, 0x358C,
  1996. "HP", STAC_92HD83XXX_HP_cNB11_INTQUAD),
  1997. SND_PCI_QUIRK(PCI_VENDOR_ID_HP, 0x358D,
  1998. "HP", STAC_92HD83XXX_HP_cNB11_INTQUAD),
  1999. SND_PCI_QUIRK(PCI_VENDOR_ID_HP, 0x3591,
  2000. "HP", STAC_92HD83XXX_HP_cNB11_INTQUAD),
  2001. SND_PCI_QUIRK(PCI_VENDOR_ID_HP, 0x3592,
  2002. "HP", STAC_92HD83XXX_HP_cNB11_INTQUAD),
  2003. SND_PCI_QUIRK(PCI_VENDOR_ID_HP, 0x3593,
  2004. "HP", STAC_92HD83XXX_HP_cNB11_INTQUAD),
  2005. SND_PCI_QUIRK(PCI_VENDOR_ID_HP, 0x3561,
  2006. "HP", STAC_HP_ZEPHYR),
  2007. SND_PCI_QUIRK(PCI_VENDOR_ID_HP, 0x3660,
  2008. "HP Mini", STAC_92HD83XXX_HP_LED),
  2009. SND_PCI_QUIRK(PCI_VENDOR_ID_HP, 0x144E,
  2010. "HP Pavilion dv5", STAC_92HD83XXX_HP_INV_LED),
  2011. SND_PCI_QUIRK(PCI_VENDOR_ID_HP, 0x148a,
  2012. "HP Mini", STAC_92HD83XXX_HP_LED),
  2013. SND_PCI_QUIRK_VENDOR(PCI_VENDOR_ID_HP, "HP", STAC_92HD83XXX_HP),
  2014. {} /* terminator */
  2015. };
  2016. /* HP dv7 bass switch - GPIO5 */
  2017. #define stac_hp_bass_gpio_info snd_ctl_boolean_mono_info
  2018. static int stac_hp_bass_gpio_get(struct snd_kcontrol *kcontrol,
  2019. struct snd_ctl_elem_value *ucontrol)
  2020. {
  2021. struct hda_codec *codec = snd_kcontrol_chip(kcontrol);
  2022. struct sigmatel_spec *spec = codec->spec;
  2023. ucontrol->value.integer.value[0] = !!(spec->gpio_data & 0x20);
  2024. return 0;
  2025. }
  2026. static int stac_hp_bass_gpio_put(struct snd_kcontrol *kcontrol,
  2027. struct snd_ctl_elem_value *ucontrol)
  2028. {
  2029. struct hda_codec *codec = snd_kcontrol_chip(kcontrol);
  2030. struct sigmatel_spec *spec = codec->spec;
  2031. unsigned int gpio_data;
  2032. gpio_data = (spec->gpio_data & ~0x20) |
  2033. (ucontrol->value.integer.value[0] ? 0x20 : 0);
  2034. if (gpio_data == spec->gpio_data)
  2035. return 0;
  2036. spec->gpio_data = gpio_data;
  2037. stac_gpio_set(codec, spec->gpio_mask, spec->gpio_dir, spec->gpio_data);
  2038. return 1;
  2039. }
  2040. static const struct snd_kcontrol_new stac_hp_bass_sw_ctrl = {
  2041. .iface = SNDRV_CTL_ELEM_IFACE_MIXER,
  2042. .info = stac_hp_bass_gpio_info,
  2043. .get = stac_hp_bass_gpio_get,
  2044. .put = stac_hp_bass_gpio_put,
  2045. };
  2046. static int stac_add_hp_bass_switch(struct hda_codec *codec)
  2047. {
  2048. struct sigmatel_spec *spec = codec->spec;
  2049. if (!snd_hda_gen_add_kctl(&spec->gen, "Bass Speaker Playback Switch",
  2050. &stac_hp_bass_sw_ctrl))
  2051. return -ENOMEM;
  2052. spec->gpio_mask |= 0x20;
  2053. spec->gpio_dir |= 0x20;
  2054. spec->gpio_data |= 0x20;
  2055. return 0;
  2056. }
  2057. static const struct hda_pintbl ref92hd71bxx_pin_configs[] = {
  2058. { 0x0a, 0x02214030 },
  2059. { 0x0b, 0x02a19040 },
  2060. { 0x0c, 0x01a19020 },
  2061. { 0x0d, 0x01014010 },
  2062. { 0x0e, 0x0181302e },
  2063. { 0x0f, 0x01014010 },
  2064. { 0x14, 0x01019020 },
  2065. { 0x18, 0x90a000f0 },
  2066. { 0x19, 0x90a000f0 },
  2067. { 0x1e, 0x01452050 },
  2068. { 0x1f, 0x01452050 },
  2069. {}
  2070. };
  2071. static const struct hda_pintbl dell_m4_1_pin_configs[] = {
  2072. { 0x0a, 0x0421101f },
  2073. { 0x0b, 0x04a11221 },
  2074. { 0x0c, 0x40f000f0 },
  2075. { 0x0d, 0x90170110 },
  2076. { 0x0e, 0x23a1902e },
  2077. { 0x0f, 0x23014250 },
  2078. { 0x14, 0x40f000f0 },
  2079. { 0x18, 0x90a000f0 },
  2080. { 0x19, 0x40f000f0 },
  2081. { 0x1e, 0x4f0000f0 },
  2082. { 0x1f, 0x4f0000f0 },
  2083. {}
  2084. };
  2085. static const struct hda_pintbl dell_m4_2_pin_configs[] = {
  2086. { 0x0a, 0x0421101f },
  2087. { 0x0b, 0x04a11221 },
  2088. { 0x0c, 0x90a70330 },
  2089. { 0x0d, 0x90170110 },
  2090. { 0x0e, 0x23a1902e },
  2091. { 0x0f, 0x23014250 },
  2092. { 0x14, 0x40f000f0 },
  2093. { 0x18, 0x40f000f0 },
  2094. { 0x19, 0x40f000f0 },
  2095. { 0x1e, 0x044413b0 },
  2096. { 0x1f, 0x044413b0 },
  2097. {}
  2098. };
  2099. static const struct hda_pintbl dell_m4_3_pin_configs[] = {
  2100. { 0x0a, 0x0421101f },
  2101. { 0x0b, 0x04a11221 },
  2102. { 0x0c, 0x90a70330 },
  2103. { 0x0d, 0x90170110 },
  2104. { 0x0e, 0x40f000f0 },
  2105. { 0x0f, 0x40f000f0 },
  2106. { 0x14, 0x40f000f0 },
  2107. { 0x18, 0x90a000f0 },
  2108. { 0x19, 0x40f000f0 },
  2109. { 0x1e, 0x044413b0 },
  2110. { 0x1f, 0x044413b0 },
  2111. {}
  2112. };
  2113. static void stac92hd71bxx_fixup_ref(struct hda_codec *codec,
  2114. const struct hda_fixup *fix, int action)
  2115. {
  2116. struct sigmatel_spec *spec = codec->spec;
  2117. if (action != HDA_FIXUP_ACT_PRE_PROBE)
  2118. return;
  2119. snd_hda_apply_pincfgs(codec, ref92hd71bxx_pin_configs);
  2120. spec->gpio_mask = spec->gpio_dir = spec->gpio_data = 0;
  2121. }
  2122. static void stac92hd71bxx_fixup_hp_m4(struct hda_codec *codec,
  2123. const struct hda_fixup *fix, int action)
  2124. {
  2125. struct sigmatel_spec *spec = codec->spec;
  2126. struct hda_jack_tbl *jack;
  2127. if (action != HDA_FIXUP_ACT_PRE_PROBE)
  2128. return;
  2129. /* Enable VREF power saving on GPIO1 detect */
  2130. snd_hda_codec_write_cache(codec, codec->afg, 0,
  2131. AC_VERB_SET_GPIO_UNSOLICITED_RSP_MASK, 0x02);
  2132. snd_hda_jack_detect_enable_callback(codec, codec->afg,
  2133. STAC_VREF_EVENT,
  2134. stac_vref_event);
  2135. jack = snd_hda_jack_tbl_get(codec, codec->afg);
  2136. if (jack)
  2137. jack->private_data = 0x02;
  2138. spec->gpio_mask |= 0x02;
  2139. /* enable internal microphone */
  2140. snd_hda_codec_set_pincfg(codec, 0x0e, 0x01813040);
  2141. }
  2142. static void stac92hd71bxx_fixup_hp_dv4(struct hda_codec *codec,
  2143. const struct hda_fixup *fix, int action)
  2144. {
  2145. struct sigmatel_spec *spec = codec->spec;
  2146. if (action != HDA_FIXUP_ACT_PRE_PROBE)
  2147. return;
  2148. spec->gpio_led = 0x01;
  2149. }
  2150. static void stac92hd71bxx_fixup_hp_dv5(struct hda_codec *codec,
  2151. const struct hda_fixup *fix, int action)
  2152. {
  2153. unsigned int cap;
  2154. switch (action) {
  2155. case HDA_FIXUP_ACT_PRE_PROBE:
  2156. snd_hda_codec_set_pincfg(codec, 0x0d, 0x90170010);
  2157. break;
  2158. case HDA_FIXUP_ACT_PROBE:
  2159. /* enable bass on HP dv7 */
  2160. cap = snd_hda_param_read(codec, 0x1, AC_PAR_GPIO_CAP);
  2161. cap &= AC_GPIO_IO_COUNT;
  2162. if (cap >= 6)
  2163. stac_add_hp_bass_switch(codec);
  2164. break;
  2165. }
  2166. }
  2167. static void stac92hd71bxx_fixup_hp_hdx(struct hda_codec *codec,
  2168. const struct hda_fixup *fix, int action)
  2169. {
  2170. struct sigmatel_spec *spec = codec->spec;
  2171. if (action != HDA_FIXUP_ACT_PRE_PROBE)
  2172. return;
  2173. spec->gpio_led = 0x08;
  2174. }
  2175. static void stac92hd71bxx_fixup_hp(struct hda_codec *codec,
  2176. const struct hda_fixup *fix, int action)
  2177. {
  2178. struct sigmatel_spec *spec = codec->spec;
  2179. if (action != HDA_FIXUP_ACT_PRE_PROBE)
  2180. return;
  2181. if (hp_blike_system(codec->subsystem_id)) {
  2182. unsigned int pin_cfg = snd_hda_codec_get_pincfg(codec, 0x0f);
  2183. if (get_defcfg_device(pin_cfg) == AC_JACK_LINE_OUT ||
  2184. get_defcfg_device(pin_cfg) == AC_JACK_SPEAKER ||
  2185. get_defcfg_device(pin_cfg) == AC_JACK_HP_OUT) {
  2186. /* It was changed in the BIOS to just satisfy MS DTM.
  2187. * Lets turn it back into slaved HP
  2188. */
  2189. pin_cfg = (pin_cfg & (~AC_DEFCFG_DEVICE))
  2190. | (AC_JACK_HP_OUT <<
  2191. AC_DEFCFG_DEVICE_SHIFT);
  2192. pin_cfg = (pin_cfg & (~(AC_DEFCFG_DEF_ASSOC
  2193. | AC_DEFCFG_SEQUENCE)))
  2194. | 0x1f;
  2195. snd_hda_codec_set_pincfg(codec, 0x0f, pin_cfg);
  2196. }
  2197. }
  2198. if (find_mute_led_cfg(codec, 1))
  2199. snd_printd("mute LED gpio %d polarity %d\n",
  2200. spec->gpio_led,
  2201. spec->gpio_led_polarity);
  2202. }
  2203. static const struct hda_fixup stac92hd71bxx_fixups[] = {
  2204. [STAC_92HD71BXX_REF] = {
  2205. .type = HDA_FIXUP_FUNC,
  2206. .v.func = stac92hd71bxx_fixup_ref,
  2207. },
  2208. [STAC_DELL_M4_1] = {
  2209. .type = HDA_FIXUP_PINS,
  2210. .v.pins = dell_m4_1_pin_configs,
  2211. },
  2212. [STAC_DELL_M4_2] = {
  2213. .type = HDA_FIXUP_PINS,
  2214. .v.pins = dell_m4_2_pin_configs,
  2215. },
  2216. [STAC_DELL_M4_3] = {
  2217. .type = HDA_FIXUP_PINS,
  2218. .v.pins = dell_m4_3_pin_configs,
  2219. },
  2220. [STAC_HP_M4] = {
  2221. .type = HDA_FIXUP_FUNC,
  2222. .v.func = stac92hd71bxx_fixup_hp_m4,
  2223. .chained = true,
  2224. .chain_id = STAC_92HD71BXX_HP,
  2225. },
  2226. [STAC_HP_DV4] = {
  2227. .type = HDA_FIXUP_FUNC,
  2228. .v.func = stac92hd71bxx_fixup_hp_dv4,
  2229. .chained = true,
  2230. .chain_id = STAC_HP_DV5,
  2231. },
  2232. [STAC_HP_DV5] = {
  2233. .type = HDA_FIXUP_FUNC,
  2234. .v.func = stac92hd71bxx_fixup_hp_dv5,
  2235. .chained = true,
  2236. .chain_id = STAC_92HD71BXX_HP,
  2237. },
  2238. [STAC_HP_HDX] = {
  2239. .type = HDA_FIXUP_FUNC,
  2240. .v.func = stac92hd71bxx_fixup_hp_hdx,
  2241. .chained = true,
  2242. .chain_id = STAC_92HD71BXX_HP,
  2243. },
  2244. [STAC_92HD71BXX_HP] = {
  2245. .type = HDA_FIXUP_FUNC,
  2246. .v.func = stac92hd71bxx_fixup_hp,
  2247. },
  2248. };
  2249. static const struct hda_model_fixup stac92hd71bxx_models[] = {
  2250. { .id = STAC_92HD71BXX_REF, .name = "ref" },
  2251. { .id = STAC_DELL_M4_1, .name = "dell-m4-1" },
  2252. { .id = STAC_DELL_M4_2, .name = "dell-m4-2" },
  2253. { .id = STAC_DELL_M4_3, .name = "dell-m4-3" },
  2254. { .id = STAC_HP_M4, .name = "hp-m4" },
  2255. { .id = STAC_HP_DV4, .name = "hp-dv4" },
  2256. { .id = STAC_HP_DV5, .name = "hp-dv5" },
  2257. { .id = STAC_HP_HDX, .name = "hp-hdx" },
  2258. { .id = STAC_HP_DV4, .name = "hp-dv4-1222nr" },
  2259. {}
  2260. };
  2261. static const struct snd_pci_quirk stac92hd71bxx_fixup_tbl[] = {
  2262. /* SigmaTel reference board */
  2263. SND_PCI_QUIRK(PCI_VENDOR_ID_INTEL, 0x2668,
  2264. "DFI LanParty", STAC_92HD71BXX_REF),
  2265. SND_PCI_QUIRK(PCI_VENDOR_ID_DFI, 0x3101,
  2266. "DFI LanParty", STAC_92HD71BXX_REF),
  2267. SND_PCI_QUIRK_MASK(PCI_VENDOR_ID_HP, 0xfff0, 0x1720,
  2268. "HP", STAC_HP_DV5),
  2269. SND_PCI_QUIRK_MASK(PCI_VENDOR_ID_HP, 0xfff0, 0x3080,
  2270. "HP", STAC_HP_DV5),
  2271. SND_PCI_QUIRK_MASK(PCI_VENDOR_ID_HP, 0xfff0, 0x30f0,
  2272. "HP dv4-7", STAC_HP_DV4),
  2273. SND_PCI_QUIRK_MASK(PCI_VENDOR_ID_HP, 0xfff0, 0x3600,
  2274. "HP dv4-7", STAC_HP_DV5),
  2275. SND_PCI_QUIRK(PCI_VENDOR_ID_HP, 0x3610,
  2276. "HP HDX", STAC_HP_HDX), /* HDX18 */
  2277. SND_PCI_QUIRK(PCI_VENDOR_ID_HP, 0x361a,
  2278. "HP mini 1000", STAC_HP_M4),
  2279. SND_PCI_QUIRK(PCI_VENDOR_ID_HP, 0x361b,
  2280. "HP HDX", STAC_HP_HDX), /* HDX16 */
  2281. SND_PCI_QUIRK_MASK(PCI_VENDOR_ID_HP, 0xfff0, 0x3620,
  2282. "HP dv6", STAC_HP_DV5),
  2283. SND_PCI_QUIRK(PCI_VENDOR_ID_HP, 0x3061,
  2284. "HP dv6", STAC_HP_DV5), /* HP dv6-1110ax */
  2285. SND_PCI_QUIRK(PCI_VENDOR_ID_HP, 0x363e,
  2286. "HP DV6", STAC_HP_DV5),
  2287. SND_PCI_QUIRK_MASK(PCI_VENDOR_ID_HP, 0xfff0, 0x7010,
  2288. "HP", STAC_HP_DV5),
  2289. SND_PCI_QUIRK_VENDOR(PCI_VENDOR_ID_HP, "HP", STAC_92HD71BXX_HP),
  2290. SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x0233,
  2291. "unknown Dell", STAC_DELL_M4_1),
  2292. SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x0234,
  2293. "unknown Dell", STAC_DELL_M4_1),
  2294. SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x0250,
  2295. "unknown Dell", STAC_DELL_M4_1),
  2296. SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x024f,
  2297. "unknown Dell", STAC_DELL_M4_1),
  2298. SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x024d,
  2299. "unknown Dell", STAC_DELL_M4_1),
  2300. SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x0251,
  2301. "unknown Dell", STAC_DELL_M4_1),
  2302. SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x0277,
  2303. "unknown Dell", STAC_DELL_M4_1),
  2304. SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x0263,
  2305. "unknown Dell", STAC_DELL_M4_2),
  2306. SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x0265,
  2307. "unknown Dell", STAC_DELL_M4_2),
  2308. SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x0262,
  2309. "unknown Dell", STAC_DELL_M4_2),
  2310. SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x0264,
  2311. "unknown Dell", STAC_DELL_M4_2),
  2312. SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x02aa,
  2313. "unknown Dell", STAC_DELL_M4_3),
  2314. {} /* terminator */
  2315. };
  2316. static const struct hda_pintbl ref922x_pin_configs[] = {
  2317. { 0x0a, 0x01014010 },
  2318. { 0x0b, 0x01016011 },
  2319. { 0x0c, 0x01012012 },
  2320. { 0x0d, 0x0221401f },
  2321. { 0x0e, 0x01813122 },
  2322. { 0x0f, 0x01011014 },
  2323. { 0x10, 0x01441030 },
  2324. { 0x11, 0x01c41030 },
  2325. { 0x15, 0x40000100 },
  2326. { 0x1b, 0x40000100 },
  2327. {}
  2328. };
  2329. /*
  2330. STAC 922X pin configs for
  2331. 102801A7
  2332. 102801AB
  2333. 102801A9
  2334. 102801D1
  2335. 102801D2
  2336. */
  2337. static const struct hda_pintbl dell_922x_d81_pin_configs[] = {
  2338. { 0x0a, 0x02214030 },
  2339. { 0x0b, 0x01a19021 },
  2340. { 0x0c, 0x01111012 },
  2341. { 0x0d, 0x01114010 },
  2342. { 0x0e, 0x02a19020 },
  2343. { 0x0f, 0x01117011 },
  2344. { 0x10, 0x400001f0 },
  2345. { 0x11, 0x400001f1 },
  2346. { 0x15, 0x01813122 },
  2347. { 0x1b, 0x400001f2 },
  2348. {}
  2349. };
  2350. /*
  2351. STAC 922X pin configs for
  2352. 102801AC
  2353. 102801D0
  2354. */
  2355. static const struct hda_pintbl dell_922x_d82_pin_configs[] = {
  2356. { 0x0a, 0x02214030 },
  2357. { 0x0b, 0x01a19021 },
  2358. { 0x0c, 0x01111012 },
  2359. { 0x0d, 0x01114010 },
  2360. { 0x0e, 0x02a19020 },
  2361. { 0x0f, 0x01117011 },
  2362. { 0x10, 0x01451140 },
  2363. { 0x11, 0x400001f0 },
  2364. { 0x15, 0x01813122 },
  2365. { 0x1b, 0x400001f1 },
  2366. {}
  2367. };
  2368. /*
  2369. STAC 922X pin configs for
  2370. 102801BF
  2371. */
  2372. static const struct hda_pintbl dell_922x_m81_pin_configs[] = {
  2373. { 0x0a, 0x0321101f },
  2374. { 0x0b, 0x01112024 },
  2375. { 0x0c, 0x01111222 },
  2376. { 0x0d, 0x91174220 },
  2377. { 0x0e, 0x03a11050 },
  2378. { 0x0f, 0x01116221 },
  2379. { 0x10, 0x90a70330 },
  2380. { 0x11, 0x01452340 },
  2381. { 0x15, 0x40C003f1 },
  2382. { 0x1b, 0x405003f0 },
  2383. {}
  2384. };
  2385. /*
  2386. STAC 9221 A1 pin configs for
  2387. 102801D7 (Dell XPS M1210)
  2388. */
  2389. static const struct hda_pintbl dell_922x_m82_pin_configs[] = {
  2390. { 0x0a, 0x02211211 },
  2391. { 0x0b, 0x408103ff },
  2392. { 0x0c, 0x02a1123e },
  2393. { 0x0d, 0x90100310 },
  2394. { 0x0e, 0x408003f1 },
  2395. { 0x0f, 0x0221121f },
  2396. { 0x10, 0x03451340 },
  2397. { 0x11, 0x40c003f2 },
  2398. { 0x15, 0x508003f3 },
  2399. { 0x1b, 0x405003f4 },
  2400. {}
  2401. };
  2402. static const struct hda_pintbl d945gtp3_pin_configs[] = {
  2403. { 0x0a, 0x0221401f },
  2404. { 0x0b, 0x01a19022 },
  2405. { 0x0c, 0x01813021 },
  2406. { 0x0d, 0x01014010 },
  2407. { 0x0e, 0x40000100 },
  2408. { 0x0f, 0x40000100 },
  2409. { 0x10, 0x40000100 },
  2410. { 0x11, 0x40000100 },
  2411. { 0x15, 0x02a19120 },
  2412. { 0x1b, 0x40000100 },
  2413. {}
  2414. };
  2415. static const struct hda_pintbl d945gtp5_pin_configs[] = {
  2416. { 0x0a, 0x0221401f },
  2417. { 0x0b, 0x01011012 },
  2418. { 0x0c, 0x01813024 },
  2419. { 0x0d, 0x01014010 },
  2420. { 0x0e, 0x01a19021 },
  2421. { 0x0f, 0x01016011 },
  2422. { 0x10, 0x01452130 },
  2423. { 0x11, 0x40000100 },
  2424. { 0x15, 0x02a19320 },
  2425. { 0x1b, 0x40000100 },
  2426. {}
  2427. };
  2428. static const struct hda_pintbl intel_mac_v1_pin_configs[] = {
  2429. { 0x0a, 0x0121e21f },
  2430. { 0x0b, 0x400000ff },
  2431. { 0x0c, 0x9017e110 },
  2432. { 0x0d, 0x400000fd },
  2433. { 0x0e, 0x400000fe },
  2434. { 0x0f, 0x0181e020 },
  2435. { 0x10, 0x1145e030 },
  2436. { 0x11, 0x11c5e240 },
  2437. { 0x15, 0x400000fc },
  2438. { 0x1b, 0x400000fb },
  2439. {}
  2440. };
  2441. static const struct hda_pintbl intel_mac_v2_pin_configs[] = {
  2442. { 0x0a, 0x0121e21f },
  2443. { 0x0b, 0x90a7012e },
  2444. { 0x0c, 0x9017e110 },
  2445. { 0x0d, 0x400000fd },
  2446. { 0x0e, 0x400000fe },
  2447. { 0x0f, 0x0181e020 },
  2448. { 0x10, 0x1145e230 },
  2449. { 0x11, 0x500000fa },
  2450. { 0x15, 0x400000fc },
  2451. { 0x1b, 0x400000fb },
  2452. {}
  2453. };
  2454. static const struct hda_pintbl intel_mac_v3_pin_configs[] = {
  2455. { 0x0a, 0x0121e21f },
  2456. { 0x0b, 0x90a7012e },
  2457. { 0x0c, 0x9017e110 },
  2458. { 0x0d, 0x400000fd },
  2459. { 0x0e, 0x400000fe },
  2460. { 0x0f, 0x0181e020 },
  2461. { 0x10, 0x1145e230 },
  2462. { 0x11, 0x11c5e240 },
  2463. { 0x15, 0x400000fc },
  2464. { 0x1b, 0x400000fb },
  2465. {}
  2466. };
  2467. static const struct hda_pintbl intel_mac_v4_pin_configs[] = {
  2468. { 0x0a, 0x0321e21f },
  2469. { 0x0b, 0x03a1e02e },
  2470. { 0x0c, 0x9017e110 },
  2471. { 0x0d, 0x9017e11f },
  2472. { 0x0e, 0x400000fe },
  2473. { 0x0f, 0x0381e020 },
  2474. { 0x10, 0x1345e230 },
  2475. { 0x11, 0x13c5e240 },
  2476. { 0x15, 0x400000fc },
  2477. { 0x1b, 0x400000fb },
  2478. {}
  2479. };
  2480. static const struct hda_pintbl intel_mac_v5_pin_configs[] = {
  2481. { 0x0a, 0x0321e21f },
  2482. { 0x0b, 0x03a1e02e },
  2483. { 0x0c, 0x9017e110 },
  2484. { 0x0d, 0x9017e11f },
  2485. { 0x0e, 0x400000fe },
  2486. { 0x0f, 0x0381e020 },
  2487. { 0x10, 0x1345e230 },
  2488. { 0x11, 0x13c5e240 },
  2489. { 0x15, 0x400000fc },
  2490. { 0x1b, 0x400000fb },
  2491. {}
  2492. };
  2493. static const struct hda_pintbl ecs202_pin_configs[] = {
  2494. { 0x0a, 0x0221401f },
  2495. { 0x0b, 0x02a19020 },
  2496. { 0x0c, 0x01a19020 },
  2497. { 0x0d, 0x01114010 },
  2498. { 0x0e, 0x408000f0 },
  2499. { 0x0f, 0x01813022 },
  2500. { 0x10, 0x074510a0 },
  2501. { 0x11, 0x40c400f1 },
  2502. { 0x15, 0x9037012e },
  2503. { 0x1b, 0x40e000f2 },
  2504. {}
  2505. };
  2506. /* codec SSIDs for Intel Mac sharing the same PCI SSID 8384:7680 */
  2507. static const struct snd_pci_quirk stac922x_intel_mac_fixup_tbl[] = {
  2508. SND_PCI_QUIRK(0x106b, 0x0800, "Mac", STAC_INTEL_MAC_V1),
  2509. SND_PCI_QUIRK(0x106b, 0x0600, "Mac", STAC_INTEL_MAC_V2),
  2510. SND_PCI_QUIRK(0x106b, 0x0700, "Mac", STAC_INTEL_MAC_V2),
  2511. SND_PCI_QUIRK(0x106b, 0x0e00, "Mac", STAC_INTEL_MAC_V3),
  2512. SND_PCI_QUIRK(0x106b, 0x0f00, "Mac", STAC_INTEL_MAC_V3),
  2513. SND_PCI_QUIRK(0x106b, 0x1600, "Mac", STAC_INTEL_MAC_V3),
  2514. SND_PCI_QUIRK(0x106b, 0x1700, "Mac", STAC_INTEL_MAC_V3),
  2515. SND_PCI_QUIRK(0x106b, 0x0200, "Mac", STAC_INTEL_MAC_V3),
  2516. SND_PCI_QUIRK(0x106b, 0x1e00, "Mac", STAC_INTEL_MAC_V3),
  2517. SND_PCI_QUIRK(0x106b, 0x1a00, "Mac", STAC_INTEL_MAC_V4),
  2518. SND_PCI_QUIRK(0x106b, 0x0a00, "Mac", STAC_INTEL_MAC_V5),
  2519. SND_PCI_QUIRK(0x106b, 0x2200, "Mac", STAC_INTEL_MAC_V5),
  2520. {}
  2521. };
  2522. static const struct hda_fixup stac922x_fixups[];
  2523. /* remap the fixup from codec SSID and apply it */
  2524. static void stac922x_fixup_intel_mac_auto(struct hda_codec *codec,
  2525. const struct hda_fixup *fix,
  2526. int action)
  2527. {
  2528. if (action != HDA_FIXUP_ACT_PRE_PROBE)
  2529. return;
  2530. snd_hda_pick_fixup(codec, NULL, stac922x_intel_mac_fixup_tbl,
  2531. stac922x_fixups);
  2532. if (codec->fixup_id != STAC_INTEL_MAC_AUTO)
  2533. snd_hda_apply_fixup(codec, action);
  2534. }
  2535. static void stac922x_fixup_intel_mac_gpio(struct hda_codec *codec,
  2536. const struct hda_fixup *fix,
  2537. int action)
  2538. {
  2539. struct sigmatel_spec *spec = codec->spec;
  2540. if (action == HDA_FIXUP_ACT_PRE_PROBE) {
  2541. spec->gpio_mask = spec->gpio_dir = 0x03;
  2542. spec->gpio_data = 0x03;
  2543. }
  2544. }
  2545. static const struct hda_fixup stac922x_fixups[] = {
  2546. [STAC_D945_REF] = {
  2547. .type = HDA_FIXUP_PINS,
  2548. .v.pins = ref922x_pin_configs,
  2549. },
  2550. [STAC_D945GTP3] = {
  2551. .type = HDA_FIXUP_PINS,
  2552. .v.pins = d945gtp3_pin_configs,
  2553. },
  2554. [STAC_D945GTP5] = {
  2555. .type = HDA_FIXUP_PINS,
  2556. .v.pins = d945gtp5_pin_configs,
  2557. },
  2558. [STAC_INTEL_MAC_AUTO] = {
  2559. .type = HDA_FIXUP_FUNC,
  2560. .v.func = stac922x_fixup_intel_mac_auto,
  2561. },
  2562. [STAC_INTEL_MAC_V1] = {
  2563. .type = HDA_FIXUP_PINS,
  2564. .v.pins = intel_mac_v1_pin_configs,
  2565. .chained = true,
  2566. .chain_id = STAC_922X_INTEL_MAC_GPIO,
  2567. },
  2568. [STAC_INTEL_MAC_V2] = {
  2569. .type = HDA_FIXUP_PINS,
  2570. .v.pins = intel_mac_v2_pin_configs,
  2571. .chained = true,
  2572. .chain_id = STAC_922X_INTEL_MAC_GPIO,
  2573. },
  2574. [STAC_INTEL_MAC_V3] = {
  2575. .type = HDA_FIXUP_PINS,
  2576. .v.pins = intel_mac_v3_pin_configs,
  2577. .chained = true,
  2578. .chain_id = STAC_922X_INTEL_MAC_GPIO,
  2579. },
  2580. [STAC_INTEL_MAC_V4] = {
  2581. .type = HDA_FIXUP_PINS,
  2582. .v.pins = intel_mac_v4_pin_configs,
  2583. .chained = true,
  2584. .chain_id = STAC_922X_INTEL_MAC_GPIO,
  2585. },
  2586. [STAC_INTEL_MAC_V5] = {
  2587. .type = HDA_FIXUP_PINS,
  2588. .v.pins = intel_mac_v5_pin_configs,
  2589. .chained = true,
  2590. .chain_id = STAC_922X_INTEL_MAC_GPIO,
  2591. },
  2592. [STAC_922X_INTEL_MAC_GPIO] = {
  2593. .type = HDA_FIXUP_FUNC,
  2594. .v.func = stac922x_fixup_intel_mac_gpio,
  2595. },
  2596. [STAC_ECS_202] = {
  2597. .type = HDA_FIXUP_PINS,
  2598. .v.pins = ecs202_pin_configs,
  2599. },
  2600. [STAC_922X_DELL_D81] = {
  2601. .type = HDA_FIXUP_PINS,
  2602. .v.pins = dell_922x_d81_pin_configs,
  2603. },
  2604. [STAC_922X_DELL_D82] = {
  2605. .type = HDA_FIXUP_PINS,
  2606. .v.pins = dell_922x_d82_pin_configs,
  2607. },
  2608. [STAC_922X_DELL_M81] = {
  2609. .type = HDA_FIXUP_PINS,
  2610. .v.pins = dell_922x_m81_pin_configs,
  2611. },
  2612. [STAC_922X_DELL_M82] = {
  2613. .type = HDA_FIXUP_PINS,
  2614. .v.pins = dell_922x_m82_pin_configs,
  2615. },
  2616. };
  2617. static const struct hda_model_fixup stac922x_models[] = {
  2618. { .id = STAC_D945_REF, .name = "ref" },
  2619. { .id = STAC_D945GTP5, .name = "5stack" },
  2620. { .id = STAC_D945GTP3, .name = "3stack" },
  2621. { .id = STAC_INTEL_MAC_V1, .name = "intel-mac-v1" },
  2622. { .id = STAC_INTEL_MAC_V2, .name = "intel-mac-v2" },
  2623. { .id = STAC_INTEL_MAC_V3, .name = "intel-mac-v3" },
  2624. { .id = STAC_INTEL_MAC_V4, .name = "intel-mac-v4" },
  2625. { .id = STAC_INTEL_MAC_V5, .name = "intel-mac-v5" },
  2626. { .id = STAC_INTEL_MAC_AUTO, .name = "intel-mac-auto" },
  2627. { .id = STAC_ECS_202, .name = "ecs202" },
  2628. { .id = STAC_922X_DELL_D81, .name = "dell-d81" },
  2629. { .id = STAC_922X_DELL_D82, .name = "dell-d82" },
  2630. { .id = STAC_922X_DELL_M81, .name = "dell-m81" },
  2631. { .id = STAC_922X_DELL_M82, .name = "dell-m82" },
  2632. /* for backward compatibility */
  2633. { .id = STAC_INTEL_MAC_V3, .name = "macmini" },
  2634. { .id = STAC_INTEL_MAC_V5, .name = "macbook" },
  2635. { .id = STAC_INTEL_MAC_V3, .name = "macbook-pro-v1" },
  2636. { .id = STAC_INTEL_MAC_V3, .name = "macbook-pro" },
  2637. { .id = STAC_INTEL_MAC_V2, .name = "imac-intel" },
  2638. { .id = STAC_INTEL_MAC_V3, .name = "imac-intel-20" },
  2639. {}
  2640. };
  2641. static const struct snd_pci_quirk stac922x_fixup_tbl[] = {
  2642. /* SigmaTel reference board */
  2643. SND_PCI_QUIRK(PCI_VENDOR_ID_INTEL, 0x2668,
  2644. "DFI LanParty", STAC_D945_REF),
  2645. SND_PCI_QUIRK(PCI_VENDOR_ID_DFI, 0x3101,
  2646. "DFI LanParty", STAC_D945_REF),
  2647. /* Intel 945G based systems */
  2648. SND_PCI_QUIRK(PCI_VENDOR_ID_INTEL, 0x0101,
  2649. "Intel D945G", STAC_D945GTP3),
  2650. SND_PCI_QUIRK(PCI_VENDOR_ID_INTEL, 0x0202,
  2651. "Intel D945G", STAC_D945GTP3),
  2652. SND_PCI_QUIRK(PCI_VENDOR_ID_INTEL, 0x0606,
  2653. "Intel D945G", STAC_D945GTP3),
  2654. SND_PCI_QUIRK(PCI_VENDOR_ID_INTEL, 0x0601,
  2655. "Intel D945G", STAC_D945GTP3),
  2656. SND_PCI_QUIRK(PCI_VENDOR_ID_INTEL, 0x0111,
  2657. "Intel D945G", STAC_D945GTP3),
  2658. SND_PCI_QUIRK(PCI_VENDOR_ID_INTEL, 0x1115,
  2659. "Intel D945G", STAC_D945GTP3),
  2660. SND_PCI_QUIRK(PCI_VENDOR_ID_INTEL, 0x1116,
  2661. "Intel D945G", STAC_D945GTP3),
  2662. SND_PCI_QUIRK(PCI_VENDOR_ID_INTEL, 0x1117,
  2663. "Intel D945G", STAC_D945GTP3),
  2664. SND_PCI_QUIRK(PCI_VENDOR_ID_INTEL, 0x1118,
  2665. "Intel D945G", STAC_D945GTP3),
  2666. SND_PCI_QUIRK(PCI_VENDOR_ID_INTEL, 0x1119,
  2667. "Intel D945G", STAC_D945GTP3),
  2668. SND_PCI_QUIRK(PCI_VENDOR_ID_INTEL, 0x8826,
  2669. "Intel D945G", STAC_D945GTP3),
  2670. SND_PCI_QUIRK(PCI_VENDOR_ID_INTEL, 0x5049,
  2671. "Intel D945G", STAC_D945GTP3),
  2672. SND_PCI_QUIRK(PCI_VENDOR_ID_INTEL, 0x5055,
  2673. "Intel D945G", STAC_D945GTP3),
  2674. SND_PCI_QUIRK(PCI_VENDOR_ID_INTEL, 0x5048,
  2675. "Intel D945G", STAC_D945GTP3),
  2676. SND_PCI_QUIRK(PCI_VENDOR_ID_INTEL, 0x0110,
  2677. "Intel D945G", STAC_D945GTP3),
  2678. /* Intel D945G 5-stack systems */
  2679. SND_PCI_QUIRK(PCI_VENDOR_ID_INTEL, 0x0404,
  2680. "Intel D945G", STAC_D945GTP5),
  2681. SND_PCI_QUIRK(PCI_VENDOR_ID_INTEL, 0x0303,
  2682. "Intel D945G", STAC_D945GTP5),
  2683. SND_PCI_QUIRK(PCI_VENDOR_ID_INTEL, 0x0013,
  2684. "Intel D945G", STAC_D945GTP5),
  2685. SND_PCI_QUIRK(PCI_VENDOR_ID_INTEL, 0x0417,
  2686. "Intel D945G", STAC_D945GTP5),
  2687. /* Intel 945P based systems */
  2688. SND_PCI_QUIRK(PCI_VENDOR_ID_INTEL, 0x0b0b,
  2689. "Intel D945P", STAC_D945GTP3),
  2690. SND_PCI_QUIRK(PCI_VENDOR_ID_INTEL, 0x0112,
  2691. "Intel D945P", STAC_D945GTP3),
  2692. SND_PCI_QUIRK(PCI_VENDOR_ID_INTEL, 0x0d0d,
  2693. "Intel D945P", STAC_D945GTP3),
  2694. SND_PCI_QUIRK(PCI_VENDOR_ID_INTEL, 0x0909,
  2695. "Intel D945P", STAC_D945GTP3),
  2696. SND_PCI_QUIRK(PCI_VENDOR_ID_INTEL, 0x0505,
  2697. "Intel D945P", STAC_D945GTP3),
  2698. SND_PCI_QUIRK(PCI_VENDOR_ID_INTEL, 0x0707,
  2699. "Intel D945P", STAC_D945GTP5),
  2700. /* other intel */
  2701. SND_PCI_QUIRK(PCI_VENDOR_ID_INTEL, 0x0204,
  2702. "Intel D945", STAC_D945_REF),
  2703. /* other systems */
  2704. /* Apple Intel Mac (Mac Mini, MacBook, MacBook Pro...) */
  2705. SND_PCI_QUIRK(0x8384, 0x7680, "Mac", STAC_INTEL_MAC_AUTO),
  2706. /* Dell systems */
  2707. SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x01a7,
  2708. "unknown Dell", STAC_922X_DELL_D81),
  2709. SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x01a9,
  2710. "unknown Dell", STAC_922X_DELL_D81),
  2711. SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x01ab,
  2712. "unknown Dell", STAC_922X_DELL_D81),
  2713. SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x01ac,
  2714. "unknown Dell", STAC_922X_DELL_D82),
  2715. SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x01bf,
  2716. "unknown Dell", STAC_922X_DELL_M81),
  2717. SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x01d0,
  2718. "unknown Dell", STAC_922X_DELL_D82),
  2719. SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x01d1,
  2720. "unknown Dell", STAC_922X_DELL_D81),
  2721. SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x01d2,
  2722. "unknown Dell", STAC_922X_DELL_D81),
  2723. SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x01d7,
  2724. "Dell XPS M1210", STAC_922X_DELL_M82),
  2725. /* ECS/PC Chips boards */
  2726. SND_PCI_QUIRK_MASK(0x1019, 0xf000, 0x2000,
  2727. "ECS/PC chips", STAC_ECS_202),
  2728. {} /* terminator */
  2729. };
  2730. static const struct hda_pintbl ref927x_pin_configs[] = {
  2731. { 0x0a, 0x02214020 },
  2732. { 0x0b, 0x02a19080 },
  2733. { 0x0c, 0x0181304e },
  2734. { 0x0d, 0x01014010 },
  2735. { 0x0e, 0x01a19040 },
  2736. { 0x0f, 0x01011012 },
  2737. { 0x10, 0x01016011 },
  2738. { 0x11, 0x0101201f },
  2739. { 0x12, 0x183301f0 },
  2740. { 0x13, 0x18a001f0 },
  2741. { 0x14, 0x18a001f0 },
  2742. { 0x21, 0x01442070 },
  2743. { 0x22, 0x01c42190 },
  2744. { 0x23, 0x40000100 },
  2745. {}
  2746. };
  2747. static const struct hda_pintbl d965_3st_pin_configs[] = {
  2748. { 0x0a, 0x0221401f },
  2749. { 0x0b, 0x02a19120 },
  2750. { 0x0c, 0x40000100 },
  2751. { 0x0d, 0x01014011 },
  2752. { 0x0e, 0x01a19021 },
  2753. { 0x0f, 0x01813024 },
  2754. { 0x10, 0x40000100 },
  2755. { 0x11, 0x40000100 },
  2756. { 0x12, 0x40000100 },
  2757. { 0x13, 0x40000100 },
  2758. { 0x14, 0x40000100 },
  2759. { 0x21, 0x40000100 },
  2760. { 0x22, 0x40000100 },
  2761. { 0x23, 0x40000100 },
  2762. {}
  2763. };
  2764. static const struct hda_pintbl d965_5st_pin_configs[] = {
  2765. { 0x0a, 0x02214020 },
  2766. { 0x0b, 0x02a19080 },
  2767. { 0x0c, 0x0181304e },
  2768. { 0x0d, 0x01014010 },
  2769. { 0x0e, 0x01a19040 },
  2770. { 0x0f, 0x01011012 },
  2771. { 0x10, 0x01016011 },
  2772. { 0x11, 0x40000100 },
  2773. { 0x12, 0x40000100 },
  2774. { 0x13, 0x40000100 },
  2775. { 0x14, 0x40000100 },
  2776. { 0x21, 0x01442070 },
  2777. { 0x22, 0x40000100 },
  2778. { 0x23, 0x40000100 },
  2779. {}
  2780. };
  2781. static const struct hda_pintbl d965_5st_no_fp_pin_configs[] = {
  2782. { 0x0a, 0x40000100 },
  2783. { 0x0b, 0x40000100 },
  2784. { 0x0c, 0x0181304e },
  2785. { 0x0d, 0x01014010 },
  2786. { 0x0e, 0x01a19040 },
  2787. { 0x0f, 0x01011012 },
  2788. { 0x10, 0x01016011 },
  2789. { 0x11, 0x40000100 },
  2790. { 0x12, 0x40000100 },
  2791. { 0x13, 0x40000100 },
  2792. { 0x14, 0x40000100 },
  2793. { 0x21, 0x01442070 },
  2794. { 0x22, 0x40000100 },
  2795. { 0x23, 0x40000100 },
  2796. {}
  2797. };
  2798. static const struct hda_pintbl dell_3st_pin_configs[] = {
  2799. { 0x0a, 0x02211230 },
  2800. { 0x0b, 0x02a11220 },
  2801. { 0x0c, 0x01a19040 },
  2802. { 0x0d, 0x01114210 },
  2803. { 0x0e, 0x01111212 },
  2804. { 0x0f, 0x01116211 },
  2805. { 0x10, 0x01813050 },
  2806. { 0x11, 0x01112214 },
  2807. { 0x12, 0x403003fa },
  2808. { 0x13, 0x90a60040 },
  2809. { 0x14, 0x90a60040 },
  2810. { 0x21, 0x404003fb },
  2811. { 0x22, 0x40c003fc },
  2812. { 0x23, 0x40000100 },
  2813. {}
  2814. };
  2815. static void stac927x_fixup_ref_no_jd(struct hda_codec *codec,
  2816. const struct hda_fixup *fix, int action)
  2817. {
  2818. /* no jack detecion for ref-no-jd model */
  2819. if (action == HDA_FIXUP_ACT_PRE_PROBE)
  2820. codec->no_jack_detect = 1;
  2821. }
  2822. static void stac927x_fixup_ref(struct hda_codec *codec,
  2823. const struct hda_fixup *fix, int action)
  2824. {
  2825. struct sigmatel_spec *spec = codec->spec;
  2826. if (action == HDA_FIXUP_ACT_PRE_PROBE) {
  2827. snd_hda_apply_pincfgs(codec, ref927x_pin_configs);
  2828. spec->eapd_mask = spec->gpio_mask = 0;
  2829. spec->gpio_dir = spec->gpio_data = 0;
  2830. }
  2831. }
  2832. static void stac927x_fixup_dell_dmic(struct hda_codec *codec,
  2833. const struct hda_fixup *fix, int action)
  2834. {
  2835. struct sigmatel_spec *spec = codec->spec;
  2836. if (action != HDA_FIXUP_ACT_PRE_PROBE)
  2837. return;
  2838. if (codec->subsystem_id != 0x1028022f) {
  2839. /* GPIO2 High = Enable EAPD */
  2840. spec->eapd_mask = spec->gpio_mask = 0x04;
  2841. spec->gpio_dir = spec->gpio_data = 0x04;
  2842. }
  2843. snd_hda_add_verbs(codec, dell_3st_core_init);
  2844. spec->volknob_init = 1;
  2845. }
  2846. static void stac927x_fixup_volknob(struct hda_codec *codec,
  2847. const struct hda_fixup *fix, int action)
  2848. {
  2849. struct sigmatel_spec *spec = codec->spec;
  2850. if (action == HDA_FIXUP_ACT_PRE_PROBE) {
  2851. snd_hda_add_verbs(codec, stac927x_volknob_core_init);
  2852. spec->volknob_init = 1;
  2853. }
  2854. }
  2855. static const struct hda_fixup stac927x_fixups[] = {
  2856. [STAC_D965_REF_NO_JD] = {
  2857. .type = HDA_FIXUP_FUNC,
  2858. .v.func = stac927x_fixup_ref_no_jd,
  2859. .chained = true,
  2860. .chain_id = STAC_D965_REF,
  2861. },
  2862. [STAC_D965_REF] = {
  2863. .type = HDA_FIXUP_FUNC,
  2864. .v.func = stac927x_fixup_ref,
  2865. },
  2866. [STAC_D965_3ST] = {
  2867. .type = HDA_FIXUP_PINS,
  2868. .v.pins = d965_3st_pin_configs,
  2869. .chained = true,
  2870. .chain_id = STAC_D965_VERBS,
  2871. },
  2872. [STAC_D965_5ST] = {
  2873. .type = HDA_FIXUP_PINS,
  2874. .v.pins = d965_5st_pin_configs,
  2875. .chained = true,
  2876. .chain_id = STAC_D965_VERBS,
  2877. },
  2878. [STAC_D965_VERBS] = {
  2879. .type = HDA_FIXUP_VERBS,
  2880. .v.verbs = d965_core_init,
  2881. },
  2882. [STAC_D965_5ST_NO_FP] = {
  2883. .type = HDA_FIXUP_PINS,
  2884. .v.pins = d965_5st_no_fp_pin_configs,
  2885. },
  2886. [STAC_DELL_3ST] = {
  2887. .type = HDA_FIXUP_PINS,
  2888. .v.pins = dell_3st_pin_configs,
  2889. .chained = true,
  2890. .chain_id = STAC_927X_DELL_DMIC,
  2891. },
  2892. [STAC_DELL_BIOS] = {
  2893. .type = HDA_FIXUP_PINS,
  2894. .v.pins = (const struct hda_pintbl[]) {
  2895. /* configure the analog microphone on some laptops */
  2896. { 0x0c, 0x90a79130 },
  2897. /* correct the front output jack as a hp out */
  2898. { 0x0f, 0x0227011f },
  2899. /* correct the front input jack as a mic */
  2900. { 0x0e, 0x02a79130 },
  2901. {}
  2902. },
  2903. .chained = true,
  2904. .chain_id = STAC_927X_DELL_DMIC,
  2905. },
  2906. [STAC_DELL_BIOS_SPDIF] = {
  2907. .type = HDA_FIXUP_PINS,
  2908. .v.pins = (const struct hda_pintbl[]) {
  2909. /* correct the device field to SPDIF out */
  2910. { 0x21, 0x01442070 },
  2911. {}
  2912. },
  2913. .chained = true,
  2914. .chain_id = STAC_DELL_BIOS,
  2915. },
  2916. [STAC_927X_DELL_DMIC] = {
  2917. .type = HDA_FIXUP_FUNC,
  2918. .v.func = stac927x_fixup_dell_dmic,
  2919. },
  2920. [STAC_927X_VOLKNOB] = {
  2921. .type = HDA_FIXUP_FUNC,
  2922. .v.func = stac927x_fixup_volknob,
  2923. },
  2924. };
  2925. static const struct hda_model_fixup stac927x_models[] = {
  2926. { .id = STAC_D965_REF_NO_JD, .name = "ref-no-jd" },
  2927. { .id = STAC_D965_REF, .name = "ref" },
  2928. { .id = STAC_D965_3ST, .name = "3stack" },
  2929. { .id = STAC_D965_5ST, .name = "5stack" },
  2930. { .id = STAC_D965_5ST_NO_FP, .name = "5stack-no-fp" },
  2931. { .id = STAC_DELL_3ST, .name = "dell-3stack" },
  2932. { .id = STAC_DELL_BIOS, .name = "dell-bios" },
  2933. { .id = STAC_927X_VOLKNOB, .name = "volknob" },
  2934. {}
  2935. };
  2936. static const struct snd_pci_quirk stac927x_fixup_tbl[] = {
  2937. /* SigmaTel reference board */
  2938. SND_PCI_QUIRK(PCI_VENDOR_ID_INTEL, 0x2668,
  2939. "DFI LanParty", STAC_D965_REF),
  2940. SND_PCI_QUIRK(PCI_VENDOR_ID_DFI, 0x3101,
  2941. "DFI LanParty", STAC_D965_REF),
  2942. /* Intel 946 based systems */
  2943. SND_PCI_QUIRK(PCI_VENDOR_ID_INTEL, 0x3d01, "Intel D946", STAC_D965_3ST),
  2944. SND_PCI_QUIRK(PCI_VENDOR_ID_INTEL, 0xa301, "Intel D946", STAC_D965_3ST),
  2945. /* 965 based 3 stack systems */
  2946. SND_PCI_QUIRK_MASK(PCI_VENDOR_ID_INTEL, 0xff00, 0x2100,
  2947. "Intel D965", STAC_D965_3ST),
  2948. SND_PCI_QUIRK_MASK(PCI_VENDOR_ID_INTEL, 0xff00, 0x2000,
  2949. "Intel D965", STAC_D965_3ST),
  2950. /* Dell 3 stack systems */
  2951. SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x01dd, "Dell Dimension E520", STAC_DELL_3ST),
  2952. SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x01ed, "Dell ", STAC_DELL_3ST),
  2953. SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x01f4, "Dell ", STAC_DELL_3ST),
  2954. /* Dell 3 stack systems with verb table in BIOS */
  2955. SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x01f3, "Dell Inspiron 1420", STAC_DELL_BIOS),
  2956. SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x01f7, "Dell XPS M1730", STAC_DELL_BIOS),
  2957. SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x0227, "Dell Vostro 1400 ", STAC_DELL_BIOS),
  2958. SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x022e, "Dell ", STAC_DELL_BIOS_SPDIF),
  2959. SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x022f, "Dell Inspiron 1525", STAC_DELL_BIOS),
  2960. SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x0242, "Dell ", STAC_DELL_BIOS),
  2961. SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x0243, "Dell ", STAC_DELL_BIOS),
  2962. SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x02ff, "Dell ", STAC_DELL_BIOS),
  2963. SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x0209, "Dell XPS 1330", STAC_DELL_BIOS_SPDIF),
  2964. /* 965 based 5 stack systems */
  2965. SND_PCI_QUIRK_MASK(PCI_VENDOR_ID_INTEL, 0xff00, 0x2300,
  2966. "Intel D965", STAC_D965_5ST),
  2967. SND_PCI_QUIRK_MASK(PCI_VENDOR_ID_INTEL, 0xff00, 0x2500,
  2968. "Intel D965", STAC_D965_5ST),
  2969. /* volume-knob fixes */
  2970. SND_PCI_QUIRK_VENDOR(0x10cf, "FSC", STAC_927X_VOLKNOB),
  2971. {} /* terminator */
  2972. };
  2973. static const struct hda_pintbl ref9205_pin_configs[] = {
  2974. { 0x0a, 0x40000100 },
  2975. { 0x0b, 0x40000100 },
  2976. { 0x0c, 0x01016011 },
  2977. { 0x0d, 0x01014010 },
  2978. { 0x0e, 0x01813122 },
  2979. { 0x0f, 0x01a19021 },
  2980. { 0x14, 0x01019020 },
  2981. { 0x16, 0x40000100 },
  2982. { 0x17, 0x90a000f0 },
  2983. { 0x18, 0x90a000f0 },
  2984. { 0x21, 0x01441030 },
  2985. { 0x22, 0x01c41030 },
  2986. {}
  2987. };
  2988. /*
  2989. STAC 9205 pin configs for
  2990. 102801F1
  2991. 102801F2
  2992. 102801FC
  2993. 102801FD
  2994. 10280204
  2995. 1028021F
  2996. 10280228 (Dell Vostro 1500)
  2997. 10280229 (Dell Vostro 1700)
  2998. */
  2999. static const struct hda_pintbl dell_9205_m42_pin_configs[] = {
  3000. { 0x0a, 0x0321101F },
  3001. { 0x0b, 0x03A11020 },
  3002. { 0x0c, 0x400003FA },
  3003. { 0x0d, 0x90170310 },
  3004. { 0x0e, 0x400003FB },
  3005. { 0x0f, 0x400003FC },
  3006. { 0x14, 0x400003FD },
  3007. { 0x16, 0x40F000F9 },
  3008. { 0x17, 0x90A60330 },
  3009. { 0x18, 0x400003FF },
  3010. { 0x21, 0x0144131F },
  3011. { 0x22, 0x40C003FE },
  3012. {}
  3013. };
  3014. /*
  3015. STAC 9205 pin configs for
  3016. 102801F9
  3017. 102801FA
  3018. 102801FE
  3019. 102801FF (Dell Precision M4300)
  3020. 10280206
  3021. 10280200
  3022. 10280201
  3023. */
  3024. static const struct hda_pintbl dell_9205_m43_pin_configs[] = {
  3025. { 0x0a, 0x0321101f },
  3026. { 0x0b, 0x03a11020 },
  3027. { 0x0c, 0x90a70330 },
  3028. { 0x0d, 0x90170310 },
  3029. { 0x0e, 0x400000fe },
  3030. { 0x0f, 0x400000ff },
  3031. { 0x14, 0x400000fd },
  3032. { 0x16, 0x40f000f9 },
  3033. { 0x17, 0x400000fa },
  3034. { 0x18, 0x400000fc },
  3035. { 0x21, 0x0144131f },
  3036. { 0x22, 0x40c003f8 },
  3037. /* Enable SPDIF in/out */
  3038. { 0x1f, 0x01441030 },
  3039. { 0x20, 0x1c410030 },
  3040. {}
  3041. };
  3042. static const struct hda_pintbl dell_9205_m44_pin_configs[] = {
  3043. { 0x0a, 0x0421101f },
  3044. { 0x0b, 0x04a11020 },
  3045. { 0x0c, 0x400003fa },
  3046. { 0x0d, 0x90170310 },
  3047. { 0x0e, 0x400003fb },
  3048. { 0x0f, 0x400003fc },
  3049. { 0x14, 0x400003fd },
  3050. { 0x16, 0x400003f9 },
  3051. { 0x17, 0x90a60330 },
  3052. { 0x18, 0x400003ff },
  3053. { 0x21, 0x01441340 },
  3054. { 0x22, 0x40c003fe },
  3055. {}
  3056. };
  3057. static void stac9205_fixup_ref(struct hda_codec *codec,
  3058. const struct hda_fixup *fix, int action)
  3059. {
  3060. struct sigmatel_spec *spec = codec->spec;
  3061. if (action == HDA_FIXUP_ACT_PRE_PROBE) {
  3062. snd_hda_apply_pincfgs(codec, ref9205_pin_configs);
  3063. /* SPDIF-In enabled */
  3064. spec->eapd_mask = spec->gpio_mask = spec->gpio_dir = 0;
  3065. }
  3066. }
  3067. static void stac9205_fixup_dell_m43(struct hda_codec *codec,
  3068. const struct hda_fixup *fix, int action)
  3069. {
  3070. struct sigmatel_spec *spec = codec->spec;
  3071. struct hda_jack_tbl *jack;
  3072. if (action == HDA_FIXUP_ACT_PRE_PROBE) {
  3073. snd_hda_apply_pincfgs(codec, dell_9205_m43_pin_configs);
  3074. /* Enable unsol response for GPIO4/Dock HP connection */
  3075. snd_hda_codec_write_cache(codec, codec->afg, 0,
  3076. AC_VERB_SET_GPIO_UNSOLICITED_RSP_MASK, 0x10);
  3077. snd_hda_jack_detect_enable_callback(codec, codec->afg,
  3078. STAC_VREF_EVENT,
  3079. stac_vref_event);
  3080. jack = snd_hda_jack_tbl_get(codec, codec->afg);
  3081. if (jack)
  3082. jack->private_data = 0x01;
  3083. spec->gpio_dir = 0x0b;
  3084. spec->eapd_mask = 0x01;
  3085. spec->gpio_mask = 0x1b;
  3086. spec->gpio_mute = 0x10;
  3087. /* GPIO0 High = EAPD, GPIO1 Low = Headphone Mute,
  3088. * GPIO3 Low = DRM
  3089. */
  3090. spec->gpio_data = 0x01;
  3091. }
  3092. }
  3093. static void stac9205_fixup_eapd(struct hda_codec *codec,
  3094. const struct hda_fixup *fix, int action)
  3095. {
  3096. struct sigmatel_spec *spec = codec->spec;
  3097. if (action == HDA_FIXUP_ACT_PRE_PROBE)
  3098. spec->eapd_switch = 0;
  3099. }
  3100. static const struct hda_fixup stac9205_fixups[] = {
  3101. [STAC_9205_REF] = {
  3102. .type = HDA_FIXUP_FUNC,
  3103. .v.func = stac9205_fixup_ref,
  3104. },
  3105. [STAC_9205_DELL_M42] = {
  3106. .type = HDA_FIXUP_PINS,
  3107. .v.pins = dell_9205_m42_pin_configs,
  3108. },
  3109. [STAC_9205_DELL_M43] = {
  3110. .type = HDA_FIXUP_FUNC,
  3111. .v.func = stac9205_fixup_dell_m43,
  3112. },
  3113. [STAC_9205_DELL_M44] = {
  3114. .type = HDA_FIXUP_PINS,
  3115. .v.pins = dell_9205_m44_pin_configs,
  3116. },
  3117. [STAC_9205_EAPD] = {
  3118. .type = HDA_FIXUP_FUNC,
  3119. .v.func = stac9205_fixup_eapd,
  3120. },
  3121. {}
  3122. };
  3123. static const struct hda_model_fixup stac9205_models[] = {
  3124. { .id = STAC_9205_REF, .name = "ref" },
  3125. { .id = STAC_9205_DELL_M42, .name = "dell-m42" },
  3126. { .id = STAC_9205_DELL_M43, .name = "dell-m43" },
  3127. { .id = STAC_9205_DELL_M44, .name = "dell-m44" },
  3128. { .id = STAC_9205_EAPD, .name = "eapd" },
  3129. {}
  3130. };
  3131. static const struct snd_pci_quirk stac9205_fixup_tbl[] = {
  3132. /* SigmaTel reference board */
  3133. SND_PCI_QUIRK(PCI_VENDOR_ID_INTEL, 0x2668,
  3134. "DFI LanParty", STAC_9205_REF),
  3135. SND_PCI_QUIRK(PCI_VENDOR_ID_INTEL, 0xfb30,
  3136. "SigmaTel", STAC_9205_REF),
  3137. SND_PCI_QUIRK(PCI_VENDOR_ID_DFI, 0x3101,
  3138. "DFI LanParty", STAC_9205_REF),
  3139. /* Dell */
  3140. SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x01f1,
  3141. "unknown Dell", STAC_9205_DELL_M42),
  3142. SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x01f2,
  3143. "unknown Dell", STAC_9205_DELL_M42),
  3144. SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x01f8,
  3145. "Dell Precision", STAC_9205_DELL_M43),
  3146. SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x01f9,
  3147. "Dell Precision", STAC_9205_DELL_M43),
  3148. SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x01fa,
  3149. "Dell Precision", STAC_9205_DELL_M43),
  3150. SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x01fc,
  3151. "unknown Dell", STAC_9205_DELL_M42),
  3152. SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x01fd,
  3153. "unknown Dell", STAC_9205_DELL_M42),
  3154. SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x01fe,
  3155. "Dell Precision", STAC_9205_DELL_M43),
  3156. SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x01ff,
  3157. "Dell Precision M4300", STAC_9205_DELL_M43),
  3158. SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x0204,
  3159. "unknown Dell", STAC_9205_DELL_M42),
  3160. SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x0206,
  3161. "Dell Precision", STAC_9205_DELL_M43),
  3162. SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x021b,
  3163. "Dell Precision", STAC_9205_DELL_M43),
  3164. SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x021c,
  3165. "Dell Precision", STAC_9205_DELL_M43),
  3166. SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x021f,
  3167. "Dell Inspiron", STAC_9205_DELL_M44),
  3168. SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x0228,
  3169. "Dell Vostro 1500", STAC_9205_DELL_M42),
  3170. SND_PCI_QUIRK(PCI_VENDOR_ID_DELL, 0x0229,
  3171. "Dell Vostro 1700", STAC_9205_DELL_M42),
  3172. /* Gateway */
  3173. SND_PCI_QUIRK(0x107b, 0x0560, "Gateway T6834c", STAC_9205_EAPD),
  3174. SND_PCI_QUIRK(0x107b, 0x0565, "Gateway T1616", STAC_9205_EAPD),
  3175. {} /* terminator */
  3176. };
  3177. static int stac_parse_auto_config(struct hda_codec *codec)
  3178. {
  3179. struct sigmatel_spec *spec = codec->spec;
  3180. int err;
  3181. err = snd_hda_parse_pin_defcfg(codec, &spec->gen.autocfg, NULL, 0);
  3182. if (err < 0)
  3183. return err;
  3184. /* add hooks */
  3185. spec->gen.pcm_playback_hook = stac_playback_pcm_hook;
  3186. spec->gen.pcm_capture_hook = stac_capture_pcm_hook;
  3187. spec->gen.automute_hook = stac_update_outputs;
  3188. spec->gen.hp_automute_hook = stac_hp_automute;
  3189. spec->gen.line_automute_hook = stac_line_automute;
  3190. spec->gen.mic_autoswitch_hook = stac_mic_autoswitch;
  3191. err = snd_hda_gen_parse_auto_config(codec, &spec->gen.autocfg);
  3192. if (err < 0)
  3193. return err;
  3194. /* minimum value is actually mute */
  3195. spec->gen.vmaster_tlv[3] |= TLV_DB_SCALE_MUTE;
  3196. /* setup analog beep controls */
  3197. if (spec->anabeep_nid > 0) {
  3198. err = stac_auto_create_beep_ctls(codec,
  3199. spec->anabeep_nid);
  3200. if (err < 0)
  3201. return err;
  3202. }
  3203. /* setup digital beep controls and input device */
  3204. #ifdef CONFIG_SND_HDA_INPUT_BEEP
  3205. if (spec->digbeep_nid > 0) {
  3206. hda_nid_t nid = spec->digbeep_nid;
  3207. unsigned int caps;
  3208. err = stac_auto_create_beep_ctls(codec, nid);
  3209. if (err < 0)
  3210. return err;
  3211. err = snd_hda_attach_beep_device(codec, nid);
  3212. if (err < 0)
  3213. return err;
  3214. if (codec->beep) {
  3215. /* IDT/STAC codecs have linear beep tone parameter */
  3216. codec->beep->linear_tone = spec->linear_tone_beep;
  3217. /* if no beep switch is available, make its own one */
  3218. caps = query_amp_caps(codec, nid, HDA_OUTPUT);
  3219. if (!(caps & AC_AMPCAP_MUTE)) {
  3220. err = stac_beep_switch_ctl(codec);
  3221. if (err < 0)
  3222. return err;
  3223. }
  3224. }
  3225. }
  3226. #endif
  3227. if (spec->gpio_led)
  3228. spec->gen.vmaster_mute.hook = stac_vmaster_hook;
  3229. if (spec->aloopback_ctl &&
  3230. snd_hda_get_bool_hint(codec, "loopback") == 1) {
  3231. if (!snd_hda_gen_add_kctl(&spec->gen, NULL, spec->aloopback_ctl))
  3232. return -ENOMEM;
  3233. }
  3234. if (spec->have_spdif_mux) {
  3235. err = stac_create_spdif_mux_ctls(codec);
  3236. if (err < 0)
  3237. return err;
  3238. }
  3239. stac_init_power_map(codec);
  3240. return 0;
  3241. }
  3242. static int stac_init(struct hda_codec *codec)
  3243. {
  3244. struct sigmatel_spec *spec = codec->spec;
  3245. unsigned int gpio;
  3246. int i;
  3247. /* override some hints */
  3248. stac_store_hints(codec);
  3249. /* set up GPIO */
  3250. gpio = spec->gpio_data;
  3251. /* turn on EAPD statically when spec->eapd_switch isn't set.
  3252. * otherwise, unsol event will turn it on/off dynamically
  3253. */
  3254. if (!spec->eapd_switch)
  3255. gpio |= spec->eapd_mask;
  3256. stac_gpio_set(codec, spec->gpio_mask, spec->gpio_dir, gpio);
  3257. snd_hda_gen_init(codec);
  3258. /* sync the power-map */
  3259. if (spec->num_pwrs)
  3260. snd_hda_codec_write(codec, codec->afg, 0,
  3261. AC_VERB_IDT_SET_POWER_MAP,
  3262. spec->power_map_bits);
  3263. /* power down inactive ADCs */
  3264. if (spec->powerdown_adcs) {
  3265. for (i = 0; i < spec->gen.num_all_adcs; i++) {
  3266. if (spec->active_adcs & (1 << i))
  3267. continue;
  3268. snd_hda_codec_write(codec, spec->gen.all_adcs[i], 0,
  3269. AC_VERB_SET_POWER_STATE,
  3270. AC_PWRST_D3);
  3271. }
  3272. }
  3273. return 0;
  3274. }
  3275. static void stac_shutup(struct hda_codec *codec)
  3276. {
  3277. struct sigmatel_spec *spec = codec->spec;
  3278. snd_hda_shutup_pins(codec);
  3279. if (spec->eapd_mask)
  3280. stac_gpio_set(codec, spec->gpio_mask,
  3281. spec->gpio_dir, spec->gpio_data &
  3282. ~spec->eapd_mask);
  3283. }
  3284. static void stac_free(struct hda_codec *codec)
  3285. {
  3286. struct sigmatel_spec *spec = codec->spec;
  3287. if (!spec)
  3288. return;
  3289. snd_hda_gen_spec_free(&spec->gen);
  3290. kfree(spec);
  3291. snd_hda_detach_beep_device(codec);
  3292. }
  3293. #ifdef CONFIG_PROC_FS
  3294. static void stac92hd_proc_hook(struct snd_info_buffer *buffer,
  3295. struct hda_codec *codec, hda_nid_t nid)
  3296. {
  3297. if (nid == codec->afg)
  3298. snd_iprintf(buffer, "Power-Map: 0x%02x\n",
  3299. snd_hda_codec_read(codec, nid, 0,
  3300. AC_VERB_IDT_GET_POWER_MAP, 0));
  3301. }
  3302. static void analog_loop_proc_hook(struct snd_info_buffer *buffer,
  3303. struct hda_codec *codec,
  3304. unsigned int verb)
  3305. {
  3306. snd_iprintf(buffer, "Analog Loopback: 0x%02x\n",
  3307. snd_hda_codec_read(codec, codec->afg, 0, verb, 0));
  3308. }
  3309. /* stac92hd71bxx, stac92hd73xx */
  3310. static void stac92hd7x_proc_hook(struct snd_info_buffer *buffer,
  3311. struct hda_codec *codec, hda_nid_t nid)
  3312. {
  3313. stac92hd_proc_hook(buffer, codec, nid);
  3314. if (nid == codec->afg)
  3315. analog_loop_proc_hook(buffer, codec, 0xfa0);
  3316. }
  3317. static void stac9205_proc_hook(struct snd_info_buffer *buffer,
  3318. struct hda_codec *codec, hda_nid_t nid)
  3319. {
  3320. if (nid == codec->afg)
  3321. analog_loop_proc_hook(buffer, codec, 0xfe0);
  3322. }
  3323. static void stac927x_proc_hook(struct snd_info_buffer *buffer,
  3324. struct hda_codec *codec, hda_nid_t nid)
  3325. {
  3326. if (nid == codec->afg)
  3327. analog_loop_proc_hook(buffer, codec, 0xfeb);
  3328. }
  3329. #else
  3330. #define stac92hd_proc_hook NULL
  3331. #define stac92hd7x_proc_hook NULL
  3332. #define stac9205_proc_hook NULL
  3333. #define stac927x_proc_hook NULL
  3334. #endif
  3335. #ifdef CONFIG_PM
  3336. static int stac_resume(struct hda_codec *codec)
  3337. {
  3338. codec->patch_ops.init(codec);
  3339. snd_hda_codec_resume_amp(codec);
  3340. snd_hda_codec_resume_cache(codec);
  3341. return 0;
  3342. }
  3343. static int stac_suspend(struct hda_codec *codec)
  3344. {
  3345. stac_shutup(codec);
  3346. return 0;
  3347. }
  3348. static void stac_set_power_state(struct hda_codec *codec, hda_nid_t fg,
  3349. unsigned int power_state)
  3350. {
  3351. unsigned int afg_power_state = power_state;
  3352. struct sigmatel_spec *spec = codec->spec;
  3353. if (power_state == AC_PWRST_D3) {
  3354. if (spec->vref_mute_led_nid) {
  3355. /* with vref-out pin used for mute led control
  3356. * codec AFG is prevented from D3 state
  3357. */
  3358. afg_power_state = AC_PWRST_D1;
  3359. }
  3360. /* this delay seems necessary to avoid click noise at power-down */
  3361. msleep(100);
  3362. }
  3363. snd_hda_codec_read(codec, fg, 0, AC_VERB_SET_POWER_STATE,
  3364. afg_power_state);
  3365. snd_hda_codec_set_power_to_all(codec, fg, power_state);
  3366. }
  3367. #else
  3368. #define stac_suspend NULL
  3369. #define stac_resume NULL
  3370. #define stac_set_power_state NULL
  3371. #endif /* CONFIG_PM */
  3372. static const struct hda_codec_ops stac_patch_ops = {
  3373. .build_controls = snd_hda_gen_build_controls,
  3374. .build_pcms = snd_hda_gen_build_pcms,
  3375. .init = stac_init,
  3376. .free = stac_free,
  3377. .unsol_event = snd_hda_jack_unsol_event,
  3378. #ifdef CONFIG_PM
  3379. .suspend = stac_suspend,
  3380. .resume = stac_resume,
  3381. #endif
  3382. .reboot_notify = stac_shutup,
  3383. };
  3384. static int alloc_stac_spec(struct hda_codec *codec)
  3385. {
  3386. struct sigmatel_spec *spec;
  3387. spec = kzalloc(sizeof(*spec), GFP_KERNEL);
  3388. if (!spec)
  3389. return -ENOMEM;
  3390. snd_hda_gen_spec_init(&spec->gen);
  3391. codec->spec = spec;
  3392. codec->no_trigger_sense = 1; /* seems common with STAC/IDT codecs */
  3393. return 0;
  3394. }
  3395. static int patch_stac9200(struct hda_codec *codec)
  3396. {
  3397. struct sigmatel_spec *spec;
  3398. int err;
  3399. err = alloc_stac_spec(codec);
  3400. if (err < 0)
  3401. return err;
  3402. spec = codec->spec;
  3403. spec->linear_tone_beep = 1;
  3404. spec->gen.own_eapd_ctl = 1;
  3405. codec->patch_ops = stac_patch_ops;
  3406. snd_hda_add_verbs(codec, stac9200_eapd_init);
  3407. snd_hda_pick_fixup(codec, stac9200_models, stac9200_fixup_tbl,
  3408. stac9200_fixups);
  3409. snd_hda_apply_fixup(codec, HDA_FIXUP_ACT_PRE_PROBE);
  3410. err = stac_parse_auto_config(codec);
  3411. if (err < 0) {
  3412. stac_free(codec);
  3413. return err;
  3414. }
  3415. snd_hda_apply_fixup(codec, HDA_FIXUP_ACT_PROBE);
  3416. return 0;
  3417. }
  3418. static int patch_stac925x(struct hda_codec *codec)
  3419. {
  3420. struct sigmatel_spec *spec;
  3421. int err;
  3422. err = alloc_stac_spec(codec);
  3423. if (err < 0)
  3424. return err;
  3425. spec = codec->spec;
  3426. spec->linear_tone_beep = 1;
  3427. spec->gen.own_eapd_ctl = 1;
  3428. codec->patch_ops = stac_patch_ops;
  3429. snd_hda_add_verbs(codec, stac925x_core_init);
  3430. snd_hda_pick_fixup(codec, stac925x_models, stac925x_fixup_tbl,
  3431. stac925x_fixups);
  3432. snd_hda_apply_fixup(codec, HDA_FIXUP_ACT_PRE_PROBE);
  3433. err = stac_parse_auto_config(codec);
  3434. if (err < 0) {
  3435. stac_free(codec);
  3436. return err;
  3437. }
  3438. snd_hda_apply_fixup(codec, HDA_FIXUP_ACT_PROBE);
  3439. return 0;
  3440. }
  3441. static int patch_stac92hd73xx(struct hda_codec *codec)
  3442. {
  3443. struct sigmatel_spec *spec;
  3444. int err;
  3445. int num_dacs;
  3446. err = alloc_stac_spec(codec);
  3447. if (err < 0)
  3448. return err;
  3449. spec = codec->spec;
  3450. spec->linear_tone_beep = 0;
  3451. spec->gen.mixer_nid = 0x1d;
  3452. spec->have_spdif_mux = 1;
  3453. num_dacs = snd_hda_get_num_conns(codec, 0x0a) - 1;
  3454. if (num_dacs < 3 || num_dacs > 5) {
  3455. printk(KERN_WARNING "hda_codec: Could not determine "
  3456. "number of channels defaulting to DAC count\n");
  3457. num_dacs = 5;
  3458. }
  3459. switch (num_dacs) {
  3460. case 0x3: /* 6 Channel */
  3461. spec->aloopback_ctl = &stac92hd73xx_6ch_loopback;
  3462. break;
  3463. case 0x4: /* 8 Channel */
  3464. spec->aloopback_ctl = &stac92hd73xx_8ch_loopback;
  3465. break;
  3466. case 0x5: /* 10 Channel */
  3467. spec->aloopback_ctl = &stac92hd73xx_10ch_loopback;
  3468. break;
  3469. }
  3470. spec->aloopback_mask = 0x01;
  3471. spec->aloopback_shift = 8;
  3472. spec->digbeep_nid = 0x1c;
  3473. /* GPIO0 High = Enable EAPD */
  3474. spec->eapd_mask = spec->gpio_mask = spec->gpio_dir = 0x1;
  3475. spec->gpio_data = 0x01;
  3476. spec->eapd_switch = 1;
  3477. spec->num_pwrs = ARRAY_SIZE(stac92hd73xx_pwr_nids);
  3478. spec->pwr_nids = stac92hd73xx_pwr_nids;
  3479. spec->gen.own_eapd_ctl = 1;
  3480. spec->gen.power_down_unused = 1;
  3481. codec->patch_ops = stac_patch_ops;
  3482. snd_hda_pick_fixup(codec, stac92hd73xx_models, stac92hd73xx_fixup_tbl,
  3483. stac92hd73xx_fixups);
  3484. snd_hda_apply_fixup(codec, HDA_FIXUP_ACT_PRE_PROBE);
  3485. if (!spec->volknob_init)
  3486. snd_hda_add_verbs(codec, stac92hd73xx_core_init);
  3487. err = stac_parse_auto_config(codec);
  3488. if (err < 0) {
  3489. stac_free(codec);
  3490. return err;
  3491. }
  3492. codec->proc_widget_hook = stac92hd7x_proc_hook;
  3493. snd_hda_apply_fixup(codec, HDA_FIXUP_ACT_PROBE);
  3494. return 0;
  3495. }
  3496. static void stac_setup_gpio(struct hda_codec *codec)
  3497. {
  3498. struct sigmatel_spec *spec = codec->spec;
  3499. if (spec->gpio_led) {
  3500. if (!spec->vref_mute_led_nid) {
  3501. spec->gpio_mask |= spec->gpio_led;
  3502. spec->gpio_dir |= spec->gpio_led;
  3503. spec->gpio_data |= spec->gpio_led;
  3504. } else {
  3505. codec->patch_ops.set_power_state =
  3506. stac_set_power_state;
  3507. }
  3508. }
  3509. if (spec->mic_mute_led_gpio) {
  3510. spec->gpio_mask |= spec->mic_mute_led_gpio;
  3511. spec->gpio_dir |= spec->mic_mute_led_gpio;
  3512. spec->mic_mute_led_on = true;
  3513. spec->gpio_data |= spec->mic_mute_led_gpio;
  3514. spec->gen.cap_sync_hook = stac_capture_led_hook;
  3515. }
  3516. }
  3517. static int patch_stac92hd83xxx(struct hda_codec *codec)
  3518. {
  3519. struct sigmatel_spec *spec;
  3520. int err;
  3521. err = alloc_stac_spec(codec);
  3522. if (err < 0)
  3523. return err;
  3524. codec->epss = 0; /* longer delay needed for D3 */
  3525. spec = codec->spec;
  3526. spec->linear_tone_beep = 0;
  3527. spec->gen.own_eapd_ctl = 1;
  3528. spec->gen.power_down_unused = 1;
  3529. spec->gen.mixer_nid = 0x1b;
  3530. spec->digbeep_nid = 0x21;
  3531. spec->pwr_nids = stac92hd83xxx_pwr_nids;
  3532. spec->num_pwrs = ARRAY_SIZE(stac92hd83xxx_pwr_nids);
  3533. spec->default_polarity = -1; /* no default cfg */
  3534. codec->patch_ops = stac_patch_ops;
  3535. snd_hda_add_verbs(codec, stac92hd83xxx_core_init);
  3536. snd_hda_pick_fixup(codec, stac92hd83xxx_models, stac92hd83xxx_fixup_tbl,
  3537. stac92hd83xxx_fixups);
  3538. snd_hda_apply_fixup(codec, HDA_FIXUP_ACT_PRE_PROBE);
  3539. stac_setup_gpio(codec);
  3540. err = stac_parse_auto_config(codec);
  3541. if (err < 0) {
  3542. stac_free(codec);
  3543. return err;
  3544. }
  3545. codec->proc_widget_hook = stac92hd_proc_hook;
  3546. snd_hda_apply_fixup(codec, HDA_FIXUP_ACT_PROBE);
  3547. return 0;
  3548. }
  3549. static const hda_nid_t stac92hd95_pwr_nids[] = {
  3550. 0x0a, 0x0b, 0x0c, 0x0d
  3551. };
  3552. static int patch_stac92hd95(struct hda_codec *codec)
  3553. {
  3554. struct sigmatel_spec *spec;
  3555. int err;
  3556. err = alloc_stac_spec(codec);
  3557. if (err < 0)
  3558. return err;
  3559. codec->epss = 0; /* longer delay needed for D3 */
  3560. spec = codec->spec;
  3561. spec->linear_tone_beep = 0;
  3562. spec->gen.own_eapd_ctl = 1;
  3563. spec->gen.power_down_unused = 1;
  3564. spec->digbeep_nid = 0x19;
  3565. spec->pwr_nids = stac92hd95_pwr_nids;
  3566. spec->num_pwrs = ARRAY_SIZE(stac92hd95_pwr_nids);
  3567. spec->default_polarity = -1; /* no default cfg */
  3568. codec->patch_ops = stac_patch_ops;
  3569. err = stac_parse_auto_config(codec);
  3570. if (err < 0) {
  3571. stac_free(codec);
  3572. return err;
  3573. }
  3574. codec->proc_widget_hook = stac92hd_proc_hook;
  3575. return 0;
  3576. }
  3577. static int patch_stac92hd71bxx(struct hda_codec *codec)
  3578. {
  3579. struct sigmatel_spec *spec;
  3580. const struct hda_verb *unmute_init = stac92hd71bxx_unmute_core_init;
  3581. int err;
  3582. err = alloc_stac_spec(codec);
  3583. if (err < 0)
  3584. return err;
  3585. spec = codec->spec;
  3586. spec->linear_tone_beep = 0;
  3587. spec->gen.own_eapd_ctl = 1;
  3588. spec->gen.power_down_unused = 1;
  3589. spec->gen.mixer_nid = 0x17;
  3590. spec->have_spdif_mux = 1;
  3591. codec->patch_ops = stac_patch_ops;
  3592. /* GPIO0 = EAPD */
  3593. spec->gpio_mask = 0x01;
  3594. spec->gpio_dir = 0x01;
  3595. spec->gpio_data = 0x01;
  3596. switch (codec->vendor_id) {
  3597. case 0x111d76b6: /* 4 Port without Analog Mixer */
  3598. case 0x111d76b7:
  3599. unmute_init++;
  3600. break;
  3601. case 0x111d7608: /* 5 Port with Analog Mixer */
  3602. if ((codec->revision_id & 0xf) == 0 ||
  3603. (codec->revision_id & 0xf) == 1)
  3604. spec->stream_delay = 40; /* 40 milliseconds */
  3605. /* disable VSW */
  3606. unmute_init++;
  3607. snd_hda_codec_set_pincfg(codec, 0x0f, 0x40f000f0);
  3608. snd_hda_codec_set_pincfg(codec, 0x19, 0x40f000f3);
  3609. break;
  3610. case 0x111d7603: /* 6 Port with Analog Mixer */
  3611. if ((codec->revision_id & 0xf) == 1)
  3612. spec->stream_delay = 40; /* 40 milliseconds */
  3613. break;
  3614. }
  3615. if (get_wcaps_type(get_wcaps(codec, 0x28)) == AC_WID_VOL_KNB)
  3616. snd_hda_add_verbs(codec, stac92hd71bxx_core_init);
  3617. if (get_wcaps(codec, 0xa) & AC_WCAP_IN_AMP)
  3618. snd_hda_sequence_write_cache(codec, unmute_init);
  3619. spec->aloopback_ctl = &stac92hd71bxx_loopback;
  3620. spec->aloopback_mask = 0x50;
  3621. spec->aloopback_shift = 0;
  3622. spec->powerdown_adcs = 1;
  3623. spec->digbeep_nid = 0x26;
  3624. spec->num_pwrs = ARRAY_SIZE(stac92hd71bxx_pwr_nids);
  3625. spec->pwr_nids = stac92hd71bxx_pwr_nids;
  3626. snd_hda_pick_fixup(codec, stac92hd71bxx_models, stac92hd71bxx_fixup_tbl,
  3627. stac92hd71bxx_fixups);
  3628. snd_hda_apply_fixup(codec, HDA_FIXUP_ACT_PRE_PROBE);
  3629. stac_setup_gpio(codec);
  3630. err = stac_parse_auto_config(codec);
  3631. if (err < 0) {
  3632. stac_free(codec);
  3633. return err;
  3634. }
  3635. codec->proc_widget_hook = stac92hd7x_proc_hook;
  3636. snd_hda_apply_fixup(codec, HDA_FIXUP_ACT_PROBE);
  3637. return 0;
  3638. }
  3639. static int patch_stac922x(struct hda_codec *codec)
  3640. {
  3641. struct sigmatel_spec *spec;
  3642. int err;
  3643. err = alloc_stac_spec(codec);
  3644. if (err < 0)
  3645. return err;
  3646. spec = codec->spec;
  3647. spec->linear_tone_beep = 1;
  3648. spec->gen.own_eapd_ctl = 1;
  3649. codec->patch_ops = stac_patch_ops;
  3650. snd_hda_add_verbs(codec, stac922x_core_init);
  3651. /* Fix Mux capture level; max to 2 */
  3652. snd_hda_override_amp_caps(codec, 0x12, HDA_OUTPUT,
  3653. (0 << AC_AMPCAP_OFFSET_SHIFT) |
  3654. (2 << AC_AMPCAP_NUM_STEPS_SHIFT) |
  3655. (0x27 << AC_AMPCAP_STEP_SIZE_SHIFT) |
  3656. (0 << AC_AMPCAP_MUTE_SHIFT));
  3657. snd_hda_pick_fixup(codec, stac922x_models, stac922x_fixup_tbl,
  3658. stac922x_fixups);
  3659. snd_hda_apply_fixup(codec, HDA_FIXUP_ACT_PRE_PROBE);
  3660. err = stac_parse_auto_config(codec);
  3661. if (err < 0) {
  3662. stac_free(codec);
  3663. return err;
  3664. }
  3665. snd_hda_apply_fixup(codec, HDA_FIXUP_ACT_PROBE);
  3666. return 0;
  3667. }
  3668. static const char * const stac927x_spdif_labels[] = {
  3669. "Digital Playback", "ADAT", "Analog Mux 1",
  3670. "Analog Mux 2", "Analog Mux 3", NULL
  3671. };
  3672. static int patch_stac927x(struct hda_codec *codec)
  3673. {
  3674. struct sigmatel_spec *spec;
  3675. int err;
  3676. err = alloc_stac_spec(codec);
  3677. if (err < 0)
  3678. return err;
  3679. spec = codec->spec;
  3680. spec->linear_tone_beep = 1;
  3681. spec->gen.own_eapd_ctl = 1;
  3682. spec->have_spdif_mux = 1;
  3683. spec->spdif_labels = stac927x_spdif_labels;
  3684. spec->digbeep_nid = 0x23;
  3685. /* GPIO0 High = Enable EAPD */
  3686. spec->eapd_mask = spec->gpio_mask = 0x01;
  3687. spec->gpio_dir = spec->gpio_data = 0x01;
  3688. spec->aloopback_ctl = &stac927x_loopback;
  3689. spec->aloopback_mask = 0x40;
  3690. spec->aloopback_shift = 0;
  3691. spec->eapd_switch = 1;
  3692. codec->patch_ops = stac_patch_ops;
  3693. snd_hda_pick_fixup(codec, stac927x_models, stac927x_fixup_tbl,
  3694. stac927x_fixups);
  3695. snd_hda_apply_fixup(codec, HDA_FIXUP_ACT_PRE_PROBE);
  3696. if (!spec->volknob_init)
  3697. snd_hda_add_verbs(codec, stac927x_core_init);
  3698. err = stac_parse_auto_config(codec);
  3699. if (err < 0) {
  3700. stac_free(codec);
  3701. return err;
  3702. }
  3703. codec->proc_widget_hook = stac927x_proc_hook;
  3704. /*
  3705. * !!FIXME!!
  3706. * The STAC927x seem to require fairly long delays for certain
  3707. * command sequences. With too short delays (even if the answer
  3708. * is set to RIRB properly), it results in the silence output
  3709. * on some hardwares like Dell.
  3710. *
  3711. * The below flag enables the longer delay (see get_response
  3712. * in hda_intel.c).
  3713. */
  3714. codec->bus->needs_damn_long_delay = 1;
  3715. snd_hda_apply_fixup(codec, HDA_FIXUP_ACT_PROBE);
  3716. return 0;
  3717. }
  3718. static int patch_stac9205(struct hda_codec *codec)
  3719. {
  3720. struct sigmatel_spec *spec;
  3721. int err;
  3722. err = alloc_stac_spec(codec);
  3723. if (err < 0)
  3724. return err;
  3725. spec = codec->spec;
  3726. spec->linear_tone_beep = 1;
  3727. spec->gen.own_eapd_ctl = 1;
  3728. spec->have_spdif_mux = 1;
  3729. spec->digbeep_nid = 0x23;
  3730. snd_hda_add_verbs(codec, stac9205_core_init);
  3731. spec->aloopback_ctl = &stac9205_loopback;
  3732. spec->aloopback_mask = 0x40;
  3733. spec->aloopback_shift = 0;
  3734. /* GPIO0 High = EAPD */
  3735. spec->eapd_mask = spec->gpio_mask = spec->gpio_dir = 0x1;
  3736. spec->gpio_data = 0x01;
  3737. /* Turn on/off EAPD per HP plugging */
  3738. spec->eapd_switch = 1;
  3739. codec->patch_ops = stac_patch_ops;
  3740. snd_hda_pick_fixup(codec, stac9205_models, stac9205_fixup_tbl,
  3741. stac9205_fixups);
  3742. snd_hda_apply_fixup(codec, HDA_FIXUP_ACT_PRE_PROBE);
  3743. err = stac_parse_auto_config(codec);
  3744. if (err < 0) {
  3745. stac_free(codec);
  3746. return err;
  3747. }
  3748. codec->proc_widget_hook = stac9205_proc_hook;
  3749. snd_hda_apply_fixup(codec, HDA_FIXUP_ACT_PROBE);
  3750. return 0;
  3751. }
  3752. /*
  3753. * STAC9872 hack
  3754. */
  3755. static const struct hda_verb stac9872_core_init[] = {
  3756. {0x15, AC_VERB_SET_CONNECT_SEL, 0x1}, /* mic-sel: 0a,0d,14,02 */
  3757. {0x15, AC_VERB_SET_AMP_GAIN_MUTE, AMP_OUT_UNMUTE}, /* Mic-in -> 0x9 */
  3758. {}
  3759. };
  3760. static const struct hda_pintbl stac9872_vaio_pin_configs[] = {
  3761. { 0x0a, 0x03211020 },
  3762. { 0x0b, 0x411111f0 },
  3763. { 0x0c, 0x411111f0 },
  3764. { 0x0d, 0x03a15030 },
  3765. { 0x0e, 0x411111f0 },
  3766. { 0x0f, 0x90170110 },
  3767. { 0x11, 0x411111f0 },
  3768. { 0x13, 0x411111f0 },
  3769. { 0x14, 0x90a7013e },
  3770. {}
  3771. };
  3772. static const struct hda_model_fixup stac9872_models[] = {
  3773. { .id = STAC_9872_VAIO, .name = "vaio" },
  3774. {}
  3775. };
  3776. static const struct hda_fixup stac9872_fixups[] = {
  3777. [STAC_9872_VAIO] = {
  3778. .type = HDA_FIXUP_PINS,
  3779. .v.pins = stac9872_vaio_pin_configs,
  3780. },
  3781. };
  3782. static const struct snd_pci_quirk stac9872_fixup_tbl[] = {
  3783. SND_PCI_QUIRK_MASK(0x104d, 0xfff0, 0x81e0,
  3784. "Sony VAIO F/S", STAC_9872_VAIO),
  3785. {} /* terminator */
  3786. };
  3787. static int patch_stac9872(struct hda_codec *codec)
  3788. {
  3789. struct sigmatel_spec *spec;
  3790. int err;
  3791. err = alloc_stac_spec(codec);
  3792. if (err < 0)
  3793. return err;
  3794. spec = codec->spec;
  3795. spec->linear_tone_beep = 1;
  3796. spec->gen.own_eapd_ctl = 1;
  3797. codec->patch_ops = stac_patch_ops;
  3798. snd_hda_add_verbs(codec, stac9872_core_init);
  3799. snd_hda_pick_fixup(codec, stac9872_models, stac9872_fixup_tbl,
  3800. stac9872_fixups);
  3801. snd_hda_apply_fixup(codec, HDA_FIXUP_ACT_PRE_PROBE);
  3802. err = stac_parse_auto_config(codec);
  3803. if (err < 0) {
  3804. stac_free(codec);
  3805. return -EINVAL;
  3806. }
  3807. snd_hda_apply_fixup(codec, HDA_FIXUP_ACT_PROBE);
  3808. return 0;
  3809. }
  3810. /*
  3811. * patch entries
  3812. */
  3813. static const struct hda_codec_preset snd_hda_preset_sigmatel[] = {
  3814. { .id = 0x83847690, .name = "STAC9200", .patch = patch_stac9200 },
  3815. { .id = 0x83847882, .name = "STAC9220 A1", .patch = patch_stac922x },
  3816. { .id = 0x83847680, .name = "STAC9221 A1", .patch = patch_stac922x },
  3817. { .id = 0x83847880, .name = "STAC9220 A2", .patch = patch_stac922x },
  3818. { .id = 0x83847681, .name = "STAC9220D/9223D A2", .patch = patch_stac922x },
  3819. { .id = 0x83847682, .name = "STAC9221 A2", .patch = patch_stac922x },
  3820. { .id = 0x83847683, .name = "STAC9221D A2", .patch = patch_stac922x },
  3821. { .id = 0x83847618, .name = "STAC9227", .patch = patch_stac927x },
  3822. { .id = 0x83847619, .name = "STAC9227", .patch = patch_stac927x },
  3823. { .id = 0x83847616, .name = "STAC9228", .patch = patch_stac927x },
  3824. { .id = 0x83847617, .name = "STAC9228", .patch = patch_stac927x },
  3825. { .id = 0x83847614, .name = "STAC9229", .patch = patch_stac927x },
  3826. { .id = 0x83847615, .name = "STAC9229", .patch = patch_stac927x },
  3827. { .id = 0x83847620, .name = "STAC9274", .patch = patch_stac927x },
  3828. { .id = 0x83847621, .name = "STAC9274D", .patch = patch_stac927x },
  3829. { .id = 0x83847622, .name = "STAC9273X", .patch = patch_stac927x },
  3830. { .id = 0x83847623, .name = "STAC9273D", .patch = patch_stac927x },
  3831. { .id = 0x83847624, .name = "STAC9272X", .patch = patch_stac927x },
  3832. { .id = 0x83847625, .name = "STAC9272D", .patch = patch_stac927x },
  3833. { .id = 0x83847626, .name = "STAC9271X", .patch = patch_stac927x },
  3834. { .id = 0x83847627, .name = "STAC9271D", .patch = patch_stac927x },
  3835. { .id = 0x83847628, .name = "STAC9274X5NH", .patch = patch_stac927x },
  3836. { .id = 0x83847629, .name = "STAC9274D5NH", .patch = patch_stac927x },
  3837. { .id = 0x83847632, .name = "STAC9202", .patch = patch_stac925x },
  3838. { .id = 0x83847633, .name = "STAC9202D", .patch = patch_stac925x },
  3839. { .id = 0x83847634, .name = "STAC9250", .patch = patch_stac925x },
  3840. { .id = 0x83847635, .name = "STAC9250D", .patch = patch_stac925x },
  3841. { .id = 0x83847636, .name = "STAC9251", .patch = patch_stac925x },
  3842. { .id = 0x83847637, .name = "STAC9250D", .patch = patch_stac925x },
  3843. { .id = 0x83847645, .name = "92HD206X", .patch = patch_stac927x },
  3844. { .id = 0x83847646, .name = "92HD206D", .patch = patch_stac927x },
  3845. /* The following does not take into account .id=0x83847661 when subsys =
  3846. * 104D0C00 which is STAC9225s. Because of this, some SZ Notebooks are
  3847. * currently not fully supported.
  3848. */
  3849. { .id = 0x83847661, .name = "CXD9872RD/K", .patch = patch_stac9872 },
  3850. { .id = 0x83847662, .name = "STAC9872AK", .patch = patch_stac9872 },
  3851. { .id = 0x83847664, .name = "CXD9872AKD", .patch = patch_stac9872 },
  3852. { .id = 0x83847698, .name = "STAC9205", .patch = patch_stac9205 },
  3853. { .id = 0x838476a0, .name = "STAC9205", .patch = patch_stac9205 },
  3854. { .id = 0x838476a1, .name = "STAC9205D", .patch = patch_stac9205 },
  3855. { .id = 0x838476a2, .name = "STAC9204", .patch = patch_stac9205 },
  3856. { .id = 0x838476a3, .name = "STAC9204D", .patch = patch_stac9205 },
  3857. { .id = 0x838476a4, .name = "STAC9255", .patch = patch_stac9205 },
  3858. { .id = 0x838476a5, .name = "STAC9255D", .patch = patch_stac9205 },
  3859. { .id = 0x838476a6, .name = "STAC9254", .patch = patch_stac9205 },
  3860. { .id = 0x838476a7, .name = "STAC9254D", .patch = patch_stac9205 },
  3861. { .id = 0x111d7603, .name = "92HD75B3X5", .patch = patch_stac92hd71bxx},
  3862. { .id = 0x111d7604, .name = "92HD83C1X5", .patch = patch_stac92hd83xxx},
  3863. { .id = 0x111d76d4, .name = "92HD83C1C5", .patch = patch_stac92hd83xxx},
  3864. { .id = 0x111d7605, .name = "92HD81B1X5", .patch = patch_stac92hd83xxx},
  3865. { .id = 0x111d76d5, .name = "92HD81B1C5", .patch = patch_stac92hd83xxx},
  3866. { .id = 0x111d76d1, .name = "92HD87B1/3", .patch = patch_stac92hd83xxx},
  3867. { .id = 0x111d76d9, .name = "92HD87B2/4", .patch = patch_stac92hd83xxx},
  3868. { .id = 0x111d7666, .name = "92HD88B3", .patch = patch_stac92hd83xxx},
  3869. { .id = 0x111d7667, .name = "92HD88B1", .patch = patch_stac92hd83xxx},
  3870. { .id = 0x111d7668, .name = "92HD88B2", .patch = patch_stac92hd83xxx},
  3871. { .id = 0x111d7669, .name = "92HD88B4", .patch = patch_stac92hd83xxx},
  3872. { .id = 0x111d7608, .name = "92HD75B2X5", .patch = patch_stac92hd71bxx},
  3873. { .id = 0x111d7674, .name = "92HD73D1X5", .patch = patch_stac92hd73xx },
  3874. { .id = 0x111d7675, .name = "92HD73C1X5", .patch = patch_stac92hd73xx },
  3875. { .id = 0x111d7676, .name = "92HD73E1X5", .patch = patch_stac92hd73xx },
  3876. { .id = 0x111d7695, .name = "92HD95", .patch = patch_stac92hd95 },
  3877. { .id = 0x111d76b0, .name = "92HD71B8X", .patch = patch_stac92hd71bxx },
  3878. { .id = 0x111d76b1, .name = "92HD71B8X", .patch = patch_stac92hd71bxx },
  3879. { .id = 0x111d76b2, .name = "92HD71B7X", .patch = patch_stac92hd71bxx },
  3880. { .id = 0x111d76b3, .name = "92HD71B7X", .patch = patch_stac92hd71bxx },
  3881. { .id = 0x111d76b4, .name = "92HD71B6X", .patch = patch_stac92hd71bxx },
  3882. { .id = 0x111d76b5, .name = "92HD71B6X", .patch = patch_stac92hd71bxx },
  3883. { .id = 0x111d76b6, .name = "92HD71B5X", .patch = patch_stac92hd71bxx },
  3884. { .id = 0x111d76b7, .name = "92HD71B5X", .patch = patch_stac92hd71bxx },
  3885. { .id = 0x111d76c0, .name = "92HD89C3", .patch = patch_stac92hd73xx },
  3886. { .id = 0x111d76c1, .name = "92HD89C2", .patch = patch_stac92hd73xx },
  3887. { .id = 0x111d76c2, .name = "92HD89C1", .patch = patch_stac92hd73xx },
  3888. { .id = 0x111d76c3, .name = "92HD89B3", .patch = patch_stac92hd73xx },
  3889. { .id = 0x111d76c4, .name = "92HD89B2", .patch = patch_stac92hd73xx },
  3890. { .id = 0x111d76c5, .name = "92HD89B1", .patch = patch_stac92hd73xx },
  3891. { .id = 0x111d76c6, .name = "92HD89E3", .patch = patch_stac92hd73xx },
  3892. { .id = 0x111d76c7, .name = "92HD89E2", .patch = patch_stac92hd73xx },
  3893. { .id = 0x111d76c8, .name = "92HD89E1", .patch = patch_stac92hd73xx },
  3894. { .id = 0x111d76c9, .name = "92HD89D3", .patch = patch_stac92hd73xx },
  3895. { .id = 0x111d76ca, .name = "92HD89D2", .patch = patch_stac92hd73xx },
  3896. { .id = 0x111d76cb, .name = "92HD89D1", .patch = patch_stac92hd73xx },
  3897. { .id = 0x111d76cc, .name = "92HD89F3", .patch = patch_stac92hd73xx },
  3898. { .id = 0x111d76cd, .name = "92HD89F2", .patch = patch_stac92hd73xx },
  3899. { .id = 0x111d76ce, .name = "92HD89F1", .patch = patch_stac92hd73xx },
  3900. { .id = 0x111d76df, .name = "92HD93BXX", .patch = patch_stac92hd83xxx},
  3901. { .id = 0x111d76e0, .name = "92HD91BXX", .patch = patch_stac92hd83xxx},
  3902. { .id = 0x111d76e3, .name = "92HD98BXX", .patch = patch_stac92hd83xxx},
  3903. { .id = 0x111d76e5, .name = "92HD99BXX", .patch = patch_stac92hd83xxx},
  3904. { .id = 0x111d76e7, .name = "92HD90BXX", .patch = patch_stac92hd83xxx},
  3905. { .id = 0x111d76e8, .name = "92HD66B1X5", .patch = patch_stac92hd83xxx},
  3906. { .id = 0x111d76e9, .name = "92HD66B2X5", .patch = patch_stac92hd83xxx},
  3907. { .id = 0x111d76ea, .name = "92HD66B3X5", .patch = patch_stac92hd83xxx},
  3908. { .id = 0x111d76eb, .name = "92HD66C1X5", .patch = patch_stac92hd83xxx},
  3909. { .id = 0x111d76ec, .name = "92HD66C2X5", .patch = patch_stac92hd83xxx},
  3910. { .id = 0x111d76ed, .name = "92HD66C3X5", .patch = patch_stac92hd83xxx},
  3911. { .id = 0x111d76ee, .name = "92HD66B1X3", .patch = patch_stac92hd83xxx},
  3912. { .id = 0x111d76ef, .name = "92HD66B2X3", .patch = patch_stac92hd83xxx},
  3913. { .id = 0x111d76f0, .name = "92HD66B3X3", .patch = patch_stac92hd83xxx},
  3914. { .id = 0x111d76f1, .name = "92HD66C1X3", .patch = patch_stac92hd83xxx},
  3915. { .id = 0x111d76f2, .name = "92HD66C2X3", .patch = patch_stac92hd83xxx},
  3916. { .id = 0x111d76f3, .name = "92HD66C3/65", .patch = patch_stac92hd83xxx},
  3917. {} /* terminator */
  3918. };
  3919. MODULE_ALIAS("snd-hda-codec-id:8384*");
  3920. MODULE_ALIAS("snd-hda-codec-id:111d*");
  3921. MODULE_LICENSE("GPL");
  3922. MODULE_DESCRIPTION("IDT/Sigmatel HD-audio codec");
  3923. static struct hda_codec_preset_list sigmatel_list = {
  3924. .preset = snd_hda_preset_sigmatel,
  3925. .owner = THIS_MODULE,
  3926. };
  3927. static int __init patch_sigmatel_init(void)
  3928. {
  3929. return snd_hda_add_codec_preset(&sigmatel_list);
  3930. }
  3931. static void __exit patch_sigmatel_exit(void)
  3932. {
  3933. snd_hda_delete_codec_preset(&sigmatel_list);
  3934. }
  3935. module_init(patch_sigmatel_init)
  3936. module_exit(patch_sigmatel_exit)