sp805_wdt.c 7.6 KB

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  1. /*
  2. * drivers/char/watchdog/sp805-wdt.c
  3. *
  4. * Watchdog driver for ARM SP805 watchdog module
  5. *
  6. * Copyright (C) 2010 ST Microelectronics
  7. * Viresh Kumar <viresh.linux@gmail.com>
  8. *
  9. * This file is licensed under the terms of the GNU General Public
  10. * License version 2 or later. This program is licensed "as is" without any
  11. * warranty of any kind, whether express or implied.
  12. */
  13. #include <linux/device.h>
  14. #include <linux/resource.h>
  15. #include <linux/amba/bus.h>
  16. #include <linux/bitops.h>
  17. #include <linux/clk.h>
  18. #include <linux/init.h>
  19. #include <linux/io.h>
  20. #include <linux/ioport.h>
  21. #include <linux/kernel.h>
  22. #include <linux/math64.h>
  23. #include <linux/module.h>
  24. #include <linux/moduleparam.h>
  25. #include <linux/pm.h>
  26. #include <linux/slab.h>
  27. #include <linux/spinlock.h>
  28. #include <linux/types.h>
  29. #include <linux/watchdog.h>
  30. /* default timeout in seconds */
  31. #define DEFAULT_TIMEOUT 60
  32. #define MODULE_NAME "sp805-wdt"
  33. /* watchdog register offsets and masks */
  34. #define WDTLOAD 0x000
  35. #define LOAD_MIN 0x00000001
  36. #define LOAD_MAX 0xFFFFFFFF
  37. #define WDTVALUE 0x004
  38. #define WDTCONTROL 0x008
  39. /* control register masks */
  40. #define INT_ENABLE (1 << 0)
  41. #define RESET_ENABLE (1 << 1)
  42. #define WDTINTCLR 0x00C
  43. #define WDTRIS 0x010
  44. #define WDTMIS 0x014
  45. #define INT_MASK (1 << 0)
  46. #define WDTLOCK 0xC00
  47. #define UNLOCK 0x1ACCE551
  48. #define LOCK 0x00000001
  49. /**
  50. * struct sp805_wdt: sp805 wdt device structure
  51. * @wdd: instance of struct watchdog_device
  52. * @lock: spin lock protecting dev structure and io access
  53. * @base: base address of wdt
  54. * @clk: clock structure of wdt
  55. * @adev: amba device structure of wdt
  56. * @status: current status of wdt
  57. * @load_val: load value to be set for current timeout
  58. * @timeout: current programmed timeout
  59. */
  60. struct sp805_wdt {
  61. struct watchdog_device wdd;
  62. spinlock_t lock;
  63. void __iomem *base;
  64. struct clk *clk;
  65. struct amba_device *adev;
  66. unsigned int load_val;
  67. unsigned int timeout;
  68. };
  69. static bool nowayout = WATCHDOG_NOWAYOUT;
  70. module_param(nowayout, bool, 0);
  71. MODULE_PARM_DESC(nowayout,
  72. "Set to 1 to keep watchdog running after device release");
  73. /* This routine finds load value that will reset system in required timout */
  74. static int wdt_setload(struct watchdog_device *wdd, unsigned int timeout)
  75. {
  76. struct sp805_wdt *wdt = watchdog_get_drvdata(wdd);
  77. u64 load, rate;
  78. rate = clk_get_rate(wdt->clk);
  79. /*
  80. * sp805 runs counter with given value twice, after the end of first
  81. * counter it gives an interrupt and then starts counter again. If
  82. * interrupt already occurred then it resets the system. This is why
  83. * load is half of what should be required.
  84. */
  85. load = div_u64(rate, 2) * timeout - 1;
  86. load = (load > LOAD_MAX) ? LOAD_MAX : load;
  87. load = (load < LOAD_MIN) ? LOAD_MIN : load;
  88. spin_lock(&wdt->lock);
  89. wdt->load_val = load;
  90. /* roundup timeout to closest positive integer value */
  91. wdt->timeout = div_u64((load + 1) * 2 + (rate / 2), rate);
  92. spin_unlock(&wdt->lock);
  93. return 0;
  94. }
  95. /* returns number of seconds left for reset to occur */
  96. static unsigned int wdt_timeleft(struct watchdog_device *wdd)
  97. {
  98. struct sp805_wdt *wdt = watchdog_get_drvdata(wdd);
  99. u64 load, rate;
  100. rate = clk_get_rate(wdt->clk);
  101. spin_lock(&wdt->lock);
  102. load = readl_relaxed(wdt->base + WDTVALUE);
  103. /*If the interrupt is inactive then time left is WDTValue + WDTLoad. */
  104. if (!(readl_relaxed(wdt->base + WDTRIS) & INT_MASK))
  105. load += wdt->load_val + 1;
  106. spin_unlock(&wdt->lock);
  107. return div_u64(load, rate);
  108. }
  109. static int wdt_config(struct watchdog_device *wdd, bool ping)
  110. {
  111. struct sp805_wdt *wdt = watchdog_get_drvdata(wdd);
  112. int ret;
  113. if (!ping) {
  114. ret = clk_prepare_enable(wdt->clk);
  115. if (ret) {
  116. dev_err(&wdt->adev->dev, "clock enable fail");
  117. return ret;
  118. }
  119. }
  120. spin_lock(&wdt->lock);
  121. writel_relaxed(UNLOCK, wdt->base + WDTLOCK);
  122. writel_relaxed(wdt->load_val, wdt->base + WDTLOAD);
  123. if (!ping) {
  124. writel_relaxed(INT_MASK, wdt->base + WDTINTCLR);
  125. writel_relaxed(INT_ENABLE | RESET_ENABLE, wdt->base +
  126. WDTCONTROL);
  127. }
  128. writel_relaxed(LOCK, wdt->base + WDTLOCK);
  129. /* Flush posted writes. */
  130. readl_relaxed(wdt->base + WDTLOCK);
  131. spin_unlock(&wdt->lock);
  132. return 0;
  133. }
  134. static int wdt_ping(struct watchdog_device *wdd)
  135. {
  136. return wdt_config(wdd, true);
  137. }
  138. /* enables watchdog timers reset */
  139. static int wdt_enable(struct watchdog_device *wdd)
  140. {
  141. return wdt_config(wdd, false);
  142. }
  143. /* disables watchdog timers reset */
  144. static int wdt_disable(struct watchdog_device *wdd)
  145. {
  146. struct sp805_wdt *wdt = watchdog_get_drvdata(wdd);
  147. spin_lock(&wdt->lock);
  148. writel_relaxed(UNLOCK, wdt->base + WDTLOCK);
  149. writel_relaxed(0, wdt->base + WDTCONTROL);
  150. writel_relaxed(LOCK, wdt->base + WDTLOCK);
  151. /* Flush posted writes. */
  152. readl_relaxed(wdt->base + WDTLOCK);
  153. spin_unlock(&wdt->lock);
  154. clk_disable_unprepare(wdt->clk);
  155. return 0;
  156. }
  157. static const struct watchdog_info wdt_info = {
  158. .options = WDIOF_MAGICCLOSE | WDIOF_SETTIMEOUT | WDIOF_KEEPALIVEPING,
  159. .identity = MODULE_NAME,
  160. };
  161. static const struct watchdog_ops wdt_ops = {
  162. .owner = THIS_MODULE,
  163. .start = wdt_enable,
  164. .stop = wdt_disable,
  165. .ping = wdt_ping,
  166. .set_timeout = wdt_setload,
  167. .get_timeleft = wdt_timeleft,
  168. };
  169. static int
  170. sp805_wdt_probe(struct amba_device *adev, const struct amba_id *id)
  171. {
  172. struct sp805_wdt *wdt;
  173. int ret = 0;
  174. if (!devm_request_mem_region(&adev->dev, adev->res.start,
  175. resource_size(&adev->res), "sp805_wdt")) {
  176. dev_warn(&adev->dev, "Failed to get memory region resource\n");
  177. ret = -ENOENT;
  178. goto err;
  179. }
  180. wdt = devm_kzalloc(&adev->dev, sizeof(*wdt), GFP_KERNEL);
  181. if (!wdt) {
  182. dev_warn(&adev->dev, "Kzalloc failed\n");
  183. ret = -ENOMEM;
  184. goto err;
  185. }
  186. wdt->base = devm_ioremap(&adev->dev, adev->res.start,
  187. resource_size(&adev->res));
  188. if (!wdt->base) {
  189. ret = -ENOMEM;
  190. dev_warn(&adev->dev, "ioremap fail\n");
  191. goto err;
  192. }
  193. wdt->clk = clk_get(&adev->dev, NULL);
  194. if (IS_ERR(wdt->clk)) {
  195. dev_warn(&adev->dev, "Clock not found\n");
  196. ret = PTR_ERR(wdt->clk);
  197. goto err;
  198. }
  199. wdt->adev = adev;
  200. wdt->wdd.info = &wdt_info;
  201. wdt->wdd.ops = &wdt_ops;
  202. spin_lock_init(&wdt->lock);
  203. watchdog_set_nowayout(&wdt->wdd, nowayout);
  204. watchdog_set_drvdata(&wdt->wdd, wdt);
  205. wdt_setload(&wdt->wdd, DEFAULT_TIMEOUT);
  206. ret = watchdog_register_device(&wdt->wdd);
  207. if (ret) {
  208. dev_err(&adev->dev, "watchdog_register_device() failed: %d\n",
  209. ret);
  210. goto err_register;
  211. }
  212. amba_set_drvdata(adev, wdt);
  213. dev_info(&adev->dev, "registration successful\n");
  214. return 0;
  215. err_register:
  216. clk_put(wdt->clk);
  217. err:
  218. dev_err(&adev->dev, "Probe Failed!!!\n");
  219. return ret;
  220. }
  221. static int sp805_wdt_remove(struct amba_device *adev)
  222. {
  223. struct sp805_wdt *wdt = amba_get_drvdata(adev);
  224. watchdog_unregister_device(&wdt->wdd);
  225. amba_set_drvdata(adev, NULL);
  226. watchdog_set_drvdata(&wdt->wdd, NULL);
  227. clk_put(wdt->clk);
  228. return 0;
  229. }
  230. static int __maybe_unused sp805_wdt_suspend(struct device *dev)
  231. {
  232. struct sp805_wdt *wdt = dev_get_drvdata(dev);
  233. if (watchdog_active(&wdt->wdd))
  234. return wdt_disable(&wdt->wdd);
  235. return 0;
  236. }
  237. static int __maybe_unused sp805_wdt_resume(struct device *dev)
  238. {
  239. struct sp805_wdt *wdt = dev_get_drvdata(dev);
  240. if (watchdog_active(&wdt->wdd))
  241. return wdt_enable(&wdt->wdd);
  242. return 0;
  243. }
  244. static SIMPLE_DEV_PM_OPS(sp805_wdt_dev_pm_ops, sp805_wdt_suspend,
  245. sp805_wdt_resume);
  246. static struct amba_id sp805_wdt_ids[] = {
  247. {
  248. .id = 0x00141805,
  249. .mask = 0x00ffffff,
  250. },
  251. { 0, 0 },
  252. };
  253. MODULE_DEVICE_TABLE(amba, sp805_wdt_ids);
  254. static struct amba_driver sp805_wdt_driver = {
  255. .drv = {
  256. .name = MODULE_NAME,
  257. .pm = &sp805_wdt_dev_pm_ops,
  258. },
  259. .id_table = sp805_wdt_ids,
  260. .probe = sp805_wdt_probe,
  261. .remove = sp805_wdt_remove,
  262. };
  263. module_amba_driver(sp805_wdt_driver);
  264. MODULE_AUTHOR("Viresh Kumar <viresh.linux@gmail.com>");
  265. MODULE_DESCRIPTION("ARM SP805 Watchdog Driver");
  266. MODULE_LICENSE("GPL");