dss_features.c 29 KB

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  1. /*
  2. * linux/drivers/video/omap2/dss/dss_features.c
  3. *
  4. * Copyright (C) 2010 Texas Instruments
  5. * Author: Archit Taneja <archit@ti.com>
  6. *
  7. * This program is free software; you can redistribute it and/or modify it
  8. * under the terms of the GNU General Public License version 2 as published by
  9. * the Free Software Foundation.
  10. *
  11. * This program is distributed in the hope that it will be useful, but WITHOUT
  12. * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
  13. * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for
  14. * more details.
  15. *
  16. * You should have received a copy of the GNU General Public License along with
  17. * this program. If not, see <http://www.gnu.org/licenses/>.
  18. */
  19. #include <linux/kernel.h>
  20. #include <linux/module.h>
  21. #include <linux/types.h>
  22. #include <linux/err.h>
  23. #include <linux/slab.h>
  24. #include <video/omapdss.h>
  25. #include "dss.h"
  26. #include "dss_features.h"
  27. /* Defines a generic omap register field */
  28. struct dss_reg_field {
  29. u8 start, end;
  30. };
  31. struct dss_param_range {
  32. int min, max;
  33. };
  34. struct omap_dss_features {
  35. const struct dss_reg_field *reg_fields;
  36. const int num_reg_fields;
  37. const enum dss_feat_id *features;
  38. const int num_features;
  39. const int num_mgrs;
  40. const int num_ovls;
  41. const int num_wbs;
  42. const enum omap_display_type *supported_displays;
  43. const enum omap_dss_output_id *supported_outputs;
  44. const enum omap_color_mode *supported_color_modes;
  45. const enum omap_overlay_caps *overlay_caps;
  46. const char * const *clksrc_names;
  47. const struct dss_param_range *dss_params;
  48. const enum omap_dss_rotation_type supported_rotation_types;
  49. const u32 buffer_size_unit;
  50. const u32 burst_size_unit;
  51. };
  52. /* This struct is assigned to one of the below during initialization */
  53. static const struct omap_dss_features *omap_current_dss_features;
  54. static const struct dss_reg_field omap2_dss_reg_fields[] = {
  55. [FEAT_REG_FIRHINC] = { 11, 0 },
  56. [FEAT_REG_FIRVINC] = { 27, 16 },
  57. [FEAT_REG_FIFOLOWTHRESHOLD] = { 8, 0 },
  58. [FEAT_REG_FIFOHIGHTHRESHOLD] = { 24, 16 },
  59. [FEAT_REG_FIFOSIZE] = { 8, 0 },
  60. [FEAT_REG_HORIZONTALACCU] = { 9, 0 },
  61. [FEAT_REG_VERTICALACCU] = { 25, 16 },
  62. [FEAT_REG_DISPC_CLK_SWITCH] = { 0, 0 },
  63. [FEAT_REG_DSIPLL_REGN] = { 0, 0 },
  64. [FEAT_REG_DSIPLL_REGM] = { 0, 0 },
  65. [FEAT_REG_DSIPLL_REGM_DISPC] = { 0, 0 },
  66. [FEAT_REG_DSIPLL_REGM_DSI] = { 0, 0 },
  67. };
  68. static const struct dss_reg_field omap3_dss_reg_fields[] = {
  69. [FEAT_REG_FIRHINC] = { 12, 0 },
  70. [FEAT_REG_FIRVINC] = { 28, 16 },
  71. [FEAT_REG_FIFOLOWTHRESHOLD] = { 11, 0 },
  72. [FEAT_REG_FIFOHIGHTHRESHOLD] = { 27, 16 },
  73. [FEAT_REG_FIFOSIZE] = { 10, 0 },
  74. [FEAT_REG_HORIZONTALACCU] = { 9, 0 },
  75. [FEAT_REG_VERTICALACCU] = { 25, 16 },
  76. [FEAT_REG_DISPC_CLK_SWITCH] = { 0, 0 },
  77. [FEAT_REG_DSIPLL_REGN] = { 7, 1 },
  78. [FEAT_REG_DSIPLL_REGM] = { 18, 8 },
  79. [FEAT_REG_DSIPLL_REGM_DISPC] = { 22, 19 },
  80. [FEAT_REG_DSIPLL_REGM_DSI] = { 26, 23 },
  81. };
  82. static const struct dss_reg_field omap4_dss_reg_fields[] = {
  83. [FEAT_REG_FIRHINC] = { 12, 0 },
  84. [FEAT_REG_FIRVINC] = { 28, 16 },
  85. [FEAT_REG_FIFOLOWTHRESHOLD] = { 15, 0 },
  86. [FEAT_REG_FIFOHIGHTHRESHOLD] = { 31, 16 },
  87. [FEAT_REG_FIFOSIZE] = { 15, 0 },
  88. [FEAT_REG_HORIZONTALACCU] = { 10, 0 },
  89. [FEAT_REG_VERTICALACCU] = { 26, 16 },
  90. [FEAT_REG_DISPC_CLK_SWITCH] = { 9, 8 },
  91. [FEAT_REG_DSIPLL_REGN] = { 8, 1 },
  92. [FEAT_REG_DSIPLL_REGM] = { 20, 9 },
  93. [FEAT_REG_DSIPLL_REGM_DISPC] = { 25, 21 },
  94. [FEAT_REG_DSIPLL_REGM_DSI] = { 30, 26 },
  95. };
  96. static const struct dss_reg_field omap5_dss_reg_fields[] = {
  97. [FEAT_REG_FIRHINC] = { 12, 0 },
  98. [FEAT_REG_FIRVINC] = { 28, 16 },
  99. [FEAT_REG_FIFOLOWTHRESHOLD] = { 15, 0 },
  100. [FEAT_REG_FIFOHIGHTHRESHOLD] = { 31, 16 },
  101. [FEAT_REG_FIFOSIZE] = { 15, 0 },
  102. [FEAT_REG_HORIZONTALACCU] = { 10, 0 },
  103. [FEAT_REG_VERTICALACCU] = { 26, 16 },
  104. [FEAT_REG_DISPC_CLK_SWITCH] = { 9, 7 },
  105. [FEAT_REG_DSIPLL_REGN] = { 8, 1 },
  106. [FEAT_REG_DSIPLL_REGM] = { 20, 9 },
  107. [FEAT_REG_DSIPLL_REGM_DISPC] = { 25, 21 },
  108. [FEAT_REG_DSIPLL_REGM_DSI] = { 30, 26 },
  109. };
  110. static const enum omap_display_type omap2_dss_supported_displays[] = {
  111. /* OMAP_DSS_CHANNEL_LCD */
  112. OMAP_DISPLAY_TYPE_DPI | OMAP_DISPLAY_TYPE_DBI,
  113. /* OMAP_DSS_CHANNEL_DIGIT */
  114. OMAP_DISPLAY_TYPE_VENC,
  115. };
  116. static const enum omap_display_type omap3430_dss_supported_displays[] = {
  117. /* OMAP_DSS_CHANNEL_LCD */
  118. OMAP_DISPLAY_TYPE_DPI | OMAP_DISPLAY_TYPE_DBI |
  119. OMAP_DISPLAY_TYPE_SDI | OMAP_DISPLAY_TYPE_DSI,
  120. /* OMAP_DSS_CHANNEL_DIGIT */
  121. OMAP_DISPLAY_TYPE_VENC,
  122. };
  123. static const enum omap_display_type omap3630_dss_supported_displays[] = {
  124. /* OMAP_DSS_CHANNEL_LCD */
  125. OMAP_DISPLAY_TYPE_DPI | OMAP_DISPLAY_TYPE_DBI |
  126. OMAP_DISPLAY_TYPE_DSI,
  127. /* OMAP_DSS_CHANNEL_DIGIT */
  128. OMAP_DISPLAY_TYPE_VENC,
  129. };
  130. static const enum omap_display_type omap4_dss_supported_displays[] = {
  131. /* OMAP_DSS_CHANNEL_LCD */
  132. OMAP_DISPLAY_TYPE_DBI | OMAP_DISPLAY_TYPE_DSI,
  133. /* OMAP_DSS_CHANNEL_DIGIT */
  134. OMAP_DISPLAY_TYPE_VENC | OMAP_DISPLAY_TYPE_HDMI,
  135. /* OMAP_DSS_CHANNEL_LCD2 */
  136. OMAP_DISPLAY_TYPE_DPI | OMAP_DISPLAY_TYPE_DBI |
  137. OMAP_DISPLAY_TYPE_DSI,
  138. };
  139. static const enum omap_display_type omap5_dss_supported_displays[] = {
  140. /* OMAP_DSS_CHANNEL_LCD */
  141. OMAP_DISPLAY_TYPE_DPI | OMAP_DISPLAY_TYPE_DBI |
  142. OMAP_DISPLAY_TYPE_DSI,
  143. /* OMAP_DSS_CHANNEL_DIGIT */
  144. OMAP_DISPLAY_TYPE_HDMI | OMAP_DISPLAY_TYPE_DPI,
  145. /* OMAP_DSS_CHANNEL_LCD2 */
  146. OMAP_DISPLAY_TYPE_DPI | OMAP_DISPLAY_TYPE_DBI |
  147. OMAP_DISPLAY_TYPE_DSI,
  148. };
  149. static const enum omap_dss_output_id omap2_dss_supported_outputs[] = {
  150. /* OMAP_DSS_CHANNEL_LCD */
  151. OMAP_DSS_OUTPUT_DPI | OMAP_DSS_OUTPUT_DBI,
  152. /* OMAP_DSS_CHANNEL_DIGIT */
  153. OMAP_DSS_OUTPUT_VENC,
  154. };
  155. static const enum omap_dss_output_id omap3430_dss_supported_outputs[] = {
  156. /* OMAP_DSS_CHANNEL_LCD */
  157. OMAP_DSS_OUTPUT_DPI | OMAP_DSS_OUTPUT_DBI |
  158. OMAP_DSS_OUTPUT_SDI | OMAP_DSS_OUTPUT_DSI1,
  159. /* OMAP_DSS_CHANNEL_DIGIT */
  160. OMAP_DSS_OUTPUT_VENC,
  161. };
  162. static const enum omap_dss_output_id omap3630_dss_supported_outputs[] = {
  163. /* OMAP_DSS_CHANNEL_LCD */
  164. OMAP_DSS_OUTPUT_DPI | OMAP_DSS_OUTPUT_DBI |
  165. OMAP_DSS_OUTPUT_DSI1,
  166. /* OMAP_DSS_CHANNEL_DIGIT */
  167. OMAP_DSS_OUTPUT_VENC,
  168. };
  169. static const enum omap_dss_output_id omap4_dss_supported_outputs[] = {
  170. /* OMAP_DSS_CHANNEL_LCD */
  171. OMAP_DSS_OUTPUT_DPI | OMAP_DSS_OUTPUT_DBI |
  172. OMAP_DSS_OUTPUT_DSI1,
  173. /* OMAP_DSS_CHANNEL_DIGIT */
  174. OMAP_DSS_OUTPUT_VENC | OMAP_DSS_OUTPUT_HDMI |
  175. OMAP_DSS_OUTPUT_DPI,
  176. /* OMAP_DSS_CHANNEL_LCD2 */
  177. OMAP_DSS_OUTPUT_DPI | OMAP_DSS_OUTPUT_DBI |
  178. OMAP_DSS_OUTPUT_DSI2,
  179. };
  180. static const enum omap_dss_output_id omap5_dss_supported_outputs[] = {
  181. /* OMAP_DSS_CHANNEL_LCD */
  182. OMAP_DSS_OUTPUT_DPI | OMAP_DSS_OUTPUT_DBI |
  183. OMAP_DSS_OUTPUT_DSI1 | OMAP_DSS_OUTPUT_DSI2,
  184. /* OMAP_DSS_CHANNEL_DIGIT */
  185. OMAP_DSS_OUTPUT_HDMI | OMAP_DSS_OUTPUT_DPI,
  186. /* OMAP_DSS_CHANNEL_LCD2 */
  187. OMAP_DSS_OUTPUT_DPI | OMAP_DSS_OUTPUT_DBI |
  188. OMAP_DSS_OUTPUT_DSI1,
  189. /* OMAP_DSS_CHANNEL_LCD3 */
  190. OMAP_DSS_OUTPUT_DPI | OMAP_DSS_OUTPUT_DBI |
  191. OMAP_DSS_OUTPUT_DSI2,
  192. };
  193. static const enum omap_color_mode omap2_dss_supported_color_modes[] = {
  194. /* OMAP_DSS_GFX */
  195. OMAP_DSS_COLOR_CLUT1 | OMAP_DSS_COLOR_CLUT2 |
  196. OMAP_DSS_COLOR_CLUT4 | OMAP_DSS_COLOR_CLUT8 |
  197. OMAP_DSS_COLOR_RGB12U | OMAP_DSS_COLOR_RGB16 |
  198. OMAP_DSS_COLOR_RGB24U | OMAP_DSS_COLOR_RGB24P,
  199. /* OMAP_DSS_VIDEO1 */
  200. OMAP_DSS_COLOR_RGB16 | OMAP_DSS_COLOR_RGB24U |
  201. OMAP_DSS_COLOR_RGB24P | OMAP_DSS_COLOR_YUV2 |
  202. OMAP_DSS_COLOR_UYVY,
  203. /* OMAP_DSS_VIDEO2 */
  204. OMAP_DSS_COLOR_RGB16 | OMAP_DSS_COLOR_RGB24U |
  205. OMAP_DSS_COLOR_RGB24P | OMAP_DSS_COLOR_YUV2 |
  206. OMAP_DSS_COLOR_UYVY,
  207. };
  208. static const enum omap_color_mode omap3_dss_supported_color_modes[] = {
  209. /* OMAP_DSS_GFX */
  210. OMAP_DSS_COLOR_CLUT1 | OMAP_DSS_COLOR_CLUT2 |
  211. OMAP_DSS_COLOR_CLUT4 | OMAP_DSS_COLOR_CLUT8 |
  212. OMAP_DSS_COLOR_RGB12U | OMAP_DSS_COLOR_ARGB16 |
  213. OMAP_DSS_COLOR_RGB16 | OMAP_DSS_COLOR_RGB24U |
  214. OMAP_DSS_COLOR_RGB24P | OMAP_DSS_COLOR_ARGB32 |
  215. OMAP_DSS_COLOR_RGBA32 | OMAP_DSS_COLOR_RGBX32,
  216. /* OMAP_DSS_VIDEO1 */
  217. OMAP_DSS_COLOR_RGB24U | OMAP_DSS_COLOR_RGB24P |
  218. OMAP_DSS_COLOR_RGB12U | OMAP_DSS_COLOR_RGB16 |
  219. OMAP_DSS_COLOR_YUV2 | OMAP_DSS_COLOR_UYVY,
  220. /* OMAP_DSS_VIDEO2 */
  221. OMAP_DSS_COLOR_RGB12U | OMAP_DSS_COLOR_ARGB16 |
  222. OMAP_DSS_COLOR_RGB16 | OMAP_DSS_COLOR_RGB24U |
  223. OMAP_DSS_COLOR_RGB24P | OMAP_DSS_COLOR_YUV2 |
  224. OMAP_DSS_COLOR_UYVY | OMAP_DSS_COLOR_ARGB32 |
  225. OMAP_DSS_COLOR_RGBA32 | OMAP_DSS_COLOR_RGBX32,
  226. };
  227. static const enum omap_color_mode omap4_dss_supported_color_modes[] = {
  228. /* OMAP_DSS_GFX */
  229. OMAP_DSS_COLOR_CLUT1 | OMAP_DSS_COLOR_CLUT2 |
  230. OMAP_DSS_COLOR_CLUT4 | OMAP_DSS_COLOR_CLUT8 |
  231. OMAP_DSS_COLOR_RGB12U | OMAP_DSS_COLOR_ARGB16 |
  232. OMAP_DSS_COLOR_RGB16 | OMAP_DSS_COLOR_RGB24U |
  233. OMAP_DSS_COLOR_RGB24P | OMAP_DSS_COLOR_ARGB32 |
  234. OMAP_DSS_COLOR_RGBA32 | OMAP_DSS_COLOR_RGBX32 |
  235. OMAP_DSS_COLOR_ARGB16_1555 | OMAP_DSS_COLOR_RGBX16 |
  236. OMAP_DSS_COLOR_RGBA16 | OMAP_DSS_COLOR_XRGB16_1555,
  237. /* OMAP_DSS_VIDEO1 */
  238. OMAP_DSS_COLOR_RGB16 | OMAP_DSS_COLOR_RGB12U |
  239. OMAP_DSS_COLOR_YUV2 | OMAP_DSS_COLOR_ARGB16_1555 |
  240. OMAP_DSS_COLOR_RGBA32 | OMAP_DSS_COLOR_NV12 |
  241. OMAP_DSS_COLOR_RGBA16 | OMAP_DSS_COLOR_RGB24U |
  242. OMAP_DSS_COLOR_RGB24P | OMAP_DSS_COLOR_UYVY |
  243. OMAP_DSS_COLOR_ARGB16 | OMAP_DSS_COLOR_XRGB16_1555 |
  244. OMAP_DSS_COLOR_ARGB32 | OMAP_DSS_COLOR_RGBX16 |
  245. OMAP_DSS_COLOR_RGBX32,
  246. /* OMAP_DSS_VIDEO2 */
  247. OMAP_DSS_COLOR_RGB16 | OMAP_DSS_COLOR_RGB12U |
  248. OMAP_DSS_COLOR_YUV2 | OMAP_DSS_COLOR_ARGB16_1555 |
  249. OMAP_DSS_COLOR_RGBA32 | OMAP_DSS_COLOR_NV12 |
  250. OMAP_DSS_COLOR_RGBA16 | OMAP_DSS_COLOR_RGB24U |
  251. OMAP_DSS_COLOR_RGB24P | OMAP_DSS_COLOR_UYVY |
  252. OMAP_DSS_COLOR_ARGB16 | OMAP_DSS_COLOR_XRGB16_1555 |
  253. OMAP_DSS_COLOR_ARGB32 | OMAP_DSS_COLOR_RGBX16 |
  254. OMAP_DSS_COLOR_RGBX32,
  255. /* OMAP_DSS_VIDEO3 */
  256. OMAP_DSS_COLOR_RGB16 | OMAP_DSS_COLOR_RGB12U |
  257. OMAP_DSS_COLOR_YUV2 | OMAP_DSS_COLOR_ARGB16_1555 |
  258. OMAP_DSS_COLOR_RGBA32 | OMAP_DSS_COLOR_NV12 |
  259. OMAP_DSS_COLOR_RGBA16 | OMAP_DSS_COLOR_RGB24U |
  260. OMAP_DSS_COLOR_RGB24P | OMAP_DSS_COLOR_UYVY |
  261. OMAP_DSS_COLOR_ARGB16 | OMAP_DSS_COLOR_XRGB16_1555 |
  262. OMAP_DSS_COLOR_ARGB32 | OMAP_DSS_COLOR_RGBX16 |
  263. OMAP_DSS_COLOR_RGBX32,
  264. /* OMAP_DSS_WB */
  265. OMAP_DSS_COLOR_RGB16 | OMAP_DSS_COLOR_RGB12U |
  266. OMAP_DSS_COLOR_YUV2 | OMAP_DSS_COLOR_ARGB16_1555 |
  267. OMAP_DSS_COLOR_RGBA32 | OMAP_DSS_COLOR_NV12 |
  268. OMAP_DSS_COLOR_RGBA16 | OMAP_DSS_COLOR_RGB24U |
  269. OMAP_DSS_COLOR_RGB24P | OMAP_DSS_COLOR_UYVY |
  270. OMAP_DSS_COLOR_ARGB16 | OMAP_DSS_COLOR_XRGB16_1555 |
  271. OMAP_DSS_COLOR_ARGB32 | OMAP_DSS_COLOR_RGBX16 |
  272. OMAP_DSS_COLOR_RGBX32,
  273. };
  274. static const enum omap_overlay_caps omap2_dss_overlay_caps[] = {
  275. /* OMAP_DSS_GFX */
  276. OMAP_DSS_OVL_CAP_POS | OMAP_DSS_OVL_CAP_REPLICATION,
  277. /* OMAP_DSS_VIDEO1 */
  278. OMAP_DSS_OVL_CAP_SCALE | OMAP_DSS_OVL_CAP_POS |
  279. OMAP_DSS_OVL_CAP_REPLICATION,
  280. /* OMAP_DSS_VIDEO2 */
  281. OMAP_DSS_OVL_CAP_SCALE | OMAP_DSS_OVL_CAP_POS |
  282. OMAP_DSS_OVL_CAP_REPLICATION,
  283. };
  284. static const enum omap_overlay_caps omap3430_dss_overlay_caps[] = {
  285. /* OMAP_DSS_GFX */
  286. OMAP_DSS_OVL_CAP_GLOBAL_ALPHA | OMAP_DSS_OVL_CAP_POS |
  287. OMAP_DSS_OVL_CAP_REPLICATION,
  288. /* OMAP_DSS_VIDEO1 */
  289. OMAP_DSS_OVL_CAP_SCALE | OMAP_DSS_OVL_CAP_POS |
  290. OMAP_DSS_OVL_CAP_REPLICATION,
  291. /* OMAP_DSS_VIDEO2 */
  292. OMAP_DSS_OVL_CAP_SCALE | OMAP_DSS_OVL_CAP_GLOBAL_ALPHA |
  293. OMAP_DSS_OVL_CAP_POS | OMAP_DSS_OVL_CAP_REPLICATION,
  294. };
  295. static const enum omap_overlay_caps omap3630_dss_overlay_caps[] = {
  296. /* OMAP_DSS_GFX */
  297. OMAP_DSS_OVL_CAP_GLOBAL_ALPHA | OMAP_DSS_OVL_CAP_PRE_MULT_ALPHA |
  298. OMAP_DSS_OVL_CAP_POS | OMAP_DSS_OVL_CAP_REPLICATION,
  299. /* OMAP_DSS_VIDEO1 */
  300. OMAP_DSS_OVL_CAP_SCALE | OMAP_DSS_OVL_CAP_POS |
  301. OMAP_DSS_OVL_CAP_REPLICATION,
  302. /* OMAP_DSS_VIDEO2 */
  303. OMAP_DSS_OVL_CAP_SCALE | OMAP_DSS_OVL_CAP_GLOBAL_ALPHA |
  304. OMAP_DSS_OVL_CAP_PRE_MULT_ALPHA | OMAP_DSS_OVL_CAP_POS |
  305. OMAP_DSS_OVL_CAP_REPLICATION,
  306. };
  307. static const enum omap_overlay_caps omap4_dss_overlay_caps[] = {
  308. /* OMAP_DSS_GFX */
  309. OMAP_DSS_OVL_CAP_GLOBAL_ALPHA | OMAP_DSS_OVL_CAP_PRE_MULT_ALPHA |
  310. OMAP_DSS_OVL_CAP_ZORDER | OMAP_DSS_OVL_CAP_POS |
  311. OMAP_DSS_OVL_CAP_REPLICATION,
  312. /* OMAP_DSS_VIDEO1 */
  313. OMAP_DSS_OVL_CAP_SCALE | OMAP_DSS_OVL_CAP_GLOBAL_ALPHA |
  314. OMAP_DSS_OVL_CAP_PRE_MULT_ALPHA | OMAP_DSS_OVL_CAP_ZORDER |
  315. OMAP_DSS_OVL_CAP_POS | OMAP_DSS_OVL_CAP_REPLICATION,
  316. /* OMAP_DSS_VIDEO2 */
  317. OMAP_DSS_OVL_CAP_SCALE | OMAP_DSS_OVL_CAP_GLOBAL_ALPHA |
  318. OMAP_DSS_OVL_CAP_PRE_MULT_ALPHA | OMAP_DSS_OVL_CAP_ZORDER |
  319. OMAP_DSS_OVL_CAP_POS | OMAP_DSS_OVL_CAP_REPLICATION,
  320. /* OMAP_DSS_VIDEO3 */
  321. OMAP_DSS_OVL_CAP_SCALE | OMAP_DSS_OVL_CAP_GLOBAL_ALPHA |
  322. OMAP_DSS_OVL_CAP_PRE_MULT_ALPHA | OMAP_DSS_OVL_CAP_ZORDER |
  323. OMAP_DSS_OVL_CAP_POS | OMAP_DSS_OVL_CAP_REPLICATION,
  324. };
  325. static const char * const omap2_dss_clk_source_names[] = {
  326. [OMAP_DSS_CLK_SRC_DSI_PLL_HSDIV_DISPC] = "N/A",
  327. [OMAP_DSS_CLK_SRC_DSI_PLL_HSDIV_DSI] = "N/A",
  328. [OMAP_DSS_CLK_SRC_FCK] = "DSS_FCLK1",
  329. };
  330. static const char * const omap3_dss_clk_source_names[] = {
  331. [OMAP_DSS_CLK_SRC_DSI_PLL_HSDIV_DISPC] = "DSI1_PLL_FCLK",
  332. [OMAP_DSS_CLK_SRC_DSI_PLL_HSDIV_DSI] = "DSI2_PLL_FCLK",
  333. [OMAP_DSS_CLK_SRC_FCK] = "DSS1_ALWON_FCLK",
  334. };
  335. static const char * const omap4_dss_clk_source_names[] = {
  336. [OMAP_DSS_CLK_SRC_DSI_PLL_HSDIV_DISPC] = "PLL1_CLK1",
  337. [OMAP_DSS_CLK_SRC_DSI_PLL_HSDIV_DSI] = "PLL1_CLK2",
  338. [OMAP_DSS_CLK_SRC_FCK] = "DSS_FCLK",
  339. [OMAP_DSS_CLK_SRC_DSI2_PLL_HSDIV_DISPC] = "PLL2_CLK1",
  340. [OMAP_DSS_CLK_SRC_DSI2_PLL_HSDIV_DSI] = "PLL2_CLK2",
  341. };
  342. static const char * const omap5_dss_clk_source_names[] = {
  343. [OMAP_DSS_CLK_SRC_DSI_PLL_HSDIV_DISPC] = "DPLL_DSI1_A_CLK1",
  344. [OMAP_DSS_CLK_SRC_DSI_PLL_HSDIV_DSI] = "DPLL_DSI1_A_CLK2",
  345. [OMAP_DSS_CLK_SRC_FCK] = "DSS_CLK",
  346. [OMAP_DSS_CLK_SRC_DSI2_PLL_HSDIV_DISPC] = "DPLL_DSI1_C_CLK1",
  347. [OMAP_DSS_CLK_SRC_DSI2_PLL_HSDIV_DSI] = "DPLL_DSI1_C_CLK2",
  348. };
  349. static const struct dss_param_range omap2_dss_param_range[] = {
  350. [FEAT_PARAM_DSS_FCK] = { 0, 173000000 },
  351. [FEAT_PARAM_DSS_PCD] = { 2, 255 },
  352. [FEAT_PARAM_DSIPLL_REGN] = { 0, 0 },
  353. [FEAT_PARAM_DSIPLL_REGM] = { 0, 0 },
  354. [FEAT_PARAM_DSIPLL_REGM_DISPC] = { 0, 0 },
  355. [FEAT_PARAM_DSIPLL_REGM_DSI] = { 0, 0 },
  356. [FEAT_PARAM_DSIPLL_FINT] = { 0, 0 },
  357. [FEAT_PARAM_DSIPLL_LPDIV] = { 0, 0 },
  358. [FEAT_PARAM_DOWNSCALE] = { 1, 2 },
  359. /*
  360. * Assuming the line width buffer to be 768 pixels as OMAP2 DISPC
  361. * scaler cannot scale a image with width more than 768.
  362. */
  363. [FEAT_PARAM_LINEWIDTH] = { 1, 768 },
  364. };
  365. static const struct dss_param_range omap3_dss_param_range[] = {
  366. [FEAT_PARAM_DSS_FCK] = { 0, 173000000 },
  367. [FEAT_PARAM_DSS_PCD] = { 1, 255 },
  368. [FEAT_PARAM_DSIPLL_REGN] = { 0, (1 << 7) - 1 },
  369. [FEAT_PARAM_DSIPLL_REGM] = { 0, (1 << 11) - 1 },
  370. [FEAT_PARAM_DSIPLL_REGM_DISPC] = { 0, (1 << 4) - 1 },
  371. [FEAT_PARAM_DSIPLL_REGM_DSI] = { 0, (1 << 4) - 1 },
  372. [FEAT_PARAM_DSIPLL_FINT] = { 750000, 2100000 },
  373. [FEAT_PARAM_DSIPLL_LPDIV] = { 1, (1 << 13) - 1},
  374. [FEAT_PARAM_DSI_FCK] = { 0, 173000000 },
  375. [FEAT_PARAM_DOWNSCALE] = { 1, 4 },
  376. [FEAT_PARAM_LINEWIDTH] = { 1, 1024 },
  377. };
  378. static const struct dss_param_range omap4_dss_param_range[] = {
  379. [FEAT_PARAM_DSS_FCK] = { 0, 186000000 },
  380. [FEAT_PARAM_DSS_PCD] = { 1, 255 },
  381. [FEAT_PARAM_DSIPLL_REGN] = { 0, (1 << 8) - 1 },
  382. [FEAT_PARAM_DSIPLL_REGM] = { 0, (1 << 12) - 1 },
  383. [FEAT_PARAM_DSIPLL_REGM_DISPC] = { 0, (1 << 5) - 1 },
  384. [FEAT_PARAM_DSIPLL_REGM_DSI] = { 0, (1 << 5) - 1 },
  385. [FEAT_PARAM_DSIPLL_FINT] = { 500000, 2500000 },
  386. [FEAT_PARAM_DSIPLL_LPDIV] = { 0, (1 << 13) - 1 },
  387. [FEAT_PARAM_DSI_FCK] = { 0, 170000000 },
  388. [FEAT_PARAM_DOWNSCALE] = { 1, 4 },
  389. [FEAT_PARAM_LINEWIDTH] = { 1, 2048 },
  390. };
  391. static const struct dss_param_range omap5_dss_param_range[] = {
  392. [FEAT_PARAM_DSS_FCK] = { 0, 200000000 },
  393. [FEAT_PARAM_DSS_PCD] = { 1, 255 },
  394. [FEAT_PARAM_DSIPLL_REGN] = { 0, (1 << 8) - 1 },
  395. [FEAT_PARAM_DSIPLL_REGM] = { 0, (1 << 12) - 1 },
  396. [FEAT_PARAM_DSIPLL_REGM_DISPC] = { 0, (1 << 5) - 1 },
  397. [FEAT_PARAM_DSIPLL_REGM_DSI] = { 0, (1 << 5) - 1 },
  398. [FEAT_PARAM_DSIPLL_FINT] = { 500000, 2500000 },
  399. [FEAT_PARAM_DSIPLL_LPDIV] = { 0, (1 << 13) - 1 },
  400. [FEAT_PARAM_DSI_FCK] = { 0, 170000000 },
  401. [FEAT_PARAM_DOWNSCALE] = { 1, 4 },
  402. [FEAT_PARAM_LINEWIDTH] = { 1, 2048 },
  403. };
  404. static const enum dss_feat_id omap2_dss_feat_list[] = {
  405. FEAT_LCDENABLEPOL,
  406. FEAT_LCDENABLESIGNAL,
  407. FEAT_PCKFREEENABLE,
  408. FEAT_FUNCGATED,
  409. FEAT_ROWREPEATENABLE,
  410. FEAT_RESIZECONF,
  411. };
  412. static const enum dss_feat_id omap3430_dss_feat_list[] = {
  413. FEAT_LCDENABLEPOL,
  414. FEAT_LCDENABLESIGNAL,
  415. FEAT_PCKFREEENABLE,
  416. FEAT_FUNCGATED,
  417. FEAT_LINEBUFFERSPLIT,
  418. FEAT_ROWREPEATENABLE,
  419. FEAT_RESIZECONF,
  420. FEAT_DSI_PLL_FREQSEL,
  421. FEAT_DSI_REVERSE_TXCLKESC,
  422. FEAT_VENC_REQUIRES_TV_DAC_CLK,
  423. FEAT_CPR,
  424. FEAT_PRELOAD,
  425. FEAT_FIR_COEF_V,
  426. FEAT_ALPHA_FIXED_ZORDER,
  427. FEAT_FIFO_MERGE,
  428. FEAT_OMAP3_DSI_FIFO_BUG,
  429. FEAT_DPI_USES_VDDS_DSI,
  430. };
  431. static const enum dss_feat_id am35xx_dss_feat_list[] = {
  432. FEAT_LCDENABLEPOL,
  433. FEAT_LCDENABLESIGNAL,
  434. FEAT_PCKFREEENABLE,
  435. FEAT_FUNCGATED,
  436. FEAT_LINEBUFFERSPLIT,
  437. FEAT_ROWREPEATENABLE,
  438. FEAT_RESIZECONF,
  439. FEAT_DSI_PLL_FREQSEL,
  440. FEAT_DSI_REVERSE_TXCLKESC,
  441. FEAT_VENC_REQUIRES_TV_DAC_CLK,
  442. FEAT_CPR,
  443. FEAT_PRELOAD,
  444. FEAT_FIR_COEF_V,
  445. FEAT_ALPHA_FIXED_ZORDER,
  446. FEAT_FIFO_MERGE,
  447. FEAT_OMAP3_DSI_FIFO_BUG,
  448. };
  449. static const enum dss_feat_id omap3630_dss_feat_list[] = {
  450. FEAT_LCDENABLEPOL,
  451. FEAT_LCDENABLESIGNAL,
  452. FEAT_PCKFREEENABLE,
  453. FEAT_FUNCGATED,
  454. FEAT_LINEBUFFERSPLIT,
  455. FEAT_ROWREPEATENABLE,
  456. FEAT_RESIZECONF,
  457. FEAT_DSI_PLL_PWR_BUG,
  458. FEAT_DSI_PLL_FREQSEL,
  459. FEAT_CPR,
  460. FEAT_PRELOAD,
  461. FEAT_FIR_COEF_V,
  462. FEAT_ALPHA_FIXED_ZORDER,
  463. FEAT_FIFO_MERGE,
  464. FEAT_OMAP3_DSI_FIFO_BUG,
  465. FEAT_DPI_USES_VDDS_DSI,
  466. };
  467. static const enum dss_feat_id omap4430_es1_0_dss_feat_list[] = {
  468. FEAT_MGR_LCD2,
  469. FEAT_CORE_CLK_DIV,
  470. FEAT_LCD_CLK_SRC,
  471. FEAT_DSI_DCS_CMD_CONFIG_VC,
  472. FEAT_DSI_VC_OCP_WIDTH,
  473. FEAT_DSI_GNQ,
  474. FEAT_HANDLE_UV_SEPARATE,
  475. FEAT_ATTR2,
  476. FEAT_CPR,
  477. FEAT_PRELOAD,
  478. FEAT_FIR_COEF_V,
  479. FEAT_ALPHA_FREE_ZORDER,
  480. FEAT_FIFO_MERGE,
  481. FEAT_BURST_2D,
  482. };
  483. static const enum dss_feat_id omap4430_es2_0_1_2_dss_feat_list[] = {
  484. FEAT_MGR_LCD2,
  485. FEAT_CORE_CLK_DIV,
  486. FEAT_LCD_CLK_SRC,
  487. FEAT_DSI_DCS_CMD_CONFIG_VC,
  488. FEAT_DSI_VC_OCP_WIDTH,
  489. FEAT_DSI_GNQ,
  490. FEAT_HDMI_CTS_SWMODE,
  491. FEAT_HANDLE_UV_SEPARATE,
  492. FEAT_ATTR2,
  493. FEAT_CPR,
  494. FEAT_PRELOAD,
  495. FEAT_FIR_COEF_V,
  496. FEAT_ALPHA_FREE_ZORDER,
  497. FEAT_FIFO_MERGE,
  498. FEAT_BURST_2D,
  499. };
  500. static const enum dss_feat_id omap4_dss_feat_list[] = {
  501. FEAT_MGR_LCD2,
  502. FEAT_CORE_CLK_DIV,
  503. FEAT_LCD_CLK_SRC,
  504. FEAT_DSI_DCS_CMD_CONFIG_VC,
  505. FEAT_DSI_VC_OCP_WIDTH,
  506. FEAT_DSI_GNQ,
  507. FEAT_HDMI_CTS_SWMODE,
  508. FEAT_HDMI_AUDIO_USE_MCLK,
  509. FEAT_HANDLE_UV_SEPARATE,
  510. FEAT_ATTR2,
  511. FEAT_CPR,
  512. FEAT_PRELOAD,
  513. FEAT_FIR_COEF_V,
  514. FEAT_ALPHA_FREE_ZORDER,
  515. FEAT_FIFO_MERGE,
  516. FEAT_BURST_2D,
  517. };
  518. static const enum dss_feat_id omap5_dss_feat_list[] = {
  519. FEAT_MGR_LCD2,
  520. FEAT_CORE_CLK_DIV,
  521. FEAT_LCD_CLK_SRC,
  522. FEAT_DSI_DCS_CMD_CONFIG_VC,
  523. FEAT_DSI_VC_OCP_WIDTH,
  524. FEAT_DSI_GNQ,
  525. FEAT_HDMI_CTS_SWMODE,
  526. FEAT_HDMI_AUDIO_USE_MCLK,
  527. FEAT_HANDLE_UV_SEPARATE,
  528. FEAT_ATTR2,
  529. FEAT_CPR,
  530. FEAT_PRELOAD,
  531. FEAT_FIR_COEF_V,
  532. FEAT_ALPHA_FREE_ZORDER,
  533. FEAT_FIFO_MERGE,
  534. FEAT_BURST_2D,
  535. FEAT_DSI_PLL_SELFREQDCO,
  536. FEAT_DSI_PLL_REFSEL,
  537. FEAT_DSI_PHY_DCC,
  538. };
  539. /* OMAP2 DSS Features */
  540. static const struct omap_dss_features omap2_dss_features = {
  541. .reg_fields = omap2_dss_reg_fields,
  542. .num_reg_fields = ARRAY_SIZE(omap2_dss_reg_fields),
  543. .features = omap2_dss_feat_list,
  544. .num_features = ARRAY_SIZE(omap2_dss_feat_list),
  545. .num_mgrs = 2,
  546. .num_ovls = 3,
  547. .supported_displays = omap2_dss_supported_displays,
  548. .supported_outputs = omap2_dss_supported_outputs,
  549. .supported_color_modes = omap2_dss_supported_color_modes,
  550. .overlay_caps = omap2_dss_overlay_caps,
  551. .clksrc_names = omap2_dss_clk_source_names,
  552. .dss_params = omap2_dss_param_range,
  553. .supported_rotation_types = OMAP_DSS_ROT_DMA | OMAP_DSS_ROT_VRFB,
  554. .buffer_size_unit = 1,
  555. .burst_size_unit = 8,
  556. };
  557. /* OMAP3 DSS Features */
  558. static const struct omap_dss_features omap3430_dss_features = {
  559. .reg_fields = omap3_dss_reg_fields,
  560. .num_reg_fields = ARRAY_SIZE(omap3_dss_reg_fields),
  561. .features = omap3430_dss_feat_list,
  562. .num_features = ARRAY_SIZE(omap3430_dss_feat_list),
  563. .num_mgrs = 2,
  564. .num_ovls = 3,
  565. .supported_displays = omap3430_dss_supported_displays,
  566. .supported_outputs = omap3430_dss_supported_outputs,
  567. .supported_color_modes = omap3_dss_supported_color_modes,
  568. .overlay_caps = omap3430_dss_overlay_caps,
  569. .clksrc_names = omap3_dss_clk_source_names,
  570. .dss_params = omap3_dss_param_range,
  571. .supported_rotation_types = OMAP_DSS_ROT_DMA | OMAP_DSS_ROT_VRFB,
  572. .buffer_size_unit = 1,
  573. .burst_size_unit = 8,
  574. };
  575. /*
  576. * AM35xx DSS Features. This is basically OMAP3 DSS Features without the
  577. * vdds_dsi regulator.
  578. */
  579. static const struct omap_dss_features am35xx_dss_features = {
  580. .reg_fields = omap3_dss_reg_fields,
  581. .num_reg_fields = ARRAY_SIZE(omap3_dss_reg_fields),
  582. .features = am35xx_dss_feat_list,
  583. .num_features = ARRAY_SIZE(am35xx_dss_feat_list),
  584. .num_mgrs = 2,
  585. .num_ovls = 3,
  586. .supported_displays = omap3430_dss_supported_displays,
  587. .supported_outputs = omap3430_dss_supported_outputs,
  588. .supported_color_modes = omap3_dss_supported_color_modes,
  589. .overlay_caps = omap3430_dss_overlay_caps,
  590. .clksrc_names = omap3_dss_clk_source_names,
  591. .dss_params = omap3_dss_param_range,
  592. .supported_rotation_types = OMAP_DSS_ROT_DMA | OMAP_DSS_ROT_VRFB,
  593. .buffer_size_unit = 1,
  594. .burst_size_unit = 8,
  595. };
  596. static const struct omap_dss_features omap3630_dss_features = {
  597. .reg_fields = omap3_dss_reg_fields,
  598. .num_reg_fields = ARRAY_SIZE(omap3_dss_reg_fields),
  599. .features = omap3630_dss_feat_list,
  600. .num_features = ARRAY_SIZE(omap3630_dss_feat_list),
  601. .num_mgrs = 2,
  602. .num_ovls = 3,
  603. .supported_displays = omap3630_dss_supported_displays,
  604. .supported_outputs = omap3630_dss_supported_outputs,
  605. .supported_color_modes = omap3_dss_supported_color_modes,
  606. .overlay_caps = omap3630_dss_overlay_caps,
  607. .clksrc_names = omap3_dss_clk_source_names,
  608. .dss_params = omap3_dss_param_range,
  609. .supported_rotation_types = OMAP_DSS_ROT_DMA | OMAP_DSS_ROT_VRFB,
  610. .buffer_size_unit = 1,
  611. .burst_size_unit = 8,
  612. };
  613. /* OMAP4 DSS Features */
  614. /* For OMAP4430 ES 1.0 revision */
  615. static const struct omap_dss_features omap4430_es1_0_dss_features = {
  616. .reg_fields = omap4_dss_reg_fields,
  617. .num_reg_fields = ARRAY_SIZE(omap4_dss_reg_fields),
  618. .features = omap4430_es1_0_dss_feat_list,
  619. .num_features = ARRAY_SIZE(omap4430_es1_0_dss_feat_list),
  620. .num_mgrs = 3,
  621. .num_ovls = 4,
  622. .num_wbs = 1,
  623. .supported_displays = omap4_dss_supported_displays,
  624. .supported_outputs = omap4_dss_supported_outputs,
  625. .supported_color_modes = omap4_dss_supported_color_modes,
  626. .overlay_caps = omap4_dss_overlay_caps,
  627. .clksrc_names = omap4_dss_clk_source_names,
  628. .dss_params = omap4_dss_param_range,
  629. .supported_rotation_types = OMAP_DSS_ROT_DMA | OMAP_DSS_ROT_TILER,
  630. .buffer_size_unit = 16,
  631. .burst_size_unit = 16,
  632. };
  633. /* For OMAP4430 ES 2.0, 2.1 and 2.2 revisions */
  634. static const struct omap_dss_features omap4430_es2_0_1_2_dss_features = {
  635. .reg_fields = omap4_dss_reg_fields,
  636. .num_reg_fields = ARRAY_SIZE(omap4_dss_reg_fields),
  637. .features = omap4430_es2_0_1_2_dss_feat_list,
  638. .num_features = ARRAY_SIZE(omap4430_es2_0_1_2_dss_feat_list),
  639. .num_mgrs = 3,
  640. .num_ovls = 4,
  641. .num_wbs = 1,
  642. .supported_displays = omap4_dss_supported_displays,
  643. .supported_outputs = omap4_dss_supported_outputs,
  644. .supported_color_modes = omap4_dss_supported_color_modes,
  645. .overlay_caps = omap4_dss_overlay_caps,
  646. .clksrc_names = omap4_dss_clk_source_names,
  647. .dss_params = omap4_dss_param_range,
  648. .supported_rotation_types = OMAP_DSS_ROT_DMA | OMAP_DSS_ROT_TILER,
  649. .buffer_size_unit = 16,
  650. .burst_size_unit = 16,
  651. };
  652. /* For all the other OMAP4 versions */
  653. static const struct omap_dss_features omap4_dss_features = {
  654. .reg_fields = omap4_dss_reg_fields,
  655. .num_reg_fields = ARRAY_SIZE(omap4_dss_reg_fields),
  656. .features = omap4_dss_feat_list,
  657. .num_features = ARRAY_SIZE(omap4_dss_feat_list),
  658. .num_mgrs = 3,
  659. .num_ovls = 4,
  660. .num_wbs = 1,
  661. .supported_displays = omap4_dss_supported_displays,
  662. .supported_outputs = omap4_dss_supported_outputs,
  663. .supported_color_modes = omap4_dss_supported_color_modes,
  664. .overlay_caps = omap4_dss_overlay_caps,
  665. .clksrc_names = omap4_dss_clk_source_names,
  666. .dss_params = omap4_dss_param_range,
  667. .supported_rotation_types = OMAP_DSS_ROT_DMA | OMAP_DSS_ROT_TILER,
  668. .buffer_size_unit = 16,
  669. .burst_size_unit = 16,
  670. };
  671. /* OMAP5 DSS Features */
  672. static const struct omap_dss_features omap5_dss_features = {
  673. .reg_fields = omap5_dss_reg_fields,
  674. .num_reg_fields = ARRAY_SIZE(omap5_dss_reg_fields),
  675. .features = omap5_dss_feat_list,
  676. .num_features = ARRAY_SIZE(omap5_dss_feat_list),
  677. .num_mgrs = 3,
  678. .num_ovls = 4,
  679. .supported_displays = omap5_dss_supported_displays,
  680. .supported_outputs = omap5_dss_supported_outputs,
  681. .supported_color_modes = omap4_dss_supported_color_modes,
  682. .overlay_caps = omap4_dss_overlay_caps,
  683. .clksrc_names = omap5_dss_clk_source_names,
  684. .dss_params = omap5_dss_param_range,
  685. .supported_rotation_types = OMAP_DSS_ROT_DMA | OMAP_DSS_ROT_TILER,
  686. .buffer_size_unit = 16,
  687. .burst_size_unit = 16,
  688. };
  689. #if defined(CONFIG_OMAP4_DSS_HDMI)
  690. /* HDMI OMAP4 Functions*/
  691. static const struct ti_hdmi_ip_ops omap4_hdmi_functions = {
  692. .video_configure = ti_hdmi_4xxx_basic_configure,
  693. .phy_enable = ti_hdmi_4xxx_phy_enable,
  694. .phy_disable = ti_hdmi_4xxx_phy_disable,
  695. .read_edid = ti_hdmi_4xxx_read_edid,
  696. .detect = ti_hdmi_4xxx_detect,
  697. .pll_enable = ti_hdmi_4xxx_pll_enable,
  698. .pll_disable = ti_hdmi_4xxx_pll_disable,
  699. .video_enable = ti_hdmi_4xxx_wp_video_start,
  700. .video_disable = ti_hdmi_4xxx_wp_video_stop,
  701. .dump_wrapper = ti_hdmi_4xxx_wp_dump,
  702. .dump_core = ti_hdmi_4xxx_core_dump,
  703. .dump_pll = ti_hdmi_4xxx_pll_dump,
  704. .dump_phy = ti_hdmi_4xxx_phy_dump,
  705. #if defined(CONFIG_OMAP4_DSS_HDMI_AUDIO)
  706. .audio_enable = ti_hdmi_4xxx_wp_audio_enable,
  707. .audio_disable = ti_hdmi_4xxx_wp_audio_disable,
  708. .audio_start = ti_hdmi_4xxx_audio_start,
  709. .audio_stop = ti_hdmi_4xxx_audio_stop,
  710. .audio_config = ti_hdmi_4xxx_audio_config,
  711. .audio_get_dma_port = ti_hdmi_4xxx_audio_get_dma_port,
  712. #endif
  713. };
  714. void dss_init_hdmi_ip_ops(struct hdmi_ip_data *ip_data,
  715. enum omapdss_version version)
  716. {
  717. switch (version) {
  718. case OMAPDSS_VER_OMAP4430_ES1:
  719. case OMAPDSS_VER_OMAP4430_ES2:
  720. case OMAPDSS_VER_OMAP4:
  721. ip_data->ops = &omap4_hdmi_functions;
  722. break;
  723. default:
  724. ip_data->ops = NULL;
  725. }
  726. WARN_ON(ip_data->ops == NULL);
  727. }
  728. #endif
  729. /* Functions returning values related to a DSS feature */
  730. int dss_feat_get_num_mgrs(void)
  731. {
  732. return omap_current_dss_features->num_mgrs;
  733. }
  734. EXPORT_SYMBOL(dss_feat_get_num_mgrs);
  735. int dss_feat_get_num_ovls(void)
  736. {
  737. return omap_current_dss_features->num_ovls;
  738. }
  739. EXPORT_SYMBOL(dss_feat_get_num_ovls);
  740. int dss_feat_get_num_wbs(void)
  741. {
  742. return omap_current_dss_features->num_wbs;
  743. }
  744. unsigned long dss_feat_get_param_min(enum dss_range_param param)
  745. {
  746. return omap_current_dss_features->dss_params[param].min;
  747. }
  748. unsigned long dss_feat_get_param_max(enum dss_range_param param)
  749. {
  750. return omap_current_dss_features->dss_params[param].max;
  751. }
  752. enum omap_display_type dss_feat_get_supported_displays(enum omap_channel channel)
  753. {
  754. return omap_current_dss_features->supported_displays[channel];
  755. }
  756. EXPORT_SYMBOL(dss_feat_get_supported_displays);
  757. enum omap_dss_output_id dss_feat_get_supported_outputs(enum omap_channel channel)
  758. {
  759. return omap_current_dss_features->supported_outputs[channel];
  760. }
  761. EXPORT_SYMBOL(dss_feat_get_supported_outputs);
  762. enum omap_color_mode dss_feat_get_supported_color_modes(enum omap_plane plane)
  763. {
  764. return omap_current_dss_features->supported_color_modes[plane];
  765. }
  766. EXPORT_SYMBOL(dss_feat_get_supported_color_modes);
  767. enum omap_overlay_caps dss_feat_get_overlay_caps(enum omap_plane plane)
  768. {
  769. return omap_current_dss_features->overlay_caps[plane];
  770. }
  771. bool dss_feat_color_mode_supported(enum omap_plane plane,
  772. enum omap_color_mode color_mode)
  773. {
  774. return omap_current_dss_features->supported_color_modes[plane] &
  775. color_mode;
  776. }
  777. const char *dss_feat_get_clk_source_name(enum omap_dss_clk_source id)
  778. {
  779. return omap_current_dss_features->clksrc_names[id];
  780. }
  781. u32 dss_feat_get_buffer_size_unit(void)
  782. {
  783. return omap_current_dss_features->buffer_size_unit;
  784. }
  785. u32 dss_feat_get_burst_size_unit(void)
  786. {
  787. return omap_current_dss_features->burst_size_unit;
  788. }
  789. /* DSS has_feature check */
  790. bool dss_has_feature(enum dss_feat_id id)
  791. {
  792. int i;
  793. const enum dss_feat_id *features = omap_current_dss_features->features;
  794. const int num_features = omap_current_dss_features->num_features;
  795. for (i = 0; i < num_features; i++) {
  796. if (features[i] == id)
  797. return true;
  798. }
  799. return false;
  800. }
  801. void dss_feat_get_reg_field(enum dss_feat_reg_field id, u8 *start, u8 *end)
  802. {
  803. if (id >= omap_current_dss_features->num_reg_fields)
  804. BUG();
  805. *start = omap_current_dss_features->reg_fields[id].start;
  806. *end = omap_current_dss_features->reg_fields[id].end;
  807. }
  808. bool dss_feat_rotation_type_supported(enum omap_dss_rotation_type rot_type)
  809. {
  810. return omap_current_dss_features->supported_rotation_types & rot_type;
  811. }
  812. void dss_features_init(enum omapdss_version version)
  813. {
  814. switch (version) {
  815. case OMAPDSS_VER_OMAP24xx:
  816. omap_current_dss_features = &omap2_dss_features;
  817. break;
  818. case OMAPDSS_VER_OMAP34xx_ES1:
  819. case OMAPDSS_VER_OMAP34xx_ES3:
  820. omap_current_dss_features = &omap3430_dss_features;
  821. break;
  822. case OMAPDSS_VER_OMAP3630:
  823. omap_current_dss_features = &omap3630_dss_features;
  824. break;
  825. case OMAPDSS_VER_OMAP4430_ES1:
  826. omap_current_dss_features = &omap4430_es1_0_dss_features;
  827. break;
  828. case OMAPDSS_VER_OMAP4430_ES2:
  829. omap_current_dss_features = &omap4430_es2_0_1_2_dss_features;
  830. break;
  831. case OMAPDSS_VER_OMAP4:
  832. omap_current_dss_features = &omap4_dss_features;
  833. break;
  834. case OMAPDSS_VER_OMAP5:
  835. omap_current_dss_features = &omap5_dss_features;
  836. break;
  837. case OMAPDSS_VER_AM35xx:
  838. omap_current_dss_features = &am35xx_dss_features;
  839. break;
  840. default:
  841. DSSWARN("Unsupported OMAP version");
  842. break;
  843. }
  844. }