panel-tpo-td043mtea1.c 14 KB

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  1. /*
  2. * LCD panel driver for TPO TD043MTEA1
  3. *
  4. * Author: Gražvydas Ignotas <notasas@gmail.com>
  5. *
  6. * This program is free software; you can redistribute it and/or modify
  7. * it under the terms of the GNU General Public License as published by
  8. * the Free Software Foundation; either version 2 of the License, or
  9. * (at your option) any later version.
  10. */
  11. #include <linux/module.h>
  12. #include <linux/delay.h>
  13. #include <linux/spi/spi.h>
  14. #include <linux/regulator/consumer.h>
  15. #include <linux/gpio.h>
  16. #include <linux/err.h>
  17. #include <linux/slab.h>
  18. #include <video/omapdss.h>
  19. #define TPO_R02_MODE(x) ((x) & 7)
  20. #define TPO_R02_MODE_800x480 7
  21. #define TPO_R02_NCLK_RISING BIT(3)
  22. #define TPO_R02_HSYNC_HIGH BIT(4)
  23. #define TPO_R02_VSYNC_HIGH BIT(5)
  24. #define TPO_R03_NSTANDBY BIT(0)
  25. #define TPO_R03_EN_CP_CLK BIT(1)
  26. #define TPO_R03_EN_VGL_PUMP BIT(2)
  27. #define TPO_R03_EN_PWM BIT(3)
  28. #define TPO_R03_DRIVING_CAP_100 BIT(4)
  29. #define TPO_R03_EN_PRE_CHARGE BIT(6)
  30. #define TPO_R03_SOFTWARE_CTL BIT(7)
  31. #define TPO_R04_NFLIP_H BIT(0)
  32. #define TPO_R04_NFLIP_V BIT(1)
  33. #define TPO_R04_CP_CLK_FREQ_1H BIT(2)
  34. #define TPO_R04_VGL_FREQ_1H BIT(4)
  35. #define TPO_R03_VAL_NORMAL (TPO_R03_NSTANDBY | TPO_R03_EN_CP_CLK | \
  36. TPO_R03_EN_VGL_PUMP | TPO_R03_EN_PWM | \
  37. TPO_R03_DRIVING_CAP_100 | TPO_R03_EN_PRE_CHARGE | \
  38. TPO_R03_SOFTWARE_CTL)
  39. #define TPO_R03_VAL_STANDBY (TPO_R03_DRIVING_CAP_100 | \
  40. TPO_R03_EN_PRE_CHARGE | TPO_R03_SOFTWARE_CTL)
  41. static const u16 tpo_td043_def_gamma[12] = {
  42. 105, 315, 381, 431, 490, 537, 579, 686, 780, 837, 880, 1023
  43. };
  44. struct tpo_td043_device {
  45. struct spi_device *spi;
  46. struct regulator *vcc_reg;
  47. int nreset_gpio;
  48. u16 gamma[12];
  49. u32 mode;
  50. u32 hmirror:1;
  51. u32 vmirror:1;
  52. u32 powered_on:1;
  53. u32 spi_suspended:1;
  54. u32 power_on_resume:1;
  55. };
  56. static int tpo_td043_write(struct spi_device *spi, u8 addr, u8 data)
  57. {
  58. struct spi_message m;
  59. struct spi_transfer xfer;
  60. u16 w;
  61. int r;
  62. spi_message_init(&m);
  63. memset(&xfer, 0, sizeof(xfer));
  64. w = ((u16)addr << 10) | (1 << 8) | data;
  65. xfer.tx_buf = &w;
  66. xfer.bits_per_word = 16;
  67. xfer.len = 2;
  68. spi_message_add_tail(&xfer, &m);
  69. r = spi_sync(spi, &m);
  70. if (r < 0)
  71. dev_warn(&spi->dev, "failed to write to LCD reg (%d)\n", r);
  72. return r;
  73. }
  74. static void tpo_td043_write_gamma(struct spi_device *spi, u16 gamma[12])
  75. {
  76. u8 i, val;
  77. /* gamma bits [9:8] */
  78. for (val = i = 0; i < 4; i++)
  79. val |= (gamma[i] & 0x300) >> ((i + 1) * 2);
  80. tpo_td043_write(spi, 0x11, val);
  81. for (val = i = 0; i < 4; i++)
  82. val |= (gamma[i+4] & 0x300) >> ((i + 1) * 2);
  83. tpo_td043_write(spi, 0x12, val);
  84. for (val = i = 0; i < 4; i++)
  85. val |= (gamma[i+8] & 0x300) >> ((i + 1) * 2);
  86. tpo_td043_write(spi, 0x13, val);
  87. /* gamma bits [7:0] */
  88. for (val = i = 0; i < 12; i++)
  89. tpo_td043_write(spi, 0x14 + i, gamma[i] & 0xff);
  90. }
  91. static int tpo_td043_write_mirror(struct spi_device *spi, bool h, bool v)
  92. {
  93. u8 reg4 = TPO_R04_NFLIP_H | TPO_R04_NFLIP_V | \
  94. TPO_R04_CP_CLK_FREQ_1H | TPO_R04_VGL_FREQ_1H;
  95. if (h)
  96. reg4 &= ~TPO_R04_NFLIP_H;
  97. if (v)
  98. reg4 &= ~TPO_R04_NFLIP_V;
  99. return tpo_td043_write(spi, 4, reg4);
  100. }
  101. static int tpo_td043_set_hmirror(struct omap_dss_device *dssdev, bool enable)
  102. {
  103. struct tpo_td043_device *tpo_td043 = dev_get_drvdata(&dssdev->dev);
  104. tpo_td043->hmirror = enable;
  105. return tpo_td043_write_mirror(tpo_td043->spi, tpo_td043->hmirror,
  106. tpo_td043->vmirror);
  107. }
  108. static bool tpo_td043_get_hmirror(struct omap_dss_device *dssdev)
  109. {
  110. struct tpo_td043_device *tpo_td043 = dev_get_drvdata(&dssdev->dev);
  111. return tpo_td043->hmirror;
  112. }
  113. static ssize_t tpo_td043_vmirror_show(struct device *dev,
  114. struct device_attribute *attr, char *buf)
  115. {
  116. struct tpo_td043_device *tpo_td043 = dev_get_drvdata(dev);
  117. return snprintf(buf, PAGE_SIZE, "%d\n", tpo_td043->vmirror);
  118. }
  119. static ssize_t tpo_td043_vmirror_store(struct device *dev,
  120. struct device_attribute *attr, const char *buf, size_t count)
  121. {
  122. struct tpo_td043_device *tpo_td043 = dev_get_drvdata(dev);
  123. int val;
  124. int ret;
  125. ret = kstrtoint(buf, 0, &val);
  126. if (ret < 0)
  127. return ret;
  128. val = !!val;
  129. ret = tpo_td043_write_mirror(tpo_td043->spi, tpo_td043->hmirror, val);
  130. if (ret < 0)
  131. return ret;
  132. tpo_td043->vmirror = val;
  133. return count;
  134. }
  135. static ssize_t tpo_td043_mode_show(struct device *dev,
  136. struct device_attribute *attr, char *buf)
  137. {
  138. struct tpo_td043_device *tpo_td043 = dev_get_drvdata(dev);
  139. return snprintf(buf, PAGE_SIZE, "%d\n", tpo_td043->mode);
  140. }
  141. static ssize_t tpo_td043_mode_store(struct device *dev,
  142. struct device_attribute *attr, const char *buf, size_t count)
  143. {
  144. struct tpo_td043_device *tpo_td043 = dev_get_drvdata(dev);
  145. long val;
  146. int ret;
  147. ret = kstrtol(buf, 0, &val);
  148. if (ret != 0 || val & ~7)
  149. return -EINVAL;
  150. tpo_td043->mode = val;
  151. val |= TPO_R02_NCLK_RISING;
  152. tpo_td043_write(tpo_td043->spi, 2, val);
  153. return count;
  154. }
  155. static ssize_t tpo_td043_gamma_show(struct device *dev,
  156. struct device_attribute *attr, char *buf)
  157. {
  158. struct tpo_td043_device *tpo_td043 = dev_get_drvdata(dev);
  159. ssize_t len = 0;
  160. int ret;
  161. int i;
  162. for (i = 0; i < ARRAY_SIZE(tpo_td043->gamma); i++) {
  163. ret = snprintf(buf + len, PAGE_SIZE - len, "%u ",
  164. tpo_td043->gamma[i]);
  165. if (ret < 0)
  166. return ret;
  167. len += ret;
  168. }
  169. buf[len - 1] = '\n';
  170. return len;
  171. }
  172. static ssize_t tpo_td043_gamma_store(struct device *dev,
  173. struct device_attribute *attr, const char *buf, size_t count)
  174. {
  175. struct tpo_td043_device *tpo_td043 = dev_get_drvdata(dev);
  176. unsigned int g[12];
  177. int ret;
  178. int i;
  179. ret = sscanf(buf, "%u %u %u %u %u %u %u %u %u %u %u %u",
  180. &g[0], &g[1], &g[2], &g[3], &g[4], &g[5],
  181. &g[6], &g[7], &g[8], &g[9], &g[10], &g[11]);
  182. if (ret != 12)
  183. return -EINVAL;
  184. for (i = 0; i < 12; i++)
  185. tpo_td043->gamma[i] = g[i];
  186. tpo_td043_write_gamma(tpo_td043->spi, tpo_td043->gamma);
  187. return count;
  188. }
  189. static DEVICE_ATTR(vmirror, S_IRUGO | S_IWUSR,
  190. tpo_td043_vmirror_show, tpo_td043_vmirror_store);
  191. static DEVICE_ATTR(mode, S_IRUGO | S_IWUSR,
  192. tpo_td043_mode_show, tpo_td043_mode_store);
  193. static DEVICE_ATTR(gamma, S_IRUGO | S_IWUSR,
  194. tpo_td043_gamma_show, tpo_td043_gamma_store);
  195. static struct attribute *tpo_td043_attrs[] = {
  196. &dev_attr_vmirror.attr,
  197. &dev_attr_mode.attr,
  198. &dev_attr_gamma.attr,
  199. NULL,
  200. };
  201. static struct attribute_group tpo_td043_attr_group = {
  202. .attrs = tpo_td043_attrs,
  203. };
  204. static const struct omap_video_timings tpo_td043_timings = {
  205. .x_res = 800,
  206. .y_res = 480,
  207. .pixel_clock = 36000,
  208. .hsw = 1,
  209. .hfp = 68,
  210. .hbp = 214,
  211. .vsw = 1,
  212. .vfp = 39,
  213. .vbp = 34,
  214. .vsync_level = OMAPDSS_SIG_ACTIVE_LOW,
  215. .hsync_level = OMAPDSS_SIG_ACTIVE_LOW,
  216. .data_pclk_edge = OMAPDSS_DRIVE_SIG_FALLING_EDGE,
  217. .de_level = OMAPDSS_SIG_ACTIVE_HIGH,
  218. .sync_pclk_edge = OMAPDSS_DRIVE_SIG_OPPOSITE_EDGES,
  219. };
  220. static int tpo_td043_power_on(struct tpo_td043_device *tpo_td043)
  221. {
  222. int nreset_gpio = tpo_td043->nreset_gpio;
  223. int r;
  224. if (tpo_td043->powered_on)
  225. return 0;
  226. r = regulator_enable(tpo_td043->vcc_reg);
  227. if (r != 0)
  228. return r;
  229. /* wait for panel to stabilize */
  230. msleep(160);
  231. if (gpio_is_valid(nreset_gpio))
  232. gpio_set_value(nreset_gpio, 1);
  233. tpo_td043_write(tpo_td043->spi, 2,
  234. TPO_R02_MODE(tpo_td043->mode) | TPO_R02_NCLK_RISING);
  235. tpo_td043_write(tpo_td043->spi, 3, TPO_R03_VAL_NORMAL);
  236. tpo_td043_write(tpo_td043->spi, 0x20, 0xf0);
  237. tpo_td043_write(tpo_td043->spi, 0x21, 0xf0);
  238. tpo_td043_write_mirror(tpo_td043->spi, tpo_td043->hmirror,
  239. tpo_td043->vmirror);
  240. tpo_td043_write_gamma(tpo_td043->spi, tpo_td043->gamma);
  241. tpo_td043->powered_on = 1;
  242. return 0;
  243. }
  244. static void tpo_td043_power_off(struct tpo_td043_device *tpo_td043)
  245. {
  246. int nreset_gpio = tpo_td043->nreset_gpio;
  247. if (!tpo_td043->powered_on)
  248. return;
  249. tpo_td043_write(tpo_td043->spi, 3,
  250. TPO_R03_VAL_STANDBY | TPO_R03_EN_PWM);
  251. if (gpio_is_valid(nreset_gpio))
  252. gpio_set_value(nreset_gpio, 0);
  253. /* wait for at least 2 vsyncs before cutting off power */
  254. msleep(50);
  255. tpo_td043_write(tpo_td043->spi, 3, TPO_R03_VAL_STANDBY);
  256. regulator_disable(tpo_td043->vcc_reg);
  257. tpo_td043->powered_on = 0;
  258. }
  259. static int tpo_td043_enable_dss(struct omap_dss_device *dssdev)
  260. {
  261. struct tpo_td043_device *tpo_td043 = dev_get_drvdata(&dssdev->dev);
  262. int r;
  263. if (dssdev->state == OMAP_DSS_DISPLAY_ACTIVE)
  264. return 0;
  265. omapdss_dpi_set_timings(dssdev, &dssdev->panel.timings);
  266. omapdss_dpi_set_data_lines(dssdev, dssdev->phy.dpi.data_lines);
  267. r = omapdss_dpi_display_enable(dssdev);
  268. if (r)
  269. goto err0;
  270. if (dssdev->platform_enable) {
  271. r = dssdev->platform_enable(dssdev);
  272. if (r)
  273. goto err1;
  274. }
  275. /*
  276. * If we are resuming from system suspend, SPI clocks might not be
  277. * enabled yet, so we'll program the LCD from SPI PM resume callback.
  278. */
  279. if (!tpo_td043->spi_suspended) {
  280. r = tpo_td043_power_on(tpo_td043);
  281. if (r)
  282. goto err1;
  283. }
  284. dssdev->state = OMAP_DSS_DISPLAY_ACTIVE;
  285. return 0;
  286. err1:
  287. omapdss_dpi_display_disable(dssdev);
  288. err0:
  289. return r;
  290. }
  291. static void tpo_td043_disable_dss(struct omap_dss_device *dssdev)
  292. {
  293. struct tpo_td043_device *tpo_td043 = dev_get_drvdata(&dssdev->dev);
  294. if (dssdev->state != OMAP_DSS_DISPLAY_ACTIVE)
  295. return;
  296. if (dssdev->platform_disable)
  297. dssdev->platform_disable(dssdev);
  298. omapdss_dpi_display_disable(dssdev);
  299. if (!tpo_td043->spi_suspended)
  300. tpo_td043_power_off(tpo_td043);
  301. }
  302. static int tpo_td043_enable(struct omap_dss_device *dssdev)
  303. {
  304. dev_dbg(&dssdev->dev, "enable\n");
  305. return tpo_td043_enable_dss(dssdev);
  306. }
  307. static void tpo_td043_disable(struct omap_dss_device *dssdev)
  308. {
  309. dev_dbg(&dssdev->dev, "disable\n");
  310. tpo_td043_disable_dss(dssdev);
  311. dssdev->state = OMAP_DSS_DISPLAY_DISABLED;
  312. }
  313. static int tpo_td043_probe(struct omap_dss_device *dssdev)
  314. {
  315. struct tpo_td043_device *tpo_td043 = dev_get_drvdata(&dssdev->dev);
  316. int nreset_gpio = dssdev->reset_gpio;
  317. int ret = 0;
  318. dev_dbg(&dssdev->dev, "probe\n");
  319. if (tpo_td043 == NULL) {
  320. dev_err(&dssdev->dev, "missing tpo_td043_device\n");
  321. return -ENODEV;
  322. }
  323. dssdev->panel.timings = tpo_td043_timings;
  324. dssdev->ctrl.pixel_size = 24;
  325. tpo_td043->mode = TPO_R02_MODE_800x480;
  326. memcpy(tpo_td043->gamma, tpo_td043_def_gamma, sizeof(tpo_td043->gamma));
  327. tpo_td043->vcc_reg = regulator_get(&dssdev->dev, "vcc");
  328. if (IS_ERR(tpo_td043->vcc_reg)) {
  329. dev_err(&dssdev->dev, "failed to get LCD VCC regulator\n");
  330. ret = PTR_ERR(tpo_td043->vcc_reg);
  331. goto fail_regulator;
  332. }
  333. if (gpio_is_valid(nreset_gpio)) {
  334. ret = gpio_request_one(nreset_gpio, GPIOF_OUT_INIT_LOW,
  335. "lcd reset");
  336. if (ret < 0) {
  337. dev_err(&dssdev->dev, "couldn't request reset GPIO\n");
  338. goto fail_gpio_req;
  339. }
  340. }
  341. ret = sysfs_create_group(&dssdev->dev.kobj, &tpo_td043_attr_group);
  342. if (ret)
  343. dev_warn(&dssdev->dev, "failed to create sysfs files\n");
  344. return 0;
  345. fail_gpio_req:
  346. regulator_put(tpo_td043->vcc_reg);
  347. fail_regulator:
  348. kfree(tpo_td043);
  349. return ret;
  350. }
  351. static void tpo_td043_remove(struct omap_dss_device *dssdev)
  352. {
  353. struct tpo_td043_device *tpo_td043 = dev_get_drvdata(&dssdev->dev);
  354. int nreset_gpio = dssdev->reset_gpio;
  355. dev_dbg(&dssdev->dev, "remove\n");
  356. sysfs_remove_group(&dssdev->dev.kobj, &tpo_td043_attr_group);
  357. regulator_put(tpo_td043->vcc_reg);
  358. if (gpio_is_valid(nreset_gpio))
  359. gpio_free(nreset_gpio);
  360. }
  361. static void tpo_td043_set_timings(struct omap_dss_device *dssdev,
  362. struct omap_video_timings *timings)
  363. {
  364. omapdss_dpi_set_timings(dssdev, timings);
  365. dssdev->panel.timings = *timings;
  366. }
  367. static int tpo_td043_check_timings(struct omap_dss_device *dssdev,
  368. struct omap_video_timings *timings)
  369. {
  370. return dpi_check_timings(dssdev, timings);
  371. }
  372. static struct omap_dss_driver tpo_td043_driver = {
  373. .probe = tpo_td043_probe,
  374. .remove = tpo_td043_remove,
  375. .enable = tpo_td043_enable,
  376. .disable = tpo_td043_disable,
  377. .set_mirror = tpo_td043_set_hmirror,
  378. .get_mirror = tpo_td043_get_hmirror,
  379. .set_timings = tpo_td043_set_timings,
  380. .check_timings = tpo_td043_check_timings,
  381. .driver = {
  382. .name = "tpo_td043mtea1_panel",
  383. .owner = THIS_MODULE,
  384. },
  385. };
  386. static int tpo_td043_spi_probe(struct spi_device *spi)
  387. {
  388. struct omap_dss_device *dssdev = spi->dev.platform_data;
  389. struct tpo_td043_device *tpo_td043;
  390. int ret;
  391. if (dssdev == NULL) {
  392. dev_err(&spi->dev, "missing dssdev\n");
  393. return -ENODEV;
  394. }
  395. spi->bits_per_word = 16;
  396. spi->mode = SPI_MODE_0;
  397. ret = spi_setup(spi);
  398. if (ret < 0) {
  399. dev_err(&spi->dev, "spi_setup failed: %d\n", ret);
  400. return ret;
  401. }
  402. tpo_td043 = kzalloc(sizeof(*tpo_td043), GFP_KERNEL);
  403. if (tpo_td043 == NULL)
  404. return -ENOMEM;
  405. tpo_td043->spi = spi;
  406. tpo_td043->nreset_gpio = dssdev->reset_gpio;
  407. dev_set_drvdata(&spi->dev, tpo_td043);
  408. dev_set_drvdata(&dssdev->dev, tpo_td043);
  409. omap_dss_register_driver(&tpo_td043_driver);
  410. return 0;
  411. }
  412. static int tpo_td043_spi_remove(struct spi_device *spi)
  413. {
  414. struct tpo_td043_device *tpo_td043 = dev_get_drvdata(&spi->dev);
  415. omap_dss_unregister_driver(&tpo_td043_driver);
  416. kfree(tpo_td043);
  417. return 0;
  418. }
  419. #ifdef CONFIG_PM_SLEEP
  420. static int tpo_td043_spi_suspend(struct device *dev)
  421. {
  422. struct tpo_td043_device *tpo_td043 = dev_get_drvdata(dev);
  423. dev_dbg(dev, "tpo_td043_spi_suspend, tpo %p\n", tpo_td043);
  424. tpo_td043->power_on_resume = tpo_td043->powered_on;
  425. tpo_td043_power_off(tpo_td043);
  426. tpo_td043->spi_suspended = 1;
  427. return 0;
  428. }
  429. static int tpo_td043_spi_resume(struct device *dev)
  430. {
  431. struct tpo_td043_device *tpo_td043 = dev_get_drvdata(dev);
  432. int ret;
  433. dev_dbg(dev, "tpo_td043_spi_resume\n");
  434. if (tpo_td043->power_on_resume) {
  435. ret = tpo_td043_power_on(tpo_td043);
  436. if (ret)
  437. return ret;
  438. }
  439. tpo_td043->spi_suspended = 0;
  440. return 0;
  441. }
  442. #endif
  443. static SIMPLE_DEV_PM_OPS(tpo_td043_spi_pm,
  444. tpo_td043_spi_suspend, tpo_td043_spi_resume);
  445. static struct spi_driver tpo_td043_spi_driver = {
  446. .driver = {
  447. .name = "tpo_td043mtea1_panel_spi",
  448. .owner = THIS_MODULE,
  449. .pm = &tpo_td043_spi_pm,
  450. },
  451. .probe = tpo_td043_spi_probe,
  452. .remove = tpo_td043_spi_remove,
  453. };
  454. module_spi_driver(tpo_td043_spi_driver);
  455. MODULE_AUTHOR("Gražvydas Ignotas <notasas@gmail.com>");
  456. MODULE_DESCRIPTION("TPO TD043MTEA1 LCD Driver");
  457. MODULE_LICENSE("GPL");